Merge "msm_fb: display: add no_max_pkt_size flag" into msm-3.0
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 786f4fa..dbf3427 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -277,7 +277,8 @@
if (gic_arch_extn.irq_retrigger)
return gic_arch_extn.irq_retrigger(d);
- return -ENXIO;
+ /* the retrigger expects 0 for failure */
+ return 0;
}
#ifdef CONFIG_SMP
diff --git a/arch/arm/configs/msm7630-perf_defconfig b/arch/arm/configs/msm7630-perf_defconfig
index fb0f106..202d117 100644
--- a/arch/arm/configs/msm7630-perf_defconfig
+++ b/arch/arm/configs/msm7630-perf_defconfig
@@ -175,7 +175,7 @@
CONFIG_MSM_BT_POWER=y
# CONFIG_WIRELESS_EXT_SYSFS is not set
CONFIG_RFKILL=y
-# CONFIG_RFKILL_PM is not set
+CONFIG_RFKILL_PM=y
CONFIG_MTD=y
CONFIG_MTD_TESTS=m
CONFIG_MTD_CMDLINE_PARTS=y
@@ -208,6 +208,8 @@
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
CONFIG_SLIP=y
CONFIG_SLIP_COMPRESSED=y
CONFIG_SLIP_MODE_SLIP6=y
diff --git a/arch/arm/configs/msm7630_defconfig b/arch/arm/configs/msm7630_defconfig
index cde4048..bc944d0 100644
--- a/arch/arm/configs/msm7630_defconfig
+++ b/arch/arm/configs/msm7630_defconfig
@@ -174,7 +174,7 @@
CONFIG_MSM_BT_POWER=y
# CONFIG_WIRELESS_EXT_SYSFS is not set
CONFIG_RFKILL=y
-# CONFIG_RFKILL_PM is not set
+CONFIG_RFKILL_PM=y
CONFIG_MTD=y
CONFIG_MTD_TESTS=m
CONFIG_MTD_CMDLINE_PARTS=y
@@ -207,6 +207,8 @@
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
CONFIG_SLIP=y
CONFIG_SLIP_COMPRESSED=y
CONFIG_SLIP_MODE_SLIP6=y
diff --git a/arch/arm/configs/msm8960_defconfig b/arch/arm/configs/msm8960_defconfig
index 12f946c..2045ff8 100755
--- a/arch/arm/configs/msm8960_defconfig
+++ b/arch/arm/configs/msm8960_defconfig
@@ -32,6 +32,7 @@
CONFIG_MODVERSIONS=y
CONFIG_ARCH_MSM=y
CONFIG_ARCH_MSM8960=y
+CONFIG_ARCH_MSM8930=y
CONFIG_ARCH_APQ8064=y
CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y
CONFIG_MACH_MSM8960_SIM=y
@@ -40,6 +41,9 @@
CONFIG_MACH_MSM8960_MTP=y
CONFIG_MACH_MSM8960_FLUID=y
CONFIG_MACH_MSM8960_LIQUID=y
+CONFIG_MACH_MSM8930_CDP=y
+CONFIG_MACH_MSM8930_MTP=y
+CONFIG_MACH_MSM8930_FLUID=y
CONFIG_MACH_APQ8064_SIM=y
CONFIG_MACH_APQ8064_RUMI3=y
# CONFIG_MSM_STACKED_MEMORY is not set
@@ -311,6 +315,7 @@
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_EHSET=y
CONFIG_USB_EHCI_MSM=y
+CONFIG_USB_EHCI_MSM_HSIC=y
CONFIG_USB_ACM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DEBUG=y
diff --git a/arch/arm/configs/msm9615_defconfig b/arch/arm/configs/msm9615_defconfig
index 953f088..fa6475b 100644
--- a/arch/arm/configs/msm9615_defconfig
+++ b/arch/arm/configs/msm9615_defconfig
@@ -104,8 +104,13 @@
CONFIG_THERMAL=y
CONFIG_THERMAL_TSENS8960=y
CONFIG_MFD_PM8018_CORE=y
-# CONFIG_MFD_PM8XXX_PWM is not set
+CONFIG_MFD_PM8XXX_PWM=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_PM8XXX=y
+# CONFIG_LEDS_MSM_PMIC is not set
CONFIG_REGULATOR=y
+CONFIG_REGULATOR_GPIO=y
# CONFIG_HID_SUPPORT is not set
CONFIG_USB=y
CONFIG_USB_GADGET=y
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index ae744a8..b44f46f 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -35,6 +35,7 @@
struct meminfo *);
void (*reserve)(void);/* reserve mem blocks */
void (*map_io)(void);/* IO mapping function */
+ void (*init_very_early)(void);
void (*init_early)(void);
void (*init_irq)(void);
struct sys_timer *timer; /* system tick timer */
diff --git a/arch/arm/kernel/perf_event_msm.c b/arch/arm/kernel/perf_event_msm.c
index ae8bfcb..fb53650 100644
--- a/arch/arm/kernel/perf_event_msm.c
+++ b/arch/arm/kernel/perf_event_msm.c
@@ -16,6 +16,11 @@
#include "../vfp/vfpinstr.h"
#ifdef CONFIG_CPU_V7
+#define SCORPION_EVT_PREFIX 1
+#define SCORPION_MAX_L1_REG 4
+
+static u32 scorpion_evt_type_base[] = {0x4c, 0x50, 0x54, 0x58, 0x5c};
+
enum scorpion_perf_common {
SCORPION_EVT_START_IDX = 0x4c,
SCORPION_ICACHE_EXPL_INV = 0x4c,
@@ -356,6 +361,25 @@
struct scorpion_evt *evtinfo)
{
u32 idx;
+ u8 prefix;
+ u8 reg;
+ u8 code;
+ u8 group;
+
+ prefix = (scorpion_evt_type & 0xF0000) >> 16;
+ if (prefix == SCORPION_EVT_PREFIX) {
+ reg = (scorpion_evt_type & 0x0F000) >> 12;
+ code = (scorpion_evt_type & 0x00FF0) >> 4;
+ group = scorpion_evt_type & 0x0000F;
+
+ if ((group > 3) || (reg > SCORPION_MAX_L1_REG))
+ return -EINVAL;
+
+ evtinfo->group_setval = 0x80000000 | (code << (group * 8));
+ evtinfo->groupcode = reg;
+ evtinfo->armv7_evt_type = scorpion_evt_type_base[reg] | group;
+ return evtinfo->armv7_evt_type;
+ }
if (scorpion_evt_type < SCORPION_EVT_START_IDX || scorpion_evt_type >=
(ARRAY_SIZE(scorpion_event) + SCORPION_EVT_START_IDX))
@@ -561,7 +585,6 @@
*/
if (idx != ARMV7_CYCLE_COUNTER) {
val = hwc->config_base;
- val &= ARMV7_EVTSEL_MASK;
if (val > 0x40) {
event = get_scorpion_evtinfo(val, &evtinfo);
if (event == -EINVAL)
@@ -601,7 +624,6 @@
*/
if (idx != ARMV7_CYCLE_COUNTER) {
val = hwc->config_base;
- val &= ARMV7_EVTSEL_MASK;
if (val < 0x40) {
armv7_pmnc_write_evtsel(idx, hwc->config_base);
} else {
@@ -670,7 +692,7 @@
.disable = scorpion_pmu_disable_event,
.read_counter = armv7pmu_read_counter,
.write_counter = armv7pmu_write_counter,
- .raw_event_mask = 0xFF,
+ .raw_event_mask = 0xFFFFF,
.get_event_idx = armv7pmu_get_event_idx,
.start = armv7pmu_start,
.stop = armv7pmu_stop,
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 9705e8c..eaf8690 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -903,6 +903,9 @@
parse_early_param();
+ if (mdesc->init_very_early)
+ mdesc->init_very_early();
+
sanity_check_meminfo();
arm_memblock_init(&meminfo, mdesc);
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 862be25..756603e 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -134,7 +134,38 @@
select MSM_SPM_V2
select MSM_L2_SPM
select MSM_NATIVE_RESTART
- select DONT_MAP_HOLE_AFTER_MEMBANK0
+ select DONT_MAP_HOLE_AFTER_MEMBANK0
+ select MSM_REMOTE_SPINLOCK_SFPB
+ select ARCH_POPULATES_NODE_MAP
+ select ARCH_SPARSEMEM_ENABLE
+ select ARCH_HAS_HOLES_MEMORYMODEL
+ select MEMORY_HOTPLUG
+ select MEMORY_HOTREMOVE
+ select MIGRATION
+ select ARCH_MEMORY_PROBE
+ select ARCH_MEMORY_REMOVE
+ select DONT_RESERVE_FROM_MOVABLE_ZONE
+
+config ARCH_MSM8930
+ bool "MSM8930"
+ select ARCH_MSM_KRAITMP
+ select ARM_GIC
+ select CPU_V7
+ select MSM_V2_TLMM
+ select MSM_GPIOMUX
+ select MSM_SCM if SMP
+ select MSM_DIRECT_SCLK_ACCESS
+ select REGULATOR
+ select MSM_RPM
+ select MSM_XO
+ select MSM_QDSP6_APR
+ select MSM_PIL
+ select MSM_AUDIO_QDSP6 if SND_SOC
+ select CPU_HAS_L2_PMU
+ select MSM_SPM_V2
+ select MSM_L2_SPM
+ select MSM_NATIVE_RESTART
+ select DONT_MAP_HOLE_AFTER_MEMBANK0
select MSM_REMOTE_SPINLOCK_SFPB
select ARCH_POPULATES_NODE_MAP
select ARCH_SPARSEMEM_ENABLE
@@ -156,6 +187,15 @@
select MSM_GPIOMUX
select MSM_REMOTE_SPINLOCK_SFPB
+config ARCH_MSMCOPPER
+ bool "MSM Copper"
+ select ARCH_MSM_KRAITMP
+ select MSM_V2_TLMM
+ select ARM_GIC
+ select CPU_V7
+ select MSM_SCM if SMP
+ select MSM_GPIOMUX
+
config ARCH_FSM9XXX
bool "FSM9XXX"
select ARCH_MSM_SCORPION
@@ -542,6 +582,24 @@
help
Support for the Qualcomm MSM8960 LIQUID device.
+config MACH_MSM8930_CDP
+ depends on ARCH_MSM8930
+ bool "MSM8930 CDP"
+ help
+ Support for the Qualcomm MSM8930 CDP device.
+
+config MACH_MSM8930_MTP
+ depends on ARCH_MSM8930
+ bool "MSM8930 MTP"
+ help
+ Support for the Qualcomm MSM8930 MTP device.
+
+config MACH_MSM8930_FLUID
+ depends on ARCH_MSM8930
+ bool "MSM8930 FLUID"
+ help
+ Support for the Qualcomm MSM8930 FLUID device.
+
config MACH_MSM9615_CDP
depends on ARCH_MSM9615
bool "MSM9615 CDP"
@@ -599,6 +657,8 @@
default "0x40800000" if ARCH_MSM9615
default "0x80200000" if ARCH_APQ8064
default "0x80200000" if ARCH_MSM8960
+ default "0x80200000" if ARCH_MSM8930
+ default "0x80200000" if ARCH_MSMCOPPER
default "0x10000000" if ARCH_FSM9XXX
default "0x00200000" if !MSM_STACKED_MEMORY
default "0x00000000" if ARCH_QSD8X50 && MSM_SOC_REV_A
@@ -1654,7 +1714,7 @@
config MSM_SHOW_RESUME_IRQ
bool "Enable logging of interrupts that could have caused resume"
- depends on (ARCH_MSM8X60 || ARCH_MSM8960)
+ depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSMCOPPER)
default n
help
This option logs wake up interrupts that have triggered just before
@@ -1735,4 +1795,12 @@
Enabling this driver allows configuring L2 SPM for low power modes
on supported chipsets.
+config MSM_MULTIMEDIA_USE_ION
+ bool "Multimedia suport using Ion"
+ depends on ION_MSM
+ help
+ Enable support for multimedia drivers using Ion for buffer management
+ instead of pmem. Selecting this may also involve userspace
+ dependencies as well.
+
endif
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index b7357cd..8693875 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -73,7 +73,7 @@
obj-$(CONFIG_MSM_BAM_DMUX) += bam_dmux.o
obj-$(CONFIG_MSM_SMD_LOGGING) += smem_log.o
obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o remote_spinlock.o
- obj-y += socinfo.o
+obj-y += socinfo.o
ifndef CONFIG_ARCH_MSM9615
ifndef CONFIG_ARCH_APQ8064
ifndef CONFIG_ARCH_MSM8960
@@ -87,10 +87,12 @@
ifndef CONFIG_ARCH_MSM8960
ifndef CONFIG_ARCH_MSM8X60
ifndef CONFIG_ARCH_APQ8064
+ifndef CONFIG_ARCH_MSMCOPPER
obj-y += nand_partitions.o
endif
endif
endif
+endif
obj-$(CONFIG_MSM_SDIO_TTY) += sdio_tty.o sdio_tty_ciq.o
obj-$(CONFIG_MSM_SMD_TTY) += smd_tty.o
obj-$(CONFIG_MSM_SMD_QMI) += smd_qmi.o
@@ -139,6 +141,7 @@
obj-$(CONFIG_ARCH_MSM7X27A) += pm2.o
obj-$(CONFIG_ARCH_MSM7X25) += pm.o
obj-$(CONFIG_ARCH_MSM7X01A) += pm.o
+ obj-y += pm-boot.o
else
obj-y += no-pm.o
endif
@@ -219,11 +222,15 @@
obj-$(CONFIG_MACH_MSM8960_CDP) += board-msm8960.o devices-8960.o board-msm8960-regulator.o
obj-$(CONFIG_MACH_MSM8960_MTP) += board-msm8960.o devices-8960.o board-msm8960-regulator.o
obj-$(CONFIG_MACH_MSM8960_FLUID) += board-msm8960.o devices-8960.o board-msm8960-regulator.o
+obj-$(CONFIG_MACH_MSM8930_CDP) += board-msm8960.o devices-8960.o board-msm8960-regulator.o
+obj-$(CONFIG_MACH_MSM8930_MTP) += board-msm8960.o devices-8960.o board-msm8960-regulator.o
+obj-$(CONFIG_MACH_MSM8930_FLUID) += board-msm8960.o devices-8960.o board-msm8960-regulator.o
obj-$(CONFIG_ARCH_MSM8960) += bms-batterydata.o
obj-$(CONFIG_ARCH_APQ8064) += board-apq8064.o devices-8064.o board-apq8064-regulator.o
obj-$(CONFIG_ARCH_MSM9615) += board-9615.o devices-9615.o board-9615-regulator.o
obj-$(CONFIG_ARCH_MSM9615) += clock-local.o clock-9615.o acpuclock-9615.o clock-rpm.o
obj-$(CONFIG_ARCH_MSM9615) += rpm-regulator.o rpm-regulator-9615.o
+obj-$(CONFIG_ARCH_MSMCOPPER) += board-copper.o board-dt.o
obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire.o board-sapphire-gpio.o
obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire-keypad.o board-sapphire-panel.o
@@ -261,6 +268,7 @@
obj-$(CONFIG_ARCH_MSM8960) += gpiomux-v2.o gpiomux.o
obj-$(CONFIG_ARCH_APQ8064) += gpiomux-v2.o gpiomux.o
obj-$(CONFIG_ARCH_MSM9615) += gpiomux-v2.o gpiomux.o
+obj-$(CONFIG_ARCH_MSMCOPPER) += gpiomux-v2.o gpiomux.o
ifdef CONFIG_FSM9XXX_TLMM
obj-y += gpio-fsm9xxx.o
diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot
index 3e8ea9f..bc15a01 100644
--- a/arch/arm/mach-msm/Makefile.boot
+++ b/arch/arm/mach-msm/Makefile.boot
@@ -35,9 +35,15 @@
# MSM8960
zreladdr-$(CONFIG_ARCH_MSM8960) := 0x80208000
+# MSM8930
+ zreladdr-$(CONFIG_ARCH_MSM8930) := 0x80208000
+
# APQ8064
zreladdr-$(CONFIG_ARCH_APQ8064) := 0x80208000
+# MSMCOPPER
+ zreladdr-$(CONFIG_ARCH_MSMCOPPER) := 0x80208000
+
# MSM9615
zreladdr-$(CONFIG_ARCH_MSM9615) := 0x40808000
diff --git a/arch/arm/mach-msm/acpuclock-8960.c b/arch/arm/mach-msm/acpuclock-8960.c
index 47da48e..93629d1 100644
--- a/arch/arm/mach-msm/acpuclock-8960.c
+++ b/arch/arm/mach-msm/acpuclock-8960.c
@@ -545,7 +545,7 @@
unsigned int vdd_dig, enum setrate_reason reason)
{
struct scalable *sc = &scalable[cpu];
- int rc;
+ int rc = 0;
/*
* Increase vdd_mem active-set before vdd_dig.
@@ -977,7 +977,7 @@
struct acpu_level *l, *max_acpu_level = NULL;
/* Select frequency tables. */
- if (cpu_is_msm8960()) {
+ if (cpu_is_msm8960() || cpu_is_msm8930()) {
uint32_t pte_efuse, pvs;
pte_efuse = readl_relaxed(QFPROM_PTE_EFUSE_ADDR);
diff --git a/arch/arm/mach-msm/bam_dmux.c b/arch/arm/mach-msm/bam_dmux.c
index 6f1ebe8..a9b1a77 100644
--- a/arch/arm/mach-msm/bam_dmux.c
+++ b/arch/arm/mach-msm/bam_dmux.c
@@ -1190,7 +1190,7 @@
if (bam_mux_initialized)
return 0;
- dfab_clk = clk_get(&pdev->dev, "dfab_clk");
+ dfab_clk = clk_get(&pdev->dev, "bus_clk");
if (IS_ERR(dfab_clk)) {
pr_err("%s: did not get dfab clock\n", __func__);
return -EFAULT;
diff --git a/arch/arm/mach-msm/board-9615-regulator.c b/arch/arm/mach-msm/board-9615-regulator.c
index 855d956..6568bef 100644
--- a/arch/arm/mach-msm/board-9615-regulator.c
+++ b/arch/arm/mach-msm/board-9615-regulator.c
@@ -12,6 +12,7 @@
*/
#include <linux/regulator/pm8018-regulator.h>
+#include <linux/regulator/gpio-regulator.h>
#include <mach/rpm-regulator.h>
#include "board-9615.h"
@@ -83,6 +84,9 @@
VREG_CONSUMERS(LVS1) = {
REGULATOR_SUPPLY("8018_lvs1", NULL),
};
+VREG_CONSUMERS(EXT_2P95V) = {
+ REGULATOR_SUPPLY("ext_2p95v", NULL),
+};
#define PM8018_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
_pull_down, _always_on, _supply_regulator, \
@@ -238,6 +242,25 @@
.pin_ctrl = _pin_ctrl, \
}
+#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio) \
+ [GPIO_VREG_ID_##_id] = { \
+ .init_data = { \
+ .constraints = { \
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
+ }, \
+ .num_consumer_supplies = \
+ ARRAY_SIZE(vreg_consumers_##_id), \
+ .consumer_supplies = vreg_consumers_##_id, \
+ }, \
+ .regulator_name = _reg_name, \
+ .gpio_label = _gpio_label, \
+ .gpio = _gpio, \
+ }
+
+/* GPIO regulator constraints */
+struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
+ GPIO_VREG_INIT(EXT_2P95V, "ext_2p95v", "ext_2p95_en", 18),
+};
/* PM8018 regulator constraints */
struct pm8018_regulator_platform_data
diff --git a/arch/arm/mach-msm/board-9615.c b/arch/arm/mach-msm/board-9615.c
index 5f0480b..701464a 100644
--- a/arch/arm/mach-msm/board-9615.c
+++ b/arch/arm/mach-msm/board-9615.c
@@ -25,6 +25,8 @@
#include <linux/usb/android.h>
#include <linux/usb/msm_hsusb.h>
#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
+#include <linux/leds.h>
+#include <linux/leds-pm8xxx.h>
#include "timer.h"
#include "devices.h"
#include "board-9615.h"
@@ -94,6 +96,42 @@
.priority = 0,
};
+#define PM8018_LED_KB_MAX_CURRENT 20 /* I = 20mA */
+#define PM8XXX_LED_PWM_PERIOD_US 1000
+
+/**
+ * PM8XXX_PWM_CHANNEL_NONE shall be used when LED shall not be
+ * driven using PWM feature.
+ */
+#define PM8XXX_PWM_CHANNEL_NONE -1
+
+static struct led_info pm8018_led_info[] = {
+ [0] = {
+ .name = "led:kb",
+ },
+};
+
+static struct led_platform_data pm8018_led_core_pdata = {
+ .num_leds = ARRAY_SIZE(pm8018_led_info),
+ .leds = pm8018_led_info,
+};
+
+static struct pm8xxx_led_config pm8018_led_configs[] = {
+ [0] = {
+ .id = PM8XXX_ID_LED_KB_LIGHT,
+ .mode = PM8XXX_LED_MODE_PWM3,
+ .max_current = PM8018_LED_KB_MAX_CURRENT,
+ .pwm_channel = 2,
+ .pwm_period_us = PM8XXX_LED_PWM_PERIOD_US,
+ },
+};
+
+static struct pm8xxx_led_platform_data pm8xxx_leds_pdata = {
+ .led_core = &pm8018_led_core_pdata,
+ .configs = pm8018_led_configs,
+ .num_configs = ARRAY_SIZE(pm8018_led_configs),
+};
+
static struct pm8018_platform_data pm8018_platform_data __devinitdata = {
.irq_pdata = &pm8xxx_irq_pdata,
.gpio_pdata = &pm8xxx_gpio_pdata,
@@ -103,6 +141,7 @@
.misc_pdata = &pm8xxx_misc_pdata,
.regulator_pdatas = msm_pm8018_regulator_pdata,
.adc_pdata = &pm8018_adc_pdata,
+ .leds_pdata = &pm8xxx_leds_pdata,
};
static struct msm_ssbi_platform_data msm9615_ssbi_pm8018_pdata __devinitdata = {
@@ -121,6 +160,15 @@
},
};
+static struct platform_device msm9615_device_ext_2p95v_vreg = {
+ .name = GPIO_REGULATOR_DEV_NAME,
+ .id = 18,
+ .dev = {
+ .platform_data =
+ &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_2P95V],
+ },
+};
+
static struct gpiomux_setting ps_hold = {
.func = GPIOMUX_FUNC_1,
.drv = GPIOMUX_DRV_8MA,
@@ -237,7 +285,7 @@
#define GPIO_SDC1_HW_DET 80
#define GPIO_SDC2_DAT1_WAKEUP 26
-/* MDM9x15 have 2 SDCC controllers */
+/* MDM9x15 has 2 SDCC controllers */
enum sdcc_controllers {
SDCC1,
SDCC2,
@@ -566,6 +614,7 @@
&msm_device_gadget_peripheral,
&android_usb_device,
&msm9615_device_uart_gsbi4,
+ &msm9615_device_ext_2p95v_vreg,
&msm9615_device_ssbi_pmic1,
&msm9615_device_qup_i2c_gsbi5,
&msm9615_device_qup_spi_gsbi3,
diff --git a/arch/arm/mach-msm/board-9615.h b/arch/arm/mach-msm/board-9615.h
index 0d9fae7..0f5adf0 100644
--- a/arch/arm/mach-msm/board-9615.h
+++ b/arch/arm/mach-msm/board-9615.h
@@ -15,6 +15,7 @@
#include <mach/irqs.h>
#include <linux/mfd/pm8xxx/pm8018.h>
+#include <linux/regulator/gpio-regulator.h>
/* Macros assume PMIC GPIOs and MPPs start at 1 */
#define PM8018_GPIO_BASE NR_GPIO_IRQS
@@ -32,4 +33,8 @@
extern struct rpm_regulator_platform_data
msm_rpm_regulator_9615_pdata __devinitdata;
+#define GPIO_VREG_ID_EXT_2P95V 0
+
+extern struct gpio_regulator_platform_data msm_gpio_regulator_pdata[];
+
#endif
diff --git a/arch/arm/mach-msm/board-apq8064.c b/arch/arm/mach-msm/board-apq8064.c
index 4328b85..4aa6abe 100644
--- a/arch/arm/mach-msm/board-apq8064.c
+++ b/arch/arm/mach-msm/board-apq8064.c
@@ -33,9 +33,174 @@
#include "devices.h"
#include <mach/gpio.h>
#include <mach/gpiomux.h>
+#include <linux/android_pmem.h>
+#include <mach/msm_memtypes.h>
+#include <linux/bootmem.h>
+#include <asm/setup.h>
#include "board-apq8064.h"
+#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
+#define MSM_PMEM_ADSP_SIZE 0x3800000
+#define MSM_PMEM_AUDIO_SIZE 0x28B000
+#define MSM_PMEM_SIZE 0x1800000 /* 24 Mbytes */
+
+static struct memtype_reserve apq8064_reserve_table[] __initdata = {
+ [MEMTYPE_SMI] = {
+ },
+ [MEMTYPE_EBI0] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+ [MEMTYPE_EBI1] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+};
+
+static int apq8064_paddr_to_memtype(unsigned int paddr)
+{
+ return MEMTYPE_EBI1;
+}
+
+static unsigned pmem_size = MSM_PMEM_SIZE;
+static int __init pmem_size_setup(char *p)
+{
+ pmem_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_size", pmem_size_setup);
+
+static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
+
+static int __init pmem_adsp_size_setup(char *p)
+{
+ pmem_adsp_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_adsp_size", pmem_adsp_size_setup);
+
+static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
+
+static int __init pmem_audio_size_setup(char *p)
+{
+ pmem_audio_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_audio_size", pmem_audio_size_setup);
+
+static struct android_pmem_platform_data android_pmem_pdata = {
+ .name = "pmem",
+ .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
+ .cached = 1,
+ .memory_type = MEMTYPE_EBI1,
+};
+
+static struct platform_device android_pmem_device = {
+ .name = "android_pmem",
+ .id = 0,
+ .dev = {.platform_data = &android_pmem_pdata},
+};
+
+static struct android_pmem_platform_data android_pmem_adsp_pdata = {
+ .name = "pmem_adsp",
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
+ .cached = 0,
+ .memory_type = MEMTYPE_EBI1,
+};
+
+static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
+static int __init pmem_kernel_ebi1_size_setup(char *p)
+{
+ pmem_kernel_ebi1_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
+
+static struct platform_device android_pmem_adsp_device = {
+ .name = "android_pmem",
+ .id = 2,
+ .dev = { .platform_data = &android_pmem_adsp_pdata },
+};
+
+static struct android_pmem_platform_data android_pmem_audio_pdata = {
+ .name = "pmem_audio",
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
+ .cached = 0,
+ .memory_type = MEMTYPE_EBI1,
+};
+
+static struct platform_device android_pmem_audio_device = {
+ .name = "android_pmem",
+ .id = 4,
+ .dev = { .platform_data = &android_pmem_audio_pdata },
+};
+
+static void __init size_pmem_devices(void)
+{
+ android_pmem_adsp_pdata.size = pmem_adsp_size;
+ android_pmem_pdata.size = pmem_size;
+ android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
+}
+
+static void __init reserve_memory_for(struct android_pmem_platform_data *p)
+{
+ apq8064_reserve_table[p->memory_type].size += p->size;
+}
+
+
+static void __init reserve_pmem_memory(void)
+{
+ reserve_memory_for(&android_pmem_adsp_pdata);
+ reserve_memory_for(&android_pmem_pdata);
+ reserve_memory_for(&android_pmem_audio_pdata);
+ apq8064_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
+}
+
+static void __init apq8064_calculate_reserve_sizes(void)
+{
+ size_pmem_devices();
+ reserve_pmem_memory();
+}
+
+static struct reserve_info apq8064_reserve_info __initdata = {
+ .memtype_reserve_table = apq8064_reserve_table,
+ .calculate_reserve_sizes = apq8064_calculate_reserve_sizes,
+ .paddr_to_memtype = apq8064_paddr_to_memtype,
+};
+
+static int apq8064_memory_bank_size(void)
+{
+ return 1<<29;
+}
+
+static void __init locate_unstable_memory(void)
+{
+ struct membank *mb = &meminfo.bank[meminfo.nr_banks - 1];
+ unsigned long bank_size;
+ unsigned long low, high;
+
+ bank_size = apq8064_memory_bank_size();
+ low = meminfo.bank[0].start;
+ high = mb->start + mb->size;
+ low &= ~(bank_size - 1);
+
+ if (high - low <= bank_size)
+ return;
+ apq8064_reserve_info.low_unstable_address = low + bank_size;
+ apq8064_reserve_info.max_unstable_size = high - low - bank_size;
+ apq8064_reserve_info.bank_size = bank_size;
+ pr_info("low unstable address %lx max size %lx bank size %lx\n",
+ apq8064_reserve_info.low_unstable_address,
+ apq8064_reserve_info.max_unstable_size,
+ apq8064_reserve_info.bank_size);
+}
+
+static void __init apq8064_reserve(void)
+{
+ reserve_info = &apq8064_reserve_info;
+ locate_unstable_memory();
+ msm_reserve();
+}
+
static struct platform_device android_usb_device = {
.name = "android_usb",
.id = -1,
@@ -48,7 +213,7 @@
.pclk_src_name = "dfab_usb_hs_clk",
};
-/* APQ8064 have 4 SDCC controllers */
+/* APQ8064 has 4 SDCC controllers */
enum sdcc_controllers {
SDCC1,
SDCC2,
@@ -57,7 +222,7 @@
MAX_SDCC_CONTROLLER
};
-/* All SDCC controllers requires VDD/VCC voltage */
+/* All SDCC controllers require VDD/VCC voltage */
static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = {
/* SDCC1 : eMMC card connected */
[SDCC1] = {
@@ -325,6 +490,9 @@
&apq8064_device_otg,
&apq8064_device_gadget_peripheral,
&android_usb_device,
+ &android_pmem_device,
+ &android_pmem_adsp_device,
+ &android_pmem_audio_device,
};
static struct platform_device *sim_devices[] __initdata = {
@@ -581,6 +749,7 @@
MACHINE_START(APQ8064_SIM, "QCT APQ8064 SIMULATOR")
.map_io = apq8064_map_io,
+ .reserve = apq8064_reserve,
.init_irq = apq8064_init_irq,
.timer = &msm_timer,
.init_machine = apq8064_sim_init,
@@ -588,6 +757,7 @@
MACHINE_START(APQ8064_RUMI3, "QCT APQ8064 RUMI3")
.map_io = apq8064_map_io,
+ .reserve = apq8064_reserve,
.init_irq = apq8064_init_irq,
.timer = &msm_timer,
.init_machine = apq8064_rumi3_init,
diff --git a/arch/arm/mach-msm/board-copper.c b/arch/arm/mach-msm/board-copper.c
new file mode 100644
index 0000000..496e1f4
--- /dev/null
+++ b/arch/arm/mach-msm/board-copper.c
@@ -0,0 +1,95 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <asm/mach/map.h>
+#include <asm/hardware/gic.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/gpiomux.h>
+#include <mach/msm_iomap.h>
+#include "clock.h"
+
+static int __init gpiomux_init(void)
+{
+ int rc;
+
+ rc = msm_gpiomux_init(NR_GPIO_IRQS);
+ if (rc) {
+ pr_err("%s: msm_gpiomux_init failed %d\n", __func__, rc);
+ return rc;
+ }
+
+ return 0;
+}
+
+void __init msm_copper_add_devices(void)
+{
+}
+
+static struct of_device_id msm_copper_gic_match[] __initdata = {
+ { .compatible = "qcom,msm-qgic2", },
+ {}
+};
+
+void __init msm_copper_init_irq(void)
+{
+ unsigned int i;
+
+ gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
+ (void *)MSM_QGIC_CPU_BASE);
+
+ /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
+ writel_relaxed(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
+
+ writel_relaxed(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
+ mb();
+
+ /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
+ * as they are configured as level, which does not play nice with
+ * handle_percpu_irq.
+ */
+ for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
+ if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
+ irq_set_handler(i, handle_percpu_irq);
+ }
+ irq_domain_generate_simple(msm_copper_gic_match,
+ COPPER_QGIC_DIST_PHYS, GIC_SPI_START);
+}
+
+static struct clk_lookup msm_clocks_dummy[] = {
+};
+
+struct clock_init_data msm_dummy_clock_init_data __initdata = {
+ .table = msm_clocks_dummy,
+ .size = ARRAY_SIZE(msm_clocks_dummy),
+};
+
+static struct of_dev_auxdata msm_copper_auxdata_lookup[] __initdata = {
+ {}
+};
+
+void __init msm_copper_init(struct of_dev_auxdata **adata)
+{
+ if (gpiomux_init())
+ pr_err("%s: gpiomux_init() failed\n", __func__);
+ msm_clock_init(&msm_dummy_clock_init_data);
+
+ *adata = msm_copper_auxdata_lookup;
+}
diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c
new file mode 100644
index 0000000..1ede17b
--- /dev/null
+++ b/arch/arm/mach-msm/board-dt.c
@@ -0,0 +1,66 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/of_fdt.h>
+#include <asm/mach/arch.h>
+#include <mach/socinfo.h>
+#include <mach/board.h>
+#include "timer.h"
+
+#define early_machine_is_copper() \
+ of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,msmcopper")
+#define machine_is_copper() \
+ of_machine_is_compatible("qcom,msmcopper")
+
+static void __init msm_dt_init_irq(void)
+{
+ if (machine_is_copper())
+ msm_copper_init_irq();
+}
+
+static void __init msm_dt_map_io(void)
+{
+ if (early_machine_is_copper())
+ msm_map_copper_io();
+ if (socinfo_init() < 0)
+ pr_err("%s: socinfo_init() failed\n", __func__);
+}
+
+static void __init msm_dt_init(void)
+{
+ struct of_dev_auxdata *adata = NULL;
+
+ if (machine_is_copper())
+ msm_copper_init(&adata);
+
+ of_platform_populate(NULL, of_default_bus_match_table, adata, NULL);
+ if (machine_is_copper())
+ msm_copper_add_devices();
+}
+
+static const char *msm_dt_match[] __initdata = {
+ "qcom,msmcopper",
+ NULL
+};
+
+DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
+ .map_io = msm_dt_map_io,
+ .init_irq = msm_dt_init_irq,
+ .init_machine = msm_dt_init,
+ .timer = &msm_timer,
+ .dt_compat = msm_dt_match,
+MACHINE_END
diff --git a/arch/arm/mach-msm/board-msm7x27.c b/arch/arm/mach-msm/board-msm7x27.c
index 22de352..ef1bf2d 100644
--- a/arch/arm/mach-msm/board-msm7x27.c
+++ b/arch/arm/mach-msm/board-msm7x27.c
@@ -68,6 +68,7 @@
#include "acpuclock.h"
#include "msm-keypad-devices.h"
#include "pm.h"
+#include "pm-boot.h"
#ifdef CONFIG_ARCH_MSM7X25
#define MSM_PMEM_MDP_SIZE 0xb21000
@@ -1711,6 +1712,9 @@
else
msm_pm_set_platform_data(msm7x25_pm_data,
ARRAY_SIZE(msm7x25_pm_data));
+
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_RESET_VECTOR,
+ ioremap(0, PAGE_SIZE)));
msm7x27_wlan_init();
}
diff --git a/arch/arm/mach-msm/board-msm7x27a-regulator.c b/arch/arm/mach-msm/board-msm7x27a-regulator.c
index 19e9285..1a3bb75 100644
--- a/arch/arm/mach-msm/board-msm7x27a-regulator.c
+++ b/arch/arm/mach-msm/board-msm7x27a-regulator.c
@@ -205,7 +205,7 @@
PCOM_VREG_LDO(ldo02, 13, NULL, 2850000, 2850000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo03, 49, NULL, 1200000, 1200000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo04, 50, NULL, 1100000, 1100000, 0, -1, 0, 0, 0, 0),
- PCOM_VREG_LDO(ldo05, 45, NULL, 1300000, 1300000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo05, 45, NULL, 1300000, 1350000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo06, 51, NULL, 1200000, 1200000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo07, 0, NULL, 2600000, 2600000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo08, 9, NULL, 2850000, 2850000, 0, -1, 0, 0, 0, 0),
@@ -217,9 +217,9 @@
PCOM_VREG_LDO(ldo14, 16, NULL, 3300000, 3300000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo15, 54, NULL, 1800000, 2850000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo16, 19, NULL, 1800000, 2850000, 0, -1, 0, 0, 0, 0),
- PCOM_VREG_LDO(ldo17, 56, NULL, 2900000, 3000000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo17, 56, NULL, 2900000, 3300000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo18, 11, NULL, 2700000, 2700000, 0, -1, 0, 0, 0, 0),
- PCOM_VREG_LDO(ldo19, 57, NULL, 1200000, 1200000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo19, 57, NULL, 1200000, 1800000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_NCP(ncp, 31, NULL, -1800000, -1800000, 0, 0, 0, 0, 0),
};
diff --git a/arch/arm/mach-msm/board-msm7x27a.c b/arch/arm/mach-msm/board-msm7x27a.c
index cd590c3..ca1da75 100644
--- a/arch/arm/mach-msm/board-msm7x27a.c
+++ b/arch/arm/mach-msm/board-msm7x27a.c
@@ -53,6 +53,7 @@
#include "pm.h"
#include <mach/rpc_server_handset.h>
#include <mach/socinfo.h>
+#include "pm-boot.h"
#define PMEM_KERNEL_EBI1_SIZE 0x3A000
#define MSM_PMEM_AUDIO_SIZE 0x5B000
@@ -465,13 +466,14 @@
struct bt_vreg_info {
const char *name;
unsigned int pmapp_id;
- unsigned int level;
+ unsigned int min_level;
+ unsigned int max_level;
unsigned int is_pin_controlled;
struct regulator *reg;
};
static struct bt_vreg_info bt_vregs[] = {
- {"msme1", 2, 1800000, 0, NULL},
- {"bt", 21, 2900000, 1, NULL}
+ {"msme1", 2, 1800000, 1800000, 0, NULL},
+ {"bt", 21, 2900000, 3050000, 1, NULL}
};
static int bahama_bt(int on)
@@ -639,7 +641,8 @@
}
rc = on ? regulator_set_voltage(bt_vregs[i].reg,
- bt_vregs[i].level, bt_vregs[i].level) : 0;
+ bt_vregs[i].min_level,
+ bt_vregs[i].max_level) : 0;
if (rc) {
dev_err(&msm_bt_power_device.dev,
"%s: could not set voltage for %s: %d\n",
@@ -3199,6 +3202,8 @@
msm_pm_set_platform_data(msm7x27a_pm_data,
ARRAY_SIZE(msm7x27a_pm_data));
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_RESET_VECTOR,
+ ioremap(0, PAGE_SIZE)));
#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
register_i2c_devices();
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index b71061a..03307f0 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -80,6 +80,7 @@
#include <mach/usbdiag.h>
#endif
#include "pm.h"
+#include "pm-boot.h"
#include "spm.h"
#include "acpuclock.h"
#include <mach/dal_axi.h>
@@ -6743,6 +6744,7 @@
.pwm_ch_id = 1, /*channel id*/
/*gpio to enable haptic*/
.hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
+ .hap_len_gpio = -1,
.max_timeout = 15000,
.mode_ctrl = PWM_GEN_MODE,
.pwm_fd = {
@@ -7002,6 +7004,8 @@
msm_fb_add_devices();
msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_RESET_VECTOR,
+ (uint32_t *)PAGE_OFFSET));
msm_device_i2c_init();
msm_device_i2c_2_init();
qup_device_i2c_init();
diff --git a/arch/arm/mach-msm/board-msm8960-regulator.c b/arch/arm/mach-msm/board-msm8960-regulator.c
index ca24e79..4aba197 100644
--- a/arch/arm/mach-msm/board-msm8960-regulator.c
+++ b/arch/arm/mach-msm/board-msm8960-regulator.c
@@ -118,6 +118,8 @@
REGULATOR_SUPPLY("8921_l25", NULL),
REGULATOR_SUPPLY("VDDD_CDC_D", "tabla-slim"),
REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "tabla-slim"),
+ REGULATOR_SUPPLY("VDDD_CDC_D", "tabla2x-slim"),
+ REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "tabla2x-slim"),
};
VREG_CONSUMERS(L26) = {
REGULATOR_SUPPLY("8921_l26", NULL),
@@ -157,6 +159,10 @@
REGULATOR_SUPPLY("CDC_VDD_CP", "tabla-slim"),
REGULATOR_SUPPLY("CDC_VDDA_TX", "tabla-slim"),
REGULATOR_SUPPLY("CDC_VDDA_RX", "tabla-slim"),
+ REGULATOR_SUPPLY("VDDIO_CDC", "tabla2x-slim"),
+ REGULATOR_SUPPLY("CDC_VDD_CP", "tabla2x-slim"),
+ REGULATOR_SUPPLY("CDC_VDDA_TX", "tabla2x-slim"),
+ REGULATOR_SUPPLY("CDC_VDDA_RX", "tabla2x-slim"),
REGULATOR_SUPPLY("vcc_i2c", "3-005b"),
};
VREG_CONSUMERS(S5) = {
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index a19cf27..b06bb53 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -88,6 +88,7 @@
#include "acpuclock.h"
#include "rpm_log.h"
#include "smd_private.h"
+#include "pm-boot.h"
static struct platform_device msm_fm_platform_init = {
.name = "iris_fm",
@@ -792,7 +793,15 @@
#else
#define MSM_PMEM_SIZE 0x1800000 /* 24 Mbytes */
#endif
-#define MSM_ION_EBI_SIZE SZ_8M
+
+
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+#define MSM_ION_EBI_SIZE MSM_PMEM_SIZE
+#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
+#define MSM_ION_HEAP_NUM 4
+#else
+#define MSM_ION_HEAP_NUM 2
+#endif
#ifdef CONFIG_KERNEL_PMEM_EBI_REGION
static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
@@ -833,6 +842,7 @@
#endif
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
static struct android_pmem_platform_data android_pmem_pdata = {
.name = "pmem",
.allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
@@ -857,6 +867,7 @@
.id = 2,
.dev = { .platform_data = &android_pmem_adsp_pdata },
};
+#endif
static struct android_pmem_platform_data android_pmem_audio_pdata = {
.name = "pmem_audio",
@@ -906,8 +917,10 @@
static void __init size_pmem_devices(void)
{
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
android_pmem_adsp_pdata.size = pmem_adsp_size;
android_pmem_pdata.size = pmem_size;
+#endif
android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
#endif
}
@@ -920,8 +933,10 @@
static void __init reserve_pmem_memory(void)
{
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
reserve_memory_for(&android_pmem_adsp_pdata);
reserve_memory_for(&android_pmem_pdata);
+#endif
reserve_memory_for(&android_pmem_audio_pdata);
msm8960_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
#endif
@@ -934,7 +949,7 @@
#ifdef CONFIG_ION_MSM
struct ion_platform_data ion_pdata = {
- .nr = 3,
+ .nr = MSM_ION_HEAP_NUM,
.heaps = {
{
.id = ION_HEAP_SYSTEM_ID,
@@ -946,6 +961,7 @@
.type = ION_HEAP_TYPE_SYSTEM_CONTIG,
.name = ION_VMALLOC_HEAP_NAME,
},
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
{
.id = ION_HEAP_EBI_ID,
.type = ION_HEAP_TYPE_CARVEOUT,
@@ -953,6 +969,14 @@
.size = MSM_ION_EBI_SIZE,
.memory_type = ION_EBI_TYPE,
},
+ {
+ .id = ION_HEAP_ADSP_ID,
+ .type = ION_HEAP_TYPE_CARVEOUT,
+ .name = ION_ADSP_HEAP_NAME,
+ .size = MSM_ION_ADSP_SIZE,
+ .memory_type = ION_EBI_TYPE,
+ },
+#endif
}
};
@@ -965,8 +989,9 @@
static void reserve_ion_memory(void)
{
-#ifdef CONFIG_ION_MSM
+#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
msm8960_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
+ msm8960_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
#endif
}
static void __init msm8960_calculate_reserve_sizes(void)
@@ -1009,10 +1034,23 @@
msm8960_reserve_info.bank_size);
}
-static void __init msm8960_reserve(void)
+static void __init place_movable_zone(void)
+{
+ movable_reserved_start = msm8960_reserve_info.low_unstable_address;
+ movable_reserved_size = msm8960_reserve_info.max_unstable_size;
+ pr_info("movable zone start %lx size %lx\n",
+ movable_reserved_start, movable_reserved_size);
+}
+
+static void __init msm8960_early_memory(void)
{
reserve_info = &msm8960_reserve_info;
locate_unstable_memory();
+ place_movable_zone();
+}
+
+static void __init msm8960_reserve(void)
+{
msm_reserve();
}
@@ -2368,6 +2406,35 @@
.platform_data = &tabla_platform_data,
},
};
+
+static struct tabla_pdata tabla20_platform_data = {
+ .slimbus_slave_device = {
+ .name = "tabla-slave",
+ .e_addr = {0, 0, 0x60, 0, 0x17, 2},
+ },
+ .irq = MSM_GPIO_TO_INT(62),
+ .irq_base = TABLA_INTERRUPT_BASE,
+ .num_irqs = NR_TABLA_IRQS,
+ .reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
+ .micbias = {
+ .ldoh_v = TABLA_LDOH_2P85_V,
+ .cfilt1_mv = 1800,
+ .cfilt2_mv = 1800,
+ .cfilt3_mv = 1800,
+ .bias1_cfilt_sel = TABLA_CFILT1_SEL,
+ .bias2_cfilt_sel = TABLA_CFILT2_SEL,
+ .bias3_cfilt_sel = TABLA_CFILT3_SEL,
+ .bias4_cfilt_sel = TABLA_CFILT3_SEL,
+ }
+};
+
+static struct slim_device msm_slim_tabla20 = {
+ .name = "tabla2x-slim",
+ .e_addr = {0, 1, 0x60, 0, 0x17, 2},
+ .dev = {
+ .platform_data = &tabla20_platform_data,
+ },
+};
#endif
static struct slim_boardinfo msm_slim_devices[] = {
@@ -2376,6 +2443,10 @@
.bus_num = 1,
.slim_slave = &msm_slim_tabla,
},
+ {
+ .bus_num = 1,
+ .slim_slave = &msm_slim_tabla20,
+ },
#endif
/* add more slimbus slaves as needed */
};
@@ -2678,7 +2749,7 @@
}
}
-/* MSM8960 have 5 SDCC controllers */
+/* MSM8960 has 5 SDCC controllers */
enum sdcc_controllers {
SDCC1,
SDCC2,
@@ -2688,7 +2759,7 @@
MAX_SDCC_CONTROLLER
};
-/* All SDCC controllers requires VDD/VCC voltage */
+/* All SDCC controllers require VDD/VCC voltage */
static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = {
/* SDCC1 : eMMC card connected */
[SDCC1] = {
@@ -3073,8 +3144,7 @@
}
dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
- strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
- dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
+ strlcpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
out:
iounmap(dload);
return 0;
@@ -3644,8 +3714,10 @@
&fish_battery_device,
#endif
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
&android_pmem_device,
&android_pmem_adsp_device,
+#endif
&android_pmem_audio_device,
#endif
&msm_fb_device,
@@ -4460,6 +4532,7 @@
msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
msm_pm_data);
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_TZ, NULL));
}
static void __init msm8960_rumi3_init(void)
@@ -4492,6 +4565,7 @@
msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
msm_pm_data);
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_TZ, NULL));
}
static void __init msm8960_cdp_init(void)
@@ -4551,6 +4625,7 @@
msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
msm_pm_data);
change_memory_power = &msm8960_change_memory_power;
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_TZ, NULL));
}
MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
@@ -4560,6 +4635,7 @@
.timer = &msm_timer,
.init_machine = msm8960_sim_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
@@ -4569,6 +4645,7 @@
.timer = &msm_timer,
.init_machine = msm8960_rumi3_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8960_CDP, "QCT MSM8960 CDP")
@@ -4578,6 +4655,7 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8960_MTP, "QCT MSM8960 MTP")
@@ -4587,6 +4665,7 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8960_FLUID, "QCT MSM8960 FLUID")
@@ -4596,6 +4675,7 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8960_LIQUID, "QCT MSM8960 LIQUID")
@@ -4605,6 +4685,7 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
#ifdef CONFIG_ARCH_MSM8930
@@ -4615,6 +4696,7 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8930_MTP, "QCT MSM8930 MTP")
@@ -4624,6 +4706,7 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8930_FLUID, "QCT MSM8930 FLUID")
@@ -4633,5 +4716,6 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
#endif
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 956387a..61b70cf 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -108,7 +108,7 @@
#include <linux/platform_data/qcom_crypto_device.h>
#include "rpm_resources.h"
#include "acpuclock.h"
-
+#include "pm-boot.h"
#define MSM_SHARED_RAM_PHYS 0x40000000
/* Macros assume PMIC GPIOs start at 0 */
@@ -2210,6 +2210,10 @@
#endif
#ifdef CONFIG_IMX074
+static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
+ .mount_angle = 180
+};
+
static struct msm_camera_sensor_flash_data flash_imx074 = {
.flash_type = MSM_CAMERA_FLASH_LED,
.flash_src = &msm_flash_src
@@ -2226,7 +2230,7 @@
.num_resources = ARRAY_SIZE(msm_camera_resources),
.flash_data = &flash_imx074,
.strobe_flash_data = &strobe_flash_xenon,
- .sensor_platform_info = &sensor_board_info,
+ .sensor_platform_info = &imx074_sensor_board_info,
.csi_if = 1
};
struct platform_device msm_camera_sensor_imx074 = {
@@ -2809,21 +2813,21 @@
.name = "pmem_smi",
};
-void pmem_request_smi_region(void *data)
+void request_smi_region(void *data)
{
int bus_id = (int) data;
msm_bus_scale_client_update_request(bus_id, 1);
}
-void pmem_release_smi_region(void *data)
+void release_smi_region(void *data)
{
int bus_id = (int) data;
msm_bus_scale_client_update_request(bus_id, 0);
}
-void *pmem_setup_smi_region(void)
+void *setup_smi_region(void)
{
return (void *)msm_bus_scale_register_client(&smi_client_pdata);
}
@@ -2832,9 +2836,9 @@
.allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
.cached = 0,
.memory_type = MEMTYPE_SMI,
- .request_region = pmem_request_smi_region,
- .release_region = pmem_release_smi_region,
- .setup_region = pmem_setup_smi_region,
+ .request_region = request_smi_region,
+ .release_region = release_smi_region,
+ .setup_region = setup_smi_region,
.map_on_demand = 1,
};
static struct platform_device android_pmem_smipool_device = {
@@ -7559,7 +7563,7 @@
|| defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
|| defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
-/* 8x60 is having 5 SDCC controllers */
+/* 8x60 has 5 SDCC controllers */
#define MAX_SDCC_CONTROLLER 5
struct msm_sdcc_gpio {
@@ -7883,7 +7887,7 @@
unsigned int lpm_uA;
unsigned int hpm_uA;
};
-/* all SDCC controllers requires VDD/VCC voltage */
+/* all SDCC controllers require VDD/VCC voltage */
static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
/* only SDCC1 requires VCCQ voltage */
static struct sdcc_reg sdcc_vccq_reg_data[1];
@@ -7896,7 +7900,7 @@
struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
unsigned char sts; /* regulator enable/disable status */
};
-/* msm8x60 have 5 SDCC controllers */
+/* msm8x60 has 5 SDCC controllers */
static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
@@ -10321,6 +10325,7 @@
msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
msm_pm_data);
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_TZ, NULL));
#ifdef CONFIG_SENSORS_MSM_ADC
if (machine_is_msm8x60_fluid()) {
diff --git a/arch/arm/mach-msm/board-qrd7627a.c b/arch/arm/mach-msm/board-qrd7627a.c
index 5c11af3..e46da5b 100644
--- a/arch/arm/mach-msm/board-qrd7627a.c
+++ b/arch/arm/mach-msm/board-qrd7627a.c
@@ -64,10 +64,13 @@
GPIO_BT_SYS_REST_EN = 114,
GPIO_WAKE_ON_WIRELESS,
GPIO_BACKLIGHT_EN,
- GPIO_CAM_3MP_PWDN,
+ GPIO_NC,
+ GPIO_CAM_3MP_PWDN, /* CAM_VGA */
GPIO_WLAN_EN,
GPIO_CAM_5MP_SHDN_EN,
GPIO_CAM_5MP_RESET,
+ GPIO_TP,
+ GPIO_CAM_GP_CAMIF_RESET,
};
/* FM Platform power and shutdown routines */
@@ -1872,6 +1875,334 @@
.dev.platform_data = &msm_psy_batt_data,
};
+#ifdef CONFIG_MSM_CAMERA
+static uint32_t camera_off_gpio_table[] = {
+ GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+};
+
+static uint32_t camera_on_gpio_table[] = {
+ GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+};
+
+static void qrd1_camera_gpio_cfg(void)
+{
+
+ int rc = 0;
+
+ rc = gpio_request(GPIO_CAM_5MP_SHDN_EN, "ov5640");
+ if (rc < 0)
+ pr_err("%s: gpio_request---GPIO_CAM_5MP_SHDN_EN failed!",
+ __func__);
+
+
+ rc = gpio_tlmm_config(GPIO_CFG(GPIO_CAM_5MP_SHDN_EN, 0,
+ GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_2MA), GPIO_CFG_ENABLE);
+ if (rc < 0) {
+ pr_err("%s: unable to enable Power Down gpio for main"
+ "camera!\n", __func__);
+ gpio_free(GPIO_CAM_5MP_SHDN_EN);
+ }
+
+
+ rc = gpio_request(GPIO_CAM_5MP_RESET, "ov5640");
+ if (rc < 0) {
+ pr_err("%s: gpio_request---GPIO_CAM_5MP_RESET failed!",
+ __func__);
+ gpio_free(GPIO_CAM_5MP_SHDN_EN);
+ }
+
+
+ rc = gpio_tlmm_config(GPIO_CFG(GPIO_CAM_5MP_RESET, 0,
+ GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_2MA), GPIO_CFG_ENABLE);
+ if (rc < 0) {
+ pr_err("%s: unable to enable reset gpio for main camera!\n",
+ __func__);
+ gpio_free(GPIO_CAM_5MP_RESET);
+ }
+
+ rc = gpio_request(GPIO_CAM_3MP_PWDN, "ov7692");
+ if (rc < 0)
+ pr_err("%s: gpio_request---GPIO_CAM_3MP_PWDN failed!",
+ __func__);
+
+ rc = gpio_tlmm_config(GPIO_CFG(GPIO_CAM_3MP_PWDN, 0,
+ GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_2MA), GPIO_CFG_ENABLE);
+ if (rc < 0) {
+ pr_err("%s: unable to enable Power Down gpio for front"
+ "camera!\n", __func__);
+ gpio_free(GPIO_CAM_3MP_PWDN);
+ }
+
+ gpio_direction_output(GPIO_CAM_5MP_SHDN_EN, 1);
+ gpio_direction_output(GPIO_CAM_5MP_RESET, 1);
+ gpio_direction_output(GPIO_CAM_3MP_PWDN, 1);
+}
+
+#endif
+static struct vreg *vreg_gp1;
+static struct vreg *vreg_gp2;
+static struct vreg *vreg_gp3;
+static void msm_camera_vreg_config(int vreg_en)
+{
+ int rc;
+
+ if (vreg_gp1 == NULL) {
+ vreg_gp1 = vreg_get(NULL, "msme1");
+ if (IS_ERR(vreg_gp1)) {
+ pr_err("%s: vreg_get(%s) failed (%ld)\n",
+ __func__, "msme1", PTR_ERR(vreg_gp1));
+ return;
+ }
+
+ rc = vreg_set_level(vreg_gp1, 1800);
+ if (rc) {
+ pr_err("%s: GP1 set_level failed (%d)\n",
+ __func__, rc);
+ return;
+ }
+ }
+
+ if (vreg_gp2 == NULL) {
+ vreg_gp2 = vreg_get(NULL, "gp2");
+ if (IS_ERR(vreg_gp2)) {
+ pr_err("%s: vreg_get(%s) failed (%ld)\n",
+ __func__, "gp2", PTR_ERR(vreg_gp2));
+ return;
+ }
+
+ rc = vreg_set_level(vreg_gp2, 2850);
+ if (rc) {
+ pr_err("%s: GP2 set_level failed (%d)\n",
+ __func__, rc);
+ }
+ }
+
+ if (vreg_gp3 == NULL) {
+ vreg_gp3 = vreg_get(NULL, "usb2");
+ if (IS_ERR(vreg_gp3)) {
+ pr_err("%s: vreg_get(%s) failed (%ld)\n",
+ __func__, "gp3", PTR_ERR(vreg_gp3));
+ return;
+ }
+
+ rc = vreg_set_level(vreg_gp3, 1800);
+ if (rc) {
+ pr_err("%s: GP3 set level failed (%d)\n",
+ __func__, rc);
+ }
+ }
+
+ if (vreg_en) {
+ rc = vreg_enable(vreg_gp1);
+ if (rc) {
+ pr_err("%s: GP1 enable failed (%d)\n",
+ __func__, rc);
+ return;
+ }
+
+ rc = vreg_enable(vreg_gp2);
+ if (rc) {
+ pr_err("%s: GP2 enable failed (%d)\n",
+ __func__, rc);
+ }
+
+ rc = vreg_enable(vreg_gp3);
+ if (rc) {
+ pr_err("%s: GP3 enable failed (%d)\n",
+ __func__, rc);
+ }
+ } else {
+ rc = vreg_disable(vreg_gp1);
+ if (rc)
+ pr_err("%s: GP1 disable failed (%d)\n",
+ __func__, rc);
+
+ rc = vreg_disable(vreg_gp2);
+ if (rc) {
+ pr_err("%s: GP2 disable failed (%d)\n",
+ __func__, rc);
+ }
+
+ rc = vreg_disable(vreg_gp3);
+ if (rc) {
+ pr_err("%s: GP3 disable failed (%d)\n",
+ __func__, rc);
+ }
+ }
+}
+
+static int config_gpio_table(uint32_t *table, int len)
+{
+ int rc = 0, i = 0;
+
+ for (i = 0; i < len; i++) {
+ rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
+ if (rc) {
+ pr_err("%s not able to get gpio\n", __func__);
+ for (i--; i >= 0; i--)
+ gpio_tlmm_config(camera_off_gpio_table[i],
+ GPIO_CFG_ENABLE);
+ break;
+ }
+ }
+ return rc;
+}
+
+static int config_camera_on_gpios_rear(void)
+{
+ int rc = 0;
+
+ msm_camera_vreg_config(1);
+
+ rc = config_gpio_table(camera_on_gpio_table,
+ ARRAY_SIZE(camera_on_gpio_table));
+ if (rc < 0) {
+ pr_err("%s: CAMSENSOR gpio table request"
+ "failed\n", __func__);
+ return rc;
+ }
+
+ return rc;
+}
+
+static void config_camera_off_gpios_rear(void)
+{
+ msm_camera_vreg_config(0);
+ config_gpio_table(camera_off_gpio_table,
+ ARRAY_SIZE(camera_off_gpio_table));
+}
+
+static int config_camera_on_gpios_front(void)
+{
+ int rc = 0;
+
+ msm_camera_vreg_config(1);
+
+ rc = config_gpio_table(camera_on_gpio_table,
+ ARRAY_SIZE(camera_on_gpio_table));
+ if (rc < 0) {
+ pr_err("%s: CAMSENSOR gpio table request"
+ "failed\n", __func__);
+ return rc;
+ }
+
+ return rc;
+}
+
+static void config_camera_off_gpios_front(void)
+{
+ msm_camera_vreg_config(0);
+
+ config_gpio_table(camera_off_gpio_table,
+ ARRAY_SIZE(camera_off_gpio_table));
+}
+
+struct msm_camera_device_platform_data msm_camera_data_rear = {
+ .camera_gpio_on = config_camera_on_gpios_rear,
+ .camera_gpio_off = config_camera_off_gpios_rear,
+ .ioext.csiphy = 0xA1000000,
+ .ioext.csisz = 0x00100000,
+ .ioext.csiirq = INT_CSI_IRQ_1,
+ .ioclk.mclk_clk_rate = 24000000,
+ .ioclk.vfe_clk_rate = 192000000,
+ .ioext.appphy = MSM_CLK_CTL_PHYS,
+ .ioext.appsz = MSM_CLK_CTL_SIZE,
+};
+
+struct msm_camera_device_platform_data msm_camera_data_front = {
+ .camera_gpio_on = config_camera_on_gpios_front,
+ .camera_gpio_off = config_camera_off_gpios_front,
+ .ioext.csiphy = 0xA0F00000,
+ .ioext.csisz = 0x00100000,
+ .ioext.csiirq = INT_CSI_IRQ_0,
+ .ioclk.mclk_clk_rate = 24000000,
+ .ioclk.vfe_clk_rate = 192000000,
+ .ioext.appphy = MSM_CLK_CTL_PHYS,
+ .ioext.appsz = MSM_CLK_CTL_SIZE,
+};
+
+#ifdef CONFIG_OV5640
+static struct msm_camera_sensor_platform_info ov5640_sensor_info = {
+ .mount_angle = 90
+};
+
+static struct msm_camera_sensor_flash_src msm_flash_src_ov5640 = {
+ .flash_sr_type = MSM_CAMERA_FLASH_SRC_LED,
+ ._fsrc.led_src.led_name = "flashlight",
+ ._fsrc.led_src.led_name_len = 10,
+};
+
+static struct msm_camera_sensor_flash_data flash_ov5640 = {
+ .flash_type = MSM_CAMERA_FLASH_LED,
+ .flash_src = &msm_flash_src_ov5640,
+};
+
+static struct msm_camera_sensor_info msm_camera_sensor_ov5640_data = {
+ .sensor_name = "ov5640",
+ .sensor_reset_enable = 1,
+ .sensor_reset = GPIO_CAM_5MP_RESET,
+ .sensor_pwd = GPIO_CAM_5MP_SHDN_EN,
+ .vcm_pwd = 0,
+ .vcm_enable = 0,
+ .pdata = &msm_camera_data_rear,
+ .flash_data = &flash_ov5640,
+ .sensor_platform_info = &ov5640_sensor_info,
+ .csi_if = 1,
+};
+
+static struct platform_device msm_camera_sensor_ov5640 = {
+ .name = "msm_camera_ov5640",
+ .dev = {
+ .platform_data = &msm_camera_sensor_ov5640_data,
+ },
+};
+#endif
+
+#ifdef CONFIG_WEBCAM_OV7692_QRD
+static struct msm_camera_sensor_platform_info ov7692_sensor_7627a_info = {
+ .mount_angle = 90
+};
+
+static struct msm_camera_sensor_flash_data flash_ov7692 = {
+ .flash_type = MSM_CAMERA_FLASH_NONE,
+};
+
+static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
+ .sensor_name = "ov7692",
+ .sensor_reset_enable = 0,
+ .sensor_reset = 0,
+ .sensor_pwd = GPIO_CAM_3MP_PWDN,
+ .vcm_pwd = 0,
+ .vcm_enable = 0,
+ .pdata = &msm_camera_data_front,
+ .flash_data = &flash_ov7692,
+ .sensor_platform_info = &ov7692_sensor_7627a_info,
+ .csi_if = 1,
+};
+
+static struct platform_device msm_camera_sensor_ov7692 = {
+ .name = "msm_camera_ov7692",
+ .dev = {
+ .platform_data = &msm_camera_sensor_ov7692_data,
+ },
+};
+#endif
+
+static struct i2c_board_info i2c_camera_devices[] = {
+ #ifdef CONFIG_OV5640
+ {
+ I2C_BOARD_INFO("ov5640", 0x78 >> 1),
+ },
+ #endif
+ #ifdef CONFIG_WEBCAM_OV7692_QRD
+ {
+ I2C_BOARD_INFO("ov7692", 0x78),
+ },
+ #endif
+};
static struct platform_device *qrd1_devices[] __initdata = {
&msm_device_dmov,
&msm_device_smd,
@@ -1889,6 +2220,12 @@
&msm_device_snd,
&msm_device_adspdec,
&msm_batt_device,
+#ifdef CONFIG_OV5640
+ &msm_camera_sensor_ov5640,
+#endif
+#ifdef CONFIG_WEBCAM_OV7692_QRD
+ &msm_camera_sensor_ov7692,
+#endif
&msm_kgsl_3d0,
#ifdef CONFIG_BT
&msm_bt_power_device,
@@ -2166,6 +2503,7 @@
msm_device_i2c_init();
msm7627a_init_mmc();
+ qrd1_camera_gpio_cfg();
#ifdef CONFIG_SERIAL_MSM_HS
msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
@@ -2177,9 +2515,9 @@
msm_device_otg.dev.platform_data = &msm_otg_pdata;
#endif
msm_device_gadget_peripheral.dev.platform_data =
- &msm_gadget_pdata;
+ &msm_gadget_pdata;
platform_add_devices(qrd1_devices,
- ARRAY_SIZE(qrd1_devices));
+ ARRAY_SIZE(qrd1_devices));
#ifdef CONFIG_USB_EHCI_MSM_72K
msm7627a_init_host();
#endif
@@ -2189,18 +2527,20 @@
#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
- bahama_devices,
- ARRAY_SIZE(bahama_devices));
+ bahama_devices,
+ ARRAY_SIZE(bahama_devices));
bt_power_init();
#endif
+ i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID, i2c_camera_devices,
+ ARRAY_SIZE(i2c_camera_devices));
+
#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C) || \
defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C_MODULE)
i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
synaptic_i2c_clearpad3k,
ARRAY_SIZE(synaptic_i2c_clearpad3k));
#endif
-
platform_device_register(&hs_pdev);
#ifdef CONFIG_MSM_RPC_VIBRATOR
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index b7f6608..0dcd0f4 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -55,6 +55,7 @@
#include "msm-keypad-devices.h"
#include "acpuclock.h"
#include "pm.h"
+#include "pm-boot.h"
#include "proc_comm.h"
#ifdef CONFIG_USB_ANDROID
#include <linux/usb/android_composite.h>
@@ -2436,6 +2437,8 @@
spi_register_board_info(msm_spi_board_info,
ARRAY_SIZE(msm_spi_board_info));
msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_RESET_VECTOR,
+ (uint32_t *)PAGE_OFFSET));
#ifdef CONFIG_SURF_FFA_GPIO_KEYPAD
if (machine_is_qsd8x50_ffa())
diff --git a/arch/arm/mach-msm/clock-7x30.c b/arch/arm/mach-msm/clock-7x30.c
index 73020dc..5df1700 100644
--- a/arch/arm/mach-msm/clock-7x30.c
+++ b/arch/arm/mach-msm/clock-7x30.c
@@ -68,7 +68,6 @@
#define MI2S_NS_REG REG(0x02E0)
#define MI2S_RX_NS_REG REG(0x0070)
#define MI2S_TX_NS_REG REG(0x0078)
-#define MIDI_NS_REG REG(0x02D0)
#define PLL_ENA_REG REG(0x0264)
#define PMDH_NS_REG REG(0x008C)
#define SDAC_NS_REG REG(0x009C)
@@ -1693,34 +1692,6 @@
},
};
-static struct clk_freq_tbl clk_tbl_midi[] = {
- F_MND8( 0, 0, 0, gnd, 1, 0, 0),
- F_MND8(98304000, 19, 12, pll3, 3, 2, 5),
- F_END,
-};
-
-static struct rcg_clk midi_clk = {
- .b = {
- .ctl_reg = MIDI_NS_REG,
- .en_mask = BIT(9),
- .halt_reg = CLK_HALT_STATEC_REG,
- .halt_bit = 1,
- },
- .ns_reg = MIDI_NS_REG,
- .md_reg = MIDI_NS_REG - 4,
- .ns_mask = F_MASK_MND8(19, 12),
- .root_en_mask = BIT(11),
- .freq_tbl = clk_tbl_midi,
- .current_freq = &rcg_dummy_freq,
- .set_rate = set_rate_mnd,
- .c = {
- .dbg_name = "midi_clk",
- .ops = &clk_ops_rcg_7x30,
- VDD_DIG_FMAX_MAP1(NOMINAL, 98304000),
- CLK_INIT(midi_clk.c),
- },
-};
-
#define F_SDAC(f, s, div, m, n) \
{ \
.freq_hz = f, \
@@ -2454,7 +2425,6 @@
{ CLK_TEST_2(0x07), &lpa_p_clk.c },
{ CLK_TEST_2(0x08), &usb_hs2_p_clk.c },
{ CLK_TEST_2(0x09), &spi_clk.c },
- { CLK_TEST_2(0x0A), &midi_clk.c },
{ CLK_TEST_2(0x0B), &i2c_2_clk.c },
{ CLK_TEST_2(0x0D), &mi2s_m_clk.c },
{ CLK_TEST_2(0x0E), &lpa_core_clk.c },
@@ -2819,8 +2789,6 @@
OWN(APPS1, 12, "mi2s_codec_rx_s_clk", mi2s_codec_rx_s_clk, NULL),
OWN(APPS1, 14, "mi2s_codec_tx_m_clk", mi2s_codec_tx_m_clk, NULL),
OWN(APPS1, 14, "mi2s_codec_tx_s_clk", mi2s_codec_tx_s_clk, NULL),
- { CLK_LOOKUP("midi_clk", midi_clk.c, NULL),
- O(APPS1), BIT(22) },
OWN(APPS1, 26, "sdac_clk", sdac_clk, NULL),
OWN(APPS1, 26, "sdac_m_clk", sdac_m_clk, NULL),
OWN(APPS1, 8, "vfe_clk", vfe_clk, NULL),
@@ -2905,10 +2873,10 @@
O(GLBL), BIT(13), &dummy_clk },
OWN(GLBL, 8, "core_clk", ce_clk, "qce.0"),
OWN(GLBL, 8, "core_clk", ce_clk, "crypto.0"),
- OWN(GLBL, 13, "rotator_clk", axi_rotator_clk, NULL),
+ OWN(GLBL, 13, "core_clk", axi_rotator_clk, "msm_rotator.0"),
OWN(GLBL, 13, "core_clk", axi_rotator_clk, "footswitch-pcom.6"),
- OWN(GLBL, 13, "rotator_imem_clk", rotator_imem_clk, NULL),
- OWN(GLBL, 13, "rotator_pclk", rotator_p_clk, NULL),
+ OWN(GLBL, 13, "mem_clk", rotator_imem_clk, "msm_rotator.0"),
+ OWN(GLBL, 13, "iface_clk", rotator_p_clk, "msm_rotator.0"),
OWN(GLBL, 13, "iface_clk", rotator_p_clk, "footswitch-pcom.6"),
{ CLK_LOOKUP("iface_clk", uart1dm_p_clk.c, "msm_serial_hs.0"),
O(GLBL), BIT(8), &dummy_clk },
@@ -3008,7 +2976,6 @@
clk_set_rate(&uart1_clk.c, 19200000);
clk_set_rate(&uart2_clk.c, 19200000);
clk_set_rate(&mi2s_m_clk.c, 12288000);
- clk_set_rate(&midi_clk.c, 98304000);
clk_set_rate(&mdp_vsync_clk.c, 24576000);
clk_set_rate(&glbl_root_clk.c, 1);
clk_set_rate(&mdc_clk.c, 1);
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 615a6b5..a0c6878 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -2716,6 +2716,7 @@
}
static struct clk_freq_tbl clk_tbl_csi[] = {
F_CSI( 0, gnd, 1, 0, 0),
+ F_CSI( 27000000, pxo, 1, 0, 0),
F_CSI( 85330000, pll8, 1, 2, 9),
F_CSI(177780000, pll2, 1, 2, 9),
F_END
@@ -2886,37 +2887,166 @@
},
};
-/*
- * The csi pix and csi rdi clocks have two bits in two registers to control a
- * three input mux. So we have the generic rcg_clk_enable() path handle the
- * first bit, and this function handle the second bit.
- */
-static void set_rate_pix_rdi(struct rcg_clk *clk, struct clk_freq_tbl *nf)
-{
- u32 reg = readl_relaxed(MISC_CC3_REG);
- u32 bit = (u32)nf->extra_freq_data;
- if (nf->freq_hz == 2)
- reg |= bit;
- else
- reg &= ~bit;
- writel_relaxed(reg, MISC_CC3_REG);
-}
-
-#define F_CSI_PIX(s) \
- { \
- .src_clk = &csi##s##_clk.c, \
- .freq_hz = s, \
- .ns_val = BVAL(25, 25, s), \
- .extra_freq_data = (void *)BIT(13), \
- }
-static struct clk_freq_tbl clk_tbl_csi_pix[] = {
- F_CSI_PIX(0), /* CSI0 source */
- F_CSI_PIX(1), /* CSI1 source */
- F_CSI_PIX(2), /* CSI2 source */
- F_END
+static struct clk *pix_rdi_mux_map[] = {
+ [0] = &csi0_clk.c,
+ [1] = &csi1_clk.c,
+ [2] = &csi2_clk.c,
+ NULL,
};
-static struct rcg_clk csi_pix_clk = {
+struct pix_rdi_clk {
+ bool enabled;
+ unsigned cur_rate;
+
+ void __iomem *const s_reg;
+ u32 s_mask;
+
+ void __iomem *const s2_reg;
+ u32 s2_mask;
+
+ struct branch b;
+ struct clk c;
+};
+
+static inline struct pix_rdi_clk *to_pix_rdi_clk(struct clk *clk)
+{
+ return container_of(clk, struct pix_rdi_clk, c);
+}
+
+static int pix_rdi_clk_set_rate(struct clk *c, unsigned rate)
+{
+ int ret, i;
+ u32 reg;
+ unsigned long flags;
+ struct pix_rdi_clk *clk = to_pix_rdi_clk(c);
+ struct clk **mux_map = pix_rdi_mux_map;
+
+ /*
+ * These clocks select three inputs via two muxes. One mux selects
+ * between csi0 and csi1 and the second mux selects between that mux's
+ * output and csi2. The source and destination selections for each
+ * mux must be clocking for the switch to succeed so just turn on
+ * all three sources because it's easier than figuring out what source
+ * needs to be on at what time.
+ */
+ for (i = 0; mux_map[i]; i++) {
+ ret = clk_enable(mux_map[i]);
+ if (ret)
+ goto err;
+ }
+ if (rate >= i) {
+ ret = -EINVAL;
+ goto err;
+ }
+ /* Keep the new source on when switching inputs of an enabled clock */
+ if (clk->enabled) {
+ clk_disable(mux_map[clk->cur_rate]);
+ clk_enable(mux_map[rate]);
+ }
+ spin_lock_irqsave(&local_clock_reg_lock, flags);
+ reg = readl_relaxed(clk->s2_reg);
+ reg &= ~clk->s2_mask;
+ reg |= rate == 2 ? clk->s2_mask : 0;
+ writel_relaxed(reg, clk->s2_reg);
+ /*
+ * Wait at least 6 cycles of slowest clock
+ * for the glitch-free MUX to fully switch sources.
+ */
+ mb();
+ udelay(1);
+ reg = readl_relaxed(clk->s_reg);
+ reg &= ~clk->s_mask;
+ reg |= rate == 1 ? clk->s_mask : 0;
+ writel_relaxed(reg, clk->s_reg);
+ /*
+ * Wait at least 6 cycles of slowest clock
+ * for the glitch-free MUX to fully switch sources.
+ */
+ mb();
+ udelay(1);
+ clk->cur_rate = rate;
+ spin_unlock_irqrestore(&local_clock_reg_lock, flags);
+err:
+ for (i--; i >= 0; i--)
+ clk_disable(mux_map[i]);
+
+ return 0;
+}
+
+static unsigned pix_rdi_clk_get_rate(struct clk *c)
+{
+ return to_pix_rdi_clk(c)->cur_rate;
+}
+
+static int pix_rdi_clk_enable(struct clk *c)
+{
+ unsigned long flags;
+ struct pix_rdi_clk *clk = to_pix_rdi_clk(c);
+
+ spin_lock_irqsave(&local_clock_reg_lock, flags);
+ __branch_clk_enable_reg(&clk->b, clk->c.dbg_name);
+ spin_unlock_irqrestore(&local_clock_reg_lock, flags);
+ clk->enabled = true;
+
+ return 0;
+}
+
+static void pix_rdi_clk_disable(struct clk *c)
+{
+ unsigned long flags;
+ struct pix_rdi_clk *clk = to_pix_rdi_clk(c);
+
+ spin_lock_irqsave(&local_clock_reg_lock, flags);
+ __branch_clk_disable_reg(&clk->b, clk->c.dbg_name);
+ spin_unlock_irqrestore(&local_clock_reg_lock, flags);
+ clk->enabled = false;
+}
+
+static int pix_rdi_clk_reset(struct clk *clk, enum clk_reset_action action)
+{
+ return branch_reset(&to_pix_rdi_clk(clk)->b, action);
+}
+
+static struct clk *pix_rdi_clk_get_parent(struct clk *c)
+{
+ struct pix_rdi_clk *clk = to_pix_rdi_clk(c);
+
+ return pix_rdi_mux_map[clk->cur_rate];
+}
+
+static int pix_rdi_clk_list_rate(struct clk *c, unsigned n)
+{
+ if (pix_rdi_mux_map[n])
+ return n;
+ return -ENXIO;
+}
+
+static int pix_rdi_clk_handoff(struct clk *c)
+{
+ u32 reg;
+ struct pix_rdi_clk *clk = to_pix_rdi_clk(c);
+
+ reg = readl_relaxed(clk->s_reg);
+ clk->cur_rate = reg & clk->s_mask ? 1 : 0;
+ reg = readl_relaxed(clk->s2_reg);
+ clk->cur_rate = reg & clk->s2_mask ? 2 : clk->cur_rate;
+ return 0;
+}
+
+static struct clk_ops clk_ops_pix_rdi_8960 = {
+ .enable = pix_rdi_clk_enable,
+ .disable = pix_rdi_clk_disable,
+ .auto_off = pix_rdi_clk_disable,
+ .handoff = pix_rdi_clk_handoff,
+ .set_rate = pix_rdi_clk_set_rate,
+ .get_rate = pix_rdi_clk_get_rate,
+ .list_rate = pix_rdi_clk_list_rate,
+ .reset = pix_rdi_clk_reset,
+ .is_local = local_clk_is_local,
+ .get_parent = pix_rdi_clk_get_parent,
+};
+
+static struct pix_rdi_clk csi_pix_clk = {
.b = {
.ctl_reg = MISC_CC_REG,
.en_mask = BIT(26),
@@ -2924,32 +3054,18 @@
.reset_reg = SW_RESET_CORE_REG,
.reset_mask = BIT(26),
},
- .ns_reg = MISC_CC_REG,
- .ns_mask = BIT(25),
- .set_rate = set_rate_pix_rdi,
- .freq_tbl = clk_tbl_csi_pix,
- .current_freq = &rcg_dummy_freq,
+ .s_reg = MISC_CC_REG,
+ .s_mask = BIT(25),
+ .s2_reg = MISC_CC3_REG,
+ .s2_mask = BIT(13),
.c = {
.dbg_name = "csi_pix_clk",
- .ops = &clk_ops_rcg_8960,
+ .ops = &clk_ops_pix_rdi_8960,
CLK_INIT(csi_pix_clk.c),
},
};
-#define F_CSI_PIX1(s) \
- { \
- .src_clk = &csi##s##_clk.c, \
- .freq_hz = s, \
- .ns_val = BVAL(9, 8, s), \
- }
-static struct clk_freq_tbl clk_tbl_csi_pix1[] = {
- F_CSI_PIX1(0), /* CSI0 source */
- F_CSI_PIX1(1), /* CSI1 source */
- F_CSI_PIX1(2), /* CSI2 source */
- F_END
-};
-
-static struct rcg_clk csi_pix1_clk = {
+static struct pix_rdi_clk csi_pix1_clk = {
.b = {
.ctl_reg = MISC_CC3_REG,
.en_mask = BIT(10),
@@ -2957,33 +3073,18 @@
.reset_reg = SW_RESET_CORE_REG,
.reset_mask = BIT(30),
},
- .ns_reg = MISC_CC3_REG,
- .ns_mask = BM(9, 8),
- .set_rate = set_rate_nop,
- .freq_tbl = clk_tbl_csi_pix1,
- .current_freq = &rcg_dummy_freq,
+ .s_reg = MISC_CC3_REG,
+ .s_mask = BIT(8),
+ .s2_reg = MISC_CC3_REG,
+ .s2_mask = BIT(9),
.c = {
.dbg_name = "csi_pix1_clk",
- .ops = &clk_ops_rcg_8960,
+ .ops = &clk_ops_pix_rdi_8960,
CLK_INIT(csi_pix1_clk.c),
},
};
-#define F_CSI_RDI(s) \
- { \
- .src_clk = &csi##s##_clk.c, \
- .freq_hz = s, \
- .ns_val = BVAL(12, 12, s), \
- .extra_freq_data = (void *)BIT(12), \
- }
-static struct clk_freq_tbl clk_tbl_csi_rdi[] = {
- F_CSI_RDI(0), /* CSI0 source */
- F_CSI_RDI(1), /* CSI1 source */
- F_CSI_RDI(2), /* CSI2 source */
- F_END
-};
-
-static struct rcg_clk csi_rdi_clk = {
+static struct pix_rdi_clk csi_rdi_clk = {
.b = {
.ctl_reg = MISC_CC_REG,
.en_mask = BIT(13),
@@ -2991,32 +3092,18 @@
.reset_reg = SW_RESET_CORE_REG,
.reset_mask = BIT(27),
},
- .ns_reg = MISC_CC_REG,
- .ns_mask = BIT(12),
- .set_rate = set_rate_pix_rdi,
- .freq_tbl = clk_tbl_csi_rdi,
- .current_freq = &rcg_dummy_freq,
+ .s_reg = MISC_CC_REG,
+ .s_mask = BIT(12),
+ .s2_reg = MISC_CC3_REG,
+ .s2_mask = BIT(12),
.c = {
.dbg_name = "csi_rdi_clk",
- .ops = &clk_ops_rcg_8960,
+ .ops = &clk_ops_pix_rdi_8960,
CLK_INIT(csi_rdi_clk.c),
},
};
-#define F_CSI_RDI1(s) \
- { \
- .src_clk = &csi##s##_clk.c, \
- .freq_hz = s, \
- .ns_val = BVAL(1, 0, s), \
- }
-static struct clk_freq_tbl clk_tbl_csi_rdi1[] = {
- F_CSI_RDI1(0), /* CSI0 source */
- F_CSI_RDI1(1), /* CSI1 source */
- F_CSI_RDI1(2), /* CSI2 source */
- F_END
-};
-
-static struct rcg_clk csi_rdi1_clk = {
+static struct pix_rdi_clk csi_rdi1_clk = {
.b = {
.ctl_reg = MISC_CC3_REG,
.en_mask = BIT(2),
@@ -3024,32 +3111,18 @@
.reset_reg = SW_RESET_CORE2_REG,
.reset_mask = BIT(1),
},
- .ns_reg = MISC_CC3_REG,
- .ns_mask = BM(1, 0),
- .set_rate = set_rate_nop,
- .freq_tbl = clk_tbl_csi_rdi1,
- .current_freq = &rcg_dummy_freq,
+ .s_reg = MISC_CC3_REG,
+ .s_mask = BIT(0),
+ .s2_reg = MISC_CC3_REG,
+ .s2_mask = BIT(1),
.c = {
.dbg_name = "csi_rdi1_clk",
- .ops = &clk_ops_rcg_8960,
+ .ops = &clk_ops_pix_rdi_8960,
CLK_INIT(csi_rdi1_clk.c),
},
};
-#define F_CSI_RDI2(s) \
- { \
- .src_clk = &csi##s##_clk.c, \
- .freq_hz = s, \
- .ns_val = BVAL(5, 4, s), \
- }
-static struct clk_freq_tbl clk_tbl_csi_rdi2[] = {
- F_CSI_RDI2(0), /* CSI0 source */
- F_CSI_RDI2(1), /* CSI1 source */
- F_CSI_RDI2(2), /* CSI2 source */
- F_END
-};
-
-static struct rcg_clk csi_rdi2_clk = {
+static struct pix_rdi_clk csi_rdi2_clk = {
.b = {
.ctl_reg = MISC_CC3_REG,
.en_mask = BIT(6),
@@ -3057,14 +3130,13 @@
.reset_reg = SW_RESET_CORE2_REG,
.reset_mask = BIT(0),
},
- .ns_reg = MISC_CC3_REG,
- .ns_mask = BM(5, 4),
- .set_rate = set_rate_nop,
- .freq_tbl = clk_tbl_csi_rdi2,
- .current_freq = &rcg_dummy_freq,
+ .s_reg = MISC_CC3_REG,
+ .s_mask = BIT(4),
+ .s2_reg = MISC_CC3_REG,
+ .s2_mask = BIT(5),
.c = {
.dbg_name = "csi_rdi2_clk",
- .ops = &clk_ops_rcg_8960,
+ .ops = &clk_ops_pix_rdi_8960,
CLK_INIT(csi_rdi2_clk.c),
},
};
@@ -3420,7 +3492,6 @@
[VDD_DIG_HIGH] = 400000000
};
-/* TODO: need to add 325MHz back once it is fixed in the simulation model */
static struct clk_freq_tbl clk_tbl_gfx3d_8064[] = {
F_GFX3D( 0, gnd, 0, 0),
F_GFX3D( 27000000, pxo, 0, 0),
@@ -3436,6 +3507,7 @@
F_GFX3D(200000000, pll2, 1, 4),
F_GFX3D(228571000, pll2, 2, 7),
F_GFX3D(266667000, pll2, 1, 3),
+ F_GFX3D(325000000, pll15, 1, 3),
F_GFX3D(400000000, pll2, 1, 2),
F_END
};
@@ -4534,6 +4606,7 @@
static DEFINE_CLK_VOTER(dfab_sdc4_clk, &dfab_clk.c);
static DEFINE_CLK_VOTER(dfab_sdc5_clk, &dfab_clk.c);
static DEFINE_CLK_VOTER(dfab_sps_clk, &dfab_clk.c);
+static DEFINE_CLK_VOTER(dfab_bam_dmux_clk, &dfab_clk.c);
static DEFINE_CLK_VOTER(ebi1_msmbus_clk, &ebi1_clk.c);
/*
@@ -5023,23 +5096,23 @@
CLK_LOOKUP("cam_clk", cam0_clk.c, NULL),
CLK_LOOKUP("cam_clk", cam0_clk.c, NULL),
CLK_LOOKUP("cam_clk", cam0_clk.c, NULL),
- CLK_DUMMY("csi_src_clk", CSI0_SRC_CLK, NULL, OFF),
+ CLK_LOOKUP("csi_src_clk", csi0_src_clk.c, NULL),
CLK_LOOKUP("csi_src_clk", csi1_src_clk.c, NULL),
CLK_LOOKUP("csi_src_clk", csi1_src_clk.c, NULL),
CLK_LOOKUP("csi_src_clk", csi2_src_clk.c, NULL),
- CLK_DUMMY("csi_clk", CSI0_CLK, NULL, OFF),
+ CLK_LOOKUP("csi_clk", csi0_clk.c, NULL),
CLK_LOOKUP("csi_clk", csi1_clk.c, NULL),
CLK_LOOKUP("csi_clk", csi1_clk.c, NULL),
CLK_LOOKUP("csi_clk", csi2_clk.c, NULL),
- CLK_DUMMY("csi_phy_clk", CSI0_PHY_CLK, NULL, OFF),
+ CLK_LOOKUP("csi_phy_clk", csi0_phy_clk.c, NULL),
CLK_LOOKUP("csi_phy_clk", csi1_phy_clk.c, NULL),
CLK_LOOKUP("csi_phy_clk", csi1_phy_clk.c, NULL),
CLK_LOOKUP("csi_phy_clk", csi2_phy_clk.c, NULL),
- CLK_DUMMY("csi_pix_clk", CSI_PIX_CLK, NULL, OFF),
- CLK_DUMMY("csi_rdi_clk", CSI_RDI_CLK, NULL, OFF),
- CLK_DUMMY("csi_pix_clk", CSI_PIX1_CLK, NULL, OFF),
- CLK_DUMMY("csi_rdi_clk", CSI_RDI1_CLK, NULL, OFF),
- CLK_DUMMY("csi_rdi_clk", CSI_RDI2_CLK, NULL, OFF),
+ CLK_LOOKUP("csi_pix_clk", csi_pix_clk.c, NULL),
+ CLK_LOOKUP("csi_pix_clk", csi_pix1_clk.c, NULL),
+ CLK_LOOKUP("csi_rdi_clk", csi_rdi_clk.c, NULL),
+ CLK_LOOKUP("csi_rdi_clk", csi_rdi1_clk.c, NULL),
+ CLK_LOOKUP("csi_rdi_clk", csi_rdi2_clk.c, NULL),
CLK_LOOKUP("csiphy_timer_src_clk", csiphy_timer_src_clk.c, NULL),
CLK_LOOKUP("csiphy_timer_clk", csi0phy_timer_clk.c, NULL),
CLK_LOOKUP("csiphy_timer_clk", csi1phy_timer_clk.c, NULL),
@@ -5051,32 +5124,43 @@
CLK_DUMMY("rgb_tv_clk", RGB_TV_CLK, NULL, OFF),
CLK_DUMMY("npl_tv_clk", NPL_TV_CLK, NULL, OFF),
CLK_LOOKUP("core_clk", gfx3d_clk.c, NULL),
+ CLK_LOOKUP("core_clk", gfx3d_clk.c, "footswitch-8x60.2"),
+ CLK_LOOKUP("bus_clk", gfx3d_axi_clk.c, "footswitch-8x60.2"),
CLK_LOOKUP("iface_clk", vcap_p_clk.c, NULL),
- CLK_LOOKUP("bus_clk", vcap_axi_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", vcap_p_clk.c, "footswitch-8x60.10"),
+ CLK_LOOKUP("bus_clk", vcap_axi_clk.c, "footswitch-8x60.10"),
CLK_LOOKUP("core_clk", vcap_clk.c, NULL),
+ CLK_LOOKUP("core_clk", vcap_clk.c, "footswitch-8x60.10"),
CLK_LOOKUP("vcap_npl_clk", vcap_npl_clk.c, NULL),
- CLK_LOOKUP("bus_clk", ijpeg_axi_clk.c, NULL),
+ CLK_LOOKUP("bus_clk", ijpeg_axi_clk.c, "footswitch-8x60.3"),
CLK_LOOKUP("mem_clk", imem_axi_clk.c, NULL),
CLK_LOOKUP("ijpeg_clk", ijpeg_clk.c, NULL),
+ CLK_LOOKUP("core_clk", ijpeg_clk.c, "footswitch-8x60.3"),
CLK_LOOKUP("core_clk", jpegd_clk.c, NULL),
CLK_LOOKUP("mdp_clk", mdp_clk.c, NULL),
+ CLK_LOOKUP("core_clk", mdp_clk.c, "footswitch-8x60.4"),
CLK_LOOKUP("mdp_vsync_clk", mdp_vsync_clk.c, NULL),
CLK_LOOKUP("lut_mdp", lut_mdp_clk.c, NULL),
- CLK_LOOKUP("rot_clk", rot_clk.c, NULL),
+ CLK_LOOKUP("core_clk", rot_clk.c, "msm_rotator.0"),
+ CLK_LOOKUP("core_clk", rot_clk.c, "footswitch-8x60.6"),
CLK_DUMMY("tv_src_clk", TV_SRC_CLK, NULL, OFF),
CLK_LOOKUP("core_clk", vcodec_clk.c, NULL),
+ CLK_LOOKUP("core_clk", vcodec_clk.c, "footswitch-8x60.7"),
CLK_DUMMY("mdp_tv_clk", MDP_TV_CLK, NULL, OFF),
CLK_DUMMY("hdmi_clk", HDMI_TV_CLK, NULL, OFF),
CLK_LOOKUP("core_clk", hdmi_app_clk.c, NULL),
CLK_LOOKUP("vpe_clk", vpe_clk.c, NULL),
+ CLK_LOOKUP("core_clk", vpe_clk.c, "footswitch-8x60.9"),
CLK_LOOKUP("vfe_clk", vfe_clk.c, NULL),
+ CLK_LOOKUP("core_clk", vfe_clk.c, "footswitch-8x60.8"),
CLK_LOOKUP("csi_vfe_clk", csi_vfe_clk.c, NULL),
- CLK_LOOKUP("vfe_axi_clk", vfe_axi_clk.c, NULL),
- CLK_LOOKUP("mdp_axi_clk", mdp_axi_clk.c, NULL),
- CLK_LOOKUP("bus_clk", vcodec_axi_clk.c, NULL),
- CLK_LOOKUP("bus_a_clk", vcodec_axi_a_clk.c, NULL),
- CLK_LOOKUP("bus_b_clk", vcodec_axi_b_clk.c, NULL),
- CLK_LOOKUP("vpe_axi_clk", vpe_axi_clk.c, NULL),
+ CLK_LOOKUP("bus_clk", vfe_axi_clk.c, "footswitch-8x60.8"),
+ CLK_LOOKUP("bus_clk", mdp_axi_clk.c, "footswitch-8x60.4"),
+ CLK_LOOKUP("bus_clk", rot_axi_clk.c, "footswitch-8x60.6"),
+ CLK_LOOKUP("bus_clk", vcodec_axi_clk.c, "footswitch-8x60.7"),
+ CLK_LOOKUP("bus_a_clk", vcodec_axi_a_clk.c, "footswitch-8x60.7"),
+ CLK_LOOKUP("bus_b_clk", vcodec_axi_b_clk.c, "footswitch-8x60.7"),
+ CLK_LOOKUP("bus_clk", vpe_axi_clk.c, "footswitch-8x60.9"),
CLK_LOOKUP("amp_pclk", amp_p_clk.c, NULL),
CLK_LOOKUP("csi_pclk", csi_p_clk.c, NULL),
CLK_LOOKUP("dsi_m_pclk", dsi1_m_p_clk.c, NULL),
@@ -5084,17 +5168,24 @@
CLK_LOOKUP("dsi_m_pclk", dsi2_m_p_clk.c, NULL),
CLK_LOOKUP("dsi_s_pclk", dsi2_s_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", gfx3d_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", gfx3d_p_clk.c, "footswitch-8x60.2"),
CLK_LOOKUP("master_iface_clk", hdmi_m_p_clk.c, NULL),
CLK_LOOKUP("slave_iface_clk", hdmi_s_p_clk.c, NULL),
CLK_LOOKUP("ijpeg_pclk", ijpeg_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", ijpeg_p_clk.c, "footswitch-8x60.3"),
CLK_LOOKUP("iface_clk", jpegd_p_clk.c, NULL),
CLK_LOOKUP("mem_iface_clk", imem_p_clk.c, NULL),
CLK_LOOKUP("mdp_pclk", mdp_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", mdp_p_clk.c, "footswitch-8x60.4"),
CLK_LOOKUP("iface_clk", smmu_p_clk.c, NULL),
- CLK_LOOKUP("rotator_pclk", rot_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", rot_p_clk.c, "msm_rotator.0"),
+ CLK_LOOKUP("iface_clk", rot_p_clk.c, "footswitch-8x60.6"),
CLK_LOOKUP("iface_clk", vcodec_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", vcodec_p_clk.c, "footswitch-8x60.7"),
CLK_LOOKUP("vfe_pclk", vfe_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", vfe_p_clk.c, "footswitch-8x60.8"),
CLK_LOOKUP("vpe_pclk", vpe_p_clk.c, NULL),
+ CLK_LOOKUP("iface_pclk", vpe_p_clk.c, "footswitch-8x60.9"),
CLK_LOOKUP("mi2s_bit_clk", mi2s_bit_clk.c, NULL),
CLK_LOOKUP("mi2s_osr_clk", mi2s_osr_clk.c, NULL),
CLK_LOOKUP("i2s_mic_bit_clk", codec_i2s_mic_bit_clk.c, NULL),
@@ -5117,7 +5208,7 @@
CLK_LOOKUP("core_clk", vfe_axi_clk.c, NULL),
CLK_LOOKUP("core_clk", vcodec_axi_a_clk.c, NULL),
CLK_LOOKUP("core_clk", vcodec_axi_b_clk.c, NULL),
- CLK_DUMMY("core_clk", GFX3D_AXI_CLK, NULL, 0),
+ CLK_LOOKUP("core_clk", gfx3d_axi_clk.c, NULL),
CLK_DUMMY("dfab_dsps_clk", DFAB_DSPS_CLK, NULL, 0),
CLK_DUMMY("dfab_usb_hs_clk", DFAB_USB_HS_CLK, NULL, 0),
CLK_DUMMY("bus_clk", DFAB_SDC1_CLK, NULL, 0),
@@ -5132,7 +5223,7 @@
CLK_LOOKUP("usb_hsic_p_clk", usb_hsic_p_clk.c, NULL),
CLK_LOOKUP("ebi1_msmbus_clk", ebi1_msmbus_clk.c, NULL),
- CLK_LOOKUP("ebi1_clk", ebi1_adm_clk.c, "msm_dmov"),
+ CLK_LOOKUP("mem_clk", ebi1_adm_clk.c, "msm_dmov"),
CLK_LOOKUP("l2_mclk", l2_m_clk, NULL),
CLK_LOOKUP("krait0_mclk", krait0_m_clk, NULL),
@@ -5291,7 +5382,7 @@
CLK_LOOKUP("qdss_traceclkin_clk", qdss_traceclkin_clk.c, NULL),
CLK_LOOKUP("qdss_tsctr_clk", qdss_tsctr_clk.c, NULL),
CLK_LOOKUP("qdss_stm_clk", qdss_stm_clk.c, NULL),
- CLK_LOOKUP("rot_clk", rot_clk.c, NULL),
+ CLK_LOOKUP("core_clk", rot_clk.c, "msm_rotator.0"),
CLK_LOOKUP("core_clk", rot_clk.c, "footswitch-8x60.6"),
CLK_LOOKUP("tv_src_clk", tv_src_clk.c, NULL),
CLK_LOOKUP("tv_enc_clk", tv_enc_clk.c, NULL),
@@ -5334,7 +5425,7 @@
CLK_LOOKUP("mdp_pclk", mdp_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", mdp_p_clk.c, "footswitch-8x60.4"),
CLK_LOOKUP("iface_clk", smmu_p_clk.c, "msm_iommu"),
- CLK_LOOKUP("rotator_pclk", rot_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", rot_p_clk.c, "msm_rotator.0"),
CLK_LOOKUP("iface_clk", rot_p_clk.c, "footswitch-8x60.6"),
CLK_LOOKUP("tv_enc_pclk", tv_enc_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", vcodec_p_clk.c, "msm_vidc.0"),
@@ -5376,6 +5467,7 @@
CLK_LOOKUP("bus_clk", dfab_sdc4_clk.c, "msm_sdcc.4"),
CLK_LOOKUP("bus_clk", dfab_sdc5_clk.c, "msm_sdcc.5"),
CLK_LOOKUP("dfab_clk", dfab_sps_clk.c, "msm_sps"),
+ CLK_LOOKUP("bus_clk", dfab_bam_dmux_clk.c, "BAM_RMNT"),
CLK_LOOKUP("ebi1_msmbus_clk", ebi1_msmbus_clk.c, NULL),
CLK_LOOKUP("mem_clk", ebi1_adm_clk.c, "msm_dmov"),
@@ -5499,7 +5591,7 @@
rmwreg(0x80FF0000, VFE_CC_REG, 0xE0FF4010);
rmwreg(0x800000FF, VFE_CC2_REG, 0xE00000FF);
rmwreg(0x80FF0000, VPE_CC_REG, 0xE0FF0010);
- if (cpu_is_msm8960()) {
+ if (cpu_is_msm8960() || cpu_is_msm8930()) {
rmwreg(0x80FF0000, GFX2D0_CC_REG, 0xE0FF0010);
rmwreg(0x80FF0000, GFX2D1_CC_REG, 0xE0FF0010);
rmwreg(0x80FF0000, TV_CC_REG, 0xE1FFC010);
@@ -5544,7 +5636,7 @@
writel_relaxed(BIT(15), PDM_CLK_NS_REG);
/* Source SLIMBus xo src from slimbus reference clock */
- if (cpu_is_msm8960())
+ if (cpu_is_msm8960() || cpu_is_msm8930())
writel_relaxed(0x3, SLIMBUS_XO_SRC_CLK_CTL_REG);
/* Source the dsi_byte_clks from the DSI PHY PLLs */
@@ -5727,7 +5819,7 @@
BUG();
}
- if (cpu_is_msm8960()) {
+ if (cpu_is_msm8960() || cpu_is_msm8930()) {
memcpy(msm_clocks_8960, msm_clocks_8960_v1,
sizeof(msm_clocks_8960_v1));
if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 2) {
@@ -5787,11 +5879,18 @@
clk_set_rate(&usb_hs4_xcvr_clk.c, 60000000);
}
clk_set_rate(&usb_fs1_src_clk.c, 60000000);
- if (cpu_is_msm8960())
+ if (cpu_is_msm8960() || cpu_is_msm8930())
clk_set_rate(&usb_fs2_src_clk.c, 60000000);
clk_set_rate(&usb_hsic_xcvr_fs_clk.c, 60000000);
clk_set_rate(&usb_hsic_hsic_src_clk.c, 480000000);
clk_set_rate(&usb_hsic_hsio_cal_clk.c, 9000000);
+ /*
+ * Set the CSI rates to a safe default to avoid warnings when
+ * switching csi pix and rdi clocks.
+ */
+ clk_set_rate(&csi0_src_clk.c, 27000000);
+ clk_set_rate(&csi1_src_clk.c, 27000000);
+ clk_set_rate(&csi2_src_clk.c, 27000000);
/*
* The halt status bits for these clocks may be incorrect at boot.
@@ -5805,7 +5904,9 @@
SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 2) {
clk_enable(&usb_hsic_hsic_clk.c);
clk_disable(&usb_hsic_hsic_clk.c);
- }
+ } else
+ /* CSI2 hardware not present on 8960v1 devices */
+ pix_rdi_mux_map[2] = NULL;
if (machine_is_msm8960_sim()) {
clk_set_rate(&sdc1_clk.c, 48000000);
diff --git a/arch/arm/mach-msm/clock-8x60.c b/arch/arm/mach-msm/clock-8x60.c
index f6dd39e..c5d3d1d 100644
--- a/arch/arm/mach-msm/clock-8x60.c
+++ b/arch/arm/mach-msm/clock-8x60.c
@@ -3674,7 +3674,7 @@
CLK_LOOKUP("mdp_vsync_clk", mdp_vsync_clk.c, NULL),
CLK_LOOKUP("pixel_lcdc_clk", pixel_lcdc_clk.c, NULL),
CLK_LOOKUP("pixel_mdp_clk", pixel_mdp_clk.c, NULL),
- CLK_LOOKUP("rot_clk", rot_clk.c, NULL),
+ CLK_LOOKUP("core_clk", rot_clk.c, "msm_rotator.0"),
CLK_LOOKUP("core_clk", rot_clk.c, "footswitch-8x60.6"),
CLK_LOOKUP("tv_enc_clk", tv_enc_clk.c, NULL),
CLK_LOOKUP("tv_dac_clk", tv_dac_clk.c, NULL),
@@ -3719,7 +3719,7 @@
CLK_LOOKUP("mdp_pclk", mdp_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", mdp_p_clk.c, "footswitch-8x60.4"),
CLK_LOOKUP("iface_clk", smmu_p_clk.c, "msm_iommu"),
- CLK_LOOKUP("rotator_pclk", rot_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", rot_p_clk.c, "msm_rotator.0"),
CLK_LOOKUP("iface_clk", rot_p_clk.c, "footswitch-8x60.6"),
CLK_LOOKUP("tv_enc_pclk", tv_enc_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", vcodec_p_clk.c, "msm_vidc.0"),
diff --git a/arch/arm/mach-msm/clock-debug.c b/arch/arm/mach-msm/clock-debug.c
index 4e0d3e9..63fc70f 100644
--- a/arch/arm/mach-msm/clock-debug.c
+++ b/arch/arm/mach-msm/clock-debug.c
@@ -213,7 +213,7 @@
if (!debugfs_base)
return -ENOMEM;
- strncpy(temp, clock->dbg_name, ARRAY_SIZE(temp)-1);
+ strlcpy(temp, clock->dbg_name, ARRAY_SIZE(temp));
for (ptr = temp; *ptr; ptr++)
*ptr = tolower(*ptr);
diff --git a/arch/arm/mach-msm/clock-local.c b/arch/arm/mach-msm/clock-local.c
index 473b439..ca25802 100644
--- a/arch/arm/mach-msm/clock-local.c
+++ b/arch/arm/mach-msm/clock-local.c
@@ -273,7 +273,7 @@
return invert ? !status_bit : status_bit;
}
-static void __branch_clk_enable_reg(const struct branch *clk, const char *name)
+void __branch_clk_enable_reg(const struct branch *clk, const char *name)
{
u32 reg_val;
@@ -344,7 +344,7 @@
}
/* Perform any register operations required to disable the branch. */
-static u32 __branch_clk_disable_reg(const struct branch *clk, const char *name)
+u32 __branch_clk_disable_reg(const struct branch *clk, const char *name)
{
u32 reg_val;
diff --git a/arch/arm/mach-msm/clock-local.h b/arch/arm/mach-msm/clock-local.h
index ec2462a..9887bb1 100644
--- a/arch/arm/mach-msm/clock-local.h
+++ b/arch/arm/mach-msm/clock-local.h
@@ -109,6 +109,8 @@
};
int branch_reset(struct branch *clk, enum clk_reset_action action);
+void __branch_clk_enable_reg(const struct branch *clk, const char *name);
+u32 __branch_clk_disable_reg(const struct branch *clk, const char *name);
/*
* Generic clock-definition struct and macros
diff --git a/arch/arm/mach-msm/clock-pcom-lookup.c b/arch/arm/mach-msm/clock-pcom-lookup.c
index b176301..d1a257d 100644
--- a/arch/arm/mach-msm/clock-pcom-lookup.c
+++ b/arch/arm/mach-msm/clock-pcom-lookup.c
@@ -263,6 +263,9 @@
CLK_LOOKUP("csi_clk", csi0_clk.c, "msm_camera_ov9726.0"),
CLK_LOOKUP("csi_pclk", csi0_p_clk.c, "msm_camera_ov9726.0"),
CLK_LOOKUP("csi_vfe_clk", csi0_vfe_clk.c, "msm_camera_ov9726.0"),
+ CLK_LOOKUP("csi_clk", csi0_clk.c, "msm_camera_ov7692.0"),
+ CLK_LOOKUP("csi_pclk", csi0_p_clk.c, "msm_camera_ov7692.0"),
+ CLK_LOOKUP("csi_vfe_clk", csi0_vfe_clk.c, "msm_camera_ov7692.0"),
CLK_LOOKUP("csi_clk", csi1_clk.c, NULL),
CLK_LOOKUP("csi_pclk", csi1_p_clk.c, NULL),
CLK_LOOKUP("csi_vfe_clk", csi1_vfe_clk.c, NULL),
diff --git a/arch/arm/mach-msm/clock-voter.c b/arch/arm/mach-msm/clock-voter.c
index 1c742b1..e754752 100644
--- a/arch/arm/mach-msm/clock-voter.c
+++ b/arch/arm/mach-msm/clock-voter.c
@@ -75,7 +75,7 @@
static int voter_clk_enable(struct clk *clk)
{
- int ret;
+ int ret = 0;
unsigned long flags;
unsigned cur_rate;
struct clk *parent;
diff --git a/arch/arm/mach-msm/dal.c b/arch/arm/mach-msm/dal.c
index 218bd0f..94c02f0 100644
--- a/arch/arm/mach-msm/dal.c
+++ b/arch/arm/mach-msm/dal.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -407,7 +407,7 @@
if (!p)
return NULL;
- strncpy(p->port, port, sizeof(p->port) - 1);
+ strlcpy(p->port, port, sizeof(p->port));
p->refcount = 1;
snprintf(wq_name, sizeof(wq_name), "dalrpc_rcv_%s", port);
@@ -537,8 +537,8 @@
} else if (strnlen((char *)&h->msg.param[1],
DALRPC_MAX_PORTNAME_LEN)) {
/* another port was recommended in the response. */
- strncpy(dyn_port, (char *)&h->msg.param[1],
- DALRPC_MAX_PORTNAME_LEN);
+ strlcpy(dyn_port, (char *)&h->msg.param[1],
+ sizeof(dyn_port));
dyn_port[DALRPC_MAX_PORTNAME_LEN] = 0;
port = dyn_port;
} else if (port == dyn_port) {
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index 694a70d..fd2be92 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -680,7 +680,7 @@
CLK_DUMMY("mdp_clk", MDP_CLK, NULL, OFF),
CLK_DUMMY("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, OFF),
CLK_DUMMY("lut_mdp", LUT_MDP_CLK, NULL, OFF),
- CLK_DUMMY("rot_clk", ROT_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", ROT_CLK, NULL, OFF),
CLK_DUMMY("tv_src_clk", TV_SRC_CLK, NULL, OFF),
CLK_DUMMY("core_clk", VCODEC_CLK, NULL, OFF),
CLK_DUMMY("mdp_tv_clk", MDP_TV_CLK, NULL, OFF),
@@ -694,7 +694,7 @@
CLK_DUMMY("vfe_axi_clk", VFE_AXI_CLK, NULL, OFF),
CLK_DUMMY("ijpeg_axi_clk", IJPEG_AXI_CLK, NULL, OFF),
CLK_DUMMY("mdp_axi_clk", MDP_AXI_CLK, NULL, OFF),
- CLK_DUMMY("rot_axi_clk", ROT_AXI_CLK, NULL, OFF),
+ CLK_DUMMY("bus_clk", ROT_AXI_CLK, NULL, OFF),
CLK_DUMMY("vcodec_axi_clk", VCODEC_AXI_CLK, NULL, OFF),
CLK_DUMMY("vcodec_axi_a_clk", VCODEC_AXI_A_CLK, NULL, OFF),
CLK_DUMMY("vcodec_axi_b_clk", VCODEC_AXI_B_CLK, NULL, OFF),
@@ -720,7 +720,7 @@
CLK_DUMMY("mem_iface_clk", IMEM_P_CLK, NULL, OFF),
CLK_DUMMY("mdp_pclk", MDP_P_CLK, NULL, OFF),
CLK_DUMMY("iface_clk", SMMU_P_CLK, "msm_smmu", OFF),
- CLK_DUMMY("rotator_pclk", ROT_P_CLK, NULL, OFF),
+ CLK_DUMMY("iface_clk", ROT_P_CLK, NULL, OFF),
CLK_DUMMY("vcodec_pclk", VCODEC_P_CLK, NULL, OFF),
CLK_DUMMY("vfe_pclk", VFE_P_CLK, NULL, OFF),
CLK_DUMMY("vpe_pclk", VPE_P_CLK, NULL, OFF),
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index 7512414..899f2e1 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -1297,12 +1297,12 @@
static struct msm_rot_clocks rotator_clocks[] = {
{
- .clk_name = "rot_clk",
+ .clk_name = "core_clk",
.clk_type = ROTATOR_CORE_CLK,
.clk_rate = 200 * 1000 * 1000,
},
{
- .clk_name = "rotator_pclk",
+ .clk_name = "iface_clk",
.clk_type = ROTATOR_PCLK,
.clk_rate = 0,
},
@@ -1659,7 +1659,7 @@
CLK_DUMMY("mdp_clk", MDP_CLK, NULL, OFF),
CLK_DUMMY("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, OFF),
CLK_DUMMY("lut_mdp", LUT_MDP_CLK, NULL, OFF),
- CLK_DUMMY("rot_clk", ROT_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", ROT_CLK, NULL, OFF),
CLK_DUMMY("tv_src_clk", TV_SRC_CLK, NULL, OFF),
CLK_DUMMY("tv_enc_clk", TV_ENC_CLK, NULL, OFF),
CLK_DUMMY("tv_dac_clk", TV_DAC_CLK, NULL, OFF),
@@ -1673,7 +1673,7 @@
CLK_DUMMY("vfe_axi_clk", VFE_AXI_CLK, NULL, OFF),
CLK_DUMMY("ijpeg_axi_clk", IJPEG_AXI_CLK, NULL, OFF),
CLK_DUMMY("mdp_axi_clk", MDP_AXI_CLK, NULL, OFF),
- CLK_DUMMY("rot_axi_clk", ROT_AXI_CLK, NULL, OFF),
+ CLK_DUMMY("bus_clk", ROT_AXI_CLK, NULL, OFF),
CLK_DUMMY("vcodec_axi_clk", VCODEC_AXI_CLK, NULL, OFF),
CLK_DUMMY("vcodec_axi_a_clk", VCODEC_AXI_A_CLK, NULL, OFF),
CLK_DUMMY("vcodec_axi_b_clk", VCODEC_AXI_B_CLK, NULL, OFF),
@@ -1694,7 +1694,7 @@
CLK_DUMMY("mem_iface_clk", IMEM_P_CLK, NULL, OFF),
CLK_DUMMY("mdp_pclk", MDP_P_CLK, NULL, OFF),
CLK_DUMMY("iface_clk", SMMU_P_CLK, NULL, OFF),
- CLK_DUMMY("rotator_pclk", ROT_P_CLK, NULL, OFF),
+ CLK_DUMMY("iface_clk", ROT_P_CLK, NULL, OFF),
CLK_DUMMY("tv_enc_pclk", TV_ENC_P_CLK, NULL, OFF),
CLK_DUMMY("vcodec_pclk", VCODEC_P_CLK, NULL, OFF),
CLK_DUMMY("vfe_pclk", VFE_P_CLK, NULL, OFF),
diff --git a/arch/arm/mach-msm/devices-iommu.c b/arch/arm/mach-msm/devices-iommu.c
index b04bc11..3d2d2e7 100644
--- a/arch/arm/mach-msm/devices-iommu.c
+++ b/arch/arm/mach-msm/devices-iommu.c
@@ -16,8 +16,6 @@
#include <mach/irqs.h>
#include <mach/iommu.h>
#include <mach/socinfo.h>
-#include <mach/irqs-8960.h>
-#include <mach/irqs-8064.h>
static struct resource msm_iommu_jpegd_resources[] = {
{
@@ -28,14 +26,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_JPEGD_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_JPEGD_CB_SC_NON_SECURE_IRQ,
+ .start = 98,
+ .end = 98,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_JPEGD_CB_SC_SECURE_IRQ,
- .end = SMMU_JPEGD_CB_SC_SECURE_IRQ,
+ .start = 97,
+ .end = 97,
.flags = IORESOURCE_IRQ,
},
};
@@ -49,14 +47,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_VPE_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_VPE_CB_SC_NON_SECURE_IRQ,
+ .start = 84,
+ .end = 84,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_VPE_CB_SC_SECURE_IRQ,
- .end = SMMU_VPE_CB_SC_SECURE_IRQ,
+ .start = 83,
+ .end = 83,
.flags = IORESOURCE_IRQ,
},
};
@@ -70,14 +68,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_MDP0_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_MDP0_CB_SC_NON_SECURE_IRQ,
+ .start = 96,
+ .end = 96,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_MDP0_CB_SC_SECURE_IRQ,
- .end = SMMU_MDP0_CB_SC_SECURE_IRQ,
+ .start = 95,
+ .end = 95,
.flags = IORESOURCE_IRQ,
},
};
@@ -91,14 +89,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_MDP1_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_MDP1_CB_SC_NON_SECURE_IRQ,
+ .start = 94,
+ .end = 94,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_MDP1_CB_SC_SECURE_IRQ,
- .end = SMMU_MDP1_CB_SC_SECURE_IRQ,
+ .start = 93,
+ .end = 93,
.flags = IORESOURCE_IRQ,
},
};
@@ -112,14 +110,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_ROT_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_ROT_CB_SC_NON_SECURE_IRQ,
+ .start = 92,
+ .end = 92,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_ROT_CB_SC_SECURE_IRQ,
- .end = SMMU_ROT_CB_SC_SECURE_IRQ,
+ .start = 91,
+ .end = 91,
.flags = IORESOURCE_IRQ,
},
};
@@ -133,14 +131,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_IJPEG_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_IJPEG_CB_SC_NON_SECURE_IRQ,
+ .start = 100,
+ .end = 100,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_IJPEG_CB_SC_SECURE_IRQ,
- .end = SMMU_IJPEG_CB_SC_SECURE_IRQ,
+ .start = 99,
+ .end = 99,
.flags = IORESOURCE_IRQ,
},
};
@@ -154,14 +152,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_VFE_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_VFE_CB_SC_NON_SECURE_IRQ,
+ .start = 86,
+ .end = 86,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_VFE_CB_SC_SECURE_IRQ,
- .end = SMMU_VFE_CB_SC_SECURE_IRQ,
+ .start = 85,
+ .end = 85,
.flags = IORESOURCE_IRQ,
},
};
@@ -175,14 +173,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ,
+ .start = 90,
+ .end = 90,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_VCODEC_A_CB_SC_SECURE_IRQ,
- .end = SMMU_VCODEC_A_CB_SC_SECURE_IRQ,
+ .start = 89,
+ .end = 89,
.flags = IORESOURCE_IRQ,
},
};
@@ -196,14 +194,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ,
+ .start = 88,
+ .end = 88,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_VCODEC_B_CB_SC_SECURE_IRQ,
- .end = SMMU_VCODEC_B_CB_SC_SECURE_IRQ,
+ .start = 87,
+ .end = 87,
.flags = IORESOURCE_IRQ,
},
};
@@ -217,14 +215,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_GFX3D_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_GFX3D_CB_SC_NON_SECURE_IRQ,
+ .start = 102,
+ .end = 102,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_GFX3D_CB_SC_SECURE_IRQ,
- .end = SMMU_GFX3D_CB_SC_SECURE_IRQ,
+ .start = 101,
+ .end = 101,
.flags = IORESOURCE_IRQ,
},
};
@@ -238,14 +236,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_GFX3D1_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_GFX3D1_CB_SC_NON_SECURE_IRQ,
+ .start = 243,
+ .end = 243,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_GFX3D1_CB_SC_SECURE_IRQ,
- .end = SMMU_GFX3D1_CB_SC_SECURE_IRQ,
+ .start = 242,
+ .end = 242,
.flags = IORESOURCE_IRQ,
},
};
@@ -259,14 +257,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_GFX2D0_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_GFX2D0_CB_SC_NON_SECURE_IRQ,
+ .start = 104,
+ .end = 104,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_GFX2D0_CB_SC_SECURE_IRQ,
- .end = SMMU_GFX2D0_CB_SC_SECURE_IRQ,
+ .start = 103,
+ .end = 103,
.flags = IORESOURCE_IRQ,
},
};
@@ -280,14 +278,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_GFX2D1_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_GFX2D1_CB_SC_NON_SECURE_IRQ,
+ .start = 243,
+ .end = 243,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_GFX2D1_CB_SC_SECURE_IRQ,
- .end = SMMU_GFX2D1_CB_SC_SECURE_IRQ,
+ .start = 242,
+ .end = 242,
.flags = IORESOURCE_IRQ,
},
};
@@ -301,14 +299,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_VCAP_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_VCAP_CB_SC_NON_SECURE_IRQ,
+ .start = 269,
+ .end = 269,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_VCAP_CB_SC_SECURE_IRQ,
- .end = SMMU_VCAP_CB_SC_SECURE_IRQ,
+ .start = 268,
+ .end = 268,
.flags = IORESOURCE_IRQ,
},
};
@@ -1059,9 +1057,7 @@
static int __init iommu_init(void)
{
int ret;
-
- if (cpu_is_msm8960() &&
- SOCINFO_VERSION_MAJOR(socinfo_get_version()) < 2) {
+ if (!msm_soc_version_supports_iommu()) {
pr_err("IOMMU is not supported on this SoC version.\n");
return -ENODEV;
}
diff --git a/arch/arm/mach-msm/devices-msm7x30.c b/arch/arm/mach-msm/devices-msm7x30.c
index d7fc93e..b76a844 100644
--- a/arch/arm/mach-msm/devices-msm7x30.c
+++ b/arch/arm/mach-msm/devices-msm7x30.c
@@ -1000,17 +1000,17 @@
static struct msm_rot_clocks rotator_clocks[] = {
{
- .clk_name = "rotator_clk",
+ .clk_name = "core_clk",
.clk_type = ROTATOR_CORE_CLK,
.clk_rate = 0,
},
{
- .clk_name = "rotator_pclk",
+ .clk_name = "iface_clk",
.clk_type = ROTATOR_PCLK,
.clk_rate = 0,
},
{
- .clk_name = "rotator_imem_clk",
+ .clk_name = "mem_clk",
.clk_type = ROTATOR_IMEM_CLK,
.clk_rate = 0,
},
diff --git a/arch/arm/mach-msm/devices-msm8x60.c b/arch/arm/mach-msm/devices-msm8x60.c
index 9f3e03d..49f3d3b 100644
--- a/arch/arm/mach-msm/devices-msm8x60.c
+++ b/arch/arm/mach-msm/devices-msm8x60.c
@@ -1424,12 +1424,12 @@
static struct msm_rot_clocks rotator_clocks[] = {
{
- .clk_name = "rot_clk",
+ .clk_name = "core_clk",
.clk_type = ROTATOR_CORE_CLK,
.clk_rate = 160 * 1000 * 1000,
},
{
- .clk_name = "rotator_pclk",
+ .clk_name = "iface_clk",
.clk_type = ROTATOR_PCLK,
.clk_rate = 0,
},
diff --git a/arch/arm/mach-msm/idle.h b/arch/arm/mach-msm/idle.h
index 740ef91..138db45 100644
--- a/arch/arm/mach-msm/idle.h
+++ b/arch/arm/mach-msm/idle.h
@@ -17,6 +17,7 @@
int msm_arch_idle(void);
int msm_pm_collapse(void);
void msm_pm_collapse_exit(void);
+void msm_warmboot_entry(void);
#ifdef CONFIG_CPU_V7
void msm_pm_boot_entry(void);
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 5a30df5..e7f156e 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -23,6 +23,7 @@
#include <linux/usb.h>
#include <linux/leds-pmic8058.h>
#include <linux/clkdev.h>
+#include <linux/of_platform.h>
#include <linux/msm_ssbi.h>
#include <mach/msm_bus.h>
@@ -92,7 +93,7 @@
#define MSM_CAMERA_FLASH_SRC_PWM (0x00000001<<1)
#define MSM_CAMERA_FLASH_SRC_CURRENT_DRIVER (0x00000001<<2)
#define MSM_CAMERA_FLASH_SRC_EXT (0x00000001<<3)
-
+#define MSM_CAMERA_FLASH_SRC_LED (0x00000001<<3)
struct msm_camera_sensor_flash_pmic {
uint8_t num_of_src;
@@ -124,6 +125,11 @@
struct msm_cam_expander_info *expander_info;
};
+struct msm_camera_sensor_flash_led {
+ const char *led_name;
+ const int led_name_len;
+};
+
struct msm_camera_sensor_flash_src {
int flash_sr_type;
@@ -134,6 +140,7 @@
current_driver_src;
struct msm_camera_sensor_flash_external
ext_driver_src;
+ struct msm_camera_sensor_flash_led led_src;
} _fsrc;
};
@@ -410,7 +417,11 @@
#endif
/* common init routines for use by arch/arm/mach-msm/board-*.c */
+#ifdef CONFIG_OF_DEVICE
+void msm_copper_init(struct of_dev_auxdata **);
+#endif
void msm_add_devices(void);
+void msm_copper_add_devices(void);
void msm_map_common_io(void);
void msm_map_qsd8x50_io(void);
void msm_map_msm8x60_io(void);
@@ -419,7 +430,9 @@
void msm_map_apq8064_io(void);
void msm_map_msm7x30_io(void);
void msm_map_fsm9xxx_io(void);
+void msm_map_copper_io(void);
void msm_init_irq(void);
+void msm_copper_init_irq(void);
void vic_handle_irq(struct pt_regs *regs);
struct mmc_platform_data;
diff --git a/arch/arm/mach-msm/include/mach/cpu.h b/arch/arm/mach-msm/include/mach/cpu.h
deleted file mode 100644
index 0308b7b..0000000
--- a/arch/arm/mach-msm/include/mach/cpu.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ARCH_ARM_MACH_MSM_CPU_H__
-#define __ARCH_ARM_MACH_MSM_CPU_H__
-
-/* TODO: For now, only one CPU can be compiled at a time. */
-
-#define cpu_is_msm7x01() 0
-#define cpu_is_msm7x30() 0
-#define cpu_is_qsd8x50() 0
-#define cpu_is_msm8x60() 0
-#define cpu_is_msm8960() 0
-
-#ifdef CONFIG_ARCH_MSM7X00A
-# undef cpu_is_msm7x01
-# define cpu_is_msm7x01() 1
-#endif
-
-#ifdef CONFIG_ARCH_MSM7X30
-# undef cpu_is_msm7x30
-# define cpu_is_msm7x30() 1
-#endif
-
-#ifdef CONFIG_ARCH_QSD8X50
-# undef cpu_is_qsd8x50
-# define cpu_is_qsd8x50() 1
-#endif
-
-#ifdef CONFIG_ARCH_MSM8X60
-# undef cpu_is_msm8x60
-# define cpu_is_msm8x60() 1
-#endif
-
-#ifdef CONFIG_ARCH_MSM8960
-# undef cpu_is_msm8960
-# define cpu_is_msm8960() 1
-#endif
-
-#endif
diff --git a/arch/arm/mach-msm/include/mach/iommu.h b/arch/arm/mach-msm/include/mach/iommu.h
index 5542ff4..9405459 100644
--- a/arch/arm/mach-msm/include/mach/iommu.h
+++ b/arch/arm/mach-msm/include/mach/iommu.h
@@ -15,6 +15,7 @@
#include <linux/interrupt.h>
#include <linux/clk.h>
+#include <mach/socinfo.h>
/* Sharability attributes of MSM IOMMU mappings */
#define MSM_IOMMU_ATTR_NON_SH 0x0
@@ -121,3 +122,17 @@
#endif
#endif
+
+static inline int msm_soc_version_supports_iommu(void)
+{
+ if (cpu_is_msm8960() &&
+ SOCINFO_VERSION_MAJOR(socinfo_get_version()) < 2)
+ return 0;
+
+ if (cpu_is_msm8x60() &&
+ (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2 ||
+ SOCINFO_VERSION_MINOR(socinfo_get_version()) < 1)) {
+ return 0;
+ }
+ return 1;
+}
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h b/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
index da0c54c..d7dc4f4 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
@@ -47,6 +47,10 @@
#define MSM_TMR_BASE MSM_CSR_BASE
#define MSM_TMR_SIZE SZ_4K
+#define MSM_TMR0_BASE MSM_TMR_BASE
+
+#define MSM_QGIC_DIST_BASE MSM_VIC_BASE
+
#define MSM_GPIO1_BASE IOMEM(0xFA003000)
#define MSM_GPIO1_PHYS 0xA9200000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-copper.h b/arch/arm/mach-msm/include/mach/msm_iomap-copper.h
index d613671..3999982 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-copper.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-copper.h
@@ -32,4 +32,10 @@
#define COPPER_TLMM_PHYS 0xFC4A0000
#define COPPER_TLMM_SIZE SZ_16K
+#define COPPER_TMR_PHYS 0xF900A000
+#define COPPER_TMR_SIZE SZ_4K
+
+#define COPPER_TMR0_PHYS 0xF908A000
+#define COPPER_TMR0_SIZE SZ_4K
+
#endif
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 171f482..65f5da0 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -282,6 +282,8 @@
MSM_CHIP_DEVICE(QGIC_DIST, COPPER),
MSM_CHIP_DEVICE(QGIC_CPU, COPPER),
MSM_CHIP_DEVICE(TLMM, COPPER),
+ MSM_CHIP_DEVICE(TMR, COPPER),
+ MSM_CHIP_DEVICE(TMR0, COPPER),
};
void __init msm_map_copper_io(void)
diff --git a/arch/arm/mach-msm/iommu.c b/arch/arm/mach-msm/iommu.c
index 0a77781..442a1b4 100644
--- a/arch/arm/mach-msm/iommu.c
+++ b/arch/arm/mach-msm/iommu.c
@@ -1006,6 +1006,9 @@
static int __init msm_iommu_init(void)
{
+ if (!msm_soc_version_supports_iommu())
+ return -ENODEV;
+
setup_iommu_tex_classes();
register_iommu(&msm_iommu_ops);
return 0;
diff --git a/arch/arm/mach-msm/iommu_dev.c b/arch/arm/mach-msm/iommu_dev.c
index ca2ecc6..d1dd3ed 100644
--- a/arch/arm/mach-msm/iommu_dev.c
+++ b/arch/arm/mach-msm/iommu_dev.c
@@ -69,7 +69,7 @@
r.name = ctx_name;
found = device_for_each_child(&msm_iommu_root_dev->dev, &r, each_iommu);
- if (!found) {
+ if (!found || !dev_get_drvdata(r.dev)) {
pr_err("Could not find context <%s>\n", ctx_name);
goto fail;
}
diff --git a/arch/arm/mach-msm/modem-8960.c b/arch/arm/mach-msm/modem-8960.c
index 03afc94..7bcd844 100644
--- a/arch/arm/mach-msm/modem-8960.c
+++ b/arch/arm/mach-msm/modem-8960.c
@@ -227,7 +227,7 @@
{
int ret;
- if (!cpu_is_msm8960())
+ if (!cpu_is_msm8960() && !cpu_is_msm8930())
return -ENODEV;
ret = smsm_state_cb_register(SMSM_MODEM_STATE, SMSM_RESET,
diff --git a/arch/arm/mach-msm/msm_rq_stats.c b/arch/arm/mach-msm/msm_rq_stats.c
index a39703a..83d5e96 100644
--- a/arch/arm/mach-msm/msm_rq_stats.c
+++ b/arch/arm/mach-msm/msm_rq_stats.c
@@ -27,7 +27,7 @@
#include <linux/spinlock.h>
#include <linux/rq_stats.h>
-#define MAX_LONG_SIZE 16
+#define MAX_LONG_SIZE 24
#define DEFAULT_RQ_POLL_JIFFIES 1
#define DEFAULT_DEF_TIMER_JIFFIES 5
@@ -95,8 +95,10 @@
static ssize_t show_def_timer_ms(struct kobject *kobj,
struct kobj_attribute *attr, char *buf)
{
- return snprintf(buf, MAX_LONG_SIZE, "%lu\n",
- rq_info.def_timer_jiffies);
+ int64_t diff_ms;
+ diff_ms = ktime_to_ns(ktime_get()) - rq_info.def_start_time;
+ do_div(diff_ms, 1000 * 1000);
+ return snprintf(buf, MAX_LONG_SIZE, "%lld\n", diff_ms);
}
static ssize_t store_def_timer_ms(struct kobject *kobj,
diff --git a/arch/arm/mach-msm/pm-8x60.c b/arch/arm/mach-msm/pm-8x60.c
index 911d546..6a78597 100644
--- a/arch/arm/mach-msm/pm-8x60.c
+++ b/arch/arm/mach-msm/pm-8x60.c
@@ -48,6 +48,7 @@
#include "spm.h"
#include "timer.h"
#include "qdss.h"
+#include "pm-boot.h"
/******************************************************************************
* Debug Definitions
@@ -649,7 +650,7 @@
entry = (!dev->cpu || from_idle) ?
msm_pm_collapse_exit : msm_secondary_startup;
- msm_pm_write_boot_vector(dev->cpu, virt_to_phys(entry));
+ msm_pm_boot_config_before_pc(dev->cpu, virt_to_phys(entry));
if (MSM_PM_DEBUG_RESET_VECTOR & msm_pm_debug_mask)
pr_info("CPU%u: %s: program vector to %p\n",
@@ -661,6 +662,8 @@
collapsed = msm_pm_collapse();
+ msm_pm_boot_config_after_pc(dev->cpu);
+
if (collapsed) {
#ifdef CONFIG_VFP
vfp_reinit();
@@ -1179,15 +1182,6 @@
init_completion(&dev->cpu_killed);
#endif
}
-#ifdef CONFIG_MSM_SCM
- ret = scm_set_boot_addr((void *)virt_to_phys(msm_pm_boot_entry),
- SCM_FLAG_WARMBOOT_CPU0 | SCM_FLAG_WARMBOOT_CPU1);
- if (ret) {
- pr_err("%s: failed to set up scm boot addr: %d\n",
- __func__, ret);
- return ret;
- }
-#endif
#ifdef CONFIG_MSM_IDLE_STATS
for_each_possible_cpu(cpu) {
diff --git a/arch/arm/mach-msm/pm-boot.c b/arch/arm/mach-msm/pm-boot.c
new file mode 100644
index 0000000..6becc61
--- /dev/null
+++ b/arch/arm/mach-msm/pm-boot.c
@@ -0,0 +1,114 @@
+/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include "scm-boot.h"
+#include "idle.h"
+#include "pm-boot.h"
+
+static uint32_t *msm_pm_reset_vector;
+static uint32_t saved_vector[2];
+static void (*msm_pm_boot_before_pc)(unsigned int cpu, unsigned long entry);
+static void (*msm_pm_boot_after_pc)(unsigned int cpu);
+
+#ifdef CONFIG_MSM_SCM
+static int __init msm_pm_tz_boot_init(void)
+{
+ int flag = 0;
+ if (num_possible_cpus() == 1)
+ flag = SCM_FLAG_WARMBOOT_CPU0;
+ else if (num_possible_cpus() == 2)
+ flag = SCM_FLAG_WARMBOOT_CPU0 | SCM_FLAG_WARMBOOT_CPU1;
+ else
+ __WARN();
+
+ return scm_set_boot_addr((void *)virt_to_phys(msm_pm_boot_entry), flag);
+}
+
+static void msm_pm_config_tz_before_pc(unsigned int cpu,
+ unsigned long entry)
+{
+ msm_pm_write_boot_vector(cpu, entry);
+}
+#else
+static int __init msm_pm_tz_boot_init(void)
+{
+ return 0;
+};
+
+static inline void msm_pm_config_tz_before_pc(unsigned int cpu,
+ unsigned long entry) {}
+#endif
+
+static int __init msm_pm_boot_reset_vector_init(uint32_t *reset_vector)
+{
+ WARN_ON(!reset_vector);
+ msm_pm_reset_vector = reset_vector;
+ mb();
+
+ return 0;
+}
+
+static void msm_pm_config_rst_vector_before_pc(unsigned int cpu,
+ unsigned long entry)
+{
+ saved_vector[0] = msm_pm_reset_vector[0];
+ saved_vector[1] = msm_pm_reset_vector[1];
+ msm_pm_reset_vector[0] = 0xE51FF004; /* ldr pc, 4 */
+ msm_pm_reset_vector[1] = entry;
+}
+
+static void msm_pm_config_rst_vector_after_pc(unsigned int cpu)
+{
+ msm_pm_reset_vector[0] = saved_vector[0];
+ msm_pm_reset_vector[1] = saved_vector[1];
+}
+
+void msm_pm_boot_config_before_pc(unsigned int cpu, unsigned long entry)
+{
+ if (msm_pm_boot_before_pc)
+ msm_pm_boot_before_pc(cpu, entry);
+}
+
+void msm_pm_boot_config_after_pc(unsigned int cpu)
+{
+ if (msm_pm_boot_after_pc)
+ msm_pm_boot_after_pc(cpu);
+}
+
+int __init msm_pm_boot_init(int tz_available, uint32_t* address)
+{
+ int ret = 0;
+
+ switch (tz_available) {
+ case MSM_PM_BOOT_CONFIG_TZ:
+ ret = msm_pm_tz_boot_init();
+ msm_pm_boot_before_pc = msm_pm_config_tz_before_pc;
+ msm_pm_boot_after_pc = NULL;
+ break;
+ case MSM_PM_BOOT_CONFIG_RESET_VECTOR:
+ ret = msm_pm_boot_reset_vector_init(address);
+ msm_pm_boot_before_pc
+ = msm_pm_config_rst_vector_before_pc;
+ msm_pm_boot_after_pc
+ = msm_pm_config_rst_vector_after_pc;
+ break;
+ default:
+ __WARN();
+ }
+
+ return ret;
+}
diff --git a/arch/arm/mach-msm/pm-boot.h b/arch/arm/mach-msm/pm-boot.h
new file mode 100644
index 0000000..7e1a439
--- /dev/null
+++ b/arch/arm/mach-msm/pm-boot.h
@@ -0,0 +1,25 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef _ARCH_ARM_MACH_MSM_PM_BOOT_H
+#define _ARCH_ARM_MACH_MSM_PM_BOOT_H
+
+enum {
+ MSM_PM_BOOT_CONFIG_TZ = 0,
+ MSM_PM_BOOT_CONFIG_RESET_VECTOR = 1,
+};
+
+int __init msm_pm_boot_init(int boot_config, uint32_t* address);
+void msm_pm_boot_config_before_pc(unsigned int cpu, unsigned long entry);
+void msm_pm_boot_config_after_pc(unsigned int cpu);
+
+#endif
diff --git a/arch/arm/mach-msm/pm.c b/arch/arm/mach-msm/pm.c
index 9e19d40..d684a5a 100644
--- a/arch/arm/mach-msm/pm.c
+++ b/arch/arm/mach-msm/pm.c
@@ -45,6 +45,7 @@
#include "gpio.h"
#include "timer.h"
#include "pm.h"
+#include "pm-boot.h"
enum {
MSM_PM_DEBUG_SUSPEND = 1U << 0,
@@ -100,7 +101,6 @@
struct smsm_interrupt_info_ext *int_info_ext;
} msm_pm_sma;
-static uint32_t *msm_pm_reset_vector;
static uint32_t msm_pm_max_sleep_time;
static struct msm_pm_platform_data *msm_pm_modes;
@@ -238,7 +238,6 @@
static int msm_sleep(int sleep_mode, uint32_t sleep_delay,
uint32_t sleep_limit, int from_idle)
{
- uint32_t saved_vector[2];
int collapsed;
uint32_t enter_state;
uint32_t enter_wait_set = 0;
@@ -344,17 +343,10 @@
msm_pm_sma.int_info->aArm_en_mask,
msm_pm_sma.int_info->aArm_wakeup_reason,
msm_pm_sma.int_info->aArm_interrupts_pending);
- saved_vector[0] = msm_pm_reset_vector[0];
- saved_vector[1] = msm_pm_reset_vector[1];
- msm_pm_reset_vector[0] = 0xE51FF004; /* ldr pc, 4 */
- msm_pm_reset_vector[1] = virt_to_phys(msm_pm_collapse_exit);
- if (msm_pm_debug_mask & MSM_PM_DEBUG_RESET_VECTOR)
- printk(KERN_INFO "msm_sleep(): vector %x %x -> "
- "%x %x\n", saved_vector[0], saved_vector[1],
- msm_pm_reset_vector[0], msm_pm_reset_vector[1]);
+ msm_pm_boot_config_before_pc(smp_processor_id(),
+ virt_to_phys(msm_pm_collapse_exit));
collapsed = msm_pm_collapse();
- msm_pm_reset_vector[0] = saved_vector[0];
- msm_pm_reset_vector[1] = saved_vector[1];
+ msm_pm_boot_config_after_pc(smp_processor_id());
if (collapsed) {
cpu_init();
local_fiq_enable();
@@ -871,22 +863,6 @@
return -ENODEV;
}
-#if defined(CONFIG_ARCH_MSM_SCORPION) && !defined(CONFIG_MSM_SMP)
- /* The bootloader is responsible for initializing many of Scorpion's
- * coprocessor registers for things like cache timing. The state of
- * these coprocessor registers is lost on reset, so part of the
- * bootloader must be re-executed. Do not overwrite the reset vector
- * or bootloader area.
- */
- msm_pm_reset_vector = (uint32_t *) PAGE_OFFSET;
-#else
- msm_pm_reset_vector = ioremap(0, PAGE_SIZE);
- if (msm_pm_reset_vector == NULL) {
- printk(KERN_ERR "msm_pm_init: failed to map reset vector\n");
- return -ENODEV;
- }
-#endif /* CONFIG_ARCH_MSM_SCORPION */
-
ret = msm_timer_init_time_sync(msm_pm_timeout);
if (ret)
return ret;
diff --git a/arch/arm/mach-msm/pm2.c b/arch/arm/mach-msm/pm2.c
index 6b24a02..4cdd7ae 100644
--- a/arch/arm/mach-msm/pm2.c
+++ b/arch/arm/mach-msm/pm2.c
@@ -61,6 +61,7 @@
#include "pm.h"
#include "spm.h"
#include "sirc.h"
+#include "pm-boot.h"
/******************************************************************************
* Debug Definitions
@@ -962,7 +963,6 @@
*
*****************************************************************************/
static struct msm_pm_smem_t *msm_pm_smem_data;
-static uint32_t *msm_pm_reset_vector;
static atomic_t msm_pm_init_done = ATOMIC_INIT(0);
static int msm_pm_modem_busy(void)
@@ -991,7 +991,6 @@
{
struct msm_pm_polled_group state_grps[2];
unsigned long saved_acpuclk_rate;
- uint32_t saved_vector[2];
int collapsed = 0;
int ret;
@@ -1078,15 +1077,8 @@
goto power_collapse_early_exit;
}
- saved_vector[0] = msm_pm_reset_vector[0];
- saved_vector[1] = msm_pm_reset_vector[1];
- msm_pm_reset_vector[0] = 0xE51FF004; /* ldr pc, 4 */
- msm_pm_reset_vector[1] = virt_to_phys(msm_pm_collapse_exit);
-
- MSM_PM_DPRINTK(MSM_PM_DEBUG_RESET_VECTOR, KERN_INFO,
- "%s(): vector %x %x -> %x %x\n", __func__,
- saved_vector[0], saved_vector[1],
- msm_pm_reset_vector[0], msm_pm_reset_vector[1]);
+ msm_pm_boot_config_before_pc(smp_processor_id(),
+ virt_to_phys(msm_pm_collapse_exit));
#ifdef CONFIG_VFP
if (from_idle)
@@ -1103,8 +1095,7 @@
l2x0_resume(collapsed);
#endif
- msm_pm_reset_vector[0] = saved_vector[0];
- msm_pm_reset_vector[1] = saved_vector[1];
+ msm_pm_boot_config_after_pc(smp_processor_id());
if (collapsed) {
#ifdef CONFIG_VFP
@@ -1283,7 +1274,6 @@
*/
static int msm_pm_power_collapse_standalone(void)
{
- uint32_t saved_vector[2];
int collapsed = 0;
int ret;
@@ -1293,15 +1283,8 @@
ret = msm_spm_set_low_power_mode(MSM_SPM_MODE_POWER_COLLAPSE, false);
WARN_ON(ret);
- saved_vector[0] = msm_pm_reset_vector[0];
- saved_vector[1] = msm_pm_reset_vector[1];
- msm_pm_reset_vector[0] = 0xE51FF004; /* ldr pc, 4 */
- msm_pm_reset_vector[1] = virt_to_phys(msm_pm_collapse_exit);
-
- MSM_PM_DPRINTK(MSM_PM_DEBUG_RESET_VECTOR, KERN_INFO,
- "%s(): vector %x %x -> %x %x\n", __func__,
- saved_vector[0], saved_vector[1],
- msm_pm_reset_vector[0], msm_pm_reset_vector[1]);
+ msm_pm_boot_config_before_pc(smp_processor_id(),
+ virt_to_phys(msm_pm_collapse_exit));
#ifdef CONFIG_VFP
vfp_flush_context();
@@ -1317,8 +1300,7 @@
l2x0_resume(collapsed);
#endif
- msm_pm_reset_vector[0] = saved_vector[0];
- msm_pm_reset_vector[1] = saved_vector[1];
+ msm_pm_boot_config_after_pc(smp_processor_id());
if (collapsed) {
#ifdef CONFIG_VFP
@@ -1836,21 +1818,6 @@
printk(KERN_ERR "%s: failed to get smsm_data\n", __func__);
return -ENODEV;
}
-#if defined(CONFIG_ARCH_MSM_SCORPION) && !defined(CONFIG_MSM_SMP)
- /* The bootloader is responsible for initializing many of Scorpion's
- * coprocessor registers for things like cache timing. The state of
- * these coprocessor registers is lost on reset, so part of the
- * bootloader must be re-executed. Do not overwrite the reset vector
- * or bootloader area.
- */
- msm_pm_reset_vector = (uint32_t *) PAGE_OFFSET;
-#else
- msm_pm_reset_vector = ioremap(0, PAGE_SIZE);
- if (msm_pm_reset_vector == NULL) {
- printk(KERN_ERR "%s: failed to map reset vector\n", __func__);
- return -ENODEV;
- }
-#endif /* CONFIG_ARCH_MSM_SCORPION */
ret = msm_timer_init_time_sync(msm_pm_timeout);
if (ret)
diff --git a/arch/arm/mach-msm/rpm_resources.c b/arch/arm/mach-msm/rpm_resources.c
index f2b3e88..6bbfee4 100644
--- a/arch/arm/mach-msm/rpm_resources.c
+++ b/arch/arm/mach-msm/rpm_resources.c
@@ -1057,7 +1057,7 @@
static int __init msm_rpmrs_l2_counter_init(void)
{
- if (cpu_is_msm8960()) {
+ if (cpu_is_msm8960() || cpu_is_msm8930()) {
msm_rpmrs_l2_counter_addr = MSM_IMEM_BASE + L2_PC_COUNTER_ADDR;
writel_relaxed(msm_rpmrs_l2_reset_count,
msm_rpmrs_l2_counter_addr);
diff --git a/arch/arm/mach-msm/sdio_al.c b/arch/arm/mach-msm/sdio_al.c
index 8fff2461..891d655 100644
--- a/arch/arm/mach-msm/sdio_al.c
+++ b/arch/arm/mach-msm/sdio_al.c
@@ -878,8 +878,7 @@
*/
static int write_lpm_info(struct sdio_al_device *sdio_al_dev)
{
- struct sdio_func *lpm_func =
- sdio_al_dev->card->sdio_func[sdio_al_dev->lpm_chan+1];
+ struct sdio_func *lpm_func = NULL;
int offset = offsetof(struct peer_sdioc_sw_mailbox, ch_config)+
sizeof(struct peer_sdioc_channel_config) *
sdio_al_dev->lpm_chan+
@@ -893,6 +892,14 @@
return -EINVAL;
}
+ if (!sdio_al_dev->card ||
+ !sdio_al_dev->card->sdio_func[sdio_al_dev->lpm_chan+1]) {
+ sdio_al_loge(sdio_al_dev->dev_log, MODULE_NAME
+ ": NULL card or lpm_func\n");
+ return -ENODEV;
+ }
+ lpm_func = sdio_al_dev->card->sdio_func[sdio_al_dev->lpm_chan+1];
+
pr_debug(MODULE_NAME ":write_lpm_info is_ok_to_sleep=%d, device %d\n",
sdio_al_dev->is_ok_to_sleep,
sdio_al_dev->host->index);
@@ -1900,8 +1907,7 @@
ch->poll_delay_msec = 0;
ch->num = i;
-
- ch->func = sdio_al_dev->card->sdio_func[ch->num+1];
+ ch->func = NULL;
ch->rx_pipe_index = ch->num*2;
ch->tx_pipe_index = ch->num*2+1;
@@ -1916,6 +1922,15 @@
ch->state = SDIO_CHANNEL_STATE_IDLE;
ch->sdio_al_dev = sdio_al_dev;
+ if (sdio_al_dev->card->sdio_func[ch->num+1]) {
+ ch->func =
+ sdio_al_dev->card->sdio_func[ch->num+1];
+ } else {
+ sdio_al_loge(sdio_al_dev->dev_log, MODULE_NAME
+ ": NULL func for channel %s\n",
+ ch->name);
+ goto exit_err;
+ }
} else {
ch->state = SDIO_CHANNEL_STATE_INVALID;
}
@@ -2802,18 +2817,19 @@
{
int ret;
int offset;
- struct sdio_func *wk_func;
+ struct sdio_func *wk_func = NULL;
u32 peer_operation;
int loop_count = 0;
- wk_func = sdio_al_dev->card->sdio_func[SDIO_AL_WAKEUP_FUNC-1];
- if (!wk_func) {
- sdio_al_loge(sdio_al_dev->dev_log, MODULE_NAME ":%s: NULL "
- "wakeup func:%d\n", __func__,
- SDIO_AL_WAKEUP_FUNC);
+ if (!sdio_al_dev->card ||
+ !sdio_al_dev->card->sdio_func[SDIO_AL_WAKEUP_FUNC-1]) {
+ sdio_al_loge(sdio_al_dev->dev_log, MODULE_NAME
+ ": NULL card or wk_func\n");
ret = -ENODEV;
goto exit;
}
+ wk_func = sdio_al_dev->card->sdio_func[SDIO_AL_WAKEUP_FUNC-1];
+
/* calculate offset of peer_operation field in sw mailbox struct */
offset = offsetof(struct peer_sdioc_sw_mailbox, ch_config) +
sizeof(struct peer_sdioc_channel_config) * ch->num +
@@ -3440,7 +3456,6 @@
*sdio_al_dev)
{
int ret = 0;
- struct sdio_func *func1 = NULL;
struct platform_device *pdev_arr[SDIO_AL_MAX_CHANNELS];
int j;
@@ -3449,13 +3464,6 @@
if (sdio_al_claim_mutex_and_verify_dev(sdio_al_dev, __func__))
return;
- if (!sdio_al_dev->card || !sdio_al_dev->card->sdio_func[0]) {
- sdio_al_loge(&sdio_al->gen_log, MODULE_NAME ": %s: "
- "NULL func1 for card %d", __func__,
- sdio_al_dev->host->index);
- goto exit_err;
- }
-
if (sdio_al_dev->state == CARD_REMOVED) {
sdio_al_logi(&sdio_al->gen_log, MODULE_NAME ": %s: "
"card %d is already removed", __func__,
@@ -3487,13 +3495,13 @@
ret = sdio_al_wake_up(sdio_al_dev, 1, NULL);
}
- if (!ret && (!sdio_al_dev->is_err)) {
- sdio_al_logi(sdio_al_dev->dev_log, MODULE_NAME
+ if (!ret && (!sdio_al_dev->is_err) && sdio_al_dev->card &&
+ sdio_al_dev->card->sdio_func[0]) {
+ sdio_al_logi(sdio_al_dev->dev_log, MODULE_NAME
": %s: sdio_release_irq for card %d",
__func__,
sdio_al_dev->host->index);
- func1 = sdio_al_dev->card->sdio_func[0];
- sdio_release_irq(sdio_al_dev->card->sdio_func[0]);
+ sdio_release_irq(sdio_al_dev->card->sdio_func[0]);
}
memset(pdev_arr, 0, sizeof(pdev_arr));
diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
index 532a2f7..eeaab60 100644
--- a/arch/arm/mach-msm/smd.c
+++ b/arch/arm/mach-msm/smd.c
@@ -172,7 +172,8 @@
#define MSM_TRIG_A2DSPS_SMSM_INT
#define MSM_TRIG_A2WCNSS_SMD_INT
#define MSM_TRIG_A2WCNSS_SMSM_INT
-#elif defined(CONFIG_ARCH_MSM8960)
+#elif defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_MSM8930) || \
+ defined(CONFIG_ARCH_APQ8064)
#define MSM_TRIG_A2M_SMD_INT \
(smd_write_intr(1 << 3, MSM_APCS_GCC_BASE + 0x8))
#define MSM_TRIG_A2Q6_SMD_INT \
@@ -202,23 +203,6 @@
#define MSM_TRIG_A2DSPS_SMSM_INT
#define MSM_TRIG_A2WCNSS_SMD_INT
#define MSM_TRIG_A2WCNSS_SMSM_INT
-#elif defined(CONFIG_ARCH_APQ8064)
-#define MSM_TRIG_A2M_SMD_INT \
- (smd_write_intr(1 << 3, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2Q6_SMD_INT \
- (smd_write_intr(1 << 15, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2M_SMSM_INT \
- (smd_write_intr(1 << 4, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2Q6_SMSM_INT \
- (smd_write_intr(1 << 14, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2DSPS_SMD_INT \
- (smd_write_intr(1, MSM_SIC_NON_SECURE_BASE + 0x4080))
-#define MSM_TRIG_A2DSPS_SMSM_INT \
- (smd_write_intr(1, MSM_SIC_NON_SECURE_BASE + 0x4094))
-#define MSM_TRIG_A2WCNSS_SMD_INT \
- (smd_write_intr(1 << 25, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2WCNSS_SMSM_INT \
- (smd_write_intr(1 << 23, MSM_APCS_GCC_BASE + 0x8))
#elif defined(CONFIG_ARCH_FSM9XXX)
#define MSM_TRIG_A2Q6_SMD_INT \
(smd_write_intr(1 << 10, MSM_GCC_BASE + 0x8))
@@ -277,8 +261,10 @@
* trigger GPIO 40 to wake up RIVA from power collaspe
* not to be sent to customers
*/
- __raw_writel(0x0, MSM_TLMM_BASE + 0x1284);
- __raw_writel(0x2, MSM_TLMM_BASE + 0x1284);
+ if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 1) {
+ __raw_writel(0x0, MSM_TLMM_BASE + 0x1284);
+ __raw_writel(0x2, MSM_TLMM_BASE + 0x1284);
+ }
/* end workaround */
}
#else
@@ -297,17 +283,15 @@
if (smsm_info.intr_mask &&
(__raw_readl(SMSM_INTR_MASK_ADDR(smsm_entry, SMSM_Q6))
& notify_mask)) {
-#if !defined(CONFIG_ARCH_MSM8X60) && !defined(MCONFIG_ARCH_MSM8960)
uint32_t mux_val;
- if (smsm_info.intr_mux) {
+ if (cpu_is_qsd8x50() && smsm_info.intr_mux) {
mux_val = __raw_readl(
SMSM_INTR_MUX_ADDR(SMEM_APPS_Q6_SMSM));
mux_val++;
__raw_writel(mux_val,
SMSM_INTR_MUX_ADDR(SMEM_APPS_Q6_SMSM));
}
-#endif
MSM_TRIG_A2Q6_SMSM_INT;
}
@@ -2041,23 +2025,20 @@
{
unsigned long flags;
-#if !defined(CONFIG_ARCH_MSM8X60)
- uint32_t mux_val;
- static uint32_t prev_smem_q6_apps_smsm;
-
if (irq == INT_ADSP_A11_SMSM) {
- if (!smsm_info.intr_mux)
- return IRQ_HANDLED;
- mux_val = __raw_readl(SMSM_INTR_MUX_ADDR(SMEM_Q6_APPS_SMSM));
- if (mux_val != prev_smem_q6_apps_smsm)
- prev_smem_q6_apps_smsm = mux_val;
+ uint32_t mux_val;
+ static uint32_t prev_smem_q6_apps_smsm;
+
+ if (smsm_info.intr_mux && cpu_is_qsd8x50()) {
+ mux_val = __raw_readl(
+ SMSM_INTR_MUX_ADDR(SMEM_Q6_APPS_SMSM));
+ if (mux_val != prev_smem_q6_apps_smsm)
+ prev_smem_q6_apps_smsm = mux_val;
+ }
+
+ schedule_work(&smsm_cb_work);
return IRQ_HANDLED;
}
-#else
- if (irq == INT_ADSP_A11_SMSM)
- return IRQ_HANDLED;
-#endif
-
spin_lock_irqsave(&smem_lock, flags);
if (!smsm_info.state) {
@@ -2073,7 +2054,7 @@
/* If we get an interrupt and the apps SMSM_RESET
bit is already set, the modem is acking the
app's reset ack. */
- if (!cpu_is_msm8960())
+ if (!cpu_is_msm8960() && !cpu_is_msm8930())
apps &= ~SMSM_RESET;
/* Issue a fake irq to handle any
* smd state changes during reset
@@ -2084,7 +2065,7 @@
modem_queue_start_reset_notify();
} else if (modm & SMSM_RESET) {
- if (!cpu_is_msm8960())
+ if (!cpu_is_msm8960() && !cpu_is_msm8930())
apps |= SMSM_RESET;
pr_err("\nSMSM: Modem SMSM state changed to SMSM_RESET.");
diff --git a/arch/arm/mach-msm/subsystem_restart.c b/arch/arm/mach-msm/subsystem_restart.c
index b862ad4..ff699e2 100644
--- a/arch/arm/mach-msm/subsystem_restart.c
+++ b/arch/arm/mach-msm/subsystem_restart.c
@@ -569,7 +569,7 @@
n_restart_orders = ARRAY_SIZE(orders_8x60_all);
}
- if (cpu_is_msm8960()) {
+ if (cpu_is_msm8960() || cpu_is_msm8930()) {
restart_orders = restart_orders_8960;
n_restart_orders = ARRAY_SIZE(restart_orders_8960);
}
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index a0602f0..1df3c23 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -27,6 +27,7 @@
#include <asm/mach/time.h>
#include <asm/hardware/gic.h>
#include <asm/sched_clock.h>
+#include <asm/smp_plat.h>
#include <mach/msm_iomap.h>
#include <mach/irqs.h>
#include <mach/socinfo.h>
@@ -278,14 +279,15 @@
static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt)
{
-#ifdef CONFIG_SMP
int i;
+
+ if (!is_smp())
+ return container_of(evt, struct msm_clock, clockevent);
+
for (i = 0; i < NR_TIMERS; i++)
if (evt == &(msm_clocks[i].clockevent))
return &msm_clocks[i];
return &msm_clocks[msm_global_timer];
-#endif
- return container_of(evt, struct msm_clock, clockevent);
}
static int msm_timer_set_next_event(unsigned long cycles,
@@ -334,6 +336,7 @@
struct msm_clock *clock;
struct msm_clock_percpu_data *clock_state, *gpt_state;
unsigned long irq_flags;
+ struct irq_chip *chip;
clock = clockevent_to_clock(evt);
clock_state = &__get_cpu_var(msm_clocks_percpu)[clock->index];
@@ -353,11 +356,9 @@
get_cpu_var(msm_active_clock) = clock;
put_cpu_var(msm_active_clock);
__raw_writel(TIMER_ENABLE_EN, clock->regbase + TIMER_ENABLE);
- if (irq_get_chip(clock->irq.irq) &&
- irq_get_chip(clock->irq.irq)->irq_unmask) {
- irq_get_chip(clock->irq.irq)->irq_unmask(
- irq_get_irq_data(clock->irq.irq));
- }
+ chip = irq_get_chip(clock->irq.irq);
+ if (chip && chip->irq_unmask)
+ chip->irq_unmask(irq_get_irq_data(clock->irq.irq));
if (clock != &msm_clocks[MSM_CLOCK_GPT])
__raw_writel(TIMER_ENABLE_EN,
msm_clocks[MSM_CLOCK_GPT].regbase +
@@ -373,15 +374,14 @@
msm_read_timer_count(clock, LOCAL_TIMER) +
clock_state->sleep_offset;
__raw_writel(0, clock->regbase + TIMER_MATCH_VAL);
- if (irq_get_chip(clock->irq.irq) &&
- irq_get_chip(clock->irq.irq)->irq_mask) {
- irq_get_chip(clock->irq.irq)->irq_mask(
- irq_get_irq_data(clock->irq.irq));
- }
-#ifdef CONFIG_MSM_SMP
- if (clock != &msm_clocks[MSM_CLOCK_DGT] || smp_processor_id())
-#endif
+ chip = irq_get_chip(clock->irq.irq);
+ if (chip && chip->irq_mask)
+ chip->irq_mask(irq_get_irq_data(clock->irq.irq));
+
+ if (!is_smp() || clock != &msm_clocks[MSM_CLOCK_DGT]
+ || smp_processor_id())
__raw_writel(0, clock->regbase + TIMER_ENABLE);
+
if (clock != &msm_clocks[MSM_CLOCK_GPT]) {
gpt_state->in_sync = 0;
__raw_writel(0, msm_clocks[MSM_CLOCK_GPT].regbase +
@@ -952,14 +952,12 @@
update_sched_clock(&cd, cyc, ((u32)~0) >> clock->shift);
}
-#ifdef CONFIG_MSM_SMP
int read_current_timer(unsigned long *timer_val)
{
struct msm_clock *dgt = &msm_clocks[MSM_CLOCK_DGT];
*timer_val = msm_read_timer_count(dgt, GLOBAL_TIMER);
return 0;
}
-#endif
static void __init msm_sched_clock_init(void)
{
@@ -972,6 +970,7 @@
{
int i;
int res;
+ struct irq_chip *chip;
struct msm_clock *dgt = &msm_clocks[MSM_CLOCK_DGT];
struct msm_clock *gpt = &msm_clocks[MSM_CLOCK_GPT];
@@ -1055,16 +1054,19 @@
printk(KERN_ERR "msm_timer_init: setup_irq "
"failed for %s\n", cs->name);
- irq_get_chip(clock->irq.irq)->irq_mask(irq_get_irq_data(
- clock->irq.irq));
+ chip = irq_get_chip(clock->irq.irq);
+ if (chip && chip->irq_mask)
+ chip->irq_mask(irq_get_irq_data(clock->irq.irq));
clockevents_register_device(ce);
}
msm_sched_clock_init();
-#ifdef CONFIG_MSM_SMP
- __raw_writel(1, msm_clocks[MSM_CLOCK_DGT].regbase + TIMER_ENABLE);
- set_delay_fn(read_current_timer_delay_loop);
-#endif
+
+ if (is_smp()) {
+ __raw_writel(1,
+ msm_clocks[MSM_CLOCK_DGT].regbase + TIMER_ENABLE);
+ set_delay_fn(read_current_timer_delay_loop);
+ }
}
#ifdef CONFIG_SMP
@@ -1080,7 +1082,9 @@
return 0;
global_timer_offset = MSM_TMR0_BASE - MSM_TMR_BASE;
- __raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
+ if (cpu_is_msm8x60() || cpu_is_msm8960() || cpu_is_apq8064()
+ || cpu_is_msm8930())
+ __raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
if (__get_cpu_var(first_boot)) {
__raw_writel(0, clock->regbase + TIMER_ENABLE);
diff --git a/drivers/base/iommu.c b/drivers/base/iommu.c
index 1377e85..6507d8b 100644
--- a/drivers/base/iommu.c
+++ b/drivers/base/iommu.c
@@ -45,6 +45,9 @@
struct iommu_domain *domain;
int ret;
+ if (!iommu_found())
+ return NULL;
+
domain = kmalloc(sizeof(*domain), GFP_KERNEL);
if (!domain)
return NULL;
@@ -64,6 +67,9 @@
void iommu_domain_free(struct iommu_domain *domain)
{
+ if (!iommu_found())
+ return;
+
iommu_ops->domain_destroy(domain);
kfree(domain);
}
@@ -71,12 +77,18 @@
int iommu_attach_device(struct iommu_domain *domain, struct device *dev)
{
+ if (!iommu_found())
+ return -ENODEV;
+
return iommu_ops->attach_dev(domain, dev);
}
EXPORT_SYMBOL_GPL(iommu_attach_device);
void iommu_detach_device(struct iommu_domain *domain, struct device *dev)
{
+ if (!iommu_found())
+ return;
+
iommu_ops->detach_dev(domain, dev);
}
EXPORT_SYMBOL_GPL(iommu_detach_device);
@@ -84,6 +96,9 @@
phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain,
unsigned long iova)
{
+ if (!iommu_found())
+ return 0;
+
return iommu_ops->iova_to_phys(domain, iova);
}
EXPORT_SYMBOL_GPL(iommu_iova_to_phys);
@@ -91,6 +106,9 @@
int iommu_domain_has_cap(struct iommu_domain *domain,
unsigned long cap)
{
+ if (!iommu_found())
+ return -ENODEV;
+
return iommu_ops->domain_has_cap(domain, cap);
}
EXPORT_SYMBOL_GPL(iommu_domain_has_cap);
@@ -101,6 +119,9 @@
unsigned long invalid_mask;
size_t size;
+ if (!iommu_found())
+ return -ENODEV;
+
size = 0x1000UL << gfp_order;
invalid_mask = size - 1;
@@ -115,6 +136,9 @@
unsigned long invalid_mask;
size_t size;
+ if (!iommu_found())
+ return -ENODEV;
+
size = 0x1000UL << gfp_order;
invalid_mask = size - 1;
@@ -127,6 +151,9 @@
int iommu_map_range(struct iommu_domain *domain, unsigned int iova,
struct scatterlist *sg, unsigned int len, int prot)
{
+ if (!iommu_found())
+ return -ENODEV;
+
BUG_ON(iova & (~PAGE_MASK));
return iommu_ops->map_range(domain, iova, sg, len, prot);
@@ -136,6 +163,9 @@
int iommu_unmap_range(struct iommu_domain *domain, unsigned int iova,
unsigned int len)
{
+ if (!iommu_found())
+ return -ENODEV;
+
BUG_ON(iova & (~PAGE_MASK));
return iommu_ops->unmap_range(domain, iova, len);
diff --git a/drivers/bluetooth/hci_smd.c b/drivers/bluetooth/hci_smd.c
index f3e0f6c..2ecddcf 100644
--- a/drivers/bluetooth/hci_smd.c
+++ b/drivers/bluetooth/hci_smd.c
@@ -147,7 +147,7 @@
goto out_data;
}
- rc = smd_read_from_cb(hsmd->data_channel, (void *)buf, len);
+ rc = smd_read(hsmd->data_channel, (void *)buf, len);
if (rc < len) {
BT_ERR("Error in reading from the channel");
goto out_data;
@@ -220,7 +220,7 @@
rc = -ENOMEM;
goto out_event;
}
- rc = smd_read_from_cb(hsmd->event_channel, (void *)buf, len);
+ rc = smd_read(hsmd->event_channel, (void *)buf, len);
if (rc < len) {
BT_ERR("Error in reading from the event channel");
goto out_event;
diff --git a/drivers/char/diag/diagchar_core.c b/drivers/char/diag/diagchar_core.c
index eabdb4f..0729753 100644
--- a/drivers/char/diag/diagchar_core.c
+++ b/drivers/char/diag/diagchar_core.c
@@ -142,7 +142,7 @@
if (diagpriv_data)
diagpriv_data->pid = current->tgid;
file->private_data = diagpriv_data;
- strncpy(driver->client_map[i].name, current->comm, 20);
+ strlcpy(driver->client_map[i].name, current->comm, 20);
driver->client_map[i].name[19] = '\0';
}
diff --git a/drivers/char/diag/diagfwd.c b/drivers/char/diag/diagfwd.c
index caf3901..0ae987a 100644
--- a/drivers/char/diag/diagfwd.c
+++ b/drivers/char/diag/diagfwd.c
@@ -503,7 +503,7 @@
} else {
if (len > 0) {
if (entry.client_id == MODEM_PROC && driver->ch) {
- if (cpu_is_msm8960() &&
+ if ((cpu_is_msm8960() || cpu_is_msm8930()) &&
(int)(*(char *)buf) == MODE_CMD)
if ((int)(*(char *)(buf+1)) == RESET_ID)
return;
@@ -542,7 +542,7 @@
temp += 2;
data_type = APPS_DATA;
/* Dont send any command other than mode reset */
- if (cpu_is_msm8960() && cmd_code == MODE_CMD) {
+ if ((cpu_is_msm8960() || cpu_is_msm8930()) && cmd_code == MODE_CMD) {
if (subsys_id != RESET_ID)
data_type = MODEM_DATA;
}
@@ -826,7 +826,8 @@
return 0;
}
/* Check for download command */
- else if ((cpu_is_msm8x60() || cpu_is_msm8960()) && (*buf == 0x3A)) {
+ else if ((cpu_is_msm8x60() || cpu_is_msm8960() || cpu_is_msm8930())
+ && (*buf == 0x3A)) {
/* send response back */
driver->apps_rsp_buf[0] = *buf;
ENCODE_RSP_AND_SEND(0);
diff --git a/drivers/char/hw_random/msm_rng.c b/drivers/char/hw_random/msm_rng.c
index 5937c78..b03a4ec 100644
--- a/drivers/char/hw_random/msm_rng.c
+++ b/drivers/char/hw_random/msm_rng.c
@@ -22,6 +22,7 @@
#include <linux/io.h>
#include <linux/err.h>
#include <linux/types.h>
+#include <mach/msm_iomap.h>
#include <mach/socinfo.h>
#define DRIVER_NAME "msm_rng"
@@ -36,11 +37,12 @@
#define PRNG_LFSR_CFG_MASK 0xFFFF0000
#define PRNG_LFSR_CFG_CLOCKS 0x0000DDDD
#define PRNG_CONFIG_MASK 0xFFFFFFFD
-#define PRNG_CONFIG_ENABLE 0x00000002
+#define PRNG_HW_ENABLE 0x00000002
#define MAX_HW_FIFO_DEPTH 16 /* FIFO is 16 words deep */
#define MAX_HW_FIFO_SIZE (MAX_HW_FIFO_DEPTH * 4) /* FIFO is 32 bits wide */
+
struct msm_rng_device {
struct platform_device *pdev;
void __iomem *base;
@@ -110,40 +112,43 @@
static int __devinit msm_rng_enable_hw(struct msm_rng_device *msm_rng_dev)
{
unsigned long val = 0;
+ unsigned long reg_val = 0;
int ret = 0;
- int error = 0;
+ /* Enable the PRNG CLK */
ret = clk_enable(msm_rng_dev->prng_clk);
if (ret) {
dev_err(&(msm_rng_dev->pdev)->dev,
"failed to enable clock in probe\n");
- error = -EPERM;
- return error;
+ return -EPERM;
}
-
- /* enable PRNG h/w*/
val = readl_relaxed(msm_rng_dev->base + PRNG_LFSR_CFG_OFFSET) &
- PRNG_LFSR_CFG_MASK;
+ PRNG_LFSR_CFG_MASK;
val |= PRNG_LFSR_CFG_MASK;
writel_relaxed(val, msm_rng_dev->base + PRNG_LFSR_CFG_OFFSET);
- /* The PRNG CONFIG register should be read after writing to the
- * PRNG_LFSR_CFG register.
- */
+ /* The PRNG CONFIG register should be first written before reading */
mb();
- val = readl_relaxed(msm_rng_dev->base + PRNG_CONFIG_OFFSET) &
- PRNG_CONFIG_MASK;
- val |= PRNG_CONFIG_ENABLE;
- writel_relaxed(val, msm_rng_dev->base + PRNG_CONFIG_OFFSET);
- /* The PRNG clk should be disabled only after we have enabled the
- * PRNG H/W by writting to the PRNG_CONFIG register.
- */
- mb();
+ /* Enable PRNG h/w only if it is NOT ON */
+ val = readl_relaxed(msm_rng_dev->base + PRNG_CONFIG_OFFSET) &
+ PRNG_HW_ENABLE;
+ /* PRNG H/W is not ON */
+ if (val != PRNG_HW_ENABLE) {
+ reg_val = readl_relaxed(msm_rng_dev->base + PRNG_CONFIG_OFFSET)
+ & PRNG_CONFIG_MASK;
+ reg_val |= PRNG_HW_ENABLE;
+ writel_relaxed(reg_val, msm_rng_dev->base + PRNG_CONFIG_OFFSET);
+
+ /* The PRNG clk should be disabled only after we enable the
+ * PRNG h/w by writing to the PRNG CONFIG register.
+ */
+ mb();
+ }
clk_disable(msm_rng_dev->prng_clk);
- return error;
+ return 0;
}
static int __devinit msm_rng_probe(struct platform_device *pdev)
@@ -188,8 +193,7 @@
platform_set_drvdata(pdev, msm_rng_dev);
/* Enable rng h/w */
- if (cpu_is_msm9615())
- error = msm_rng_enable_hw(msm_rng_dev);
+ error = msm_rng_enable_hw(msm_rng_dev);
if (error)
goto rollback_clk;
diff --git a/drivers/crypto/msm/qcedev.c b/drivers/crypto/msm/qcedev.c
index 405d021..3ae1647 100644
--- a/drivers/crypto/msm/qcedev.c
+++ b/drivers/crypto/msm/qcedev.c
@@ -439,7 +439,7 @@
creq.alg = CIPHER_ALG_AES;
break;
default:
- break;
+ return -EINVAL;
};
switch (qcedev_areq->cipher_op_req.mode) {
@@ -458,7 +458,7 @@
creq.mode = QCE_MODE_XTS;
break;
default:
- break;
+ return -EINVAL;
};
if ((creq.alg == CIPHER_ALG_AES) &&
diff --git a/drivers/crypto/msm/qcrypto.c b/drivers/crypto/msm/qcrypto.c
index 73627d4..67301877 100644
--- a/drivers/crypto/msm/qcrypto.c
+++ b/drivers/crypto/msm/qcrypto.c
@@ -889,6 +889,9 @@
if (areq->assoclen)
qreq->nonce[0] |= 64;
+ if (i > MAX_NONCE)
+ return -EINVAL;
+
return aead_ccm_set_msg_len(qreq->nonce + 16 - i, qreq->cryptlen, i);
}
diff --git a/drivers/gpu/ion/ion.c b/drivers/gpu/ion/ion.c
index 3bc3280..60bc276 100644
--- a/drivers/gpu/ion/ion.c
+++ b/drivers/gpu/ion/ion.c
@@ -674,8 +674,8 @@
return ERR_PTR(-EINVAL);
}
if (file->f_op != &ion_share_fops) {
- pr_err("%s: imported file is not a shared ion file.\n",
- __func__);
+ pr_err("%s: imported file %s is not a shared ion"
+ " file.", __func__, file->f_dentry->d_name.name);
handle = ERR_PTR(-EINVAL);
goto end;
}
@@ -697,7 +697,7 @@
struct ion_handle *handle = rb_entry(n, struct ion_handle,
node);
- seq_printf(s, "%16.16s: %16u : %16d : %16p\n",
+ seq_printf(s, "%16.16s: %16x : %16d : %16p\n",
handle->buffer->heap->name,
handle->buffer->size,
atomic_read(&handle->ref.refcount),
@@ -871,9 +871,32 @@
void ion_client_destroy(struct ion_client *client)
{
- ion_client_put(client);
+ if (client)
+ ion_client_put(client);
}
+int ion_handle_get_flags(struct ion_client *client, struct ion_handle *handle,
+ unsigned long *flags)
+{
+ struct ion_buffer *buffer;
+
+ mutex_lock(&client->lock);
+ if (!ion_handle_validate(client, handle)) {
+ pr_err("%s: invalid handle passed to %s.\n",
+ __func__, __func__);
+ mutex_unlock(&client->lock);
+ return -EINVAL;
+ }
+ buffer = handle->buffer;
+ mutex_lock(&buffer->lock);
+ *flags = buffer->flags;
+ mutex_unlock(&buffer->lock);
+ mutex_unlock(&client->lock);
+
+ return 0;
+}
+EXPORT_SYMBOL(ion_handle_get_flags);
+
static int ion_share_release(struct inode *inode, struct file* file)
{
struct ion_buffer *buffer = file->private_data;
@@ -1160,6 +1183,22 @@
data.offset, data.length, cmd);
}
+ case ION_IOC_GET_FLAGS:
+ {
+ struct ion_flag_data data;
+ int ret;
+ if (copy_from_user(&data, (void __user *)arg,
+ sizeof(struct ion_flag_data)))
+ return -EFAULT;
+
+ ret = ion_handle_get_flags(client, data.handle, &data.flags);
+ if (ret < 0)
+ return ret;
+ if (copy_to_user((void __user *)arg, &data,
+ sizeof(struct ion_flag_data)))
+ return -EFAULT;
+ break;
+ }
default:
return -ENOTTY;
}
@@ -1198,7 +1237,7 @@
};
static size_t ion_debug_heap_total(struct ion_client *client,
- enum ion_heap_type type)
+ enum ion_heap_ids id)
{
size_t size = 0;
struct rb_node *n;
@@ -1208,7 +1247,7 @@
struct ion_handle *handle = rb_entry(n,
struct ion_handle,
node);
- if (handle->buffer->heap->type == type)
+ if (handle->buffer->heap->id == id)
size += handle->buffer->size;
}
mutex_unlock(&client->lock);
@@ -1226,22 +1265,22 @@
struct ion_client *client = rb_entry(n, struct ion_client,
node);
char task_comm[TASK_COMM_LEN];
- size_t size = ion_debug_heap_total(client, heap->type);
+ size_t size = ion_debug_heap_total(client, heap->id);
if (!size)
continue;
get_task_comm(task_comm, client->task);
- seq_printf(s, "%16.s %16u %16u\n", task_comm, client->pid,
+ seq_printf(s, "%16.s %16u %16x\n", task_comm, client->pid,
size);
}
for (n = rb_first(&dev->kernel_clients); n; n = rb_next(n)) {
struct ion_client *client = rb_entry(n, struct ion_client,
node);
- size_t size = ion_debug_heap_total(client, heap->type);
+ size_t size = ion_debug_heap_total(client, heap->id);
if (!size)
continue;
- seq_printf(s, "%16.s %16u %16u\n", client->name, client->pid,
+ seq_printf(s, "%16.s %16u %16x\n", client->name, client->pid,
size);
}
if (heap->ops->get_allocated) {
@@ -1298,6 +1337,83 @@
mutex_unlock(&dev->lock);
}
+static int ion_debug_leak_show(struct seq_file *s, void *unused)
+{
+ struct ion_device *dev = s->private;
+ struct rb_node *n;
+ struct rb_node *n2;
+
+ /* mark all buffers as 1 */
+ seq_printf(s, "%16.s %16.s %16.s %16.s\n", "buffer", "heap", "size",
+ "ref cnt");
+ mutex_lock(&dev->lock);
+ for (n = rb_first(&dev->buffers); n; n = rb_next(n)) {
+ struct ion_buffer *buf = rb_entry(n, struct ion_buffer,
+ node);
+
+ buf->marked = 1;
+ }
+
+ /* now see which buffers we can access */
+ for (n = rb_first(&dev->kernel_clients); n; n = rb_next(n)) {
+ struct ion_client *client = rb_entry(n, struct ion_client,
+ node);
+
+ mutex_lock(&client->lock);
+ for (n2 = rb_first(&client->handles); n2; n2 = rb_next(n2)) {
+ struct ion_handle *handle = rb_entry(n2,
+ struct ion_handle, node);
+
+ handle->buffer->marked = 0;
+
+ }
+ mutex_unlock(&client->lock);
+
+ }
+
+ for (n = rb_first(&dev->user_clients); n; n = rb_next(n)) {
+ struct ion_client *client = rb_entry(n, struct ion_client,
+ node);
+
+ mutex_lock(&client->lock);
+ for (n2 = rb_first(&client->handles); n2; n2 = rb_next(n2)) {
+ struct ion_handle *handle = rb_entry(n2,
+ struct ion_handle, node);
+
+ handle->buffer->marked = 0;
+
+ }
+ mutex_unlock(&client->lock);
+
+ }
+ /* And anyone still marked as a 1 means a leaked handle somewhere */
+ for (n = rb_first(&dev->buffers); n; n = rb_next(n)) {
+ struct ion_buffer *buf = rb_entry(n, struct ion_buffer,
+ node);
+
+ if (buf->marked == 1)
+ seq_printf(s, "%16.x %16.s %16.x %16.d\n",
+ (int)buf, buf->heap->name, buf->size,
+ atomic_read(&buf->ref.refcount));
+ }
+ mutex_unlock(&dev->lock);
+ return 0;
+}
+
+static int ion_debug_leak_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, ion_debug_leak_show, inode->i_private);
+}
+
+static const struct file_operations debug_leak_fops = {
+ .open = ion_debug_leak_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+
+
struct ion_device *ion_device_create(long (*custom_ioctl)
(struct ion_client *client,
unsigned int cmd,
@@ -1330,6 +1446,8 @@
idev->heaps = RB_ROOT;
idev->user_clients = RB_ROOT;
idev->kernel_clients = RB_ROOT;
+ debugfs_create_file("check_leaked_fds", 0664, idev->debug_root, idev,
+ &debug_leak_fops);
return idev;
}
diff --git a/drivers/gpu/ion/ion_carveout_heap.c b/drivers/gpu/ion/ion_carveout_heap.c
index a572ca8..f6097ac 100644
--- a/drivers/gpu/ion/ion_carveout_heap.c
+++ b/drivers/gpu/ion/ion_carveout_heap.c
@@ -44,8 +44,17 @@
unsigned long offset = gen_pool_alloc_aligned(carveout_heap->pool,
size, ilog2(align));
- if (!offset)
+ if (!offset) {
+ if ((carveout_heap->total_size -
+ carveout_heap->allocated_bytes) > size)
+ pr_debug("%s: heap %s has enough memory (%lx) but"
+ " the allocation of size %lx still failed."
+ " Memory is probably fragmented.",
+ __func__, heap->name,
+ carveout_heap->total_size -
+ carveout_heap->allocated_bytes, size);
return ION_CARVEOUT_ALLOCATE_FAIL;
+ }
carveout_heap->allocated_bytes += size;
return offset;
diff --git a/drivers/gpu/ion/ion_priv.h b/drivers/gpu/ion/ion_priv.h
index 10e2219..888b599 100644
--- a/drivers/gpu/ion/ion_priv.h
+++ b/drivers/gpu/ion/ion_priv.h
@@ -72,6 +72,7 @@
int dmap_cnt;
struct scatterlist *sglist;
int umap_cnt;
+ int marked;
};
/**
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 4207def..7599894 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -359,7 +359,7 @@
* adreno 22x gpus are indicated by coreid 2,
* but REG_RBBM_PERIPHID1 always contains 0 for this field
*/
- if (cpu_is_msm8960() || cpu_is_msm8x60())
+ if (cpu_is_msm8960() || cpu_is_msm8x60() || cpu_is_msm8930())
chipid = 2 << 24;
else
chipid = (coreid & 0xF) << 24;
@@ -536,7 +536,7 @@
adreno_regwrite(device, REG_SQ_VS_PROGRAM, 0x00000000);
adreno_regwrite(device, REG_SQ_PS_PROGRAM, 0x00000000);
- if (cpu_is_msm8960())
+ if (cpu_is_msm8960() || cpu_is_msm8930())
adreno_regwrite(device, REG_RBBM_PM_OVERRIDE1, 0x200);
else
adreno_regwrite(device, REG_RBBM_PM_OVERRIDE1, 0);
diff --git a/drivers/gpu/msm/kgsl_cffdump.c b/drivers/gpu/msm/kgsl_cffdump.c
index d419592..aa33152 100644
--- a/drivers/gpu/msm/kgsl_cffdump.c
+++ b/drivers/gpu/msm/kgsl_cffdump.c
@@ -363,7 +363,7 @@
/*TODO: move this to where we can report correct gmemsize*/
unsigned int va_base;
- if (cpu_is_msm8x60() || cpu_is_msm8960())
+ if (cpu_is_msm8x60() || cpu_is_msm8960() || cpu_is_msm8930())
va_base = 0x40000000;
else
va_base = 0x20000000;
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index aee42a1..343a39a 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -583,8 +583,7 @@
mutex_lock(&device->mutex);
if (device->state & (KGSL_STATE_ACTIVE | KGSL_STATE_NAP)) {
- if (device->ftbl->isidle(device) &&
- (device->requested_state != KGSL_STATE_SLEEP))
+ if (device->requested_state != KGSL_STATE_SLEEP)
kgsl_pwrscale_idle(device);
if (kgsl_pwrctrl_sleep(device) != 0) {
diff --git a/drivers/gpu/msm/kgsl_pwrscale_trustzone.c b/drivers/gpu/msm/kgsl_pwrscale_trustzone.c
index 45f7607..f3e84e4 100644
--- a/drivers/gpu/msm/kgsl_pwrscale_trustzone.c
+++ b/drivers/gpu/msm/kgsl_pwrscale_trustzone.c
@@ -166,7 +166,7 @@
struct tz_priv *priv;
/* Trustzone is only valid for some SOCs */
- if (!(cpu_is_msm8x60() || cpu_is_msm8960()))
+ if (!(cpu_is_msm8x60() || cpu_is_msm8960() || cpu_is_msm8930()))
return -EINVAL;
priv = pwrscale->priv = kzalloc(sizeof(struct tz_priv), GFP_KERNEL);
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index feb345d..60c200e 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -354,7 +354,7 @@
config LEDS_MSM_PMIC
tristate "LED Support for Qualcomm PMIC connected LEDs"
- default y
+ default n
depends on ARCH_MSM
help
This option enables support for LEDs connected over PMIC
diff --git a/drivers/leds/led-class.c b/drivers/leds/led-class.c
index b9520c8..b76b6d9 100644
--- a/drivers/leds/led-class.c
+++ b/drivers/leds/led-class.c
@@ -20,53 +20,12 @@
#include <linux/err.h>
#include <linux/ctype.h>
#include <linux/leds.h>
-#include <linux/slab.h>
#include "leds.h"
#define LED_BUFF_SIZE 50
static struct class *leds_class;
-#ifdef CONFIG_HAS_EARLYSUSPEND
-
-static void change_brightness(struct work_struct *brightness_change_data)
-{
- struct deferred_brightness_change *brightness_change = container_of(
- brightness_change_data,
- struct deferred_brightness_change,
- brightness_change_work);
- struct led_classdev *led_cdev = brightness_change->led_cdev;
- enum led_brightness value = brightness_change->value;
-
- led_cdev->brightness_set(led_cdev, value);
-
- /* Free up memory for the brightness_change structure. */
- kfree(brightness_change);
-}
-
-int queue_brightness_change(struct led_classdev *led_cdev,
- enum led_brightness value)
-{
- /* Initialize the brightness_change_work and its super-struct. */
- struct deferred_brightness_change *brightness_change =
- kzalloc(sizeof(struct deferred_brightness_change), GFP_KERNEL);
-
- if (!brightness_change)
- return -ENOMEM;
-
- brightness_change->led_cdev = led_cdev;
- brightness_change->value = value;
-
- INIT_WORK(&(brightness_change->brightness_change_work),
- change_brightness);
- queue_work(suspend_work_queue,
- &(brightness_change->brightness_change_work));
-
- return 0;
-}
-
-#endif
-
static void led_update_brightness(struct led_classdev *led_cdev)
{
if (led_cdev->brightness_get)
diff --git a/drivers/leds/leds.h b/drivers/leds/leds.h
index 593a63c..e77c7f8 100644
--- a/drivers/leds/leds.h
+++ b/drivers/leds/leds.h
@@ -16,21 +16,6 @@
#include <linux/device.h>
#include <linux/rwsem.h>
#include <linux/leds.h>
-#include <linux/workqueue.h>
-
-#ifdef CONFIG_HAS_EARLYSUSPEND
-
-extern struct workqueue_struct *suspend_work_queue;
-extern int queue_brightness_change(struct led_classdev *led_cdev,
- enum led_brightness value);
-
-struct deferred_brightness_change {
- struct work_struct brightness_change_work;
- struct led_classdev *led_cdev;
- enum led_brightness value;
-};
-
-#endif
static inline void led_set_brightness(struct led_classdev *led_cdev,
enum led_brightness value)
@@ -38,12 +23,8 @@
if (value > led_cdev->max_brightness)
value = led_cdev->max_brightness;
led_cdev->brightness = value;
- if (!(led_cdev->flags & LED_SUSPENDED)) {
-#ifdef CONFIG_HAS_EARLYSUSPEND
- if (queue_brightness_change(led_cdev, value) != 0)
-#endif
- led_cdev->brightness_set(led_cdev, value);
- }
+ if (!(led_cdev->flags & LED_SUSPENDED))
+ led_cdev->brightness_set(led_cdev, value);
}
static inline int led_get_brightness(struct led_classdev *led_cdev)
diff --git a/drivers/media/radio/radio-iris.c b/drivers/media/radio/radio-iris.c
index 179f465..e8e9770 100644
--- a/drivers/media/radio/radio-iris.c
+++ b/drivers/media/radio/radio-iris.c
@@ -98,6 +98,7 @@
};
static struct video_device *priv_videodev;
+static int iris_do_calibration(struct iris_device *radio);
static struct v4l2_queryctrl iris_v4l2_queryctrl[] = {
{
@@ -402,6 +403,20 @@
.type = V4L2_CTRL_TYPE_INTEGER,
.name = "Write default",
},
+ {
+ .id = V4L2_CID_PRIVATE_IRIS_SET_CALIBRATION,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "SET Calibration",
+ .minimum = 0,
+ .maximum = 1,
+ },
+ {
+ .id = V4L2_CID_PRIVATE_IRIS_DO_CALIBRATION,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "SET Calibration",
+ .minimum = 0,
+ .maximum = 1,
+ },
};
static void iris_q_event(struct iris_device *radio,
@@ -1317,6 +1332,32 @@
return ret;
}
+static int hci_fm_set_cal_req(struct radio_hci_dev *hdev,
+ unsigned long param)
+{
+ u16 opcode = 0;
+ struct hci_fm_set_cal_req *cal_req =
+ (struct hci_fm_set_cal_req *)param;
+
+ opcode = hci_opcode_pack(HCI_OGF_FM_COMMON_CTRL_CMD_REQ,
+ HCI_OCF_FM_SET_CALIBRATION);
+ return radio_hci_send_cmd(hdev, opcode, sizeof((*hci_fm_set_cal_req)),
+ cal_req);
+
+}
+
+static int hci_fm_do_cal_req(struct radio_hci_dev *hdev,
+ unsigned long param)
+{
+ u16 opcode = 0;
+ u8 cal_mode = param;
+
+ opcode = hci_opcode_pack(HCI_OGF_FM_COMMON_CTRL_CMD_REQ,
+ HCI_OCF_FM_DO_CALIBRATION);
+ return radio_hci_send_cmd(hdev, opcode, sizeof(cal_mode),
+ &cal_mode);
+
+}
static int hci_cmd(unsigned int cmd, struct radio_hci_dev *hdev)
{
int ret = 0;
@@ -1670,6 +1711,29 @@
}
+static void hci_cc_do_calibration_rsp(struct radio_hci_dev *hdev,
+ struct sk_buff *skb)
+{
+ struct iris_device *radio = video_get_drvdata(video_get_dev());
+ static struct hci_cc_do_calibration_rsp rsp ;
+ rsp.status = skb->data[0];
+ rsp.mode = skb->data[CALIB_MODE_OFSET];
+
+ if (rsp.status) {
+ FMDERR("status = %d", rsp.status);
+ return;
+ }
+ if (rsp.mode == PROCS_CALIB_MODE) {
+ memcpy(&rsp.data[0], &skb->data[CALIB_DATA_OFSET],
+ PROCS_CALIB_SIZE);
+ } else if (rsp.mode == DC_CALIB_MODE) {
+ memcpy(&rsp.data[PROCS_CALIB_SIZE],
+ &skb->data[CALIB_DATA_OFSET], DC_CALIB_SIZE);
+ iris_q_evt_data(radio, rsp.data, (PROCS_CALIB_SIZE +
+ DC_CALIB_SIZE), IRIS_BUF_CAL_DATA);
+ }
+ radio_hci_req_complete(hdev, rsp.status);
+}
static inline void hci_cmd_complete_event(struct radio_hci_dev *hdev,
struct sk_buff *skb)
{
@@ -1713,9 +1777,9 @@
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_SSBI_POKE_REG):
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_POKE_DATA):
case hci_diagnostic_cmd_op_pack(HCI_FM_SET_INTERNAL_TONE_GENRATOR):
+ case hci_common_cmd_op_pack(HCI_OCF_FM_SET_CALIBRATION):
hci_cc_rsp(hdev, skb);
break;
-
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_SSBI_PEEK_REG):
hci_cc_ssbi_peek_rsp(hdev, skb);
break;
@@ -1761,6 +1825,9 @@
case hci_status_param_op_pack(HCI_OCF_FM_READ_GRP_COUNTERS):
hci_cc_rds_grp_cntrs_rsp(hdev, skb);
break;
+ case hci_common_cmd_op_pack(HCI_OCF_FM_DO_CALIBRATION):
+ hci_cc_do_calibration_rsp(hdev, skb);
+ break;
default:
FMDERR("%s opcode 0x%x", hdev->name, opcode);
@@ -2201,6 +2268,37 @@
return retval;
}
+static int iris_do_calibration(struct iris_device *radio)
+{
+ char cal_mode = 0x00;
+ int retval = 0x00;
+
+ cal_mode = PROCS_CALIB_MODE;
+ retval = hci_cmd(HCI_FM_ENABLE_RECV_CMD,
+ radio->fm_hdev);
+ if (retval < 0) {
+ FMDERR("Enable failed before calibration %x", retval);
+ return retval;
+ }
+ retval = radio_hci_request(radio->fm_hdev, hci_fm_do_cal_req,
+ (unsigned long)cal_mode, RADIO_HCI_TIMEOUT);
+ if (retval < 0) {
+ FMDERR("Do Process calibration failed %x", retval);
+ return retval;
+ }
+ cal_mode = DC_CALIB_MODE;
+ retval = radio_hci_request(radio->fm_hdev, hci_fm_do_cal_req,
+ (unsigned long)cal_mode, RADIO_HCI_TIMEOUT);
+ if (retval < 0) {
+ FMDERR("Do DC calibration failed %x", retval);
+ return retval;
+ }
+ retval = hci_cmd(HCI_FM_DISABLE_RECV_CMD,
+ radio->fm_hdev);
+ if (retval < 0)
+ FMDERR("Disable Failed after calibration %d", retval);
+ return retval;
+}
static int iris_vidioc_g_ctrl(struct file *file, void *priv,
struct v4l2_control *ctrl)
{
@@ -2310,6 +2408,9 @@
case V4L2_CID_PRIVATE_IRIS_SOFT_MUTE:
ctrl->value = radio->mute_mode.soft_mute;
break;
+ case V4L2_CID_PRIVATE_IRIS_DO_CALIBRATION:
+ retval = iris_do_calibration(radio);
+ break;
default:
retval = -EINVAL;
}
@@ -2351,6 +2452,7 @@
struct hci_fm_tx_ps tx_ps;
struct hci_fm_tx_rt tx_rt;
struct hci_fm_def_data_wr_req default_data;
+ struct hci_fm_set_cal_req cal_req;
struct iris_device *radio = video_get_drvdata(video_devdata(file));
char *data = NULL;
@@ -2402,6 +2504,28 @@
if (copy_from_user(&default_data, data, sizeof(default_data)))
return -EFAULT;
retval = hci_def_data_write(&default_data, radio->fm_hdev);
+ break;
+ case V4L2_CID_PRIVATE_IRIS_SET_CALIBRATION:
+ FMDERR("In Set Calibration");
+ data = (ctrl->controls[0]).string;
+ bytes_to_copy = (ctrl->controls[0]).size;
+ memset(cal_req.data, 0, MAX_CALIB_SIZE);
+ cal_req.mode = PROCS_CALIB_MODE;
+ if (copy_from_user(&cal_req.data[0],
+ data, PROCS_CALIB_SIZE))
+ return -EFAULT;
+ retval = radio_hci_request(radio->fm_hdev, hci_fm_set_cal_req,
+ (unsigned long)&cal_req, RADIO_HCI_TIMEOUT);
+ if (retval < 0)
+ FMDERR("Set Process calibration failed %d", retval);
+ if (copy_from_user(&cal_req.data[PROCS_CALIB_SIZE],
+ data, DC_CALIB_SIZE))
+ return -EFAULT;
+ cal_req.mode = DC_CALIB_MODE;
+ retval = radio_hci_request(radio->fm_hdev, hci_fm_set_cal_req,
+ (unsigned long)&cal_req, RADIO_HCI_TIMEOUT);
+ if (retval < 0)
+ FMDERR("Set DC calibration failed %d", retval);
break;
default:
FMDBG("Shouldn't reach here\n");
@@ -2464,8 +2588,10 @@
retval = hci_set_fm_mute_mode(
&radio->mute_mode,
radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Failed to enable Smute\n");
+ return retval;
+ }
radio->stereo_mode.stereo_mode = CTRL_OFF;
radio->stereo_mode.sig_blend = CTRL_ON;
radio->stereo_mode.intf_blend = CTRL_ON;
@@ -2473,8 +2599,10 @@
retval = hci_set_fm_stereo_mode(
&radio->stereo_mode,
radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Failed to set stereo mode\n");
+ return retval;
+ }
retval = hci_cmd(HCI_FM_GET_RECV_CONF_CMD,
radio->fm_hdev);
if (retval < 0)
diff --git a/drivers/media/video/msm/Kconfig b/drivers/media/video/msm/Kconfig
index a86460b..9361f5a9 100644
--- a/drivers/media/video/msm/Kconfig
+++ b/drivers/media/video/msm/Kconfig
@@ -37,6 +37,18 @@
default y
---help---
SONY 13.5 MP Bayer Sensor
+config OV5640
+ bool "Sensor OV5640 (YUV 5M)"
+ depends on MSM_CAMERA && !MSM_CAMERA_V4L2
+ default n
+ ---help---
+ Omni 5M YUV Sensor
+config WEBCAM_OV7692_QRD
+ bool "Sensor OV7692 QRD(VGA YUV)"
+ depends on MSM_CAMERA && ARCH_MSM7X27A && !MSM_CAMERA_V4L2
+ default n
+ ---help---
+ Omni Vision VGA YUV Sensor for QRD Devices
config WEBCAM_OV7692
bool "Sensor OV7692 (VGA YUV)"
depends on MSM_CAMERA && ARCH_MSM8X60 && !MSM_CAMERA_V4L2
diff --git a/drivers/media/video/msm/Makefile b/drivers/media/video/msm/Makefile
index bd3fffe..3f41d43 100644
--- a/drivers/media/video/msm/Makefile
+++ b/drivers/media/video/msm/Makefile
@@ -39,6 +39,8 @@
obj-$(CONFIG_IMX072) += imx072.o imx072_reg.o
obj-$(CONFIG_WEBCAM_OV9726) += ov9726.o ov9726_reg.o
obj-$(CONFIG_WEBCAM_OV7692) += ov7692.o
+obj-$(CONFIG_WEBCAM_OV7692_QRD) += ov7692_qrd.o
+obj-$(CONFIG_OV5640) += ov5640.o
obj-$(CONFIG_MT9D112) += mt9d112.o mt9d112_reg.o
obj-$(CONFIG_MT9D113) += mt9d113.o mt9d113_reg.o
diff --git a/drivers/media/video/msm/msm.c b/drivers/media/video/msm/msm.c
index 5d9112e..40a273a 100644
--- a/drivers/media/video/msm/msm.c
+++ b/drivers/media/video/msm/msm.c
@@ -1574,10 +1574,12 @@
mutex_lock(&pcam->vid_lock);
+ pcam_inst->streamon = 0;
pcam->use_count--;
pcam->dev_inst_map[pcam_inst->image_mode] = NULL;
if (pcam_inst->vbqueue_initialized)
vb2_queue_release(&pcam_inst->vid_bufq);
+ D("%s Closing down instance %p ", __func__, pcam_inst);
pcam->dev_inst[pcam_inst->my_index] = NULL;
if (pcam_inst->my_index == 0) {
v4l2_fh_del(&pcam_inst->eventHandle);
diff --git a/drivers/media/video/msm/msm_isp.c b/drivers/media/video/msm/msm_isp.c
index 6983d70..56fbc41 100644
--- a/drivers/media/video/msm/msm_isp.c
+++ b/drivers/media/video/msm/msm_isp.c
@@ -81,7 +81,11 @@
struct msm_cam_v4l2_device *pcam = sync->pcam_sync;
int vfe_id = vdata->evt_msg.msg_id;
-
+ if (!pcam) {
+ pr_err("%s pcam is null. return\n", __func__);
+ msm_isp_sync_free(vdata);
+ return rc;
+ }
switch (vdata->type) {
case VFE_MSG_V32_START:
case VFE_MSG_V32_START_RECORDING:
diff --git a/drivers/media/video/msm/msm_mctl_buf.c b/drivers/media/video/msm/msm_mctl_buf.c
index a8554ee..1bbb029 100644
--- a/drivers/media/video/msm/msm_mctl_buf.c
+++ b/drivers/media/video/msm/msm_mctl_buf.c
@@ -368,23 +368,28 @@
int msm_mctl_out_type_to_inst_index(struct msm_cam_v4l2_device *pcam,
int out_type)
{
+ int image_mode;
switch (out_type) {
case VFE_MSG_OUTPUT_P:
- return pcam->dev_inst_map
- [MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW]->my_index;
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW;
+ break;
case VFE_MSG_OUTPUT_V:
- return pcam->dev_inst_map
- [MSM_V4L2_EXT_CAPTURE_MODE_VIDEO]->my_index;
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_VIDEO;
+ break;
case VFE_MSG_OUTPUT_S:
- return pcam->dev_inst_map
- [MSM_V4L2_EXT_CAPTURE_MODE_MAIN]->my_index;
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_MAIN;
+ break;
case VFE_MSG_OUTPUT_T:
- return pcam->dev_inst_map
- [MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL]->my_index;
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL;
+ break;
default:
- return 0;
+ image_mode = -1;
+ break;
}
- return 0;
+ if ((image_mode >= 0) && pcam->dev_inst_map[image_mode])
+ return pcam->dev_inst_map[image_mode]->my_index;
+ else
+ return -EINVAL;
}
void msm_mctl_gettimeofday(struct timeval *tv)
@@ -482,6 +487,11 @@
else {
idx = msm_mctl_out_type_to_inst_index(
p_mctl->sync.pcam_sync, msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, dropping buffer\n",
+ __func__);
+ return idx;
+ }
pcam_inst = p_mctl->sync.pcam_sync->dev_inst[idx];
rc = msm_mctl_buf_done_proc(p_mctl, pcam_inst,
msg_type, fbuf,
@@ -508,16 +518,20 @@
int rc = -EINVAL, idx, i;
uint32_t buf_idx, plane_offset = 0;
- if (!free_buf) {
- pr_err("%s: free_buf= null\n", __func__);
+ if (!free_buf || !pmctl) {
+ pr_err("%s: free_buf/pmctl is null\n", __func__);
return rc;
}
memset(free_buf, 0, sizeof(struct msm_free_buf));
idx = msm_mctl_out_type_to_inst_index(pmctl->sync.pcam_sync,
msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, returning\n", __func__);
+ return idx;
+ }
pcam_inst = pmctl->sync.pcam_sync->dev_inst[idx];
if (!pcam_inst || !pcam_inst->streamon) {
- D("%s: stream is turned off\n", __func__);
+ pr_err("%s: stream is turned off\n", __func__);
return rc;
}
spin_lock_irqsave(&pcam_inst->vq_irqlock, flags);
@@ -582,6 +596,10 @@
return rc;
idx = msm_mctl_out_type_to_inst_index(pmctl->sync.pcam_sync, msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, buffer not released\n", __func__);
+ return idx;
+ }
pcam_inst = pmctl->sync.pcam_sync->dev_inst[idx];
spin_lock_irqsave(&pcam_inst->vq_irqlock, flags);
list_for_each_entry(buf, &pcam_inst->free_vq, list) {
@@ -611,6 +629,10 @@
idx = msm_mctl_out_type_to_inst_index(
pmctl->sync.pcam_sync, msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, buffer dropped\n", __func__);
+ return idx;
+ }
pcam_inst = pmctl->sync.pcam_sync->dev_inst[idx];
D("%s:inst=0x%p, paddr=0x%x, dirty=%d",
__func__, pcam_inst, frame->ch_paddr[0], dirty);
@@ -634,6 +656,10 @@
idx = msm_mctl_out_type_to_inst_index(pmctl->sync.pcam_sync,
msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, cant get buffer\n", __func__);
+ return NULL;
+ }
pcam_inst = pmctl->sync.pcam_sync->dev_inst[idx];
if (!pcam_inst->streamon) {
D("%s: stream 0x%p is off\n", __func__, pcam_inst);
@@ -669,6 +695,10 @@
idx = msm_mctl_out_type_to_inst_index(pmctl->sync.pcam_sync,
msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, cant put buffer\n", __func__);
+ return idx;
+ }
pcam_inst = pmctl->sync.pcam_sync->dev_inst[idx];
if (!pcam_inst->streamon) {
D("%s: stream 0x%p is off\n", __func__, pcam_inst);
@@ -700,6 +730,10 @@
idx = msm_mctl_out_type_to_inst_index(pmctl->sync.pcam_sync,
msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, cant delete buffer\n", __func__);
+ return idx;
+ }
pcam_inst = pmctl->sync.pcam_sync->dev_inst[idx];
D("%s: idx = %d, pinst=0x%p", __func__, idx, pcam_inst);
spin_lock_irqsave(&pcam_inst->vq_irqlock, flags);
diff --git a/drivers/media/video/msm/msm_mctl_pp.c b/drivers/media/video/msm/msm_mctl_pp.c
index a09514b..2bf95a0 100644
--- a/drivers/media/video/msm/msm_mctl_pp.c
+++ b/drivers/media/video/msm/msm_mctl_pp.c
@@ -126,6 +126,10 @@
idx = msm_mctl_out_type_to_inst_index(
p_mctl->sync.pcam_sync, msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance. returning\n", __func__);
+ return -EINVAL;
+ }
pcam_inst = p_mctl->sync.pcam_sync->dev_inst[idx];
vb = msm_mctl_buf_find(p_mctl, pcam_inst,
del_buf, msg_type, fbuf);
@@ -192,27 +196,52 @@
}
static int msm_mctl_pp_get_phy_addr(
+ struct msm_cam_v4l2_dev_inst *pcam_inst,
uint32_t frame_handle,
struct msm_pp_frame *pp_frame)
{
struct msm_frame_buffer *vb = NULL;
struct videobuf2_contig_pmem *mem;
+ int i, buf_idx = 0;
vb = (struct msm_frame_buffer *)frame_handle;
- mem = vb2_plane_cookie(&vb->vidbuf, 0);
+ buf_idx = vb->vidbuf.v4l2_buf.index;
memset(pp_frame, 0, sizeof(struct msm_pp_frame));
pp_frame->handle = (uint32_t)vb;
pp_frame->frame_id = vb->vidbuf.v4l2_buf.sequence;
- pp_frame->image_type = (unsigned short)mem->path;
pp_frame->timestamp = vb->vidbuf.v4l2_buf.timestamp;
- /* hard coded for now. Will need to expand to MP case */
- pp_frame->num_planes = 1;
- pp_frame->sp.addr_offset = mem->addr_offset;
- pp_frame->sp.phy_addr = videobuf2_to_pmem_contig(&vb->vidbuf, 0);
- pp_frame->sp.y_off = 0;
- pp_frame->sp.cbcr_off = mem->offset.sp_off.cbcr_off;
- pp_frame->sp.length = mem->size;
- pp_frame->sp.fd = (int)mem->vaddr;
+ /* Get the cookie for 1st plane and store the path.
+ * Also use this to check the number of planes in
+ * this buffer.*/
+ mem = vb2_plane_cookie(&vb->vidbuf, 0);
+ pp_frame->image_type = (unsigned short)mem->path;
+ if (mem->buffer_type == VIDEOBUF2_SINGLE_PLANE) {
+ pp_frame->num_planes = 1;
+ pp_frame->sp.addr_offset = mem->addr_offset;
+ pp_frame->sp.phy_addr =
+ videobuf2_to_pmem_contig(&vb->vidbuf, 0);
+ pp_frame->sp.y_off = 0;
+ pp_frame->sp.cbcr_off = mem->offset.sp_off.cbcr_off;
+ pp_frame->sp.length = mem->size;
+ pp_frame->sp.fd = (int)mem->vaddr;
+ } else {
+ pp_frame->num_planes = pcam_inst->plane_info.num_planes;
+ for (i = 0; i < pp_frame->num_planes; i++) {
+ mem = vb2_plane_cookie(&vb->vidbuf, i);
+ pp_frame->mp[i].addr_offset = mem->addr_offset;
+ pp_frame->mp[i].phy_addr =
+ videobuf2_to_pmem_contig(&vb->vidbuf, i);
+ pp_frame->mp[i].data_offset =
+ pcam_inst->buf_offset[buf_idx][i].data_offset;
+ pp_frame->mp[i].fd = (int)mem->vaddr;
+ pp_frame->mp[i].length = mem->size;
+ D("%s frame id %d buffer %d plane %d phy addr 0x%x"
+ " fd %d length %d\n", __func__,
+ pp_frame->frame_id, buf_idx, i,
+ (uint32_t)pp_frame->mp[i].phy_addr,
+ pp_frame->mp[i].fd, pp_frame->mp[i].length);
+ }
+ }
return 0;
}
@@ -235,12 +264,38 @@
return 0;
}
+static int msm_mctl_pp_path_to_inst_index(struct msm_cam_v4l2_device *pcam,
+ int out_type)
+{
+ int image_mode;
+ switch (out_type) {
+ case OUTPUT_TYPE_P:
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW;
+ break;
+ case OUTPUT_TYPE_V:
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_VIDEO;
+ break;
+ case OUTPUT_TYPE_S:
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_MAIN;
+ break;
+ default:
+ image_mode = -1;
+ break;
+ }
+ if ((image_mode >= 0) && pcam->dev_inst_map[image_mode])
+ return pcam->dev_inst_map[image_mode]->my_index;
+ else
+ return -EINVAL;
+}
+
int msm_mctl_pp_proc_vpe_cmd(
struct msm_cam_media_controller *p_mctl,
struct msm_mctl_pp_cmd *pp_cmd)
{
- int rc = 0;
+ int rc = 0, idx;
void __user *argp = (void __user *)pp_cmd->value;
+ struct msm_cam_v4l2_dev_inst *pcam_inst;
+
switch (pp_cmd->id) {
case VPE_CMD_INIT:
case VPE_CMD_DEINIT:
@@ -422,15 +477,27 @@
zoom->pp_frame_cmd.cookie,
zoom->pp_frame_cmd.vpe_output_action,
zoom->pp_frame_cmd.path);
-
+ idx = msm_mctl_pp_path_to_inst_index(p_mctl->sync.pcam_sync,
+ zoom->pp_frame_cmd.path);
+ if (idx < 0) {
+ pr_err("%s Invalid path, returning\n", __func__);
+ kfree(zoom);
+ return idx;
+ }
+ pcam_inst = p_mctl->sync.pcam_sync->dev_inst[idx];
+ if (!pcam_inst) {
+ pr_err("%s Invalid instance, returning\n", __func__);
+ kfree(zoom);
+ return -EINVAL;
+ }
zoom->user_cmd = pp_cmd->id;
- rc = msm_mctl_pp_get_phy_addr(
+ rc = msm_mctl_pp_get_phy_addr(pcam_inst,
zoom->pp_frame_cmd.src_buf_handle, &zoom->src_frame);
if (rc) {
kfree(zoom);
break;
}
- rc = msm_mctl_pp_get_phy_addr(
+ rc = msm_mctl_pp_get_phy_addr(pcam_inst,
zoom->pp_frame_cmd.dest_buf_handle, &zoom->dest_frame);
if (rc) {
kfree(zoom);
diff --git a/drivers/media/video/msm/msm_vfe7x27a.c b/drivers/media/video/msm/msm_vfe7x27a.c
index c8bfacc..9f7dff7 100644
--- a/drivers/media/video/msm/msm_vfe7x27a.c
+++ b/drivers/media/video/msm/msm_vfe7x27a.c
@@ -287,8 +287,7 @@
kfree(extdata);
extlen = 0;
- /* set back the AXI frequency to default */
- /* TODO msm_camio_set_perf_lvl(S_DEFAULT); */
+ msm_camio_set_perf_lvl(S_EXIT);
}
static int vfe_7x_init(struct msm_vfe_callback *presp,
diff --git a/drivers/media/video/msm/ov5640.c b/drivers/media/video/msm/ov5640.c
new file mode 100644
index 0000000..1380bcf
--- /dev/null
+++ b/drivers/media/video/msm/ov5640.c
@@ -0,0 +1,1477 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* #define DEBUG */
+
+#include <linux/delay.h>
+#include <linux/types.h>
+#include <linux/i2c.h>
+#include <linux/uaccess.h>
+#include <linux/miscdevice.h>
+#include <linux/leds.h>
+#include <linux/slab.h>
+#include <media/msm_camera.h>
+#include <mach/gpio.h>
+#include <mach/camera.h>
+#include "ov5640.h"
+
+#define FALSE 0
+#define TRUE 1
+
+struct ov5640_work {
+ struct work_struct work;
+};
+
+struct __ov5640_ctrl {
+ const struct msm_camera_sensor_info *sensordata;
+ int sensormode;
+ uint fps_divider; /* init to 1 * 0x00000400 */
+ uint pict_fps_divider; /* init to 1 * 0x00000400 */
+ u16 curr_step_pos;
+ u16 curr_lens_pos;
+ u16 init_curr_lens_pos;
+ u16 my_reg_gain;
+ u16 my_reg_line_count;
+ enum msm_s_resolution prev_res;
+ enum msm_s_resolution pict_res;
+ enum msm_s_resolution curr_res;
+ enum msm_s_test_mode set_test;
+};
+
+static DECLARE_WAIT_QUEUE_HEAD(ov5640_wait_queue);
+DEFINE_MUTEX(ov5640_mutex);
+
+static int ov5640_pwdn_gpio;
+static int ov5640_reset_gpio;
+static int ov5640_driver_pwdn_gpio;
+static int OV5640_CSI_CONFIG;
+static struct ov5640_work *ov5640_sensorw;
+static struct i2c_client *ov5640_client;
+static u8 ov5640_i2c_buf[4];
+static u8 ov5640_counter;
+static int16_t ov5640_effect;
+static int is_autoflash;
+static int effect_value;
+unsigned int ov5640_SAT_U = 0x40;
+unsigned int ov5640_SAT_V = 0x40;
+
+static struct __ov5640_ctrl *ov5640_ctrl;
+static int ov5640_afinit = 1;
+
+struct rw_semaphore ov_leds_list_lock;
+struct list_head ov_leds_list;
+
+static int ov5640_i2c_remove(struct i2c_client *client);
+static int ov5640_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+
+static int ov5640_i2c_txdata(u16 saddr, u8 *txdata, int length)
+{
+ struct i2c_msg msg[] = {
+ {
+ .addr = saddr,
+ .flags = 0,
+ .len = length,
+ .buf = txdata,
+ },
+ };
+
+ if (i2c_transfer(ov5640_client->adapter, msg, 1) < 0)
+ return -EIO;
+ else
+ return 0;
+}
+
+static int ov5640_i2c_write(unsigned short saddr, unsigned int waddr,
+ unsigned short bdata, u8 trytimes)
+{
+ int rc = -EIO;
+
+ ov5640_counter = 0;
+ ov5640_i2c_buf[0] = (waddr & 0xFF00) >> 8;
+ ov5640_i2c_buf[1] = (waddr & 0x00FF);
+ ov5640_i2c_buf[2] = (bdata & 0x00FF);
+
+ while ((ov5640_counter < trytimes) && (rc != 0)) {
+ rc = ov5640_i2c_txdata(saddr, ov5640_i2c_buf, 3);
+
+ if (rc < 0) {
+ ov5640_counter++;
+ CDBG("***--CAMERA i2c_write_w failed,i2c addr=0x%x,"
+ "command addr = 0x%x, val = 0x%x,s=%d,"
+ "rc=%d!\n", saddr, waddr, bdata,
+ ov5640_counter, rc);
+ msleep(20);
+ }
+ }
+ return rc;
+}
+
+static int ov5640_i2c_rxdata(unsigned short saddr, unsigned char *rxdata,
+ int length)
+{
+ struct i2c_msg msgs[] = {
+ {
+ .addr = saddr,
+ .flags = 0,
+ .len = 2,
+ .buf = rxdata,
+ },
+ {
+ .addr = saddr,
+ .flags = I2C_M_RD,
+ .len = length,
+ .buf = rxdata,
+ },
+ };
+
+ if (i2c_transfer(ov5640_client->adapter, msgs, 2) < 0) {
+ CDBG("ov5640_i2c_rxdata failed!\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int32_t ov5640_i2c_read_byte(unsigned short saddr,
+ unsigned int raddr, unsigned int *rdata)
+{
+ int rc = 0;
+ unsigned char buf[2];
+
+ memset(buf, 0, sizeof(buf));
+
+ buf[0] = (raddr & 0xFF00)>>8;
+ buf[1] = (raddr & 0x00FF);
+
+ rc = ov5640_i2c_rxdata(saddr, buf, 1);
+ if (rc < 0) {
+ CDBG("ov5640_i2c_read_byte failed!\n");
+ return rc;
+ }
+
+ *rdata = buf[0];
+
+ return rc;
+}
+
+static int32_t ov5640_writepregs(struct ov5640_sensor *ptb, int32_t len)
+{
+ int32_t i, ret = 0;
+ uint32_t regv;
+
+ for (i = 0; i < len; i++) {
+ if (0 == ptb[i].mask) {
+ ov5640_i2c_write(ov5640_client->addr, ptb[i].addr,
+ ptb[i].data, 10);
+ } else {
+ ov5640_i2c_read_byte(ov5640_client->addr, ptb[i].addr,
+ ®v);
+ regv &= ptb[i].mask;
+ regv |= (ptb[i].data & (~ptb[i].mask));
+ ov5640_i2c_write(ov5640_client->addr, ptb[i].addr,
+ regv, 10);
+ }
+ }
+ return ret;
+}
+
+static void camera_sw_power_onoff(int v)
+{
+ if (v == 0) {
+ CDBG("camera_sw_power_onoff: down\n");
+ ov5640_i2c_write(ov5640_client->addr, 0x3008, 0x42, 10);
+ } else {
+ CDBG("camera_sw_power_onoff: on\n");
+ ov5640_i2c_write(ov5640_client->addr, 0x3008, 0x02, 10);
+ }
+}
+
+static void ov5640_power_off(void)
+{
+ CDBG("--CAMERA-- %s ... (Start...)\n", __func__);
+ gpio_set_value(ov5640_pwdn_gpio, 1);
+ CDBG("--CAMERA-- %s ... (End...)\n", __func__);
+}
+
+static void ov5640_power_on(void)
+{
+ CDBG("--CAMERA-- %s ... (Start...)\n", __func__);
+ gpio_set_value(ov5640_pwdn_gpio, 0);
+ CDBG("--CAMERA-- %s ... (End...)\n", __func__);
+}
+
+static void ov5640_power_reset(void)
+{
+ CDBG("--CAMERA-- %s ... (Start...)\n", __func__);
+ gpio_set_value(ov5640_reset_gpio, 1); /* reset camera reset pin */
+ msleep(20);
+ gpio_set_value(ov5640_reset_gpio, 0);
+ msleep(20);
+ gpio_set_value(ov5640_reset_gpio, 1);
+ msleep(20);
+
+ CDBG("--CAMERA-- %s ... (End...)\n", __func__);
+}
+
+static int ov5640_probe_readID(const struct msm_camera_sensor_info *data)
+{
+ int rc = 0;
+ u32 device_id_high = 0;
+ u32 device_id_low = 0;
+
+ CDBG("--CAMERA-- %s (Start...)\n", __func__);
+ CDBG("--CAMERA-- %s sensor poweron,begin to read ID!\n", __func__);
+
+ /* 0x300A ,sensor ID register */
+ rc = ov5640_i2c_read_byte(ov5640_client->addr, 0x300A,
+ &device_id_high);
+
+ if (rc < 0) {
+ CDBG("--CAMERA-- %s ok , readI2C failed, rc = 0x%x\r\n",
+ __func__, rc);
+ return rc;
+ }
+ CDBG("--CAMERA-- %s readID high byte, data = 0x%x\r\n",
+ __func__, device_id_high);
+
+ /* 0x300B ,sensor ID register */
+ rc = ov5640_i2c_read_byte(ov5640_client->addr, 0x300B,
+ &device_id_low);
+ if (rc < 0) {
+ CDBG("--CAMERA-- %s ok , readI2C failed,rc = 0x%x\r\n",
+ __func__, rc);
+ return rc;
+ }
+
+ CDBG("--CAMERA-- %s readID low byte, data = 0x%x\r\n",
+ __func__, device_id_low);
+ CDBG("--CAMERA-- %s return ID :0x%x\n", __func__,
+ (device_id_high << 8) + device_id_low);
+
+ /* 0x5640, ov5640 chip id */
+ if ((device_id_high << 8) + device_id_low != OV5640_SENSOR_ID) {
+ CDBG("--CAMERA-- %s ok , device id error, should be 0x%x\r\n",
+ __func__, OV5640_SENSOR_ID);
+ return -EINVAL;
+ } else {
+ CDBG("--CAMERA-- %s ok , device id=0x%x\n", __func__,
+ OV5640_SENSOR_ID);
+ return 0;
+ }
+}
+
+static int ov5640_af_setting(void)
+{
+ int rc = 0;
+ int lens = sizeof(ov5640_afinit_tbl) / sizeof(ov5640_afinit_tbl[0]);
+
+ CDBG("--CAMERA-- ov5640_af_setting\n");
+
+ ov5640_i2c_write(ov5640_client->addr, 0x3000, 0x20, 10);
+
+ rc = ov5640_i2c_txdata(ov5640_client->addr, ov5640_afinit_tbl, lens);
+ if (rc < 0) {
+ CDBG("--CAMERA-- AF_init failed\n");
+ return rc;
+ }
+
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_MAIN, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_ACK, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_PARA0, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_PARA1, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_PARA2, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_PARA3, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_PARA4, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_FW_STATUS, 0x7f, 10);
+ ov5640_i2c_write(ov5640_client->addr, 0x3000, 0x00, 10);
+
+ return rc;
+}
+
+static int ov5640_set_flash_light(enum led_brightness brightness)
+{
+ struct led_classdev *led_cdev;
+
+ CDBG("ov5640_set_flash_light brightness = %d\n", brightness);
+
+ down_read(&ov_leds_list_lock);
+ list_for_each_entry(led_cdev, &ov_leds_list, node) {
+ if (!strncmp(led_cdev->name, "flashlight", 10))
+ break;
+ }
+ up_read(&ov_leds_list_lock);
+
+ if (led_cdev) {
+ led_brightness_set(led_cdev, brightness);
+ } else {
+ CDBG("get flashlight device failed\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int ov5640_video_config(void)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- ov5640_video_config\n");
+ CDBG("--CAMERA-- preview in, is_autoflash - 0x%x\n", is_autoflash);
+
+ /* autoflash setting */
+ if (is_autoflash == 1)
+ ov5640_set_flash_light(LED_OFF);
+
+ /* preview setting */
+ rc = OV5640CORE_WRITEPREG(ov5640_preview_tbl);
+ return rc;
+}
+
+static int ov5640_snapshot_config(void)
+{
+ int rc = 0;
+ unsigned int tmp;
+
+ CDBG("--CAMERA-- SENSOR_SNAPSHOT_MODE\n");
+ CDBG("--CAMERA-- %s, snapshot in, is_autoflash - 0x%x\n", __func__,
+ is_autoflash);
+
+ if (is_autoflash == 1) {
+ ov5640_i2c_read_byte(ov5640_client->addr, 0x350b, &tmp);
+ CDBG("--CAMERA-- GAIN VALUE : %x\n", tmp);
+ if ((tmp & 0x80) == 0)
+ ov5640_set_flash_light(LED_OFF);
+ else
+ ov5640_set_flash_light(LED_FULL);
+ }
+
+ rc = OV5640CORE_WRITEPREG(ov5640_capture_tbl);
+
+ return rc;
+}
+
+static int ov5640_setting(enum msm_s_reg_update rupdate,
+ enum msm_s_setting rt)
+{
+ int rc = -EINVAL, tmp;
+ struct msm_camera_csi_params ov5640_csi_params;
+
+ CDBG("--CAMERA-- %s (Start...), rupdate=%d\n", __func__, rupdate);
+
+ switch (rupdate) {
+ case S_UPDATE_PERIODIC:
+ if (!OV5640_CSI_CONFIG) {
+ camera_sw_power_onoff(0); /* standby */
+ msleep(20);
+
+ ov5640_csi_params.lane_cnt = 2;
+ ov5640_csi_params.data_format = CSI_8BIT;
+ ov5640_csi_params.lane_assign = 0xe4;
+ ov5640_csi_params.dpcm_scheme = 0;
+ ov5640_csi_params.settle_cnt = 0x6;
+
+ CDBG("%s: msm_camio_csi_config\n", __func__);
+
+ rc = msm_camio_csi_config(&ov5640_csi_params);
+ msleep(20);
+ camera_sw_power_onoff(1); /* on */
+ msleep(20);
+
+ OV5640_CSI_CONFIG = 1;
+
+ } else {
+ rc = 0;
+ }
+
+ if (S_RES_PREVIEW == rt)
+ rc = ov5640_video_config();
+ else if (S_RES_CAPTURE == rt)
+ rc = ov5640_snapshot_config();
+
+ break; /* UPDATE_PERIODIC */
+
+ case S_REG_INIT:
+ CDBG("--CAMERA-- S_REG_INIT (Start)\n");
+
+ rc = ov5640_i2c_write(ov5640_client->addr, 0x3103, 0x11, 10);
+ rc = ov5640_i2c_write(ov5640_client->addr, 0x3008, 0x82, 10);
+ msleep(20);
+
+ /* set sensor init setting */
+ CDBG("set sensor init setting\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_init_tbl);
+ if (rc < 0) {
+ CDBG("sensor init setting failed\n");
+ break;
+ }
+
+ /* set image quality setting */
+ rc = OV5640CORE_WRITEPREG(ov5640_init_iq_tbl);
+ rc = ov5640_i2c_read_byte(ov5640_client->addr, 0x4740, &tmp);
+ CDBG("--CAMERA-- init 0x4740 value=0x%x\n", tmp);
+
+ if (tmp != 0x21) {
+ rc = ov5640_i2c_write(ov5640_client->addr, 0x4740,
+ 0x21, 10);
+ msleep(20);
+ rc = ov5640_i2c_read_byte(ov5640_client->addr,
+ 0x4740, &tmp);
+ CDBG("--CAMERA-- WG 0x4740 value=0x%x\n", tmp);
+ }
+
+ CDBG("--CAMERA-- AF_init: ov5640_afinit = %d\n",
+ ov5640_afinit);
+ if (ov5640_afinit == 1) {
+ rc = ov5640_af_setting();
+ if (rc < 0) {
+ CDBG("--CAMERA-- ov5640_af_setting failed\n");
+ break;
+ }
+ ov5640_afinit = 0;
+ }
+
+ /* reset fps_divider */
+ ov5640_ctrl->fps_divider = 1 * 0x0400;
+ CDBG("--CAMERA-- S_REG_INIT (End)\n");
+ break; /* case REG_INIT: */
+
+ default:
+ break;
+ } /* switch (rupdate) */
+
+ CDBG("--CAMERA-- %s (End), rupdate=%d\n", __func__, rupdate);
+
+ return rc;
+}
+
+static int ov5640_sensor_open_init(const struct msm_camera_sensor_info *data)
+{
+ int rc = -ENOMEM;
+
+ CDBG("--CAMERA-- %s\n", __func__);
+ ov5640_ctrl = kzalloc(sizeof(struct __ov5640_ctrl), GFP_KERNEL);
+ if (!ov5640_ctrl) {
+ CDBG("--CAMERA-- kzalloc ov5640_ctrl error !!\n");
+ kfree(ov5640_ctrl);
+ return rc;
+ }
+
+ ov5640_ctrl->fps_divider = 1 * 0x00000400;
+ ov5640_ctrl->pict_fps_divider = 1 * 0x00000400;
+ ov5640_ctrl->set_test = S_TEST_OFF;
+ ov5640_ctrl->prev_res = S_QTR_SIZE;
+ ov5640_ctrl->pict_res = S_FULL_SIZE;
+
+ if (data)
+ ov5640_ctrl->sensordata = data;
+
+ ov5640_power_off();
+
+ CDBG("%s: msm_camio_clk_rate_set\n", __func__);
+
+ msm_camio_clk_rate_set(24000000);
+ msleep(20);
+
+ ov5640_power_on();
+ ov5640_power_reset();
+
+ CDBG("%s: init sequence\n", __func__);
+
+ if (ov5640_ctrl->prev_res == S_QTR_SIZE)
+ rc = ov5640_setting(S_REG_INIT, S_RES_PREVIEW);
+ else
+ rc = ov5640_setting(S_REG_INIT, S_RES_CAPTURE);
+
+ if (rc < 0) {
+ CDBG("--CAMERA-- %s : ov5640_setting failed. rc = %d\n",
+ __func__, rc);
+ kfree(ov5640_ctrl);
+ return rc;
+ }
+
+ OV5640_CSI_CONFIG = 0;
+
+ CDBG("--CAMERA--re_init_sensor ok!!\n");
+ return rc;
+}
+
+static int ov5640_sensor_release(void)
+{
+ CDBG("--CAMERA--ov5640_sensor_release!!\n");
+
+ mutex_lock(&ov5640_mutex);
+
+ ov5640_power_off();
+
+ kfree(ov5640_ctrl);
+ ov5640_ctrl = NULL;
+
+ OV5640_CSI_CONFIG = 0;
+
+ mutex_unlock(&ov5640_mutex);
+ return 0;
+}
+
+static const struct i2c_device_id ov5640_i2c_id[] = {
+ {"ov5640", 0}, {}
+};
+
+static int ov5640_i2c_remove(struct i2c_client *client)
+{
+ return 0;
+}
+
+static int ov5640_init_client(struct i2c_client *client)
+{
+ /* Initialize the MSM_CAMI2C Chip */
+ init_waitqueue_head(&ov5640_wait_queue);
+ return 0;
+}
+
+static long ov5640_set_effect(int mode, int effect)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+
+ switch (mode) {
+ case SENSOR_PREVIEW_MODE:
+ /* Context A Special Effects */
+ CDBG("--CAMERA-- %s ...SENSOR_PREVIEW_MODE\n", __func__);
+ break;
+
+ case SENSOR_SNAPSHOT_MODE:
+ /* Context B Special Effects */
+ CDBG("--CAMERA-- %s ...SENSOR_SNAPSHOT_MODE\n", __func__);
+ break;
+
+ default:
+ break;
+ }
+
+ effect_value = effect;
+
+ switch (effect) {
+ case CAMERA_EFFECT_OFF:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_OFF\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_normal_tbl);
+ /* for recover saturation level when change special effect */
+ ov5640_i2c_write(ov5640_client->addr, 0x5583, ov5640_SAT_U,
+ 10);
+ /* for recover saturation level when change special effect */
+ ov5640_i2c_write(ov5640_client->addr, 0x5584, ov5640_SAT_V,
+ 10);
+ break;
+
+ case CAMERA_EFFECT_MONO:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_MONO\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_mono_tbl);
+ break;
+
+ case CAMERA_EFFECT_BW:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_BW\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_bw_tbl);
+ break;
+
+ case CAMERA_EFFECT_BLUISH:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_BLUISH\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_bluish_tbl);
+ break;
+
+ case CAMERA_EFFECT_SOLARIZE:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_NEGATIVE\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_solarize_tbl);
+ break;
+
+ case CAMERA_EFFECT_SEPIA:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_SEPIA\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_sepia_tbl);
+ break;
+
+ case CAMERA_EFFECT_REDDISH:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_REDDISH\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_reddish_tbl);
+ break;
+
+ case CAMERA_EFFECT_GREENISH:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_GREENISH\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_greenish_tbl);
+ break;
+
+ case CAMERA_EFFECT_NEGATIVE:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_NEGATIVE\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_negative_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA-- %s ...Default(Not Support)\n", __func__);
+ }
+
+ ov5640_effect = effect;
+ /* Refresh Sequencer */
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static int ov5640_set_brightness(int8_t brightness)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+ CDBG("--CAMERA-- %s ...brightness = %d\n", __func__ , brightness);
+
+ switch (brightness) {
+ case CAMERA_BRIGHTNESS_LV0:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV0\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv0_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV1:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV1\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv1_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV2:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV2\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv2_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV3:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV3\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv3_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV4:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV4\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_default_lv4_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV5:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV5\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv5_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV6:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV6\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv6_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV7:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV7\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv7_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV8:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV8\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv8_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_ERROR COMMAND\n");
+ break;
+ }
+
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static int ov5640_set_contrast(int contrast)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+ CDBG("--CAMERA-- %s ...contrast = %d\n", __func__ , contrast);
+
+ if (effect_value == CAMERA_EFFECT_OFF) {
+ switch (contrast) {
+ case CAMERA_CONTRAST_LV0:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV0\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv0_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV1:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV1\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv1_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV2:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV2\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv2_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV3:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV3\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv3_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV4:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV4\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_contrast_default_lv4_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV5:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV5\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv5_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV6:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV6\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv6_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV7:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV7\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv7_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV8:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV8\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv8_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA--CAMERA_CONTRAST_ERROR COMMAND\n");
+ break;
+ }
+ }
+
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static int ov5640_set_sharpness(int sharpness)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+ CDBG("--CAMERA-- %s ...sharpness = %d\n", __func__ , sharpness);
+
+ if (effect_value == CAMERA_EFFECT_OFF) {
+ switch (sharpness) {
+ case CAMERA_SHARPNESS_LV0:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV0\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv0_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV1:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV1\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv1_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV2:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV2\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_sharpness_default_lv2_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV3:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV3\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv3_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV4:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV4\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv4_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV5:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV5\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv5_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV6:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV6\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv6_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV7:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV7\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv7_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV8:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV8\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv8_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_ERROR COMMAND\n");
+ break;
+ }
+ }
+
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static int ov5640_set_saturation(int saturation)
+{
+ long rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+ CDBG("--CAMERA-- %s ...saturation = %d\n", __func__ , saturation);
+
+ if (effect_value == CAMERA_EFFECT_OFF) {
+ switch (saturation) {
+ case CAMERA_SATURATION_LV0:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV0\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv0_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV1:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV1\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv1_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV2:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV2\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv2_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV3:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV3\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv3_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV4:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV4\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_saturation_default_lv4_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV5:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV5\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv5_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV6:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV6\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv6_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV7:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV7\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv7_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV8:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV8\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv8_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA--CAMERA_SATURATION_ERROR COMMAND\n");
+ break;
+ }
+ }
+
+ /* for recover saturation level when change special effect */
+ switch (saturation) {
+ case CAMERA_SATURATION_LV0:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV0\n");
+ ov5640_SAT_U = 0x00;
+ ov5640_SAT_V = 0x00;
+ break;
+ case CAMERA_SATURATION_LV1:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV1\n");
+ ov5640_SAT_U = 0x10;
+ ov5640_SAT_V = 0x10;
+ break;
+ case CAMERA_SATURATION_LV2:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV2\n");
+ ov5640_SAT_U = 0x20;
+ ov5640_SAT_V = 0x20;
+ break;
+ case CAMERA_SATURATION_LV3:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV3\n");
+ ov5640_SAT_U = 0x30;
+ ov5640_SAT_V = 0x30;
+ break;
+ case CAMERA_SATURATION_LV4:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV4\n");
+ ov5640_SAT_U = 0x40;
+ ov5640_SAT_V = 0x40; break;
+ case CAMERA_SATURATION_LV5:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV5\n");
+ ov5640_SAT_U = 0x50;
+ ov5640_SAT_V = 0x50; break;
+ case CAMERA_SATURATION_LV6:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV6\n");
+ ov5640_SAT_U = 0x60;
+ ov5640_SAT_V = 0x60;
+ break;
+ case CAMERA_SATURATION_LV7:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV7\n");
+ ov5640_SAT_U = 0x70;
+ ov5640_SAT_V = 0x70; break;
+ case CAMERA_SATURATION_LV8:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV8\n");
+ ov5640_SAT_U = 0x80;
+ ov5640_SAT_V = 0x80;
+ break;
+ default:
+ CDBG("--CAMERA--CAMERA_SATURATION_ERROR COMMAND\n");
+ break;
+ }
+
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static long ov5640_set_antibanding(int antibanding)
+{
+ long rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+ CDBG("--CAMERA-- %s ...antibanding = %d\n", __func__, antibanding);
+
+ switch (antibanding) {
+ case CAMERA_ANTIBANDING_OFF:
+ CDBG("--CAMERA--CAMERA_ANTIBANDING_OFF\n");
+ break;
+
+ case CAMERA_ANTIBANDING_60HZ:
+ CDBG("--CAMERA--CAMERA_ANTIBANDING_60HZ\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_antibanding_60z_tbl);
+ break;
+
+ case CAMERA_ANTIBANDING_50HZ:
+ CDBG("--CAMERA--CAMERA_ANTIBANDING_50HZ\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_antibanding_50z_tbl);
+ break;
+
+ case CAMERA_ANTIBANDING_AUTO:
+ CDBG("--CAMERA--CAMERA_ANTIBANDING_AUTO\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_antibanding_auto_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA--CAMERA_ANTIBANDING_ERROR COMMAND\n");
+ break;
+ }
+
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static long ov5640_set_exposure_mode(int mode)
+{
+ long rc = 0;
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+ CDBG("--CAMERA-- %s ...mode = %d\n", __func__ , mode);
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static int32_t ov5640_lens_shading_enable(uint8_t is_enable)
+{
+ int32_t rc = 0;
+ CDBG("--CAMERA--%s: ...(Start). enable = %d\n", __func__, is_enable);
+
+ if (is_enable) {
+ CDBG("%s: enable~!!\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_lens_shading_on_tbl);
+ } else {
+ CDBG("%s: disable~!!\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_lens_shading_off_tbl);
+ }
+ CDBG("--CAMERA--%s: ...(End). rc = %d\n", __func__, rc);
+ return rc;
+}
+
+static int ov5640_set_sensor_mode(int mode, int res)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- ov5640_set_sensor_mode mode = %d, res = %d\n",
+ mode, res);
+
+ switch (mode) {
+ case SENSOR_PREVIEW_MODE:
+ CDBG("--CAMERA-- SENSOR_PREVIEW_MODE\n");
+ rc = ov5640_setting(S_UPDATE_PERIODIC, S_RES_PREVIEW);
+ break;
+
+ case SENSOR_SNAPSHOT_MODE:
+ CDBG("--CAMERA-- SENSOR_SNAPSHOT_MODE\n");
+ rc = ov5640_setting(S_UPDATE_PERIODIC, S_RES_CAPTURE);
+ break;
+
+ case SENSOR_RAW_SNAPSHOT_MODE:
+ CDBG("--CAMERA-- SENSOR_RAW_SNAPSHOT_MODE\n");
+ rc = ov5640_setting(S_UPDATE_PERIODIC, S_RES_CAPTURE);
+ break;
+
+ default:
+ CDBG("--CAMERA--ov5640_set_sensor_mode no support\n");
+ rc = -EINVAL;
+ break;
+ }
+
+ return rc;
+}
+
+static int ov5640_set_wb_oem(uint8_t param)
+{
+ int rc = 0;
+ unsigned int tmp2;
+
+ CDBG("[kylin] %s \r\n", __func__);
+
+ ov5640_i2c_read_byte(ov5640_client->addr, 0x350b, &tmp2);
+ CDBG("--CAMERA-- GAIN VALUE : %x\n", tmp2);
+
+ switch (param) {
+ case CAMERA_WB_AUTO:
+
+ CDBG("--CAMERA--CAMERA_WB_AUTO\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_wb_def);
+ break;
+
+ case CAMERA_WB_CUSTOM:
+ CDBG("--CAMERA--CAMERA_WB_CUSTOM\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_wb_custom);
+ break;
+ case CAMERA_WB_INCANDESCENT:
+ CDBG("--CAMERA--CAMERA_WB_INCANDESCENT\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_wb_inc);
+ break;
+ case CAMERA_WB_DAYLIGHT:
+ CDBG("--CAMERA--CAMERA_WB_DAYLIGHT\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_wb_daylight);
+ break;
+ case CAMERA_WB_CLOUDY_DAYLIGHT:
+ CDBG("--CAMERA--CAMERA_WB_CLOUDY_DAYLIGHT\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_wb_cloudy);
+ break;
+ default:
+ break;
+ }
+ return rc;
+}
+
+static int ov5640_set_touchaec(uint32_t x, uint32_t y)
+{
+ uint8_t aec_arr[8] = {0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11};
+ int idx = 0;
+ int i;
+
+ CDBG("[kylin] %s x: %d ,y: %d\r\n", __func__ , x, y);
+ idx = x / 2 + y * 2;
+ CDBG("[kylin] idx: %d\r\n", idx);
+
+ if (x % 2 == 0)
+ aec_arr[idx] = 0x10 | 0x0a;
+ else
+ aec_arr[idx] = 0x01 | 0xa0;
+
+ for (i = 0; i < 8; i++) {
+ CDBG("write : %x val : %x ", 0x5688 + i, aec_arr[i]);
+ ov5640_i2c_write(ov5640_client->addr, 0x5688 + i,
+ aec_arr[i], 10);
+ }
+
+ return 1;
+}
+
+static int ov5640_set_exposure_compensation(int compensation)
+{
+ long rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+
+ CDBG("--CAMERA-- %s ...exposure_compensation = %d\n", __func__ ,
+ compensation);
+
+ switch (compensation) {
+ case CAMERA_EXPOSURE_COMPENSATION_LV0:
+ CDBG("--CAMERA--CAMERA_EXPOSURE_COMPENSATION_LV0\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_exposure_compensation_lv0_tbl);
+ break;
+
+ case CAMERA_EXPOSURE_COMPENSATION_LV1:
+ CDBG("--CAMERA--CAMERA_EXPOSURE_COMPENSATION_LV1\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_exposure_compensation_lv1_tbl);
+ break;
+
+ case CAMERA_EXPOSURE_COMPENSATION_LV2:
+ CDBG("--CAMERA--CAMERA_EXPOSURE_COMPENSATION_LV2\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_exposure_compensation_lv2_default_tbl);
+ break;
+
+ case CAMERA_EXPOSURE_COMPENSATION_LV3:
+ CDBG("--CAMERA--CAMERA_EXPOSURE_COMPENSATION_LV3\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_exposure_compensation_lv3_tbl);
+ break;
+
+ case CAMERA_EXPOSURE_COMPENSATION_LV4:
+ CDBG("--CAMERA--CAMERA_EXPOSURE_COMPENSATION_LV3\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_exposure_compensation_lv4_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA--ERROR CAMERA_EXPOSURE_COMPENSATION\n");
+ break;
+ }
+
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+
+ return rc;
+}
+
+static int ov5640_sensor_start_af(void)
+{
+ int i;
+ unsigned int af_st = 0;
+ unsigned int af_ack = 0;
+ unsigned int tmp = 0;
+ int rc = 0;
+
+ CDBG("--CAMERA-- %s (Start...)\n", __func__);
+
+ ov5640_i2c_read_byte(ov5640_client->addr,
+ OV5640_CMD_FW_STATUS, &af_st);
+ CDBG("--CAMERA-- %s af_st = %d\n", __func__, af_st);
+
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_ACK, 0x01, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_MAIN, 0x03, 10);
+
+ for (i = 0; i < 50; i++) {
+ ov5640_i2c_read_byte(ov5640_client->addr,
+ OV5640_CMD_ACK, &af_ack);
+ if (af_ack == 0)
+ break;
+ msleep(50);
+ }
+ CDBG("--CAMERA-- %s af_ack = 0x%x\n", __func__, af_ack);
+
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_FW_STATUS,
+ &af_st);
+ CDBG("--CAMERA-- %s af_st = %d\n", __func__, af_st);
+
+ if (af_st == 0x10) {
+ CDBG("--CAMERA-- %s AF ok and release AF setting~!!\n",
+ __func__);
+ } else {
+ CDBG("--CAMERA-- %s AF not ready!!\n", __func__);
+ }
+
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_ACK, 0x01, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_MAIN, 0x07, 10);
+
+ for (i = 0; i < 70; i++) {
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_ACK,
+ &af_ack);
+ if (af_ack == 0)
+ break;
+ msleep(25);
+ }
+
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_PARA0, &tmp);
+ CDBG("0x3024 = %x\n", tmp);
+ rc = ((tmp == 0) ? 1 : 0);
+
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_PARA1, &tmp);
+ CDBG("0x3025 = %x\n", tmp);
+ rc = ((tmp == 0) ? 1 : 0);
+
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_PARA2, &tmp);
+ CDBG("0x3026 = %x\n", tmp);
+ rc = ((tmp == 0) ? 1 : 0);
+
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_PARA3, &tmp);
+ CDBG("0x3027 = %x\n", tmp);
+ rc = ((tmp == 0) ? 1 : 0) ;
+
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_PARA4, &tmp);
+ CDBG("0x3028 = %x\n", tmp);
+ rc = ((tmp == 0) ? 1 : 0) ;
+
+ CDBG("--CAMERA-- %s rc = %d(End...)\n", __func__, rc);
+ return rc;
+}
+
+static int ov5640_sensor_config(void __user *argp)
+{
+ struct sensor_cfg_data cdata;
+ long rc = 0;
+
+ if (copy_from_user(&cdata, (void *)argp,
+ sizeof(struct sensor_cfg_data)))
+ return -EFAULT;
+
+ CDBG("--CAMERA-- %s %d\n", __func__, cdata.cfgtype);
+
+ mutex_lock(&ov5640_mutex);
+
+ switch (cdata.cfgtype) {
+ case CFG_SET_MODE:
+ rc = ov5640_set_sensor_mode(cdata.mode, cdata.rs);
+ break;
+
+ case CFG_SET_EFFECT:
+ CDBG("--CAMERA-- CFG_SET_EFFECT mode=%d,"
+ "effect = %d !!\n", cdata.mode,
+ cdata.cfg.effect);
+ rc = ov5640_set_effect(cdata.mode, cdata.cfg.effect);
+ break;
+
+ case CFG_START:
+ CDBG("--CAMERA-- CFG_START (Not Support) !!\n");
+ /* Not Support */
+ break;
+
+ case CFG_PWR_UP:
+ CDBG("--CAMERA-- CFG_PWR_UP (Not Support) !!\n");
+ /* Not Support */
+ break;
+
+ case CFG_PWR_DOWN:
+ CDBG("--CAMERA-- CFG_PWR_DOWN (Not Support)\n");
+ ov5640_power_off();
+ break;
+
+ case CFG_SET_DEFAULT_FOCUS:
+ CDBG("--CAMERA-- CFG_SET_DEFAULT_FOCUS (Not Implement) !!\n");
+ break;
+
+ case CFG_MOVE_FOCUS:
+ CDBG("--CAMERA-- CFG_MOVE_FOCUS (Not Implement) !!\n");
+ break;
+
+ case CFG_SET_BRIGHTNESS:
+ CDBG("--CAMERA-- CFG_SET_BRIGHTNESS !!\n");
+ rc = ov5640_set_brightness(cdata.cfg.brightness);
+ break;
+
+ case CFG_SET_CONTRAST:
+ CDBG("--CAMERA-- CFG_SET_CONTRAST !!\n");
+ rc = ov5640_set_contrast(cdata.cfg.contrast);
+ break;
+
+ case CFG_SET_EXPOSURE_MODE:
+ CDBG("--CAMERA-- CFG_SET_EXPOSURE_MODE !!\n");
+ rc = ov5640_set_exposure_mode(cdata.cfg.ae_mode);
+ break;
+
+ case CFG_SET_ANTIBANDING:
+ CDBG("--CAMERA-- CFG_SET_ANTIBANDING antibanding = %d!!\n",
+ cdata.cfg.antibanding);
+ rc = ov5640_set_antibanding(cdata.cfg.antibanding);
+ break;
+
+ case CFG_SET_LENS_SHADING:
+ CDBG("--CAMERA-- CFG_SET_LENS_SHADING !!\n");
+ rc = ov5640_lens_shading_enable(
+ cdata.cfg.lens_shading);
+ break;
+
+ case CFG_SET_SATURATION:
+ CDBG("--CAMERA-- CFG_SET_SATURATION !!\n");
+ rc = ov5640_set_saturation(cdata.cfg.saturation);
+ break;
+
+ case CFG_SET_SHARPNESS:
+ CDBG("--CAMERA-- CFG_SET_SHARPNESS !!\n");
+ rc = ov5640_set_sharpness(cdata.cfg.sharpness);
+ break;
+
+ case CFG_SET_WB:
+ CDBG("--CAMERA-- CFG_SET_WB!!\n");
+ ov5640_set_wb_oem(cdata.cfg.wb_val);
+ rc = 0 ;
+ break;
+
+ case CFG_SET_TOUCHAEC:
+ CDBG("--CAMERA-- CFG_SET_TOUCHAEC!!\n");
+ ov5640_set_touchaec(cdata.cfg.aec_cord.x,
+ cdata.cfg.aec_cord.y);
+ rc = 0 ;
+ break;
+
+ case CFG_SET_AUTO_FOCUS:
+ CDBG("--CAMERA-- CFG_SET_AUTO_FOCUS !\n");
+ rc = ov5640_sensor_start_af();
+ break;
+
+ case CFG_SET_AUTOFLASH:
+ CDBG("--CAMERA-- CFG_SET_AUTOFLASH !\n");
+ is_autoflash = cdata.cfg.is_autoflash;
+ CDBG("[kylin] is autoflash %d\r\n", is_autoflash);
+ rc = 0;
+ break;
+
+ case CFG_SET_EXPOSURE_COMPENSATION:
+ CDBG("--CAMERA-- CFG_SET_EXPOSURE_COMPENSATION !\n");
+ rc = ov5640_set_exposure_compensation(
+ cdata.cfg.exp_compensation);
+ break;
+
+ default:
+ CDBG("%s: Command=%d (Not Implement)!!\n", __func__,
+ cdata.cfgtype);
+ rc = -EINVAL;
+ break;
+ }
+
+ mutex_unlock(&ov5640_mutex);
+ return rc;
+}
+
+static struct i2c_driver ov5640_i2c_driver = {
+ .id_table = ov5640_i2c_id,
+ .probe = ov5640_i2c_probe,
+ .remove = ov5640_i2c_remove,
+ .driver = {
+ .name = "ov5640",
+ },
+};
+
+static int ov5640_probe_init_gpio(const struct msm_camera_sensor_info *data)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- %s\n", __func__);
+
+ ov5640_pwdn_gpio = data->sensor_pwd;
+ ov5640_reset_gpio = data->sensor_reset;
+ ov5640_driver_pwdn_gpio = data->vcm_pwd ;
+
+ if (data->vcm_enable)
+ gpio_direction_output(data->vcm_pwd, 1);
+
+ gpio_direction_output(data->sensor_reset, 1);
+ gpio_direction_output(data->sensor_pwd, 1);
+
+ return rc;
+
+}
+
+static void ov5640_probe_free_gpio(const struct msm_camera_sensor_info *data)
+{
+ gpio_free(ov5640_pwdn_gpio);
+ gpio_free(ov5640_reset_gpio);
+
+ if (data->vcm_enable) {
+ gpio_free(ov5640_driver_pwdn_gpio);
+ ov5640_driver_pwdn_gpio = 0xFF ;
+ }
+
+ ov5640_pwdn_gpio = 0xFF;
+ ov5640_reset_gpio = 0xFF;
+}
+
+static int ov5640_sensor_probe(const struct msm_camera_sensor_info *info,
+ struct msm_sensor_ctrl *s)
+{
+ int rc = -ENOTSUPP;
+
+ CDBG("--CAMERA-- %s (Start...)\n", __func__);
+ rc = i2c_add_driver(&ov5640_i2c_driver);
+ CDBG("--CAMERA-- i2c_add_driver ret:0x%x,ov5640_client=0x%x\n",
+ rc, (unsigned int)ov5640_client);
+ if ((rc < 0) || (ov5640_client == NULL)) {
+ CDBG("--CAMERA-- i2c_add_driver FAILS!!\n");
+ return rc;
+ }
+
+ rc = ov5640_probe_init_gpio(info);
+ if (rc < 0)
+ return rc;
+
+ ov5640_power_off();
+
+ /* SENSOR NEED MCLK TO DO I2C COMMUNICTION, OPEN CLK FIRST*/
+ msm_camio_clk_rate_set(24000000);
+
+ msleep(20);
+
+ ov5640_power_on();
+ ov5640_power_reset();
+
+ rc = ov5640_probe_readID(info);
+
+ if (rc < 0) {
+ CDBG("--CAMERA--ov5640_probe_readID Fail !!~~~~!!\n");
+ CDBG("--CAMERA-- %s, unregister\n", __func__);
+ i2c_del_driver(&ov5640_i2c_driver);
+ ov5640_power_off();
+ ov5640_probe_free_gpio(info);
+ return rc;
+ }
+
+ s->s_init = ov5640_sensor_open_init;
+ s->s_release = ov5640_sensor_release;
+ s->s_config = ov5640_sensor_config;
+ s->s_camera_type = BACK_CAMERA_2D;
+ s->s_mount_angle = info->sensor_platform_info->mount_angle;
+
+ ov5640_power_off();
+
+ CDBG("--CAMERA-- %s (End...)\n", __func__);
+ return rc;
+}
+
+static int ov5640_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ CDBG("--CAMERA-- %s ... (Start...)\n", __func__);
+
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ CDBG("--CAMERA--i2c_check_functionality failed\n");
+ return -ENOMEM;
+ }
+
+ ov5640_sensorw = kzalloc(sizeof(struct ov5640_work), GFP_KERNEL);
+ if (!ov5640_sensorw) {
+ CDBG("--CAMERA--kzalloc failed\n");
+ return -ENOMEM;
+ }
+
+ i2c_set_clientdata(client, ov5640_sensorw);
+ ov5640_init_client(client);
+ ov5640_client = client;
+
+ CDBG("--CAMERA-- %s ... (End...)\n", __func__);
+ return 0;
+}
+
+static int __ov5640_probe(struct platform_device *pdev)
+{
+ return msm_camera_drv_start(pdev, ov5640_sensor_probe);
+}
+
+static struct platform_driver msm_camera_driver = {
+ .probe = __ov5640_probe,
+ .driver = {
+ .name = "msm_camera_ov5640",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init ov5640_init(void)
+{
+ ov5640_i2c_buf[0] = 0x5A;
+ return platform_driver_register(&msm_camera_driver);
+}
+
+module_init(ov5640_init);
+
+MODULE_DESCRIPTION("OV5640 YUV MIPI sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/video/msm/ov5640.h b/drivers/media/video/msm/ov5640.h
new file mode 100644
index 0000000..0e65329
--- /dev/null
+++ b/drivers/media/video/msm/ov5640.h
@@ -0,0 +1,2993 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/*
+[SENSOR]
+Sensor Model: OV5640
+Camera Module:
+Lens Model:
+Driver IC:
+PV Size = 640 x 480
+Cap Size = 2592 x 1944
+Output Format = YUYV
+MCLK Speed = 24M
+PV DVP_PCLK = 28M
+Cap DVP_PCLK = 56M
+PV Frame Rate = 30fps
+Cap Frame Rate = 7.5fps
+I2C Slave ID = 0x78
+I2C Mode = 16Addr, 8Data
+*/
+
+#ifndef CAMSENSOR_OV5640
+#define CAMSENSOR_OV5640
+
+#define INVMASK(v) (0xff-v)
+#define OV5640CORE_WRITEPREG(PTBL) ov5640_writepregs(PTBL,\
+ sizeof(PTBL)/sizeof(PTBL[0]))
+
+/* OV SENSOR SCCB */
+struct ov5640_sensor {
+ uint16_t addr;
+ uint8_t data;
+ uint8_t mask;
+};
+
+/* Auto Focus Command */
+#define OV5640_CMD_MAIN 0x3022
+#define OV5640_CMD_ACK 0x3023
+#define OV5640_CMD_PARA0 0x3024
+#define OV5640_CMD_PARA1 0x3025
+#define OV5640_CMD_PARA2 0x3026
+#define OV5640_CMD_PARA3 0x3027
+#define OV5640_CMD_PARA4 0x3028
+#define OV5640_CMD_FW_STATUS 0x3029
+
+/* Sensor ID */
+#define OV5640_SENSOR_ID 0x5640
+
+#define capture_framerate 750 /* 7.5fps capture frame rate */
+#define g_preview_frameRate 3000 /* 30fps preview frame rate */
+
+struct ov5640_sensor ov5640_init_tbl[] = {
+ {0x3008, 0x42},
+ {0x3103, 0x03},
+ {0x3017, 0x00},
+ {0x3018, 0x00},
+ {0x3034, 0x18},
+ {0x3035, 0x14},
+ {0x3036, 0x38},
+ {0x3037, 0x13},
+ {0x3108, 0x01},
+ {0x3630, 0x36},
+ {0x3631, 0x0e},
+ {0x3632, 0xe2},
+ {0x3633, 0x12},
+ {0x3621, 0xe0},
+ {0x3704, 0xa0},
+ {0x3703, 0x5a},
+ {0x3715, 0x78},
+ {0x3717, 0x01},
+ {0x370b, 0x60},
+ {0x3705, 0x1a},
+ {0x3905, 0x02},
+ {0x3906, 0x10},
+ {0x3901, 0x0a},
+ {0x3731, 0x12},
+ {0x3600, 0x08},
+ {0x3601, 0x33},
+ {0x302d, 0x60},
+ {0x3620, 0x52},
+ {0x371b, 0x20},
+ {0x471c, 0x50},
+ {0x3a13, 0x43},
+ {0x3a18, 0x00},
+ {0x3a19, 0xf8},
+ {0x3635, 0x13},
+ {0x3636, 0x03},
+ {0x3634, 0x40},
+ {0x3622, 0x01},
+ {0x3c01, 0x34},
+ {0x3c04, 0x28},
+ {0x3c05, 0x98},
+ {0x3c06, 0x00},
+ {0x3c07, 0x08},
+ {0x3c08, 0x00},
+ {0x3c09, 0x1c},
+ {0x3c0a, 0x9c},
+ {0x3c0b, 0x40},
+ {0x3820, 0x41},
+ {0x3821, 0x07},
+ {0x3814, 0x31},
+ {0x3815, 0x31},
+ {0x3800, 0x00},
+ {0x3801, 0x00},
+ {0x3802, 0x00},
+ {0x3803, 0x04},
+ {0x3804, 0x0a},
+ {0x3805, 0x3f},
+ {0x3806, 0x07},
+ {0x3807, 0x9b},
+ {0x3808, 0x02},
+ {0x3809, 0x80},
+ {0x380a, 0x01},
+ {0x380b, 0xe0},
+ {0x380c, 0x07},
+ {0x380d, 0x68},
+ {0x380e, 0x03},
+ {0x380f, 0xd8},
+ {0x3810, 0x00},
+ {0x3811, 0x10},
+ {0x3812, 0x00},
+ {0x3813, 0x06},
+ {0x3618, 0x00},
+ {0x3612, 0x29},
+ {0x3708, 0x64},
+ {0x3709, 0x52},
+ {0x370c, 0x03},
+ {0x3a02, 0x03},
+ {0x3a03, 0xd8},
+ {0x3a08, 0x01},
+ {0x3a09, 0x27},
+ {0x3a0a, 0x00},
+ {0x3a0b, 0xf6},
+ {0x3a0e, 0x03},
+ {0x3a0d, 0x04},
+ {0x3a14, 0x03},
+ {0x3a15, 0xd8},
+ {0x4001, 0x02},
+ {0x4004, 0x02},
+ {0x3000, 0x00},
+ {0x3002, 0x1c},
+ {0x3004, 0xff},
+ {0x3006, 0xc3},
+ {0x300e, 0x45},
+ {0x302e, 0x08},
+ {0x4300, 0x30},
+ {0x501f, 0x00},
+ {0x4713, 0x03},
+ {0x4407, 0x04},
+ {0x440e, 0x00},
+ {0x460b, 0x35},
+ {0x460c, 0x22},
+ {0x4837, 0x44},
+ {0x3824, 0x02},
+ {0x5000, 0xa7},
+ {0x5001, 0xa3},
+ {0x5180, 0xff},
+ {0x5181, 0xf2},
+ {0x5182, 0x00},
+ {0x5183, 0x14},
+ {0x5184, 0x25},
+ {0x5185, 0x24},
+ {0x5186, 0x09},
+ {0x5187, 0x09},
+ {0x5188, 0x09},
+ {0x5189, 0x75},
+ {0x518a, 0x54},
+ {0x518b, 0xe0},
+ {0x518c, 0xb2},
+ {0x518d, 0x42},
+ {0x518e, 0x3d},
+ {0x518f, 0x56},
+ {0x5190, 0x46},
+ {0x5191, 0xf8},
+ {0x5192, 0x04},
+ {0x5193, 0x70},
+ {0x5194, 0xf0},
+ {0x5195, 0xf0},
+ {0x5196, 0x03},
+ {0x5197, 0x01},
+ {0x5198, 0x04},
+ {0x5199, 0x12},
+ {0x519a, 0x04},
+ {0x519b, 0x00},
+ {0x519c, 0x06},
+ {0x519d, 0x82},
+ {0x519e, 0x38},
+ {0x5381, 0x1e},
+ {0x5382, 0x5b},
+ {0x5383, 0x08},
+ {0x5384, 0x0a},
+ {0x5385, 0x7e},
+ {0x5386, 0x88},
+ {0x5387, 0x7c},
+ {0x5388, 0x6c},
+ {0x5389, 0x10},
+ {0x538a, 0x01},
+ {0x538b, 0x98},
+ {0x5300, 0x08},
+ {0x5301, 0x30},
+ {0x5302, 0x10},
+ {0x5303, 0x00},
+ {0x5304, 0x08},
+ {0x5305, 0x30},
+ {0x5306, 0x08},
+ {0x5307, 0x16},
+ {0x5309, 0x08},
+ {0x530a, 0x30},
+ {0x530b, 0x04},
+ {0x530c, 0x06},
+ {0x5480, 0x01},
+ {0x5481, 0x08},
+ {0x5482, 0x14},
+ {0x5483, 0x28},
+ {0x5484, 0x51},
+ {0x5485, 0x65},
+ {0x5486, 0x71},
+ {0x5487, 0x7d},
+ {0x5488, 0x87},
+ {0x5489, 0x91},
+ {0x548a, 0x9a},
+ {0x548b, 0xaa},
+ {0x548c, 0xb8},
+ {0x548d, 0xcd},
+ {0x548e, 0xdd},
+ {0x548f, 0xea},
+ {0x5490, 0x1d},
+ {0x5580, 0x02},
+ {0x5583, 0x40},
+ {0x5584, 0x10},
+ {0x5589, 0x10},
+ {0x558a, 0x00},
+ {0x558b, 0xf8},
+ {0x5800, 0x23},
+ {0x5801, 0x14},
+ {0x5802, 0x0f},
+ {0x5803, 0x0f},
+ {0x5804, 0x12},
+ {0x5805, 0x26},
+ {0x5806, 0x0c},
+ {0x5807, 0x08},
+ {0x5808, 0x05},
+ {0x5809, 0x05},
+ {0x580a, 0x08},
+ {0x580b, 0x0d},
+ {0x580c, 0x08},
+ {0x580d, 0x03},
+ {0x580e, 0x00},
+ {0x580f, 0x00},
+ {0x5810, 0x03},
+ {0x5811, 0x09},
+ {0x5812, 0x07},
+ {0x5813, 0x03},
+ {0x5814, 0x00},
+ {0x5815, 0x01},
+ {0x5816, 0x03},
+ {0x5817, 0x08},
+ {0x5818, 0x0d},
+ {0x5819, 0x08},
+ {0x581a, 0x05},
+ {0x581b, 0x06},
+ {0x581c, 0x08},
+ {0x581d, 0x0e},
+ {0x581e, 0x29},
+ {0x581f, 0x17},
+ {0x5820, 0x11},
+ {0x5821, 0x11},
+ {0x5822, 0x15},
+ {0x5823, 0x28},
+ {0x5824, 0x46},
+ {0x5825, 0x26},
+ {0x5826, 0x08},
+ {0x5827, 0x26},
+ {0x5828, 0x64},
+ {0x5829, 0x26},
+ {0x582a, 0x24},
+ {0x582b, 0x22},
+ {0x582c, 0x24},
+ {0x582d, 0x24},
+ {0x582e, 0x06},
+ {0x582f, 0x22},
+ {0x5830, 0x40},
+ {0x5831, 0x42},
+ {0x5832, 0x24},
+ {0x5833, 0x26},
+ {0x5834, 0x24},
+ {0x5835, 0x22},
+ {0x5836, 0x22},
+ {0x5837, 0x26},
+ {0x5838, 0x44},
+ {0x5839, 0x24},
+ {0x583a, 0x26},
+ {0x583b, 0x28},
+ {0x583c, 0x42},
+ {0x583d, 0xce},
+ {0x5025, 0x00},
+ {0x3a0f, 0x30},
+ {0x3a10, 0x28},
+ {0x3a1b, 0x30},
+ {0x3a1e, 0x26},
+ {0x3a11, 0x60},
+ {0x3a1f, 0x14},
+ {0x3008, 0x02},
+};
+
+struct ov5640_sensor ov5640_init_iq_tbl[] = {
+/* Lens correction */
+/* OV5640 LENC setting */
+ {0x5800, 0x3f},
+ {0x5801, 0x20},
+ {0x5802, 0x1a},
+ {0x5803, 0x1a},
+ {0x5804, 0x23},
+ {0x5805, 0x3f},
+ {0x5806, 0x11},
+ {0x5807, 0x0c},
+ {0x5808, 0x09},
+ {0x5809, 0x08},
+ {0x580a, 0x0d},
+ {0x580b, 0x12},
+ {0x580c, 0x0d},
+ {0x580d, 0x04},
+ {0x580e, 0x00},
+ {0x580f, 0x00},
+ {0x5810, 0x05},
+ {0x5811, 0x0d},
+ {0x5812, 0x0d},
+ {0x5813, 0x04},
+ {0x5814, 0x00},
+ {0x5815, 0x00},
+ {0x5816, 0x04},
+ {0x5817, 0x0d},
+ {0x5818, 0x13},
+ {0x5819, 0x0d},
+ {0x581a, 0x08},
+ {0x581b, 0x08},
+ {0x581c, 0x0c},
+ {0x581d, 0x13},
+ {0x581e, 0x3f},
+ {0x581f, 0x1f},
+ {0x5820, 0x1b},
+ {0x5821, 0x1c},
+ {0x5822, 0x23},
+ {0x5823, 0x3f},
+ {0x5824, 0x6a},
+ {0x5825, 0x06},
+ {0x5826, 0x08},
+ {0x5827, 0x06},
+ {0x5828, 0x2a},
+ {0x5829, 0x08},
+ {0x582a, 0x24},
+ {0x582b, 0x24},
+ {0x582c, 0x24},
+ {0x582d, 0x08},
+ {0x582e, 0x08},
+ {0x582f, 0x22},
+ {0x5830, 0x40},
+ {0x5831, 0x22},
+ {0x5832, 0x06},
+ {0x5833, 0x08},
+ {0x5834, 0x24},
+ {0x5835, 0x24},
+ {0x5836, 0x04},
+ {0x5837, 0x0a},
+ {0x5838, 0x86},
+ {0x5839, 0x08},
+ {0x583a, 0x28},
+ {0x583b, 0x28},
+ {0x583c, 0x66},
+ {0x583d, 0xce},
+/* AEC */
+ {0x3a0f, 0x38},
+ {0x3a10, 0x30},
+ {0x3a11, 0x61},
+ {0x3a1b, 0x38},
+ {0x3a1e, 0x30},
+ {0x3a1f, 0x10},
+ /* AWB */
+ {0x5180, 0xff},
+ {0x5181, 0xf2},
+ {0x5182, 0x00},
+ {0x5183, 0x14},
+ {0x5184, 0x25},
+ {0x5185, 0x24},
+ {0x5186, 0x09},
+ {0x5187, 0x09},
+ {0x5188, 0x09},
+ {0x5189, 0x88},
+ {0x518a, 0x54},
+ {0x518b, 0xee},
+ {0x518c, 0xb2},
+ {0x518d, 0x50},
+ {0x518e, 0x34},
+ {0x518f, 0x6b},
+ {0x5190, 0x46},
+ {0x5191, 0xf8},
+ {0x5192, 0x04},
+ {0x5193, 0x70},
+ {0x5194, 0xf0},
+ {0x5195, 0xf0},
+ {0x5196, 0x03},
+ {0x5197, 0x01},
+ {0x5198, 0x04},
+ {0x5199, 0x6c},
+ {0x519a, 0x04},
+ {0x519b, 0x00},
+ {0x519c, 0x09},
+ {0x519d, 0x2b},
+ {0x519e, 0x38},
+
+/* UV Adjust Auto Mode */
+ {0x5580, 0x02}, /* 02 ;Sat enable */
+ {0x5588, 0x01}, /*40 ;enable UV adj */
+ {0x5583, 0x40}, /* ;offset high */
+ {0x5584, 0x18}, /* ;offset low */
+ {0x5589, 0x18}, /* ;gth1 */
+ {0x558a, 0x00},
+ {0x358b, 0xf8}, /* ;gth2 */
+};
+
+struct ov5640_sensor ov5640_preview_tbl[] = {
+/* @@ MIPI_2lane_5M to vga(YUV) 30fps 99 640 480 98 0 0 */
+ {0x3503, 0x00}, /* enable AE back from capture to preview */
+ {0x3035, 0x14},
+ {0x3036, 0x38},
+ {0x3820, 0x41},
+ {0x3821, 0x07},
+ {0x3814, 0x31},
+ {0x3815, 0x31},
+ {0x3803, 0x04},
+ {0x3807, 0x9b},
+ {0x3808, 0x02},
+ {0x3809, 0x80},
+ {0x380a, 0x01},
+ {0x380b, 0xe0},
+ {0x380c, 0x07},
+ {0x380d, 0x68},
+ {0x380e, 0x03},
+ {0x380f, 0xd8},
+ {0x3813, 0x06},
+ {0x3618, 0x00},
+ {0x3612, 0x29},
+ {0x3708, 0x64},
+ {0x3709, 0x52},
+ {0x370c, 0x03},
+ {0x5001, 0xa3},
+ {0x4004, 0x02},
+ {0x4005, 0x18},
+ {0x4837, 0x44},
+ {0x4713, 0x03},
+ {0x4407, 0x04},
+ {0x460b, 0x35},
+ {0x460c, 0x22},
+ {0x3824, 0x02},
+};
+
+struct ov5640_sensor ov5640_capture_tbl[] = {
+/* @@ MIPI_2lane_5M(YUV) 7.5/15fps 99 2592 1944 98 0 0 */
+ {0x3035, 0x21}, /* 11 */
+ {0x3036, 0x54},
+ {0x3820, 0x40},
+ {0x3821, 0x06},
+ {0x3814, 0x11},
+ {0x3815, 0x11},
+ {0x3803, 0x00},
+ {0x3807, 0x9f},
+ {0x3808, 0x0a},
+ {0x3809, 0x20},
+ {0x380a, 0x07},
+ {0x380b, 0x98},
+ {0x380c, 0x0b},
+ {0x380d, 0x1c},
+ {0x380e, 0x07},
+ {0x380f, 0xb0},
+ {0x3813, 0x04},
+ {0x3618, 0x04},
+ {0x3612, 0x2b},
+ {0x3708, 0x21},
+ {0x3709, 0x12},
+ {0x370c, 0x00},
+ {0x5001, 0x83},
+ {0x4004, 0x06},
+ {0x4005, 0x1a},
+ {0x4837, 0x15}, /* 0a */
+ {0x4713, 0x02},
+ {0x4407, 0x0c},
+ {0x460b, 0x37},
+ {0x460c, 0x20},
+ {0x3824, 0x01},
+};
+
+/* Contrast */
+
+struct ov5640_sensor ov5640_contrast_lv0_tbl[] = {
+/* Contrast -4 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)}, /* Enable BIT2 for contrast/brightness
+ control*/
+ {0x5586, 0x10}, /* Gain */
+ {0x5585, 0x10}, /* Offset */
+ {0x5588, 0x00, INVMASK(0x04)}, /* Offset sign */
+};
+
+struct ov5640_sensor ov5640_contrast_lv1_tbl[] = {
+/* Contrast -3 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)}, /* Enable BIT2 for contrast/brightness
+ control */
+ {0x5586, 0x14}, /* Gain */
+ {0x5585, 0x14}, /* Offset */
+ {0x5588, 0x00, INVMASK(0x04)}, /* Offset sign */
+};
+
+struct ov5640_sensor ov5640_contrast_lv2_tbl[] = {
+/* Contrast -2 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)}, /* Enable BIT2 for contrast/brightness
+ control */
+ {0x5586, 0x18}, /* Gain */
+ {0x5585, 0x18}, /* Offset */
+ {0x5588, 0x00, INVMASK(0x04)}, /* Offset sign */
+};
+
+struct ov5640_sensor ov5640_contrast_lv3_tbl[] = {
+/* Contrast -1 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5586, 0x1c},
+ {0x5585, 0x1c},
+ {0x5588, 0x00, INVMASK(0x04)},
+};
+
+struct ov5640_sensor ov5640_contrast_default_lv4_tbl[] = {
+/* Contrast (Default) */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5586, 0x20},
+ {0x5585, 0x00},
+ {0x5588, 0x00, INVMASK(0x04)},
+};
+
+struct ov5640_sensor ov5640_contrast_lv5_tbl[] = {
+/* Contrast +1 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5586, 0x24},
+ {0x5585, 0x10},
+ {0x5588, 0x00, INVMASK(0x04)},
+};
+
+struct ov5640_sensor ov5640_contrast_lv6_tbl[] = {
+/* Contrast +2 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5586, 0x28},
+ {0x5585, 0x18},
+ {0x5588, 0x00, INVMASK(0x04)},
+};
+
+struct ov5640_sensor ov5640_contrast_lv7_tbl[] = {
+/* Contrast +3 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5586, 0x2c},
+ {0x5585, 0x1c},
+ {0x5588, 0x00, INVMASK(0x04)},
+};
+
+struct ov5640_sensor ov5640_contrast_lv8_tbl[] = {
+/* Contrast +4 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5586, 0x30},
+ {0x5585, 0x20},
+ {0x5588, 0x00, INVMASK(0x04)},
+};
+
+/* Sharpness */
+
+struct ov5640_sensor ov5640_sharpness_lv0_tbl[] = {
+/* Sharpness 0 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x00},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv1_tbl[] = {
+/* Sharpness 1 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x02},
+};
+
+struct ov5640_sensor ov5640_sharpness_default_lv2_tbl[] = {
+/* Sharpness_Auto (Default) */
+ {0x5308, 0x00, INVMASK(0x40)},
+ {0x5300, 0x08},
+ {0x5301, 0x30},
+ {0x5302, 0x10},
+ {0x5303, 0x00},
+ {0x5309, 0x08},
+ {0x530a, 0x30},
+ {0x530b, 0x04},
+ {0x530c, 0x06},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv3_tbl[] = {
+/* Sharpness 3 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x08},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv4_tbl[] = {
+/* Sharpness 4 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x0c},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv5_tbl[] = {
+/* Sharpness 5 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x10},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv6_tbl[] = {
+/* Sharpness 6 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x14},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv7_tbl[] = {
+/* Sharpness 7 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x18},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv8_tbl[] = {
+/* Sharpness 8 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x20},
+};
+
+/* Saturation */
+
+struct ov5640_sensor ov5640_saturation_lv0_tbl[] = {
+/* Saturation x0.25 */
+ {0x5001, 0x83, INVMASK(0x80)}, /* SDE_En */
+ {0x5583, 0x00}, /* Saturaion gain in U */
+ {0x5584, 0x00}, /* Saturation gain in V */
+ {0x5580, 0x02, INVMASK(0x02)}, /* Saturation enable */
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv1_tbl[] = {
+/* Saturation x0.5 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x10},
+ {0x5584, 0x10},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv2_tbl[] = {
+/* Saturation x0.75 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x20},
+ {0x5584, 0x20},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv3_tbl[] = {
+/* Saturation x0.75 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x30},
+ {0x5584, 0x30},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_default_lv4_tbl[] = {
+/* Saturation x1 (Default) */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x40},
+ {0x5584, 0x40},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv5_tbl[] = {
+/* Saturation x1.25 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x50},
+ {0x5584, 0x50},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv6_tbl[] = {
+/* Saturation x1.5 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x60},
+ {0x5584, 0x60},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv7_tbl[] = {
+/* Saturation x1.25 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x70},
+ {0x5584, 0x70},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv8_tbl[] = {
+/* Saturation x1.5 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x80},
+ {0x5584, 0x80},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+/* Brightness */
+
+struct ov5640_sensor ov5640_brightness_lv0_tbl[] = {
+/* Brightness -4 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x40},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x08, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv1_tbl[] = {
+/* Brightness -3 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x30},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x08, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv2_tbl[] = {
+/* Brightness -2 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x20},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x08, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv3_tbl[] = {
+/* Brightness -1 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x10},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x08, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_default_lv4_tbl[] = {
+/* Brightness 0 (Default) */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x00},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x00, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv5_tbl[] = {
+/* Brightness +1 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x10},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x00, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv6_tbl[] = {
+/* Brightness +2 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x20},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x00, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv7_tbl[] = {
+/* Brightness +3 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x30},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x00, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv8_tbl[] = {
+/* Brightness +4 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x40},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x00, INVMASK(0x08)},
+};
+
+/* Exposure Compensation */
+struct ov5640_sensor ov5640_exposure_compensation_lv0_tbl[] = {
+ /* @@ +1.7EV */
+ {0x3a0f, 0x60},
+ {0x3a10, 0x58},
+ {0x3a11, 0xa0},
+ {0x3a1b, 0x60},
+ {0x3a1e, 0x58},
+ {0x3a1f, 0x20},
+};
+
+struct ov5640_sensor ov5640_exposure_compensation_lv1_tbl[] = {
+ /* @@ +1.0EV */
+ {0x3a0f, 0x50},
+ {0x3a10, 0x48},
+ {0x3a11, 0x90},
+ {0x3a1b, 0x50},
+ {0x3a1e, 0x48},
+ {0x3a1f, 0x20},
+};
+
+struct ov5640_sensor ov5640_exposure_compensation_lv2_default_tbl[] = {
+ /* @@ default */
+ {0x3a0f, 0x38},
+ {0x3a10, 0x30},
+ {0x3a11, 0x61},
+ {0x3a1b, 0x38},
+ {0x3a1e, 0x30},
+ {0x3a1f, 0x10},
+};
+
+struct ov5640_sensor ov5640_exposure_compensation_lv3_tbl[] = {
+ /* @@ -1.0EV */
+ {0x3a0f, 0x20},
+ {0x3a10, 0x18},
+ {0x3a11, 0x41},
+ {0x3a1b, 0x20},
+ {0x3a1e, 0x18},
+ {0x3a1f, 0x10},
+};
+
+struct ov5640_sensor ov5640_exposure_compensation_lv4_tbl[] = {
+ /* @@ -1.7EV */
+ {0x3a0f, 0x10},
+ {0x3a10, 0x08},
+ {0x3a11, 0x10},
+ {0x3a1b, 0x08},
+ {0x3a1e, 0x20},
+ {0x3a1f, 0x10},
+};
+
+/* Auto Expourse Weight */
+
+struct ov5640_sensor ov5640_ae_average_tbl[] = {
+ /* Whole Image Average */
+ {0x5688, 0x11}, /* Zone 1/Zone 0 weight */
+ {0x5689, 0x11}, /* Zone 3/Zone 2 weight */
+ {0x569a, 0x11}, /* Zone 5/Zone 4 weight */
+ {0x569b, 0x11}, /* Zone 7/Zone 6 weight */
+ {0x569c, 0x11}, /* Zone 9/Zone 8 weight */
+ {0x569d, 0x11}, /* Zone b/Zone a weight */
+ {0x569e, 0x11}, /* Zone d/Zone c weight */
+ {0x569f, 0x11}, /* Zone f/Zone e weight */
+};
+
+struct ov5640_sensor ov5640_ae_centerweight_tbl[] = {
+ /* Whole Image Center More weight */
+ {0x5688, 0x62},
+ {0x5689, 0x26},
+ {0x568a, 0xe6},
+ {0x568b, 0x6e},
+ {0x568c, 0xea},
+ {0x568d, 0xae},
+ {0x568e, 0xa6},
+ {0x568f, 0x6a},
+};
+
+/* Light Mode */
+struct ov5640_sensor ov5640_wb_def[] = {
+ {0x3406, 0x00, INVMASK(0x01)},
+};
+
+struct ov5640_sensor ov5640_wb_custom[] = {
+ {0x3406, 0x01, INVMASK(0x01)},
+ {0x3400, 0x04},
+ {0x3401, 0x58},
+ {0x3402, 0x04},
+ {0x3403, 0x00},
+ {0x3404, 0x08},
+ {0x3405, 0x40},
+};
+
+struct ov5640_sensor ov5640_wb_inc[] = {
+ {0x3406, 0x01, INVMASK(0x01)},
+ {0x3400, 0x04},
+ {0x3401, 0x88},
+ {0x3402, 0x04},
+ {0x3403, 0x00},
+ {0x3404, 0x08},
+ {0x3405, 0xb6},
+};
+
+struct ov5640_sensor ov5640_wb_daylight[] = {
+ {0x3406, 0x01, INVMASK(0x01)},
+ {0x3400, 0x07},
+ {0x3401, 0x02},
+ {0x3402, 0x04},
+ {0x3403, 0x00},
+ {0x3404, 0x05},
+ {0x3405, 0x15},
+};
+
+struct ov5640_sensor ov5640_wb_cloudy[] = {
+ {0x3406, 0x01, INVMASK(0x01)},
+ {0x3400, 0x07},
+ {0x3401, 0x88},
+ {0x3402, 0x04},
+ {0x3403, 0x00},
+ {0x3404, 0x05},
+ {0x3405, 0x00},
+};
+
+/* EFFECT */
+struct ov5640_sensor ov5640_effect_normal_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x00, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0x40},
+ {0x5584, 0x40},
+};
+
+struct ov5640_sensor ov5640_effect_mono_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x20, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0x40},
+ {0x5584, 0x40},
+};
+
+struct ov5640_sensor ov5640_effect_bw_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x18, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0x80},
+ {0x5584, 0x80},
+};
+
+struct ov5640_sensor ov5640_effect_bluish_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x18, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0xa0},
+ {0x5584, 0x40},
+};
+
+struct ov5640_sensor ov5640_effect_solarize_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x00, INVMASK(0x78)},
+ {0x5003, 0x09},
+};
+
+
+struct ov5640_sensor ov5640_effect_sepia_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x18, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0x40},
+ {0x5584, 0xa0},
+};
+
+struct ov5640_sensor ov5640_effect_reddish_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x18, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0x80},
+ {0x5584, 0xc0},
+};
+
+struct ov5640_sensor ov5640_effect_greenish_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x18, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0x60},
+ {0x5584, 0x60},
+};
+
+struct ov5640_sensor ov5640_effect_negative_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x40, INVMASK(0x78)},
+ {0x5003, 0x08},
+};
+
+/* AntiBanding */
+struct ov5640_sensor ov5640_antibanding_auto_tbl[] = {
+ /* Auto-XCLK24MHz */
+ {0x3622, 0x01}, /* PD-sel */
+ {0x3635, 0x1c}, /* VMREF 3635[2:0] */
+ {0x3634, 0x40}, /* I_5060 3643[2:0] */
+ {0x3c01, 0x34},
+ {0x3c00, 0x00},
+ {0x3c04, 0x28},
+ {0x3c05, 0x98},
+ {0x3c06, 0x00},
+ {0x3c07, 0x08},
+ {0x3c08, 0x00},
+ {0x3c09, 0x1c},
+ {0x300c, 0x22}, /* 50/60div 300c[2:0] */
+ {0x3c0a, 0x9c},
+ {0x3c0b, 0x40},
+};
+
+struct ov5640_sensor ov5640_antibanding_50z_tbl[] = {
+ /* Band 50Hz */
+ {0x3c01, 0x80, INVMASK(0x80)},
+ {0x3c00, 0x04},
+};
+
+struct ov5640_sensor ov5640_antibanding_60z_tbl[] = {
+ /* Band 60Hz */
+ {0x3c01, 0x80, INVMASK(0x80)},
+ {0x3c00, 0x00},
+};
+
+
+/* Lens_shading */
+
+struct ov5640_sensor ov5640_lens_shading_on_tbl[] = {
+ /* @@ Lenc On(C) */
+ {0x5000, 0x80, INVMASK(0x80)},
+};
+
+struct ov5640_sensor ov5640_lens_shading_off_tbl[] = {
+ /* Lenc Off */
+ {0x5000, 0x00, INVMASK(0x80)},
+};
+
+/* Auto Focus Firmware-use 2011-08-24 firmware settings */
+u8 ov5640_afinit_tbl[] = {
+ 0x80, 0x00, 0x02, 0x0b, 0x7b, 0x02, 0x07, 0xbd, 0xc2,
+ 0x01, 0x22, 0x22, 0x00, 0x02, 0x0b, 0x57, 0xe5, 0x1f,
+ 0x70, 0x72, 0xf5, 0x1e, 0xd2, 0x35, 0xff, 0xef, 0x25,
+ 0xe0, 0x24, 0x4b, 0xf8, 0xe4, 0xf6, 0x08, 0xf6, 0x0f,
+ 0xbf, 0x34, 0xf2, 0x90, 0x0e, 0x88, 0xe4, 0x93, 0xff,
+ 0xe5, 0x49, 0xc3, 0x9f, 0x50, 0x04, 0x7f, 0x05, 0x80,
+ 0x02, 0x7f, 0xfb, 0x78, 0xba, 0xa6, 0x07, 0x12, 0x0a,
+ 0xb4, 0x40, 0x04, 0x7f, 0x03, 0x80, 0x02, 0x7f, 0x30,
+ 0x78, 0xb9, 0xa6, 0x07, 0xe6, 0x18, 0xf6, 0x08, 0xe6,
+ 0x78, 0xb6, 0xf6, 0x78, 0xb9, 0xe6, 0x78, 0xb7, 0xf6,
+ 0x78, 0xbc, 0x76, 0x33, 0xe4, 0x08, 0xf6, 0x78, 0xb5,
+ 0x76, 0x01, 0x75, 0x48, 0x02, 0x78, 0xb3, 0xf6, 0x08,
+ 0xf6, 0x74, 0xff, 0x78, 0xbe, 0xf6, 0x08, 0xf6, 0x75,
+ 0x1f, 0x01, 0x78, 0xb9, 0xe6, 0x75, 0xf0, 0x05, 0xa4,
+ 0xf5, 0x49, 0x12, 0x08, 0x5b, 0xc2, 0x37, 0x22, 0x78,
+ 0xb5, 0xe6, 0xd3, 0x94, 0x00, 0x40, 0x02, 0x16, 0x22,
+ 0xe5, 0x1f, 0x64, 0x05, 0x70, 0x28, 0xf5, 0x1f, 0xc2,
+ 0x01, 0x78, 0xb6, 0xe6, 0x25, 0xe0, 0x24, 0x4b, 0xf8,
+ 0xe6, 0xfe, 0x08, 0xe6, 0xff, 0x78, 0x4b, 0xa6, 0x06,
+ 0x08, 0xa6, 0x07, 0xa2, 0x37, 0xe4, 0x33, 0xf5, 0x3c,
+ 0x90, 0x30, 0x28, 0xf0, 0x75, 0x1e, 0x10, 0xd2, 0x35,
+ 0x22, 0xe5, 0x49, 0x75, 0xf0, 0x05, 0x84, 0x78, 0xb9,
+ 0xf6, 0x90, 0x0e, 0x85, 0xe4, 0x93, 0xff, 0x25, 0xe0,
+ 0x24, 0x0a, 0xf8, 0xe6, 0xfc, 0x08, 0xe6, 0xfd, 0x78,
+ 0xb9, 0xe6, 0x25, 0xe0, 0x24, 0x4b, 0xf8, 0xa6, 0x04,
+ 0x08, 0xa6, 0x05, 0xef, 0x12, 0x0a, 0xbb, 0xd3, 0x78,
+ 0xb4, 0x96, 0xee, 0x18, 0x96, 0x40, 0x0d, 0x78, 0xb9,
+ 0xe6, 0x78, 0xb6, 0xf6, 0x78, 0xb3, 0xa6, 0x06, 0x08,
+ 0xa6, 0x07, 0x90, 0x0e, 0x85, 0xe4, 0x93, 0x12, 0x0a,
+ 0xbb, 0xc3, 0x78, 0xbf, 0x96, 0xee, 0x18, 0x96, 0x50,
+ 0x0d, 0x78, 0xb9, 0xe6, 0x78, 0xb7, 0xf6, 0x78, 0xbe,
+ 0xa6, 0x06, 0x08, 0xa6, 0x07, 0x78, 0xb3, 0xe6, 0xfe,
+ 0x08, 0xe6, 0xc3, 0x78, 0xbf, 0x96, 0xff, 0xee, 0x18,
+ 0x96, 0x78, 0xc0, 0xf6, 0x08, 0xa6, 0x07, 0x90, 0x0e,
+ 0x8a, 0xe4, 0x18, 0x12, 0x0a, 0x99, 0xc3, 0x33, 0xce,
+ 0x33, 0xce, 0xd8, 0xf9, 0xff, 0xd3, 0xed, 0x9f, 0xec,
+ 0x9e, 0x40, 0x02, 0xd2, 0x37, 0x78, 0xb9, 0xe6, 0x08,
+ 0x26, 0x08, 0xf6, 0xe5, 0x1f, 0x64, 0x01, 0x70, 0x55,
+ 0xe6, 0xc3, 0x78, 0xbd, 0x12, 0x0a, 0x8f, 0x40, 0x10,
+ 0x12, 0x0a, 0x8a, 0x50, 0x0b, 0x30, 0x37, 0x41, 0x78,
+ 0xb9, 0xe6, 0x78, 0xb6, 0x66, 0x60, 0x39, 0x12, 0x0a,
+ 0xb2, 0x40, 0x04, 0x7f, 0xfe, 0x80, 0x02, 0x7f, 0x02,
+ 0x78, 0xba, 0xa6, 0x07, 0x78, 0xb6, 0xe6, 0x24, 0x03,
+ 0x78, 0xbc, 0xf6, 0x78, 0xb6, 0xe6, 0x24, 0xfd, 0x78,
+ 0xbd, 0xf6, 0x12, 0x0a, 0xb2, 0x40, 0x06, 0x78, 0xbd,
+ 0xe6, 0xff, 0x80, 0x04, 0x78, 0xbc, 0xe6, 0xff, 0x78,
+ 0xbb, 0xa6, 0x07, 0x75, 0x1f, 0x02, 0x78, 0xb5, 0x76,
+ 0x01, 0x02, 0x02, 0x68, 0xe5, 0x1f, 0x64, 0x02, 0x60,
+ 0x03, 0x02, 0x02, 0x48, 0x78, 0xbb, 0xe6, 0xff, 0xc3,
+ 0x78, 0xbd, 0x12, 0x0a, 0x90, 0x40, 0x08, 0x12, 0x0a,
+ 0x8a, 0x50, 0x03, 0x02, 0x02, 0x46, 0x12, 0x0a, 0xb2,
+ 0x40, 0x04, 0x7f, 0xff, 0x80, 0x02, 0x7f, 0x01, 0x78,
+ 0xba, 0xa6, 0x07, 0x78, 0xb6, 0xe6, 0x04, 0x78, 0xbc,
+ 0xf6, 0x78, 0xb6, 0xe6, 0x14, 0x78, 0xbd, 0xf6, 0x18,
+ 0x12, 0x0a, 0xb4, 0x40, 0x04, 0xe6, 0xff, 0x80, 0x02,
+ 0x7f, 0x00, 0x78, 0xbc, 0xa6, 0x07, 0xd3, 0x08, 0xe6,
+ 0x64, 0x80, 0x94, 0x80, 0x40, 0x04, 0xe6, 0xff, 0x80,
+ 0x02, 0x7f, 0x00, 0x78, 0xbd, 0xa6, 0x07, 0xc3, 0x18,
+ 0xe6, 0x64, 0x80, 0x94, 0xb3, 0x50, 0x04, 0xe6, 0xff,
+ 0x80, 0x02, 0x7f, 0x33, 0x78, 0xbc, 0xa6, 0x07, 0xc3,
+ 0x08, 0xe6, 0x64, 0x80, 0x94, 0xb3, 0x50, 0x04, 0xe6,
+ 0xff, 0x80, 0x02, 0x7f, 0x33, 0x78, 0xbd, 0xa6, 0x07,
+ 0x12, 0x0a, 0xb2, 0x40, 0x06, 0x78, 0xbd, 0xe6, 0xff,
+ 0x80, 0x04, 0x78, 0xbc, 0xe6, 0xff, 0x78, 0xbb, 0xa6,
+ 0x07, 0x75, 0x1f, 0x03, 0x78, 0xb5, 0x76, 0x01, 0x80,
+ 0x20, 0xe5, 0x1f, 0x64, 0x03, 0x70, 0x26, 0x78, 0xbb,
+ 0xe6, 0xff, 0xc3, 0x78, 0xbd, 0x12, 0x0a, 0x90, 0x40,
+ 0x05, 0x12, 0x0a, 0x8a, 0x40, 0x09, 0x78, 0xb6, 0xe6,
+ 0x78, 0xbb, 0xf6, 0x75, 0x1f, 0x04, 0x78, 0xbb, 0xe6,
+ 0x75, 0xf0, 0x05, 0xa4, 0xf5, 0x49, 0x02, 0x08, 0x5b,
+ 0xe5, 0x1f, 0xb4, 0x04, 0x1d, 0x90, 0x0e, 0x89, 0xe4,
+ 0x78, 0xc0, 0x12, 0x0a, 0x99, 0xc3, 0x33, 0xce, 0x33,
+ 0xce, 0xd8, 0xf9, 0xff, 0xd3, 0xed, 0x9f, 0xec, 0x9e,
+ 0x40, 0x02, 0xd2, 0x37, 0x75, 0x1f, 0x05, 0x22, 0xef,
+ 0x8d, 0xf0, 0xa4, 0xa8, 0xf0, 0xcf, 0x8c, 0xf0, 0xa4,
+ 0x28, 0xce, 0x8d, 0xf0, 0xa4, 0x2e, 0xfe, 0x22, 0xbc,
+ 0x00, 0x0b, 0xbe, 0x00, 0x29, 0xef, 0x8d, 0xf0, 0x84,
+ 0xff, 0xad, 0xf0, 0x22, 0xe4, 0xcc, 0xf8, 0x75, 0xf0,
+ 0x08, 0xef, 0x2f, 0xff, 0xee, 0x33, 0xfe, 0xec, 0x33,
+ 0xfc, 0xee, 0x9d, 0xec, 0x98, 0x40, 0x05, 0xfc, 0xee,
+ 0x9d, 0xfe, 0x0f, 0xd5, 0xf0, 0xe9, 0xe4, 0xce, 0xfd,
+ 0x22, 0xed, 0xf8, 0xf5, 0xf0, 0xee, 0x84, 0x20, 0xd2,
+ 0x1c, 0xfe, 0xad, 0xf0, 0x75, 0xf0, 0x08, 0xef, 0x2f,
+ 0xff, 0xed, 0x33, 0xfd, 0x40, 0x07, 0x98, 0x50, 0x06,
+ 0xd5, 0xf0, 0xf2, 0x22, 0xc3, 0x98, 0xfd, 0x0f, 0xd5,
+ 0xf0, 0xea, 0x22, 0xe8, 0x8f, 0xf0, 0xa4, 0xcc, 0x8b,
+ 0xf0, 0xa4, 0x2c, 0xfc, 0xe9, 0x8e, 0xf0, 0xa4, 0x2c,
+ 0xfc, 0x8a, 0xf0, 0xed, 0xa4, 0x2c, 0xfc, 0xea, 0x8e,
+ 0xf0, 0xa4, 0xcd, 0xa8, 0xf0, 0x8b, 0xf0, 0xa4, 0x2d,
+ 0xcc, 0x38, 0x25, 0xf0, 0xfd, 0xe9, 0x8f, 0xf0, 0xa4,
+ 0x2c, 0xcd, 0x35, 0xf0, 0xfc, 0xeb, 0x8e, 0xf0, 0xa4,
+ 0xfe, 0xa9, 0xf0, 0xeb, 0x8f, 0xf0, 0xa4, 0xcf, 0xc5,
+ 0xf0, 0x2e, 0xcd, 0x39, 0xfe, 0xe4, 0x3c, 0xfc, 0xea,
+ 0xa4, 0x2d, 0xce, 0x35, 0xf0, 0xfd, 0xe4, 0x3c, 0xfc,
+ 0x22, 0x75, 0xf0, 0x08, 0x75, 0x82, 0x00, 0xef, 0x2f,
+ 0xff, 0xee, 0x33, 0xfe, 0xcd, 0x33, 0xcd, 0xcc, 0x33,
+ 0xcc, 0xc5, 0x82, 0x33, 0xc5, 0x82, 0x9b, 0xed, 0x9a,
+ 0xec, 0x99, 0xe5, 0x82, 0x98, 0x40, 0x0c, 0xf5, 0x82,
+ 0xee, 0x9b, 0xfe, 0xed, 0x9a, 0xfd, 0xec, 0x99, 0xfc,
+ 0x0f, 0xd5, 0xf0, 0xd6, 0xe4, 0xce, 0xfb, 0xe4, 0xcd,
+ 0xfa, 0xe4, 0xcc, 0xf9, 0xa8, 0x82, 0x22, 0xb8, 0x00,
+ 0xc1, 0xb9, 0x00, 0x59, 0xba, 0x00, 0x2d, 0xec, 0x8b,
+ 0xf0, 0x84, 0xcf, 0xce, 0xcd, 0xfc, 0xe5, 0xf0, 0xcb,
+ 0xf9, 0x78, 0x18, 0xef, 0x2f, 0xff, 0xee, 0x33, 0xfe,
+ 0xed, 0x33, 0xfd, 0xec, 0x33, 0xfc, 0xeb, 0x33, 0xfb,
+ 0x10, 0xd7, 0x03, 0x99, 0x40, 0x04, 0xeb, 0x99, 0xfb,
+ 0x0f, 0xd8, 0xe5, 0xe4, 0xf9, 0xfa, 0x22, 0x78, 0x18,
+ 0xef, 0x2f, 0xff, 0xee, 0x33, 0xfe, 0xed, 0x33, 0xfd,
+ 0xec, 0x33, 0xfc, 0xc9, 0x33, 0xc9, 0x10, 0xd7, 0x05,
+ 0x9b, 0xe9, 0x9a, 0x40, 0x07, 0xec, 0x9b, 0xfc, 0xe9,
+ 0x9a, 0xf9, 0x0f, 0xd8, 0xe0, 0xe4, 0xc9, 0xfa, 0xe4,
+ 0xcc, 0xfb, 0x22, 0x75, 0xf0, 0x10, 0xef, 0x2f, 0xff,
+ 0xee, 0x33, 0xfe, 0xed, 0x33, 0xfd, 0xcc, 0x33, 0xcc,
+ 0xc8, 0x33, 0xc8, 0x10, 0xd7, 0x07, 0x9b, 0xec, 0x9a,
+ 0xe8, 0x99, 0x40, 0x0a, 0xed, 0x9b, 0xfd, 0xec, 0x9a,
+ 0xfc, 0xe8, 0x99, 0xf8, 0x0f, 0xd5, 0xf0, 0xda, 0xe4,
+ 0xcd, 0xfb, 0xe4, 0xcc, 0xfa, 0xe4, 0xc8, 0xf9, 0x22,
+ 0xeb, 0x9f, 0xf5, 0xf0, 0xea, 0x9e, 0x42, 0xf0, 0xe9,
+ 0x9d, 0x42, 0xf0, 0xe8, 0x9c, 0x45, 0xf0, 0x22, 0xe8,
+ 0x60, 0x0f, 0xef, 0xc3, 0x33, 0xff, 0xee, 0x33, 0xfe,
+ 0xed, 0x33, 0xfd, 0xec, 0x33, 0xfc, 0xd8, 0xf1, 0x22,
+ 0xe4, 0x93, 0xfc, 0x74, 0x01, 0x93, 0xfd, 0x74, 0x02,
+ 0x93, 0xfe, 0x74, 0x03, 0x93, 0xff, 0x22, 0xe6, 0xfb,
+ 0x08, 0xe6, 0xf9, 0x08, 0xe6, 0xfa, 0x08, 0xe6, 0xcb,
+ 0xf8, 0x22, 0xec, 0xf6, 0x08, 0xed, 0xf6, 0x08, 0xee,
+ 0xf6, 0x08, 0xef, 0xf6, 0x22, 0xa4, 0x25, 0x82, 0xf5,
+ 0x82, 0xe5, 0xf0, 0x35, 0x83, 0xf5, 0x83, 0x22, 0xd0,
+ 0x83, 0xd0, 0x82, 0xf8, 0xe4, 0x93, 0x70, 0x12, 0x74,
+ 0x01, 0x93, 0x70, 0x0d, 0xa3, 0xa3, 0x93, 0xf8, 0x74,
+ 0x01, 0x93, 0xf5, 0x82, 0x88, 0x83, 0xe4, 0x73, 0x74,
+ 0x02, 0x93, 0x68, 0x60, 0xef, 0xa3, 0xa3, 0xa3, 0x80,
+ 0xdf, 0x90, 0x38, 0x04, 0x78, 0x4f, 0x12, 0x09, 0x50,
+ 0x90, 0x38, 0x00, 0xe0, 0xfe, 0xa3, 0xe0, 0xfd, 0xed,
+ 0xff, 0xc3, 0x12, 0x09, 0x09, 0x90, 0x38, 0x10, 0x12,
+ 0x08, 0xfd, 0x90, 0x38, 0x06, 0x78, 0x51, 0x12, 0x09,
+ 0x50, 0x90, 0x38, 0x02, 0xe0, 0xfe, 0xa3, 0xe0, 0xfd,
+ 0xed, 0xff, 0xc3, 0x12, 0x09, 0x09, 0x90, 0x38, 0x12,
+ 0x12, 0x08, 0xfd, 0xa3, 0xe0, 0xb4, 0x31, 0x07, 0x78,
+ 0x4f, 0x79, 0x4f, 0x12, 0x09, 0x66, 0x90, 0x38, 0x14,
+ 0xe0, 0xb4, 0x71, 0x15, 0x78, 0x4f, 0xe6, 0xfe, 0x08,
+ 0xe6, 0x78, 0x02, 0xce, 0xc3, 0x13, 0xce, 0x13, 0xd8,
+ 0xf9, 0x79, 0x50, 0xf7, 0xee, 0x19, 0xf7, 0x90, 0x38,
+ 0x15, 0xe0, 0xb4, 0x31, 0x07, 0x78, 0x51, 0x79, 0x51,
+ 0x12, 0x09, 0x66, 0x90, 0x38, 0x15, 0xe0, 0xb4, 0x71,
+ 0x15, 0x78, 0x51, 0xe6, 0xfe, 0x08, 0xe6, 0x78, 0x02,
+ 0xce, 0xc3, 0x13, 0xce, 0x13, 0xd8, 0xf9, 0x79, 0x52,
+ 0xf7, 0xee, 0x19, 0xf7, 0x79, 0x4f, 0x12, 0x09, 0x38,
+ 0x09, 0x12, 0x09, 0x38, 0xaf, 0x45, 0x12, 0x08, 0xee,
+ 0x7d, 0x50, 0x12, 0x02, 0xa9, 0x78, 0x57, 0xa6, 0x06,
+ 0x08, 0xa6, 0x07, 0xaf, 0x43, 0x12, 0x08, 0xee, 0x7d,
+ 0x50, 0x12, 0x02, 0xa9, 0x78, 0x53, 0xa6, 0x06, 0x08,
+ 0xa6, 0x07, 0xaf, 0x46, 0x78, 0x51, 0x12, 0x08, 0xf0,
+ 0x7d, 0x3c, 0x12, 0x02, 0xa9, 0x78, 0x59, 0xa6, 0x06,
+ 0x08, 0xa6, 0x07, 0xaf, 0x44, 0x7e, 0x00, 0x78, 0x51,
+ 0x12, 0x08, 0xf2, 0x7d, 0x3c, 0x12, 0x02, 0xa9, 0x78,
+ 0x55, 0xa6, 0x06, 0x08, 0xa6, 0x07, 0xc3, 0x78, 0x58,
+ 0xe6, 0x94, 0x08, 0x18, 0xe6, 0x94, 0x00, 0x50, 0x05,
+ 0x76, 0x00, 0x08, 0x76, 0x08, 0xc3, 0x78, 0x5a, 0xe6,
+ 0x94, 0x08, 0x18, 0xe6, 0x94, 0x00, 0x50, 0x05, 0x76,
+ 0x00, 0x08, 0x76, 0x08, 0x78, 0x57, 0x12, 0x09, 0x25,
+ 0xff, 0xd3, 0x78, 0x54, 0xe6, 0x9f, 0x18, 0xe6, 0x9e,
+ 0x40, 0x0e, 0x78, 0x57, 0xe6, 0x13, 0xfe, 0x08, 0xe6,
+ 0x78, 0x54, 0x12, 0x09, 0x5b, 0x80, 0x04, 0x7e, 0x00,
+ 0x7f, 0x00, 0x78, 0x5b, 0x12, 0x09, 0x1d, 0xff, 0xd3,
+ 0x78, 0x56, 0xe6, 0x9f, 0x18, 0xe6, 0x9e, 0x40, 0x0e,
+ 0x78, 0x59, 0xe6, 0x13, 0xfe, 0x08, 0xe6, 0x78, 0x56,
+ 0x12, 0x09, 0x5b, 0x80, 0x04, 0x7e, 0x00, 0x7f, 0x00,
+ 0xe4, 0xfc, 0xfd, 0x78, 0x5f, 0x12, 0x04, 0x5c, 0x78,
+ 0x57, 0x12, 0x09, 0x25, 0x78, 0x54, 0x26, 0xff, 0xee,
+ 0x18, 0x36, 0xfe, 0x78, 0x63, 0x12, 0x09, 0x1d, 0x78,
+ 0x56, 0x26, 0xff, 0xee, 0x18, 0x36, 0xfe, 0xe4, 0xfc,
+ 0xfd, 0x78, 0x67, 0x12, 0x04, 0x5c, 0x12, 0x09, 0x2d,
+ 0x78, 0x63, 0x12, 0x04, 0x4f, 0xd3, 0x12, 0x04, 0x1b,
+ 0x40, 0x08, 0x12, 0x09, 0x2d, 0x78, 0x63, 0x12, 0x04,
+ 0x5c, 0x78, 0x51, 0x12, 0x09, 0x2f, 0x78, 0x67, 0x12,
+ 0x04, 0x4f, 0xd3, 0x12, 0x04, 0x1b, 0x40, 0x0a, 0x78,
+ 0x51, 0x12, 0x09, 0x2f, 0x78, 0x67, 0x12, 0x04, 0x5c,
+ 0xe4, 0xfd, 0x78, 0x5e, 0x12, 0x09, 0x48, 0x24, 0x01,
+ 0x12, 0x09, 0x11, 0x78, 0x62, 0x12, 0x09, 0x48, 0x24,
+ 0x02, 0x12, 0x09, 0x11, 0x78, 0x66, 0x12, 0x09, 0x48,
+ 0x24, 0x03, 0x12, 0x09, 0x11, 0x78, 0x6a, 0x12, 0x09,
+ 0x48, 0x24, 0x04, 0x12, 0x09, 0x11, 0x0d, 0xbd, 0x05,
+ 0xd4, 0xc2, 0x0e, 0xc2, 0x06, 0x22, 0x85, 0x08, 0x41,
+ 0x90, 0x30, 0x24, 0xe0, 0xf5, 0x3d, 0xa3, 0xe0, 0xf5,
+ 0x3e, 0xa3, 0xe0, 0xf5, 0x3f, 0xa3, 0xe0, 0xf5, 0x40,
+ 0xa3, 0xe0, 0xf5, 0x3c, 0xd2, 0x34, 0xe5, 0x41, 0x12,
+ 0x04, 0x74, 0x06, 0xc7, 0x03, 0x06, 0xcb, 0x04, 0x06,
+ 0xd1, 0x07, 0x06, 0xda, 0x08, 0x06, 0xeb, 0x12, 0x07,
+ 0x03, 0x18, 0x07, 0x19, 0x19, 0x06, 0xee, 0x1a, 0x06,
+ 0xfa, 0x1b, 0x07, 0x3e, 0x80, 0x07, 0x43, 0x81, 0x07,
+ 0xa1, 0x8f, 0x07, 0x90, 0x90, 0x07, 0xa1, 0x91, 0x07,
+ 0xa1, 0x92, 0x07, 0xa1, 0x93, 0x07, 0xa1, 0x94, 0x07,
+ 0xa1, 0x98, 0x07, 0x9e, 0x9f, 0x00, 0x00, 0x07, 0xbc,
+ 0x12, 0x0a, 0xf4, 0x22, 0x12, 0x0a, 0xf4, 0xd2, 0x03,
+ 0x22, 0xa2, 0x37, 0xe4, 0x33, 0xf5, 0x3c, 0x02, 0x07,
+ 0xa1, 0xc2, 0x01, 0xc2, 0x02, 0xc2, 0x03, 0x12, 0x09,
+ 0x70, 0x75, 0x1e, 0x70, 0xd2, 0x35, 0x02, 0x07, 0xa1,
+ 0x02, 0x07, 0x8b, 0x85, 0x40, 0x48, 0x85, 0x3c, 0x49,
+ 0x12, 0x08, 0x5b, 0x02, 0x07, 0xa1, 0x85, 0x48, 0x40,
+ 0x85, 0x49, 0x3c, 0x02, 0x07, 0xa1, 0xe4, 0xf5, 0x22,
+ 0xf5, 0x23, 0x85, 0x40, 0x31, 0x85, 0x3f, 0x30, 0x85,
+ 0x3e, 0x2f, 0x85, 0x3d, 0x2e, 0x12, 0x0a, 0xc6, 0x80,
+ 0x1f, 0x75, 0x22, 0x00, 0x75, 0x23, 0x01, 0x74, 0xff,
+ 0xf5, 0x2d, 0xf5, 0x2c, 0xf5, 0x2b, 0xf5, 0x2a, 0x12,
+ 0x0a, 0xc6, 0x85, 0x2d, 0x40, 0x85, 0x2c, 0x3f, 0x85,
+ 0x2b, 0x3e, 0x85, 0x2a, 0x3d, 0xe4, 0xf5, 0x3c, 0x02,
+ 0x07, 0xa1, 0x12, 0x0b, 0x3d, 0x80, 0x5e, 0x85, 0x3d,
+ 0x43, 0x85, 0x3e, 0x44, 0xe5, 0x45, 0xc3, 0x13, 0xff,
+ 0xe5, 0x43, 0xc3, 0x9f, 0x50, 0x02, 0x8f, 0x43, 0xe5,
+ 0x46, 0xc3, 0x13, 0xff, 0xe5, 0x44, 0xc3, 0x9f, 0x50,
+ 0x02, 0x8f, 0x44, 0xe5, 0x45, 0xc3, 0x13, 0xff, 0xfd,
+ 0xe5, 0x43, 0x90, 0x0e, 0x7f, 0x12, 0x0b, 0x10, 0x40,
+ 0x04, 0xee, 0x9f, 0xf5, 0x43, 0xe5, 0x46, 0xc3, 0x13,
+ 0xff, 0xfd, 0xe5, 0x44, 0x90, 0x0e, 0x80, 0x12, 0x0b,
+ 0x10, 0x40, 0x04, 0xee, 0x9f, 0xf5, 0x44, 0x12, 0x04,
+ 0x9a, 0x80, 0x11, 0x85, 0x40, 0x46, 0x85, 0x3f, 0x45,
+ 0x85, 0x3e, 0x44, 0x85, 0x3d, 0x43, 0x80, 0x03, 0x02,
+ 0x04, 0x9a, 0x90, 0x30, 0x24, 0xe5, 0x3d, 0xf0, 0xa3,
+ 0xe5, 0x3e, 0xf0, 0xa3, 0xe5, 0x3f, 0xf0, 0xa3, 0xe5,
+ 0x40, 0xf0, 0xa3, 0xe5, 0x3c, 0xf0, 0x90, 0x30, 0x23,
+ 0xe4, 0xf0, 0x22, 0xc0, 0xe0, 0xc0, 0x83, 0xc0, 0x82,
+ 0xc0, 0xd0, 0x90, 0x3f, 0x0c, 0xe0, 0xf5, 0x32, 0xe5,
+ 0x32, 0x30, 0xe3, 0x4c, 0x30, 0x36, 0x3e, 0x90, 0x60,
+ 0x19,
+ 0xe0,
+ 0xf5,
+ 0x0a,
+ 0xa3,
+ 0xe0,
+ 0xf5,
+ 0x0b,
+ 0x90,
+ 0x60,
+ 0x1d,
+ 0xe0,
+ 0xf5,
+ 0x14,
+ 0xa3,
+ 0xe0,
+ 0xf5,
+ 0x15,
+ 0x30,
+ 0x01,
+ 0x06,
+ 0x30,
+ 0x33,
+ 0x03,
+ 0xd3,
+ 0x80,
+ 0x01,
+ 0xc3,
+ 0x92,
+ 0x09,
+ 0x30,
+ 0x02,
+ 0x06,
+ 0x30,
+ 0x33,
+ 0x03,
+ 0xd3,
+ 0x80,
+ 0x01,
+ 0xc3,
+ 0x92,
+ 0x0a,
+ 0x30,
+ 0x33,
+ 0x0c,
+ 0x30,
+ 0x03,
+ 0x09,
+ 0x20,
+ 0x02,
+ 0x06,
+ 0x20,
+ 0x01,
+ 0x03,
+ 0xd3,
+ 0x80,
+ 0x01,
+ 0xc3,
+ 0x92,
+ 0x0b,
+ 0x90,
+ 0x30,
+ 0x01,
+ 0xe0,
+ 0x44,
+ 0x40,
+ 0xf0,
+ 0xe0,
+ 0x54,
+ 0xbf,
+ 0xf0,
+ 0xe5,
+ 0x32,
+ 0x30,
+ 0xe1,
+ 0x14,
+ 0x30,
+ 0x34,
+ 0x11,
+ 0x90,
+ 0x30,
+ 0x22,
+ 0xe0,
+ 0xf5,
+ 0x08,
+ 0xe4,
+ 0xf0,
+ 0x30,
+ 0x00,
+ 0x03,
+ 0xd3,
+ 0x80,
+ 0x01,
+ 0xc3,
+ 0x92,
+ 0x08,
+ 0xe5,
+ 0x32,
+ 0x30,
+ 0xe5,
+ 0x12,
+ 0x90,
+ 0x56,
+ 0xa1,
+ 0xe0,
+ 0xf5,
+ 0x09,
+ 0x30,
+ 0x31,
+ 0x09,
+ 0x30,
+ 0x05,
+ 0x03,
+ 0xd3,
+ 0x80,
+ 0x01,
+ 0xc3,
+ 0x92,
+ 0x0d,
+ 0x90,
+ 0x3f,
+ 0x0c,
+ 0xe5,
+ 0x32,
+ 0xf0,
+ 0xd0,
+ 0xd0,
+ 0xd0,
+ 0x82,
+ 0xd0,
+ 0x83,
+ 0xd0,
+ 0xe0,
+ 0x32,
+ 0x90,
+ 0x0e,
+ 0x7d,
+ 0xe4,
+ 0x93,
+ 0xfe,
+ 0x74,
+ 0x01,
+ 0x93,
+ 0xff,
+ 0xc3,
+ 0x90,
+ 0x0e,
+ 0x7b,
+ 0x74,
+ 0x01,
+ 0x93,
+ 0x9f,
+ 0xff,
+ 0xe4,
+ 0x93,
+ 0x9e,
+ 0xfe,
+ 0xe4,
+ 0x8f,
+ 0x3b,
+ 0x8e,
+ 0x3a,
+ 0xf5,
+ 0x39,
+ 0xf5,
+ 0x38,
+ 0xab,
+ 0x3b,
+ 0xaa,
+ 0x3a,
+ 0xa9,
+ 0x39,
+ 0xa8,
+ 0x38,
+ 0xaf,
+ 0x49,
+ 0xfc,
+ 0xfd,
+ 0xfe,
+ 0x12,
+ 0x02,
+ 0xfe,
+ 0x12,
+ 0x0b,
+ 0x22,
+ 0xe4,
+ 0x7b,
+ 0xff,
+ 0xfa,
+ 0xf9,
+ 0xf8,
+ 0x12,
+ 0x03,
+ 0x89,
+ 0x12,
+ 0x0b,
+ 0x22,
+ 0x90,
+ 0x0e,
+ 0x69,
+ 0xe4,
+ 0x12,
+ 0x0b,
+ 0x37,
+ 0x12,
+ 0x0b,
+ 0x22,
+ 0xe4,
+ 0x85,
+ 0x48,
+ 0x37,
+ 0xf5,
+ 0x36,
+ 0xf5,
+ 0x35,
+ 0xf5,
+ 0x34,
+ 0xaf,
+ 0x37,
+ 0xae,
+ 0x36,
+ 0xad,
+ 0x35,
+ 0xac,
+ 0x34,
+ 0xa3,
+ 0x12,
+ 0x0b,
+ 0x37,
+ 0x8f,
+ 0x37,
+ 0x8e,
+ 0x36,
+ 0x8d,
+ 0x35,
+ 0x8c,
+ 0x34,
+ 0xe5,
+ 0x3b,
+ 0x45,
+ 0x37,
+ 0xf5,
+ 0x3b,
+ 0xe5,
+ 0x3a,
+ 0x45,
+ 0x36,
+ 0xf5,
+ 0x3a,
+ 0xe5,
+ 0x39,
+ 0x45,
+ 0x35,
+ 0xf5,
+ 0x39,
+ 0xe5,
+ 0x38,
+ 0x45,
+ 0x34,
+ 0xf5,
+ 0x38,
+ 0xe4,
+ 0xf5,
+ 0x22,
+ 0xf5,
+ 0x23,
+ 0x85,
+ 0x3b,
+ 0x31,
+ 0x85,
+ 0x3a,
+ 0x30,
+ 0x85,
+ 0x39,
+ 0x2f,
+ 0x85,
+ 0x38,
+ 0x2e,
+ 0x02,
+ 0x0a,
+ 0xc6,
+ 0x78,
+ 0x4f,
+ 0x7e,
+ 0x00,
+ 0xe6,
+ 0xfc,
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+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x11,
+ 0x07,
+ 0x21,
+ 0x15,
+ 0x29,
+ 0x13,
+ 0x4f,
+ 0x56,
+ 0x54,
+ 0x20,
+ 0x20,
+ 0x20,
+ 0x20,
+ 0x20,
+ 0x20,
+ 0x01,
+ 0x10,
+ 0x00,
+ 0x56,
+ 0x40,
+ 0x1a,
+ 0x30,
+ 0x29,
+ 0x7e,
+ 0x00,
+ 0x30,
+ 0x04,
+ 0x20,
+ 0xdf,
+ 0x30,
+ 0x05,
+ 0x40,
+ 0xbf,
+ 0x50,
+ 0x03,
+ 0x00,
+ 0xfd,
+ 0x50,
+ 0x27,
+ 0x01,
+ 0xfe,
+ 0x60,
+ 0x00,
+ 0x11,
+ 0x00,
+ 0x3f,
+ 0x05,
+ 0x30,
+ 0x00,
+ 0x3f,
+ 0x06,
+ 0x22,
+ 0x00,
+ 0x3f,
+ 0x01,
+ 0x2a,
+ 0x00,
+ 0x3f,
+ 0x02,
+ 0x00,
+ 0x00,
+ 0x36,
+ 0x06,
+ 0x07,
+ 0x00,
+ 0x3f,
+ 0x0b,
+ 0x0f,
+ 0xf0,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x30,
+ 0x01,
+ 0x40,
+ 0xbf,
+ 0x30,
+ 0x01,
+ 0x00,
+ 0xbf,
+ 0x30,
+ 0x29,
+ 0x70,
+ 0x00,
+ 0x3a,
+ 0x00,
+ 0x00,
+ 0xff,
+ 0x3a,
+ 0x00,
+ 0x00,
+ 0xff,
+ 0x36,
+ 0x03,
+ 0x36,
+ 0x02,
+ 0x41,
+ 0x44,
+ 0x58,
+ 0x20,
+ 0x18,
+ 0x10,
+ 0x0a,
+ 0x04,
+ 0x04,
+ 0x00,
+ 0x03,
+ 0xff,
+ 0x64,
+ 0x00,
+ 0x00,
+ 0x80,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x02,
+ 0x04,
+ 0x06,
+ 0x00,
+ 0x03,
+ 0x98,
+ 0x00,
+ 0xcc,
+ 0x50,
+ 0x3c,
+ 0x28,
+ 0x1e,
+ 0x10,
+ 0x10,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x6e,
+ 0x30,
+ 0x28,
+ 0x00,
+ 0xa5,
+ 0x5a,
+ 0x00,
+};
+
+#endif /* CAMSENSOR_OV5640 */
diff --git a/drivers/media/video/msm/ov7692_qrd.c b/drivers/media/video/msm/ov7692_qrd.c
new file mode 100644
index 0000000..e558e57
--- /dev/null
+++ b/drivers/media/video/msm/ov7692_qrd.c
@@ -0,0 +1,679 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* #define DEBUG */
+
+#include <linux/delay.h>
+#include <linux/types.h>
+#include <linux/i2c.h>
+#include <linux/uaccess.h>
+#include <linux/miscdevice.h>
+#include <linux/slab.h>
+#include <media/msm_camera.h>
+#include <mach/camera.h>
+#include <mach/gpio.h>
+#include "ov7692.h"
+
+/*=============================================================
+ SENSOR REGISTER DEFINES
+==============================================================*/
+#define Q8 0x00000100
+
+/* Omnivision8810 product ID register address */
+#define REG_OV7692_MODEL_ID_MSB 0x0A
+#define REG_OV7692_MODEL_ID_LSB 0x0B
+
+#define OV7692_MODEL_ID 0x7692
+/* Omnivision8810 product ID */
+
+/* Time in milisecs for waiting for the sensor to reset */
+#define OV7692_RESET_DELAY_MSECS 66
+#define OV7692_DEFAULT_CLOCK_RATE 24000000
+/* Registers*/
+
+/* Color bar pattern selection */
+#define OV7692_COLOR_BAR_PATTERN_SEL_REG 0x82
+/* Color bar enabling control */
+#define OV7692_COLOR_BAR_ENABLE_REG 0x601
+/* Time in milisecs for waiting for the sensor to reset*/
+#define OV7692_RESET_DELAY_MSECS 66
+
+static int ov7692_pwdn_gpio;
+static int ov7692_reset_gpio;
+
+
+/*============================================================================
+ DATA DECLARATIONS
+ ============================================================================*/
+/* 96MHz PCLK @ 24MHz MCLK */
+struct reg_addr_val_pair_struct ov7692_init_settings_array[] = {
+ {0x12, 0x80},
+ {0x0e, 0x08},
+ {0x69, 0x52},
+ {0x1e, 0xb3},
+ {0x48, 0x42},
+ {0xff, 0x01},
+ {0xae, 0xa0},
+ {0xa8, 0x26},
+ {0xb4, 0xc0},
+ {0xb5, 0x40},
+ {0xff, 0x00},
+ {0x0c, 0x00},
+ {0x62, 0x10},
+ {0x12, 0x00},
+ {0x17, 0x65},
+ {0x18, 0xa4},
+ {0x19, 0x0a},
+ {0x1a, 0xf6},
+ {0x3e, 0x30},
+ {0x64, 0x0a},
+ {0xff, 0x01},
+ {0xb4, 0xc0},
+ {0xff, 0x00},
+ {0x67, 0x20},
+ {0x81, 0x3f},
+ {0xcc, 0x02},
+ {0xcd, 0x80},
+ {0xce, 0x01},
+ {0xcf, 0xe0},
+ {0xc8, 0x02},
+ {0xc9, 0x80},
+ {0xca, 0x01},
+ {0xcb, 0xe0},
+ {0xd0, 0x48},
+ {0x82, 0x03},
+ {0x0e, 0x00},
+ {0x70, 0x00},
+ {0x71, 0x34},
+ {0x74, 0x28},
+ {0x75, 0x98},
+ {0x76, 0x00},
+ {0x77, 0x64},
+ {0x78, 0x01},
+ {0x79, 0xc2},
+ {0x7a, 0x4e},
+ {0x7b, 0x1f},
+ {0x7c, 0x00},
+ {0x11, 0x00},
+ {0x20, 0x00},
+ {0x21, 0x23},
+ {0x50, 0x9a},
+ {0x51, 0x80},
+ {0x4c, 0x7d},
+ {0x0e, 0x00},
+ {0x85, 0x10},
+ {0x86, 0x00},
+ {0x87, 0x00},
+ {0x88, 0x00},
+ {0x89, 0x2a},
+ {0x8a, 0x26},
+ {0x8b, 0x22},
+ {0xbb, 0x7a},
+ {0xbc, 0x69},
+ {0xbd, 0x11},
+ {0xbe, 0x13},
+ {0xbf, 0x81},
+ {0xc0, 0x96},
+ {0xc1, 0x1e},
+ {0xb7, 0x05},
+ {0xb8, 0x09},
+ {0xb9, 0x00},
+ {0xba, 0x18},
+ {0x5a, 0x1f},
+ {0x5b, 0x9f},
+ {0x5c, 0x6a},
+ {0x5d, 0x42},
+ {0x24, 0x78},
+ {0x25, 0x68},
+ {0x26, 0xb3},
+ {0xa3, 0x0b},
+ {0xa4, 0x15},
+ {0xa5, 0x2a},
+ {0xa6, 0x51},
+ {0xa7, 0x63},
+ {0xa8, 0x74},
+ {0xa9, 0x83},
+ {0xaa, 0x91},
+ {0xab, 0x9e},
+ {0xac, 0xaa},
+ {0xad, 0xbe},
+ {0xae, 0xce},
+ {0xaf, 0xe5},
+ {0xb0, 0xf3},
+ {0xb1, 0xfb},
+ {0xb2, 0x06},
+ {0x8c, 0x5c},
+ {0x8d, 0x11},
+ {0x8e, 0x12},
+ {0x8f, 0x19},
+ {0x90, 0x50},
+ {0x91, 0x20},
+ {0x92, 0x96},
+ {0x93, 0x80},
+ {0x94, 0x13},
+ {0x95, 0x1b},
+ {0x96, 0xff},
+ {0x97, 0x00},
+ {0x98, 0x3d},
+ {0x99, 0x36},
+ {0x9a, 0x51},
+ {0x9b, 0x43},
+ {0x9c, 0xf0},
+ {0x9d, 0xf0},
+ {0x9e, 0xf0},
+ {0x9f, 0xff},
+ {0xa0, 0x68},
+ {0xa1, 0x62},
+ {0xa2, 0x0e},
+};
+
+static bool OV7692_CSI_CONFIG;
+/* 816x612, 24MHz MCLK 96MHz PCLK */
+uint32_t OV7692_FULL_SIZE_WIDTH = 640;
+uint32_t OV7692_FULL_SIZE_HEIGHT = 480;
+
+uint32_t OV7692_QTR_SIZE_WIDTH = 640;
+uint32_t OV7692_QTR_SIZE_HEIGHT = 480;
+
+uint32_t OV7692_HRZ_FULL_BLK_PIXELS = 16;
+uint32_t OV7692_VER_FULL_BLK_LINES = 12;
+uint32_t OV7692_HRZ_QTR_BLK_PIXELS = 16;
+uint32_t OV7692_VER_QTR_BLK_LINES = 12;
+
+struct ov7692_work_t {
+ struct work_struct work;
+};
+static struct ov7692_work_t *ov7692_sensorw;
+static struct i2c_client *ov7692_client;
+struct ov7692_ctrl_t {
+ const struct msm_camera_sensor_info *sensordata;
+ uint32_t sensormode;
+ uint32_t fps_divider; /* init to 1 * 0x00000400 */
+ uint32_t pict_fps_divider; /* init to 1 * 0x00000400 */
+ uint32_t fps;
+ int32_t curr_lens_pos;
+ uint32_t curr_step_pos;
+ uint32_t my_reg_gain;
+ uint32_t my_reg_line_count;
+ uint32_t total_lines_per_frame;
+ enum ov7692_resolution_t prev_res;
+ enum ov7692_resolution_t pict_res;
+ enum ov7692_resolution_t curr_res;
+ enum ov7692_test_mode_t set_test;
+ unsigned short imgaddr;
+};
+static struct ov7692_ctrl_t *ov7692_ctrl;
+static DECLARE_WAIT_QUEUE_HEAD(ov7692_wait_queue);
+DEFINE_MUTEX(ov7692_mut);
+
+/*=============================================================*/
+
+static int ov7692_i2c_rxdata(unsigned short saddr,
+ unsigned char *rxdata, int length)
+{
+ struct i2c_msg msgs[] = {
+ {
+ .addr = saddr,
+ .flags = 0,
+ .len = 1,
+ .buf = rxdata,
+ },
+ {
+ .addr = saddr,
+ .flags = I2C_M_RD,
+ .len = 1,
+ .buf = rxdata,
+ },
+ };
+ if (i2c_transfer(ov7692_client->adapter, msgs, 2) < 0) {
+ CDBG("ov7692_i2c_rxdata failed!\n");
+ return -EIO;
+ }
+ return 0;
+}
+static int32_t ov7692_i2c_txdata(unsigned short saddr,
+ unsigned char *txdata, int length)
+{
+ struct i2c_msg msg[] = {
+ {
+ .addr = saddr,
+ .flags = 0,
+ .len = 2,
+ .buf = txdata,
+ },
+ };
+ if (i2c_transfer(ov7692_client->adapter, msg, 1) < 0) {
+ CDBG("ov7692_i2c_txdata faild 0x%x\n", ov7692_client->addr);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int32_t ov7692_i2c_read(uint8_t raddr,
+ uint8_t *rdata, int rlen)
+{
+ int32_t rc = 0;
+ unsigned char buf[1];
+ if (!rdata)
+ return -EIO;
+ memset(buf, 0, sizeof(buf));
+ buf[0] = raddr;
+ rc = ov7692_i2c_rxdata(ov7692_client->addr >> 1, buf, rlen);
+ if (rc < 0) {
+ CDBG("ov7692_i2c_read 0x%x failed!\n", raddr);
+ return rc;
+ }
+ *rdata = buf[0];
+ return rc;
+}
+static int32_t ov7692_i2c_write_b_sensor(uint8_t waddr, uint8_t bdata)
+{
+ int32_t rc = -EFAULT;
+ unsigned char buf[2];
+
+ memset(buf, 0, sizeof(buf));
+ buf[0] = waddr;
+ buf[1] = bdata;
+
+ rc = ov7692_i2c_txdata(ov7692_client->addr >> 1, buf, 2);
+ if (rc < 0)
+ CDBG("i2c_write_b failed, addr = 0x%x, val = 0x%x!\n",
+ waddr, bdata);
+ return rc;
+}
+
+static int32_t ov7692_sensor_setting(int update_type, int rt)
+{
+ int32_t i, array_length;
+ int32_t rc = 0;
+ struct msm_camera_csi_params ov7692_csi_params;
+
+ CDBG("%s: rt = %d\n", __func__, rt);
+
+ switch (update_type) {
+ case REG_INIT:
+ OV7692_CSI_CONFIG = 0;
+ ov7692_i2c_write_b_sensor(0x0e, 0x08);
+ return rc;
+ break;
+ case UPDATE_PERIODIC:
+ if (!OV7692_CSI_CONFIG) {
+ ov7692_csi_params.lane_cnt = 1;
+ ov7692_csi_params.data_format = CSI_8BIT;
+ ov7692_csi_params.lane_assign = 0xe4;
+ ov7692_csi_params.dpcm_scheme = 0;
+ ov7692_csi_params.settle_cnt = 0x14;
+
+ rc = msm_camio_csi_config(&ov7692_csi_params);
+ msleep(20);
+ array_length = sizeof(ov7692_init_settings_array) /
+ sizeof(ov7692_init_settings_array[0]);
+ for (i = 0; i < array_length; i++) {
+ rc = ov7692_i2c_write_b_sensor(
+ ov7692_init_settings_array[i].reg_addr,
+ ov7692_init_settings_array[i].reg_val);
+ if (rc < 0)
+ return rc;
+ }
+ OV7692_CSI_CONFIG = 1;
+ msleep(20);
+ return rc;
+ }
+ break;
+ default:
+ rc = -EINVAL;
+ break;
+ }
+ return rc;
+}
+
+static int32_t ov7692_video_config(int mode)
+{
+ int32_t rc = 0;
+ int rt;
+ /* change sensor resolution if needed */
+ rt = RES_PREVIEW;
+
+ CDBG("%s\n", __func__);
+
+ if (ov7692_sensor_setting(UPDATE_PERIODIC, rt) < 0)
+ return rc;
+ ov7692_ctrl->curr_res = ov7692_ctrl->prev_res;
+ ov7692_ctrl->sensormode = mode;
+ return rc;
+}
+
+static int32_t ov7692_set_sensor_mode(int mode,
+ int res)
+{
+ int32_t rc = 0;
+ switch (mode) {
+ case SENSOR_PREVIEW_MODE:
+ rc = ov7692_video_config(mode);
+ break;
+ case SENSOR_SNAPSHOT_MODE:
+ case SENSOR_RAW_SNAPSHOT_MODE:
+ break;
+ default:
+ rc = -EINVAL;
+ break;
+ }
+ return rc;
+}
+
+static void ov7692_power_on(void)
+{
+ CDBG("%s\n", __func__);
+ gpio_set_value(ov7692_pwdn_gpio, 0);
+}
+
+static void ov7692_power_down(void)
+{
+ CDBG("%s\n", __func__);
+ gpio_set_value(ov7692_pwdn_gpio, 1);
+}
+
+static void ov7692_sw_reset(void)
+{
+ CDBG("%s\n", __func__);
+ ov7692_i2c_write_b_sensor(0x12, 0x80);
+}
+
+static void ov7692_hw_reset(void)
+{
+ CDBG("--CAMERA-- %s ... (Start...)\n", __func__);
+ gpio_set_value(ov7692_reset_gpio, 1); /* reset camera reset pin */
+ msleep(20);
+ gpio_set_value(ov7692_reset_gpio, 0);
+ msleep(20);
+ gpio_set_value(ov7692_reset_gpio, 1);
+ msleep(20);
+
+ CDBG("--CAMERA-- %s ... (End...)\n", __func__);
+}
+
+
+
+static int ov7692_probe_init_sensor(const struct msm_camera_sensor_info *data)
+{
+ uint8_t model_id_msb, model_id_lsb = 0;
+ uint16_t model_id = 0;
+ int32_t rc = 0;
+ /*The reset pin is not physically connected to the sensor.
+ The standby pin will do the reset hence there is no need
+ to request the gpio reset*/
+
+ /* Read sensor Model ID: */
+ rc = ov7692_i2c_read(REG_OV7692_MODEL_ID_MSB, &model_id_msb, 1);
+ if (rc < 0)
+ goto init_probe_fail;
+ rc = ov7692_i2c_read(REG_OV7692_MODEL_ID_LSB, &model_id_lsb, 1);
+ if (rc < 0)
+ goto init_probe_fail;
+ model_id = (model_id_msb << 8) | ((model_id_lsb & 0x00FF)) ;
+ CDBG("ov7692 model_id = 0x%x, 0x%x, 0x%x\n",
+ model_id, model_id_msb, model_id_lsb);
+ /* 4. Compare sensor ID to OV7692 ID: */
+ if (model_id != OV7692_MODEL_ID) {
+ rc = -ENODEV;
+ goto init_probe_fail;
+ }
+ goto init_probe_done;
+init_probe_fail:
+ pr_warning(" ov7692_probe_init_sensor fails\n");
+init_probe_done:
+ CDBG(" ov7692_probe_init_sensor finishes\n");
+ return rc;
+}
+
+int ov7692_sensor_open_init(const struct msm_camera_sensor_info *data)
+{
+ int32_t rc = 0;
+
+ CDBG("%s: %d\n", __func__, __LINE__);
+ CDBG("Calling ov7692_sensor_open_init\n");
+ ov7692_ctrl = kzalloc(sizeof(struct ov7692_ctrl_t), GFP_KERNEL);
+ if (!ov7692_ctrl) {
+ CDBG("ov7692_init failed!\n");
+ rc = -ENOMEM;
+ goto init_done;
+ }
+ ov7692_ctrl->fps_divider = 1 * 0x00000400;
+ ov7692_ctrl->pict_fps_divider = 1 * 0x00000400;
+ ov7692_ctrl->fps = 30 * Q8;
+ ov7692_ctrl->set_test = TEST_OFF;
+ ov7692_ctrl->prev_res = QTR_SIZE;
+ ov7692_ctrl->pict_res = FULL_SIZE;
+ ov7692_ctrl->curr_res = INVALID_SIZE;
+
+ if (data)
+ ov7692_ctrl->sensordata = data;
+
+ /* enable mclk first */
+
+ msm_camio_clk_rate_set(24000000);
+ msleep(20);
+
+ ov7692_power_on();
+ msleep(20);
+
+ rc = ov7692_probe_init_sensor(data);
+ if (rc < 0) {
+ CDBG("Calling ov7692_sensor_open_init fail\n");
+ goto init_fail;
+ }
+
+ rc = ov7692_sensor_setting(REG_INIT, RES_PREVIEW);
+ if (rc < 0)
+ goto init_fail;
+ else
+ goto init_done;
+
+init_fail:
+ CDBG(" ov7692_sensor_open_init fail\n");
+ kfree(ov7692_ctrl);
+init_done:
+ CDBG("ov7692_sensor_open_init done\n");
+ return rc;
+}
+
+static int ov7692_init_client(struct i2c_client *client)
+{
+ /* Initialize the MSM_CAMI2C Chip */
+ init_waitqueue_head(&ov7692_wait_queue);
+ return 0;
+}
+
+static const struct i2c_device_id ov7692_i2c_id[] = {
+ {"ov7692", 0},
+ { }
+};
+
+static int ov7692_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ int rc = 0;
+ CDBG("ov7692_i2c_probe called!\n");
+
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ CDBG("i2c_check_functionality failed\n");
+ goto probe_failure;
+ }
+
+ ov7692_sensorw = kzalloc(sizeof(struct ov7692_work_t), GFP_KERNEL);
+ if (!ov7692_sensorw) {
+ CDBG("kzalloc failed.\n");
+ rc = -ENOMEM;
+ goto probe_failure;
+ }
+
+ i2c_set_clientdata(client, ov7692_sensorw);
+ ov7692_init_client(client);
+ ov7692_client = client;
+
+ CDBG("ov7692_i2c_probe success! rc = %d\n", rc);
+ return 0;
+
+probe_failure:
+ CDBG("ov7692_i2c_probe failed! rc = %d\n", rc);
+ return rc;
+}
+
+static int __exit ov7692_remove(struct i2c_client *client)
+{
+ struct ov7692_work_t_t *sensorw = i2c_get_clientdata(client);
+ free_irq(client->irq, sensorw);
+ ov7692_client = NULL;
+ kfree(sensorw);
+ return 0;
+}
+
+static struct i2c_driver ov7692_i2c_driver = {
+ .id_table = ov7692_i2c_id,
+ .probe = ov7692_i2c_probe,
+ .remove = __exit_p(ov7692_i2c_remove),
+ .driver = {
+ .name = "ov7692",
+ },
+};
+
+int ov7692_sensor_config(void __user *argp)
+{
+ struct sensor_cfg_data cdata;
+ long rc = 0;
+ if (copy_from_user(&cdata,
+ (void *)argp,
+ sizeof(struct sensor_cfg_data)))
+ return -EFAULT;
+ mutex_lock(&ov7692_mut);
+ CDBG("ov7692_sensor_config: cfgtype = %d\n", cdata.cfgtype);
+ switch (cdata.cfgtype) {
+ case CFG_SET_MODE:
+ rc = ov7692_set_sensor_mode(cdata.mode,
+ cdata.rs);
+ break;
+ case CFG_PWR_DOWN:
+ ov7692_power_down();
+ break;
+ default:
+ rc = -EFAULT;
+ break;
+ }
+
+ mutex_unlock(&ov7692_mut);
+
+ return rc;
+}
+static int ov7692_sensor_release(void)
+{
+ int rc = -EBADF;
+ mutex_lock(&ov7692_mut);
+ ov7692_sw_reset();
+ ov7692_power_down();
+ kfree(ov7692_ctrl);
+ ov7692_ctrl = NULL;
+ CDBG("ov7692_release completed\n");
+ mutex_unlock(&ov7692_mut);
+
+ return rc;
+}
+
+static int ov7692_probe_init_gpio(const struct msm_camera_sensor_info *data)
+{
+ int rc = 0;
+
+ ov7692_pwdn_gpio = data->sensor_pwd;
+ ov7692_reset_gpio = data->sensor_reset ;
+
+ if (data->sensor_reset_enable)
+ gpio_direction_output(data->sensor_reset, 1);
+
+ gpio_direction_output(data->sensor_pwd, 1);
+
+ return rc;
+
+}
+
+
+static int ov7692_sensor_probe(const struct msm_camera_sensor_info *info,
+ struct msm_sensor_ctrl *s)
+{
+ int rc = 0;
+ rc = i2c_add_driver(&ov7692_i2c_driver);
+ if (rc < 0 || ov7692_client == NULL) {
+ rc = -ENOTSUPP;
+ goto probe_fail;
+ }
+
+ rc = ov7692_probe_init_gpio(info);
+ if (rc < 0) {
+ CDBG("%s: gpio init failed\n", __func__);
+ goto probe_fail;
+ }
+
+ ov7692_power_down();
+
+ msm_camio_clk_rate_set(24000000);
+ msleep(20);
+
+ ov7692_power_on();
+ msleep(20);
+
+ if (info->sensor_reset_enable)
+ ov7692_hw_reset();
+ else
+ ov7692_sw_reset();
+
+ rc = ov7692_probe_init_sensor(info);
+ if (rc < 0)
+ goto probe_fail;
+
+
+ s->s_init = ov7692_sensor_open_init;
+ s->s_release = ov7692_sensor_release;
+ s->s_config = ov7692_sensor_config;
+ s->s_camera_type = FRONT_CAMERA_2D;
+ s->s_mount_angle = info->sensor_platform_info->mount_angle;
+
+ ov7692_power_down();
+
+ return rc;
+
+probe_fail:
+ CDBG("ov7692_sensor_probe: SENSOR PROBE FAILS!\n");
+ i2c_del_driver(&ov7692_i2c_driver);
+ return rc;
+}
+
+static int __ov7692_probe(struct platform_device *pdev)
+{
+ return msm_camera_drv_start(pdev, ov7692_sensor_probe);
+}
+
+static struct platform_driver msm_camera_driver = {
+ .probe = __ov7692_probe,
+ .driver = {
+ .name = "msm_camera_ov7692",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init ov7692_init(void)
+{
+ return platform_driver_register(&msm_camera_driver);
+}
+
+module_init(ov7692_init);
+
+MODULE_DESCRIPTION("OMNI VGA YUV sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/pm8xxx-misc.c b/drivers/mfd/pm8xxx-misc.c
index 00ac2ab..7367e66 100644
--- a/drivers/mfd/pm8xxx-misc.c
+++ b/drivers/mfd/pm8xxx-misc.c
@@ -53,6 +53,12 @@
#define PM8901_REGULATOR_PMR_STATE_MASK 0x60
#define PM8901_REGULATOR_PMR_STATE_OFF 0x20
+/* GPIO UART MUX CTRL registers */
+#define REG_PM8XXX_GPIO_MUX_CTRL 0x1CC
+
+#define UART_PATH_SEL_MASK 0x60
+#define UART_PATH_SEL_SHIFT 0x5
+
struct pm8xxx_misc_chip {
struct list_head link;
struct pm8xxx_misc_platform_data pdata;
@@ -260,6 +266,47 @@
}
EXPORT_SYMBOL_GPL(pm8xxx_reset_pwr_off);
+/**
+ * pm8xxx_uart_gpio_mux_ctrl - Mux configuration to select the UART
+ *
+ * @uart_path_sel: Input argument to select either UART1/2/3
+ *
+ * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
+ */
+int pm8xxx_uart_gpio_mux_ctrl(enum pm8xxx_uart_path_sel uart_path_sel)
+{
+ struct pm8xxx_misc_chip *chip;
+ unsigned long flags;
+ int rc = 0;
+
+ spin_lock_irqsave(&pm8xxx_misc_chips_lock, flags);
+
+ /* Loop over all attached PMICs and call specific functions for them. */
+ list_for_each_entry(chip, &pm8xxx_misc_chips, link) {
+ switch (chip->version) {
+ case PM8XXX_VERSION_8018:
+ case PM8XXX_VERSION_8058:
+ case PM8XXX_VERSION_8921:
+ rc = pm8xxx_misc_masked_write(chip,
+ REG_PM8XXX_GPIO_MUX_CTRL, UART_PATH_SEL_MASK,
+ uart_path_sel << UART_PATH_SEL_SHIFT);
+ break;
+ default:
+ /* Functionality not supported */
+ break;
+ }
+ if (rc) {
+ pr_err("uart_gpio_mux_ctrl failed, rc=%d\n", rc);
+ break;
+ }
+ }
+
+ spin_unlock_irqrestore(&pm8xxx_misc_chips_lock, flags);
+
+ return rc;
+}
+EXPORT_SYMBOL(pm8xxx_uart_gpio_mux_ctrl);
+
static int __devinit pm8xxx_misc_probe(struct platform_device *pdev)
{
const struct pm8xxx_misc_platform_data *pdata = pdev->dev.platform_data;
diff --git a/drivers/mfd/pm8xxx-pwm.c b/drivers/mfd/pm8xxx-pwm.c
index ca9eebb..fa4b130 100644
--- a/drivers/mfd/pm8xxx-pwm.c
+++ b/drivers/mfd/pm8xxx-pwm.c
@@ -25,12 +25,33 @@
#include <linux/mfd/pm8xxx/core.h>
#include <linux/mfd/pm8xxx/pwm.h>
-#define PM8XXX_LPG_BANKS 8
-#define PM8XXX_PWM_CHANNELS PM8XXX_LPG_BANKS
+#define PM8XXX_PWM_CHANNELS 3
+#define PM8XXX_LPG_BANKS 8
+#define PM8XXX_LPG_PWM_CHANNELS PM8XXX_LPG_BANKS
#define PM8XXX_LPG_CTL_REGS 7
/* PM8XXX PWM */
+#define SSBI_REG_ADDR_PWM1_CTRL1 0x88
+#define SSBI_REG_ADDR_PWM1_CTRL2 0x89
+#define SSBI_REG_ADDR_PWM_CTL(id, base) (id == 0 ? base : (base + (id << 1)))
+#define SSBI_REG_ADDR_PWM_CTL1(id) SSBI_REG_ADDR_PWM_CTL(id, \
+ SSBI_REG_ADDR_PWM1_CTRL1)
+#define SSBI_REG_ADDR_PWM_CTL2(id) SSBI_REG_ADDR_PWM_CTL(id, \
+ SSBI_REG_ADDR_PWM1_CTRL2)
+
+#define PM8XXX_PWM_CLK_SEL_SHIFT 6
+#define PM8XXX_PWM_CLK_SEL_MASK 0xC0
+#define PM8XXX_PWM_PREDIVIDE_SHIFT 5
+#define PM8XXX_PWM_PREDIVIDE_MASK 0x20
+#define PM8XXX_PWM_M_SHIFT 2
+#define PM8XXX_PWM_M_MASK 0x1C
+#define PM8XXX_PWM_SIZE_SHIFT 1
+#define PM8XXX_PWM_SIZE_MASK 0x02
+#define PM8XXX_PWM_VALUE_BIT0 0x01
+#define PM8XXX_PWM_DISABLE 0x3F
+
+/* PM8XXX LPG PWM */
#define SSBI_REG_ADDR_LPG_CTL_BASE 0x13C
#define SSBI_REG_ADDR_LPG_CTL(n) (SSBI_REG_ADDR_LPG_CTL_BASE + (n))
#define SSBI_REG_ADDR_LPG_BANK_SEL 0x143
@@ -38,7 +59,7 @@
#define SSBI_REG_ADDR_LPG_LUT_CFG0 0x145
#define SSBI_REG_ADDR_LPG_LUT_CFG1 0x146
-/* Control 0 */
+/* LPG Control 0 */
#define PM8XXX_PWM_1KHZ_COUNT_MASK 0xF0
#define PM8XXX_PWM_1KHZ_COUNT_SHIFT 4
@@ -54,51 +75,51 @@
#define PM8XXX_PWM_RAMP_GEN_START (PM8XXX_PWM_RAMP_GEN_EN \
| PM8XXX_PWM_RAMP_START)
-/* Control 1 */
+/* LPG Control 1 */
#define PM8XXX_PWM_REVERSE_EN 0x80
#define PM8XXX_PWM_BYPASS_LUT 0x40
#define PM8XXX_PWM_HIGH_INDEX_MASK 0x3F
-/* Control 2 */
+/* LPG Control 2 */
#define PM8XXX_PWM_LOOP_EN 0x80
#define PM8XXX_PWM_RAMP_UP 0x40
#define PM8XXX_PWM_LOW_INDEX_MASK 0x3F
-/* Control 3 */
+/* LPG Control 3 */
#define PM8XXX_PWM_VALUE_BIT7_0 0xFF
#define PM8XXX_PWM_VALUE_BIT5_0 0x3F
-/* Control 4 */
+/* LPG Control 4 */
#define PM8XXX_PWM_VALUE_BIT8 0x80
-#define PM8XXX_PWM_CLK_SEL_MASK 0x60
-#define PM8XXX_PWM_CLK_SEL_SHIFT 5
+#define PM8XXX_LPG_PWM_CLK_SEL_MASK 0x60
+#define PM8XXX_LPG_PWM_CLK_SEL_SHIFT 5
#define PM8XXX_PWM_CLK_SEL_NO 0
#define PM8XXX_PWM_CLK_SEL_1KHZ 1
#define PM8XXX_PWM_CLK_SEL_32KHZ 2
#define PM8XXX_PWM_CLK_SEL_19P2MHZ 3
-#define PM8XXX_PWM_PREDIVIDE_MASK 0x18
-#define PM8XXX_PWM_PREDIVIDE_SHIFT 3
+#define PM8XXX_LPG_PWM_PREDIVIDE_MASK 0x18
+#define PM8XXX_LPG_PWM_PREDIVIDE_SHIFT 3
#define PM8XXX_PWM_PREDIVIDE_2 0
#define PM8XXX_PWM_PREDIVIDE_3 1
#define PM8XXX_PWM_PREDIVIDE_5 2
#define PM8XXX_PWM_PREDIVIDE_6 3
-#define PM8XXX_PWM_M_MASK 0x07
+#define PM8XXX_LPG_PWM_M_MASK 0x07
#define PM8XXX_PWM_M_MIN 0
#define PM8XXX_PWM_M_MAX 7
-/* Control 5 */
+/* LPG Control 5 */
#define PM8XXX_PWM_PAUSE_COUNT_HI_MASK 0xFC
#define PM8XXX_PWM_PAUSE_COUNT_HI_SHIFT 2
#define PM8XXX_PWM_PAUSE_ENABLE_HIGH 0x02
#define PM8XXX_PWM_SIZE_9_BIT 0x01
-/* Control 6 */
+/* LPG Control 6 */
#define PM8XXX_PWM_PAUSE_COUNT_LO_MASK 0xFC
#define PM8XXX_PWM_PAUSE_COUNT_LO_SHIFT 2
@@ -107,11 +128,10 @@
#define PM8XXX_PWM_PAUSE_COUNT_MAX 56 /* < 2^6 = 64 */
-/* LUT_CFG1 */
+/* LPG LUT_CFG1 */
#define PM8XXX_PWM_LUT_READ 0x40
-
/*
* PWM Frequency = Clock Frequency / (N * T)
* or
@@ -132,7 +152,8 @@
#define CLK_PERIOD_MIN NSEC_19P2MHZ
#define CLK_PERIOD_MAX NSEC_1000HZ
-#define NUM_PRE_DIVIDE 3 /* No default support for pre-divide = 6 */
+#define NUM_LPG_PRE_DIVIDE 3 /* No default support for pre-divide = 6 */
+#define NUM_PWM_PRE_DIVIDE 2
#define PRE_DIVIDE_0 2
#define PRE_DIVIDE_1 3
@@ -141,7 +162,7 @@
#define PRE_DIVIDE_MIN PRE_DIVIDE_0
#define PRE_DIVIDE_MAX PRE_DIVIDE_2
-static unsigned int pt_t[NUM_PRE_DIVIDE][NUM_CLOCKS] = {
+static unsigned int pt_t[NUM_LPG_PRE_DIVIDE][NUM_CLOCKS] = {
{ PRE_DIVIDE_0 * NSEC_1000HZ,
PRE_DIVIDE_0 * NSEC_32768HZ,
PRE_DIVIDE_0 * NSEC_19P2MHZ,
@@ -170,17 +191,22 @@
int pwm_value;
int pwm_period;
int pwm_duty;
- u8 pwm_ctl[PM8XXX_LPG_CTL_REGS];
+ u8 pwm_lpg_ctl[PM8XXX_LPG_CTL_REGS];
+ u8 pwm_ctl1;
+ u8 pwm_ctl2;
int irq;
struct pm8xxx_pwm_chip *chip;
int bypass_lut;
};
struct pm8xxx_pwm_chip {
- struct pwm_device pwm_dev[PM8XXX_PWM_CHANNELS];
+ struct pwm_device *pwm_dev;
+ u8 pwm_channels;
+ u8 pwm_total_pre_divs;
u8 bank_mask;
struct mutex pwm_mutex;
struct device *dev;
+ bool is_lpg_supported;
};
static struct pm8xxx_pwm_chip *pwm_chip;
@@ -255,13 +281,13 @@
u8 reg;
if (start) {
- reg = pwm->pwm_ctl[0] | PM8XXX_PWM_PWM_START;
+ reg = pwm->pwm_lpg_ctl[0] | PM8XXX_PWM_PWM_START;
if (ramp_start)
reg |= PM8XXX_PWM_RAMP_GEN_START;
else
reg &= ~PM8XXX_PWM_RAMP_GEN_START;
} else {
- reg = pwm->pwm_ctl[0] & ~PM8XXX_PWM_PWM_START;
+ reg = pwm->pwm_lpg_ctl[0] & ~PM8XXX_PWM_PWM_START;
reg &= ~PM8XXX_PWM_RAMP_GEN_START;
}
@@ -270,7 +296,40 @@
if (rc)
pr_err("pm8xxx_writeb(): rc=%d (Enable PWM Ctl 0)\n", rc);
else
- pwm->pwm_ctl[0] = reg;
+ pwm->pwm_lpg_ctl[0] = reg;
+ return rc;
+}
+
+static int pm8xxx_pwm_disable(struct pwm_device *pwm)
+{
+ int rc;
+ u8 reg;
+
+ reg = pwm->pwm_ctl1 & PM8XXX_PWM_DISABLE;
+
+ rc = pm8xxx_writeb(pwm->chip->dev->parent,
+ SSBI_REG_ADDR_PWM_CTL1(pwm->pwm_id), reg);
+
+ if (rc)
+ pr_err("pm8xxx_writeb(): rc=%d (Disable PWM Ctl %d)\n", rc,
+ pwm->pwm_id);
+ return rc;
+}
+
+static int pm8xxx_pwm_enable(struct pwm_device *pwm)
+{
+ /**
+ * A kind of best Effort: Just write the clock information that
+ * we have in the register.
+ */
+ int rc;
+
+ rc = pm8xxx_writeb(pwm->chip->dev->parent,
+ SSBI_REG_ADDR_PWM_CTL1(pwm->pwm_id), pwm->pwm_ctl1);
+
+ if (rc)
+ pr_err("pm8xxx_writeb(): rc=%d (Enable PWM Ctl %d)\n", rc,
+ pwm->pwm_id);
return rc;
}
@@ -304,7 +363,7 @@
best_clk = 0;
best_div = 0;
for (clk = 0; clk < NUM_CLOCKS; clk++) {
- for (div = 0; div < NUM_PRE_DIVIDE; div++) {
+ for (div = 0; div < pwm_chip->pwm_total_pre_divs; div++) {
tmp_p = period_n;
last_p = tmp_p;
for (m = 0; m <= PM8XXX_PWM_M_MAX; m++) {
@@ -384,7 +443,7 @@
int i, pwm_size;
int rc = 0;
- pwm_size = (pwm->pwm_ctl[5] & PM8XXX_PWM_SIZE_9_BIT) ? 9 : 6;
+ pwm_size = (pwm->pwm_lpg_ctl[5] & PM8XXX_PWM_SIZE_9_BIT) ? 9 : 6;
max_pwm_value = (1 << pwm_size) - 1;
for (i = 0; i < len; i++) {
if (raw_value)
@@ -414,44 +473,65 @@
static void pm8xxx_pwm_save_index(struct pwm_device *pwm,
int low_idx, int high_idx, int flags)
{
- pwm->pwm_ctl[1] = high_idx & PM8XXX_PWM_HIGH_INDEX_MASK;
- pwm->pwm_ctl[2] = low_idx & PM8XXX_PWM_LOW_INDEX_MASK;
+ pwm->pwm_lpg_ctl[1] = high_idx & PM8XXX_PWM_HIGH_INDEX_MASK;
+ pwm->pwm_lpg_ctl[2] = low_idx & PM8XXX_PWM_LOW_INDEX_MASK;
if (flags & PM_PWM_LUT_REVERSE)
- pwm->pwm_ctl[1] |= PM8XXX_PWM_REVERSE_EN;
+ pwm->pwm_lpg_ctl[1] |= PM8XXX_PWM_REVERSE_EN;
if (flags & PM_PWM_LUT_RAMP_UP)
- pwm->pwm_ctl[2] |= PM8XXX_PWM_RAMP_UP;
+ pwm->pwm_lpg_ctl[2] |= PM8XXX_PWM_RAMP_UP;
if (flags & PM_PWM_LUT_LOOP)
- pwm->pwm_ctl[2] |= PM8XXX_PWM_LOOP_EN;
+ pwm->pwm_lpg_ctl[2] |= PM8XXX_PWM_LOOP_EN;
}
static void pm8xxx_pwm_save_period(struct pwm_device *pwm)
{
u8 mask, val;
- val = ((pwm->period.clk + 1) << PM8XXX_PWM_CLK_SEL_SHIFT)
- & PM8XXX_PWM_CLK_SEL_MASK;
- val |= (pwm->period.pre_div << PM8XXX_PWM_PREDIVIDE_SHIFT)
- & PM8XXX_PWM_PREDIVIDE_MASK;
- val |= pwm->period.pre_div_exp & PM8XXX_PWM_M_MASK;
- mask = PM8XXX_PWM_CLK_SEL_MASK | PM8XXX_PWM_PREDIVIDE_MASK |
- PM8XXX_PWM_M_MASK;
- pm8xxx_pwm_save(&pwm->pwm_ctl[4], mask, val);
+ if (pwm_chip->is_lpg_supported) {
+ val = ((pwm->period.clk + 1) << PM8XXX_LPG_PWM_CLK_SEL_SHIFT)
+ & PM8XXX_LPG_PWM_CLK_SEL_MASK;
+ val |= (pwm->period.pre_div << PM8XXX_LPG_PWM_PREDIVIDE_SHIFT)
+ & PM8XXX_LPG_PWM_PREDIVIDE_MASK;
+ val |= pwm->period.pre_div_exp & PM8XXX_LPG_PWM_M_MASK;
+ mask = PM8XXX_LPG_PWM_CLK_SEL_MASK |
+ PM8XXX_LPG_PWM_PREDIVIDE_MASK | PM8XXX_LPG_PWM_M_MASK;
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[4], mask, val);
- val = (pwm->period.pwm_size > 6) ? PM8XXX_PWM_SIZE_9_BIT : 0;
- mask = PM8XXX_PWM_SIZE_9_BIT;
- pm8xxx_pwm_save(&pwm->pwm_ctl[5], mask, val);
+ val = (pwm->period.pwm_size > 6) ? PM8XXX_PWM_SIZE_9_BIT : 0;
+ mask = PM8XXX_PWM_SIZE_9_BIT;
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[5], mask, val);
+ } else {
+ val = ((pwm->period.clk + 1) << PM8XXX_PWM_CLK_SEL_SHIFT)
+ & PM8XXX_PWM_CLK_SEL_MASK;
+ val |= (pwm->period.pre_div << PM8XXX_PWM_PREDIVIDE_SHIFT)
+ & PM8XXX_PWM_PREDIVIDE_MASK;
+ val |= (pwm->period.pre_div_exp << PM8XXX_PWM_M_SHIFT)
+ & PM8XXX_PWM_M_MASK;
+ val |= (((pwm->period.pwm_size > 6) ? PM8XXX_PWM_SIZE_9_BIT : 0)
+ << PM8XXX_PWM_SIZE_SHIFT) & PM8XXX_PWM_SIZE_MASK;
+
+ mask = PM8XXX_PWM_CLK_SEL_MASK | PM8XXX_PWM_PREDIVIDE_MASK |
+ PM8XXX_PWM_M_MASK | PM8XXX_PWM_SIZE_MASK;
+ pm8xxx_pwm_save(&pwm->pwm_ctl1, mask, val);
+ }
}
static void pm8xxx_pwm_save_pwm_value(struct pwm_device *pwm)
{
u8 mask, val;
- pwm->pwm_ctl[3] = pwm->pwm_value;
-
- val = (pwm->period.pwm_size > 6) ? (pwm->pwm_value >> 1) : 0;
- mask = PM8XXX_PWM_VALUE_BIT8;
- pm8xxx_pwm_save(&pwm->pwm_ctl[4], mask, val);
+ if (pwm_chip->is_lpg_supported) {
+ val = (pwm->period.pwm_size > 6) ? (pwm->pwm_value >> 1) : 0;
+ pwm->pwm_lpg_ctl[3] = pwm->pwm_value;
+ mask = PM8XXX_PWM_VALUE_BIT8;
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[4], mask, val);
+ } else {
+ val = (pwm->period.pwm_size > 6) ? (pwm->pwm_value >> 8) : 0;
+ pwm->pwm_ctl2 = pwm->pwm_value;
+ mask = PM8XXX_PWM_VALUE_BIT0;
+ pm8xxx_pwm_save(&pwm->pwm_ctl1, mask, val);
+ }
}
static void pm8xxx_pwm_save_duty_time(struct pwm_device *pwm,
@@ -468,7 +548,7 @@
val = i << PM8XXX_PWM_1KHZ_COUNT_SHIFT;
mask = PM8XXX_PWM_1KHZ_COUNT_MASK;
- pm8xxx_pwm_save(&pwm->pwm_ctl[0], mask, val);
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[0], mask, val);
}
static void pm8xxx_pwm_save_pause(struct pwm_device *pwm,
@@ -477,7 +557,7 @@
int i, pause_cnt, time_cnt;
u8 mask, val;
- time_cnt = (pwm->pwm_ctl[0] & PM8XXX_PWM_1KHZ_COUNT_MASK)
+ time_cnt = (pwm->pwm_lpg_ctl[0] & PM8XXX_PWM_1KHZ_COUNT_MASK)
>> PM8XXX_PWM_1KHZ_COUNT_SHIFT;
if (lut->flags & PM_PWM_LUT_PAUSE_HI_EN) {
pause_cnt = (lut->lut_pause_hi + duty_msec[time_cnt] / 2)
@@ -495,7 +575,7 @@
}
mask = PM8XXX_PWM_PAUSE_COUNT_HI_MASK | PM8XXX_PWM_PAUSE_ENABLE_HIGH;
- pm8xxx_pwm_save(&pwm->pwm_ctl[5], mask, val);
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[5], mask, val);
if (lut->flags & PM_PWM_LUT_PAUSE_LO_EN) {
/* Linear search for pause time */
@@ -513,10 +593,35 @@
}
mask = PM8XXX_PWM_PAUSE_COUNT_LO_MASK | PM8XXX_PWM_PAUSE_ENABLE_LOW;
- pm8xxx_pwm_save(&pwm->pwm_ctl[6], mask, val);
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[6], mask, val);
}
-static int pm8xxx_pwm_write(struct pwm_device *pwm, int start, int end)
+static int pm8xxx_pwm_write(struct pwm_device *pwm)
+{
+ int rc = 0;
+
+ rc = pm8xxx_writeb(pwm->chip->dev->parent,
+ SSBI_REG_ADDR_PWM_CTL1(pwm->pwm_id),
+ pwm->pwm_ctl1);
+ if (rc) {
+ pr_err("pm8xxx_writeb() failed: rc=%d (PWM Ctl1[%d])\n",
+ rc, pwm->pwm_id);
+ return rc;
+ }
+
+ rc = pm8xxx_writeb(pwm->chip->dev->parent,
+ SSBI_REG_ADDR_PWM_CTL2(pwm->pwm_id),
+ pwm->pwm_ctl2);
+ if (rc) {
+ pr_err("pm8xxx_writeb() failed: rc=%d (PWM Ctl2[%d])\n",
+ rc, pwm->pwm_id);
+ return rc;
+ }
+
+ return rc;
+}
+
+static int pm8xxx_lpg_pwm_write(struct pwm_device *pwm, int start, int end)
{
int i, rc;
@@ -524,7 +629,7 @@
for (i = end - 1; i >= start; i--) {
rc = pm8xxx_writeb(pwm->chip->dev->parent,
SSBI_REG_ADDR_LPG_CTL(i),
- pwm->pwm_ctl[i]);
+ pwm->pwm_lpg_ctl[i]);
if (rc) {
pr_err("pm8xxx_writeb(): rc=%d (PWM Ctl[%d])\n", rc, i);
return rc;
@@ -543,10 +648,10 @@
lut->lut_hi_index, lut->flags);
pm8xxx_pwm_save_duty_time(pwm, lut);
pm8xxx_pwm_save_pause(pwm, lut);
- pm8xxx_pwm_save(&pwm->pwm_ctl[1], PM8XXX_PWM_BYPASS_LUT, 0);
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[1], PM8XXX_PWM_BYPASS_LUT, 0);
pm8xxx_pwm_bank_sel(pwm);
- rc = pm8xxx_pwm_write(pwm, 0, 7);
+ rc = pm8xxx_lpg_pwm_write(pwm, 0, 7);
return rc;
}
@@ -561,16 +666,17 @@
{
struct pwm_device *pwm;
- if (pwm_id > PM8XXX_PWM_CHANNELS || pwm_id < 0) {
- pr_err("Invalid pwm_id: %d with %s\n",
- pwm_id, label ? label : ".");
- return ERR_PTR(-EINVAL);
- }
if (pwm_chip == NULL) {
pr_err("No pwm_chip\n");
return ERR_PTR(-ENODEV);
}
+ if (pwm_id >= pwm_chip->pwm_channels || pwm_id < 0) {
+ pr_err("Invalid pwm_id: %d with %s\n",
+ pwm_id, label ? label : ".");
+ return ERR_PTR(-EINVAL);
+ }
+
mutex_lock(&pwm_chip->pwm_mutex);
pwm = &pwm_chip->pwm_dev[pwm_id];
if (!pwm->in_use) {
@@ -598,13 +704,17 @@
mutex_lock(&pwm->chip->pwm_mutex);
if (pwm->in_use) {
- pm8xxx_pwm_bank_sel(pwm);
- pm8xxx_pwm_start(pwm, 0, 0);
-
+ if (pwm_chip->is_lpg_supported) {
+ pm8xxx_pwm_bank_sel(pwm);
+ pm8xxx_pwm_start(pwm, 0, 0);
+ } else {
+ pm8xxx_pwm_disable(pwm);
+ }
pwm->in_use = 0;
pwm->label = NULL;
}
- pm8xxx_pwm_bank_enable(pwm, 0);
+ if (pwm_chip->is_lpg_supported)
+ pm8xxx_pwm_bank_enable(pwm, 0);
mutex_unlock(&pwm->chip->pwm_mutex);
}
EXPORT_SYMBOL_GPL(pwm_free);
@@ -618,7 +728,7 @@
int pwm_config(struct pwm_device *pwm, int duty_us, int period_us)
{
struct pm8xxx_pwm_period *period;
- int rc;
+ int rc = 0;
if (pwm == NULL || IS_ERR(pwm) ||
duty_us > period_us ||
@@ -649,11 +759,16 @@
pm8xxx_pwm_calc_pwm_value(pwm, period_us, duty_us);
pm8xxx_pwm_save_pwm_value(pwm);
- pm8xxx_pwm_save(&pwm->pwm_ctl[1],
- PM8XXX_PWM_BYPASS_LUT, PM8XXX_PWM_BYPASS_LUT);
- pm8xxx_pwm_bank_sel(pwm);
- rc = pm8xxx_pwm_write(pwm, 1, 6);
+ if (pwm_chip->is_lpg_supported) {
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[1],
+ PM8XXX_PWM_BYPASS_LUT, PM8XXX_PWM_BYPASS_LUT);
+
+ pm8xxx_pwm_bank_sel(pwm);
+ rc = pm8xxx_lpg_pwm_write(pwm, 1, 6);
+ } else {
+ rc = pm8xxx_pwm_write(pwm);
+ }
pr_debug("duty/period=%u/%u usec: pwm_value=%d (of %d)\n",
(unsigned)duty_us, (unsigned)period_us,
@@ -671,7 +786,7 @@
*/
int pwm_enable(struct pwm_device *pwm)
{
- int rc;
+ int rc = 0;
if (pwm == NULL || IS_ERR(pwm)) {
pr_err("Invalid pwm handle\n");
@@ -687,10 +802,13 @@
pr_err("pwm_id: %d: stale handle?\n", pwm->pwm_id);
rc = -EINVAL;
} else {
- rc = pm8xxx_pwm_bank_enable(pwm, 1);
-
- pm8xxx_pwm_bank_sel(pwm);
- pm8xxx_pwm_start(pwm, 1, 0);
+ if (pwm_chip->is_lpg_supported) {
+ rc = pm8xxx_pwm_bank_enable(pwm, 1);
+ pm8xxx_pwm_bank_sel(pwm);
+ pm8xxx_pwm_start(pwm, 1, 0);
+ } else {
+ pm8xxx_pwm_enable(pwm);
+ }
}
mutex_unlock(&pwm->chip->pwm_mutex);
return rc;
@@ -710,10 +828,13 @@
mutex_lock(&pwm->chip->pwm_mutex);
if (pwm->in_use) {
- pm8xxx_pwm_bank_sel(pwm);
- pm8xxx_pwm_start(pwm, 0, 0);
-
- pm8xxx_pwm_bank_enable(pwm, 0);
+ if (pwm_chip->is_lpg_supported) {
+ pm8xxx_pwm_bank_sel(pwm);
+ pm8xxx_pwm_start(pwm, 0, 0);
+ pm8xxx_pwm_bank_enable(pwm, 0);
+ } else {
+ pm8xxx_pwm_disable(pwm);
+ }
}
mutex_unlock(&pwm->chip->pwm_mutex);
}
@@ -748,8 +869,14 @@
pwm->period.pre_div_exp = period->pre_div_exp;
pm8xxx_pwm_save_period(pwm);
- pm8xxx_pwm_bank_sel(pwm);
- rc = pm8xxx_pwm_write(pwm, 4, 6);
+
+ if (pwm_chip->is_lpg_supported) {
+ pm8xxx_pwm_bank_sel(pwm);
+ rc = pm8xxx_lpg_pwm_write(pwm, 4, 6);
+ } else {
+ rc = pm8xxx_pwm_write(pwm);
+ }
+
out_unlock:
mutex_unlock(&pwm->chip->pwm_mutex);
@@ -784,11 +911,15 @@
pwm->pwm_value = pwm_value;
pm8xxx_pwm_save_pwm_value(pwm);
- pm8xxx_pwm_save(&pwm->pwm_ctl[1],
- PM8XXX_PWM_BYPASS_LUT, PM8XXX_PWM_BYPASS_LUT);
- pm8xxx_pwm_bank_sel(pwm);
- rc = pm8xxx_pwm_write(pwm, 1, 6);
+ if (pwm_chip->is_lpg_supported) {
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[1],
+ PM8XXX_PWM_BYPASS_LUT, PM8XXX_PWM_BYPASS_LUT);
+ pm8xxx_pwm_bank_sel(pwm);
+ rc = pm8xxx_lpg_pwm_write(pwm, 1, 6);
+ } else {
+ rc = pm8xxx_pwm_write(pwm);
+ }
if (rc)
pr_err("[%d]: pm8xxx_pwm_write: rc=%d\n", pwm->pwm_id, rc);
@@ -832,6 +963,12 @@
pr_err("No pwm_chip\n");
return -ENODEV;
}
+
+ if (pwm->chip->is_lpg_supported == 0) {
+ pr_err("LPG module isn't supported\n");
+ return -EINVAL;
+ }
+
if (idx_len >= PM_PWM_LUT_SIZE && start_idx) {
pr_err("Wrong LUT size or index\n");
return -EINVAL;
@@ -904,6 +1041,10 @@
pr_err("No pwm_chip\n");
return -ENODEV;
}
+ if (pwm->chip->is_lpg_supported == 0) {
+ pr_err("LPG module isn't supported\n");
+ return -EINVAL;
+ }
mutex_lock(&pwm->chip->pwm_mutex);
if (start) {
@@ -940,7 +1081,7 @@
struct device *dev;
struct dentry *dent;
- struct pm8xxx_pwm_user user[PM8XXX_PWM_CHANNELS];
+ struct pm8xxx_pwm_user *user;
};
static struct pm8xxx_pwm_dbg_device *pmic_dbg_device;
@@ -1101,6 +1242,14 @@
return -ENOMEM;
}
+ dbgdev->user = kcalloc(pwm_chip->pwm_channels,
+ sizeof(struct pm8xxx_pwm_user), GFP_KERNEL);
+ if (dbgdev->user == NULL) {
+ pr_err("kcalloc() failed.\n");
+ kfree(dbgdev);
+ return -ENOMEM;
+ }
+
mutex_init(&dbgdev->dbg_mutex);
dbgdev->dev = dev;
@@ -1113,7 +1262,7 @@
dbgdev->dent = dent;
- for (i = 0; i < PM8XXX_PWM_CHANNELS; i++) {
+ for (i = 0; i < pwm_chip->pwm_channels; i++) {
char pwm_ch[] = "0";
pwm_ch[0] = '0' + i;
@@ -1160,6 +1309,7 @@
static int __devexit pm8xxx_pwm_dbg_remove(void)
{
if (pmic_dbg_device) {
+ kfree(pmic_dbg_device->user);
debugfs_remove_recursive(pmic_dbg_device->dent);
kfree(pmic_dbg_device);
}
@@ -1184,6 +1334,7 @@
{
struct pm8xxx_pwm_chip *chip;
int i;
+ enum pm8xxx_version version;
chip = kzalloc(sizeof *chip, GFP_KERNEL);
if (chip == NULL) {
@@ -1191,15 +1342,39 @@
return -ENOMEM;
}
- for (i = 0; i < PM8XXX_PWM_CHANNELS; i++) {
- chip->pwm_dev[i].pwm_id = i;
- chip->pwm_dev[i].chip = chip;
- }
-
mutex_init(&chip->pwm_mutex);
chip->dev = &pdev->dev;
pwm_chip = chip;
+
+ version = pm8xxx_get_version(chip->dev->parent);
+
+ if (version == PM8XXX_VERSION_8921 ||
+ version == PM8XXX_VERSION_8058) {
+ chip->is_lpg_supported = 1;
+ }
+ if (chip->is_lpg_supported) {
+ chip->pwm_channels = PM8XXX_LPG_PWM_CHANNELS;
+ chip->pwm_total_pre_divs = NUM_LPG_PRE_DIVIDE;
+ } else {
+ chip->pwm_channels = PM8XXX_PWM_CHANNELS;
+ chip->pwm_total_pre_divs = NUM_PWM_PRE_DIVIDE;
+ }
+
+ chip->pwm_dev = kcalloc(chip->pwm_channels, sizeof(struct pwm_device),
+ GFP_KERNEL);
+ if (chip->pwm_dev == NULL) {
+ pr_err("kcalloc() failed.\n");
+ mutex_destroy(&chip->pwm_mutex);
+ kfree(chip);
+ return -ENOMEM;
+ }
+
+ for (i = 0; i < chip->pwm_channels; i++) {
+ chip->pwm_dev[i].pwm_id = i;
+ chip->pwm_dev[i].chip = chip;
+ }
+
platform_set_drvdata(pdev, chip);
if (pm8xxx_pwm_dbg_probe(&pdev->dev) < 0)
@@ -1214,6 +1389,7 @@
struct pm8xxx_pwm_chip *chip = dev_get_drvdata(pdev->dev.parent);
pm8xxx_pwm_dbg_remove();
+ kfree(chip->pwm_dev);
mutex_destroy(&chip->pwm_mutex);
platform_set_drvdata(pdev, NULL);
kfree(chip);
diff --git a/drivers/mfd/timpani-codec.c b/drivers/mfd/timpani-codec.c
index 364670e..b9ae84e 100644
--- a/drivers/mfd/timpani-codec.c
+++ b/drivers/mfd/timpani-codec.c
@@ -48,6 +48,7 @@
IGNORE = 2,
};
#define TIMPANI_ARRAY_SIZE (TIMPANI_A_CDC_COMP_HALT + 1)
+#define MAX_SHADOW_RIGISTERS TIMPANI_A_CDC_COMP_HALT
static u8 timpani_shadow[TIMPANI_ARRAY_SIZE];
@@ -2765,6 +2766,19 @@
int rc = 0;
u8 new_val;
+ if (reg > MAX_SHADOW_RIGISTERS) {
+ pr_debug("register number is out of bound for shadow"
+ " registers reg = %d\n", reg);
+ new_val = (val & mask);
+ rc = marimba_write_bit_mask(adie_codec.pdrv_ptr, reg, &new_val,
+ 1, 0xFF);
+ if (IS_ERR_VALUE(rc)) {
+ pr_err("%s: fail to write reg %x\n", __func__, reg);
+ rc = -EIO;
+ goto error;
+ }
+ return rc;
+ }
new_val = (val & mask) | (timpani_shadow[reg] & ~mask);
if (!(timpani_register_is_cacheable(reg) &&
(new_val == timpani_shadow[reg]))) {
diff --git a/drivers/net/wireless/libra/qcomwlan7x27a_pwrif.c b/drivers/net/wireless/libra/qcomwlan7x27a_pwrif.c
index 5da7a42..82625b5 100644
--- a/drivers/net/wireless/libra/qcomwlan7x27a_pwrif.c
+++ b/drivers/net/wireless/libra/qcomwlan7x27a_pwrif.c
@@ -32,7 +32,8 @@
struct wlan_vreg_info {
const char *vreg_id;
- unsigned int vreg_level;
+ unsigned int level_min;
+ unsigned int level_max;
unsigned int pmapp_id;
unsigned int is_vreg_pin_controlled;
struct regulator *reg;
@@ -40,12 +41,12 @@
static struct wlan_vreg_info vreg_info[] = {
- {"bt", 3050000, 21, 1, NULL},
- {"msme1", 1800000, 2, 0, NULL},
- {"wlan_tcx0", 1800000, 53, 0, NULL},
- {"wlan4", 1200000, 23, 0, NULL},
- {"wlan2", 1350000, 9, 1, NULL},
- {"wlan3", 1200000, 10, 1, NULL},
+ {"bt", 3050000, 3050000, 21, 1, NULL},
+ {"msme1", 1800000, 1800000, 2, 0, NULL},
+ {"wlan_tcx0", 1800000, 1800000, 53, 0, NULL},
+ {"wlan4", 1200000, 1200000, 23, 0, NULL},
+ {"wlan2", 1350000, 1350000, 9, 1, NULL},
+ {"wlan3", 1200000, 1200000, 10, 1, NULL},
};
static int qrf6285_init_regs(void)
@@ -55,8 +56,8 @@
for (i = 0; i < ARRAY_SIZE(regs); i++) {
regs[i].supply = vreg_info[i].vreg_id;
- regs[i].min_uV = vreg_info[i].vreg_level;
- regs[i].max_uV = vreg_info[i].vreg_level;
+ regs[i].min_uV = vreg_info[i].level_min;
+ regs[i].max_uV = vreg_info[i].level_max;
}
rc = regulator_bulk_get(NULL, ARRAY_SIZE(regs), regs);
@@ -128,8 +129,8 @@
if (on) {
rc = regulator_set_voltage(vreg_info[index].reg,
- vreg_info[index].vreg_level,
- vreg_info[index].vreg_level);
+ vreg_info[index].level_min,
+ vreg_info[index].level_max);
if (rc) {
pr_err("%s:%s set voltage failed %d\n",
__func__, vreg_info[index].vreg_id, rc);
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 179a4ac..cca1035 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -261,7 +261,8 @@
config ISL9519_CHARGER
tristate "isl9519 charger"
- depends on BATTERY_MSM8X60
+ depends on (BATTERY_MSM8X60 || PM8921_CHARGER)
+ depends on I2C
default n
help
The isl9519q charger chip from intersil is connected to an external
diff --git a/drivers/power/isl9519q.c b/drivers/power/isl9519q.c
index a45d286..733de45 100644
--- a/drivers/power/isl9519q.c
+++ b/drivers/power/isl9519q.c
@@ -20,9 +20,11 @@
#include <linux/workqueue.h>
#include <linux/interrupt.h>
#include <linux/msm-charger.h>
+#include <linux/mfd/pm8xxx/pm8921-charger.h>
#include <linux/slab.h>
#include <linux/i2c/isl9519.h>
#include <linux/msm_adc.h>
+#include <linux/spinlock.h>
#define CHG_CURRENT_REG 0x14
#define MAX_SYS_VOLTAGE_REG 0x15
@@ -34,7 +36,7 @@
#define TRCKL_CHG_STATUS_BIT 0x80
-#define ISL9519_CHG_PERIOD ((HZ) * 150)
+#define ISL9519_CHG_PERIOD_SEC 150
struct isl9519q_struct {
struct i2c_client *client;
@@ -52,6 +54,10 @@
struct msm_hardware_charger adapter_hw_chg;
int suspended;
int charge_at_resume;
+ struct ext_chg_pm8921 ext_chg;
+ spinlock_t lock;
+ bool notify_by_pmic;
+ bool trickle;
};
static int isl9519q_read_reg(struct i2c_client *client, int reg,
@@ -70,6 +76,8 @@
} else
*val = ret;
+ pr_debug("%s.reg=0x%x.val=0x%x.\n", __func__, reg, *val);
+
return 0;
}
@@ -79,6 +87,8 @@
int ret;
struct isl9519q_struct *isl_chg;
+ pr_debug("%s.reg=0x%x.val=0x%x.\n", __func__, reg, val);
+
isl_chg = i2c_get_clientdata(client);
ret = i2c_smbus_write_word_data(isl_chg->client, reg, val);
@@ -91,6 +101,14 @@
return 0;
}
+/**
+ * Read charge-current via ADC.
+ *
+ * The ISL CCMON (charge-current-monitor) pin is connected to
+ * the PMIC MPP#X pin.
+ * This not required when notify_by_pmic is used where the PMIC
+ * uses BMS to notify the ISL on charging-done / charge-resume.
+ */
static int isl_read_adc(int channel, int *mv_reading)
{
int ret;
@@ -136,98 +154,129 @@
out:
*mv_reading = 0;
pr_debug("%s: done with error for %d\n", __func__, channel);
- return -EINVAL;
+ return -EINVAL;
}
-static void isl9519q_charge(struct work_struct *isl9519_work)
+static bool is_trickle_charging(struct isl9519q_struct *isl_chg)
{
- u16 temp;
+ u16 ctrl = 0;
int ret;
+
+ ret = isl9519q_read_reg(isl_chg->client, CONTROL_REG, &ctrl);
+
+ if (!ret) {
+ pr_debug("%s.control_reg=0x%x.\n", __func__, ctrl);
+ } else {
+ dev_err(&isl_chg->client->dev,
+ "%s couldnt read cntrl reg\n", __func__);
+ }
+
+ if (ctrl & TRCKL_CHG_STATUS_BIT)
+ return true;
+
+ return false;
+}
+
+static void isl_adapter_check_ichg(struct isl9519q_struct *isl_chg)
+{
+ int ichg; /* isl charger current */
+ int mv_reading = 0;
+
+ ichg = isl_read_adc(CHANNEL_ADC_BATT_AMON, &mv_reading);
+
+ dev_dbg(&isl_chg->client->dev, "%s mv_reading=%d\n",
+ __func__, mv_reading);
+ dev_dbg(&isl_chg->client->dev, "%s isl_charger_current=%d\n",
+ __func__, ichg);
+
+ if (ichg >= 0 && ichg <= isl_chg->term_current)
+ msm_charger_notify_event(&isl_chg->adapter_hw_chg,
+ CHG_DONE_EVENT);
+
+ isl_chg->trickle = is_trickle_charging(isl_chg);
+ if (isl_chg->trickle)
+ msm_charger_notify_event(&isl_chg->adapter_hw_chg,
+ CHG_BATT_BEGIN_FAST_CHARGING);
+}
+
+/**
+ * isl9519q_worker
+ *
+ * Periodic task required to kick the ISL HW watchdog to keep
+ * charging.
+ *
+ * @isl9519_work: work context.
+ */
+static void isl9519q_worker(struct work_struct *isl9519_work)
+{
struct isl9519q_struct *isl_chg;
- int isl_charger_current;
- int mv_reading;
isl_chg = container_of(isl9519_work, struct isl9519q_struct,
charge_work.work);
dev_dbg(&isl_chg->client->dev, "%s\n", __func__);
- if (isl_chg->charging) {
- isl_charger_current = isl_read_adc(CHANNEL_ADC_BATT_AMON,
- &mv_reading);
- dev_dbg(&isl_chg->client->dev, "%s mv_reading=%d\n",
- __func__, mv_reading);
- dev_dbg(&isl_chg->client->dev, "%s isl_charger_current=%d\n",
- __func__, isl_charger_current);
- if (isl_charger_current >= 0
- && isl_charger_current <= isl_chg->term_current) {
- msm_charger_notify_event(
- &isl_chg->adapter_hw_chg,
- CHG_DONE_EVENT);
- }
- isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG,
- isl_chg->chgcurrent);
- ret = isl9519q_read_reg(isl_chg->client, CONTROL_REG, &temp);
- if (!ret) {
- if (!(temp & TRCKL_CHG_STATUS_BIT))
- msm_charger_notify_event(
- &isl_chg->adapter_hw_chg,
- CHG_BATT_BEGIN_FAST_CHARGING);
- } else {
- dev_err(&isl_chg->client->dev,
- "%s couldnt read cntrl reg\n", __func__);
- }
- schedule_delayed_work(&isl_chg->charge_work,
- ISL9519_CHG_PERIOD);
+ if (!isl_chg->charging) {
+ pr_info("%s.stop charging.\n", __func__);
+ isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG, 0);
+ return; /* Stop periodic worker */
}
+
+ /* Kick the dog by writting to CHG_CURRENT_REG */
+ isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG,
+ isl_chg->chgcurrent);
+
+ if (isl_chg->notify_by_pmic)
+ isl_chg->trickle = is_trickle_charging(isl_chg);
+ else
+ isl_adapter_check_ichg(isl_chg);
+
+ schedule_delayed_work(&isl_chg->charge_work,
+ (ISL9519_CHG_PERIOD_SEC * HZ));
}
-static int isl9519q_start_charging(struct msm_hardware_charger *hw_chg,
- int chg_voltage, int chg_current)
+static int isl9519q_start_charging(struct isl9519q_struct *isl_chg,
+ int chg_voltage, int chg_current)
{
- struct isl9519q_struct *isl_chg;
int ret = 0;
- isl_chg = container_of(hw_chg, struct isl9519q_struct, adapter_hw_chg);
- if (isl_chg->charging)
- /* we are already charging */
+ pr_info("%s.\n", __func__);
+
+ if (isl_chg->charging) {
+ pr_warn("%s.already charging.\n", __func__);
return 0;
+ }
if (isl_chg->suspended) {
+ pr_warn("%s.suspended - can't start charging.\n", __func__);
isl_chg->charge_at_resume = 1;
return 0;
}
- dev_dbg(&isl_chg->client->dev, "%s\n", __func__);
+ dev_dbg(&isl_chg->client->dev,
+ "%s starting timed work.period=%d seconds.\n",
+ __func__, (int) ISL9519_CHG_PERIOD_SEC);
- ret = isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG,
- isl_chg->chgcurrent);
- if (ret) {
- dev_err(&isl_chg->client->dev,
- "%s coulnt write to current_reg\n", __func__);
- goto out;
- }
+ /*
+ * The ISL will start charging from the worker context.
+ * This API might be called from interrupt context.
+ */
+ schedule_delayed_work(&isl_chg->charge_work, 1);
- dev_dbg(&isl_chg->client->dev, "%s starting timed work\n",
- __func__);
- schedule_delayed_work(&isl_chg->charge_work,
- ISL9519_CHG_PERIOD);
isl_chg->charging = true;
-out:
return ret;
}
-static int isl9519q_stop_charging(struct msm_hardware_charger *hw_chg)
+static int isl9519q_stop_charging(struct isl9519q_struct *isl_chg)
{
- struct isl9519q_struct *isl_chg;
- int ret = 0;
+ pr_info("%s.\n", __func__);
- isl_chg = container_of(hw_chg, struct isl9519q_struct, adapter_hw_chg);
- if (!(isl_chg->charging))
- /* we arent charging */
+ if (!(isl_chg->charging)) {
+ pr_warn("%s.already not charging.\n", __func__);
return 0;
+ }
if (isl_chg->suspended) {
isl_chg->charge_at_resume = 0;
@@ -236,17 +285,71 @@
dev_dbg(&isl_chg->client->dev, "%s\n", __func__);
- ret = isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG, 0);
- if (ret) {
- dev_err(&isl_chg->client->dev,
- "%s coulnt write to current_reg\n", __func__);
- goto out;
- }
-
isl_chg->charging = false;
- cancel_delayed_work(&isl_chg->charge_work);
-out:
- return ret;
+ isl_chg->trickle = false;
+ /*
+ * The ISL will stop charging from the worker context.
+ * This API might be called from interrupt context.
+ */
+ schedule_delayed_work(&isl_chg->charge_work, 1);
+
+ return 0;
+}
+
+static int isl_ext_start_charging(void *ctx)
+{
+ int rc;
+ struct isl9519q_struct *isl_chg = ctx;
+ unsigned long flags;
+
+ spin_lock_irqsave(&isl_chg->lock, flags);
+ rc = isl9519q_start_charging(isl_chg, 0, isl_chg->chgcurrent);
+ spin_unlock_irqrestore(&isl_chg->lock, flags);
+
+ return rc;
+}
+
+static int isl_ext_stop_charging(void *ctx)
+{
+ int rc;
+ struct isl9519q_struct *isl_chg = ctx;
+ unsigned long flags;
+
+ spin_lock_irqsave(&isl_chg->lock, flags);
+ rc = isl9519q_stop_charging(isl_chg);
+ spin_unlock_irqrestore(&isl_chg->lock, flags);
+
+ return rc;
+}
+
+static bool isl_ext_is_trickle(void *ctx)
+{
+ struct isl9519q_struct *isl_chg = ctx;
+
+ return isl_chg->trickle;
+}
+
+static int isl_adapter_start_charging(struct msm_hardware_charger *hw_chg,
+ int chg_voltage, int chg_current)
+{
+ int rc;
+ struct isl9519q_struct *isl_chg;
+
+ isl_chg = container_of(hw_chg, struct isl9519q_struct, adapter_hw_chg);
+ rc = isl9519q_start_charging(isl_chg, chg_voltage, chg_current);
+
+ return rc;
+}
+
+static int isl_adapter_stop_charging(struct msm_hardware_charger *hw_chg)
+{
+ int rc;
+ struct isl9519q_struct *isl_chg;
+
+ isl_chg = container_of(hw_chg, struct isl9519q_struct, adapter_hw_chg);
+ rc = isl9519q_stop_charging(isl_chg);
+
+ return rc;
}
static int isl9519q_charging_switched(struct msm_hardware_charger *hw_chg)
@@ -296,6 +399,93 @@
#define DEFAULT_MAX_VOLTAGE_REG_VALUE 0x1070
#define DEFAULT_MIN_VOLTAGE_REG_VALUE 0x0D00
+static int __devinit isl9519q_init_adapter(struct isl9519q_struct *isl_chg)
+{
+ int ret;
+ struct isl_platform_data *pdata = isl_chg->client->dev.platform_data;
+ struct i2c_client *client = isl_chg->client;
+
+ isl_chg->adapter_hw_chg.type = CHG_TYPE_AC;
+ isl_chg->adapter_hw_chg.rating = 2;
+ isl_chg->adapter_hw_chg.name = "isl-adapter";
+ isl_chg->adapter_hw_chg.start_charging = isl_adapter_start_charging;
+ isl_chg->adapter_hw_chg.stop_charging = isl_adapter_stop_charging;
+ isl_chg->adapter_hw_chg.charging_switched = isl9519q_charging_switched;
+
+ ret = gpio_request(pdata->valid_n_gpio, "isl_charger_valid");
+ if (ret) {
+ dev_err(&client->dev, "%s gpio_request failed "
+ "for %d ret=%d\n",
+ __func__, pdata->valid_n_gpio, ret);
+ goto out;
+ }
+
+ ret = msm_charger_register(&isl_chg->adapter_hw_chg);
+ if (ret) {
+ dev_err(&client->dev,
+ "%s msm_charger_register failed for ret =%d\n",
+ __func__, ret);
+ goto free_gpio;
+ }
+
+ ret = request_threaded_irq(client->irq, NULL,
+ isl_valid_handler,
+ IRQF_TRIGGER_FALLING |
+ IRQF_TRIGGER_RISING,
+ "isl_charger_valid", client);
+ if (ret) {
+ dev_err(&client->dev,
+ "%s request_threaded_irq failed "
+ "for %d ret =%d\n",
+ __func__, client->irq, ret);
+ goto unregister;
+ }
+ irq_set_irq_wake(client->irq, 1);
+
+ ret = gpio_get_value_cansleep(isl_chg->valid_n_gpio);
+ if (ret < 0) {
+ dev_err(&client->dev,
+ "%s gpio_get_value failed for %d ret=%d\n",
+ __func__, pdata->valid_n_gpio, ret);
+ /* assume absent */
+ ret = 1;
+ }
+ if (!ret) {
+ msm_charger_notify_event(&isl_chg->adapter_hw_chg,
+ CHG_INSERTED_EVENT);
+ isl_chg->present = 1;
+ }
+
+ return 0;
+
+unregister:
+ msm_charger_unregister(&isl_chg->adapter_hw_chg);
+free_gpio:
+ gpio_free(pdata->valid_n_gpio);
+out:
+ return ret;
+
+}
+
+static int __devinit isl9519q_init_ext_chg(struct isl9519q_struct *isl_chg)
+{
+ int ret;
+
+ isl_chg->ext_chg.name = "isl9519q";
+ isl_chg->ext_chg.ctx = isl_chg;
+ isl_chg->ext_chg.start_charging = isl_ext_start_charging;
+ isl_chg->ext_chg.stop_charging = isl_ext_stop_charging;
+ isl_chg->ext_chg.is_trickle = isl_ext_is_trickle;
+ ret = register_external_dc_charger(&isl_chg->ext_chg);
+ if (ret) {
+ pr_err("%s.failed to register external dc charger.ret=%d.\n",
+ __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
static int __devinit isl9519q_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
@@ -306,6 +496,8 @@
ret = 0;
pdata = client->dev.platform_data;
+ pr_info("%s.\n", __func__);
+
if (pdata == NULL) {
dev_err(&client->dev, "%s no platform data\n", __func__);
ret = -EINVAL;
@@ -324,7 +516,9 @@
goto out;
}
- INIT_DELAYED_WORK(&isl_chg->charge_work, isl9519q_charge);
+ spin_lock_init(&isl_chg->lock);
+
+ INIT_DELAYED_WORK(&isl_chg->charge_work, isl9519q_worker);
isl_chg->client = client;
isl_chg->chgcurrent = pdata->chgcurrent;
isl_chg->term_current = pdata->term_current;
@@ -337,12 +531,14 @@
isl_chg->chgcurrent &= ~0x7F;
isl_chg->input_current &= ~0x7F;
- isl_chg->adapter_hw_chg.type = CHG_TYPE_AC;
- isl_chg->adapter_hw_chg.rating = 2;
- isl_chg->adapter_hw_chg.name = "isl-adapter";
- isl_chg->adapter_hw_chg.start_charging = isl9519q_start_charging;
- isl_chg->adapter_hw_chg.stop_charging = isl9519q_stop_charging;
- isl_chg->adapter_hw_chg.charging_switched = isl9519q_charging_switched;
+ /**
+ * ISL is Notified by PMIC to start/stop charging, rather than
+ * handling interrupt from ISL for End-Of-Chargring, and
+ * monitoring the charge-current periodically. The valid_n_gpio
+ * is also not used, dc-present is detected by PMIC.
+ */
+ isl_chg->notify_by_pmic = (client->irq == 0);
+ i2c_set_clientdata(client, isl_chg);
if (pdata->chg_detection_config) {
ret = pdata->chg_detection_config();
@@ -353,35 +549,6 @@
}
}
- ret = gpio_request(pdata->valid_n_gpio, "isl_charger_valid");
- if (ret) {
- dev_err(&client->dev, "%s gpio_request failed for %d ret=%d\n",
- __func__, pdata->valid_n_gpio, ret);
- goto free_isl_chg;
- }
-
- i2c_set_clientdata(client, isl_chg);
-
- ret = msm_charger_register(&isl_chg->adapter_hw_chg);
- if (ret) {
- dev_err(&client->dev,
- "%s msm_charger_register failed for ret =%d\n",
- __func__, ret);
- goto free_gpio;
- }
-
- ret = request_threaded_irq(client->irq, NULL,
- isl_valid_handler,
- IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
- "isl_charger_valid", client);
- if (ret) {
- dev_err(&client->dev,
- "%s request_threaded_irq failed for %d ret =%d\n",
- __func__, client->irq, ret);
- goto unregister;
- }
- irq_set_irq_wake(client->irq, 1);
-
isl_chg->max_system_voltage &= MAX_VOLTAGE_REG_MASK;
isl_chg->min_system_voltage &= MIN_VOLTAGE_REG_MASK;
if (isl_chg->max_system_voltage == 0)
@@ -391,57 +558,34 @@
ret = isl9519q_write_reg(isl_chg->client, MAX_SYS_VOLTAGE_REG,
isl_chg->max_system_voltage);
- if (ret) {
- dev_err(&client->dev,
- "%s couldnt write to MAX_SYS_VOLTAGE_REG ret=%d\n",
- __func__, ret);
- goto free_irq;
- }
+ if (ret)
+ goto free_isl_chg;
ret = isl9519q_write_reg(isl_chg->client, MIN_SYS_VOLTAGE_REG,
isl_chg->min_system_voltage);
- if (ret) {
- dev_err(&client->dev,
- "%s couldnt write to MIN_SYS_VOLTAGE_REG ret=%d\n",
- __func__, ret);
- goto free_irq;
- }
+ if (ret)
+ goto free_isl_chg;
if (isl_chg->input_current) {
ret = isl9519q_write_reg(isl_chg->client,
INPUT_CURRENT_REG,
isl_chg->input_current);
- if (ret) {
- dev_err(&client->dev,
- "%s couldnt write INPUT_CURRENT_REG ret=%d\n",
- __func__, ret);
- goto free_irq;
- }
+ if (ret)
+ goto free_isl_chg;
}
- ret = gpio_get_value_cansleep(isl_chg->valid_n_gpio);
- if (ret < 0) {
- dev_err(&client->dev,
- "%s gpio_get_value failed for %d ret=%d\n", __func__,
- pdata->valid_n_gpio, ret);
- /* assume absent */
- ret = 1;
- }
- if (!ret) {
- msm_charger_notify_event(&isl_chg->adapter_hw_chg,
- CHG_INSERTED_EVENT);
- isl_chg->present = 1;
- }
+ if (isl_chg->notify_by_pmic)
+ ret = isl9519q_init_ext_chg(isl_chg);
+ else
+ ret = isl9519q_init_adapter(isl_chg);
- pr_debug("%s OK chg_present=%d\n", __func__, isl_chg->present);
+ if (ret)
+ goto free_isl_chg;
+
+ pr_info("%s OK.\n", __func__);
+
return 0;
-free_irq:
- free_irq(client->irq, NULL);
-unregister:
- msm_charger_unregister(&isl_chg->adapter_hw_chg);
-free_gpio:
- gpio_free(pdata->valid_n_gpio);
free_isl_chg:
kfree(isl_chg);
out:
@@ -493,7 +637,7 @@
isl_chg->suspended = 0;
if (isl_chg->charge_at_resume) {
isl_chg->charge_at_resume = 0;
- isl9519q_start_charging(&isl_chg->adapter_hw_chg, 0, 0);
+ isl9519q_start_charging(isl_chg, 0, 0);
}
return 0;
}
@@ -519,10 +663,12 @@
static int __init isl9519q_init(void)
{
+ pr_info("%s. isl9519q SW rev 1.01\n", __func__);
+
return i2c_add_driver(&isl9519q_driver);
}
-module_init(isl9519q_init);
+late_initcall_sync(isl9519q_init);
static void __exit isl9519q_exit(void)
{
diff --git a/drivers/power/pm8921-bms.c b/drivers/power/pm8921-bms.c
index e666bfc..751c6fc 100644
--- a/drivers/power/pm8921-bms.c
+++ b/drivers/power/pm8921-bms.c
@@ -23,6 +23,7 @@
#include <linux/bitops.h>
#include <linux/debugfs.h>
#include <linux/slab.h>
+#include <linux/delay.h>
#define BMS_CONTROL 0x224
#define BMS_OUTPUT0 0x230
@@ -35,14 +36,19 @@
#define CCADC_DATA1 0x245
#define CCADC_OFFSET_TRIM1 0x34A
#define CCADC_OFFSET_TRIM0 0x34B
+#define CCADC_FULLSCALE_TRIM1 0x34C
+#define CCADC_FULLSCALE_TRIM0 0x34D
#define ADC_ARB_SECP_CNTRL 0x190
#define ADC_ARB_SECP_AMUX_CNTRL 0x191
#define ADC_ARB_SECP_ANA_PARAM 0x192
+#define ADC_ARB_SECP_DIG_PARAM 0x193
#define ADC_ARB_SECP_RSV 0x194
#define ADC_ARB_SECP_DATA1 0x195
#define ADC_ARB_SECP_DATA0 0x196
+#define ADC_ARB_BMS_CNTRL 0x18D
+
enum pmic_bms_interrupts {
PM8921_BMS_SBI_WRITE_OK,
PM8921_BMS_CC_THR,
@@ -54,16 +60,6 @@
PM_BMS_MAX_INTS,
};
-/**
- * struct pm8921_bms_chip -device information
- * @dev: device pointer to access the parent
- * @dent: debugfs directory
- * @r_sense: batt sense resistance value
- * @i_test: peak current
- * @v_failure: battery dead voltage
- * @fcc: battery capacity
- *
- */
struct pm8921_bms_chip {
struct device *dev;
struct dentry *dent;
@@ -76,7 +72,9 @@
struct pc_temp_ocv_lut *pc_temp_ocv_lut;
struct pc_sf_lut *pc_sf_lut;
struct work_struct calib_hkadc_work;
+ struct delayed_work calib_ccadc_work;
unsigned int calib_delay_ms;
+ int ccadc_gain_uv;
unsigned int revision;
unsigned int xoadc_v0625;
unsigned int xoadc_v125;
@@ -88,30 +86,122 @@
unsigned int pmic_bms_irq[PM_BMS_MAX_INTS];
DECLARE_BITMAP(enabled_irqs, PM_BMS_MAX_INTS);
spinlock_t bms_output_lock;
+ struct single_row_lut *adjusted_fcc_temp_lut;
};
static struct pm8921_bms_chip *the_chip;
#define DEFAULT_RBATT_MOHMS 128
-#define DEFAULT_UNUSABLE_CHARGE_MAH 10
#define DEFAULT_OCV_MICROVOLTS 3900000
-#define DEFAULT_REMAINING_CHARGE_MAH 990
-#define DEFAULT_COULUMB_COUNTER 0
#define DEFAULT_CHARGE_CYCLES 0
+static int last_chargecycles = DEFAULT_CHARGE_CYCLES;
+static int last_charge_increase;
+module_param(last_chargecycles, int, 0644);
+module_param(last_charge_increase, int, 0644);
+
static int last_rbatt = -EINVAL;
static int last_ocv_uv = -EINVAL;
static int last_soc = -EINVAL;
static int last_real_fcc = -EINVAL;
+static int last_real_fcc_batt_temp = -EINVAL;
-static int last_chargecycles = DEFAULT_CHARGE_CYCLES;
-static int last_charge_increase;
+static int bms_ops_set(const char *val, const struct kernel_param *kp)
+{
+ if (*(int *)kp->arg == -EINVAL)
+ return param_set_int(val, kp);
+ else
+ return 0;
+}
-module_param(last_rbatt, int, 0644);
-module_param(last_ocv_uv, int, 0644);
-module_param(last_chargecycles, int, 0644);
-module_param(last_charge_increase, int, 0644);
-module_param(last_real_fcc, int, 0644);
+static struct kernel_param_ops bms_param_ops = {
+ .set = bms_ops_set,
+ .get = param_get_int,
+};
+
+module_param_cb(last_rbatt, &bms_param_ops, &last_rbatt, 0644);
+module_param_cb(last_ocv_uv, &bms_param_ops, &last_ocv_uv, 0644);
+module_param_cb(last_soc, &bms_param_ops, &last_soc, 0644);
+
+static int interpolate_fcc(struct pm8921_bms_chip *chip, int batt_temp);
+static void readjust_fcc_table(void)
+{
+ struct single_row_lut *temp, *old;
+ int i, fcc, ratio;
+
+ if (!the_chip->fcc_temp_lut) {
+ pr_err("The static fcc lut table is NULL\n");
+ return;
+ }
+
+ temp = kzalloc(sizeof(struct single_row_lut), GFP_KERNEL);
+ if (!temp) {
+ pr_err("Cannot allocate memory for adjusted fcc table\n");
+ return;
+ }
+
+ fcc = interpolate_fcc(the_chip, last_real_fcc_batt_temp);
+
+ temp->cols = the_chip->fcc_temp_lut->cols;
+ for (i = 0; i < the_chip->fcc_temp_lut->cols; i++) {
+ temp->x[i] = the_chip->fcc_temp_lut->x[i];
+ ratio = div_u64(the_chip->fcc_temp_lut->y[i] * 1000, fcc);
+ temp->y[i] = (ratio * last_real_fcc);
+ temp->y[i] /= 1000;
+ pr_debug("temp=%d, staticfcc=%d, adjfcc=%d, ratio=%d\n",
+ temp->x[i], the_chip->fcc_temp_lut->y[i],
+ temp->y[i], ratio);
+ }
+
+ old = the_chip->adjusted_fcc_temp_lut;
+ the_chip->adjusted_fcc_temp_lut = temp;
+ kfree(old);
+}
+
+static int bms_last_real_fcc_set(const char *val,
+ const struct kernel_param *kp)
+{
+ int rc = 0;
+
+ if (last_real_fcc == -EINVAL)
+ rc = param_set_int(val, kp);
+ if (rc) {
+ pr_err("Failed to set last_real_fcc rc=%d\n", rc);
+ return rc;
+ }
+ if (last_real_fcc_batt_temp != -EINVAL)
+ readjust_fcc_table();
+ return rc;
+}
+static struct kernel_param_ops bms_last_real_fcc_param_ops = {
+ .set = bms_last_real_fcc_set,
+ .get = param_get_int,
+};
+module_param_cb(last_real_fcc, &bms_last_real_fcc_param_ops,
+ &last_real_fcc, 0644);
+
+static int bms_last_real_fcc_batt_temp_set(const char *val,
+ const struct kernel_param *kp)
+{
+ int rc = 0;
+
+ if (last_real_fcc_batt_temp == -EINVAL)
+ rc = param_set_int(val, kp);
+ if (rc) {
+ pr_err("Failed to set last_real_fcc_batt_temp rc=%d\n", rc);
+ return rc;
+ }
+ if (last_real_fcc != -EINVAL)
+ readjust_fcc_table();
+ return rc;
+}
+
+static struct kernel_param_ops bms_last_real_fcc_batt_temp_param_ops = {
+ .set = bms_last_real_fcc_batt_temp_set,
+ .get = param_get_int,
+};
+module_param_cb(last_real_fcc_batt_temp, &bms_last_real_fcc_batt_temp_param_ops,
+ &last_real_fcc_batt_temp, 0644);
static int pm_bms_get_rt_status(struct pm8921_bms_chip *chip, int irq_id)
{
@@ -247,25 +337,34 @@
return 0;
}
-#define V_PER_BIT_MUL_FACTOR 293
-#define INTRINSIC_OFFSET 0x6000
-static int vbatt_to_microvolt(unsigned int a)
+#define V_PER_BIT_MUL_FACTOR 97656
+#define V_PER_BIT_DIV_FACTOR 1000
+#define XOADC_INTRINSIC_OFFSET 0x6000
+static int xoadc_reading_to_microvolt(unsigned int a)
{
- if (a <= INTRINSIC_OFFSET)
+ if (a <= XOADC_INTRINSIC_OFFSET)
return 0;
- return (a - INTRINSIC_OFFSET) * V_PER_BIT_MUL_FACTOR;
+ return (a - XOADC_INTRINSIC_OFFSET)
+ * V_PER_BIT_MUL_FACTOR / V_PER_BIT_DIV_FACTOR;
}
#define XOADC_CALIB_UV 625000
-static int adjust_xo_reading(struct pm8921_bms_chip *chip, unsigned int uv)
+#define VBATT_MUL_FACTOR 3
+static int adjust_xo_vbatt_reading(struct pm8921_bms_chip *chip,
+ unsigned int uv)
{
- u64 numerator = ((u64)uv - chip->xoadc_v0625) * XOADC_CALIB_UV;
- u64 denominator = chip->xoadc_v125 - chip->xoadc_v0625;
+ u64 numerator, denominator;
+ if (uv == 0)
+ return 0;
+
+ numerator = ((u64)uv - chip->xoadc_v0625) * XOADC_CALIB_UV;
+ denominator = chip->xoadc_v125 - chip->xoadc_v0625;
if (denominator == 0)
- return uv;
- return XOADC_CALIB_UV + div_u64(numerator, denominator);
+ return uv * VBATT_MUL_FACTOR;
+ return (XOADC_CALIB_UV + div_u64(numerator, denominator))
+ * VBATT_MUL_FACTOR;
}
#define CC_RESOLUTION_N_V1 1085069
@@ -288,11 +387,61 @@
* resolution (the value of a single bit) was changed after revision 2.0
* for more accurate readings
*/
- return (chip->revision < PM8XXX_REVISION_8901_2p0) ?
+ return (chip->revision < PM8XXX_REVISION_8921_2p0) ?
cc_to_microvolt_v1((s64)cc) :
cc_to_microvolt_v2((s64)cc);
}
+#define CCADC_READING_RESOLUTION_N_V1 1085069
+#define CCADC_READING_RESOLUTION_D_V1 100000
+#define CCADC_READING_RESOLUTION_N_V2 542535
+#define CCADC_READING_RESOLUTION_D_V2 100000
+static s64 ccadc_reading_to_microvolt_v1(s64 cc)
+{
+ return div_s64(cc * CCADC_READING_RESOLUTION_N_V1,
+ CCADC_READING_RESOLUTION_D_V1);
+}
+
+static s64 ccadc_reading_to_microvolt_v2(s64 cc)
+{
+ return div_s64(cc * CCADC_READING_RESOLUTION_N_V2,
+ CCADC_READING_RESOLUTION_D_V2);
+}
+
+static s64 ccadc_reading_to_microvolt(struct pm8921_bms_chip *chip, s64 cc)
+{
+ /*
+ * resolution (the value of a single bit) was changed after revision 2.0
+ * for more accurate readings
+ */
+ return (chip->revision < PM8XXX_REVISION_8921_2p0) ?
+ ccadc_reading_to_microvolt_v1((s64)cc) :
+ ccadc_reading_to_microvolt_v2((s64)cc);
+}
+
+static s64 microvolt_to_ccadc_reading_v1(s64 uv)
+{
+ return div_s64(uv * CCADC_READING_RESOLUTION_D_V1,
+ CCADC_READING_RESOLUTION_N_V1);
+}
+
+static s64 microvolt_to_ccadc_reading_v2(s64 uv)
+{
+ return div_s64(uv * CCADC_READING_RESOLUTION_D_V2,
+ CCADC_READING_RESOLUTION_N_V2);
+}
+
+static s64 microvolt_to_ccadc_reading(struct pm8921_bms_chip *chip, s64 cc)
+{
+ /*
+ * resolution (the value of a single bit) was changed after revision 2.0
+ * for more accurate readings
+ */
+ return (chip->revision < PM8XXX_REVISION_8921_2p0) ?
+ microvolt_to_ccadc_reading_v1((s64)cc) :
+ microvolt_to_ccadc_reading_v2((s64)cc);
+}
+
#define CC_READING_TICKS 55
#define SLEEP_CLK_HZ 32768
#define SECONDS_PER_HOUR 3600
@@ -302,6 +451,19 @@
SLEEP_CLK_HZ * SECONDS_PER_HOUR);
}
+#define GAIN_REFERENCE_UV 25000
+/*
+ * gain compensation for ccadc readings - common for vsense based and
+ * couloumb counter based readings
+ */
+static s64 cc_adjust_for_gain(struct pm8921_bms_chip *chip, s64 cc)
+{
+ if (chip->ccadc_gain_uv == 0)
+ return cc;
+
+ return div_s64(cc * GAIN_REFERENCE_UV, chip->ccadc_gain_uv);
+}
+
/* returns the signed value read from the hardware */
static int read_cc(struct pm8921_bms_chip *chip, int *result)
{
@@ -333,8 +495,12 @@
pr_err("fail to read LAST_GOOD_OCV_VALUE rc = %d\n", rc);
return rc;
}
- *result = vbatt_to_microvolt(reading);
- pr_debug("raw = %04x ocv_microV = %u\n", reading, *result);
+ *result = xoadc_reading_to_microvolt(reading);
+ pr_debug("raw = %04x ocv_uV = %u\n", reading, *result);
+ *result = adjust_xo_vbatt_reading(chip, *result);
+ pr_debug("after adj ocv_uV = %u\n", *result);
+ if (*result != 0)
+ last_ocv_uv = *result;
return 0;
}
@@ -348,8 +514,10 @@
pr_err("fail to read VBATT_FOR_RBATT rc = %d\n", rc);
return rc;
}
- *result = vbatt_to_microvolt(reading);
+ *result = xoadc_reading_to_microvolt(reading);
pr_debug("raw = %04x vbatt_for_r_microV = %u\n", reading, *result);
+ *result = adjust_xo_vbatt_reading(chip, *result);
+ pr_debug("after adj vbatt_for_r_uV = %u\n", *result);
return 0;
}
@@ -363,8 +531,10 @@
pr_err("fail to read VSENSE_FOR_RBATT rc = %d\n", rc);
return rc;
}
- *result = cc_to_microvolt(chip, reading);
- pr_debug("raw = %04x vsense_for_r_microV = %u\n", reading, *result);
+ *result = ccadc_reading_to_microvolt(chip, reading);
+ pr_debug("raw = %04x vsense_for_r_uV = %u\n", reading, *result);
+ *result = cc_adjust_for_gain(chip, *result);
+ pr_debug("after adj vsense_for_r_uV = %u\n", *result);
return 0;
}
@@ -378,8 +548,10 @@
pr_err("fail to read OCV_FOR_RBATT rc = %d\n", rc);
return rc;
}
- *result = vbatt_to_microvolt(reading);
- pr_debug("read = %04x ocv_for_r_microV = %u\n", reading, *result);
+ *result = xoadc_reading_to_microvolt(reading);
+ pr_debug("raw = %04x ocv_for_r_uV = %u\n", reading, *result);
+ *result = adjust_xo_vbatt_reading(chip, *result);
+ pr_debug("after adj ocv_for_r_uV = %u\n", *result);
return 0;
}
@@ -393,8 +565,10 @@
pr_err("fail to read VSENSE_AVG rc = %d\n", rc);
return rc;
}
- *result = cc_to_microvolt(chip, reading);
- pr_debug("read = %04x vsense = %d\n", reading, *result);
+ *result = ccadc_reading_to_microvolt(chip, reading);
+ pr_debug("raw = %04x vsense = %d\n", reading, *result);
+ *result = cc_adjust_for_gain(the_chip, (s64)*result);
+ pr_debug("after adj vsense = %d\n", *result);
return 0;
}
@@ -444,6 +618,11 @@
return interpolate_single_lut(chip->fcc_temp_lut, batt_temp);
}
+static int interpolate_fcc_adjusted(struct pm8921_bms_chip *chip, int batt_temp)
+{
+ return interpolate_single_lut(chip->adjusted_fcc_temp_lut, batt_temp);
+}
+
static int interpolate_scalingfactor_fcc(struct pm8921_bms_chip *chip,
int cycles)
{
@@ -642,14 +821,12 @@
pr_err("fail to read ocv_for_rbatt rc = %d\n", rc);
ocv = 0;
}
- ocv = adjust_xo_reading(chip, ocv);
rc = read_vbatt_for_rbatt(chip, &vbatt);
if (rc) {
pr_err("fail to read vbatt_for_rbatt rc = %d\n", rc);
ocv = 0;
}
- vbatt = adjust_xo_reading(chip, vbatt);
rc = read_vsense_for_rbatt(chip, &vsense);
if (rc) {
@@ -665,6 +842,7 @@
return -EINVAL;
}
r_batt = ((ocv - vbatt) * chip->r_sense) / vsense;
+ last_rbatt = r_batt;
pr_debug("r_batt = %umilliOhms", r_batt);
return r_batt;
}
@@ -674,16 +852,18 @@
{
int initfcc, result, scalefactor = 0;
- initfcc = interpolate_fcc(chip, batt_temp);
- pr_debug("intfcc = %umAh batt_temp = %d\n", initfcc, batt_temp);
+ if (chip->adjusted_fcc_temp_lut == NULL) {
+ initfcc = interpolate_fcc(chip, batt_temp);
- scalefactor = interpolate_scalingfactor_fcc(chip, chargecycles);
- pr_debug("scalefactor = %d batt_temp = %d\n", scalefactor, batt_temp);
+ scalefactor = interpolate_scalingfactor_fcc(chip, chargecycles);
- /* Multiply the initial FCC value by the scale factor. */
- result = (initfcc * scalefactor) / 100;
- pr_debug("fcc mAh = %d\n", result);
- return result;
+ /* Multiply the initial FCC value by the scale factor. */
+ result = (initfcc * scalefactor) / 100;
+ pr_debug("fcc mAh = %d\n", result);
+ return result;
+ } else {
+ return interpolate_fcc_adjusted(chip, batt_temp);
+ }
}
static int get_battery_uvolts(struct pm8921_bms_chip *chip, int *uvolts)
@@ -711,20 +891,18 @@
rc = get_battery_uvolts(chip, &vbatt);
if (rc) {
pr_err("failed to read vbatt from adc rc = %d\n", rc);
- last_ocv_uv = DEFAULT_OCV_MICROVOLTS;
return rc;
}
rc = pm8921_bms_get_battery_current(&ibatt);
if (rc) {
pr_err("failed to read batt current rc = %d\n", rc);
- last_ocv_uv = DEFAULT_OCV_MICROVOLTS;
return rc;
}
rbatt = calculate_rbatt(the_chip);
if (rbatt < 0)
- rbatt = DEFAULT_RBATT_MOHMS;
+ rbatt = (last_rbatt < 0) ? DEFAULT_RBATT_MOHMS : last_rbatt;
*ocv = vbatt + ibatt * rbatt;
return 0;
}
@@ -755,6 +933,7 @@
rc = read_cc(the_chip, coulumb_counter);
cc_voltage_uv = (int64_t)*coulumb_counter;
cc_voltage_uv = cc_to_microvolt(chip, cc_voltage_uv);
+ cc_voltage_uv = cc_adjust_for_gain(chip, cc_voltage_uv);
pr_debug("cc_voltage_uv = %lld microvolts\n", cc_voltage_uv);
cc_uvh = ccmicrovolt_to_uvh(cc_voltage_uv);
pr_debug("cc_uvh = %lld micro_volt_hour\n", cc_uvh);
@@ -771,8 +950,6 @@
if (rbatt < 0) {
rbatt = (last_rbatt < 0) ? DEFAULT_RBATT_MOHMS : last_rbatt;
pr_debug("rbatt unavailable assuming %d\n", rbatt);
- } else {
- last_rbatt = rbatt;
}
/* calculate unusable charge */
@@ -800,9 +977,6 @@
if (ocv == 0) {
ocv = last_ocv_uv;
pr_debug("ocv not available using last_ocv_uv=%d\n", ocv);
- } else {
- /* update the usespace param since a good ocv is available */
- last_ocv_uv = ocv;
}
pc = calculate_pc(chip, ocv, batt_temp, chargecycles);
@@ -941,7 +1115,8 @@
#define HKADC_V_PER_BIT_DIV_FACTOR 10
static int calib_hkadc_convert_microvolt(unsigned int phy)
{
- return phy * HKADC_V_PER_BIT_MUL_FACTOR / HKADC_V_PER_BIT_DIV_FACTOR;
+ return (phy - 0x6000) *
+ HKADC_V_PER_BIT_MUL_FACTOR / HKADC_V_PER_BIT_DIV_FACTOR;
}
static void calib_hkadc(struct pm8921_bms_chip *chip)
@@ -954,10 +1129,10 @@
pr_err("ADC failed for 1.25volts rc = %d\n", rc);
return;
}
- voltage = calib_hkadc_convert_microvolt(result.physical);
+ voltage = calib_hkadc_convert_microvolt(result.adc_code);
- pr_debug("result 1.25v = 0x%llx, voltage = %dmV adc_meas = %lld\n",
- result.physical, voltage, result.measurement);
+ pr_debug("result 1.25v = 0x%x, voltage = %duV adc_meas = %lld\n",
+ result.adc_code, voltage, result.measurement);
/* check for valid range */
if (voltage > XOADC_MAX_1P25V)
@@ -971,9 +1146,9 @@
pr_err("ADC failed for 1.25volts rc = %d\n", rc);
return;
}
- voltage = calib_hkadc_convert_microvolt(result.physical);
- pr_debug("result 0.625V = 0x%llx, voltage = %dmV adc_mead = %lld\n",
- result.physical, voltage, result.measurement);
+ voltage = calib_hkadc_convert_microvolt(result.adc_code);
+ pr_debug("result 0.625V = 0x%x, voltage = %duV adc_mead = %lld\n",
+ result.adc_code, voltage, result.measurement);
/* check for valid range */
if (voltage > XOADC_MAX_0P625V)
voltage = XOADC_MAX_0P625V;
@@ -991,6 +1166,385 @@
calib_hkadc(chip);
}
+#define START_CONV_BIT BIT(7)
+#define EOC_CONV_BIT BIT(6)
+#define SEL_CCADC_BIT BIT(1)
+#define EN_ARB_BIT BIT(0)
+
+#define CCADC_CALIB_DIG_PARAM 0xE3
+#define CCADC_CALIB_RSV_GND 0x40
+#define CCADC_CALIB_RSV_25MV 0x80
+#define CCADC_CALIB_ANA_PARAM 0x1B
+#define SAMPLE_COUNT 16
+#define ADC_WAIT_COUNT 10
+
+#define CCADC_MAX_25MV 30000
+#define CCADC_MIN_25MV 20000
+#define CCADC_MAX_0UV -4000
+#define CCADC_MIN_0UV -7000
+
+#define CCADC_INTRINSIC_OFFSET 0xC000
+
+#define REG_SBI_CONFIG 0x04F
+#define PAGE3_ENABLE_MASK 0x6
+
+static int calib_ccadc_enable_trim_access(struct pm8921_bms_chip *chip,
+ u8 *sbi_config)
+{
+ u8 reg;
+ int rc;
+
+ rc = pm8xxx_readb(chip->dev->parent, REG_SBI_CONFIG, sbi_config);
+ if (rc) {
+ pr_err("error = %d reading sbi config reg\n", rc);
+ return rc;
+ }
+
+ reg = *sbi_config | PAGE3_ENABLE_MASK;
+ return pm8xxx_writeb(chip->dev->parent, REG_SBI_CONFIG, reg);
+}
+
+static int calib_ccadc_restore_trim_access(struct pm8921_bms_chip *chip,
+ u8 sbi_config)
+{
+ return pm8xxx_writeb(chip->dev->parent, REG_SBI_CONFIG, sbi_config);
+}
+
+static int calib_ccadc_enable_arbiter(struct pm8921_bms_chip *chip)
+{
+ int rc;
+
+ /* enable Arbiter, must be sent twice */
+ rc = pm_bms_masked_write(chip, ADC_ARB_SECP_CNTRL,
+ SEL_CCADC_BIT | EN_ARB_BIT, SEL_CCADC_BIT | EN_ARB_BIT);
+ if (rc < 0) {
+ pr_err("error = %d enabling arbiter for offset\n", rc);
+ return rc;
+ }
+ rc = pm_bms_masked_write(chip, ADC_ARB_SECP_CNTRL,
+ SEL_CCADC_BIT | EN_ARB_BIT, SEL_CCADC_BIT | EN_ARB_BIT);
+ if (rc < 0) {
+ pr_err("error = %d writing ADC_ARB_SECP_CNTRL\n", rc);
+ return rc;
+ }
+ return 0;
+}
+
+static int calib_start_conv(struct pm8921_bms_chip *chip,
+ u16 *result)
+{
+ int rc, i;
+ u8 data_msb, data_lsb, reg;
+
+ /* Start conversion */
+ rc = pm_bms_masked_write(chip, ADC_ARB_SECP_CNTRL,
+ START_CONV_BIT, START_CONV_BIT);
+ if (rc < 0) {
+ pr_err("error = %d starting offset meas\n", rc);
+ return rc;
+ }
+
+ /* Wait for End of conversion */
+ for (i = 0; i < ADC_WAIT_COUNT; i++) {
+ rc = pm8xxx_readb(chip->dev->parent,
+ ADC_ARB_SECP_CNTRL, ®);
+ if (rc < 0) {
+ pr_err("error = %d read eoc for offset\n", rc);
+ return rc;
+ }
+ if ((reg & (START_CONV_BIT | EOC_CONV_BIT)) != EOC_CONV_BIT)
+ msleep(60);
+ else
+ break;
+ }
+ if (i == ADC_WAIT_COUNT) {
+ pr_err("waited too long for offset eoc\n");
+ return rc;
+ }
+
+ rc = pm8xxx_readb(chip->dev->parent, ADC_ARB_SECP_DATA0, &data_lsb);
+ if (rc < 0) {
+ pr_err("error = %d reading offset lsb\n", rc);
+ return rc;
+ }
+
+ rc = pm8xxx_readb(chip->dev->parent, ADC_ARB_SECP_DATA1, &data_msb);
+ if (rc < 0) {
+ pr_err("error = %d reading offset msb\n", rc);
+ return rc;
+ }
+
+ *result = (data_msb << 8) | data_lsb;
+ return 0;
+}
+
+static int calib_ccadc_read_trim(struct pm8921_bms_chip *chip,
+ int addr, u8 *data_msb, u8 *data_lsb)
+{
+ int rc;
+ u8 sbi_config;
+
+ calib_ccadc_enable_trim_access(chip, &sbi_config);
+ rc = pm8xxx_readb(chip->dev->parent, addr, data_msb);
+ if (rc < 0) {
+ pr_err("error = %d read msb\n", rc);
+ return rc;
+ }
+ rc = pm8xxx_readb(chip->dev->parent, addr + 1, data_lsb);
+ if (rc < 0) {
+ pr_err("error = %d read lsb\n", rc);
+ return rc;
+ }
+ calib_ccadc_restore_trim_access(chip, sbi_config);
+ return 0;
+}
+
+static int calib_ccadc_read_gain_uv(struct pm8921_bms_chip *chip)
+{
+ s8 data_msb;
+ u8 data_lsb;
+ int rc, gain, offset;
+
+ rc = calib_ccadc_read_trim(chip, CCADC_FULLSCALE_TRIM1,
+ &data_msb, &data_lsb);
+ gain = (data_msb << 8) | data_lsb;
+
+ rc = calib_ccadc_read_trim(chip, CCADC_OFFSET_TRIM1,
+ &data_msb, &data_lsb);
+ offset = (data_msb << 8) | data_lsb;
+
+ pr_debug("raw gain trim = 0x%x offset trim =0x%x\n", gain, offset);
+ gain = ccadc_reading_to_microvolt(chip, (s64)gain - offset);
+ return gain;
+}
+
+#define CCADC_PROGRAM_TRIM_COUNT 10
+#define ADC_ARB_BMS_CNTRL_CCADC_SHIFT 4
+#define ADC_ARB_BMS_CNTRL_CONV_MASK 0x03
+#define BMS_CONV_IN_PROGRESS 0x2
+
+static int calib_ccadc_program_trim(struct pm8921_bms_chip *chip,
+ int addr, u8 data_msb, u8 data_lsb)
+{
+ int rc, i;
+ u8 cntrl, sbi_config;
+ bool in_progress;
+
+ calib_ccadc_enable_trim_access(chip, &sbi_config);
+
+ for (i = 0; i < CCADC_PROGRAM_TRIM_COUNT; i++) {
+ rc = pm8xxx_readb(chip->dev->parent, ADC_ARB_BMS_CNTRL, &cntrl);
+ if (rc < 0) {
+ pr_err("error = %d reading ADC_ARB_BMS_CNTRL\n", rc);
+ return rc;
+ }
+
+ /* break if a ccadc conversion is not happening */
+ in_progress = (((cntrl >> ADC_ARB_BMS_CNTRL_CCADC_SHIFT)
+ & ADC_ARB_BMS_CNTRL_CONV_MASK) == BMS_CONV_IN_PROGRESS);
+
+ if (!in_progress)
+ break;
+ }
+
+ if (in_progress) {
+ pr_err("conv in progress cannot write trim,returing EBUSY\n");
+ return -EBUSY;
+ }
+
+ rc = pm8xxx_writeb(chip->dev->parent, addr, data_msb);
+ if (rc < 0) {
+ pr_err("error = %d write msb = 0x%x\n", rc, data_msb);
+ return rc;
+ }
+ rc = pm8xxx_writeb(chip->dev->parent, addr + 1, data_lsb);
+ if (rc < 0) {
+ pr_err("error = %d write lsb = 0x%x\n", rc, data_lsb);
+ return rc;
+ }
+ calib_ccadc_restore_trim_access(chip, sbi_config);
+ return 0;
+}
+
+static void calib_ccadc(struct pm8921_bms_chip *chip)
+{
+ u8 data_msb, data_lsb, sec_cntrl;
+ int result_offset, voltage_offset, result_gain;
+ u16 result;
+ int i, rc;
+
+ rc = pm8xxx_readb(chip->dev->parent, ADC_ARB_SECP_CNTRL, &sec_cntrl);
+ if (rc < 0) {
+ pr_err("error = %d reading ADC_ARB_SECP_CNTRL\n", rc);
+ return;
+ }
+
+ rc = calib_ccadc_enable_arbiter(chip);
+ if (rc < 0) {
+ pr_err("error = %d enabling arbiter for offset\n", rc);
+ goto bail;
+ }
+
+ /*
+ * Set decimation ratio to 4k, lower ratio may be used in order to speed
+ * up, pending verification through bench
+ */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_DIG_PARAM,
+ CCADC_CALIB_DIG_PARAM);
+ if (rc < 0) {
+ pr_err("error = %d writing ADC_ARB_SECP_DIG_PARAM\n", rc);
+ goto bail;
+ }
+
+ result_offset = 0;
+ for (i = 0; i < SAMPLE_COUNT; i++) {
+ /* Short analog inputs to CCADC internally to ground */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_RSV,
+ CCADC_CALIB_RSV_GND);
+ if (rc < 0) {
+ pr_err("error = %d selecting gnd voltage\n", rc);
+ goto bail;
+ }
+
+ /* Enable CCADC */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_ANA_PARAM,
+ CCADC_CALIB_ANA_PARAM);
+ if (rc < 0) {
+ pr_err("error = %d enabling ccadc\n", rc);
+ goto bail;
+ }
+
+ rc = calib_start_conv(chip, &result);
+ if (rc < 0) {
+ pr_err("error = %d for zero volt measurement\n", rc);
+ goto bail;
+ }
+
+ result_offset += result;
+ }
+
+ result_offset = result_offset / SAMPLE_COUNT;
+
+ voltage_offset = ccadc_reading_to_microvolt(chip,
+ ((s64)result_offset - CCADC_INTRINSIC_OFFSET));
+
+ pr_err("offset result_offset = 0x%x, voltage = %d microVolts\n",
+ result_offset, voltage_offset);
+
+ /* Sanity Check */
+ if (voltage_offset > CCADC_MAX_0UV) {
+ pr_err("offset voltage = %d is huge limiting to %d\n",
+ voltage_offset, CCADC_MAX_0UV);
+ result_offset = CCADC_INTRINSIC_OFFSET
+ + microvolt_to_ccadc_reading(chip, (s64)CCADC_MAX_0UV);
+ } else if (voltage_offset < CCADC_MIN_0UV) {
+ pr_err("offset voltage = %d is too low limiting to %d\n",
+ voltage_offset, CCADC_MIN_0UV);
+ result_offset = CCADC_INTRINSIC_OFFSET
+ + microvolt_to_ccadc_reading(chip, (s64)CCADC_MIN_0UV);
+ }
+
+ data_msb = result_offset >> 8;
+ data_lsb = result_offset;
+
+ rc = calib_ccadc_program_trim(chip, CCADC_OFFSET_TRIM1,
+ data_msb, data_lsb);
+ if (rc) {
+ pr_err("error = %d programming offset trim\n", rc);
+ goto bail;
+ }
+
+ rc = calib_ccadc_enable_arbiter(chip);
+ if (rc < 0) {
+ pr_err("error = %d enabling arbiter for gain\n", rc);
+ goto bail;
+ }
+
+ /*
+ * Set decimation ratio to 4k, lower ratio may be used in order to speed
+ * up, pending verification through bench
+ */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_DIG_PARAM,
+ CCADC_CALIB_DIG_PARAM);
+ if (rc < 0) {
+ pr_err("error = %d enabling decimation ration for gain\n", rc);
+ goto bail;
+ }
+
+ result_gain = 0;
+ for (i = 0; i < SAMPLE_COUNT; i++) {
+ rc = pm8xxx_writeb(chip->dev->parent,
+ ADC_ARB_SECP_RSV, CCADC_CALIB_RSV_25MV);
+ if (rc < 0) {
+ pr_err("error = %d selecting 25mV for gain\n", rc);
+ goto bail;
+ }
+
+ /* Enable CCADC */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_ANA_PARAM,
+ CCADC_CALIB_ANA_PARAM);
+ if (rc < 0) {
+ pr_err("error = %d enabling ccadc\n", rc);
+ goto bail;
+ }
+
+ rc = calib_start_conv(chip, &result);
+ if (rc < 0) {
+ pr_err("error = %d for adc reading 25mV\n", rc);
+ goto bail;
+ }
+
+ result_gain += result;
+ }
+ result_gain = result_gain / SAMPLE_COUNT;
+
+ /*
+ * result_offset includes INTRINSIC OFFSET
+ * chip->ccadc_gain_uv will be the actual voltage
+ * measured for 25000UV
+ */
+ chip->ccadc_gain_uv = ccadc_reading_to_microvolt(chip,
+ ((s64)result_gain - result_offset));
+
+ pr_debug("gain result_gain = 0x%x, voltage = %d microVolts\n",
+ result_gain,
+ chip->ccadc_gain_uv);
+ /* Sanity Check */
+ if (chip->ccadc_gain_uv > CCADC_MAX_25MV) {
+ pr_err("gain voltage = %d is huge limiting to %d\n",
+ chip->ccadc_gain_uv, CCADC_MAX_25MV);
+ chip->ccadc_gain_uv = CCADC_MAX_25MV;
+ result_gain = result_offset +
+ microvolt_to_ccadc_reading(chip, CCADC_MAX_25MV);
+ } else if (chip->ccadc_gain_uv < CCADC_MIN_25MV) {
+ pr_err("gain voltage = %d is too low limiting to %d\n",
+ chip->ccadc_gain_uv, CCADC_MIN_25MV);
+ chip->ccadc_gain_uv = CCADC_MIN_25MV;
+ result_gain = result_offset +
+ microvolt_to_ccadc_reading(chip, CCADC_MIN_25MV);
+ }
+
+ data_msb = result_gain >> 8;
+ data_lsb = result_gain;
+ rc = calib_ccadc_program_trim(chip, CCADC_FULLSCALE_TRIM1,
+ data_msb, data_lsb);
+ if (rc)
+ pr_err("error = %d programming gain trim\n", rc);
+bail:
+ pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_CNTRL, sec_cntrl);
+}
+
+static void calibrate_ccadc_work(struct work_struct *work)
+{
+ struct pm8921_bms_chip *chip = container_of(work,
+ struct pm8921_bms_chip, calib_ccadc_work.work);
+
+ calib_ccadc(chip);
+ schedule_delayed_work(&chip->calib_ccadc_work,
+ round_jiffies_relative(msecs_to_jiffies
+ (chip->calib_delay_ms)));
+}
+
int pm8921_bms_get_vsense_avg(int *result)
{
int rc = -EINVAL;
@@ -1012,6 +1566,7 @@
int pm8921_bms_get_battery_current(int *result)
{
unsigned long flags;
+ int vsense;
if (!the_chip) {
pr_err("called before initialization\n");
@@ -1024,12 +1579,13 @@
spin_lock_irqsave(&the_chip->bms_output_lock, flags);
pm_bms_lock_output_data(the_chip);
- read_vsense_avg(the_chip, result);
+ read_vsense_avg(the_chip, &vsense);
pm_bms_unlock_output_data(the_chip);
spin_unlock_irqrestore(&the_chip->bms_output_lock, flags);
- pr_debug("vsense=%d\n", *result);
+ pr_debug("vsense=%d\n", vsense);
/* cast for signed division */
- *result = *result / (int)the_chip->r_sense;
+ *result = vsense / (int)the_chip->r_sense;
+
return 0;
}
EXPORT_SYMBOL(pm8921_bms_get_battery_current);
@@ -1107,6 +1663,8 @@
batt_temp = (int)result.physical;
last_real_fcc = calculate_real_fcc(the_chip,
batt_temp, last_chargecycles);
+ last_real_fcc_batt_temp = batt_temp;
+ readjust_fcc_table();
}
charge_cycle_calculation:
@@ -1272,13 +1830,19 @@
int ocv, rc;
/*
- * Check if a last_good_ocv is available,
- * if not compute it here at boot time.
+ * Check if a ocv is available in bms hw,
+ * if not compute it here at boot time and save it
+ * in the last_ocv_uv.
*/
+ ocv = 0;
rc = read_last_good_ocv(chip, &ocv);
if (rc || ocv == 0) {
- rc = adc_based_ocv(chip, &last_ocv_uv);
- pr_err("failed to read ocv from adc and bms rc = %d\n", rc);
+ rc = adc_based_ocv(chip, &ocv);
+ if (rc) {
+ pr_err("failed to read adc based ocv rc = %d\n", rc);
+ ocv = DEFAULT_OCV_MICROVOLTS;
+ }
+ last_ocv_uv = ocv;
}
pr_debug("ocv = %d last_ocv_uv = %d\n", ocv, last_ocv_uv);
}
@@ -1336,6 +1900,7 @@
CALC_PC,
CALC_SOC,
CALIB_HKADC,
+ CALIB_CCADC,
};
static int test_batt_temp = 5;
@@ -1411,6 +1976,11 @@
*val = 0;
calib_hkadc(the_chip);
break;
+ case CALIB_CCADC:
+ /* reading this will trigger calibration */
+ *val = 0;
+ calib_ccadc(the_chip);
+ break;
default:
ret = -EINVAL;
}
@@ -1562,6 +2132,8 @@
(void *)CALC_SOC, &calc_fops);
debugfs_create_file("calib_hkadc", 0644, chip->dent,
(void *)CALIB_HKADC, &calc_fops);
+ debugfs_create_file("calib_ccadc", 0644, chip->dent,
+ (void *)CALIB_CCADC, &calc_fops);
for (i = 0; i < ARRAY_SIZE(bms_irq_data); i++) {
if (chip->pmic_bms_irq[bms_irq_data[i].irq_id])
@@ -1575,9 +2147,11 @@
static int __devinit pm8921_bms_probe(struct platform_device *pdev)
{
int rc = 0;
+ int vbatt;
struct pm8921_bms_chip *chip;
const struct pm8921_bms_platform_data *pdata
= pdev->dev.platform_data;
+
if (!pdata) {
pr_err("missing platform data\n");
return -EINVAL;
@@ -1608,32 +2182,44 @@
chip->revision = pm8xxx_get_revision(chip->dev->parent);
INIT_WORK(&chip->calib_hkadc_work, calibrate_hkadc_work);
- rc = pm8921_bms_hw_init(chip);
- if (rc) {
- pr_err("couldn't init hardware rc = %d\n", rc);
- goto free_chip;
- }
-
rc = request_irqs(chip, pdev);
if (rc) {
pr_err("couldn't register interrupts rc = %d\n", rc);
goto free_chip;
}
+ rc = pm8921_bms_hw_init(chip);
+ if (rc) {
+ pr_err("couldn't init hardware rc = %d\n", rc);
+ goto free_irqs;
+ }
+
platform_set_drvdata(pdev, chip);
the_chip = chip;
create_debugfs_entries(chip);
check_initial_ocv(chip);
+ chip->ccadc_gain_uv = calib_ccadc_read_gain_uv(chip);
+ INIT_DELAYED_WORK(&chip->calib_ccadc_work, calibrate_ccadc_work);
+ /* begin calibration only on chips > 2.0 */
+ if (chip->revision >= PM8XXX_REVISION_8921_2p0)
+ calibrate_ccadc_work(&(chip->calib_ccadc_work.work));
+
+ /* initial hkadc calibration */
+ schedule_work(&chip->calib_hkadc_work);
/* enable the vbatt reading interrupts for scheduling hkadc calib */
pm8921_bms_enable_irq(chip, PM8921_BMS_GOOD_OCV);
pm8921_bms_enable_irq(chip, PM8921_BMS_OCV_FOR_R);
- pr_info("OK battery_capacity_at_boot=%d\n",
- pm8921_bms_get_percent_charge());
+ get_battery_uvolts(chip, &vbatt);
+ pr_info("OK battery_capacity_at_boot=%d volt = %d ocv = %d\n",
+ pm8921_bms_get_percent_charge(),
+ vbatt, last_ocv_uv);
return 0;
+free_irqs:
+ free_irqs(chip);
free_chip:
kfree(chip);
return rc;
@@ -1644,6 +2230,7 @@
struct pm8921_bms_chip *chip = platform_get_drvdata(pdev);
free_irqs(chip);
+ kfree(chip->adjusted_fcc_temp_lut);
platform_set_drvdata(pdev, NULL);
the_chip = NULL;
kfree(chip);
diff --git a/drivers/slimbus/slim-msm-ctrl.c b/drivers/slimbus/slim-msm-ctrl.c
index 937bfe7..4a2ad3f 100644
--- a/drivers/slimbus/slim-msm-ctrl.c
+++ b/drivers/slimbus/slim-msm-ctrl.c
@@ -82,6 +82,7 @@
#define QC_DEVID_SAT1 0x3
#define QC_DEVID_SAT2 0x4
#define QC_DEVID_PGD 0x5
+#define QC_MSM_DEVS 5
/* Component registers */
enum comp_reg {
@@ -239,6 +240,7 @@
bool reconf_busy;
bool chan_active;
enum msm_ctrl_state state;
+ int numdevs;
};
struct msm_slim_sat {
@@ -671,7 +673,9 @@
* use their own slots
* This "get" votes for messaging bandwidth
*/
- if (dev->state != MSM_CTRL_SLEEPING)
+ if (txn->mc < SLIM_MSG_MC_BEGIN_RECONFIGURATION ||
+ txn->mc > SLIM_MSG_MC_RECONFIGURE_NOW ||
+ dev->state != MSM_CTRL_SLEEPING)
pm_runtime_get_sync(dev->dev);
mutex_lock(&dev->tx_lock);
if (dev->state == MSM_CTRL_ASLEEP) {
@@ -690,8 +694,7 @@
if (dev->ctrl.sched.usedslots != 0 &&
!dev->chan_active) {
dev->chan_active = true;
- if (dev->state != MSM_CTRL_SLEEPING)
- pm_runtime_get(dev->dev);
+ pm_runtime_get(dev->dev);
}
}
txn->rl--;
@@ -701,7 +704,9 @@
if (txn->dt == SLIM_MSG_DEST_ENUMADDR) {
mutex_unlock(&dev->tx_lock);
- if (dev->state != MSM_CTRL_SLEEPING)
+ if (txn->mc < SLIM_MSG_MC_BEGIN_RECONFIGURATION ||
+ txn->mc > SLIM_MSG_MC_RECONFIGURE_NOW ||
+ dev->state != MSM_CTRL_SLEEPING)
pm_runtime_put(dev->dev);
return -EPROTONOSUPPORT;
}
@@ -774,11 +779,26 @@
txn->mc == SLIM_MSG_MC_RECONFIGURE_NOW &&
txn->mt == SLIM_MSG_MT_CORE && timeout) {
timeout = wait_for_completion_timeout(&dev->reconf, HZ);
- if (timeout)
- dev->reconf_busy = false;
+ dev->reconf_busy = false;
+ if (timeout) {
+ clk_disable(dev->rclk);
+ disable_irq(dev->irq);
+ dev->state = MSM_CTRL_ASLEEP;
+ }
}
+ if (!timeout && dev->state == MSM_CTRL_SLEEPING &&
+ txn->mc >= SLIM_MSG_MC_BEGIN_RECONFIGURATION &&
+ txn->mc <= SLIM_MSG_MC_RECONFIGURE_NOW &&
+ txn->mt == SLIM_MSG_MT_CORE) {
+ dev->reconf_busy = false;
+ dev->state = MSM_CTRL_AWAKE;
+ dev_err(dev->dev, "clock pause failed");
+ mutex_unlock(&dev->tx_lock);
+ return -ETIMEDOUT;
+ }
+
mutex_unlock(&dev->tx_lock);
- if (!txn->rbuf && dev->state != MSM_CTRL_SLEEPING)
+ if (!txn->rbuf && dev->state == MSM_CTRL_AWAKE)
pm_runtime_put(dev->dev);
if (!timeout)
@@ -829,6 +849,7 @@
* we get the message
*/
usleep_range(5000, 5000);
+ dev->state = MSM_CTRL_AWAKE;
return 0;
}
@@ -965,7 +986,6 @@
u8 e_addr[6];
for (i = 0; i < 6; i++)
e_addr[i] = buf[7-i];
- pm_runtime_get_sync(dev->dev);
ret = slim_assign_laddr(&dev->ctrl, e_addr, 6, &laddr);
/* Is this Qualcomm ported generic device? */
@@ -974,7 +994,9 @@
e_addr[1] == QC_DEVID_PGD &&
e_addr[2] != QC_CHIPID_SL)
dev->pgdla = laddr;
- pm_runtime_put(dev->dev);
+ dev->numdevs++;
+ if (!ret && dev->numdevs == QC_MSM_DEVS)
+ pm_runtime_enable(dev->dev);
} else if (mc == SLIM_MSG_MC_REPLY_INFORMATION ||
mc == SLIM_MSG_MC_REPLY_VALUE) {
@@ -1772,7 +1794,6 @@
pm_runtime_use_autosuspend(&pdev->dev);
pm_runtime_set_autosuspend_delay(&pdev->dev, MSM_SLIM_AUTOSUSPEND);
pm_runtime_set_active(&pdev->dev);
- pm_runtime_enable(&pdev->dev);
dev_dbg(dev->dev, "MSM SB controller is up!\n");
return 0;
@@ -1853,36 +1874,23 @@
{
struct platform_device *pdev = to_platform_device(device);
struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
- int ret;
dev_dbg(device, "pm_runtime: suspending...\n");
dev->state = MSM_CTRL_SLEEPING;
- ret = slim_ctrl_clk_pause(&dev->ctrl, false, SLIM_CLK_UNSPECIFIED);
- /* Make sure clock pause goes through */
- if (!ret) {
- clk_disable(dev->rclk);
- disable_irq(dev->irq);
- dev->state = MSM_CTRL_ASLEEP;
- } else
- dev->state = MSM_CTRL_AWAKE;
- return ret;
+ return slim_ctrl_clk_pause(&dev->ctrl, false, SLIM_CLK_UNSPECIFIED);
}
static int msm_slim_runtime_resume(struct device *device)
{
struct platform_device *pdev = to_platform_device(device);
struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
- int ret = 0;
dev_dbg(device, "pm_runtime: resuming...\n");
mutex_lock(&dev->tx_lock);
if (dev->state == MSM_CTRL_ASLEEP) {
mutex_unlock(&dev->tx_lock);
- ret = slim_ctrl_clk_pause(&dev->ctrl, true, 0);
- if (!ret)
- dev->state = MSM_CTRL_AWAKE;
- return ret;
+ return slim_ctrl_clk_pause(&dev->ctrl, true, 0);
}
mutex_unlock(&dev->tx_lock);
- return ret;
+ return 0;
}
#ifdef CONFIG_PM_SLEEP
diff --git a/drivers/slimbus/slimbus.c b/drivers/slimbus/slimbus.c
index 3b79129..bb30570 100644
--- a/drivers/slimbus/slimbus.c
+++ b/drivers/slimbus/slimbus.c
@@ -892,10 +892,6 @@
cur = slim_slicecodefromsize(sl);
ec = ((sl | (1 << 3)) | ((msg->start_offset & 0xFFF) << 4));
- ret = slim_ctrl_clk_pause(ctrl, true, 0);
- if (ret)
- return ret;
-
if (wbuf)
mlen += len;
if (rbuf) {
@@ -1127,10 +1123,6 @@
u8 chan = (u8)(chanh & 0xFF);
struct slim_ich *slc = &ctrl->chans[chan];
- ret = slim_ctrl_clk_pause(ctrl, true, 0);
- if (ret)
- return ret;
-
mutex_lock(&ctrl->m_ctrl);
/* Make sure the channel is not already pending reconf. or active */
if (slc->state >= SLIM_CH_PENDING_ACTIVE) {
@@ -1193,11 +1185,8 @@
int slim_disconnect_ports(struct slim_device *sb, u32 *ph, int nph)
{
struct slim_controller *ctrl = sb->ctrl;
- int i, ret;
+ int i;
- ret = slim_ctrl_clk_pause(ctrl, true, 0);
- if (ret)
- return ret;
mutex_lock(&ctrl->m_ctrl);
for (i = 0; i < nph; i++)
@@ -2389,10 +2378,6 @@
u32 segdist;
struct slim_pending_ch *pch;
- ret = slim_ctrl_clk_pause(ctrl, true, 0);
- if (ret)
- return ret;
-
mutex_lock(&ctrl->sched.m_reconf);
mutex_lock(&ctrl->m_ctrl);
ctrl->sched.pending_msgsl += sb->pending_msgsl - sb->cur_msgsl;
diff --git a/drivers/thermal/msm8960_tsens.c b/drivers/thermal/msm8960_tsens.c
index 12b3a42e..742bae5 100644
--- a/drivers/thermal/msm8960_tsens.c
+++ b/drivers/thermal/msm8960_tsens.c
@@ -722,7 +722,7 @@
static int tsens_calib_sensors(void)
{
- int rc;
+ int rc = -ENODEV;
if (tmdev->hw_type == MSM_8660)
rc = tsens_calib_sensors8660();
diff --git a/drivers/usb/gadget/ci13xxx_udc.c b/drivers/usb/gadget/ci13xxx_udc.c
index 7dc7377..11bfe9f 100644
--- a/drivers/usb/gadget/ci13xxx_udc.c
+++ b/drivers/usb/gadget/ci13xxx_udc.c
@@ -1857,6 +1857,11 @@
dbg_event(0xFF, "BUS RST", 0);
spin_unlock(udc->lock);
+
+ /*stop charging upon reset */
+ if (udc->transceiver)
+ otg_set_power(udc->transceiver, 0);
+
retval = _gadget_stop_activity(&udc->gadget);
if (retval)
goto done;
diff --git a/drivers/usb/gadget/f_rmnet.c b/drivers/usb/gadget/f_rmnet.c
index 69f158a..6f0fb07 100644
--- a/drivers/usb/gadget/f_rmnet.c
+++ b/drivers/usb/gadget/f_rmnet.c
@@ -444,7 +444,7 @@
event->wIndex = cpu_to_le16(dev->ifc_id);
event->wLength = cpu_to_le16(0);
- status = usb_ep_queue(dev->notify, dev->notify_req, GFP_KERNEL);
+ status = usb_ep_queue(dev->notify, dev->notify_req, GFP_ATOMIC);
if (status < 0) {
if (!atomic_read(&dev->online))
return;
@@ -789,8 +789,12 @@
spin_lock_irqsave(&dev->lock, flags);
dev->cdev = c->cdev;
f = &dev->port.func;
- f->name = kasprintf(GFP_KERNEL, "rmnet%d", portno);
+ f->name = kasprintf(GFP_ATOMIC, "rmnet%d", portno);
spin_unlock_irqrestore(&dev->lock, flags);
+ if (!f->name) {
+ pr_err("%s: cannot allocate memory for name\n", __func__);
+ return -ENOMEM;
+ }
f->strings = rmnet_strings;
f->bind = frmnet_bind;
diff --git a/drivers/usb/misc/Kconfig b/drivers/usb/misc/Kconfig
index 1135806..98e57d5 100644
--- a/drivers/usb/misc/Kconfig
+++ b/drivers/usb/misc/Kconfig
@@ -283,7 +283,7 @@
config USB_QCOM_DUN_BRIDGE
tristate "USB Qualcomm modem DUN bridge driver"
- depends on USB && !USB_SERIAL_QUALCOMM
+ depends on USB
help
Say Y here if you have a Qualcomm modem device connected via USB that
will be bridged in kernel space. This driver will enable bridging
diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c
index 54a9dab..9788db4 100644
--- a/drivers/usb/serial/qcserial.c
+++ b/drivers/usb/serial/qcserial.c
@@ -39,7 +39,6 @@
{USB_DEVICE(0x19d2, 0xfff3)}, /* ONDA Gobi Modem device */
{USB_DEVICE(0x19d2, 0xfff2)}, /* ONDA Gobi QDL device */
{USB_DEVICE(0x1557, 0x0a80)}, /* OQO Gobi QDL device */
- {USB_DEVICE(0x05c6, 0x9001)}, /* Generic Gobi Modem device */
{USB_DEVICE(0x05c6, 0x9002)}, /* Generic Gobi Modem device */
{USB_DEVICE(0x05c6, 0x9202)}, /* Generic Gobi Modem device */
{USB_DEVICE(0x05c6, 0x9203)}, /* Generic Gobi Modem device */
diff --git a/drivers/video/msm/hdmi_msm.c b/drivers/video/msm/hdmi_msm.c
index 63c2147..9805b6c 100644
--- a/drivers/video/msm/hdmi_msm.c
+++ b/drivers/video/msm/hdmi_msm.c
@@ -1231,8 +1231,12 @@
* Configure the Threshold */
HDMI_OUTP_ND(0x0220, (10 << 16) | (2 << 0));
- /* 0x0224 HDMI_DDC_SETUP */
- HDMI_OUTP_ND(0x0224, 0);
+ /*
+ * 0x0224 HDMI_DDC_SETUP
+ * Setting 31:24 bits : Time units to wait before timeout
+ * when clock is being stalled by external sink device
+ */
+ HDMI_OUTP_ND(0x0224, 0xff000000);
/* 0x027C HDMI_DDC_REF
[6] REFTIMER_ENABLE Enable the timer
diff --git a/drivers/video/msm/msm_fb.c b/drivers/video/msm/msm_fb.c
index b3d5573..d21910b 100644
--- a/drivers/video/msm/msm_fb.c
+++ b/drivers/video/msm/msm_fb.c
@@ -2936,6 +2936,9 @@
break;
case MSMFB_HISTOGRAM:
+ if (!mfd->panel_power_on)
+ return -EPERM;
+
if (!mfd->do_histogram)
return -ENODEV;
diff --git a/include/linux/ion.h b/include/linux/ion.h
index ece819d..9f220f8 100644
--- a/include/linux/ion.h
+++ b/include/linux/ion.h
@@ -57,11 +57,14 @@
ION_HEAP_SYSTEM_CONTIG_ID,
ION_HEAP_EBI_ID,
ION_HEAP_SMI_ID,
+ ION_HEAP_ADSP_ID,
+ ION_HEAP_AUDIO_ID,
};
#define ION_KMALLOC_HEAP_NAME "kmalloc"
#define ION_VMALLOC_HEAP_NAME "vmalloc"
#define ION_EBI1_HEAP_NAME "EBI1"
+#define ION_ADSP_HEAP_NAME "adsp"
#define CACHED 1
#define UNCACHED 0
@@ -73,6 +76,7 @@
#define ION_IS_CACHED(__flags) ((__flags) & (1 << ION_CACHE_SHIFT))
#ifdef __KERNEL__
+#include <linux/err.h>
#include <mach/ion.h>
struct ion_device;
struct ion_heap;
@@ -118,6 +122,8 @@
struct ion_platform_heap heaps[];
};
+#ifdef CONFIG_ION
+
/**
* ion_client_create() - allocate a client and returns it
* @dev: the global ion device
@@ -269,6 +275,93 @@
* the handle to use to refer to it further.
*/
struct ion_handle *ion_import_fd(struct ion_client *client, int fd);
+
+/**
+ * ion_handle_get_flags - get the flags for a given handle
+ *
+ * @client - client who allocated the handle
+ * @handle - handle to get the flags
+ * @flags - pointer to store the flags
+ *
+ * Gets the current flags for a handle. These flags indicate various options
+ * of the buffer (caching, security, etc.)
+ */
+int ion_handle_get_flags(struct ion_client *client, struct ion_handle *handle,
+ unsigned long *flags);
+
+#else
+static inline struct ion_client *ion_client_create(struct ion_device *dev,
+ unsigned int heap_mask, const char *name)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline struct ion_client *msm_ion_client_create(unsigned int heap_mask,
+ const char *name)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline void ion_client_destroy(struct ion_client *client) { }
+
+static inline struct ion_handle *ion_alloc(struct ion_client *client,
+ size_t len, size_t align, unsigned int flags)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline void ion_free(struct ion_client *client,
+ struct ion_handle *handle) { }
+
+
+static inline int ion_phys(struct ion_client *client,
+ struct ion_handle *handle, ion_phys_addr_t *addr, size_t *len)
+{
+ return -ENODEV;
+}
+
+static inline void *ion_map_kernel(struct ion_client *client,
+ struct ion_handle *handle, unsigned long flags)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline void ion_unmap_kernel(struct ion_client *client,
+ struct ion_handle *handle) { }
+
+static inline struct scatterlist *ion_map_dma(struct ion_client *client,
+ struct ion_handle *handle, unsigned long flags)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline void ion_unmap_dma(struct ion_client *client,
+ struct ion_handle *handle) { }
+
+static inline struct ion_buffer *ion_share(struct ion_client *client,
+ struct ion_handle *handle)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline struct ion_handle *ion_import(struct ion_client *client,
+ struct ion_buffer *buffer)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline struct ion_handle *ion_import_fd(struct ion_client *client,
+ int fd)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline int ion_handle_get_flags(struct ion_client *client,
+ struct ion_handle *handle, unsigned long *flags)
+{
+ return -ENODEV;
+}
+#endif /* CONFIG_ION */
#endif /* __KERNEL__ */
/**
@@ -350,6 +443,20 @@
unsigned int offset;
unsigned int length;
};
+
+/* struct ion_flag_data - information about flags for this buffer
+ *
+ * @handle: handle to get flags from
+ * @flags: flags of this handle
+ *
+ * Takes handle as an input and outputs the flags from the handle
+ * in the flag field.
+ */
+struct ion_flag_data {
+ struct ion_handle *handle;
+ unsigned long flags;
+};
+
#define ION_IOC_MAGIC 'I'
/**
@@ -428,4 +535,13 @@
*/
#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MAGIC, 9, \
struct ion_flush_data)
+
+/**
+ * DOC: ION_IOC_GET_FLAGS - get the flags of the handle
+ *
+ * Gets the flags of the current handle which indicate cachability,
+ * secure state etc.
+ */
+#define ION_IOC_GET_FLAGS _IOWR(ION_IOC_MAGIC, 10, \
+ struct ion_flag_data)
#endif /* _LINUX_ION_H */
diff --git a/include/linux/mfd/pm8xxx/misc.h b/include/linux/mfd/pm8xxx/misc.h
index 17ec31b..2374d11 100644
--- a/include/linux/mfd/pm8xxx/misc.h
+++ b/include/linux/mfd/pm8xxx/misc.h
@@ -28,6 +28,13 @@
int priority;
};
+enum pm8xxx_uart_path_sel {
+ UART_NONE,
+ UART_TX1_RX1,
+ UART_TX2_RX2,
+ UART_TX3_RX3,
+};
+
#if defined(CONFIG_MFD_PM8XXX_MISC) || defined(CONFIG_MFD_PM8XXX_MISC_MODULE)
/**
@@ -39,6 +46,8 @@
*/
int pm8xxx_reset_pwr_off(int reset);
+int pm8xxx_uart_gpio_mux_ctrl(enum pm8xxx_uart_path_sel uart_path_sel);
+
#else
static inline int pm8xxx_reset_pwr_off(int reset)
@@ -46,6 +55,12 @@
return -ENODEV;
}
+static inline int
+pm8xxx_uart_gpio_mux_ctrl(enum pm8xxx_uart_path_sel uart_path_sel)
+{
+ return -ENODEV;
+}
+
#endif
#endif
diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h
index 0097136..b43a097 100644
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
@@ -379,9 +379,18 @@
extern struct usb_hcd *usb_get_hcd(struct usb_hcd *hcd);
extern void usb_put_hcd(struct usb_hcd *hcd);
extern int usb_hcd_is_primary_hcd(struct usb_hcd *hcd);
+#ifdef CONFIG_USB
extern int usb_add_hcd(struct usb_hcd *hcd,
unsigned int irqnum, unsigned long irqflags);
extern void usb_remove_hcd(struct usb_hcd *hcd);
+#else
+static inline int
+usb_add_hcd(struct usb_hcd *hcd, unsigned int irqnum, unsigned long irqflags)
+{
+ return 0;
+}
+static inline void usb_remove_hcd(struct usb_hcd *hcd) {}
+#endif
struct platform_device;
extern void usb_hcd_platform_shutdown(struct platform_device *dev);
diff --git a/include/media/msm_camera.h b/include/media/msm_camera.h
index 1ebbf88..327aee4 100644
--- a/include/media/msm_camera.h
+++ b/include/media/msm_camera.h
@@ -726,6 +726,89 @@
#define CAMERA_EFFECT_NEON 11
#define CAMERA_EFFECT_MAX 12
+/* QRD */
+#define CAMERA_EFFECT_BW 10
+#define CAMERA_EFFECT_BLUISH 12
+#define CAMERA_EFFECT_REDDISH 13
+#define CAMERA_EFFECT_GREENISH 14
+
+/* QRD */
+#define CAMERA_ANTIBANDING_OFF 0
+#define CAMERA_ANTIBANDING_50HZ 2
+#define CAMERA_ANTIBANDING_60HZ 1
+#define CAMERA_ANTIBANDING_AUTO 3
+
+#define CAMERA_CONTRAST_LV0 0
+#define CAMERA_CONTRAST_LV1 1
+#define CAMERA_CONTRAST_LV2 2
+#define CAMERA_CONTRAST_LV3 3
+#define CAMERA_CONTRAST_LV4 4
+#define CAMERA_CONTRAST_LV5 5
+#define CAMERA_CONTRAST_LV6 6
+#define CAMERA_CONTRAST_LV7 7
+#define CAMERA_CONTRAST_LV8 8
+#define CAMERA_CONTRAST_LV9 9
+
+#define CAMERA_BRIGHTNESS_LV0 0
+#define CAMERA_BRIGHTNESS_LV1 1
+#define CAMERA_BRIGHTNESS_LV2 2
+#define CAMERA_BRIGHTNESS_LV3 3
+#define CAMERA_BRIGHTNESS_LV4 4
+#define CAMERA_BRIGHTNESS_LV5 5
+#define CAMERA_BRIGHTNESS_LV6 6
+#define CAMERA_BRIGHTNESS_LV7 7
+#define CAMERA_BRIGHTNESS_LV8 8
+
+
+#define CAMERA_SATURATION_LV0 0
+#define CAMERA_SATURATION_LV1 1
+#define CAMERA_SATURATION_LV2 2
+#define CAMERA_SATURATION_LV3 3
+#define CAMERA_SATURATION_LV4 4
+#define CAMERA_SATURATION_LV5 5
+#define CAMERA_SATURATION_LV6 6
+#define CAMERA_SATURATION_LV7 7
+#define CAMERA_SATURATION_LV8 8
+
+#define CAMERA_SHARPNESS_LV0 0
+#define CAMERA_SHARPNESS_LV1 3
+#define CAMERA_SHARPNESS_LV2 6
+#define CAMERA_SHARPNESS_LV3 9
+#define CAMERA_SHARPNESS_LV4 12
+#define CAMERA_SHARPNESS_LV5 15
+#define CAMERA_SHARPNESS_LV6 18
+#define CAMERA_SHARPNESS_LV7 21
+#define CAMERA_SHARPNESS_LV8 24
+#define CAMERA_SHARPNESS_LV9 27
+#define CAMERA_SHARPNESS_LV10 30
+
+#define CAMERA_SETAE_AVERAGE 0
+#define CAMERA_SETAE_CENWEIGHT 1
+
+#define CFG_SET_SATURATION 30
+#define CFG_SET_SHARPNESS 31
+#define CFG_SET_TOUCHAEC 32
+#define CFG_SET_AUTO_FOCUS 33
+#define CFG_SET_AUTOFLASH 34
+/* QRD */
+#define CFG_SET_EXPOSURE_COMPENSATION 35
+
+#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
+#define CAMERA_WB_CUSTOM 2
+#define CAMERA_WB_INCANDESCENT 3
+#define CAMERA_WB_FLUORESCENT 4
+#define CAMERA_WB_DAYLIGHT 5
+#define CAMERA_WB_CLOUDY_DAYLIGHT 6
+#define CAMERA_WB_TWILIGHT 7
+#define CAMERA_WB_SHADE 8
+
+#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
+#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
+#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
+#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
+#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
+
+
struct sensor_pict_fps {
uint16_t prevfps;
uint16_t pictfps;
@@ -836,6 +919,16 @@
uint16_t index;
};
+struct mirror_flip {
+ int32_t x_mirror;
+ int32_t y_flip;
+};
+
+struct cord {
+ uint32_t x;
+ uint32_t y;
+};
+
struct sensor_cfg_data {
int cfgtype;
int mode;
@@ -861,6 +954,18 @@
struct sensor_calib_data calib_info;
struct sensor_output_info_t output_info;
struct sensor_eeprom_data_t eeprom_data;
+ /* QRD */
+ uint16_t antibanding;
+ uint8_t contrast;
+ uint8_t saturation;
+ uint8_t sharpness;
+ int8_t brightness;
+ int ae_mode;
+ uint8_t wb_val;
+ int8_t exp_compensation;
+ struct cord aec_cord;
+ int is_autoflash;
+ struct mirror_flip mirror_flip;
} cfg;
};
diff --git a/include/media/radio-iris.h b/include/media/radio-iris.h
index 359668b..e96d513 100644
--- a/include/media/radio-iris.h
+++ b/include/media/radio-iris.h
@@ -145,6 +145,7 @@
#define HCI_OCF_FM_RESET 0x0004
#define HCI_OCF_FM_GET_FEATURE_LIST 0x0005
#define HCI_OCF_FM_DO_CALIBRATION 0x0006
+#define HCI_OCF_FM_SET_CALIBRATION 0x0007
/*HCI Status parameters commands*/
#define HCI_OCF_FM_READ_GRP_COUNTERS 0x0001
@@ -546,9 +547,12 @@
V4L2_CID_PRIVATE_IRIS_TX_TONE,
V4L2_CID_PRIVATE_IRIS_RDS_GRP_COUNTERS,
V4L2_CID_PRIVATE_IRIS_SET_NOTCH_FILTER,/*0x8000028*/
+ /*0x8000029 is used for tavarua specific ioctl*/
+ V4L2_CID_PRIVATE_IRIS_DO_CALIBRATION = 0x800002a,
V4L2_CID_PRIVATE_IRIS_READ_DEFAULT = 0x00980928,/*using private CIDs
under userclass*/
V4L2_CID_PRIVATE_IRIS_WRITE_DEFAULT,
+ V4L2_CID_PRIVATE_IRIS_SET_CALIBRATION,
};
@@ -616,6 +620,7 @@
IRIS_BUF_SSBI_PEEK,
IRIS_BUF_RDS_CNTRS,
IRIS_BUF_RD_DEFAULT,
+ IRIS_BUF_CAL_DATA,
IRIS_BUF_MAX
};
@@ -712,7 +717,27 @@
#define RIVA_PEEK_PARAM 0x6
#define RIVA_PEEK_LEN_OFSET 0x6
#define SSBI_PEEK_LEN 0x01
+/*Calibration data*/
+#define PROCS_CALIB_MODE 1
+#define PROCS_CALIB_SIZE 23
+#define DC_CALIB_MODE 2
+#define DC_CALIB_SIZE 48
+#define RSB_CALIB_MODE 3
+#define RSB_CALIB_SIZE 4
+#define CALIB_DATA_OFSET 2
+#define CALIB_MODE_OFSET 1
+#define MAX_CALIB_SIZE 75
+struct hci_fm_set_cal_req {
+ __u8 mode;
+ /*Max calibration data size*/
+ __u8 data[MAX_CALIB_SIZE];
+} __packed;
+struct hci_cc_do_calibration_rsp {
+ __u8 status;
+ __u8 mode;
+ __u8 data[MAX_CALIB_SIZE];
+} __packed;
int hci_def_data_read(struct hci_fm_def_data_rd_req *arg,
struct radio_hci_dev *hdev);
int hci_def_data_write(struct hci_fm_def_data_wr_req *arg,
diff --git a/include/net/bluetooth/bluetooth.h b/include/net/bluetooth/bluetooth.h
index 643a497..155c6fd 100644
--- a/include/net/bluetooth/bluetooth.h
+++ b/include/net/bluetooth/bluetooth.h
@@ -66,12 +66,12 @@
#define BT_DEFER_SETUP 7
-#define BT_POWER 8
+#define BT_POWER 9
struct bt_power {
__u8 force_active;
};
-#define BT_AMP_POLICY 9
+#define BT_AMP_POLICY 10
/* Require BR/EDR (default policy)
* AMP controllers cannot be used
@@ -80,6 +80,13 @@
*/
#define BT_AMP_POLICY_REQUIRE_BR_EDR 0
+/* Prefer BR/EDR
+ * Allow use of AMP controllers
+ * If the L2CAP channel is currently on AMP, move it to BR/EDR
+ * Channel move requests from the remote device are allowed
+ */
+#define BT_AMP_POLICY_PREFER_BR_EDR 1
+
/* Prefer AMP
* Allow use of AMP controllers
* If the L2CAP channel is currently on BR/EDR and AMP controller
@@ -89,14 +96,7 @@
* and configure the channel directly on an AMP controller rather
* than BR/EDR
*/
-#define BT_AMP_POLICY_PREFER_AMP 1
-
-/* Prefer BR/EDR
- * Allow use of AMP controllers
- * If the L2CAP channel is currently on AMP, move it to BR/EDR
- * Channel move requests from the remote device are allowed
- */
-#define BT_AMP_POLICY_PREFER_BR_EDR 2
+#define BT_AMP_POLICY_PREFER_AMP 2
#define BT_INFO(fmt, arg...) printk(KERN_INFO "Bluetooth: " fmt "\n" , ## arg)
#define BT_ERR(fmt, arg...) printk(KERN_ERR "%s: " fmt "\n" , __func__ , ## arg)
diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h
index d0da174..74e14fb 100644
--- a/include/net/bluetooth/hci_core.h
+++ b/include/net/bluetooth/hci_core.h
@@ -91,7 +91,8 @@
struct link_key_data {
bdaddr_t bdaddr;
- u8 type;
+ u8 addr_type;
+ u8 key_type;
u8 val[16];
u8 pin_len;
u8 auth;
@@ -102,7 +103,8 @@
struct link_key {
struct list_head list;
bdaddr_t bdaddr;
- u8 type;
+ u8 addr_type;
+ u8 key_type;
u8 val[16];
u8 pin_len;
u8 auth;
@@ -689,7 +691,7 @@
struct link_key *hci_find_ltk(struct hci_dev *hdev, __le16 ediv, u8 rand[8]);
struct link_key *hci_find_link_key_type(struct hci_dev *hdev,
bdaddr_t *bdaddr, u8 type);
-int hci_add_ltk(struct hci_dev *hdev, int new_key, bdaddr_t *bdaddr,
+int hci_add_ltk(struct hci_dev *hdev, int new_key, bdaddr_t *bdaddr, u8 type,
u8 auth, u8 key_size, __le16 ediv, u8 rand[8], u8 ltk[16]);
int hci_remove_link_key(struct hci_dev *hdev, bdaddr_t *bdaddr);
diff --git a/include/net/bluetooth/mgmt.h b/include/net/bluetooth/mgmt.h
index 208c157..127c7ca 100644
--- a/include/net/bluetooth/mgmt.h
+++ b/include/net/bluetooth/mgmt.h
@@ -100,7 +100,8 @@
struct mgmt_key_info {
bdaddr_t bdaddr;
- u8 type;
+ u8 addr_type;
+ u8 key_type;
u8 val[16];
u8 pin_len;
u8 auth;
diff --git a/kernel/power/wakelock.c b/kernel/power/wakelock.c
index e9f49b5..b257424 100644
--- a/kernel/power/wakelock.c
+++ b/kernel/power/wakelock.c
@@ -19,6 +19,7 @@
#include <linux/suspend.h>
#include <linux/syscalls.h> /* sys_sync */
#include <linux/wakelock.h>
+#include <linux/syscore_ops.h>
#ifdef CONFIG_WAKELOCK_STAT
#include <linux/proc_fs.h>
#endif
@@ -391,15 +392,8 @@
return ret;
}
-static int power_resume_early(struct device *dev)
-{
- msm_suspend_check_done = 0;
- return 0;
-}
-
static struct dev_pm_ops power_driver_pm_ops = {
.suspend_noirq = power_suspend_late,
- .resume_noirq = power_resume_early,
};
static struct platform_driver power_driver = {
@@ -410,6 +404,14 @@
.name = "power",
};
+static void power_resume_early(void)
+{
+ msm_suspend_check_done = 0;
+}
+static struct syscore_ops wakelock_syscore_ops = {
+ .resume = power_resume_early,
+};
+
void wake_lock_init(struct wake_lock *lock, int type, const char *name)
{
unsigned long irqflags = 0;
@@ -661,6 +663,7 @@
proc_create("wakelocks", S_IRUGO, NULL, &wakelock_stats_fops);
#endif
+ register_syscore_ops(&wakelock_syscore_ops);
return 0;
err_suspend_work_queue:
diff --git a/mm/slub.c b/mm/slub.c
index 35f351f..adf609e 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -557,10 +557,10 @@
memset(p + s->objsize, val, s->inuse - s->objsize);
}
-static u8 *check_bytes(u8 *start, unsigned int value, unsigned int bytes)
+static u8 *check_bytes8(u8 *start, u8 value, unsigned int bytes)
{
while (bytes) {
- if (*start != (u8)value)
+ if (*start != value)
return start;
start++;
bytes--;
@@ -568,6 +568,38 @@
return NULL;
}
+static u8 *check_bytes(u8 *start, u8 value, unsigned int bytes)
+{
+ u64 value64;
+ unsigned int words, prefix;
+
+ if (bytes <= 16)
+ return check_bytes8(start, value, bytes);
+
+ value64 = value | value << 8 | value << 16 | value << 24;
+ value64 = (value64 & 0xffffffff) | value64 << 32;
+ prefix = 8 - ((unsigned long)start) % 8;
+
+ if (prefix) {
+ u8 *r = check_bytes8(start, value, prefix);
+ if (r)
+ return r;
+ start += prefix;
+ bytes -= prefix;
+ }
+
+ words = bytes / 8;
+
+ while (words) {
+ if (*(u64 *)start != value64)
+ return check_bytes8(start, value, 8);
+ start += 8;
+ words--;
+ }
+
+ return check_bytes8(start, value, bytes % 8);
+}
+
static void restore_bytes(struct kmem_cache *s, char *message, u8 data,
void *from, void *to)
{
diff --git a/net/bluetooth/hci_conn.c b/net/bluetooth/hci_conn.c
index 733e9d2..5e67829 100644
--- a/net/bluetooth/hci_conn.c
+++ b/net/bluetooth/hci_conn.c
@@ -631,6 +631,7 @@
if (type == LE_LINK) {
struct adv_entry *entry;
+ struct link_key *key;
le = hci_conn_hash_lookup_ba(hdev, LE_LINK, dst);
if (le) {
@@ -638,11 +639,17 @@
return le;
}
- entry = hci_find_adv_entry(hdev, dst);
- if (!entry)
- le = hci_le_conn_add(hdev, dst, 0);
- else
- le = hci_le_conn_add(hdev, dst, entry->bdaddr_type);
+ key = hci_find_link_key_type(hdev, dst, KEY_TYPE_LTK);
+ if (!key) {
+ entry = hci_find_adv_entry(hdev, dst);
+ if (entry)
+ le = hci_le_conn_add(hdev, dst,
+ entry->bdaddr_type);
+ else
+ le = hci_le_conn_add(hdev, dst, 0);
+ } else {
+ le = hci_le_conn_add(hdev, dst, key->addr_type);
+ }
if (!le)
return ERR_PTR(-ENOMEM);
diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c
index 699284a..0fa1262 100644
--- a/net/bluetooth/hci_core.c
+++ b/net/bluetooth/hci_core.c
@@ -1065,7 +1065,7 @@
k = list_entry(p, struct link_key, list);
- if (k->type != KEY_TYPE_LTK)
+ if (k->key_type != KEY_TYPE_LTK)
continue;
if (k->dlen != sizeof(*id))
@@ -1091,7 +1091,7 @@
k = list_entry(p, struct link_key, list);
- if ((k->type == type) && (bacmp(bdaddr, &k->bdaddr) == 0))
+ if ((k->key_type == type) && (bacmp(bdaddr, &k->bdaddr) == 0))
return k;
}
@@ -1109,7 +1109,7 @@
old_key = hci_find_link_key(hdev, bdaddr);
if (old_key) {
- old_key_type = old_key->type;
+ old_key_type = old_key->key_type;
key = old_key;
} else {
old_key_type = 0xff;
@@ -1124,7 +1124,7 @@
bacpy(&key->bdaddr, bdaddr);
memcpy(key->val, val, 16);
key->auth = 0x01;
- key->type = type;
+ key->key_type = type;
key->pin_len = pin_len;
conn = hci_conn_hash_lookup_ba(hdev, ACL_LINK, bdaddr);
@@ -1142,8 +1142,8 @@
if (conn) {
if ((conn->remote_auth > 0x01) ||
(conn->auth_initiator && conn->auth_type > 0x01) ||
- (key->type < 0x03) ||
- (key->type == 0x06 && old_key_type != 0xff))
+ (key->key_type < 0x03) ||
+ (key->key_type == 0x06 && old_key_type != 0xff))
bonded = 1;
}
@@ -1151,19 +1151,20 @@
mgmt_new_key(hdev->id, key, bonded);
if (type == 0x06)
- key->type = old_key_type;
+ key->key_type = old_key_type;
return 0;
}
int hci_add_ltk(struct hci_dev *hdev, int new_key, bdaddr_t *bdaddr,
- u8 key_size, u8 auth, __le16 ediv, u8 rand[8],
- u8 ltk[16])
+ u8 addr_type, u8 key_size, u8 auth,
+ __le16 ediv, u8 rand[8], u8 ltk[16])
{
struct link_key *key, *old_key;
struct key_master_id *id;
- BT_DBG("%s Auth: %2.2X addr %s", hdev->name, auth, batostr(bdaddr));
+ BT_DBG("%s Auth: %2.2X addr %s type: %d", hdev->name, auth,
+ batostr(bdaddr), addr_type);
old_key = hci_find_link_key_type(hdev, bdaddr, KEY_TYPE_LTK);
if (old_key) {
@@ -1178,8 +1179,9 @@
key->dlen = sizeof(*id);
bacpy(&key->bdaddr, bdaddr);
+ key->addr_type = addr_type;
memcpy(key->val, ltk, sizeof(key->val));
- key->type = KEY_TYPE_LTK;
+ key->key_type = KEY_TYPE_LTK;
key->pin_len = key_size;
key->auth = auth;
diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c
index da8b780..a6e3485 100644
--- a/net/bluetooth/hci_event.c
+++ b/net/bluetooth/hci_event.c
@@ -224,13 +224,11 @@
if (!sent)
return;
+ if (!status)
+ memcpy(hdev->dev_name, sent, HCI_MAX_NAME_LENGTH);
+
if (test_bit(HCI_MGMT, &hdev->flags))
mgmt_set_local_name_complete(hdev->id, sent, status);
-
- if (status)
- return;
-
- memcpy(hdev->dev_name, sent, HCI_MAX_NAME_LENGTH);
}
static void hci_cc_read_local_name(struct hci_dev *hdev, struct sk_buff *skb)
@@ -2486,10 +2484,10 @@
goto not_found;
}
- BT_DBG("%s found key type %u for %s", hdev->name, key->type,
+ BT_DBG("%s found key type %u for %s", hdev->name, key->key_type,
batostr(&ev->bdaddr));
- if (!test_bit(HCI_DEBUG_KEYS, &hdev->flags) && key->type == 0x03) {
+ if (!test_bit(HCI_DEBUG_KEYS, &hdev->flags) && key->key_type == 0x03) {
BT_DBG("%s ignoring debug key", hdev->name);
goto not_found;
}
@@ -2507,7 +2505,7 @@
goto not_found;
}
- if (key->type == 0x04 && conn && conn->auth_type != 0xff &&
+ if (key->key_type == 0x04 && conn && conn->auth_type != 0xff &&
(conn->auth_type & 0x01)) {
BT_DBG("%s ignoring unauthenticated key", hdev->name);
goto not_found;
diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c
index 7ca920e..abc3ef7 100644
--- a/net/bluetooth/l2cap_core.c
+++ b/net/bluetooth/l2cap_core.c
@@ -1345,16 +1345,21 @@
lock_sock(sk);
l2cap_ertm_send(sk);
release_sock(sk);
+ sock_put(sk);
}
static void l2cap_skb_destructor(struct sk_buff *skb)
{
struct sock *sk = skb->sk;
int queued;
+ int keep_sk = 0;
queued = atomic_sub_return(1, &l2cap_pi(sk)->ertm_queued);
if (queued < L2CAP_MIN_ERTM_QUEUED)
- queue_work(_l2cap_wq, &l2cap_pi(sk)->tx_work);
+ keep_sk = queue_work(_l2cap_wq, &l2cap_pi(sk)->tx_work);
+
+ if (!keep_sk)
+ sock_put(sk);
}
void l2cap_do_send(struct sock *sk, struct sk_buff *skb)
@@ -1440,6 +1445,7 @@
*/
tx_skb = skb_clone(skb, GFP_ATOMIC);
+ sock_hold(sk);
tx_skb->sk = sk;
tx_skb->destructor = l2cap_skb_destructor;
atomic_inc(&pi->ertm_queued);
@@ -2604,6 +2610,7 @@
if (l2cap_pi(sk)->amp_move_state != L2CAP_AMP_STATE_RESEGMENT) {
release_sock(sk);
+ sock_put(sk);
return;
}
@@ -2622,6 +2629,7 @@
l2cap_ertm_send(sk);
release_sock(sk);
+ sock_put(sk);
}
static int l2cap_setup_resegment(struct sock *sk)
@@ -2638,10 +2646,12 @@
return -ENOMEM;
INIT_WORK(&seg_work->work, l2cap_resegment_worker);
+ sock_hold(sk);
seg_work->sk = sk;
if (!queue_work(_l2cap_wq, &seg_work->work)) {
kfree(seg_work);
+ sock_put(sk);
return -ENOMEM;
}
@@ -5815,6 +5825,7 @@
if (pi->fcs == L2CAP_FCS_CRC16)
apply_fcs(tx_skb);
+ sock_hold(sk);
tx_skb->sk = sk;
tx_skb->destructor = l2cap_skb_destructor;
atomic_inc(&pi->ertm_queued);
diff --git a/net/bluetooth/l2cap_sock.c b/net/bluetooth/l2cap_sock.c
index 361c984..9beea74 100644
--- a/net/bluetooth/l2cap_sock.c
+++ b/net/bluetooth/l2cap_sock.c
@@ -750,7 +750,7 @@
break;
}
- if ((opt > BT_AMP_POLICY_PREFER_BR_EDR) ||
+ if ((opt > BT_AMP_POLICY_PREFER_AMP) ||
((l2cap_pi(sk)->mode != L2CAP_MODE_ERTM) &&
(l2cap_pi(sk)->mode != L2CAP_MODE_STREAMING))) {
err = -EINVAL;
diff --git a/net/bluetooth/mgmt.c b/net/bluetooth/mgmt.c
index ea72708..77845f2 100644
--- a/net/bluetooth/mgmt.c
+++ b/net/bluetooth/mgmt.c
@@ -1099,19 +1099,20 @@
i += sizeof(*key);
- if (key->type == KEY_TYPE_LTK) {
+ if (key->key_type == KEY_TYPE_LTK) {
struct key_master_id *id = (void *) key->data;
if (key->dlen != sizeof(struct key_master_id))
continue;
- hci_add_ltk(hdev, 0, &key->bdaddr, key->pin_len,
- key->auth, id->ediv, id->rand, key->val);
+ hci_add_ltk(hdev, 0, &key->bdaddr, key->addr_type,
+ key->pin_len, key->auth, id->ediv,
+ id->rand, key->val);
continue;
}
- hci_add_link_key(hdev, 0, &key->bdaddr, key->val, key->type,
+ hci_add_link_key(hdev, 0, &key->bdaddr, key->val, key->key_type,
key->pin_len);
}
@@ -2393,7 +2394,8 @@
return -ENOMEM;
bacpy(&ev->key.bdaddr, &key->bdaddr);
- ev->key.type = key->type;
+ ev->key.addr_type = key->addr_type;
+ ev->key.key_type = key->key_type;
memcpy(ev->key.val, key->val, 16);
ev->key.pin_len = key->pin_len;
ev->key.auth = key->auth;
diff --git a/net/bluetooth/smp.c b/net/bluetooth/smp.c
index 94d0f06..e725148 100644
--- a/net/bluetooth/smp.c
+++ b/net/bluetooth/smp.c
@@ -637,13 +637,35 @@
memset(stk + hcon->smp_key_size, 0,
SMP_MAX_ENC_KEY_SIZE - hcon->smp_key_size);
- hci_add_ltk(conn->hcon->hdev, 0, conn->dst, hcon->smp_key_size,
- hcon->auth, ediv, rand, stk);
+ hci_add_ltk(conn->hcon->hdev, 0, conn->dst, hcon->dst_type,
+ hcon->smp_key_size, hcon->auth, ediv, rand, stk);
}
return 0;
}
+static int smp_encrypt_link(struct hci_conn *hcon, struct link_key *key)
+{
+ struct key_master_id *master;
+ u8 zerobuf[8];
+
+ if (!hcon || !key || !key->data)
+ return -EINVAL;
+
+ memset(zerobuf, 0, sizeof(zerobuf));
+
+ master = (void *) key->data;
+
+ if (!master->ediv && !memcmp(master->rand, zerobuf, sizeof(zerobuf)))
+ return -EINVAL;
+
+ hcon->enc_key_size = key->pin_len;
+ hcon->sec_req = TRUE;
+ hci_le_start_enc(hcon, master->ediv, master->rand, key->val);
+
+ return 0;
+}
+
static u8 smp_cmd_security_req(struct l2cap_conn *conn, struct sk_buff *skb)
{
struct hci_conn *hcon = conn->hcon;
@@ -659,18 +681,19 @@
key = hci_find_link_key_type(hcon->hdev, conn->dst, KEY_TYPE_LTK);
if (key && ((key->auth & SMP_AUTH_MITM) ||
!(rp->auth_req & SMP_AUTH_MITM))) {
- struct key_master_id *master = (void *) key->data;
- hci_le_start_enc(hcon, master->ediv, master->rand,
- key->val);
- hcon->enc_key_size = key->pin_len;
+ if (smp_encrypt_link(hcon, key) < 0)
+ goto invalid_key;
- hcon->sec_req = TRUE;
- hcon->sec_level = authreq_to_seclevel(rp->auth_req);
+ hcon->sec_level = authreq_to_seclevel(key->auth);
+
+ if (!(hcon->link_mode & HCI_LM_ENCRYPT))
+ hci_conn_hold(hcon);
return 0;
}
+invalid_key:
hcon->sec_req = FALSE;
skb_pull(skb, sizeof(*rp));
@@ -730,17 +753,9 @@
key = hci_find_link_key_type(hcon->hdev, conn->dst,
KEY_TYPE_LTK);
- if (key) {
- struct key_master_id *master = (void *) key->data;
- hci_le_start_enc(hcon, master->ediv, master->rand,
- key->val);
- hcon->enc_key_size = key->pin_len;
-
- hcon->sec_req = TRUE;
-
+ if (smp_encrypt_link(hcon, key) == 0)
goto done;
- }
}
hcon->sec_req = FALSE;
@@ -782,8 +797,8 @@
memset(rand, 0, sizeof(rand));
- err = hci_add_ltk(hcon->hdev, 0, conn->dst, 0, 0, 0,
- rand, rp->ltk);
+ err = hci_add_ltk(hcon->hdev, 0, conn->dst, hcon->dst_type,
+ 0, 0, 0, rand, rp->ltk);
if (err)
return SMP_UNSPECIFIED;
@@ -811,8 +826,9 @@
BT_DBG("keydist 0x%x", *keydist);
- hci_add_ltk(hcon->hdev, 1, conn->dst, hcon->smp_key_size,
- hcon->auth, rp->ediv, rp->rand, key->val);
+ hci_add_ltk(hcon->hdev, 1, conn->dst, hcon->dst_type,
+ hcon->smp_key_size, hcon->auth, rp->ediv,
+ rp->rand, key->val);
*keydist &= ~SMP_DIST_ENC_KEY;
if (hcon->out) {
@@ -949,8 +965,9 @@
smp_send_cmd(conn, SMP_CMD_ENCRYPT_INFO, sizeof(enc), &enc);
- hci_add_ltk(hcon->hdev, 1, conn->dst, hcon->smp_key_size,
- hcon->auth, ediv, ident.rand, enc.ltk);
+ hci_add_ltk(hcon->hdev, 1, conn->dst, hcon->dst_type,
+ hcon->smp_key_size, hcon->auth, ediv,
+ ident.rand, enc.ltk);
ident.ediv = cpu_to_le16(ediv);