usb: otg: Add usb_hs_system_clk to OTG driver for MSM9615
This change add usb system clock support to OTG Driver.
System clock is a 60MHZ input clock to the USB ChipIdea core.
This clock is required starting from MDM9615.
This change also removes the enforcement for using a phy_reset_clk
for reseting the PHY. Starting from MDM9615, PHY reset is not implemented.
The core is reset together with the PHY using "usb_hs_clk" signal.
Signed-off-by: Amit Blay <ablay@codeaurora.org>
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index 8942eea..1e158f5 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -165,6 +165,7 @@
* @pclk_src: pclk source for voting.
* @phy_reset_clk: clock struct of usb_phy_clk.
* @core_clk: clock struct of usb_hs_core_clk.
+ * @system_clk: clock struct of usb_system_clk.
* @regs: ioremapped register base address.
* @inputs: OTG state machine inputs(Id, SessValid etc).
* @sm_work: OTG state machine work.
@@ -192,6 +193,7 @@
struct clk *pclk_src;
struct clk *phy_reset_clk;
struct clk *core_clk;
+ struct clk *system_clk;
void __iomem *regs;
#define ID 0
#define B_SESS_VLD 1