Merge "jtag: make debug arch defines local to jtag.c"
diff --git a/arch/arm/mach-msm/jtag.c b/arch/arm/mach-msm/jtag.c
index 3b7c5d6..4f14b19 100644
--- a/arch/arm/mach-msm/jtag.c
+++ b/arch/arm/mach-msm/jtag.c
@@ -25,6 +25,12 @@
#include "cp14.h"
+/* DBGv7 with baseline CP14 registers implemented */
+#define ARM_DEBUG_ARCH_V7B (0x3)
+/* DBGv7 with all CP14 registers implemented */
+#define ARM_DEBUG_ARCH_V7 (0x4)
+#define ARM_DEBUG_ARCH_V7p1 (0x5)
+
#define BM(lsb, msb) ((BIT(msb) - BIT(lsb)) + BIT(msb))
#define BMVAL(val, lsb, msb) ((val & BM(lsb, msb)) >> lsb)
#define BVAL(val, n) ((val & BIT(n)) >> n)
@@ -363,7 +369,7 @@
static inline bool dbg_arch_supported(uint8_t arch)
{
switch (arch) {
- case ARM_DEBUG_ARCH_V7_1:
+ case ARM_DEBUG_ARCH_V7p1:
case ARM_DEBUG_ARCH_V7:
case ARM_DEBUG_ARCH_V7B:
break;
@@ -381,7 +387,7 @@
i = cpu * MAX_DBG_REGS;
switch (dbg.arch) {
- case ARM_DEBUG_ARCH_V7_1:
+ case ARM_DEBUG_ARCH_V7p1:
/* Set OS lock to inform the debugger that the OS is in the
* process of saving debug registers. It prevents accidental
* modification of the debug regs by the external debugger.
@@ -440,7 +446,7 @@
i = cpu * MAX_DBG_REGS;
switch (dbg.arch) {
- case ARM_DEBUG_ARCH_V7_1:
+ case ARM_DEBUG_ARCH_V7p1:
/* Clear the OS double lock */
isb();
dbg_write(0x0, DBGOSDLR);
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 3bba69c..0bdacffa 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -30,11 +30,6 @@
#define CORESIGHT_COMPIDR2 (0xFF8)
#define CORESIGHT_COMPIDR3 (0xFFC)
-/* DBGv7 with baseline CP14 registers implemented */
-#define ARM_DEBUG_ARCH_V7B (0x3)
-/* DBGv7 with all CP14 registers implemented */
-#define ARM_DEBUG_ARCH_V7 (0x4)
-#define ARM_DEBUG_ARCH_V7_1 (0x5)
#define ETM_ARCH_V3_3 (0x23)
#define PFT_ARCH_V1_1 (0x31)