[PARISC] add ASM_EXCEPTIONTABLE_ENTRY() macro
- this macro unifies the code to add exception table entries
- additionally use ENTRY()/ENDPROC() at more places
Signed-off-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index 75d522e..90b2408 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -27,20 +27,11 @@
*/
#ifdef CONFIG_64BIT
-#define ADDIB addib,*
-#define CMPB cmpb,*
-#define ANDCM andcm,*
-
.level 2.0w
#else
-#define ADDIB addib,
-#define CMPB cmpb,
-#define ANDCM andcm
-
.level 2.0
#endif
-
#include <asm/psw.h>
#include <asm/assembly.h>
#include <asm/pgtable.h>
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S
index de1812d..10859f5 100644
--- a/arch/parisc/kernel/syscall.S
+++ b/arch/parisc/kernel/syscall.S
@@ -23,19 +23,7 @@
*/
#define KILL_INSN break 0,0
-#ifdef CONFIG_64BIT
- .level 2.0w
-#else
- .level 1.1
-#endif
-
-/* on 64bit pad to 64bit values */
-#ifdef CONFIG_64BIT
-#define ULONG_WORD(x) .word 0, x
-#else
-#define ULONG_WORD(x) .word x
-#endif
-
+ .level LEVEL
.text
@@ -603,16 +591,10 @@
the other for the store. Either return -EFAULT.
Each of the entries must be relocated. */
.section __ex_table,"aw"
- ULONG_WORD(2b - linux_gateway_page)
- ULONG_WORD(3b - linux_gateway_page)
+ ASM_ULONG_INSN (1b - linux_gateway_page), (3b - linux_gateway_page)
+ ASM_ULONG_INSN (2b - linux_gateway_page), (3b - linux_gateway_page)
.previous
- .section __ex_table,"aw"
- ULONG_WORD(1b - linux_gateway_page)
- ULONG_WORD(3b - linux_gateway_page)
- .previous
-
-end_compare_and_swap:
/* Make sure nothing else is placed on this page */
.align ASM_PAGE_SIZE
@@ -622,7 +604,7 @@
/* Relocate symbols assuming linux_gateway_page is mapped
to virtual address 0x0 */
-#define LWS_ENTRY(_name_) ULONG_WORD(lws_##_name_ - linux_gateway_page)
+#define LWS_ENTRY(_name_) ASM_ULONG_INSN (lws_##_name_ - linux_gateway_page)
.section .rodata,"a"
diff --git a/arch/parisc/kernel/unaligned.c b/arch/parisc/kernel/unaligned.c
index 58ca443..347bb92 100644
--- a/arch/parisc/kernel/unaligned.c
+++ b/arch/parisc/kernel/unaligned.c
@@ -35,7 +35,7 @@
#define DPRINTF(fmt, args...)
#endif
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
#define RFMT "%016lx"
#else
#define RFMT "%08lx"
@@ -150,15 +150,8 @@
"4: ldi -2, %1\n"
FIXUP_BRANCH(3b)
" .previous\n"
-" .section __ex_table,\"aw\"\n"
-#ifdef __LP64__
-" .dword 1b,4b\n"
-" .dword 2b,4b\n"
-#else
-" .word 1b,4b\n"
-" .word 2b,4b\n"
-#endif
-" .previous\n"
+ ASM_EXCEPTIONTABLE_ENTRY(1b, 4b)
+ ASM_EXCEPTIONTABLE_ENTRY(2b, 4b)
: "=r" (val), "=r" (ret)
: "0" (val), "r" (saddr), "r" (regs->isr)
: "r20", FIXUP_BRANCH_CLOBBER );
@@ -195,15 +188,8 @@
"4: ldi -2, %1\n"
FIXUP_BRANCH(3b)
" .previous\n"
-" .section __ex_table,\"aw\"\n"
-#ifdef __LP64__
-" .dword 1b,4b\n"
-" .dword 2b,4b\n"
-#else
-" .word 1b,4b\n"
-" .word 2b,4b\n"
-#endif
-" .previous\n"
+ ASM_EXCEPTIONTABLE_ENTRY(1b, 4b)
+ ASM_EXCEPTIONTABLE_ENTRY(2b, 4b)
: "=r" (val), "=r" (ret)
: "0" (val), "r" (saddr), "r" (regs->isr)
: "r19", "r20", FIXUP_BRANCH_CLOBBER );
@@ -227,7 +213,7 @@
regs->isr, regs->ior, toreg);
#ifdef CONFIG_PA20
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
if (!flop)
return -1;
#endif
@@ -246,15 +232,8 @@
"4: ldi -2, %1\n"
FIXUP_BRANCH(3b)
" .previous\n"
-" .section __ex_table,\"aw\"\n"
-#ifdef __LP64__
-" .dword 1b,4b\n"
-" .dword 2b,4b\n"
-#else
-" .word 1b,4b\n"
-" .word 2b,4b\n"
-#endif
-" .previous\n"
+ ASM_EXCEPTIONTABLE_ENTRY(1b,4b)
+ ASM_EXCEPTIONTABLE_ENTRY(2b,4b)
: "=r" (val), "=r" (ret)
: "0" (val), "r" (saddr), "r" (regs->isr)
: "r19", "r20", FIXUP_BRANCH_CLOBBER );
@@ -278,17 +257,9 @@
"5: ldi -2, %2\n"
FIXUP_BRANCH(4b)
" .previous\n"
-" .section __ex_table,\"aw\"\n"
-#ifdef __LP64__
-" .dword 1b,5b\n"
-" .dword 2b,5b\n"
-" .dword 3b,5b\n"
-#else
-" .word 1b,5b\n"
-" .word 2b,5b\n"
-" .word 3b,5b\n"
-#endif
-" .previous\n"
+ ASM_EXCEPTIONTABLE_ENTRY(1b,5b)
+ ASM_EXCEPTIONTABLE_ENTRY(2b,5b)
+ ASM_EXCEPTIONTABLE_ENTRY(3b,5b)
: "=r" (valh), "=r" (vall), "=r" (ret)
: "0" (valh), "1" (vall), "r" (saddr), "r" (regs->isr)
: "r19", "r20", FIXUP_BRANCH_CLOBBER );
@@ -328,15 +299,8 @@
"4: ldi -2, %0\n"
FIXUP_BRANCH(3b)
" .previous\n"
-" .section __ex_table,\"aw\"\n"
-#ifdef __LP64__
-" .dword 1b,4b\n"
-" .dword 2b,4b\n"
-#else
-" .word 1b,4b\n"
-" .word 2b,4b\n"
-#endif
-" .previous\n"
+ ASM_EXCEPTIONTABLE_ENTRY(1b,4b)
+ ASM_EXCEPTIONTABLE_ENTRY(2b,4b)
: "=r" (ret)
: "r" (val), "r" (regs->ior), "r" (regs->isr)
: "r19", FIXUP_BRANCH_CLOBBER );
@@ -382,15 +346,8 @@
"4: ldi -2, %0\n"
FIXUP_BRANCH(3b)
" .previous\n"
-" .section __ex_table,\"aw\"\n"
-#ifdef __LP64__
-" .dword 1b,4b\n"
-" .dword 2b,4b\n"
-#else
-" .word 1b,4b\n"
-" .word 2b,4b\n"
-#endif
-" .previous\n"
+ ASM_EXCEPTIONTABLE_ENTRY(1b,4b)
+ ASM_EXCEPTIONTABLE_ENTRY(2b,4b)
: "=r" (ret)
: "r" (val), "r" (regs->ior), "r" (regs->isr)
: "r19", "r20", "r21", "r22", "r1", FIXUP_BRANCH_CLOBBER );
@@ -413,7 +370,7 @@
val, regs->isr, regs->ior);
#ifdef CONFIG_PA20
-#ifndef __LP64__
+#ifndef CONFIG_64BIT
if (!flop)
return -1;
#endif
@@ -439,19 +396,10 @@
"6: ldi -2, %0\n"
FIXUP_BRANCH(5b)
" .previous\n"
-" .section __ex_table,\"aw\"\n"
-#ifdef __LP64__
-" .dword 1b,6b\n"
-" .dword 2b,6b\n"
-" .dword 3b,6b\n"
-" .dword 4b,6b\n"
-#else
-" .word 1b,6b\n"
-" .word 2b,6b\n"
-" .word 3b,6b\n"
-" .word 4b,6b\n"
-#endif
-" .previous\n"
+ ASM_EXCEPTIONTABLE_ENTRY(1b,6b)
+ ASM_EXCEPTIONTABLE_ENTRY(2b,6b)
+ ASM_EXCEPTIONTABLE_ENTRY(3b,6b)
+ ASM_EXCEPTIONTABLE_ENTRY(4b,6b)
: "=r" (ret)
: "r" (val), "r" (regs->ior), "r" (regs->isr)
: "r19", "r20", "r21", "r22", "r1", FIXUP_BRANCH_CLOBBER );
@@ -482,21 +430,11 @@
"7: ldi -2, %0\n"
FIXUP_BRANCH(6b)
" .previous\n"
-" .section __ex_table,\"aw\"\n"
-#ifdef __LP64__
-" .dword 1b,7b\n"
-" .dword 2b,7b\n"
-" .dword 3b,7b\n"
-" .dword 4b,7b\n"
-" .dword 5b,7b\n"
-#else
-" .word 1b,7b\n"
-" .word 2b,7b\n"
-" .word 3b,7b\n"
-" .word 4b,7b\n"
-" .word 5b,7b\n"
-#endif
-" .previous\n"
+ ASM_EXCEPTIONTABLE_ENTRY(1b,7b)
+ ASM_EXCEPTIONTABLE_ENTRY(2b,7b)
+ ASM_EXCEPTIONTABLE_ENTRY(3b,7b)
+ ASM_EXCEPTIONTABLE_ENTRY(4b,7b)
+ ASM_EXCEPTIONTABLE_ENTRY(5b,7b)
: "=r" (ret)
: "r" (valh), "r" (vall), "r" (regs->ior), "r" (regs->isr)
: "r19", "r20", "r21", "r1", FIXUP_BRANCH_CLOBBER );
diff --git a/arch/parisc/lib/fixup.S b/arch/parisc/lib/fixup.S
index ecce3d3..d172d42 100644
--- a/arch/parisc/lib/fixup.S
+++ b/arch/parisc/lib/fixup.S
@@ -22,6 +22,7 @@
#include <asm/asm-offsets.h>
#include <asm/assembly.h>
#include <asm/errno.h>
+#include <linux/linkage.h>
#ifdef CONFIG_SMP
.macro get_fault_ip t1 t2
@@ -30,7 +31,7 @@
/* t2 = smp_processor_id() */
mfctl 30,\t2
ldw TI_CPU(\t2),\t2
-#ifdef __LP64__
+#ifdef CONFIG_64BIT
extrd,u \t2,63,32,\t2
#endif
/* t2 = &__per_cpu_offset[smp_processor_id()]; */
@@ -58,33 +59,34 @@
.section .fixup, "ax"
/* get_user() fixups, store -EFAULT in r8, and 0 in r9 */
- .export fixup_get_user_skip_1
-fixup_get_user_skip_1:
+ENTRY(fixup_get_user_skip_1)
get_fault_ip %r1,%r8
ldo 4(%r1), %r1
ldi -EFAULT, %r8
bv %r0(%r1)
copy %r0, %r9
+ENDPROC(fixup_get_user_skip_1)
- .export fixup_get_user_skip_2
-fixup_get_user_skip_2:
+ENTRY(fixup_get_user_skip_2)
get_fault_ip %r1,%r8
ldo 8(%r1), %r1
ldi -EFAULT, %r8
bv %r0(%r1)
copy %r0, %r9
+ENDPROC(fixup_get_user_skip_2)
/* put_user() fixups, store -EFAULT in r8 */
- .export fixup_put_user_skip_1
-fixup_put_user_skip_1:
+ENTRY(fixup_put_user_skip_1)
get_fault_ip %r1,%r8
ldo 4(%r1), %r1
bv %r0(%r1)
ldi -EFAULT, %r8
+ENDPROC(fixup_put_user_skip_1)
- .export fixup_put_user_skip_2
-fixup_put_user_skip_2:
+ENTRY(fixup_put_user_skip_2)
get_fault_ip %r1,%r8
ldo 8(%r1), %r1
bv %r0(%r1)
ldi -EFAULT, %r8
+ENDPROC(fixup_put_user_skip_2)
+
diff --git a/arch/parisc/lib/lusercopy.S b/arch/parisc/lib/lusercopy.S
index a050985..1bd23cc 100644
--- a/arch/parisc/lib/lusercopy.S
+++ b/arch/parisc/lib/lusercopy.S
@@ -37,6 +37,7 @@
#include <asm/assembly.h>
#include <asm/errno.h>
+#include <linux/linkage.h>
/*
* get_sr gets the appropriate space value into
@@ -67,8 +68,7 @@
* otherwise strlen (i.e. excludes zero byte)
*/
- .export lstrncpy_from_user,code
-lstrncpy_from_user:
+ENTRY(lstrncpy_from_user)
.proc
.callinfo NO_CALLS
.entry
@@ -87,6 +87,7 @@
bv %r0(%r2)
nop
.exit
+ENDPROC(lstrncpy_from_user)
.section .fixup,"ax"
3: fixup_branch $lsfu_exit
@@ -94,13 +95,8 @@
.previous
.section __ex_table,"aw"
-#ifdef __LP64__
- .dword 1b,3b
- .dword 2b,3b
-#else
- .word 1b,3b
- .word 2b,3b
-#endif
+ ASM_ULONG_INSN 1b,3b
+ ASM_ULONG_INSN 2b,3b
.previous
.procend
@@ -112,8 +108,7 @@
* otherwise, returns number of bytes not transferred.
*/
- .export lclear_user,code
-lclear_user:
+ENTRY(lclear_user)
.proc
.callinfo NO_CALLS
.entry
@@ -127,6 +122,7 @@
bv %r0(%r2)
copy %r25,%r28
.exit
+ENDPROC(lclear_user)
.section .fixup,"ax"
2: fixup_branch $lclu_done
@@ -134,11 +130,7 @@
.previous
.section __ex_table,"aw"
-#ifdef __LP64__
- .dword 1b,2b
-#else
- .word 1b,2b
-#endif
+ ASM_ULONG_INSN 1b,2b
.previous
.procend
@@ -151,8 +143,7 @@
* else strlen + 1 (i.e. includes zero byte).
*/
- .export lstrnlen_user,code
-lstrnlen_user:
+ENTRY(lstrnlen_user)
.proc
.callinfo NO_CALLS
.entry
@@ -172,6 +163,7 @@
$lslen_nzero:
b $lslen_done
ldo 1(%r26),%r26 /* special case for N == 0 */
+ENDPROC(lstrnlen_user)
.section .fixup,"ax"
3: fixup_branch $lslen_done
@@ -179,13 +171,8 @@
.previous
.section __ex_table,"aw"
-#ifdef __LP64__
- .dword 1b,3b
- .dword 2b,3b
-#else
- .word 1b,3b
- .word 2b,3b
-#endif
+ ASM_ULONG_INSN 1b,3b
+ ASM_ULONG_INSN 2b,3b
.previous
.procend
diff --git a/arch/parisc/lib/memcpy.c b/arch/parisc/lib/memcpy.c
index 5575e41..2c43ebe 100644
--- a/arch/parisc/lib/memcpy.c
+++ b/arch/parisc/lib/memcpy.c
@@ -96,30 +96,18 @@
#define DPRINTF(fmt, args...)
#endif
-#ifndef __LP64__
-#define EXC_WORD ".word"
-#else
-#define EXC_WORD ".dword"
-#endif
-
#define def_load_ai_insn(_insn,_sz,_tt,_s,_a,_t,_e) \
__asm__ __volatile__ ( \
- "1:\t" #_insn ",ma " #_sz "(" _s ",%1), %0\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t" EXC_WORD "\t1b\n" \
- "\t" EXC_WORD "\t" #_e "\n" \
- "\t.previous\n" \
+ "1:\t" #_insn ",ma " #_sz "(" _s ",%1), %0\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,_e) \
: _tt(_t), "+r"(_a) \
: \
: "r8")
#define def_store_ai_insn(_insn,_sz,_tt,_s,_a,_t,_e) \
__asm__ __volatile__ ( \
- "1:\t" #_insn ",ma %1, " #_sz "(" _s ",%0)\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t" EXC_WORD "\t1b\n" \
- "\t" EXC_WORD "\t" #_e "\n" \
- "\t.previous\n" \
+ "1:\t" #_insn ",ma %1, " #_sz "(" _s ",%0)\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,_e) \
: "+r"(_a) \
: _tt(_t) \
: "r8")
@@ -133,22 +121,16 @@
#define def_load_insn(_insn,_tt,_s,_o,_a,_t,_e) \
__asm__ __volatile__ ( \
- "1:\t" #_insn " " #_o "(" _s ",%1), %0\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t" EXC_WORD "\t1b\n" \
- "\t" EXC_WORD "\t" #_e "\n" \
- "\t.previous\n" \
+ "1:\t" #_insn " " #_o "(" _s ",%1), %0\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,_e) \
: _tt(_t) \
: "r"(_a) \
: "r8")
#define def_store_insn(_insn,_tt,_s,_t,_o,_a,_e) \
__asm__ __volatile__ ( \
- "1:\t" #_insn " %0, " #_o "(" _s ",%1)\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t" EXC_WORD "\t1b\n" \
- "\t" EXC_WORD "\t" #_e "\n" \
- "\t.previous\n" \
+ "1:\t" #_insn " %0, " #_o "(" _s ",%1)\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,_e) \
: \
: _tt(_t), "r"(_a) \
: "r8")
@@ -167,8 +149,8 @@
__asm__("ldd 0(" d_space ",%0), %%r0" : : "r" (addr));
}
#else
-#define prefetch_src(addr)
-#define prefetch_dst(addr)
+#define prefetch_src(addr) do { } while(0)
+#define prefetch_dst(addr) do { } while(0)
#endif
/* Copy from a not-aligned src to an aligned dst, using shifts. Handles 4 words
diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h
index 5a1e0e8..7e26fcb 100644
--- a/include/asm-parisc/assembly.h
+++ b/include/asm-parisc/assembly.h
@@ -31,9 +31,13 @@
#define STREGM std,ma
#define SHRREG shrd
#define SHLREG shld
+#define ADDIB addib,*
+#define CMPB cmpb,*
+#define ANDCM andcm,*
#define RP_OFFSET 16
#define FRAME_SIZE 128
#define CALLEE_REG_FRAME_SIZE 144
+#define ASM_ULONG_INSN .dword
#else /* CONFIG_64BIT */
#define LDREG ldw
#define STREG stw
@@ -42,9 +46,13 @@
#define STREGM stwm
#define SHRREG shr
#define SHLREG shlw
+#define ADDIB addib,
+#define CMPB cmpb,
+#define ANDCM andcm
#define RP_OFFSET 20
#define FRAME_SIZE 64
#define CALLEE_REG_FRAME_SIZE 128
+#define ASM_ULONG_INSN .word
#endif
#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE)
diff --git a/include/asm-parisc/bug.h b/include/asm-parisc/bug.h
index cfe39a2..83ba510 100644
--- a/include/asm-parisc/bug.h
+++ b/include/asm-parisc/bug.h
@@ -14,10 +14,10 @@
#define PARISC_BUG_BREAK_ASM "break 0x1f, 0x1fff"
#define PARISC_BUG_BREAK_INSN 0x03ffe01f /* PARISC_BUG_BREAK_ASM */
-#ifdef CONFIG_64BIT
-#define ASM_ULONG_INSN ".dword"
+#if defined(CONFIG_64BIT)
+#define ASM_WORD_INSN ".dword\t"
#else
-#define ASM_ULONG_INSN ".word"
+#define ASM_WORD_INSN ".word\t"
#endif
#ifdef CONFIG_DEBUG_BUGVERBOSE
@@ -26,7 +26,7 @@
asm volatile("\n" \
"1:\t" PARISC_BUG_BREAK_ASM "\n" \
"\t.pushsection __bug_table,\"a\"\n" \
- "2:\t" ASM_ULONG_INSN " 1b, %c0\n" \
+ "2:\t" ASM_WORD_INSN "1b, %c0\n" \
"\t.short %c1, %c2\n" \
"\t.org 2b+%c3\n" \
"\t.popsection" \
@@ -49,7 +49,7 @@
asm volatile("\n" \
"1:\t" PARISC_BUG_BREAK_ASM "\n" \
"\t.pushsection __bug_table,\"a\"\n" \
- "2:\t" ASM_ULONG_INSN " 1b, %c0\n" \
+ "2:\t" ASM_WORD_INSN "1b, %c0\n" \
"\t.short %c1, %c2\n" \
"\t.org 2b+%c3\n" \
"\t.popsection" \
@@ -63,7 +63,7 @@
asm volatile("\n" \
"1:\t" PARISC_BUG_BREAK_ASM "\n" \
"\t.pushsection __bug_table,\"a\"\n" \
- "2:\t" ASM_ULONG_INSN " 1b\n" \
+ "2:\t" ASM_WORD_INSN "1b\n" \
"\t.short %c0\n" \
"\t.org 2b+%c1\n" \
"\t.popsection" \
diff --git a/include/asm-parisc/uaccess.h b/include/asm-parisc/uaccess.h
index d5d831e..4878b95 100644
--- a/include/asm-parisc/uaccess.h
+++ b/include/asm-parisc/uaccess.h
@@ -67,6 +67,11 @@
long fixup; /* fixup routine */
};
+#define ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr )\
+ ".section __ex_table,\"aw\"\n" \
+ ASM_WORD_INSN #fault_addr ", " #except_addr "\n\t" \
+ ".previous\n"
+
/*
* The page fault handler stores, in a per-cpu area, the following information
* if a fixup routine is available.
@@ -106,21 +111,15 @@
})
#define __get_kernel_asm(ldx,ptr) \
- __asm__("\n1:\t" ldx "\t0(%2),%0\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t" ASM_WORD_INSN \
- "1b,fixup_get_user_skip_1\n" \
- "\t.previous" \
+ __asm__("\n1:\t" ldx "\t0(%2),%0\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b, fixup_get_user_skip_1)\
: "=r"(__gu_val), "=r"(__gu_err) \
: "r"(ptr), "1"(__gu_err) \
: "r1");
#define __get_user_asm(ldx,ptr) \
- __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t" ASM_WORD_INSN \
- "1b,fixup_get_user_skip_1\n" \
- "\t.previous" \
+ __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_get_user_skip_1)\
: "=r"(__gu_val), "=r"(__gu_err) \
: "r"(ptr), "1"(__gu_err) \
: "r1");
@@ -164,22 +163,16 @@
#define __put_kernel_asm(stx,x,ptr) \
__asm__ __volatile__ ( \
- "\n1:\t" stx "\t%2,0(%1)\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t" ASM_WORD_INSN \
- "1b,fixup_put_user_skip_1\n" \
- "\t.previous" \
+ "\n1:\t" stx "\t%2,0(%1)\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_1)\
: "=r"(__pu_err) \
: "r"(ptr), "r"(x), "0"(__pu_err) \
: "r1")
#define __put_user_asm(stx,x,ptr) \
__asm__ __volatile__ ( \
- "\n1:\t" stx "\t%2,0(%%sr3,%1)\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t" ASM_WORD_INSN \
- "1b,fixup_put_user_skip_1\n" \
- "\t.previous" \
+ "\n1:\t" stx "\t%2,0(%%sr3,%1)\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_1)\
: "=r"(__pu_err) \
: "r"(ptr), "r"(x), "0"(__pu_err) \
: "r1")
@@ -192,12 +185,10 @@
u32 hi = (__val64) >> 32; \
u32 lo = (__val64) & 0xffffffff; \
__asm__ __volatile__ ( \
- "\n1:\tstw %2,0(%1)\n" \
- "\n2:\tstw %3,4(%1)\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t.word\t1b,fixup_put_user_skip_2\n" \
- "\t.word\t2b,fixup_put_user_skip_1\n" \
- "\t.previous" \
+ "\n1:\tstw %2,0(%1)" \
+ "\n2:\tstw %3,4(%1)\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_2)\
+ ASM_EXCEPTIONTABLE_ENTRY(2b,fixup_put_user_skip_1)\
: "=r"(__pu_err) \
: "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
: "r1"); \
@@ -208,12 +199,10 @@
u32 hi = (__val64) >> 32; \
u32 lo = (__val64) & 0xffffffff; \
__asm__ __volatile__ ( \
- "\n1:\tstw %2,0(%%sr3,%1)\n" \
- "\n2:\tstw %3,4(%%sr3,%1)\n" \
- "\t.section __ex_table,\"aw\"\n" \
- "\t.word\t1b,fixup_put_user_skip_2\n" \
- "\t.word\t2b,fixup_put_user_skip_1\n" \
- "\t.previous" \
+ "\n1:\tstw %2,0(%%sr3,%1)" \
+ "\n2:\tstw %3,4(%%sr3,%1)\n\t" \
+ ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_2)\
+ ASM_EXCEPTIONTABLE_ENTRY(2b,fixup_put_user_skip_1)\
: "=r"(__pu_err) \
: "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
: "r1"); \