commit 0b488ac6ece598fda69b5f3348015994129c48b9
author Vasanthakumar Thiagarajan <vasanth@atheros.com> Wed Apr 20 10:26:15 2011 +0530
committer John W. Linville <linville@tuxdriver.com> Mon Apr 25 14:50:08 2011 -0400
tree 49f4fe3e24f964e1af6cdc07b2f4803f954b3177
parent f2f5f2a1cedc803a5a517557d436e6cb10c007de

ath9k_hw: Configure pll control register accordingly for AR9340

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

drivers/net/wireless/ath/ath9k/phy.h

diff --git a/drivers/net/wireless/ath/ath9k/phy.h b/drivers/net/wireless/ath/ath9k/phy.h
index 8e5fe9d..9441bf8 100644
--- a/drivers/net/wireless/ath/ath9k/phy.h
+++ b/drivers/net/wireless/ath/ath9k/phy.h
@@ -45,4 +45,7 @@
 #define	AR_PHY_TIMING11_SPUR_FREQ_SD		0x3FF00000
 #define	AR_PHY_TIMING11_SPUR_FREQ_SD_S		20
 
+#define AR_PHY_PLL_CONTROL 0x16180
+#define AR_PHY_PLL_MODE 0x16184
+
 #endif