| commit | 108f518cc4f81eb8e3b46a0bd5cb902ef90a51a8 | [log] [tgz] |
|---|---|---|
| author | Henry Nestler <henry.nestler@gmail.com> | Tue Feb 22 11:29:42 2011 +0000 |
| committer | David S. Miller <davem@davemloft.net> | Wed Feb 23 14:29:50 2011 -0800 |
| tree | e7b48499a74f577c006b4828ee3d140f93eab725 | |
| parent | 8dde924217fdf5b69f6cbbdca099d077ba269ad0 [diff] |
DM9000B: Fix PHY power for network down/up DM9000 revision B needs 1 ms delay after PHY power-on. PHY must be powered on by writing 0 into register DM9000_GPR before all other settings will change (see Davicom spec and example code). Remember, that register DM9000_GPR was not changed by reset sequence. Without this fix the FIFO is out of sync and sends wrong data after sequence of "ifconfig ethX down ; ifconfig ethX up". Signed-off-by: David S. Miller <davem@davemloft.net>