tree d2530953e697b55093ac8ed51dd507ce87a8ad35
parent 4d9199e25ce829f93ec51b0597375dd04d194936
author Vikram Mulukutla <markivx@codeaurora.org> 1343758960 -0700
committer Vikram Mulukutla <markivx@codeaurora.org> 1343846663 -0700

msm: clock-8974: Correct 320MHz source for the axi_clk_src

The 320 Mhz source for the axi_clk_src needs to be MMPLL0
at 800MHz and not MMPLL1 at 846MHz. Correct this.

Change-Id: I40722b1190ac15e82953c3ddd9c69402737a4313
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>