| commit | 63fa71872bdec70f4a82e562fc34f8d87e174774 | [log] [tgz] |
|---|---|---|
| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | Tue Jan 26 22:18:09 2010 +0100 |
| committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | Thu Jun 17 11:10:03 2010 +0200 |
| tree | cb39d230589ee6451ecb45151e5b0069e27bf02f | |
| parent | 4a8d57a54fb21f32ee17e0a61ca54c7a6f8f83da [diff] |
ARM: zImage: __armv3_mpu_cache_flush: respect should-be-zero specification Probably the register content for cache operations is "don't care" in practice, but as r1 is explicitly zeroed, use that one. Acked-by: Eric Miao <eric.miao@canonical.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>