| commit | 243f196d572822214bb86522f28b30e096d67414 | [log] [tgz] |
|---|---|---|
| author | Catalin Marinas <catalin.marinas@arm.com> | Thu Mar 16 14:10:19 2006 +0000 |
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | Thu Mar 16 14:10:19 2006 +0000 |
| tree | 37043d91a1091b085de2f33ddd40418d3152372d | |
| parent | 5466eb5d0ad5e9d4238da71a2a9bd216985a4849 [diff] |
[ARM] 3366/1: Allow the 16bpp mode configuration in the CLCD control register Patch from Catalin Marinas Starting with PL111, the 5551 or 565 modes can be configured in the primecell's control register directly. This patch detects the required mode and sets the correct value. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>