| commit | 2c8c53e28f178577dfdf3a69731b998b7e3df8ae | [log] [tgz] |
|---|---|---|
| author | David Daney <ddaney@caviumnetworks.com> | Mon Dec 27 18:07:57 2010 -0800 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Tue Jan 18 19:30:23 2011 +0100 |
| tree | 0b65ff7fa0ac67795698be7a50559d77d3bc72db | |
| parent | bb3d68c30a00918d4c9fa02a5c17a5aacf597977 [diff] |
MIPS: Optimize TLB handlers for Octeon CPUs Octeon can use scratch registers in the TLB handlers. Octeon II can use LDX instructions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1904/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>