Merge "defconfig: 8974: Enable OCMEM power debug mode" into msm-3.4
diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
index 4c4510c..0b7d2c5 100644
--- a/arch/arm/boot/dts/msm8974.dtsi
+++ b/arch/arm/boot/dts/msm8974.dtsi
@@ -685,16 +685,18 @@
compatible = "qcom,qcedev";
reg = <0xfd440000 0x20000>,
<0xfd444000 0x8000>;
+ reg-names = "crypto-base","crypto-bam-base";
interrupts = <0 235 0>;
- qcom,bam-pipes = <0>;
+ qcom,bam-pipe-pair = <0>;
};
qcom,qcrypto@fd444000 {
compatible = "qcom,qcrypto";
reg = <0xfd440000 0x20000>,
<0xfd444000 0x8000>;
+ reg-names = "crypto-base","crypto-bam-base";
interrupts = <0 235 0>;
- qcom,bam-pipes = <1>;
+ qcom,bam-pipe-pair = <1>;
};
qcom,usbbam@f9304000 {
diff --git a/arch/arm/mach-msm/clock-8974.c b/arch/arm/mach-msm/clock-8974.c
index df7ec7c..d00a25d 100644
--- a/arch/arm/mach-msm/clock-8974.c
+++ b/arch/arm/mach-msm/clock-8974.c
@@ -489,13 +489,12 @@
#define OCMEMNOC_CBCR 0x50B4
#define LPASS_Q6SS_AHB_LFABIF_CBCR 0x22000
#define LPASS_Q6SS_XO_CBCR 0x26000
+#define LPASS_Q6_AXI_CBCR 0x11C0
#define Q6SS_AHBM_CBCR 0x22004
#define MSS_XO_Q6_CBCR 0x108C
#define MSS_BUS_Q6_CBCR 0x10A4
#define MSS_CFG_AHB_CBCR 0x0280
-#define GCC_USB_BOOT_CLOCK_CTL 0x1A00
-#define GCC_KPSS_BOOT_CLOCK_CTL 0x19C0
#define APCS_CLOCK_BRANCH_ENA_VOTE 0x1484
#define APCS_CLOCK_SLEEP_ENA_VOTE 0x1488
@@ -3897,7 +3896,7 @@
};
static struct clk_freq_tbl ftbl_audio_core_slimbus_core_clock[] = {
- F_LPASS(28800000, lpapll0, 1, 15, 256),
+ F_LPASS(24576000, lpapll0, 4, 1, 5),
F_END
};
@@ -4323,6 +4322,17 @@
},
};
+static struct branch_clk gcc_lpass_q6_axi_clk = {
+ .cbcr_reg = LPASS_Q6_AXI_CBCR,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_lpass_q6_axi_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_lpass_q6_axi_clk.c),
+ },
+};
+
static struct branch_clk q6ss_xo_clk = {
.cbcr_reg = LPASS_Q6SS_XO_CBCR,
.bcr_reg = LPASS_Q6SS_BCR,
@@ -4456,6 +4466,7 @@
{&gcc_sdcc2_ahb_clk.c, GCC_BASE, 0x0071},
{&gcc_ocmem_noc_cfg_ahb_clk.c, GCC_BASE, 0x0029},
{&gcc_ce1_clk.c, GCC_BASE, 0x0138},
+ {&gcc_lpass_q6_axi_clk.c, GCC_BASE, 0x0160},
{&mmss_mmssnoc_axi_clk.c, MMSS_BASE, 0x0004},
{&ocmemnoc_clk.c, MMSS_BASE, 0x0007},
{&ocmemcx_ocmemnoc_clk.c, MMSS_BASE, 0x0009},
@@ -5022,13 +5033,14 @@
CLK_LOOKUP("core_oe_clk", audio_core_lpaif_pcmoe_clk.c,
"msm-dai-q6.4106"),
- CLK_LOOKUP("core_clk", mss_xo_q6_clk.c, "pil-q6v5-mss"),
- CLK_LOOKUP("bus_clk", mss_bus_q6_clk.c, "pil-q6v5-mss"),
- CLK_LOOKUP("bus_clk", gcc_mss_cfg_ahb_clk.c, ""),
- CLK_LOOKUP("mem_clk", gcc_boot_rom_ahb_clk.c, "pil-q6v5-mss"),
- CLK_LOOKUP("core_clk", q6ss_xo_clk.c, "pil-q6v5-lpass"),
- CLK_LOOKUP("bus_clk", q6ss_ahb_lfabif_clk.c, "pil-q6v5-lpass"),
- CLK_LOOKUP("reg_clk", q6ss_ahbm_clk.c, "pil-q6v5-lpass"),
+ CLK_LOOKUP("core_clk", mss_xo_q6_clk.c, "pil-q6v5-mss"),
+ CLK_LOOKUP("bus_clk", mss_bus_q6_clk.c, "pil-q6v5-mss"),
+ CLK_LOOKUP("iface_clk", gcc_mss_cfg_ahb_clk.c, "pil-q6v5-mss"),
+ CLK_LOOKUP("mem_clk", gcc_boot_rom_ahb_clk.c, "pil-q6v5-mss"),
+ CLK_LOOKUP("core_clk", q6ss_xo_clk.c, "pil-q6v5-lpass"),
+ CLK_LOOKUP("bus_clk", gcc_lpass_q6_axi_clk.c, "pil-q6v5-lpass"),
+ CLK_LOOKUP("iface_clk", q6ss_ahb_lfabif_clk.c, "pil-q6v5-lpass"),
+ CLK_LOOKUP("reg_clk", q6ss_ahbm_clk.c, "pil-q6v5-lpass"),
CLK_LOOKUP("core_clk", gcc_prng_ahb_clk.c, "msm_rng"),
CLK_LOOKUP("dfab_clk", pnoc_sps_clk.c, "msm_sps"),
@@ -5305,10 +5317,6 @@
*/
writel_relaxed(0x0, GCC_REG_BASE(APCS_CLOCK_SLEEP_ENA_VOTE));
- /* Clear a bit that forces-on certain USB HS and Krait clocks */
- writel_relaxed(0x0, GCC_REG_BASE(GCC_USB_BOOT_CLOCK_CTL));
- writel_relaxed(0x0, GCC_REG_BASE(GCC_KPSS_BOOT_CLOCK_CTL));
-
/*
* TODO: The following sequence enables the LPASS audio core GDSC.
* Remove when this becomes unnecessary.
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index 90e0089..0d05df9 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -102,6 +102,15 @@
.bark_time = 11000,
.has_secure = true,
.needs_expired_enable = true,
+ .base = MSM_TMR0_BASE + WDT0_OFFSET,
+};
+
+static struct resource msm_watchdog_resources[] = {
+ {
+ .start = WDT0_ACCSCSSNBARK_INT,
+ .end = WDT0_ACCSCSSNBARK_INT,
+ .flags = IORESOURCE_IRQ,
+ },
};
struct platform_device msm8064_device_watchdog = {
@@ -110,6 +119,8 @@
.dev = {
.platform_data = &msm_watchdog_pdata,
},
+ .num_resources = ARRAY_SIZE(msm_watchdog_resources),
+ .resource = msm_watchdog_resources,
};
static struct resource msm_dmov_resource[] = {
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index 680770e..8347580 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -1331,6 +1331,15 @@
.pet_time = 10000,
.bark_time = 11000,
.has_secure = true,
+ .base = MSM_TMR0_BASE + WDT0_OFFSET,
+};
+
+static struct resource msm_watchdog_resources[] = {
+ {
+ .start = WDT0_ACCSCSSNBARK_INT,
+ .end = WDT0_ACCSCSSNBARK_INT,
+ .flags = IORESOURCE_IRQ,
+ },
};
struct platform_device msm8960_device_watchdog = {
@@ -1339,6 +1348,8 @@
.dev = {
.platform_data = &msm_watchdog_pdata,
},
+ .num_resources = ARRAY_SIZE(msm_watchdog_resources),
+ .resource = msm_watchdog_resources,
};
static struct resource msm_dmov_resource[] = {
diff --git a/arch/arm/mach-msm/devices-9615.c b/arch/arm/mach-msm/devices-9615.c
index fff8e0d..c307714 100644
--- a/arch/arm/mach-msm/devices-9615.c
+++ b/arch/arm/mach-msm/devices-9615.c
@@ -70,6 +70,15 @@
.bark_time = 11000,
.has_secure = false,
.use_kernel_fiq = true,
+ .base = MSM_TMR_BASE + WDT0_OFFSET,
+};
+
+static struct resource msm_watchdog_resources[] = {
+ {
+ .start = WDT0_ACCSCSSNBARK_INT,
+ .end = WDT0_ACCSCSSNBARK_INT,
+ .flags = IORESOURCE_IRQ,
+ },
};
struct platform_device msm9615_device_watchdog = {
@@ -78,6 +87,8 @@
.dev = {
.platform_data = &msm_watchdog_pdata,
},
+ .num_resources = ARRAY_SIZE(msm_watchdog_resources),
+ .resource = msm_watchdog_resources,
};
static struct resource msm_dmov_resource[] = {
diff --git a/arch/arm/mach-msm/devices-fsm9xxx.c b/arch/arm/mach-msm/devices-fsm9xxx.c
index 5f4d940..639eeae 100644
--- a/arch/arm/mach-msm/devices-fsm9xxx.c
+++ b/arch/arm/mach-msm/devices-fsm9xxx.c
@@ -419,6 +419,15 @@
.bark_time = 11000,
.has_secure = false,
.has_vic = true,
+ .base = MSM_TMR_BASE + WDT1_OFFSET,
+};
+
+static struct resource msm_watchdog_resources[] = {
+ {
+ .start = INT_WDT1_ACCSCSSBARK,
+ .end = INT_WDT1_ACCSCSSBARK,
+ .flags = IORESOURCE_IRQ,
+ },
};
struct platform_device fsm9xxx_device_watchdog = {
@@ -427,5 +436,7 @@
.dev = {
.platform_data = &fsm_watchdog_pdata,
},
+ .num_resources = ARRAY_SIZE(msm_watchdog_resources),
+ .resource = msm_watchdog_resources,
};
diff --git a/arch/arm/mach-msm/devices-msm8x60.c b/arch/arm/mach-msm/devices-msm8x60.c
index 5402251..05f9d75 100644
--- a/arch/arm/mach-msm/devices-msm8x60.c
+++ b/arch/arm/mach-msm/devices-msm8x60.c
@@ -1996,6 +1996,15 @@
.pet_time = 10000,
.bark_time = 11000,
.has_secure = true,
+ .base = MSM_TMR0_BASE + WDT0_OFFSET,
+};
+
+static struct resource msm_watchdog_resources[] = {
+ {
+ .start = WDT0_ACCSCSSNBARK_INT,
+ .end = WDT0_ACCSCSSNBARK_INT,
+ .flags = IORESOURCE_IRQ,
+ },
};
struct platform_device msm8660_device_watchdog = {
@@ -2004,6 +2013,8 @@
.dev = {
.platform_data = &msm_watchdog_pdata,
},
+ .num_resources = ARRAY_SIZE(msm_watchdog_resources),
+ .resource = msm_watchdog_resources,
};
static struct resource msm_dmov_resource_adm0[] = {
diff --git a/arch/arm/mach-msm/msm_watchdog.c b/arch/arm/mach-msm/msm_watchdog.c
index b471426..aca7667 100644
--- a/arch/arm/mach-msm/msm_watchdog.c
+++ b/arch/arm/mach-msm/msm_watchdog.c
@@ -37,22 +37,23 @@
#define TCSR_WDT_CFG 0x30
-#define WDT0_RST 0x38
-#define WDT0_EN 0x40
-#define WDT0_STS 0x44
-#define WDT0_BARK_TIME 0x4C
-#define WDT0_BITE_TIME 0x5C
+#define WDT_RST 0x0
+#define WDT_EN 0x8
+#define WDT_STS 0xC
+#define WDT_BARK_TIME 0x14
+#define WDT_BITE_TIME 0x24
#define WDT_HZ 32768
struct msm_watchdog_dump msm_dump_cpu_ctx;
-static void __iomem *msm_tmr0_base;
+static void __iomem *msm_wdt_base;
static unsigned long delay_time;
static unsigned long bark_time;
static unsigned long long last_pet;
static bool has_vic;
+static unsigned int msm_wdog_irq;
/*
* On the kernel command line specify
@@ -116,8 +117,8 @@
if (!enable)
return 0;
- __raw_writel(1, msm_tmr0_base + WDT0_RST);
- __raw_writel(0, msm_tmr0_base + WDT0_EN);
+ __raw_writel(1, msm_wdt_base + WDT_RST);
+ __raw_writel(0, msm_wdt_base + WDT_EN);
mb();
return 0;
}
@@ -127,8 +128,8 @@
if (!enable)
return 0;
- __raw_writel(1, msm_tmr0_base + WDT0_EN);
- __raw_writel(1, msm_tmr0_base + WDT0_RST);
+ __raw_writel(1, msm_wdt_base + WDT_EN);
+ __raw_writel(1, msm_wdt_base + WDT_RST);
mb();
return 0;
}
@@ -137,14 +138,14 @@
unsigned long event, void *ptr)
{
if (panic_timeout == 0) {
- __raw_writel(0, msm_tmr0_base + WDT0_EN);
+ __raw_writel(0, msm_wdt_base + WDT_EN);
mb();
} else {
__raw_writel(WDT_HZ * (panic_timeout + 4),
- msm_tmr0_base + WDT0_BARK_TIME);
+ msm_wdt_base + WDT_BARK_TIME);
__raw_writel(WDT_HZ * (panic_timeout + 4),
- msm_tmr0_base + WDT0_BITE_TIME);
- __raw_writel(1, msm_tmr0_base + WDT0_RST);
+ msm_wdt_base + WDT_BITE_TIME);
+ __raw_writel(1, msm_wdt_base + WDT_RST);
}
return NOTIFY_DONE;
}
@@ -162,14 +163,14 @@
{
struct wdog_disable_work_data *work_data =
container_of(work, struct wdog_disable_work_data, work);
- __raw_writel(0, msm_tmr0_base + WDT0_EN);
+ __raw_writel(0, msm_wdt_base + WDT_EN);
mb();
if (has_vic) {
- free_irq(WDT0_ACCSCSSNBARK_INT, 0);
+ free_irq(msm_wdog_irq, 0);
} else {
- disable_percpu_irq(WDT0_ACCSCSSNBARK_INT);
+ disable_percpu_irq(msm_wdog_irq);
if (!appsbark_fiq) {
- free_percpu_irq(WDT0_ACCSCSSNBARK_INT,
+ free_percpu_irq(msm_wdog_irq,
percpu_pdata);
free_percpu(percpu_pdata);
}
@@ -178,7 +179,7 @@
atomic_notifier_chain_unregister(&panic_notifier_list, &panic_blk);
cancel_delayed_work(&dogwork_struct);
/* may be suspended after the first write above */
- __raw_writel(0, msm_tmr0_base + WDT0_EN);
+ __raw_writel(0, msm_wdt_base + WDT_EN);
complete(&work_data->complete);
pr_info("MSM Watchdog deactivated.\n");
}
@@ -229,11 +230,11 @@
if (!enable)
return;
- slack = __raw_readl(msm_tmr0_base + WDT0_STS) >> 3;
+ slack = __raw_readl(msm_wdt_base + WDT_STS) >> 3;
slack = ((bark_time*WDT_HZ)/1000) - slack;
if (slack < min_slack_ticks)
min_slack_ticks = slack;
- __raw_writel(1, msm_tmr0_base + WDT0_RST);
+ __raw_writel(1, msm_wdt_base + WDT_RST);
time_ns = sched_clock();
slack_ns = (last_pet + bark_time_ns) - time_ns;
if (slack_ns < min_slack_ns)
@@ -329,7 +330,7 @@
int ret;
if (has_vic) {
- ret = request_irq(WDT0_ACCSCSSNBARK_INT, wdog_bark_handler, 0,
+ ret = request_irq(msm_wdog_irq, wdog_bark_handler, 0,
"apps_wdog_bark", NULL);
if (ret)
return;
@@ -344,7 +345,7 @@
}
msm_wdog_fiq_setup(stack);
- gic_set_irq_secure(WDT0_ACCSCSSNBARK_INT);
+ gic_set_irq_secure(msm_wdog_irq);
} else {
percpu_pdata = alloc_percpu(struct msm_watchdog_pdata *);
if (!percpu_pdata) {
@@ -354,7 +355,7 @@
}
/* Must request irq before sending scm command */
- ret = request_percpu_irq(WDT0_ACCSCSSNBARK_INT,
+ ret = request_percpu_irq(msm_wdog_irq,
wdog_bark_handler, "apps_wdog_bark", percpu_pdata);
if (ret) {
free_percpu(percpu_pdata);
@@ -364,20 +365,20 @@
configure_bark_dump();
- __raw_writel(timeout, msm_tmr0_base + WDT0_BARK_TIME);
- __raw_writel(timeout + 3*WDT_HZ, msm_tmr0_base + WDT0_BITE_TIME);
+ __raw_writel(timeout, msm_wdt_base + WDT_BARK_TIME);
+ __raw_writel(timeout + 3*WDT_HZ, msm_wdt_base + WDT_BITE_TIME);
schedule_delayed_work_on(0, &dogwork_struct, delay_time);
atomic_notifier_chain_register(&panic_notifier_list,
&panic_blk);
- __raw_writel(1, msm_tmr0_base + WDT0_EN);
- __raw_writel(1, msm_tmr0_base + WDT0_RST);
+ __raw_writel(1, msm_wdt_base + WDT_EN);
+ __raw_writel(1, msm_wdt_base + WDT_RST);
last_pet = sched_clock();
if (!has_vic)
- enable_percpu_irq(WDT0_ACCSCSSNBARK_INT, IRQ_TYPE_EDGE_RISING);
+ enable_percpu_irq(msm_wdog_irq, IRQ_TYPE_EDGE_RISING);
printk(KERN_INFO "MSM Watchdog Initialized\n");
@@ -400,7 +401,8 @@
appsbark_fiq = pdata->use_kernel_fiq;
}
- msm_tmr0_base = msm_timer_get_timer0_base();
+ msm_wdt_base = pdata->base;
+ msm_wdog_irq = platform_get_irq(pdev, 0);
/*
* This is only temporary till SBLs turn on the XPUs
diff --git a/arch/arm/mach-msm/msm_watchdog.h b/arch/arm/mach-msm/msm_watchdog.h
index 00ff0b6..5fb82ee 100644
--- a/arch/arm/mach-msm/msm_watchdog.h
+++ b/arch/arm/mach-msm/msm_watchdog.h
@@ -13,6 +13,10 @@
#ifndef __ARCH_ARM_MACH_MSM_MSM_WATCHDOG_H
#define __ARCH_ARM_MACH_MSM_MSM_WATCHDOG_H
+/* The base is just address of the WDT_RST register */
+#define WDT0_OFFSET 0x38
+#define WDT1_OFFSET 0x60
+
struct msm_watchdog_pdata {
/* pet interval period in ms */
unsigned int pet_time;
@@ -23,6 +27,7 @@
bool has_vic;
/* You have to be running in secure mode to use FIQ */
bool use_kernel_fiq;
+ void __iomem *base;
};
struct msm_watchdog_dump {
diff --git a/arch/arm/mach-msm/pil-q6v5.c b/arch/arm/mach-msm/pil-q6v5.c
index d8d23c0..1ce73b8 100644
--- a/arch/arm/mach-msm/pil-q6v5.c
+++ b/arch/arm/mach-msm/pil-q6v5.c
@@ -117,9 +117,16 @@
struct q6v5_data *drv = dev_get_drvdata(pil->dev);
int ret;
- ret = clk_prepare_enable(drv->bus_clk);
- if (ret)
- goto err_bus_clk;
+ if (drv->ahb_clk) {
+ ret = clk_prepare_enable(drv->ahb_clk);
+ if (ret)
+ goto err_ahb_clk;
+ }
+ if (drv->axi_clk) {
+ ret = clk_prepare_enable(drv->axi_clk);
+ if (ret)
+ goto err_axi_clk;
+ }
if (drv->ss_clk) {
ret = clk_prepare_enable(drv->ss_clk);
if (ret)
@@ -139,8 +146,10 @@
err_reset:
clk_disable_unprepare(drv->ss_clk);
err_ss_clk:
- clk_disable_unprepare(drv->bus_clk);
-err_bus_clk:
+ clk_disable_unprepare(drv->axi_clk);
+err_axi_clk:
+ clk_disable_unprepare(drv->ahb_clk);
+err_ahb_clk:
return ret;
}
EXPORT_SYMBOL(pil_q6v5_enable_clks);
@@ -152,7 +161,8 @@
clk_disable_unprepare(drv->core_clk);
clk_reset(drv->core_clk, CLK_RESET_ASSERT);
clk_disable_unprepare(drv->ss_clk);
- clk_disable_unprepare(drv->bus_clk);
+ clk_disable_unprepare(drv->axi_clk);
+ clk_disable_unprepare(drv->ahb_clk);
}
EXPORT_SYMBOL(pil_q6v5_disable_clks);
@@ -277,9 +287,13 @@
if (IS_ERR(drv->xo))
return ERR_CAST(drv->xo);
- drv->bus_clk = devm_clk_get(&pdev->dev, "bus_clk");
- if (IS_ERR(drv->bus_clk))
- return ERR_CAST(drv->bus_clk);
+ drv->ahb_clk = devm_clk_get(&pdev->dev, "iface_clk");
+ if (IS_ERR(drv->ahb_clk))
+ return ERR_CAST(drv->ahb_clk);
+
+ drv->axi_clk = devm_clk_get(&pdev->dev, "bus_clk");
+ if (IS_ERR(drv->axi_clk))
+ return ERR_CAST(drv->axi_clk);
drv->core_clk = devm_clk_get(&pdev->dev, "core_clk");
if (IS_ERR(drv->core_clk))
diff --git a/arch/arm/mach-msm/pil-q6v5.h b/arch/arm/mach-msm/pil-q6v5.h
index 6985360..6d08652 100644
--- a/arch/arm/mach-msm/pil-q6v5.h
+++ b/arch/arm/mach-msm/pil-q6v5.h
@@ -22,7 +22,8 @@
struct q6v5_data {
void __iomem *reg_base;
struct clk *xo;
- struct clk *bus_clk;
+ struct clk *ahb_clk;
+ struct clk *axi_clk;
struct clk *core_clk;
struct clk *ss_clk;
void __iomem *axi_halt_base;
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 2749098..28b7748 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -120,6 +120,29 @@
return 0;
}
+static int __cpuinit krait_release_secondary_p3(unsigned long base, int cpu)
+{
+ void *base_ptr = ioremap_nocache(base + (cpu * 0x10000), SZ_4K);
+ if (!base_ptr)
+ return -ENODEV;
+
+ writel_relaxed(0x021, base_ptr+0x04);
+ mb();
+ udelay(2);
+
+ writel_relaxed(0x020, base_ptr+0x04);
+ mb();
+ udelay(2);
+
+ writel_relaxed(0x000, base_ptr+0x04);
+ mb();
+
+ writel_relaxed(0x080, base_ptr+0x04);
+ mb();
+ iounmap(base_ptr);
+ return 0;
+}
+
static int __cpuinit release_secondary(unsigned int cpu)
{
BUG_ON(cpu >= get_core_count());
@@ -134,6 +157,9 @@
cpu_is_apq8064() || cpu_is_msm8627() || cpu_is_msm8960ab())
return krait_release_secondary(0x02088000, cpu);
+ if (cpu_is_msm8974())
+ return krait_release_secondary_p3(0xf9088000, cpu);
+
WARN(1, "unknown CPU case in release_secondary\n");
return -EINVAL;
}