| commit | 553bd149bb2de7848b2b84642876f27202421368 | [log] [tgz] |
|---|---|---|
| author | Zhenyu Wang <zhenyuw@linux.intel.com> | Wed Sep 02 10:57:52 2009 +0800 |
| committer | Eric Anholt <eric@anholt.net> | Fri Sep 04 13:05:44 2009 -0700 |
| tree | e74d910f9937d61c3128526ad10a8f61ba2649fa | |
| parent | 65655d4ab72456c4c3e503fead55fabf8211a79d [diff] |
drm/i915: fix tiling on IGDNG It seems that on IGDNG the same swizzling setup always applys. And front buffer tiling needs to set address swizzle in display arb control too. Fix plane tricle feed setting in v1 which should be disable bit, and always setup address swizzle to let hardware care for buffer tiling in all cases. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>