Merge "msm_fb: display: check BLT mode within overlay_done isr" into msm-3.0
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b2dbee3..4690de3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -24,7 +24,7 @@
select HAVE_PERF_EVENTS
select PERF_USE_VMALLOC
select HAVE_REGS_AND_STACK_ACCESS_API
- select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
+ #select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
select HAVE_C_RECORDMCOUNT
select HAVE_GENERIC_HARDIRQS
select HAVE_SPARSE_IRQ
@@ -1606,10 +1606,6 @@
def_bool n
depends on MEMORY_HOTPLUG
-config DONT_RESERVE_FROM_MOVABLE_ZONE
- def_bool y
- depends on MEMORY_HOTPLUG
-
config DONT_MAP_HOLE_AFTER_MEMBANK0
def_bool n
depends on SPARSEMEM
@@ -1774,6 +1770,7 @@
bool "Flattened Device Tree support"
select OF
select OF_EARLY_FLATTREE
+ select IRQ_DOMAIN
help
Include support for flattened device tree machine descriptions.
diff --git a/arch/arm/boot/dts/msmcopper.dts b/arch/arm/boot/dts/msmcopper.dts
new file mode 100644
index 0000000..4e3d66d
--- /dev/null
+++ b/arch/arm/boot/dts/msmcopper.dts
@@ -0,0 +1,17 @@
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "Qualcomm MSM Copper";
+ compatible = "qcom,msmcopper-sim", "qcom,msmcopper";
+ interrupt-parent = <&intc>;
+
+ intc: interrupt-controller@F9000000 {
+ compatible = "qcom,msm-qgic2";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0xF9000000 0x1000>,
+ <0xF9002000 0x1000>;
+ };
+};
diff --git a/arch/arm/boot/dts/skeleton.dtsi b/arch/arm/boot/dts/skeleton.dtsi
new file mode 100644
index 0000000..b41d241
--- /dev/null
+++ b/arch/arm/boot/dts/skeleton.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Skeleton device tree; the bare minimum needed to boot; just include and
+ * add a compatible value. The bootloader will typically populate the memory
+ * node.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ chosen { };
+ aliases { };
+ memory { device_type = "memory"; reg = <0 0>; };
+};
diff --git a/arch/arm/common/cpaccess.c b/arch/arm/common/cpaccess.c
index 241e339..d3d0537 100644
--- a/arch/arm/common/cpaccess.c
+++ b/arch/arm/common/cpaccess.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -28,11 +28,19 @@
#include <linux/string.h>
#include <linux/smp.h>
#include <asm/cacheflush.h>
+#include <asm/smp_plat.h>
+
+#ifdef CONFIG_ARCH_MSM_KRAIT
+#include <mach/msm-krait-l2-accessors.h>
+#endif
+
+#define TYPE_MAX_CHARACTERS 10
/*
* CP parameters
*/
struct cp_params {
+ unsigned long il2index;
unsigned long cp;
unsigned long op1;
unsigned long op2;
@@ -43,15 +51,86 @@
};
static struct semaphore cp_sem;
+static unsigned long il2_output;
static int cpu;
+char type[TYPE_MAX_CHARACTERS] = "C";
static DEFINE_PER_CPU(struct cp_params, cp_param)
- = { 15, 0, 0, 0, 0, 0, 'r' };
+ = { 0, 15, 0, 0, 0, 0, 0, 'r' };
static struct sysdev_class cpaccess_sysclass = {
.name = "cpaccess",
};
+#ifdef CONFIG_ARCH_MSM_KRAIT
+/*
+ * do_read_il2 - Read indirect L2 registers
+ * @ret: Pointer to return value
+ *
+ */
+static void do_read_il2(void *ret)
+{
+ *(unsigned long *)ret =
+ get_l2_indirect_reg(per_cpu(cp_param.il2index, cpu));
+}
+
+/*
+ * do_write_il2 - Write indirect L2 registers
+ * @ret: Pointer to return value
+ *
+ */
+static void do_write_il2(void *ret)
+{
+ *(unsigned long *)ret =
+ set_get_l2_indirect_reg(per_cpu(cp_param.il2index, cpu),
+ per_cpu(cp_param.write_value, cpu));
+}
+
+/*
+ * do_il2_rw - Call Read/Write indirect L2 register functions
+ * @ret: Pointer to return value in case of CP register
+ *
+ */
+static int do_il2_rw(char *str_tmp)
+{
+ unsigned long write_value, il2index;
+ char rw;
+ int ret = 0;
+
+ il2index = 0;
+ sscanf(str_tmp, "%lx:%c:%lx:%d", &il2index, &rw, &write_value,
+ &cpu);
+ per_cpu(cp_param.il2index, cpu) = il2index;
+ per_cpu(cp_param.rw, cpu) = rw;
+ per_cpu(cp_param.write_value, cpu) = write_value;
+
+ if (per_cpu(cp_param.rw, cpu) == 'r') {
+ if (is_smp()) {
+ if (smp_call_function_single(cpu, do_read_il2,
+ &il2_output, 1))
+ pr_err("Error cpaccess smp call single\n");
+ } else
+ do_read_il2(&il2_output);
+ } else if (per_cpu(cp_param.rw, cpu) == 'w') {
+ if (is_smp()) {
+ if (smp_call_function_single(cpu, do_write_il2,
+ &il2_output, 1))
+ pr_err("Error cpaccess smp call single\n");
+ } else
+ do_write_il2(&il2_output);
+ } else {
+ pr_err("cpaccess: Wrong Entry for 'r' or 'w'.\n");
+ return -EINVAL;
+ }
+ return ret;
+}
+#else
+static void do_il2_rw(char *str_tmp)
+{
+ il2_output = 0;
+}
+#endif
+
/*
* get_asm_value - Dummy fuction
* @write_val: Write value incase of a CP register write operation.
@@ -137,6 +216,45 @@
return ret;
}
+static int get_register_params(char *str_tmp)
+{
+ unsigned long op1, op2, crn, crm, cp = 15, write_value, il2index;
+ char rw;
+ int cnt = 0;
+
+ il2index = 0;
+ strncpy(type, strsep(&str_tmp, ":"), TYPE_MAX_CHARACTERS);
+
+ if (strncasecmp(type, "C", TYPE_MAX_CHARACTERS) == 0) {
+
+ sscanf(str_tmp, "%lu:%lu:%lu:%lu:%lu:%c:%lx:%d",
+ &cp, &op1, &crn, &crm, &op2, &rw, &write_value, &cpu);
+ per_cpu(cp_param.cp, cpu) = cp;
+ per_cpu(cp_param.op1, cpu) = op1;
+ per_cpu(cp_param.crn, cpu) = crn;
+ per_cpu(cp_param.crm, cpu) = crm;
+ per_cpu(cp_param.op2, cpu) = op2;
+ per_cpu(cp_param.rw, cpu) = rw;
+ per_cpu(cp_param.write_value, cpu) = write_value;
+
+ if ((per_cpu(cp_param.rw, cpu) != 'w') &&
+ (per_cpu(cp_param.rw, cpu) != 'r')) {
+ pr_err("cpaccess: Wrong entry for 'r' or 'w'.\n");
+ return -EINVAL;
+ }
+
+ if (per_cpu(cp_param.rw, cpu) == 'w')
+ do_cpregister_rw(1);
+ } else if (strncasecmp(type, "IL2", TYPE_MAX_CHARACTERS) == 0)
+ do_il2_rw(str_tmp);
+ else {
+ pr_err("cpaccess: Not a valid type. Entered: %s\n", type);
+ return -EINVAL;
+ }
+
+ return cnt;
+}
+
/*
* cp_register_write_sysfs - sysfs interface for writing to
* CP register
@@ -147,34 +265,14 @@
*
*/
static ssize_t cp_register_write_sysfs(struct sys_device *dev,
- struct sysdev_attribute *attr, const char *buf, size_t cnt)
+ struct sysdev_attribute *attr, const char *buf, size_t cnt)
{
- unsigned long op1, op2, crn, crm, cp = 15, write_value, ret;
- char rw;
+ char *str_tmp = (char *)buf;
+
if (down_timeout(&cp_sem, 6000))
return -ERESTARTSYS;
- sscanf(buf, "%lu:%lu:%lu:%lu:%lu:%c:%lx:%d", &cp, &op1, &crn,
- &crm, &op2, &rw, &write_value, &cpu);
- per_cpu(cp_param.cp, cpu) = cp;
- per_cpu(cp_param.op1, cpu) = op1;
- per_cpu(cp_param.crn, cpu) = crn;
- per_cpu(cp_param.crm, cpu) = crm;
- per_cpu(cp_param.op2, cpu) = op2;
- per_cpu(cp_param.rw, cpu) = rw;
- per_cpu(cp_param.write_value, cpu) = write_value;
-
- if (per_cpu(cp_param.rw, cpu) == 'w') {
- do_cpregister_rw(1);
- ret = cnt;
- }
-
- if ((per_cpu(cp_param.rw, cpu) != 'w') &&
- (per_cpu(cp_param.rw, cpu) != 'r')) {
- ret = -1;
- printk(KERN_INFO "Wrong Entry for 'r' or 'w'. \
- Use cp:op1:crn:crm:op2:r/w:write_value.\n");
- }
+ get_register_params(str_tmp);
return cnt;
}
@@ -191,10 +289,17 @@
* result to the caller.
*/
static ssize_t cp_register_read_sysfs(struct sys_device *dev,
- struct sysdev_attribute *attr, char *buf)
+ struct sysdev_attribute *attr, char *buf)
{
int ret;
- ret = sprintf(buf, "%lx\n", do_cpregister_rw(0));
+
+ if (strncasecmp(type, "C", TYPE_MAX_CHARACTERS) == 0)
+ ret = snprintf(buf, TYPE_MAX_CHARACTERS, "%lx\n",
+ do_cpregister_rw(0));
+ else if (strncasecmp(type, "IL2", TYPE_MAX_CHARACTERS) == 0)
+ ret = snprintf(buf, TYPE_MAX_CHARACTERS, "%lx\n", il2_output);
+ else
+ ret = -EINVAL;
if (cp_sem.count <= 0)
up(&cp_sem);
@@ -205,8 +310,7 @@
/*
* Setup sysfs files
*/
-SYSDEV_ATTR(cp_rw, 0644, cp_register_read_sysfs,
- cp_register_write_sysfs);
+SYSDEV_ATTR(cp_rw, 0644, cp_register_read_sysfs, cp_register_write_sysfs);
static struct sys_device device_cpaccess = {
.id = 0,
@@ -223,15 +327,13 @@
if (!error)
error = sysdev_register(&device_cpaccess);
else
- printk(KERN_ERR "Error initializing cpaccess \
- interface\n");
+ pr_err("Error initializing cpaccess interface\n");
if (!error)
error = sysdev_create_file(&device_cpaccess,
&attr_cp_rw);
else {
- printk(KERN_ERR "Error initializing cpaccess \
- interface\n");
+ pr_err("Error initializing cpaccess interface\n");
sysdev_unregister(&device_cpaccess);
sysdev_class_unregister(&cpaccess_sysclass);
}
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 786f4fa..dbf3427 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -277,7 +277,8 @@
if (gic_arch_extn.irq_retrigger)
return gic_arch_extn.irq_retrigger(d);
- return -ENXIO;
+ /* the retrigger expects 0 for failure */
+ return 0;
}
#ifdef CONFIG_SMP
diff --git a/arch/arm/configs/apq8064_defconfig b/arch/arm/configs/apq8064_defconfig
deleted file mode 100644
index 2f3d37a..0000000
--- a/arch/arm/configs/apq8064_defconfig
+++ /dev/null
@@ -1,224 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_CGROUPS=y
-CONFIG_CGROUP_DEBUG=y
-CONFIG_CGROUP_FREEZER=y
-CONFIG_CGROUP_CPUACCT=y
-CONFIG_RESOURCE_COUNTERS=y
-CONFIG_CGROUP_SCHED=y
-# CONFIG_FAIR_GROUP_SCHED is not set
-CONFIG_RT_GROUP_SCHED=y
-CONFIG_NAMESPACES=y
-# CONFIG_UTS_NS is not set
-# CONFIG_IPC_NS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
-CONFIG_RELAY=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_RD_BZIP2=y
-CONFIG_RD_LZMA=y
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_ASHMEM=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_ARCH_MSM=y
-CONFIG_ARCH_APQ8064=y
-# CONFIG_MSM_STACKED_MEMORY is not set
-CONFIG_CPU_HAS_L2_PMU=y
-# CONFIG_MSM_JTAG_V7 is not set
-# CONFIG_MSM_FIQ_SUPPORT is not set
-# CONFIG_MSM_PROC_COMM is not set
-# CONFIG_MSM_DALRPC is not set
-# CONFIG_MSM_HW3D is not set
-CONFIG_MSM_DIRECT_SCLK_ACCESS=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_SMP=y
-# CONFIG_SMP_ON_UP is not set
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
-CONFIG_HIGHMEM=y
-CONFIG_VMALLOC_RESERVE=0x19000000
-CONFIG_VFP=y
-CONFIG_NEON=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_MISC_DEVICES=y
-CONFIG_SCSI=y
-CONFIG_SCSI_TGT=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_CHR_DEV_SCH=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=m
-CONFIG_INPUT_JOYSTICK=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=y
-CONFIG_SERIAL_MSM=y
-# CONFIG_SERIAL_MSM_CLOCK_CONTROL is not set
-CONFIG_SERIAL_MSM_HSL=y
-CONFIG_SERIAL_MSM_HSL_CONSOLE=y
-CONFIG_SERIAL_MSM_HS=y
-#
-# Diag Support
-#
-# CONFIG_DIAG_CHAR is not set
-#
-# DIAG traffic over USB
-#
-CONFIG_DIAG_OVER_USB=y
-CONFIG_HW_RANDOM=y
-CONFIG_DCC_TTY=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-# CONFIG_I2C_MSM is not set
-CONFIG_I2C_QUP=y
-CONFIG_SLIMBUS_MSM_CTRL=y
-CONFIG_GPIOLIB=y
-CONFIG_DEBUG_GPIO=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_HWMON is not set
-CONFIG_MFD_PM8921_CORE=y
-CONFIG_MFD_PM8821_CORE=y
-CONFIG_REGULATOR=y
-# CONFIG_HID_SUPPORT is not set
-CONFIG_USB_SUPPORT=y
-# CONFIG_USB_ARCH_HAS_HCD is not set
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
-# CONFIG_USB is not set
-# CONFIG_USB_OTG_WHITELIST is not set
-# CONFIG_USB_OTG_BLACKLIST_HUB is not set
-# CONFIG_USB_MUSB_HDRC is not set
-#
-# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
-#
-CONFIG_USB_GADGET=y
-# CONFIG_USB_GADGET_DEBUG is not set
-CONFIG_USB_GADGET_DEBUG_FILES=y
-# CONFIG_USB_GADGET_DEBUG_FS is not set
-CONFIG_USB_GADGET_VBUS_DRAW=2
-CONFIG_USB_GADGET_SELECTED=y
-# CONFIG_USB_GADGET_R8A66597 is not set
-# CONFIG_USB_GADGET_PXA_U2O is not set
-# CONFIG_USB_GADGET_M66592 is not set
-CONFIG_USB_GADGET_CI13XXX_MSM=y
-CONFIG_USB_CI13XXX_MSM=y
-# CONFIG_USB_GADGET_MSM_72K is not set
-CONFIG_USB_GADGET_DUALSPEED=y
-# CONFIG_USB_ZERO is not set
-# CONFIG_USB_ETH is not set
-# CONFIG_USB_G_NCM is not set
-# CONFIG_USB_GADGETFS is not set
-# CONFIG_USB_FUNCTIONFS is not set
-# CONFIG_USB_FILE_STORAGE is not set
-# CONFIG_USB_MASS_STORAGE is not set
-# CONFIG_USB_G_SERIAL is not set
-# CONFIG_USB_G_PRINTER is not set
-CONFIG_USB_ANDROID=y
-# CONFIG_USB_ANDROID_ACM is not set
-CONFIG_USB_ANDROID_ADB=y
-CONFIG_USB_ANDROID_DIAG=y
-# CONFIG_USB_ANDROID_MASS_STORAGE is not set
-# CONFIG_USB_CSW_HACK is not set
-# CONFIG_USB_ANDROID_MTP is not set
-# CONFIG_USB_ANDROID_RNDIS is not set
-# CONFIG_USB_ANDROID_RMNET is not set
-# CONFIG_USB_F_SERIAL is not set
-# CONFIG_USB_CDC_COMPOSITE is not set
-# CONFIG_USB_G_MULTI is not set
-# CONFIG_USB_G_HID is not set
-# CONFIG_USB_G_DBGP is not set
-# CONFIG_USB_QCOM_MAEMO is not set
-#
-# OTG and related infrastructure
-#
-# CONFIG_USB_OTG_UTILS=y
-# CONFIG_USB_GPIO_VBUS is not set
-# CONFIG_USB_ULPI is not set
-# CONFIG_USB_MSM_OTG_72K is not set
-# CONFIG_NOP_USB_XCEIV is not set
-CONFIG_USB_MSM_OTG=y
-# CONFIG_USB_MSM_ACA is not set
-CONFIG_MMC=y
-CONFIG_MMC_MSM=y
-# CONFIG_MMC_MSM_SDC2_SUPPORT is not set
-CONFIG_MMC_MSM_SDC3_SUPPORT=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-# CONFIG_LEDS_MSM_PMIC is not set
-CONFIG_SWITCH=y
-CONFIG_STAGING=y
-# CONFIG_STAGING_EXCLUDE_BUILD is not set
-CONFIG_ANDROID=y
-CONFIG_ANDROID_BINDER_IPC=y
-CONFIG_ANDROID_LOGGER=y
-CONFIG_ANDROID_RAM_CONSOLE=y
-CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION=y
-CONFIG_ANDROID_TIMED_GPIO=y
-CONFIG_ANDROID_LOW_MEMORY_KILLER=y
-CONFIG_MSM_SSBI=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_EXT4_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_TIMER_STATS=y
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_MEMORY_INIT=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_DYNAMIC_DEBUG=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_KEYS=y
-CONFIG_CRYPTO_AUTHENC=y
-CONFIG_CRYPTO_CBC=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_ARC4=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRYPTO_DEFLATE=y
-# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=y
-CONFIG_LIBCRC32C=y
-CONFIG_MSM_SMD=y
-CONFIG_MSM_SMD_PKG4=y
-CONFIG_MSM_SMD_PKT=y
-CONFIG_MSM_SMD_DEBUG=y
-CONFIG_MSM_SMD_TTY=y
-CONFIG_MSM_N_WAY_SMD=y
-CONFIG_MSM_N_WAY_SMSM=y
-CONFIG_MSM_SMD_LOGGING=y
diff --git a/arch/arm/configs/fsm9xxx-perf_defconfig b/arch/arm/configs/fsm9xxx-perf_defconfig
index 50145f9..60d8a32 100644
--- a/arch/arm/configs/fsm9xxx-perf_defconfig
+++ b/arch/arm/configs/fsm9xxx-perf_defconfig
@@ -7,6 +7,7 @@
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
# CONFIG_PERF_EVENTS is not set
diff --git a/arch/arm/configs/fsm9xxx_defconfig b/arch/arm/configs/fsm9xxx_defconfig
index 4019a4f..6913409 100644
--- a/arch/arm/configs/fsm9xxx_defconfig
+++ b/arch/arm/configs/fsm9xxx_defconfig
@@ -7,6 +7,7 @@
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
diff --git a/arch/arm/configs/msm-copper_defconfig b/arch/arm/configs/msm-copper_defconfig
new file mode 100644
index 0000000..9fb4615
--- /dev/null
+++ b/arch/arm/configs/msm-copper_defconfig
@@ -0,0 +1,147 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEBUG=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_SCHED=y
+# CONFIG_FAIR_GROUP_SCHED is not set
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_ASHMEM=y
+CONFIG_EMBEDDED=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=m
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_ARCH_MSM=y
+CONFIG_ARCH_MSMCOPPER=y
+CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y
+# CONFIG_MSM_STACKED_MEMORY is not set
+CONFIG_CPU_HAS_L2_PMU=y
+# CONFIG_MSM_JTAG_V7 is not set
+# CONFIG_MSM_FIQ_SUPPORT is not set
+# CONFIG_MSM_PROC_COMM is not set
+# CONFIG_MSM_DALRPC is not set
+# CONFIG_MSM_HW3D is not set
+CONFIG_MSM_DIRECT_SCLK_ACCESS=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_SMP=y
+# CONFIG_SMP_ON_UP is not set
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_VMALLOC_RESERVE=0x19000000
+CONFIG_USE_OF=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_SUSPEND is not set
+CONFIG_NET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IPV6=y
+CONFIG_IPV6_PRIVACY=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_MISC_DEVICES=y
+CONFIG_SCSI=y
+CONFIG_SCSI_TGT=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_NETDEVICES=y
+# CONFIG_MSM_RMNET is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=m
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_SERIAL_MSM_HSL=y
+CONFIG_SERIAL_MSM_HSL_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_DCC_TTY=y
+CONFIG_DEBUG_GPIO=y
+CONFIG_GPIO_SYSFS=y
+# CONFIG_HWMON is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+# CONFIG_LEDS_MSM_PMIC is not set
+CONFIG_SWITCH=y
+CONFIG_STAGING=y
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_LOGGER=y
+CONFIG_ANDROID_RAM_CONSOLE=y
+CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION=y
+CONFIG_ANDROID_TIMED_GPIO=y
+CONFIG_ANDROID_LOW_MEMORY_KILLER=y
+CONFIG_MSM_SSBI=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT4_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_TIMER_STATS=y
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_DEBUG_USER=y
+CONFIG_KEYS=y
+CONFIG_CRYPTO_AUTHENC=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRC_CCITT=y
+CONFIG_LIBCRC32C=y
diff --git a/arch/arm/configs/msm7627-perf_defconfig b/arch/arm/configs/msm7627-perf_defconfig
index 1cc4b97..78eeadd 100644
--- a/arch/arm/configs/msm7627-perf_defconfig
+++ b/arch/arm/configs/msm7627-perf_defconfig
@@ -11,6 +11,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
diff --git a/arch/arm/configs/msm7627_defconfig b/arch/arm/configs/msm7627_defconfig
index 6f0cb31..7da4daf 100644
--- a/arch/arm/configs/msm7627_defconfig
+++ b/arch/arm/configs/msm7627_defconfig
@@ -11,6 +11,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
diff --git a/arch/arm/configs/msm7627a-perf_defconfig b/arch/arm/configs/msm7627a-perf_defconfig
index 8be0165..4322baf 100644
--- a/arch/arm/configs/msm7627a-perf_defconfig
+++ b/arch/arm/configs/msm7627a-perf_defconfig
@@ -12,6 +12,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
@@ -157,6 +158,7 @@
CONFIG_BT_MSM_SLEEP=y
CONFIG_MSM_BT_POWER=y
CONFIG_RFKILL=y
+CONFIG_RFKILL_PM=y
CONFIG_MTD=y
CONFIG_MTD_TESTS=m
CONFIG_MTD_CMDLINE_PARTS=y
@@ -182,6 +184,8 @@
CONFIG_SMSC911X=y
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
@@ -189,6 +193,8 @@
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MAXTOUCH=y
+CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C=y
+CONFIG_SYNA_MULTI_TOUCH=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
CONFIG_INPUT_GPIO=y
@@ -215,6 +221,8 @@
CONFIG_VIDEO_DEV=y
# CONFIG_MT9T013 is not set
# CONFIG_MT9D112 is not set
+CONFIG_OV5640=y
+CONFIG_WEBCAM_OV7692_QRD=y
CONFIG_WEBCAM_OV9726=y
# CONFIG_MT9P012 is not set
# CONFIG_MT9P012_KM is not set
@@ -231,7 +239,7 @@
CONFIG_FB_MSM_TRIPLE_BUFFER=y
CONFIG_FB_MSM_MDP30=y
CONFIG_FB_MSM_MDP303=y
-CONFIG_FB_MSM_MIPI_RENESAS_CMD_FWVGA_PT_PANEL=y
+CONFIG_FB_MSM_MIPI_PANEL_DETECT=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_SOUND=y
diff --git a/arch/arm/configs/msm7627a_defconfig b/arch/arm/configs/msm7627a_defconfig
index ed4fd41..be8ade5 100644
--- a/arch/arm/configs/msm7627a_defconfig
+++ b/arch/arm/configs/msm7627a_defconfig
@@ -12,6 +12,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
@@ -155,6 +156,7 @@
CONFIG_BT_MSM_SLEEP=y
CONFIG_MSM_BT_POWER=y
CONFIG_RFKILL=y
+CONFIG_RFKILL_PM=y
CONFIG_MTD=y
CONFIG_MTD_TESTS=m
CONFIG_MTD_CMDLINE_PARTS=y
@@ -180,6 +182,8 @@
CONFIG_SMSC911X=y
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
@@ -187,6 +191,8 @@
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MAXTOUCH=y
+CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C=y
+CONFIG_SYNA_MULTI_TOUCH=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
CONFIG_INPUT_GPIO=y
@@ -213,6 +219,8 @@
CONFIG_VIDEO_DEV=y
# CONFIG_MT9T013 is not set
# CONFIG_MT9D112 is not set
+CONFIG_OV5640=y
+CONFIG_WEBCAM_OV7692_QRD=y
CONFIG_WEBCAM_OV9726=y
# CONFIG_MT9P012 is not set
# CONFIG_MT9P012_KM is not set
@@ -229,7 +237,7 @@
CONFIG_FB_MSM_TRIPLE_BUFFER=y
CONFIG_FB_MSM_MDP30=y
CONFIG_FB_MSM_MDP303=y
-CONFIG_FB_MSM_MIPI_RENESAS_CMD_FWVGA_PT_PANEL=y
+CONFIG_FB_MSM_MIPI_PANEL_DETECT=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_SOUND=y
diff --git a/arch/arm/configs/msm7630-perf_defconfig b/arch/arm/configs/msm7630-perf_defconfig
index cc86af8..202d117 100644
--- a/arch/arm/configs/msm7630-perf_defconfig
+++ b/arch/arm/configs/msm7630-perf_defconfig
@@ -11,6 +11,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
@@ -70,7 +71,7 @@
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
+CONFIG_INET_DIAG=y
CONFIG_IPV6=y
CONFIG_IPV6_PRIVACY=y
CONFIG_IPV6_ROUTER_PREF=y
@@ -174,7 +175,7 @@
CONFIG_MSM_BT_POWER=y
# CONFIG_WIRELESS_EXT_SYSFS is not set
CONFIG_RFKILL=y
-# CONFIG_RFKILL_PM is not set
+CONFIG_RFKILL_PM=y
CONFIG_MTD=y
CONFIG_MTD_TESTS=m
CONFIG_MTD_CMDLINE_PARTS=y
@@ -207,6 +208,8 @@
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
CONFIG_SLIP=y
CONFIG_SLIP_COMPRESSED=y
CONFIG_SLIP_MODE_SLIP6=y
diff --git a/arch/arm/configs/msm7630_defconfig b/arch/arm/configs/msm7630_defconfig
index 9645211..bc944d0 100644
--- a/arch/arm/configs/msm7630_defconfig
+++ b/arch/arm/configs/msm7630_defconfig
@@ -11,6 +11,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
@@ -69,7 +70,7 @@
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
+CONFIG_INET_DIAG=y
CONFIG_IPV6=y
CONFIG_IPV6_PRIVACY=y
CONFIG_IPV6_ROUTER_PREF=y
@@ -173,7 +174,7 @@
CONFIG_MSM_BT_POWER=y
# CONFIG_WIRELESS_EXT_SYSFS is not set
CONFIG_RFKILL=y
-# CONFIG_RFKILL_PM is not set
+CONFIG_RFKILL_PM=y
CONFIG_MTD=y
CONFIG_MTD_TESTS=m
CONFIG_MTD_CMDLINE_PARTS=y
@@ -206,6 +207,8 @@
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
CONFIG_SLIP=y
CONFIG_SLIP_COMPRESSED=y
CONFIG_SLIP_MODE_SLIP6=y
diff --git a/arch/arm/configs/msm8660-perf_defconfig b/arch/arm/configs/msm8660-perf_defconfig
index 3315171..c9082f0 100644
--- a/arch/arm/configs/msm8660-perf_defconfig
+++ b/arch/arm/configs/msm8660-perf_defconfig
@@ -18,6 +18,7 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
@@ -103,7 +104,7 @@
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
+CONFIG_INET_DIAG=y
CONFIG_IPV6=y
CONFIG_IPV6_PRIVACY=y
CONFIG_IPV6_ROUTER_PREF=y
@@ -213,6 +214,7 @@
CONFIG_MSM_BT_POWER=y
# CONFIG_WIRELESS_EXT_SYSFS is not set
CONFIG_RFKILL=y
+CONFIG_RFKILL_PM=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_MISC_DEVICES=y
@@ -247,6 +249,8 @@
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
CONFIG_PPP=y
CONFIG_PPP_ASYNC=y
CONFIG_PPP_DEFLATE=y
diff --git a/arch/arm/configs/msm8660_defconfig b/arch/arm/configs/msm8660_defconfig
index 698855a..2569f82 100644
--- a/arch/arm/configs/msm8660_defconfig
+++ b/arch/arm/configs/msm8660_defconfig
@@ -18,6 +18,7 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
@@ -94,7 +95,7 @@
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
+CONFIG_INET_DIAG=y
CONFIG_IPV6=y
CONFIG_IPV6_PRIVACY=y
CONFIG_IPV6_ROUTER_PREF=y
@@ -204,6 +205,7 @@
CONFIG_MSM_BT_POWER=y
# CONFIG_WIRELESS_EXT_SYSFS is not set
CONFIG_RFKILL=y
+CONFIG_RFKILL_PM=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_MISC_DEVICES=y
@@ -240,6 +242,8 @@
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
CONFIG_PPP=y
CONFIG_PPP_ASYNC=y
CONFIG_PPP_DEFLATE=y
diff --git a/arch/arm/configs/msm8960_defconfig b/arch/arm/configs/msm8960_defconfig
index bf15477..2045ff8 100755
--- a/arch/arm/configs/msm8960_defconfig
+++ b/arch/arm/configs/msm8960_defconfig
@@ -19,6 +19,7 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
@@ -31,6 +32,7 @@
CONFIG_MODVERSIONS=y
CONFIG_ARCH_MSM=y
CONFIG_ARCH_MSM8960=y
+CONFIG_ARCH_MSM8930=y
CONFIG_ARCH_APQ8064=y
CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y
CONFIG_MACH_MSM8960_SIM=y
@@ -39,6 +41,9 @@
CONFIG_MACH_MSM8960_MTP=y
CONFIG_MACH_MSM8960_FLUID=y
CONFIG_MACH_MSM8960_LIQUID=y
+CONFIG_MACH_MSM8930_CDP=y
+CONFIG_MACH_MSM8930_MTP=y
+CONFIG_MACH_MSM8930_FLUID=y
CONFIG_MACH_APQ8064_SIM=y
CONFIG_MACH_APQ8064_RUMI3=y
# CONFIG_MSM_STACKED_MEMORY is not set
@@ -96,7 +101,7 @@
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
-# CONFIG_INET_DIAG is not set
+CONFIG_INET_DIAG=y
CONFIG_IPV6=y
CONFIG_IPV6_PRIVACY=y
CONFIG_IPV6_ROUTER_PREF=y
@@ -310,6 +315,7 @@
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_EHSET=y
CONFIG_USB_EHCI_MSM=y
+CONFIG_USB_EHCI_MSM_HSIC=y
CONFIG_USB_ACM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DEBUG=y
diff --git a/arch/arm/configs/msm9615_defconfig b/arch/arm/configs/msm9615_defconfig
index 72908f9..fa6475b 100644
--- a/arch/arm/configs/msm9615_defconfig
+++ b/arch/arm/configs/msm9615_defconfig
@@ -20,6 +20,7 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_KALLSYMS_ALL=y
CONFIG_EMBEDDED=y
@@ -87,6 +88,7 @@
CONFIG_DIAG_CHAR=y
CONFIG_HVC_DCC=y
CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_MSM=y
CONFIG_DCC_TTY=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
@@ -97,12 +99,18 @@
CONFIG_SPI_SPIDEV=m
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
-# CONFIG_HWMON is not set
+CONFIG_HWMON=y
+CONFIG_SENSORS_PM8XXX_ADC=y
CONFIG_THERMAL=y
CONFIG_THERMAL_TSENS8960=y
CONFIG_MFD_PM8018_CORE=y
-# CONFIG_MFD_PM8XXX_PWM is not set
+CONFIG_MFD_PM8XXX_PWM=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_PM8XXX=y
+# CONFIG_LEDS_MSM_PMIC is not set
CONFIG_REGULATOR=y
+CONFIG_REGULATOR_GPIO=y
# CONFIG_HID_SUPPORT is not set
CONFIG_USB=y
CONFIG_USB_GADGET=y
@@ -110,6 +118,7 @@
CONFIG_USB_G_ANDROID=y
CONFIG_SWITCH=y
CONFIG_NET=y
+CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
@@ -148,7 +157,7 @@
# CONFIG_MMC_SDHCI is not set
CONFIG_MMC_MSM=y
CONFIG_MMC_MSM_SDIO_SUPPORT=y
-# CONFIG_MMC_MSM_CARD_HW_DETECTION is not set
+CONFIG_MMC_MSM_CARD_HW_DETECTION=y
CONFIG_MMC_MSM_SDC1_SUPPORT=y
# CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT is not set
CONFIG_MMC_MSM_SDC2_SUPPORT=y
@@ -157,6 +166,10 @@
# CONFIG_MMC_MSM_SDC4_SUPPORT is not set
# CONFIG_MMC_MSM_SDC5_SUPPORT is not set
CONFIG_MMC_MSM_SPS_SUPPORT=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_INTF_ALARM is not set
+# CONFIG_RTC_DRV_MSM is not set
+CONFIG_RTC_DRV_PM8XXX=y
CONFIG_MSM_SSBI=y
CONFIG_SPS=y
CONFIG_SPS_SUPPORT_BAMDMA=y
@@ -192,6 +205,27 @@
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_DEFLATE=y
-# CONFIG_CRYPTO_HW is not set
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_DEV_QCRYPTO=m
+CONFIG_CRYPTO_DEV_QCE=m
+CONFIG_CRYPTO_DEV_QCEDEV=m
CONFIG_CRC_CCITT=y
CONFIG_LIBCRC32C=y
+
+CONFIG_WIRELESS=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=m
+CONFIG_NETDEVICES=y
+CONFIG_WLAN=y
+CONFIG_MSM_RMNET=y
+CONFIG_HOSTAP=m
+CONFIG_WIRELESS_EXT=y
+CONFIG_WEXT_SPY=y
+CONFIG_WEXT_PRIV=y
+CONFIG_LIB80211_CRYPT_WEP=m
+CONFIG_LIB80211_CRYPT_CCMP=m
+CONFIG_LIB80211_CRYPT_TKIP=m
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 946f4d7..b44f46f 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -35,6 +35,7 @@
struct meminfo *);
void (*reserve)(void);/* reserve mem blocks */
void (*map_io)(void);/* IO mapping function */
+ void (*init_very_early)(void);
void (*init_early)(void);
void (*init_irq)(void);
struct sys_timer *timer; /* system tick timer */
@@ -70,4 +71,11 @@
#define MACHINE_END \
};
+#define DT_MACHINE_START(_name, _namestr) \
+static const struct machine_desc __mach_desc_##_name \
+ __used \
+ __attribute__((__section__(".arch.info.init"))) = { \
+ .nr = ~0, \
+ .name = _namestr,
+
#endif
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
index 11b8708..6f65ca8 100644
--- a/arch/arm/include/asm/prom.h
+++ b/arch/arm/include/asm/prom.h
@@ -16,11 +16,6 @@
#include <asm/setup.h>
#include <asm/irq.h>
-static inline void irq_dispose_mapping(unsigned int virq)
-{
- return;
-}
-
extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
extern void arm_dt_memblock_reserve(void);
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index e42d96a..787b12d 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -33,6 +33,11 @@
asmlinkage void do_IPI(int ipinr, struct pt_regs *regs);
/*
+ * Called from C code, this handles an IPI.
+ */
+void handle_IPI(int ipinr, struct pt_regs *regs);
+
+/*
* Setup the set of possible CPUs (via set_cpu_possible)
*/
extern void smp_init_cpus(void);
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index 0cdd7b4..1a33e9d 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -132,17 +132,3 @@
return mdesc_best;
}
-
-/**
- * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq#
- *
- * Currently the mapping mechanism is trivial; simple flat hwirq numbers are
- * mapped 1:1 onto Linux irq numbers. Cascaded irq controllers are not
- * supported.
- */
-unsigned int irq_create_of_mapping(struct device_node *controller,
- const u32 *intspec, unsigned int intsize)
-{
- return intspec[0];
-}
-EXPORT_SYMBOL_GPL(irq_create_of_mapping);
diff --git a/arch/arm/kernel/perf_event_msm.c b/arch/arm/kernel/perf_event_msm.c
index ae8bfcb..fb53650 100644
--- a/arch/arm/kernel/perf_event_msm.c
+++ b/arch/arm/kernel/perf_event_msm.c
@@ -16,6 +16,11 @@
#include "../vfp/vfpinstr.h"
#ifdef CONFIG_CPU_V7
+#define SCORPION_EVT_PREFIX 1
+#define SCORPION_MAX_L1_REG 4
+
+static u32 scorpion_evt_type_base[] = {0x4c, 0x50, 0x54, 0x58, 0x5c};
+
enum scorpion_perf_common {
SCORPION_EVT_START_IDX = 0x4c,
SCORPION_ICACHE_EXPL_INV = 0x4c,
@@ -356,6 +361,25 @@
struct scorpion_evt *evtinfo)
{
u32 idx;
+ u8 prefix;
+ u8 reg;
+ u8 code;
+ u8 group;
+
+ prefix = (scorpion_evt_type & 0xF0000) >> 16;
+ if (prefix == SCORPION_EVT_PREFIX) {
+ reg = (scorpion_evt_type & 0x0F000) >> 12;
+ code = (scorpion_evt_type & 0x00FF0) >> 4;
+ group = scorpion_evt_type & 0x0000F;
+
+ if ((group > 3) || (reg > SCORPION_MAX_L1_REG))
+ return -EINVAL;
+
+ evtinfo->group_setval = 0x80000000 | (code << (group * 8));
+ evtinfo->groupcode = reg;
+ evtinfo->armv7_evt_type = scorpion_evt_type_base[reg] | group;
+ return evtinfo->armv7_evt_type;
+ }
if (scorpion_evt_type < SCORPION_EVT_START_IDX || scorpion_evt_type >=
(ARRAY_SIZE(scorpion_event) + SCORPION_EVT_START_IDX))
@@ -561,7 +585,6 @@
*/
if (idx != ARMV7_CYCLE_COUNTER) {
val = hwc->config_base;
- val &= ARMV7_EVTSEL_MASK;
if (val > 0x40) {
event = get_scorpion_evtinfo(val, &evtinfo);
if (event == -EINVAL)
@@ -601,7 +624,6 @@
*/
if (idx != ARMV7_CYCLE_COUNTER) {
val = hwc->config_base;
- val &= ARMV7_EVTSEL_MASK;
if (val < 0x40) {
armv7_pmnc_write_evtsel(idx, hwc->config_base);
} else {
@@ -670,7 +692,7 @@
.disable = scorpion_pmu_disable_event,
.read_counter = armv7pmu_read_counter,
.write_counter = armv7pmu_write_counter,
- .raw_event_mask = 0xFF,
+ .raw_event_mask = 0xFFFFF,
.get_event_idx = armv7pmu_get_event_idx,
.start = armv7pmu_start,
.stop = armv7pmu_stop,
diff --git a/arch/arm/kernel/perf_event_msm_krait.c b/arch/arm/kernel/perf_event_msm_krait.c
index cb94d64..62509b4 100644
--- a/arch/arm/kernel/perf_event_msm_krait.c
+++ b/arch/arm/kernel/perf_event_msm_krait.c
@@ -365,7 +365,7 @@
static struct arm_pmu krait_pmu = {
.handle_irq = armv7pmu_handle_irq,
-#ifdef CONFIG_ARCH_MSM_SMP
+#ifdef CONFIG_MSM_SMP
.secondary_enable = scorpion_secondary_enable,
.secondary_disable = scorpion_secondary_disable,
#endif
diff --git a/arch/arm/kernel/perf_event_msm_krait_l2.c b/arch/arm/kernel/perf_event_msm_krait_l2.c
index e1c3fb5..0512e64 100644
--- a/arch/arm/kernel/perf_event_msm_krait_l2.c
+++ b/arch/arm/kernel/perf_event_msm_krait_l2.c
@@ -10,7 +10,7 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#ifdef CONFIG_CPU_HAS_L2_PMU
+#ifdef CONFIG_ARCH_MSM_KRAIT
#include <linux/irq.h>
diff --git a/arch/arm/kernel/perf_event_msm_l2.c b/arch/arm/kernel/perf_event_msm_l2.c
index db8481f..3cb251b 100644
--- a/arch/arm/kernel/perf_event_msm_l2.c
+++ b/arch/arm/kernel/perf_event_msm_l2.c
@@ -10,7 +10,7 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#ifdef CONFIG_CPU_HAS_L2_PMU
+#ifdef CONFIG_ARCH_MSM8x60
#include <linux/irq.h>
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 9705e8c..eaf8690 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -903,6 +903,9 @@
parse_early_param();
+ if (mdesc->init_very_early)
+ mdesc->init_very_early();
+
sanity_check_meminfo();
arm_memblock_init(&meminfo, mdesc);
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 5478f55..1455efe 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -562,6 +562,11 @@
*/
asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
{
+ handle_IPI(ipinr, regs);
+}
+
+void handle_IPI(int ipinr, struct pt_regs *regs)
+{
unsigned int cpu = smp_processor_id();
struct pt_regs *old_regs = set_irq_regs(regs);
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index ad07bbb..756603e 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -43,7 +43,6 @@
select MIGRATION
select ARCH_MEMORY_PROBE
select ARCH_MEMORY_REMOVE
- select DONT_RESERVE_FROM_MOVABLE_ZONE
select MSM_GPIOMUX
select RESERVE_FIRST_PAGE
select MSM_DALRPC
@@ -135,7 +134,7 @@
select MSM_SPM_V2
select MSM_L2_SPM
select MSM_NATIVE_RESTART
- select DONT_MAP_HOLE_AFTER_MEMBANK0
+ select DONT_MAP_HOLE_AFTER_MEMBANK0
select MSM_REMOTE_SPINLOCK_SFPB
select ARCH_POPULATES_NODE_MAP
select ARCH_SPARSEMEM_ENABLE
@@ -147,6 +146,36 @@
select ARCH_MEMORY_REMOVE
select DONT_RESERVE_FROM_MOVABLE_ZONE
+config ARCH_MSM8930
+ bool "MSM8930"
+ select ARCH_MSM_KRAITMP
+ select ARM_GIC
+ select CPU_V7
+ select MSM_V2_TLMM
+ select MSM_GPIOMUX
+ select MSM_SCM if SMP
+ select MSM_DIRECT_SCLK_ACCESS
+ select REGULATOR
+ select MSM_RPM
+ select MSM_XO
+ select MSM_QDSP6_APR
+ select MSM_PIL
+ select MSM_AUDIO_QDSP6 if SND_SOC
+ select CPU_HAS_L2_PMU
+ select MSM_SPM_V2
+ select MSM_L2_SPM
+ select MSM_NATIVE_RESTART
+ select DONT_MAP_HOLE_AFTER_MEMBANK0
+ select MSM_REMOTE_SPINLOCK_SFPB
+ select ARCH_POPULATES_NODE_MAP
+ select ARCH_SPARSEMEM_ENABLE
+ select ARCH_HAS_HOLES_MEMORYMODEL
+ select MEMORY_HOTPLUG
+ select MEMORY_HOTREMOVE
+ select MIGRATION
+ select ARCH_MEMORY_PROBE
+ select ARCH_MEMORY_REMOVE
+
config ARCH_APQ8064
bool "APQ8064"
select ARCH_MSM_KRAITMP
@@ -158,6 +187,15 @@
select MSM_GPIOMUX
select MSM_REMOTE_SPINLOCK_SFPB
+config ARCH_MSMCOPPER
+ bool "MSM Copper"
+ select ARCH_MSM_KRAITMP
+ select MSM_V2_TLMM
+ select ARM_GIC
+ select CPU_V7
+ select MSM_SCM if SMP
+ select MSM_GPIOMUX
+
config ARCH_FSM9XXX
bool "FSM9XXX"
select ARCH_MSM_SCORPION
@@ -544,6 +582,24 @@
help
Support for the Qualcomm MSM8960 LIQUID device.
+config MACH_MSM8930_CDP
+ depends on ARCH_MSM8930
+ bool "MSM8930 CDP"
+ help
+ Support for the Qualcomm MSM8930 CDP device.
+
+config MACH_MSM8930_MTP
+ depends on ARCH_MSM8930
+ bool "MSM8930 MTP"
+ help
+ Support for the Qualcomm MSM8930 MTP device.
+
+config MACH_MSM8930_FLUID
+ depends on ARCH_MSM8930
+ bool "MSM8930 FLUID"
+ help
+ Support for the Qualcomm MSM8930 FLUID device.
+
config MACH_MSM9615_CDP
depends on ARCH_MSM9615
bool "MSM9615 CDP"
@@ -601,6 +657,8 @@
default "0x40800000" if ARCH_MSM9615
default "0x80200000" if ARCH_APQ8064
default "0x80200000" if ARCH_MSM8960
+ default "0x80200000" if ARCH_MSM8930
+ default "0x80200000" if ARCH_MSMCOPPER
default "0x10000000" if ARCH_FSM9XXX
default "0x00200000" if !MSM_STACKED_MEMORY
default "0x00000000" if ARCH_QSD8X50 && MSM_SOC_REV_A
@@ -1656,7 +1714,7 @@
config MSM_SHOW_RESUME_IRQ
bool "Enable logging of interrupts that could have caused resume"
- depends on (ARCH_MSM8X60 || ARCH_MSM8960)
+ depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSMCOPPER)
default n
help
This option logs wake up interrupts that have triggered just before
@@ -1737,4 +1795,12 @@
Enabling this driver allows configuring L2 SPM for low power modes
on supported chipsets.
+config MSM_MULTIMEDIA_USE_ION
+ bool "Multimedia suport using Ion"
+ depends on ION_MSM
+ help
+ Enable support for multimedia drivers using Ion for buffer management
+ instead of pmem. Selecting this may also involve userspace
+ dependencies as well.
+
endif
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 025f1c7..8693875 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -73,7 +73,7 @@
obj-$(CONFIG_MSM_BAM_DMUX) += bam_dmux.o
obj-$(CONFIG_MSM_SMD_LOGGING) += smem_log.o
obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o remote_spinlock.o
- obj-y += socinfo.o
+obj-y += socinfo.o
ifndef CONFIG_ARCH_MSM9615
ifndef CONFIG_ARCH_APQ8064
ifndef CONFIG_ARCH_MSM8960
@@ -87,10 +87,12 @@
ifndef CONFIG_ARCH_MSM8960
ifndef CONFIG_ARCH_MSM8X60
ifndef CONFIG_ARCH_APQ8064
+ifndef CONFIG_ARCH_MSMCOPPER
obj-y += nand_partitions.o
endif
endif
endif
+endif
obj-$(CONFIG_MSM_SDIO_TTY) += sdio_tty.o sdio_tty_ciq.o
obj-$(CONFIG_MSM_SMD_TTY) += smd_tty.o
obj-$(CONFIG_MSM_SMD_QMI) += smd_qmi.o
@@ -139,6 +141,7 @@
obj-$(CONFIG_ARCH_MSM7X27A) += pm2.o
obj-$(CONFIG_ARCH_MSM7X25) += pm.o
obj-$(CONFIG_ARCH_MSM7X01A) += pm.o
+ obj-y += pm-boot.o
else
obj-y += no-pm.o
endif
@@ -167,7 +170,7 @@
obj-y += subsystem_notif.o
obj-y += subsystem_restart.o
obj-y += ramdump.o
- obj-$(CONFIG_ARCH_MSM8X60) += subsystem-fatal-8x60.o
+ obj-$(CONFIG_ARCH_MSM8X60) += modem-8660.o lpass-8660.o
endif
obj-$(CONFIG_MSM_SYSMON_COMM) += sysmon.o
obj-$(CONFIG_MSM_MODEM_8960) += modem-8960.o
@@ -219,11 +222,15 @@
obj-$(CONFIG_MACH_MSM8960_CDP) += board-msm8960.o devices-8960.o board-msm8960-regulator.o
obj-$(CONFIG_MACH_MSM8960_MTP) += board-msm8960.o devices-8960.o board-msm8960-regulator.o
obj-$(CONFIG_MACH_MSM8960_FLUID) += board-msm8960.o devices-8960.o board-msm8960-regulator.o
+obj-$(CONFIG_MACH_MSM8930_CDP) += board-msm8960.o devices-8960.o board-msm8960-regulator.o
+obj-$(CONFIG_MACH_MSM8930_MTP) += board-msm8960.o devices-8960.o board-msm8960-regulator.o
+obj-$(CONFIG_MACH_MSM8930_FLUID) += board-msm8960.o devices-8960.o board-msm8960-regulator.o
obj-$(CONFIG_ARCH_MSM8960) += bms-batterydata.o
obj-$(CONFIG_ARCH_APQ8064) += board-apq8064.o devices-8064.o board-apq8064-regulator.o
obj-$(CONFIG_ARCH_MSM9615) += board-9615.o devices-9615.o board-9615-regulator.o
obj-$(CONFIG_ARCH_MSM9615) += clock-local.o clock-9615.o acpuclock-9615.o clock-rpm.o
obj-$(CONFIG_ARCH_MSM9615) += rpm-regulator.o rpm-regulator-9615.o
+obj-$(CONFIG_ARCH_MSMCOPPER) += board-copper.o board-dt.o
obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire.o board-sapphire-gpio.o
obj-$(CONFIG_MACH_SAPPHIRE) += board-sapphire-keypad.o board-sapphire-panel.o
@@ -261,6 +268,7 @@
obj-$(CONFIG_ARCH_MSM8960) += gpiomux-v2.o gpiomux.o
obj-$(CONFIG_ARCH_APQ8064) += gpiomux-v2.o gpiomux.o
obj-$(CONFIG_ARCH_MSM9615) += gpiomux-v2.o gpiomux.o
+obj-$(CONFIG_ARCH_MSMCOPPER) += gpiomux-v2.o gpiomux.o
ifdef CONFIG_FSM9XXX_TLMM
obj-y += gpio-fsm9xxx.o
diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot
index 3e8ea9f..bc15a01 100644
--- a/arch/arm/mach-msm/Makefile.boot
+++ b/arch/arm/mach-msm/Makefile.boot
@@ -35,9 +35,15 @@
# MSM8960
zreladdr-$(CONFIG_ARCH_MSM8960) := 0x80208000
+# MSM8930
+ zreladdr-$(CONFIG_ARCH_MSM8930) := 0x80208000
+
# APQ8064
zreladdr-$(CONFIG_ARCH_APQ8064) := 0x80208000
+# MSMCOPPER
+ zreladdr-$(CONFIG_ARCH_MSMCOPPER) := 0x80208000
+
# MSM9615
zreladdr-$(CONFIG_ARCH_MSM9615) := 0x40808000
diff --git a/arch/arm/mach-msm/acpuclock-8960.c b/arch/arm/mach-msm/acpuclock-8960.c
index cfc7dd0..93629d1 100644
--- a/arch/arm/mach-msm/acpuclock-8960.c
+++ b/arch/arm/mach-msm/acpuclock-8960.c
@@ -509,7 +509,6 @@
/* Move CPU to HFPLL source. */
set_pri_clk_src(sc, tgt_s->pri_src_sel);
} else if (strt_s->src == HFPLL && tgt_s->src != HFPLL) {
- /* TODO: Enable source. */
/*
* If responding to CPU_DEAD we must be running on another
* CPU. Therefore, we can't access the downed CPU's CP15
@@ -533,12 +532,9 @@
*/
if (reason != SETRATE_HOTPLUG || sc == &scalable[L2])
set_pri_clk_src(sc, tgt_s->pri_src_sel);
- /* TODO: Disable source. */
} else {
- /* TODO: Enable source. */
if (reason != SETRATE_HOTPLUG || sc == &scalable[L2])
set_sec_clk_src(sc, tgt_s->sec_src_sel);
- /* TODO: Disable source. */
}
sc->current_speed = tgt_s;
@@ -549,7 +545,7 @@
unsigned int vdd_dig, enum setrate_reason reason)
{
struct scalable *sc = &scalable[cpu];
- int rc;
+ int rc = 0;
/*
* Increase vdd_mem active-set before vdd_dig.
@@ -981,7 +977,7 @@
struct acpu_level *l, *max_acpu_level = NULL;
/* Select frequency tables. */
- if (cpu_is_msm8960()) {
+ if (cpu_is_msm8960() || cpu_is_msm8930()) {
uint32_t pte_efuse, pvs;
pte_efuse = readl_relaxed(QFPROM_PTE_EFUSE_ADDR);
diff --git a/arch/arm/mach-msm/acpuclock-9615.c b/arch/arm/mach-msm/acpuclock-9615.c
index 924a46a..ebc7f1b 100644
--- a/arch/arm/mach-msm/acpuclock-9615.c
+++ b/arch/arm/mach-msm/acpuclock-9615.c
@@ -27,6 +27,7 @@
#include <mach/board.h>
#include <mach/msm_iomap.h>
+#include <mach/rpm-regulator.h>
#include "acpuclock.h"
@@ -36,6 +37,9 @@
#define REG_CLKDIV_1 (MSM_APCS_GLB_BASE + 0x14)
#define REG_CLKOUTSEL (MSM_APCS_GLB_BASE + 0x18)
+#define MAX_VDD_CPU 1150000
+#define MAX_VDD_MEM 1150000
+
enum clk_src {
SRC_CXO,
SRC_PLL0,
@@ -62,6 +66,8 @@
int src;
unsigned int src_sel;
unsigned int src_div;
+ unsigned int vdd_cpu;
+ unsigned int vdd_mem;
};
struct acpuclk_state {
@@ -74,11 +80,11 @@
};
static struct clkctl_acpu_speed acpu_freq_tbl[] = {
- { 0, 19200, SRC_CXO, 0, 0 },
- { 1, 138000, SRC_PLL0, 6, 1 },
- { 1, 276000, SRC_PLL0, 6, 0 },
- { 1, 384000, SRC_PLL8, 3, 0 },
- { 1, 440000, SRC_PLL9, 2, 0 },
+ { 0, 19200, SRC_CXO, 0, 0, 950000, 1050000 },
+ { 1, 138000, SRC_PLL0, 6, 1, 950000, 1050000 },
+ { 1, 276000, SRC_PLL0, 6, 0, 1050000, 1050000 },
+ { 1, 384000, SRC_PLL8, 3, 0, 1150000, 1150000 },
+ { 1, 440000, SRC_PLL9, 2, 0, 1150000, 1150000 },
{ 0 }
};
@@ -98,6 +104,53 @@
udelay(1);
}
+/* Apply any per-cpu voltage increases. */
+static int increase_vdd(unsigned int vdd_cpu, unsigned int vdd_mem)
+{
+ int rc = 0;
+
+ /*
+ * Increase vdd_mem active-set before vdd_cpu.
+ * vdd_mem should be >= vdd_cpu.
+ */
+ rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8018_L9, RPM_VREG_VOTER1,
+ vdd_mem, MAX_VDD_MEM, 0);
+ if (rc) {
+ pr_err("vdd_mem increase failed (%d)\n", rc);
+ return rc;
+ }
+
+ rc = rpm_vreg_set_voltage(RPM_VREG_ID_PM8018_S1, RPM_VREG_VOTER1,
+ vdd_cpu, MAX_VDD_CPU, 0);
+ if (rc)
+ pr_err("vdd_cpu increase failed (%d)\n", rc);
+
+ return rc;
+}
+
+/* Apply any per-cpu voltage decreases. */
+static void decrease_vdd(unsigned int vdd_cpu, unsigned int vdd_mem)
+{
+ int ret;
+
+ /* Update CPU voltage. */
+ ret = rpm_vreg_set_voltage(RPM_VREG_ID_PM8018_S1, RPM_VREG_VOTER1,
+ vdd_cpu, MAX_VDD_CPU, 0);
+ if (ret) {
+ pr_err("vdd_cpu decrease failed (%d)\n", ret);
+ return;
+ }
+
+ /*
+ * Decrease vdd_mem active-set after vdd_cpu.
+ * vdd_mem should be >= vdd_cpu.
+ */
+ ret = rpm_vreg_set_voltage(RPM_VREG_ID_PM8018_L9, RPM_VREG_VOTER1,
+ vdd_mem, MAX_VDD_MEM, 0);
+ if (ret)
+ pr_err("vdd_mem decrease failed (%d)\n", ret);
+}
+
static int acpuclk_9615_set_rate(int cpu, unsigned long rate,
enum setrate_reason reason)
{
@@ -122,6 +175,14 @@
goto out;
}
+ /* Increase VDD levels if needed. */
+ if ((reason == SETRATE_CPUFREQ || reason == SETRATE_INIT)
+ && (tgt_s->khz > strt_s->khz)) {
+ rc = increase_vdd(tgt_s->vdd_cpu, tgt_s->vdd_mem);
+ if (rc)
+ goto out;
+ }
+
pr_debug("Switching from CPU rate %u KHz -> %u KHz\n",
strt_s->khz, tgt_s->khz);
@@ -133,6 +194,14 @@
drv_state.current_speed = tgt_s;
pr_debug("CPU speed change complete\n");
+ /* Nothing else to do for SWFI or power-collapse. */
+ if (reason == SETRATE_SWFI || reason == SETRATE_PC)
+ goto out;
+
+ /* Drop VDD levels if we can. */
+ if (tgt_s->khz < strt_s->khz)
+ decrease_vdd(tgt_s->vdd_cpu, tgt_s->vdd_mem);
+
out:
if (reason == SETRATE_CPUFREQ)
mutex_unlock(&drv_state.lock);
diff --git a/arch/arm/mach-msm/bam_dmux.c b/arch/arm/mach-msm/bam_dmux.c
index 5ed4456..a9b1a77 100644
--- a/arch/arm/mach-msm/bam_dmux.c
+++ b/arch/arm/mach-msm/bam_dmux.c
@@ -24,13 +24,16 @@
#include <linux/sched.h>
#include <linux/skbuff.h>
#include <linux/debugfs.h>
+#include <linux/clk.h>
#include <mach/sps.h>
#include <mach/bam_dmux.h>
#include <mach/msm_smsm.h>
+#include <mach/subsystem_notif.h>
#define BAM_CH_LOCAL_OPEN 0x1
#define BAM_CH_REMOTE_OPEN 0x2
+#define BAM_CH_IN_RESET 0x4
#define BAM_MUX_HDR_MAGIC_NO 0x33fc
@@ -102,6 +105,7 @@
char is_cmd;
uint32_t len;
struct work_struct work;
+ struct list_head list_node;
};
struct rx_pkt_info {
@@ -119,6 +123,7 @@
#define BUFFER_SIZE 2048
#define NUM_BUFFERS 32
static struct sps_bam_props a2_props;
+static u32 a2_device_handle;
static struct sps_pipe *bam_tx_pipe;
static struct sps_pipe *bam_rx_pipe;
static struct sps_connect tx_connection;
@@ -135,6 +140,8 @@
static LIST_HEAD(bam_rx_pool);
static DEFINE_MUTEX(bam_rx_pool_lock);
+static LIST_HEAD(bam_tx_pool);
+static DEFINE_MUTEX(bam_tx_pool_lock);
struct bam_mux_hdr {
uint16_t magic_num;
@@ -145,6 +152,7 @@
uint16_t pkt_len;
};
+static void notify_all(int event, unsigned long data);
static void bam_mux_write_done(struct work_struct *work);
static void handle_bam_mux_cmd(struct work_struct *work);
static void rx_timer_work_func(struct work_struct *work);
@@ -155,6 +163,40 @@
static struct workqueue_struct *bam_mux_rx_workqueue;
static struct workqueue_struct *bam_mux_tx_workqueue;
+/* A2 power collaspe */
+#define UL_TIMEOUT_DELAY 1000 /* in ms */
+static void toggle_apps_ack(void);
+static void reconnect_to_bam(void);
+static void disconnect_to_bam(void);
+static void ul_wakeup(void);
+static void ul_timeout(struct work_struct *work);
+static void vote_dfab(void);
+static void unvote_dfab(void);
+static void kickoff_ul_wakeup_func(struct work_struct *work);
+
+static int bam_is_connected;
+static DEFINE_MUTEX(wakeup_lock);
+static struct completion ul_wakeup_ack_completion;
+static struct completion bam_connection_completion;
+static struct delayed_work ul_timeout_work;
+static int ul_packet_written;
+static struct clk *dfab_clk;
+static DEFINE_RWLOCK(ul_wakeup_lock);
+static DECLARE_WORK(kickoff_ul_wakeup, kickoff_ul_wakeup_func);
+static int bam_connection_is_active;
+/* End A2 power collaspe */
+
+/* subsystem restart */
+static int restart_notifier_cb(struct notifier_block *this,
+ unsigned long code,
+ void *data);
+
+static struct notifier_block restart_notifier = {
+ .notifier_call = restart_notifier_cb,
+};
+static int in_global_reset;
+/* end subsystem restart */
+
#define bam_ch_is_open(x) \
(bam_ch[(x)].status == (BAM_CH_LOCAL_OPEN | BAM_CH_REMOTE_OPEN))
@@ -164,11 +206,17 @@
#define bam_ch_is_remote_open(x) \
(bam_ch[(x)].status & BAM_CH_REMOTE_OPEN)
+#define bam_ch_is_in_reset(x) \
+ (bam_ch[(x)].status & BAM_CH_IN_RESET)
+
static void queue_rx(void)
{
void *ptr;
struct rx_pkt_info *info;
+ if (in_global_reset)
+ return;
+
info = kmalloc(sizeof(struct rx_pkt_info), GFP_KERNEL);
if (!info)
return; /*need better way to handle this */
@@ -312,10 +360,15 @@
pkt->len = len;
pkt->dma_address = dma_address;
pkt->is_cmd = 1;
+ INIT_WORK(&pkt->work, bam_mux_write_done);
+ mutex_lock(&bam_tx_pool_lock);
+ list_add_tail(&pkt->list_node, &bam_tx_pool);
+ mutex_unlock(&bam_tx_pool_lock);
rc = sps_transfer_one(bam_tx_pipe, dma_address, len,
pkt, SPS_IOVEC_FLAG_INT | SPS_IOVEC_FLAG_EOT);
mutex_unlock(&bam_mux_lock);
+ ul_packet_written = 1;
return rc;
}
@@ -325,8 +378,20 @@
struct bam_mux_hdr *hdr;
struct tx_pkt_info *info;
unsigned long event_data;
+ struct list_head *node;
+ if (in_global_reset)
+ return;
+ mutex_lock(&bam_tx_pool_lock);
+ node = bam_tx_pool.next;
+ list_del(node);
+ mutex_unlock(&bam_tx_pool_lock);
info = container_of(work, struct tx_pkt_info, work);
+ if (info->is_cmd) {
+ kfree(info->skb);
+ kfree(info);
+ return;
+ }
skb = info->skb;
kfree(info);
hdr = (struct bam_mux_hdr *)skb->data;
@@ -365,6 +430,14 @@
}
spin_unlock_irqrestore(&bam_ch[id].lock, flags);
+ read_lock(&ul_wakeup_lock);
+ if (!bam_is_connected) {
+ read_unlock(&ul_wakeup_lock);
+ ul_wakeup();
+ read_lock(&ul_wakeup_lock);
+ notify_all(BAM_DMUX_UL_CONNECTED, (unsigned long)(NULL));
+ }
+
/* if skb do not have any tailroom for padding,
copy the skb into a new expanded skb */
if ((skb->len & 0x3) && (skb_tailroom(skb) < (4 - (skb->len & 0x3)))) {
@@ -419,8 +492,13 @@
pkt->dma_address = dma_address;
pkt->is_cmd = 0;
INIT_WORK(&pkt->work, bam_mux_write_done);
+ mutex_lock(&bam_tx_pool_lock);
+ list_add_tail(&pkt->list_node, &bam_tx_pool);
+ mutex_unlock(&bam_tx_pool_lock);
rc = sps_transfer_one(bam_tx_pipe, dma_address, skb->len,
pkt, SPS_IOVEC_FLAG_INT | SPS_IOVEC_FLAG_EOT);
+ ul_packet_written = 1;
+ read_unlock(&ul_wakeup_lock);
return rc;
}
@@ -464,6 +542,14 @@
bam_ch[id].status |= BAM_CH_LOCAL_OPEN;
spin_unlock_irqrestore(&bam_ch[id].lock, flags);
+ read_lock(&ul_wakeup_lock);
+ if (!bam_is_connected) {
+ read_unlock(&ul_wakeup_lock);
+ ul_wakeup();
+ read_lock(&ul_wakeup_lock);
+ notify_all(BAM_DMUX_UL_CONNECTED, (unsigned long)(NULL));
+ }
+
hdr->magic_num = BAM_MUX_HDR_MAGIC_NO;
hdr->cmd = BAM_MUX_HDR_CMD_OPEN;
hdr->reserved = 0;
@@ -472,6 +558,7 @@
hdr->pad_len = 0;
rc = bam_mux_write_cmd((void *)hdr, sizeof(struct bam_mux_hdr));
+ read_unlock(&ul_wakeup_lock);
open_done:
DBG("%s: opened ch %d\n", __func__, id);
@@ -489,13 +576,27 @@
DBG("%s: closing ch %d\n", __func__, id);
if (!bam_mux_initialized)
return -ENODEV;
- spin_lock_irqsave(&bam_ch[id].lock, flags);
+ read_lock(&ul_wakeup_lock);
+ if (!bam_is_connected && !bam_ch_is_in_reset(id)) {
+ read_unlock(&ul_wakeup_lock);
+ ul_wakeup();
+ read_lock(&ul_wakeup_lock);
+ notify_all(BAM_DMUX_UL_CONNECTED, (unsigned long)(NULL));
+ }
+
+ spin_lock_irqsave(&bam_ch[id].lock, flags);
bam_ch[id].notify = NULL;
bam_ch[id].priv = NULL;
bam_ch[id].status &= ~BAM_CH_LOCAL_OPEN;
spin_unlock_irqrestore(&bam_ch[id].lock, flags);
+ if (bam_ch_is_in_reset(id)) {
+ read_unlock(&ul_wakeup_lock);
+ bam_ch[id].status &= ~BAM_CH_IN_RESET;
+ return 0;
+ }
+
hdr = kmalloc(sizeof(struct bam_mux_hdr), GFP_KERNEL);
if (hdr == NULL) {
pr_err("%s: hdr kmalloc failed. ch: %d\n", __func__, id);
@@ -509,6 +610,7 @@
hdr->pad_len = 0;
rc = bam_mux_write_cmd((void *)hdr, sizeof(struct bam_mux_hdr));
+ read_unlock(&ul_wakeup_lock);
DBG("%s: closed ch %d\n", __func__, id);
return rc;
@@ -526,6 +628,8 @@
while (1) { /* timer loop */
++inactive_cycles;
while (1) { /* deplete queue loop */
+ if (in_global_reset)
+ return;
sps_get_iovec(bam_rx_pipe, &iov);
if (iov.addr == 0)
break;
@@ -569,6 +673,8 @@
}
polling_mode = 0;
}
+ if (in_global_reset)
+ return;
/* handle race condition - missed packet? */
sps_get_iovec(bam_rx_pipe, &iov);
if (iov.addr == 0)
@@ -594,21 +700,21 @@
DBG("%s: event %d notified\n", __func__, notify->event_id);
+ if (in_global_reset)
+ return;
+
switch (notify->event_id) {
case SPS_EVENT_EOT:
pkt = notify->data.transfer.user;
- if (!pkt->is_cmd) {
+ if (!pkt->is_cmd)
dma_unmap_single(NULL, pkt->dma_address,
pkt->skb->len,
DMA_TO_DEVICE);
- queue_work(bam_mux_tx_workqueue, &pkt->work);
- } else {
+ else
dma_unmap_single(NULL, pkt->dma_address,
pkt->len,
DMA_TO_DEVICE);
- kfree(pkt->skb);
- kfree(pkt);
- }
+ queue_work(bam_mux_tx_workqueue, &pkt->work);
break;
default:
pr_err("%s: recieved unexpected event id %d\n", __func__,
@@ -623,6 +729,9 @@
DBG("%s: event %d notified\n", __func__, notify->event_id);
+ if (in_global_reset)
+ return;
+
switch (notify->event_id) {
case SPS_EVENT_EOT:
/* attempt to disable interrupts in this pipe */
@@ -708,6 +817,185 @@
#endif
+static void notify_all(int event, unsigned long data)
+{
+ int i;
+
+ for (i = 0; i < BAM_DMUX_NUM_CHANNELS; ++i) {
+ if (bam_ch_is_open(i))
+ bam_ch[i].notify(bam_ch[i].priv, event, data);
+ }
+}
+
+static void kickoff_ul_wakeup_func(struct work_struct *work)
+{
+ read_lock(&ul_wakeup_lock);
+ if (!bam_is_connected) {
+ read_unlock(&ul_wakeup_lock);
+ ul_wakeup();
+ read_lock(&ul_wakeup_lock);
+ ul_packet_written = 1;
+ notify_all(BAM_DMUX_UL_CONNECTED, (unsigned long)(NULL));
+ }
+ read_unlock(&ul_wakeup_lock);
+}
+
+void msm_bam_dmux_kickoff_ul_wakeup(void)
+{
+ queue_work(bam_mux_tx_workqueue, &kickoff_ul_wakeup);
+}
+
+static void ul_timeout(struct work_struct *work)
+{
+ if (in_global_reset)
+ return;
+ write_lock(&ul_wakeup_lock);
+ if (ul_packet_written) {
+ ul_packet_written = 0;
+ schedule_delayed_work(&ul_timeout_work,
+ msecs_to_jiffies(UL_TIMEOUT_DELAY));
+ } else {
+ smsm_change_state(SMSM_APPS_STATE, SMSM_A2_POWER_CONTROL, 0);
+ bam_is_connected = 0;
+ notify_all(BAM_DMUX_UL_DISCONNECTED, (unsigned long)(NULL));
+ }
+ write_unlock(&ul_wakeup_lock);
+}
+static void ul_wakeup(void)
+{
+ mutex_lock(&wakeup_lock);
+ if (bam_is_connected) { /* bam got connected before lock grabbed */
+ mutex_unlock(&wakeup_lock);
+ return;
+ }
+ INIT_COMPLETION(ul_wakeup_ack_completion);
+ smsm_change_state(SMSM_APPS_STATE, 0, SMSM_A2_POWER_CONTROL);
+ wait_for_completion_interruptible_timeout(&ul_wakeup_ack_completion,
+ HZ);
+ wait_for_completion_interruptible_timeout(&bam_connection_completion,
+ HZ);
+
+ bam_is_connected = 1;
+ schedule_delayed_work(&ul_timeout_work,
+ msecs_to_jiffies(UL_TIMEOUT_DELAY));
+ mutex_unlock(&wakeup_lock);
+}
+
+static void reconnect_to_bam(void)
+{
+ int i;
+
+ in_global_reset = 0;
+ vote_dfab();
+ i = sps_device_reset(a2_device_handle);
+ if (i)
+ pr_err("%s: device reset failed rc = %d\n", __func__, i);
+ i = sps_connect(bam_tx_pipe, &tx_connection);
+ if (i)
+ pr_err("%s: tx connection failed rc = %d\n", __func__, i);
+ i = sps_connect(bam_rx_pipe, &rx_connection);
+ if (i)
+ pr_err("%s: rx connection failed rc = %d\n", __func__, i);
+ i = sps_register_event(bam_tx_pipe, &tx_register_event);
+ if (i)
+ pr_err("%s: tx event reg failed rc = %d\n", __func__, i);
+ i = sps_register_event(bam_rx_pipe, &rx_register_event);
+ if (i)
+ pr_err("%s: rx event reg failed rc = %d\n", __func__, i);
+ for (i = 0; i < NUM_BUFFERS; ++i)
+ queue_rx();
+ toggle_apps_ack();
+ bam_connection_is_active = 1;
+ complete_all(&bam_connection_completion);
+}
+
+static void disconnect_to_bam(void)
+{
+ struct list_head *node;
+ struct rx_pkt_info *info;
+
+ bam_connection_is_active = 0;
+ INIT_COMPLETION(bam_connection_completion);
+ sps_disconnect(bam_tx_pipe);
+ sps_disconnect(bam_rx_pipe);
+ unvote_dfab();
+ __memzero(rx_desc_mem_buf.base, rx_desc_mem_buf.size);
+ __memzero(tx_desc_mem_buf.base, tx_desc_mem_buf.size);
+ while (!list_empty(&bam_rx_pool)) {
+ node = bam_rx_pool.next;
+ list_del(node);
+ info = container_of(node, struct rx_pkt_info, list_node);
+ dma_unmap_single(NULL, info->dma_address, BUFFER_SIZE,
+ DMA_FROM_DEVICE);
+ dev_kfree_skb_any(info->skb);
+ kfree(info);
+ }
+}
+
+static void vote_dfab(void)
+{
+ int rc;
+
+ rc = clk_enable(dfab_clk);
+ if (rc)
+ pr_err("bam_dmux vote for dfab failed rc = %d\n", rc);
+}
+
+static void unvote_dfab(void)
+{
+ clk_disable(dfab_clk);
+}
+
+static int restart_notifier_cb(struct notifier_block *this,
+ unsigned long code,
+ void *data)
+{
+ int i;
+ struct list_head *node;
+ struct tx_pkt_info *info;
+ int temp_remote_status;
+
+ if (code != SUBSYS_AFTER_SHUTDOWN)
+ return NOTIFY_DONE;
+
+ in_global_reset = 1;
+ for (i = 0; i < BAM_DMUX_NUM_CHANNELS; ++i) {
+ temp_remote_status = bam_ch_is_remote_open(i);
+ bam_ch[i].status &= ~BAM_CH_REMOTE_OPEN;
+ if (bam_ch_is_local_open(i))
+ bam_ch[i].status |= BAM_CH_IN_RESET;
+ if (temp_remote_status) {
+ platform_device_unregister(bam_ch[i].pdev);
+ bam_ch[i].pdev = platform_device_alloc(
+ bam_ch[i].name, 2);
+ }
+ }
+ /*cleanup UL*/
+ mutex_lock(&bam_tx_pool_lock);
+ while (!list_empty(&bam_tx_pool)) {
+ node = bam_tx_pool.next;
+ list_del(node);
+ info = container_of(node, struct tx_pkt_info,
+ list_node);
+ if (!info->is_cmd) {
+ dma_unmap_single(NULL, info->dma_address,
+ info->skb->len,
+ DMA_TO_DEVICE);
+ dev_kfree_skb_any(info->skb);
+ } else {
+ dma_unmap_single(NULL, info->dma_address,
+ info->len,
+ DMA_TO_DEVICE);
+ kfree(info->skb);
+ }
+ kfree(info);
+ }
+ mutex_unlock(&bam_tx_pool_lock);
+ smsm_change_state(SMSM_APPS_STATE, SMSM_A2_POWER_CONTROL, 0);
+
+ return NOTIFY_DONE;
+}
+
static void bam_init(void)
{
u32 h;
@@ -716,6 +1004,7 @@
void *a2_virt_addr;
int i;
+ vote_dfab();
/* init BAM */
a2_virt_addr = ioremap_nocache(A2_PHYS_BASE, A2_PHYS_SIZE);
if (!a2_virt_addr) {
@@ -735,6 +1024,7 @@
pr_err("%s: register bam error %d\n", __func__, ret);
goto register_bam_failed;
}
+ a2_device_handle = h;
bam_tx_pipe = sps_alloc_endpoint();
if (bam_tx_pipe == NULL) {
@@ -836,6 +1126,9 @@
bam_mux_initialized = 1;
for (i = 0; i < NUM_BUFFERS; ++i)
queue_rx();
+ toggle_apps_ack();
+ bam_connection_is_active = 1;
+ complete_all(&bam_connection_completion);
return;
rx_event_reg_failed:
@@ -860,11 +1153,22 @@
return;
}
+static void toggle_apps_ack(void)
+{
+ static unsigned int clear_bit; /* 0 = set the bit, else clear bit */
+ smsm_change_state(SMSM_APPS_STATE,
+ clear_bit & SMSM_A2_POWER_CONTROL_ACK,
+ ~clear_bit & SMSM_A2_POWER_CONTROL_ACK);
+ clear_bit = ~clear_bit;
+}
+
static void bam_dmux_smsm_cb(void *priv, uint32_t old_state, uint32_t new_state)
{
DBG("%s: smsm activity\n", __func__);
- if (bam_mux_initialized)
- pr_err("%s: bam_dmux already initialized\n", __func__);
+ if (bam_mux_initialized && new_state & SMSM_A2_POWER_CONTROL)
+ reconnect_to_bam();
+ else if (bam_mux_initialized && !(new_state & SMSM_A2_POWER_CONTROL))
+ disconnect_to_bam();
else if (new_state & SMSM_A2_POWER_CONTROL)
bam_init();
else
@@ -872,6 +1176,12 @@
}
+static void bam_dmux_smsm_ack_cb(void *priv, uint32_t old_state,
+ uint32_t new_state)
+{
+ complete_all(&ul_wakeup_ack_completion);
+}
+
static int bam_dmux_probe(struct platform_device *pdev)
{
int rc;
@@ -880,6 +1190,16 @@
if (bam_mux_initialized)
return 0;
+ dfab_clk = clk_get(&pdev->dev, "bus_clk");
+ if (IS_ERR(dfab_clk)) {
+ pr_err("%s: did not get dfab clock\n", __func__);
+ return -EFAULT;
+ }
+
+ rc = clk_set_rate(dfab_clk, 64000000);
+ if (rc)
+ pr_err("%s: unable to set dfab clock rate\n", __func__);
+
bam_mux_rx_workqueue = create_singlethread_workqueue("bam_dmux_rx");
if (!bam_mux_rx_workqueue)
return -ENOMEM;
@@ -904,6 +1224,10 @@
}
}
+ init_completion(&ul_wakeup_ack_completion);
+ init_completion(&bam_connection_completion);
+ INIT_DELAYED_WORK(&ul_timeout_work, ul_timeout);
+
rc = smsm_state_cb_register(SMSM_MODEM_STATE, SMSM_A2_POWER_CONTROL,
bam_dmux_smsm_cb, NULL);
@@ -914,6 +1238,22 @@
return -ENOMEM;
}
+ rc = smsm_state_cb_register(SMSM_MODEM_STATE, SMSM_A2_POWER_CONTROL_ACK,
+ bam_dmux_smsm_ack_cb, NULL);
+
+ if (rc) {
+ destroy_workqueue(bam_mux_rx_workqueue);
+ destroy_workqueue(bam_mux_tx_workqueue);
+ smsm_state_cb_deregister(SMSM_MODEM_STATE,
+ SMSM_A2_POWER_CONTROL,
+ bam_dmux_smsm_cb, NULL);
+ pr_err("%s: smsm ack cb register failed, rc: %d\n", __func__,
+ rc);
+ for (rc = 0; rc < BAM_DMUX_NUM_CHANNELS; ++rc)
+ platform_device_put(bam_ch[rc].pdev);
+ return -ENOMEM;
+ }
+
return 0;
}
@@ -934,6 +1274,7 @@
if (!IS_ERR(dent))
debug_create("tbl", 0444, dent, debug_tbl);
#endif
+ subsys_notif_register_notifier("modem", &restart_notifier);
return platform_driver_register(&bam_dmux_driver);
}
diff --git a/arch/arm/mach-msm/board-9615-regulator.c b/arch/arm/mach-msm/board-9615-regulator.c
index d7d630d..6568bef 100644
--- a/arch/arm/mach-msm/board-9615-regulator.c
+++ b/arch/arm/mach-msm/board-9615-regulator.c
@@ -12,6 +12,7 @@
*/
#include <linux/regulator/pm8018-regulator.h>
+#include <linux/regulator/gpio-regulator.h>
#include <mach/rpm-regulator.h>
#include "board-9615.h"
@@ -83,6 +84,9 @@
VREG_CONSUMERS(LVS1) = {
REGULATOR_SUPPLY("8018_lvs1", NULL),
};
+VREG_CONSUMERS(EXT_2P95V) = {
+ REGULATOR_SUPPLY("ext_2p95v", NULL),
+};
#define PM8018_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
_pull_down, _always_on, _supply_regulator, \
@@ -238,6 +242,25 @@
.pin_ctrl = _pin_ctrl, \
}
+#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio) \
+ [GPIO_VREG_ID_##_id] = { \
+ .init_data = { \
+ .constraints = { \
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
+ }, \
+ .num_consumer_supplies = \
+ ARRAY_SIZE(vreg_consumers_##_id), \
+ .consumer_supplies = vreg_consumers_##_id, \
+ }, \
+ .regulator_name = _reg_name, \
+ .gpio_label = _gpio_label, \
+ .gpio = _gpio, \
+ }
+
+/* GPIO regulator constraints */
+struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
+ GPIO_VREG_INIT(EXT_2P95V, "ext_2p95v", "ext_2p95_en", 18),
+};
/* PM8018 regulator constraints */
struct pm8018_regulator_platform_data
@@ -247,7 +270,7 @@
static struct rpm_regulator_init_data
msm_rpm_regulator_init_data[] __devinitdata = {
/* ID a_on pd ss min_uV max_uV supply sys_uA freq */
- RPM_SMPS(S1, 1, 1, 1, 1150000, 1150000, NULL, 100000, 1p60),
+ RPM_SMPS(S1, 1, 1, 1, 950000, 1150000, NULL, 100000, 1p60),
RPM_SMPS(S2, 0, 1, 0, 1225000, 1300000, NULL, 0, 1p60),
RPM_SMPS(S3, 1, 1, 0, 1800000, 1800000, NULL, 100000, 1p60),
RPM_SMPS(S4, 0, 1, 0, 2100000, 2200000, NULL, 0, 1p60),
@@ -261,7 +284,7 @@
RPM_LDO(L6, 0, 1, 0, 1800000, 2850000, NULL, 0, 0),
RPM_LDO(L7, 0, 1, 0, 1850000, 1900000, "8018_s4", 0, 0),
RPM_LDO(L8, 0, 1, 0, 1200000, 1200000, "8018_s3", 0, 0),
- RPM_LDO(L9, 1, 1, 1, 1150000, 1150000, "8018_s5", 10000, 10000),
+ RPM_LDO(L9, 1, 1, 1, 1050000, 1150000, "8018_s5", 10000, 10000),
RPM_LDO(L10, 0, 1, 0, 1050000, 1050000, "8018_s5", 0, 0),
RPM_LDO(L11, 0, 1, 0, 1050000, 1050000, "8018_s5", 0, 0),
RPM_LDO(L12, 0, 1, 0, 1050000, 1050000, "8018_s5", 0, 0),
diff --git a/arch/arm/mach-msm/board-9615.c b/arch/arm/mach-msm/board-9615.c
index 4eb3d77..701464a 100644
--- a/arch/arm/mach-msm/board-9615.c
+++ b/arch/arm/mach-msm/board-9615.c
@@ -14,7 +14,6 @@
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/msm_ssbi.h>
-#include <linux/platform_data/qcom_crypto_device.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/mmc.h>
@@ -25,11 +24,48 @@
#include <mach/msm_spi.h>
#include <linux/usb/android.h>
#include <linux/usb/msm_hsusb.h>
+#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
+#include <linux/leds.h>
+#include <linux/leds-pm8xxx.h>
#include "timer.h"
#include "devices.h"
#include "board-9615.h"
#include "cpuidle.h"
#include "pm.h"
+#include "acpuclock.h"
+
+static struct pm8xxx_adc_amux pm8018_adc_channels_data[] = {
+ {"vcoin", CHANNEL_VCOIN, CHAN_PATH_SCALING2, AMUX_RSV1,
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
+ {"vbat", CHANNEL_VBAT, CHAN_PATH_SCALING2, AMUX_RSV1,
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
+ {"vph_pwr", CHANNEL_VPH_PWR, CHAN_PATH_SCALING2, AMUX_RSV1,
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
+ {"batt_therm", CHANNEL_BATT_THERM, CHAN_PATH_SCALING1, AMUX_RSV2,
+ ADC_DECIMATION_TYPE2, ADC_SCALE_BATT_THERM},
+ {"batt_id", CHANNEL_BATT_ID, CHAN_PATH_SCALING1, AMUX_RSV2,
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
+ {"pmic_therm", CHANNEL_DIE_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1,
+ ADC_DECIMATION_TYPE2, ADC_SCALE_PMIC_THERM},
+ {"625mv", CHANNEL_625MV, CHAN_PATH_SCALING1, AMUX_RSV1,
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
+ {"125v", CHANNEL_125V, CHAN_PATH_SCALING1, AMUX_RSV1,
+ ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
+ {"pa_therm0", ADC_MPP_1_AMUX3, CHAN_PATH_SCALING1, AMUX_RSV1,
+ ADC_DECIMATION_TYPE2, ADC_SCALE_PA_THERM},
+};
+
+static struct pm8xxx_adc_properties pm8018_adc_data = {
+ .adc_vdd_reference = 1800, /* milli-voltage for this adc */
+ .bitresolution = 15,
+ .bipolar = 0,
+};
+
+static struct pm8xxx_adc_platform_data pm8018_adc_pdata = {
+ .adc_channel = pm8018_adc_channels_data,
+ .adc_num_board_channel = ARRAY_SIZE(pm8018_adc_channels_data),
+ .adc_prop = &pm8018_adc_data,
+};
static struct pm8xxx_irq_platform_data pm8xxx_irq_pdata __devinitdata = {
.irq_base = PM8018_IRQ_BASE,
@@ -60,6 +96,42 @@
.priority = 0,
};
+#define PM8018_LED_KB_MAX_CURRENT 20 /* I = 20mA */
+#define PM8XXX_LED_PWM_PERIOD_US 1000
+
+/**
+ * PM8XXX_PWM_CHANNEL_NONE shall be used when LED shall not be
+ * driven using PWM feature.
+ */
+#define PM8XXX_PWM_CHANNEL_NONE -1
+
+static struct led_info pm8018_led_info[] = {
+ [0] = {
+ .name = "led:kb",
+ },
+};
+
+static struct led_platform_data pm8018_led_core_pdata = {
+ .num_leds = ARRAY_SIZE(pm8018_led_info),
+ .leds = pm8018_led_info,
+};
+
+static struct pm8xxx_led_config pm8018_led_configs[] = {
+ [0] = {
+ .id = PM8XXX_ID_LED_KB_LIGHT,
+ .mode = PM8XXX_LED_MODE_PWM3,
+ .max_current = PM8018_LED_KB_MAX_CURRENT,
+ .pwm_channel = 2,
+ .pwm_period_us = PM8XXX_LED_PWM_PERIOD_US,
+ },
+};
+
+static struct pm8xxx_led_platform_data pm8xxx_leds_pdata = {
+ .led_core = &pm8018_led_core_pdata,
+ .configs = pm8018_led_configs,
+ .num_configs = ARRAY_SIZE(pm8018_led_configs),
+};
+
static struct pm8018_platform_data pm8018_platform_data __devinitdata = {
.irq_pdata = &pm8xxx_irq_pdata,
.gpio_pdata = &pm8xxx_gpio_pdata,
@@ -68,6 +140,8 @@
.pwrkey_pdata = &pm8xxx_pwrkey_pdata,
.misc_pdata = &pm8xxx_misc_pdata,
.regulator_pdatas = msm_pm8018_regulator_pdata,
+ .adc_pdata = &pm8018_adc_pdata,
+ .leds_pdata = &pm8xxx_leds_pdata,
};
static struct msm_ssbi_platform_data msm9615_ssbi_pm8018_pdata __devinitdata = {
@@ -86,6 +160,15 @@
},
};
+static struct platform_device msm9615_device_ext_2p95v_vreg = {
+ .name = GPIO_REGULATOR_DEV_NAME,
+ .id = 18,
+ .dev = {
+ .platform_data =
+ &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_2P95V],
+ },
+};
+
static struct gpiomux_setting ps_hold = {
.func = GPIOMUX_FUNC_1,
.drv = GPIOMUX_DRV_8MA,
@@ -195,123 +278,14 @@
},
};
-#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
- defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
- defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
- defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
-
-#define QCE_SIZE 0x10000
-#define QCE_0_BASE 0x18500000
-
-#define QCE_HW_KEY_SUPPORT 0
-#define QCE_SHA_HMAC_SUPPORT 1
-#define QCE_SHARE_CE_RESOURCE 1
-#define QCE_CE_SHARED 0
-
-static struct resource qcrypto_resources[] = {
- [0] = {
- .start = QCE_0_BASE,
- .end = QCE_0_BASE + QCE_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "crypto_channels",
- .start = DMOV_CE_IN_CHAN,
- .end = DMOV_CE_OUT_CHAN,
- .flags = IORESOURCE_DMA,
- },
- [2] = {
- .name = "crypto_crci_in",
- .start = DMOV_CE_IN_CRCI,
- .end = DMOV_CE_IN_CRCI,
- .flags = IORESOURCE_DMA,
- },
- [3] = {
- .name = "crypto_crci_out",
- .start = DMOV_CE_OUT_CRCI,
- .end = DMOV_CE_OUT_CRCI,
- .flags = IORESOURCE_DMA,
- },
-};
-
-static struct resource qcedev_resources[] = {
- [0] = {
- .start = QCE_0_BASE,
- .end = QCE_0_BASE + QCE_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "crypto_channels",
- .start = DMOV_CE_IN_CHAN,
- .end = DMOV_CE_OUT_CHAN,
- .flags = IORESOURCE_DMA,
- },
- [2] = {
- .name = "crypto_crci_in",
- .start = DMOV_CE_IN_CRCI,
- .end = DMOV_CE_IN_CRCI,
- .flags = IORESOURCE_DMA,
- },
- [3] = {
- .name = "crypto_crci_out",
- .start = DMOV_CE_OUT_CRCI,
- .end = DMOV_CE_OUT_CRCI,
- .flags = IORESOURCE_DMA,
- },
-};
-
-#endif
-
-#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
- defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
-
-static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
- .ce_shared = QCE_CE_SHARED,
- .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
- .hw_key_support = QCE_HW_KEY_SUPPORT,
- .sha_hmac = QCE_SHA_HMAC_SUPPORT,
-};
-
-static struct platform_device qcrypto_device = {
- .name = "qcrypto",
- .id = 0,
- .num_resources = ARRAY_SIZE(qcrypto_resources),
- .resource = qcrypto_resources,
- .dev = {
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &qcrypto_ce_hw_suppport,
- },
-};
-#endif
-
-#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
- defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
-
-static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
- .ce_shared = QCE_CE_SHARED,
- .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
- .hw_key_support = QCE_HW_KEY_SUPPORT,
- .sha_hmac = QCE_SHA_HMAC_SUPPORT,
-};
-
-static struct platform_device qcedev_device = {
- .name = "qce",
- .id = 0,
- .num_resources = ARRAY_SIZE(qcedev_resources),
- .resource = qcedev_resources,
- .dev = {
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &qcedev_ce_hw_suppport,
- },
-};
-#endif
-
#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
|| defined(CONFIG_MMC_MSM_SDC2_SUPPORT))
-#define GPIO_SDCARD_PWR_EN 18
+#define GPIO_SDCARD_PWR_EN 18
+#define GPIO_SDC1_HW_DET 80
+#define GPIO_SDC2_DAT1_WAKEUP 26
-/* MDM9x15 have 2 SDCC controllers */
+/* MDM9x15 has 2 SDCC controllers */
enum sdcc_controllers {
SDCC1,
SDCC2,
@@ -482,8 +456,14 @@
.mmc_bus_width = MMC_CAP_4_BIT_DATA,
.sup_clk_table = sdc1_sup_clk_rates,
.sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
+ .pclk_src_dfab = 1,
.sdcc_v4_sup = true,
.pin_data = &mmc_slot_pin_data[SDCC1],
+#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
+ .status_gpio = GPIO_SDC1_HW_DET,
+ .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
+ .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+#endif
};
static struct mmc_platform_data *msm9615_sdc1_pdata = &sdc1_data;
#else
@@ -500,8 +480,12 @@
.mmc_bus_width = MMC_CAP_4_BIT_DATA,
.sup_clk_table = sdc2_sup_clk_rates,
.sup_clk_cnt = ARRAY_SIZE(sdc2_sup_clk_rates),
+ .pclk_src_dfab = 1,
.sdcc_v4_sup = true,
.pin_data = &mmc_slot_pin_data[SDCC2],
+#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
+ .sdiowakeup_irq = MSM_GPIO_TO_INT(GPIO_SDC2_DAT1_WAKEUP),
+#endif
};
static struct mmc_platform_data *msm9615_sdc2_pdata = &sdc2_data;
#else
@@ -630,6 +614,7 @@
&msm_device_gadget_peripheral,
&android_usb_device,
&msm9615_device_uart_gsbi4,
+ &msm9615_device_ext_2p95v_vreg,
&msm9615_device_ssbi_pmic1,
&msm9615_device_qup_i2c_gsbi5,
&msm9615_device_qup_spi_gsbi3,
@@ -643,12 +628,12 @@
#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
- &qcrypto_device,
+ &msm9615_qcrypto_device,
#endif
#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
- &qcedev_device,
+ &msm9615_qcedev_device,
#endif
};
@@ -675,6 +660,9 @@
msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
+ msm_clock_init(&msm9615_clock_init_data);
+ acpuclk_init(&acpuclk_9615_soc_data);
+
msm9615_init_mmc();
msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
diff --git a/arch/arm/mach-msm/board-9615.h b/arch/arm/mach-msm/board-9615.h
index 0d9fae7..0f5adf0 100644
--- a/arch/arm/mach-msm/board-9615.h
+++ b/arch/arm/mach-msm/board-9615.h
@@ -15,6 +15,7 @@
#include <mach/irqs.h>
#include <linux/mfd/pm8xxx/pm8018.h>
+#include <linux/regulator/gpio-regulator.h>
/* Macros assume PMIC GPIOs and MPPs start at 1 */
#define PM8018_GPIO_BASE NR_GPIO_IRQS
@@ -32,4 +33,8 @@
extern struct rpm_regulator_platform_data
msm_rpm_regulator_9615_pdata __devinitdata;
+#define GPIO_VREG_ID_EXT_2P95V 0
+
+extern struct gpio_regulator_platform_data msm_gpio_regulator_pdata[];
+
#endif
diff --git a/arch/arm/mach-msm/board-apq8064.c b/arch/arm/mach-msm/board-apq8064.c
index 4328b85..4aa6abe 100644
--- a/arch/arm/mach-msm/board-apq8064.c
+++ b/arch/arm/mach-msm/board-apq8064.c
@@ -33,9 +33,174 @@
#include "devices.h"
#include <mach/gpio.h>
#include <mach/gpiomux.h>
+#include <linux/android_pmem.h>
+#include <mach/msm_memtypes.h>
+#include <linux/bootmem.h>
+#include <asm/setup.h>
#include "board-apq8064.h"
+#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
+#define MSM_PMEM_ADSP_SIZE 0x3800000
+#define MSM_PMEM_AUDIO_SIZE 0x28B000
+#define MSM_PMEM_SIZE 0x1800000 /* 24 Mbytes */
+
+static struct memtype_reserve apq8064_reserve_table[] __initdata = {
+ [MEMTYPE_SMI] = {
+ },
+ [MEMTYPE_EBI0] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+ [MEMTYPE_EBI1] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+};
+
+static int apq8064_paddr_to_memtype(unsigned int paddr)
+{
+ return MEMTYPE_EBI1;
+}
+
+static unsigned pmem_size = MSM_PMEM_SIZE;
+static int __init pmem_size_setup(char *p)
+{
+ pmem_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_size", pmem_size_setup);
+
+static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
+
+static int __init pmem_adsp_size_setup(char *p)
+{
+ pmem_adsp_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_adsp_size", pmem_adsp_size_setup);
+
+static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
+
+static int __init pmem_audio_size_setup(char *p)
+{
+ pmem_audio_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_audio_size", pmem_audio_size_setup);
+
+static struct android_pmem_platform_data android_pmem_pdata = {
+ .name = "pmem",
+ .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
+ .cached = 1,
+ .memory_type = MEMTYPE_EBI1,
+};
+
+static struct platform_device android_pmem_device = {
+ .name = "android_pmem",
+ .id = 0,
+ .dev = {.platform_data = &android_pmem_pdata},
+};
+
+static struct android_pmem_platform_data android_pmem_adsp_pdata = {
+ .name = "pmem_adsp",
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
+ .cached = 0,
+ .memory_type = MEMTYPE_EBI1,
+};
+
+static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
+static int __init pmem_kernel_ebi1_size_setup(char *p)
+{
+ pmem_kernel_ebi1_size = memparse(p, NULL);
+ return 0;
+}
+early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
+
+static struct platform_device android_pmem_adsp_device = {
+ .name = "android_pmem",
+ .id = 2,
+ .dev = { .platform_data = &android_pmem_adsp_pdata },
+};
+
+static struct android_pmem_platform_data android_pmem_audio_pdata = {
+ .name = "pmem_audio",
+ .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
+ .cached = 0,
+ .memory_type = MEMTYPE_EBI1,
+};
+
+static struct platform_device android_pmem_audio_device = {
+ .name = "android_pmem",
+ .id = 4,
+ .dev = { .platform_data = &android_pmem_audio_pdata },
+};
+
+static void __init size_pmem_devices(void)
+{
+ android_pmem_adsp_pdata.size = pmem_adsp_size;
+ android_pmem_pdata.size = pmem_size;
+ android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
+}
+
+static void __init reserve_memory_for(struct android_pmem_platform_data *p)
+{
+ apq8064_reserve_table[p->memory_type].size += p->size;
+}
+
+
+static void __init reserve_pmem_memory(void)
+{
+ reserve_memory_for(&android_pmem_adsp_pdata);
+ reserve_memory_for(&android_pmem_pdata);
+ reserve_memory_for(&android_pmem_audio_pdata);
+ apq8064_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
+}
+
+static void __init apq8064_calculate_reserve_sizes(void)
+{
+ size_pmem_devices();
+ reserve_pmem_memory();
+}
+
+static struct reserve_info apq8064_reserve_info __initdata = {
+ .memtype_reserve_table = apq8064_reserve_table,
+ .calculate_reserve_sizes = apq8064_calculate_reserve_sizes,
+ .paddr_to_memtype = apq8064_paddr_to_memtype,
+};
+
+static int apq8064_memory_bank_size(void)
+{
+ return 1<<29;
+}
+
+static void __init locate_unstable_memory(void)
+{
+ struct membank *mb = &meminfo.bank[meminfo.nr_banks - 1];
+ unsigned long bank_size;
+ unsigned long low, high;
+
+ bank_size = apq8064_memory_bank_size();
+ low = meminfo.bank[0].start;
+ high = mb->start + mb->size;
+ low &= ~(bank_size - 1);
+
+ if (high - low <= bank_size)
+ return;
+ apq8064_reserve_info.low_unstable_address = low + bank_size;
+ apq8064_reserve_info.max_unstable_size = high - low - bank_size;
+ apq8064_reserve_info.bank_size = bank_size;
+ pr_info("low unstable address %lx max size %lx bank size %lx\n",
+ apq8064_reserve_info.low_unstable_address,
+ apq8064_reserve_info.max_unstable_size,
+ apq8064_reserve_info.bank_size);
+}
+
+static void __init apq8064_reserve(void)
+{
+ reserve_info = &apq8064_reserve_info;
+ locate_unstable_memory();
+ msm_reserve();
+}
+
static struct platform_device android_usb_device = {
.name = "android_usb",
.id = -1,
@@ -48,7 +213,7 @@
.pclk_src_name = "dfab_usb_hs_clk",
};
-/* APQ8064 have 4 SDCC controllers */
+/* APQ8064 has 4 SDCC controllers */
enum sdcc_controllers {
SDCC1,
SDCC2,
@@ -57,7 +222,7 @@
MAX_SDCC_CONTROLLER
};
-/* All SDCC controllers requires VDD/VCC voltage */
+/* All SDCC controllers require VDD/VCC voltage */
static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = {
/* SDCC1 : eMMC card connected */
[SDCC1] = {
@@ -325,6 +490,9 @@
&apq8064_device_otg,
&apq8064_device_gadget_peripheral,
&android_usb_device,
+ &android_pmem_device,
+ &android_pmem_adsp_device,
+ &android_pmem_audio_device,
};
static struct platform_device *sim_devices[] __initdata = {
@@ -581,6 +749,7 @@
MACHINE_START(APQ8064_SIM, "QCT APQ8064 SIMULATOR")
.map_io = apq8064_map_io,
+ .reserve = apq8064_reserve,
.init_irq = apq8064_init_irq,
.timer = &msm_timer,
.init_machine = apq8064_sim_init,
@@ -588,6 +757,7 @@
MACHINE_START(APQ8064_RUMI3, "QCT APQ8064 RUMI3")
.map_io = apq8064_map_io,
+ .reserve = apq8064_reserve,
.init_irq = apq8064_init_irq,
.timer = &msm_timer,
.init_machine = apq8064_rumi3_init,
diff --git a/arch/arm/mach-msm/board-copper.c b/arch/arm/mach-msm/board-copper.c
new file mode 100644
index 0000000..496e1f4
--- /dev/null
+++ b/arch/arm/mach-msm/board-copper.c
@@ -0,0 +1,95 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <asm/mach/map.h>
+#include <asm/hardware/gic.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/gpiomux.h>
+#include <mach/msm_iomap.h>
+#include "clock.h"
+
+static int __init gpiomux_init(void)
+{
+ int rc;
+
+ rc = msm_gpiomux_init(NR_GPIO_IRQS);
+ if (rc) {
+ pr_err("%s: msm_gpiomux_init failed %d\n", __func__, rc);
+ return rc;
+ }
+
+ return 0;
+}
+
+void __init msm_copper_add_devices(void)
+{
+}
+
+static struct of_device_id msm_copper_gic_match[] __initdata = {
+ { .compatible = "qcom,msm-qgic2", },
+ {}
+};
+
+void __init msm_copper_init_irq(void)
+{
+ unsigned int i;
+
+ gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
+ (void *)MSM_QGIC_CPU_BASE);
+
+ /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
+ writel_relaxed(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
+
+ writel_relaxed(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET);
+ mb();
+
+ /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
+ * as they are configured as level, which does not play nice with
+ * handle_percpu_irq.
+ */
+ for (i = GIC_PPI_START; i < GIC_SPI_START; i++) {
+ if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE)
+ irq_set_handler(i, handle_percpu_irq);
+ }
+ irq_domain_generate_simple(msm_copper_gic_match,
+ COPPER_QGIC_DIST_PHYS, GIC_SPI_START);
+}
+
+static struct clk_lookup msm_clocks_dummy[] = {
+};
+
+struct clock_init_data msm_dummy_clock_init_data __initdata = {
+ .table = msm_clocks_dummy,
+ .size = ARRAY_SIZE(msm_clocks_dummy),
+};
+
+static struct of_dev_auxdata msm_copper_auxdata_lookup[] __initdata = {
+ {}
+};
+
+void __init msm_copper_init(struct of_dev_auxdata **adata)
+{
+ if (gpiomux_init())
+ pr_err("%s: gpiomux_init() failed\n", __func__);
+ msm_clock_init(&msm_dummy_clock_init_data);
+
+ *adata = msm_copper_auxdata_lookup;
+}
diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c
new file mode 100644
index 0000000..1ede17b
--- /dev/null
+++ b/arch/arm/mach-msm/board-dt.c
@@ -0,0 +1,66 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/of_fdt.h>
+#include <asm/mach/arch.h>
+#include <mach/socinfo.h>
+#include <mach/board.h>
+#include "timer.h"
+
+#define early_machine_is_copper() \
+ of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,msmcopper")
+#define machine_is_copper() \
+ of_machine_is_compatible("qcom,msmcopper")
+
+static void __init msm_dt_init_irq(void)
+{
+ if (machine_is_copper())
+ msm_copper_init_irq();
+}
+
+static void __init msm_dt_map_io(void)
+{
+ if (early_machine_is_copper())
+ msm_map_copper_io();
+ if (socinfo_init() < 0)
+ pr_err("%s: socinfo_init() failed\n", __func__);
+}
+
+static void __init msm_dt_init(void)
+{
+ struct of_dev_auxdata *adata = NULL;
+
+ if (machine_is_copper())
+ msm_copper_init(&adata);
+
+ of_platform_populate(NULL, of_default_bus_match_table, adata, NULL);
+ if (machine_is_copper())
+ msm_copper_add_devices();
+}
+
+static const char *msm_dt_match[] __initdata = {
+ "qcom,msmcopper",
+ NULL
+};
+
+DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
+ .map_io = msm_dt_map_io,
+ .init_irq = msm_dt_init_irq,
+ .init_machine = msm_dt_init,
+ .timer = &msm_timer,
+ .dt_compat = msm_dt_match,
+MACHINE_END
diff --git a/arch/arm/mach-msm/board-msm7x27.c b/arch/arm/mach-msm/board-msm7x27.c
index 22de352..ef1bf2d 100644
--- a/arch/arm/mach-msm/board-msm7x27.c
+++ b/arch/arm/mach-msm/board-msm7x27.c
@@ -68,6 +68,7 @@
#include "acpuclock.h"
#include "msm-keypad-devices.h"
#include "pm.h"
+#include "pm-boot.h"
#ifdef CONFIG_ARCH_MSM7X25
#define MSM_PMEM_MDP_SIZE 0xb21000
@@ -1711,6 +1712,9 @@
else
msm_pm_set_platform_data(msm7x25_pm_data,
ARRAY_SIZE(msm7x25_pm_data));
+
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_RESET_VECTOR,
+ ioremap(0, PAGE_SIZE)));
msm7x27_wlan_init();
}
diff --git a/arch/arm/mach-msm/board-msm7x27a-regulator.c b/arch/arm/mach-msm/board-msm7x27a-regulator.c
index 19e9285..1a3bb75 100644
--- a/arch/arm/mach-msm/board-msm7x27a-regulator.c
+++ b/arch/arm/mach-msm/board-msm7x27a-regulator.c
@@ -205,7 +205,7 @@
PCOM_VREG_LDO(ldo02, 13, NULL, 2850000, 2850000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo03, 49, NULL, 1200000, 1200000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo04, 50, NULL, 1100000, 1100000, 0, -1, 0, 0, 0, 0),
- PCOM_VREG_LDO(ldo05, 45, NULL, 1300000, 1300000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo05, 45, NULL, 1300000, 1350000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo06, 51, NULL, 1200000, 1200000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo07, 0, NULL, 2600000, 2600000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo08, 9, NULL, 2850000, 2850000, 0, -1, 0, 0, 0, 0),
@@ -217,9 +217,9 @@
PCOM_VREG_LDO(ldo14, 16, NULL, 3300000, 3300000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo15, 54, NULL, 1800000, 2850000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo16, 19, NULL, 1800000, 2850000, 0, -1, 0, 0, 0, 0),
- PCOM_VREG_LDO(ldo17, 56, NULL, 2900000, 3000000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo17, 56, NULL, 2900000, 3300000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_LDO(ldo18, 11, NULL, 2700000, 2700000, 0, -1, 0, 0, 0, 0),
- PCOM_VREG_LDO(ldo19, 57, NULL, 1200000, 1200000, 0, -1, 0, 0, 0, 0),
+ PCOM_VREG_LDO(ldo19, 57, NULL, 1200000, 1800000, 0, -1, 0, 0, 0, 0),
PCOM_VREG_NCP(ncp, 31, NULL, -1800000, -1800000, 0, 0, 0, 0, 0),
};
diff --git a/arch/arm/mach-msm/board-msm7x27a.c b/arch/arm/mach-msm/board-msm7x27a.c
index 92879bc..ca1da75 100644
--- a/arch/arm/mach-msm/board-msm7x27a.c
+++ b/arch/arm/mach-msm/board-msm7x27a.c
@@ -53,6 +53,7 @@
#include "pm.h"
#include <mach/rpc_server_handset.h>
#include <mach/socinfo.h>
+#include "pm-boot.h"
#define PMEM_KERNEL_EBI1_SIZE 0x3A000
#define MSM_PMEM_AUDIO_SIZE 0x5B000
@@ -465,13 +466,14 @@
struct bt_vreg_info {
const char *name;
unsigned int pmapp_id;
- unsigned int level;
+ unsigned int min_level;
+ unsigned int max_level;
unsigned int is_pin_controlled;
struct regulator *reg;
};
static struct bt_vreg_info bt_vregs[] = {
- {"msme1", 2, 1800000, 0, NULL},
- {"bt", 21, 2900000, 1, NULL}
+ {"msme1", 2, 1800000, 1800000, 0, NULL},
+ {"bt", 21, 2900000, 3050000, 1, NULL}
};
static int bahama_bt(int on)
@@ -639,7 +641,8 @@
}
rc = on ? regulator_set_voltage(bt_vregs[i].reg,
- bt_vregs[i].level, bt_vregs[i].level) : 0;
+ bt_vregs[i].min_level,
+ bt_vregs[i].max_level) : 0;
if (rc) {
dev_err(&msm_bt_power_device.dev,
"%s: could not set voltage for %s: %d\n",
@@ -1841,10 +1844,16 @@
static int msm_fb_detect_panel(const char *name)
{
- if (!strncmp(name, MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
- strnlen(MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
- PANEL_NAME_MAX_LEN)))
- return 0;
+ int ret = -ENODEV;
+
+ if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf()) {
+ if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21) ||
+ !strncmp(name, "mipi_cmd_renesas_fwvga", 22))
+ ret = 0;
+ } else if (machine_is_msm7x27a_ffa() || machine_is_msm7625a_ffa()) {
+ if (!strncmp(name, "mipi_cmd_renesas_fwvga", 22))
+ ret = 0;
+ }
#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
!defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
@@ -1857,7 +1866,7 @@
return 0;
}
#endif
- return -ENODEV;
+ return ret;
}
static struct msm_fb_platform_data msm_fb_pdata = {
@@ -3193,6 +3202,8 @@
msm_pm_set_platform_data(msm7x27a_pm_data,
ARRAY_SIZE(msm7x27a_pm_data));
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_RESET_VECTOR,
+ ioremap(0, PAGE_SIZE)));
#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
register_i2c_devices();
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index b71061a..03307f0 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -80,6 +80,7 @@
#include <mach/usbdiag.h>
#endif
#include "pm.h"
+#include "pm-boot.h"
#include "spm.h"
#include "acpuclock.h"
#include <mach/dal_axi.h>
@@ -6743,6 +6744,7 @@
.pwm_ch_id = 1, /*channel id*/
/*gpio to enable haptic*/
.hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
+ .hap_len_gpio = -1,
.max_timeout = 15000,
.mode_ctrl = PWM_GEN_MODE,
.pwm_fd = {
@@ -7002,6 +7004,8 @@
msm_fb_add_devices();
msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_RESET_VECTOR,
+ (uint32_t *)PAGE_OFFSET));
msm_device_i2c_init();
msm_device_i2c_2_init();
qup_device_i2c_init();
diff --git a/arch/arm/mach-msm/board-msm8960-regulator.c b/arch/arm/mach-msm/board-msm8960-regulator.c
index ca24e79..4aba197 100644
--- a/arch/arm/mach-msm/board-msm8960-regulator.c
+++ b/arch/arm/mach-msm/board-msm8960-regulator.c
@@ -118,6 +118,8 @@
REGULATOR_SUPPLY("8921_l25", NULL),
REGULATOR_SUPPLY("VDDD_CDC_D", "tabla-slim"),
REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "tabla-slim"),
+ REGULATOR_SUPPLY("VDDD_CDC_D", "tabla2x-slim"),
+ REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "tabla2x-slim"),
};
VREG_CONSUMERS(L26) = {
REGULATOR_SUPPLY("8921_l26", NULL),
@@ -157,6 +159,10 @@
REGULATOR_SUPPLY("CDC_VDD_CP", "tabla-slim"),
REGULATOR_SUPPLY("CDC_VDDA_TX", "tabla-slim"),
REGULATOR_SUPPLY("CDC_VDDA_RX", "tabla-slim"),
+ REGULATOR_SUPPLY("VDDIO_CDC", "tabla2x-slim"),
+ REGULATOR_SUPPLY("CDC_VDD_CP", "tabla2x-slim"),
+ REGULATOR_SUPPLY("CDC_VDDA_TX", "tabla2x-slim"),
+ REGULATOR_SUPPLY("CDC_VDDA_RX", "tabla2x-slim"),
REGULATOR_SUPPLY("vcc_i2c", "3-005b"),
};
VREG_CONSUMERS(S5) = {
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 2615cd4..b06bb53 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -88,6 +88,7 @@
#include "acpuclock.h"
#include "rpm_log.h"
#include "smd_private.h"
+#include "pm-boot.h"
static struct platform_device msm_fm_platform_init = {
.name = "iris_fm",
@@ -223,7 +224,7 @@
/* The SPI configurations apply to GSBI 1*/
static struct gpiomux_setting spi_active = {
.func = GPIOMUX_FUNC_1,
- .drv = GPIOMUX_DRV_8MA,
+ .drv = GPIOMUX_DRV_12MA,
.pull = GPIOMUX_PULL_NONE,
};
@@ -792,7 +793,15 @@
#else
#define MSM_PMEM_SIZE 0x1800000 /* 24 Mbytes */
#endif
-#define MSM_ION_EBI_SIZE SZ_8M
+
+
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+#define MSM_ION_EBI_SIZE MSM_PMEM_SIZE
+#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
+#define MSM_ION_HEAP_NUM 4
+#else
+#define MSM_ION_HEAP_NUM 2
+#endif
#ifdef CONFIG_KERNEL_PMEM_EBI_REGION
static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
@@ -833,6 +842,7 @@
#endif
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
static struct android_pmem_platform_data android_pmem_pdata = {
.name = "pmem",
.allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
@@ -857,6 +867,7 @@
.id = 2,
.dev = { .platform_data = &android_pmem_adsp_pdata },
};
+#endif
static struct android_pmem_platform_data android_pmem_audio_pdata = {
.name = "pmem_audio",
@@ -906,8 +917,10 @@
static void __init size_pmem_devices(void)
{
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
android_pmem_adsp_pdata.size = pmem_adsp_size;
android_pmem_pdata.size = pmem_size;
+#endif
android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
#endif
}
@@ -920,8 +933,10 @@
static void __init reserve_pmem_memory(void)
{
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
reserve_memory_for(&android_pmem_adsp_pdata);
reserve_memory_for(&android_pmem_pdata);
+#endif
reserve_memory_for(&android_pmem_audio_pdata);
msm8960_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
#endif
@@ -934,7 +949,7 @@
#ifdef CONFIG_ION_MSM
struct ion_platform_data ion_pdata = {
- .nr = 3,
+ .nr = MSM_ION_HEAP_NUM,
.heaps = {
{
.id = ION_HEAP_SYSTEM_ID,
@@ -946,6 +961,7 @@
.type = ION_HEAP_TYPE_SYSTEM_CONTIG,
.name = ION_VMALLOC_HEAP_NAME,
},
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
{
.id = ION_HEAP_EBI_ID,
.type = ION_HEAP_TYPE_CARVEOUT,
@@ -953,6 +969,14 @@
.size = MSM_ION_EBI_SIZE,
.memory_type = ION_EBI_TYPE,
},
+ {
+ .id = ION_HEAP_ADSP_ID,
+ .type = ION_HEAP_TYPE_CARVEOUT,
+ .name = ION_ADSP_HEAP_NAME,
+ .size = MSM_ION_ADSP_SIZE,
+ .memory_type = ION_EBI_TYPE,
+ },
+#endif
}
};
@@ -965,8 +989,9 @@
static void reserve_ion_memory(void)
{
-#ifdef CONFIG_ION_MSM
+#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
msm8960_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
+ msm8960_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
#endif
}
static void __init msm8960_calculate_reserve_sizes(void)
@@ -1009,10 +1034,23 @@
msm8960_reserve_info.bank_size);
}
-static void __init msm8960_reserve(void)
+static void __init place_movable_zone(void)
+{
+ movable_reserved_start = msm8960_reserve_info.low_unstable_address;
+ movable_reserved_size = msm8960_reserve_info.max_unstable_size;
+ pr_info("movable zone start %lx size %lx\n",
+ movable_reserved_start, movable_reserved_size);
+}
+
+static void __init msm8960_early_memory(void)
{
reserve_info = &msm8960_reserve_info;
locate_unstable_memory();
+ place_movable_zone();
+}
+
+static void __init msm8960_reserve(void)
+{
msm_reserve();
}
@@ -2368,6 +2406,35 @@
.platform_data = &tabla_platform_data,
},
};
+
+static struct tabla_pdata tabla20_platform_data = {
+ .slimbus_slave_device = {
+ .name = "tabla-slave",
+ .e_addr = {0, 0, 0x60, 0, 0x17, 2},
+ },
+ .irq = MSM_GPIO_TO_INT(62),
+ .irq_base = TABLA_INTERRUPT_BASE,
+ .num_irqs = NR_TABLA_IRQS,
+ .reset_gpio = PM8921_GPIO_PM_TO_SYS(34),
+ .micbias = {
+ .ldoh_v = TABLA_LDOH_2P85_V,
+ .cfilt1_mv = 1800,
+ .cfilt2_mv = 1800,
+ .cfilt3_mv = 1800,
+ .bias1_cfilt_sel = TABLA_CFILT1_SEL,
+ .bias2_cfilt_sel = TABLA_CFILT2_SEL,
+ .bias3_cfilt_sel = TABLA_CFILT3_SEL,
+ .bias4_cfilt_sel = TABLA_CFILT3_SEL,
+ }
+};
+
+static struct slim_device msm_slim_tabla20 = {
+ .name = "tabla2x-slim",
+ .e_addr = {0, 1, 0x60, 0, 0x17, 2},
+ .dev = {
+ .platform_data = &tabla20_platform_data,
+ },
+};
#endif
static struct slim_boardinfo msm_slim_devices[] = {
@@ -2376,6 +2443,10 @@
.bus_num = 1,
.slim_slave = &msm_slim_tabla,
},
+ {
+ .bus_num = 1,
+ .slim_slave = &msm_slim_tabla20,
+ },
#endif
/* add more slimbus slaves as needed */
};
@@ -2643,6 +2714,17 @@
pr_err("socinfo_init() failed!\n");
}
+#ifdef CONFIG_ARCH_MSM8930
+static void __init msm8930_map_io(void)
+{
+ msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
+ msm_map_msm8930_io();
+
+ if (socinfo_init() < 0)
+ pr_err("socinfo_init() failed!\n");
+}
+#endif
+
static void __init msm8960_init_irq(void)
{
unsigned int i;
@@ -2667,7 +2749,7 @@
}
}
-/* MSM8960 have 5 SDCC controllers */
+/* MSM8960 has 5 SDCC controllers */
enum sdcc_controllers {
SDCC1,
SDCC2,
@@ -2677,7 +2759,7 @@
MAX_SDCC_CONTROLLER
};
-/* All SDCC controllers requires VDD/VCC voltage */
+/* All SDCC controllers require VDD/VCC voltage */
static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = {
/* SDCC1 : eMMC card connected */
[SDCC1] = {
@@ -2919,17 +3001,16 @@
static void __init msm8960_init_buses(void)
{
#ifdef CONFIG_MSM_BUS_SCALING
- msm_bus_apps_fabric_pdata.rpm_enabled = 1;
- msm_bus_sys_fabric_pdata.rpm_enabled = 1;
- msm_bus_mm_fabric_pdata.rpm_enabled = 1;
- msm_bus_sys_fpb_pdata.rpm_enabled = 1;
- msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
- msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
- msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
- msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
- msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
- msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
msm_bus_rpm_set_mt_mask();
+ msm_bus_8960_apps_fabric_pdata.rpm_enabled = 1;
+ msm_bus_8960_sys_fabric_pdata.rpm_enabled = 1;
+ msm_bus_8960_mm_fabric_pdata.rpm_enabled = 1;
+ msm_bus_apps_fabric.dev.platform_data =
+ &msm_bus_8960_apps_fabric_pdata;
+ msm_bus_sys_fabric.dev.platform_data = &msm_bus_8960_sys_fabric_pdata;
+ msm_bus_mm_fabric.dev.platform_data = &msm_bus_8960_mm_fabric_pdata;
+ msm_bus_sys_fpb.dev.platform_data = &msm_bus_8960_sys_fpb_pdata;
+ msm_bus_cpss_fpb.dev.platform_data = &msm_bus_8960_cpss_fpb_pdata;
#endif
}
@@ -3063,8 +3144,7 @@
}
dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
- strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
- dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
+ strlcpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
out:
iounmap(dload);
return 0;
@@ -3328,46 +3408,46 @@
/* configuration data */
static const u8 mxt_config_data[] = {
/* T6 Object */
- 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
/* T38 Object */
- 11, 0, 0, 6, 9, 11, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0,
+ 11, 1, 0, 20, 10, 11, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0,
/* T7 Object */
- 10, 10, 50,
+ 100, 16, 50,
/* T8 Object */
- 8, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 8, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/* T9 Object */
- 131, 0, 0, 26, 42, 0, 32, 60, 2, 5,
- 0, 5, 5, 34, 10, 10, 10, 10, 85, 5,
- 255, 2, 8, 9, 9, 9, 0, 0, 5, 20,
- 0, 5, 45, 46,
+ 131, 0, 0, 26, 42, 0, 32, 60, 2, 5,
+ 0, 5, 5, 34, 10, 10, 10, 10, 255, 2,
+ 85, 5, 18, 18, 18, 18, 0, 0, 5, 20,
+ 0, 5, 45, 46,
/* T15 Object */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0,
/* T22 Object */
- 0, 0, 0, 0, 0, 0, 0, 0, 30, 0,
- 0, 0, 255, 255, 255, 255, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 30, 0,
+ 0, 0, 255, 255, 255, 255, 0,
/* T24 Object */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0,
/* T25 Object */
- 3, 0, 188, 52, 52, 33, 0, 0, 0, 0,
- 0, 0, 0, 0,
+ 3, 0, 188, 52, 52, 33, 0, 0, 0, 0,
+ 0, 0, 0, 0,
/* T27 Object */
- 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0,
/* T28 Object */
- 0, 0, 0, 8, 8, 8,
+ 0, 0, 0, 8, 8, 60,
/* T40 Object */
- 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
/* T41 Object */
- 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
/* T43 Object */
- 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
};
#define MXT_TS_GPIO_IRQ 11
@@ -3435,15 +3515,10 @@
static struct mxt_platform_data mxt_platform_data = {
.config = mxt_config_data,
.config_length = ARRAY_SIZE(mxt_config_data),
- .x_line = 26,
- .y_line = 42,
- .x_size = 767,
- .y_size = 1365,
- .blen = 32,
- .threshold = 40,
- .voltage = 3300000, /* 3.3V */
- .orient = MXT_ROTATED_90,
+ .x_size = 1365,
+ .y_size = 767,
.irqflags = IRQF_TRIGGER_FALLING,
+ .i2c_pull_up = true,
};
static struct i2c_board_info mxt_device_info[] __initdata = {
@@ -3639,8 +3714,10 @@
&fish_battery_device,
#endif
#ifdef CONFIG_ANDROID_PMEM
+#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
&android_pmem_device,
&android_pmem_adsp_device,
+#endif
&android_pmem_audio_device,
#endif
&msm_fb_device,
@@ -4044,15 +4121,22 @@
};
#define PM8921_LC_LED_MAX_CURRENT 4 /* I = 4mA */
+#define PM8XXX_LED_PWM_PERIOD 1000
+#define PM8XXX_LED_PWM_DUTY_MS 20
+/**
+ * PM8XXX_PWM_CHANNEL_NONE shall be used when LED shall not be
+ * driven using PWM feature.
+ */
+#define PM8XXX_PWM_CHANNEL_NONE -1
static struct led_info pm8921_led_info[] = {
[0] = {
- .name = "led:usb",
- .default_trigger = "usb-online",
+ .name = "led:battery_charging",
+ .default_trigger = "battery-charging",
},
[1] = {
- .name = "led:ac",
- .default_trigger = "ac-online",
+ .name = "led:battery_full",
+ .default_trigger = "battery-full",
},
};
@@ -4061,16 +4145,37 @@
.leds = pm8921_led_info,
};
+static int pm8921_led0_pwm_duty_pcts[56] = {
+ 1, 4, 8, 12, 16, 20, 24, 28, 32, 36,
+ 40, 44, 46, 52, 56, 60, 64, 68, 72, 76,
+ 80, 84, 88, 92, 96, 100, 100, 100, 98, 95,
+ 92, 88, 84, 82, 78, 74, 70, 66, 62, 58,
+ 58, 54, 50, 48, 42, 38, 34, 30, 26, 22,
+ 14, 10, 6, 4, 1
+};
+
+static struct pm8xxx_pwm_duty_cycles pm8921_led0_pwm_duty_cycles = {
+ .duty_pcts = (int *)&pm8921_led0_pwm_duty_pcts,
+ .num_duty_pcts = ARRAY_SIZE(pm8921_led0_pwm_duty_pcts),
+ .duty_ms = PM8XXX_LED_PWM_DUTY_MS,
+ .start_idx = 0,
+};
+
static struct pm8xxx_led_config pm8921_led_configs[] = {
[0] = {
.id = PM8XXX_ID_LED_0,
- .mode = PM8XXX_LED_MODE_MANUAL,
+ .mode = PM8XXX_LED_MODE_PWM2,
.max_current = PM8921_LC_LED_MAX_CURRENT,
+ .pwm_channel = 5,
+ .pwm_period_us = PM8XXX_LED_PWM_PERIOD,
+ .pwm_duty_cycles = &pm8921_led0_pwm_duty_cycles,
},
[1] = {
.id = PM8XXX_ID_LED_1,
- .mode = PM8XXX_LED_MODE_MANUAL,
+ .mode = PM8XXX_LED_MODE_PWM1,
.max_current = PM8921_LC_LED_MAX_CURRENT,
+ .pwm_channel = 4,
+ .pwm_period_us = PM8XXX_LED_PWM_PERIOD,
},
};
@@ -4193,56 +4298,56 @@
MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
true,
- 1, 8000, 100000, 1,
+ 100, 8000, 100000, 1,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
true,
- 1500, 5000, 60100000, 3000,
+ 2000, 6000, 60100000, 3000,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, GDHS, MAX, ACTIVE),
false,
- 1800, 5000, 60350000, 3500,
+ 4200, 5000, 60350000, 3500,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
false,
- 2800, 2500, 65350000, 4800,
+ 6300, 4500, 65350000, 4800,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, GDHS, MAX, ACTIVE),
false,
- 3800, 4500, 67850000, 5500,
+ 11700, 2500, 67850000, 5500,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
false,
- 4800, 2000, 71850000, 6800,
+ 13800, 2000, 71850000, 6800,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
false,
- 6800, 500, 75850000, 8800,
+ 29700, 500, 75850000, 8800,
},
{
MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
false,
- 7800, 0, 76350000, 9800,
+ 29700, 0, 76350000, 9800,
},
};
@@ -4427,6 +4532,7 @@
msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
msm_pm_data);
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_TZ, NULL));
}
static void __init msm8960_rumi3_init(void)
@@ -4459,6 +4565,7 @@
msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
msm_pm_data);
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_TZ, NULL));
}
static void __init msm8960_cdp_init(void)
@@ -4518,6 +4625,7 @@
msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
msm_pm_data);
change_memory_power = &msm8960_change_memory_power;
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_TZ, NULL));
}
MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
@@ -4527,6 +4635,7 @@
.timer = &msm_timer,
.init_machine = msm8960_sim_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
@@ -4536,6 +4645,7 @@
.timer = &msm_timer,
.init_machine = msm8960_rumi3_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8960_CDP, "QCT MSM8960 CDP")
@@ -4545,6 +4655,7 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8960_MTP, "QCT MSM8960 MTP")
@@ -4554,6 +4665,7 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8960_FLUID, "QCT MSM8960 FLUID")
@@ -4563,6 +4675,7 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
MACHINE_START(MSM8960_LIQUID, "QCT MSM8960 LIQUID")
@@ -4572,4 +4685,37 @@
.timer = &msm_timer,
.init_machine = msm8960_cdp_init,
.init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
MACHINE_END
+
+#ifdef CONFIG_ARCH_MSM8930
+MACHINE_START(MSM8930_CDP, "QCT MSM8930 CDP")
+ .map_io = msm8930_map_io,
+ .reserve = msm8960_reserve,
+ .init_irq = msm8960_init_irq,
+ .timer = &msm_timer,
+ .init_machine = msm8960_cdp_init,
+ .init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
+MACHINE_END
+
+MACHINE_START(MSM8930_MTP, "QCT MSM8930 MTP")
+ .map_io = msm8930_map_io,
+ .reserve = msm8960_reserve,
+ .init_irq = msm8960_init_irq,
+ .timer = &msm_timer,
+ .init_machine = msm8960_cdp_init,
+ .init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
+MACHINE_END
+
+MACHINE_START(MSM8930_FLUID, "QCT MSM8930 FLUID")
+ .map_io = msm8930_map_io,
+ .reserve = msm8960_reserve,
+ .init_irq = msm8960_init_irq,
+ .timer = &msm_timer,
+ .init_machine = msm8960_cdp_init,
+ .init_early = msm8960_allocate_memory_regions,
+ .init_very_early = msm8960_early_memory,
+MACHINE_END
+#endif
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index dab800f..61b70cf 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -108,7 +108,7 @@
#include <linux/platform_data/qcom_crypto_device.h>
#include "rpm_resources.h"
#include "acpuclock.h"
-
+#include "pm-boot.h"
#define MSM_SHARED_RAM_PHYS 0x40000000
/* Macros assume PMIC GPIOs start at 0 */
@@ -2210,6 +2210,10 @@
#endif
#ifdef CONFIG_IMX074
+static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
+ .mount_angle = 180
+};
+
static struct msm_camera_sensor_flash_data flash_imx074 = {
.flash_type = MSM_CAMERA_FLASH_LED,
.flash_src = &msm_flash_src
@@ -2226,7 +2230,7 @@
.num_resources = ARRAY_SIZE(msm_camera_resources),
.flash_data = &flash_imx074,
.strobe_flash_data = &strobe_flash_xenon,
- .sensor_platform_info = &sensor_board_info,
+ .sensor_platform_info = &imx074_sensor_board_info,
.csi_if = 1
};
struct platform_device msm_camera_sensor_imx074 = {
@@ -2548,19 +2552,15 @@
*/
if (machine_is_msm8x60_fluid()) {
/* fluid has different firmware, gpios */
- peripheral_dsps.name = DSPS_PIL_FLUID_NAME;
pdata->pil_name = DSPS_PIL_FLUID_NAME;
pdata->gpios = dsps_fluid_gpios;
pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
} else {
- peripheral_dsps.name = DSPS_PIL_GENERIC_NAME;
pdata->pil_name = DSPS_PIL_GENERIC_NAME;
pdata->gpios = dsps_surf_gpios;
pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
}
- msm_pil_add_device(&peripheral_dsps);
-
platform_device_register(&msm_dsps_device);
}
#endif /* CONFIG_MSM_DSPS */
@@ -2813,21 +2813,21 @@
.name = "pmem_smi",
};
-void pmem_request_smi_region(void *data)
+void request_smi_region(void *data)
{
int bus_id = (int) data;
msm_bus_scale_client_update_request(bus_id, 1);
}
-void pmem_release_smi_region(void *data)
+void release_smi_region(void *data)
{
int bus_id = (int) data;
msm_bus_scale_client_update_request(bus_id, 0);
}
-void *pmem_setup_smi_region(void)
+void *setup_smi_region(void)
{
return (void *)msm_bus_scale_register_client(&smi_client_pdata);
}
@@ -2836,9 +2836,9 @@
.allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
.cached = 0,
.memory_type = MEMTYPE_SMI,
- .request_region = pmem_request_smi_region,
- .release_region = pmem_release_smi_region,
- .setup_region = pmem_setup_smi_region,
+ .request_region = request_smi_region,
+ .release_region = release_smi_region,
+ .setup_region = setup_smi_region,
.map_on_demand = 1,
};
static struct platform_device android_pmem_smipool_device = {
@@ -6849,6 +6849,7 @@
}
}
+static int msm_bahama_setup_power_enable;
static unsigned int msm_bahama_setup_power(void)
{
int rc = 0;
@@ -6863,64 +6864,53 @@
rc = PTR_ERR(vreg_bahama);
pr_err("%s: regulator_get %s = %d\n", __func__,
msm_bahama_regulator, rc);
+ return rc;
}
- if (!rc)
- rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
- else {
+ rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
+ if (rc) {
pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
msm_bahama_regulator, rc);
goto unget;
}
- if (!rc)
- rc = regulator_enable(vreg_bahama);
- else {
+ rc = regulator_enable(vreg_bahama);
+ if (rc) {
pr_err("%s: regulator_enable %s = %d\n", __func__,
msm_bahama_regulator, rc);
goto unget;
}
- if (!rc) {
- rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
- } else {
+ rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
+ if (rc) {
pr_err("%s: gpio_request %d = %d\n", __func__,
msm_bahama_sys_rst, rc);
goto unenable;
}
- if (!rc) {
- gpio_direction_output(msm_bahama_sys_rst, 0);
- usleep_range(1000, 1050);
- gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
- usleep_range(1000, 1050);
- } else {
- pr_err("%s: gpio_direction_output %d = %d\n", __func__,
- msm_bahama_sys_rst, rc);
- goto unrequest;
- }
-
+ gpio_direction_output(msm_bahama_sys_rst, 0);
+ usleep_range(1000, 1050);
+ gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
+ usleep_range(1000, 1050);
+ msm_bahama_setup_power_enable = 1;
return rc;
-unrequest:
- gpio_free(msm_bahama_sys_rst);
unenable:
regulator_disable(vreg_bahama);
unget:
regulator_put(vreg_bahama);
return rc;
};
+
static unsigned int msm_bahama_shutdown_power(int value)
-
-
{
- gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
-
- gpio_free(msm_bahama_sys_rst);
-
- regulator_disable(vreg_bahama);
-
- regulator_put(vreg_bahama);
+ if (msm_bahama_setup_power_enable) {
+ gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
+ gpio_free(msm_bahama_sys_rst);
+ regulator_disable(vreg_bahama);
+ regulator_put(vreg_bahama);
+ msm_bahama_setup_power_enable = 0;
+ }
return 0;
};
@@ -7573,7 +7563,7 @@
|| defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
|| defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
-/* 8x60 is having 5 SDCC controllers */
+/* 8x60 has 5 SDCC controllers */
#define MAX_SDCC_CONTROLLER 5
struct msm_sdcc_gpio {
@@ -7897,7 +7887,7 @@
unsigned int lpm_uA;
unsigned int hpm_uA;
};
-/* all SDCC controllers requires VDD/VCC voltage */
+/* all SDCC controllers require VDD/VCC voltage */
static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
/* only SDCC1 requires VCCQ voltage */
static struct sdcc_reg sdcc_vccq_reg_data[1];
@@ -7910,7 +7900,7 @@
struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
unsigned char sts; /* regulator enable/disable status */
};
-/* msm8x60 have 5 SDCC controllers */
+/* msm8x60 has 5 SDCC controllers */
static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
@@ -10335,6 +10325,7 @@
msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
msm_pm_data);
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_TZ, NULL));
#ifdef CONFIG_SENSORS_MSM_ADC
if (machine_is_msm8x60_fluid()) {
diff --git a/arch/arm/mach-msm/board-qrd7627a.c b/arch/arm/mach-msm/board-qrd7627a.c
index b07ac00..e46da5b 100644
--- a/arch/arm/mach-msm/board-qrd7627a.c
+++ b/arch/arm/mach-msm/board-qrd7627a.c
@@ -24,6 +24,8 @@
#include <linux/bootmem.h>
#include <linux/mfd/marimba.h>
#include <linux/power_supply.h>
+#include <linux/input/rmi_platformdata.h>
+#include <linux/input/rmi_i2c.h>
#include <asm/mach/mmc.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -62,10 +64,13 @@
GPIO_BT_SYS_REST_EN = 114,
GPIO_WAKE_ON_WIRELESS,
GPIO_BACKLIGHT_EN,
- GPIO_CAM_3MP_PWDN,
+ GPIO_NC,
+ GPIO_CAM_3MP_PWDN, /* CAM_VGA */
GPIO_WLAN_EN,
GPIO_CAM_5MP_SHDN_EN,
GPIO_CAM_5MP_RESET,
+ GPIO_TP,
+ GPIO_CAM_GP_CAMIF_RESET,
};
/* FM Platform power and shutdown routines */
@@ -957,6 +962,136 @@
#endif
+#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C) || \
+defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C_MODULE)
+
+#ifndef CLEARPAD3000_ATTEN_GPIO
+#define CLEARPAD3000_ATTEN_GPIO (48)
+#endif
+
+#ifndef CLEARPAD3000_RESET_GPIO
+#define CLEARPAD3000_RESET_GPIO (26)
+#endif
+
+static int synaptics_touchpad_setup(void);
+
+static struct msm_gpio clearpad3000_cfg_data[] = {
+ {GPIO_CFG(CLEARPAD3000_ATTEN_GPIO, 0, GPIO_CFG_INPUT,
+ GPIO_CFG_NO_PULL, GPIO_CFG_6MA), "rmi4_attn"},
+ {GPIO_CFG(CLEARPAD3000_RESET_GPIO, 0, GPIO_CFG_OUTPUT,
+ GPIO_CFG_PULL_DOWN, GPIO_CFG_8MA), "rmi4_reset"},
+};
+
+static struct rmi_XY_pair rmi_offset = {.x = 0, .y = 0};
+static struct rmi_range rmi_clipx = {.min = 48, .max = 980};
+static struct rmi_range rmi_clipy = {.min = 7, .max = 1647};
+static struct rmi_f11_functiondata synaptics_f11_data = {
+ .swap_axes = false,
+ .flipX = false,
+ .flipY = false,
+ .offset = &rmi_offset,
+ .button_height = 113,
+ .clipX = &rmi_clipx,
+ .clipY = &rmi_clipy,
+};
+
+#define MAX_LEN 100
+
+static ssize_t clearpad3000_virtual_keys_register(struct kobject *kobj,
+ struct kobj_attribute *attr, char *buf)
+{
+ char *virtual_keys = __stringify(EV_KEY) ":" __stringify(KEY_MENU) \
+ ":60:830:120:60" ":" __stringify(EV_KEY) \
+ ":" __stringify(KEY_HOME) ":180:830:120:60" \
+ ":" __stringify(EV_KEY) ":" \
+ __stringify(KEY_SEARCH) ":300:830:120:60" \
+ ":" __stringify(EV_KEY) ":" \
+ __stringify(KEY_BACK) ":420:830:120:60" "\n";
+
+ return snprintf(buf, strnlen(virtual_keys, MAX_LEN) + 1 , "%s",
+ virtual_keys);
+}
+
+static struct kobj_attribute clearpad3000_virtual_keys_attr = {
+ .attr = {
+ .name = "virtualkeys.sensor00fn11",
+ .mode = S_IRUGO,
+ },
+ .show = &clearpad3000_virtual_keys_register,
+};
+
+static struct attribute *virtual_key_properties_attrs[] = {
+ &clearpad3000_virtual_keys_attr.attr,
+ NULL
+};
+
+static struct attribute_group virtual_key_properties_attr_group = {
+ .attrs = virtual_key_properties_attrs,
+};
+
+struct kobject *virtual_key_properties_kobj;
+
+static struct rmi_functiondata synaptics_functiondata[] = {
+ {
+ .function_index = RMI_F11_INDEX,
+ .data = &synaptics_f11_data,
+ },
+};
+
+static struct rmi_functiondata_list synaptics_perfunctiondata = {
+ .count = ARRAY_SIZE(synaptics_functiondata),
+ .functiondata = synaptics_functiondata,
+};
+
+static struct rmi_sensordata synaptics_sensordata = {
+ .perfunctiondata = &synaptics_perfunctiondata,
+ .rmi_sensor_setup = synaptics_touchpad_setup,
+};
+
+static struct rmi_i2c_platformdata synaptics_platformdata = {
+ .i2c_address = 0x2c,
+ .irq_type = IORESOURCE_IRQ_LOWLEVEL,
+ .sensordata = &synaptics_sensordata,
+};
+
+static struct i2c_board_info synaptic_i2c_clearpad3k[] = {
+ {
+ I2C_BOARD_INFO("rmi4_ts", 0x2c),
+ .platform_data = &synaptics_platformdata,
+ },
+};
+
+static int synaptics_touchpad_setup(void)
+{
+ int retval = 0;
+
+ virtual_key_properties_kobj =
+ kobject_create_and_add("board_properties", NULL);
+ if (virtual_key_properties_kobj)
+ retval = sysfs_create_group(virtual_key_properties_kobj,
+ &virtual_key_properties_attr_group);
+ if (!virtual_key_properties_kobj || retval)
+ pr_err("failed to create ft5202 board_properties\n");
+
+ retval = msm_gpios_request_enable(clearpad3000_cfg_data,
+ sizeof(clearpad3000_cfg_data)/sizeof(struct msm_gpio));
+ if (retval) {
+ pr_err("%s:Failed to obtain touchpad GPIO %d. Code: %d.",
+ __func__, CLEARPAD3000_ATTEN_GPIO, retval);
+ retval = 0; /* ignore the err */
+ }
+ synaptics_platformdata.irq = gpio_to_irq(CLEARPAD3000_ATTEN_GPIO);
+
+ gpio_set_value(CLEARPAD3000_RESET_GPIO, 0);
+ usleep(10000);
+ gpio_set_value(CLEARPAD3000_RESET_GPIO, 1);
+ usleep(50000);
+
+ return retval;
+}
+#endif
+
+
static struct android_usb_platform_data android_usb_pdata = {
.update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
};
@@ -1279,7 +1414,7 @@
return rc;
}
-#define GPIO_SDC1_HW_DET 85
+#define GPIO_SDC1_HW_DET 42
#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
&& defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
@@ -1300,7 +1435,7 @@
} else {
status = gpio_direction_input(GPIO_SDC1_HW_DET);
if (!status)
- status = gpio_get_value(GPIO_SDC1_HW_DET);
+ status = !gpio_get_value(GPIO_SDC1_HW_DET);
gpio_free(GPIO_SDC1_HW_DET);
}
return status;
@@ -1455,6 +1590,57 @@
early_param("fb_size", fb_size_setup);
+static struct resource msm_fb_resources[] = {
+ {
+ .flags = IORESOURCE_DMA,
+ }
+};
+
+static int msm_fb_detect_panel(const char *name)
+{
+ int ret;
+
+ if (!strncmp(name, "mipi_video_truly_wvga", 21))
+ ret = 0;
+ else
+ ret = -ENODEV;
+
+ return ret;
+}
+
+static int mipi_truly_set_bl(int on)
+{
+ gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, !!on);
+
+ return 1;
+}
+
+static struct msm_fb_platform_data msm_fb_pdata = {
+ .detect_client = msm_fb_detect_panel,
+};
+
+static struct platform_device msm_fb_device = {
+ .name = "msm_fb",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(msm_fb_resources),
+ .resource = msm_fb_resources,
+ .dev = {
+ .platform_data = &msm_fb_pdata,
+ }
+};
+
+static struct msm_panel_common_pdata mipi_truly_pdata = {
+ .pmic_backlight = mipi_truly_set_bl,
+};
+
+static struct platform_device mipi_dsi_truly_panel_device = {
+ .name = "mipi_truly",
+ .id = 0,
+ .dev = {
+ .platform_data = &mipi_truly_pdata,
+ }
+};
+
static void __init msm7627a_init_mmc(void)
{
vreg_emmc = vreg_get(NULL, "emmc");
@@ -1689,6 +1875,334 @@
.dev.platform_data = &msm_psy_batt_data,
};
+#ifdef CONFIG_MSM_CAMERA
+static uint32_t camera_off_gpio_table[] = {
+ GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+};
+
+static uint32_t camera_on_gpio_table[] = {
+ GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+};
+
+static void qrd1_camera_gpio_cfg(void)
+{
+
+ int rc = 0;
+
+ rc = gpio_request(GPIO_CAM_5MP_SHDN_EN, "ov5640");
+ if (rc < 0)
+ pr_err("%s: gpio_request---GPIO_CAM_5MP_SHDN_EN failed!",
+ __func__);
+
+
+ rc = gpio_tlmm_config(GPIO_CFG(GPIO_CAM_5MP_SHDN_EN, 0,
+ GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_2MA), GPIO_CFG_ENABLE);
+ if (rc < 0) {
+ pr_err("%s: unable to enable Power Down gpio for main"
+ "camera!\n", __func__);
+ gpio_free(GPIO_CAM_5MP_SHDN_EN);
+ }
+
+
+ rc = gpio_request(GPIO_CAM_5MP_RESET, "ov5640");
+ if (rc < 0) {
+ pr_err("%s: gpio_request---GPIO_CAM_5MP_RESET failed!",
+ __func__);
+ gpio_free(GPIO_CAM_5MP_SHDN_EN);
+ }
+
+
+ rc = gpio_tlmm_config(GPIO_CFG(GPIO_CAM_5MP_RESET, 0,
+ GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_2MA), GPIO_CFG_ENABLE);
+ if (rc < 0) {
+ pr_err("%s: unable to enable reset gpio for main camera!\n",
+ __func__);
+ gpio_free(GPIO_CAM_5MP_RESET);
+ }
+
+ rc = gpio_request(GPIO_CAM_3MP_PWDN, "ov7692");
+ if (rc < 0)
+ pr_err("%s: gpio_request---GPIO_CAM_3MP_PWDN failed!",
+ __func__);
+
+ rc = gpio_tlmm_config(GPIO_CFG(GPIO_CAM_3MP_PWDN, 0,
+ GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_2MA), GPIO_CFG_ENABLE);
+ if (rc < 0) {
+ pr_err("%s: unable to enable Power Down gpio for front"
+ "camera!\n", __func__);
+ gpio_free(GPIO_CAM_3MP_PWDN);
+ }
+
+ gpio_direction_output(GPIO_CAM_5MP_SHDN_EN, 1);
+ gpio_direction_output(GPIO_CAM_5MP_RESET, 1);
+ gpio_direction_output(GPIO_CAM_3MP_PWDN, 1);
+}
+
+#endif
+static struct vreg *vreg_gp1;
+static struct vreg *vreg_gp2;
+static struct vreg *vreg_gp3;
+static void msm_camera_vreg_config(int vreg_en)
+{
+ int rc;
+
+ if (vreg_gp1 == NULL) {
+ vreg_gp1 = vreg_get(NULL, "msme1");
+ if (IS_ERR(vreg_gp1)) {
+ pr_err("%s: vreg_get(%s) failed (%ld)\n",
+ __func__, "msme1", PTR_ERR(vreg_gp1));
+ return;
+ }
+
+ rc = vreg_set_level(vreg_gp1, 1800);
+ if (rc) {
+ pr_err("%s: GP1 set_level failed (%d)\n",
+ __func__, rc);
+ return;
+ }
+ }
+
+ if (vreg_gp2 == NULL) {
+ vreg_gp2 = vreg_get(NULL, "gp2");
+ if (IS_ERR(vreg_gp2)) {
+ pr_err("%s: vreg_get(%s) failed (%ld)\n",
+ __func__, "gp2", PTR_ERR(vreg_gp2));
+ return;
+ }
+
+ rc = vreg_set_level(vreg_gp2, 2850);
+ if (rc) {
+ pr_err("%s: GP2 set_level failed (%d)\n",
+ __func__, rc);
+ }
+ }
+
+ if (vreg_gp3 == NULL) {
+ vreg_gp3 = vreg_get(NULL, "usb2");
+ if (IS_ERR(vreg_gp3)) {
+ pr_err("%s: vreg_get(%s) failed (%ld)\n",
+ __func__, "gp3", PTR_ERR(vreg_gp3));
+ return;
+ }
+
+ rc = vreg_set_level(vreg_gp3, 1800);
+ if (rc) {
+ pr_err("%s: GP3 set level failed (%d)\n",
+ __func__, rc);
+ }
+ }
+
+ if (vreg_en) {
+ rc = vreg_enable(vreg_gp1);
+ if (rc) {
+ pr_err("%s: GP1 enable failed (%d)\n",
+ __func__, rc);
+ return;
+ }
+
+ rc = vreg_enable(vreg_gp2);
+ if (rc) {
+ pr_err("%s: GP2 enable failed (%d)\n",
+ __func__, rc);
+ }
+
+ rc = vreg_enable(vreg_gp3);
+ if (rc) {
+ pr_err("%s: GP3 enable failed (%d)\n",
+ __func__, rc);
+ }
+ } else {
+ rc = vreg_disable(vreg_gp1);
+ if (rc)
+ pr_err("%s: GP1 disable failed (%d)\n",
+ __func__, rc);
+
+ rc = vreg_disable(vreg_gp2);
+ if (rc) {
+ pr_err("%s: GP2 disable failed (%d)\n",
+ __func__, rc);
+ }
+
+ rc = vreg_disable(vreg_gp3);
+ if (rc) {
+ pr_err("%s: GP3 disable failed (%d)\n",
+ __func__, rc);
+ }
+ }
+}
+
+static int config_gpio_table(uint32_t *table, int len)
+{
+ int rc = 0, i = 0;
+
+ for (i = 0; i < len; i++) {
+ rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
+ if (rc) {
+ pr_err("%s not able to get gpio\n", __func__);
+ for (i--; i >= 0; i--)
+ gpio_tlmm_config(camera_off_gpio_table[i],
+ GPIO_CFG_ENABLE);
+ break;
+ }
+ }
+ return rc;
+}
+
+static int config_camera_on_gpios_rear(void)
+{
+ int rc = 0;
+
+ msm_camera_vreg_config(1);
+
+ rc = config_gpio_table(camera_on_gpio_table,
+ ARRAY_SIZE(camera_on_gpio_table));
+ if (rc < 0) {
+ pr_err("%s: CAMSENSOR gpio table request"
+ "failed\n", __func__);
+ return rc;
+ }
+
+ return rc;
+}
+
+static void config_camera_off_gpios_rear(void)
+{
+ msm_camera_vreg_config(0);
+ config_gpio_table(camera_off_gpio_table,
+ ARRAY_SIZE(camera_off_gpio_table));
+}
+
+static int config_camera_on_gpios_front(void)
+{
+ int rc = 0;
+
+ msm_camera_vreg_config(1);
+
+ rc = config_gpio_table(camera_on_gpio_table,
+ ARRAY_SIZE(camera_on_gpio_table));
+ if (rc < 0) {
+ pr_err("%s: CAMSENSOR gpio table request"
+ "failed\n", __func__);
+ return rc;
+ }
+
+ return rc;
+}
+
+static void config_camera_off_gpios_front(void)
+{
+ msm_camera_vreg_config(0);
+
+ config_gpio_table(camera_off_gpio_table,
+ ARRAY_SIZE(camera_off_gpio_table));
+}
+
+struct msm_camera_device_platform_data msm_camera_data_rear = {
+ .camera_gpio_on = config_camera_on_gpios_rear,
+ .camera_gpio_off = config_camera_off_gpios_rear,
+ .ioext.csiphy = 0xA1000000,
+ .ioext.csisz = 0x00100000,
+ .ioext.csiirq = INT_CSI_IRQ_1,
+ .ioclk.mclk_clk_rate = 24000000,
+ .ioclk.vfe_clk_rate = 192000000,
+ .ioext.appphy = MSM_CLK_CTL_PHYS,
+ .ioext.appsz = MSM_CLK_CTL_SIZE,
+};
+
+struct msm_camera_device_platform_data msm_camera_data_front = {
+ .camera_gpio_on = config_camera_on_gpios_front,
+ .camera_gpio_off = config_camera_off_gpios_front,
+ .ioext.csiphy = 0xA0F00000,
+ .ioext.csisz = 0x00100000,
+ .ioext.csiirq = INT_CSI_IRQ_0,
+ .ioclk.mclk_clk_rate = 24000000,
+ .ioclk.vfe_clk_rate = 192000000,
+ .ioext.appphy = MSM_CLK_CTL_PHYS,
+ .ioext.appsz = MSM_CLK_CTL_SIZE,
+};
+
+#ifdef CONFIG_OV5640
+static struct msm_camera_sensor_platform_info ov5640_sensor_info = {
+ .mount_angle = 90
+};
+
+static struct msm_camera_sensor_flash_src msm_flash_src_ov5640 = {
+ .flash_sr_type = MSM_CAMERA_FLASH_SRC_LED,
+ ._fsrc.led_src.led_name = "flashlight",
+ ._fsrc.led_src.led_name_len = 10,
+};
+
+static struct msm_camera_sensor_flash_data flash_ov5640 = {
+ .flash_type = MSM_CAMERA_FLASH_LED,
+ .flash_src = &msm_flash_src_ov5640,
+};
+
+static struct msm_camera_sensor_info msm_camera_sensor_ov5640_data = {
+ .sensor_name = "ov5640",
+ .sensor_reset_enable = 1,
+ .sensor_reset = GPIO_CAM_5MP_RESET,
+ .sensor_pwd = GPIO_CAM_5MP_SHDN_EN,
+ .vcm_pwd = 0,
+ .vcm_enable = 0,
+ .pdata = &msm_camera_data_rear,
+ .flash_data = &flash_ov5640,
+ .sensor_platform_info = &ov5640_sensor_info,
+ .csi_if = 1,
+};
+
+static struct platform_device msm_camera_sensor_ov5640 = {
+ .name = "msm_camera_ov5640",
+ .dev = {
+ .platform_data = &msm_camera_sensor_ov5640_data,
+ },
+};
+#endif
+
+#ifdef CONFIG_WEBCAM_OV7692_QRD
+static struct msm_camera_sensor_platform_info ov7692_sensor_7627a_info = {
+ .mount_angle = 90
+};
+
+static struct msm_camera_sensor_flash_data flash_ov7692 = {
+ .flash_type = MSM_CAMERA_FLASH_NONE,
+};
+
+static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
+ .sensor_name = "ov7692",
+ .sensor_reset_enable = 0,
+ .sensor_reset = 0,
+ .sensor_pwd = GPIO_CAM_3MP_PWDN,
+ .vcm_pwd = 0,
+ .vcm_enable = 0,
+ .pdata = &msm_camera_data_front,
+ .flash_data = &flash_ov7692,
+ .sensor_platform_info = &ov7692_sensor_7627a_info,
+ .csi_if = 1,
+};
+
+static struct platform_device msm_camera_sensor_ov7692 = {
+ .name = "msm_camera_ov7692",
+ .dev = {
+ .platform_data = &msm_camera_sensor_ov7692_data,
+ },
+};
+#endif
+
+static struct i2c_board_info i2c_camera_devices[] = {
+ #ifdef CONFIG_OV5640
+ {
+ I2C_BOARD_INFO("ov5640", 0x78 >> 1),
+ },
+ #endif
+ #ifdef CONFIG_WEBCAM_OV7692_QRD
+ {
+ I2C_BOARD_INFO("ov7692", 0x78),
+ },
+ #endif
+};
static struct platform_device *qrd1_devices[] __initdata = {
&msm_device_dmov,
&msm_device_smd,
@@ -1701,14 +2215,22 @@
&android_usb_device,
&android_pmem_device,
&android_pmem_adsp_device,
+ &msm_fb_device,
&android_pmem_audio_device,
&msm_device_snd,
&msm_device_adspdec,
&msm_batt_device,
+#ifdef CONFIG_OV5640
+ &msm_camera_sensor_ov5640,
+#endif
+#ifdef CONFIG_WEBCAM_OV7692_QRD
+ &msm_camera_sensor_ov7692,
+#endif
&msm_kgsl_3d0,
#ifdef CONFIG_BT
&msm_bt_power_device,
#endif
+ &mipi_dsi_truly_panel_device,
&msm_wlan_ar6000_pm_device,
&asoc_msm_pcm,
&asoc_msm_dai0,
@@ -1733,7 +2255,15 @@
static void __init msm_msm7627a_allocate_memory_regions(void)
{
- pr_info("Dummy allocation for fb\n");
+ void *addr;
+ unsigned long size;
+
+ size = fb_size ? : MSM_FB_SIZE;
+ addr = alloc_bootmem_align(size, 0x1000);
+ msm_fb_resources[0].start = __pa(addr);
+ msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
+ pr_info("allocating %lu bytes at %p (%lx physical) for fb\n", size,
+ addr, __pa(addr));
}
static struct memtype_reserve msm7627a_reserve_table[] __initdata = {
@@ -1747,6 +2277,159 @@
},
};
+static struct msm_panel_common_pdata mdp_pdata = {
+ .gpio = 97,
+ .mdp_rev = MDP_REV_303,
+};
+
+#define GPIO_LCDC_BRDG_PD 128
+#define GPIO_LCDC_BRDG_RESET_N 129
+#define GPIO_LCD_DSI_SEL 125
+
+static unsigned mipi_dsi_gpio[] = {
+ GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT,
+ GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
+ GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT,
+ GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* LCDC_BRDG_PD */
+};
+
+static unsigned lcd_dsi_sel_gpio[] = {
+ GPIO_CFG(GPIO_LCD_DSI_SEL, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_2MA),
+};
+
+enum {
+ DSI_SINGLE_LANE = 1,
+ DSI_TWO_LANES,
+};
+
+static int msm_fb_get_lane_config(void)
+{
+ pr_info("DSI_TWO_LANES\n");
+ return DSI_TWO_LANES;
+}
+
+static int mipi_truly_sel_mode(int video_mode)
+{
+ int rc = 0;
+
+ rc = gpio_request(GPIO_LCD_DSI_SEL, "lcd_dsi_sel");
+ if (rc < 0)
+ goto gpio_error;
+
+ rc = gpio_tlmm_config(lcd_dsi_sel_gpio[0], GPIO_CFG_ENABLE);
+ if (rc)
+ goto gpio_error;
+
+ rc = gpio_direction_output(GPIO_LCD_DSI_SEL, 1);
+ if (!rc) {
+ gpio_set_value_cansleep(GPIO_LCD_DSI_SEL, video_mode);
+ return rc;
+ } else {
+ goto gpio_error;
+ }
+
+gpio_error:
+ pr_err("mipi_truly_sel_mode failed\n");
+ gpio_free(GPIO_LCD_DSI_SEL);
+ return rc;
+}
+
+static int msm_fb_dsi_client_qrd1_reset(void)
+{
+ int rc = 0;
+
+ rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
+ if (rc < 0) {
+ pr_err("failed to request lcd brdg reset_n\n");
+ return rc;
+ }
+
+ rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
+ if (rc < 0) {
+ pr_err("Failed to enable LCDC Bridge reset enable\n");
+ return rc;
+ }
+
+ rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
+ if (rc < 0) {
+ pr_err("Failed GPIO bridge pd\n");
+ gpio_free(GPIO_LCDC_BRDG_RESET_N);
+ return rc;
+ }
+
+ mipi_truly_sel_mode(1);
+
+ return rc;
+}
+
+static int msm_fb_dsi_client_reset(void)
+{
+ int rc = 0;
+
+ rc = msm_fb_dsi_client_qrd1_reset();
+ return rc;
+}
+
+static int dsi_gpio_initialized;
+
+static int mipi_dsi_panel_qrd1_power(int on)
+{
+ int rc = 0;
+
+ if (!dsi_gpio_initialized) {
+ rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
+ if (rc < 0)
+ return rc;
+
+ rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
+ if (rc < 0) {
+ pr_err("failed to enable backlight\n");
+ gpio_free(GPIO_BACKLIGHT_EN);
+ return rc;
+ }
+ dsi_gpio_initialized = 1;
+ }
+
+ gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, !!on);
+
+ if (!on) {
+ gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 1);
+ msleep(20);
+ gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 0);
+ msleep(20);
+ gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 1);
+
+ }
+
+ return rc;
+}
+
+static int mipi_dsi_panel_power(int on)
+{
+ int rc = 0;
+
+ rc = mipi_dsi_panel_qrd1_power(on);
+ return rc;
+}
+
+#define MDP_303_VSYNC_GPIO 97
+
+#ifdef CONFIG_FB_MSM_MDP303
+static struct mipi_dsi_platform_data mipi_dsi_pdata = {
+ .vsync_gpio = MDP_303_VSYNC_GPIO,
+ .dsi_power_save = mipi_dsi_panel_power,
+ .dsi_client_reset = msm_fb_dsi_client_reset,
+ .get_lane_config = msm_fb_get_lane_config,
+};
+#endif
+
+static void __init msm_fb_add_devices(void)
+{
+ msm_fb_register_device("mdp", &mdp_pdata);
+ msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
+}
+
static void __init size_pmem_devices(void)
{
#ifdef CONFIG_ANDROID_PMEM
@@ -1820,6 +2503,7 @@
msm_device_i2c_init();
msm7627a_init_mmc();
+ qrd1_camera_gpio_cfg();
#ifdef CONFIG_SERIAL_MSM_HS
msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
@@ -1831,21 +2515,32 @@
msm_device_otg.dev.platform_data = &msm_otg_pdata;
#endif
msm_device_gadget_peripheral.dev.platform_data =
- &msm_gadget_pdata;
+ &msm_gadget_pdata;
platform_add_devices(qrd1_devices,
- ARRAY_SIZE(qrd1_devices));
+ ARRAY_SIZE(qrd1_devices));
#ifdef CONFIG_USB_EHCI_MSM_72K
msm7627a_init_host();
#endif
msm_pm_set_platform_data(msm7627a_pm_data,
ARRAY_SIZE(msm7627a_pm_data));
+ msm_fb_add_devices();
#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
- bahama_devices,
- ARRAY_SIZE(bahama_devices));
+ bahama_devices,
+ ARRAY_SIZE(bahama_devices));
bt_power_init();
#endif
+
+ i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID, i2c_camera_devices,
+ ARRAY_SIZE(i2c_camera_devices));
+
+#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C) || \
+ defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C_MODULE)
+ i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
+ synaptic_i2c_clearpad3k,
+ ARRAY_SIZE(synaptic_i2c_clearpad3k));
+#endif
platform_device_register(&hs_pdev);
#ifdef CONFIG_MSM_RPC_VIBRATOR
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index b7f6608..0dcd0f4 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -55,6 +55,7 @@
#include "msm-keypad-devices.h"
#include "acpuclock.h"
#include "pm.h"
+#include "pm-boot.h"
#include "proc_comm.h"
#ifdef CONFIG_USB_ANDROID
#include <linux/usb/android_composite.h>
@@ -2436,6 +2437,8 @@
spi_register_board_info(msm_spi_board_info,
ARRAY_SIZE(msm_spi_board_info));
msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
+ BUG_ON(msm_pm_boot_init(MSM_PM_BOOT_CONFIG_RESET_VECTOR,
+ (uint32_t *)PAGE_OFFSET));
#ifdef CONFIG_SURF_FFA_GPIO_KEYPAD
if (machine_is_qsd8x50_ffa())
diff --git a/arch/arm/mach-msm/clock-7x30.c b/arch/arm/mach-msm/clock-7x30.c
index 50be14b..5df1700 100644
--- a/arch/arm/mach-msm/clock-7x30.c
+++ b/arch/arm/mach-msm/clock-7x30.c
@@ -68,7 +68,6 @@
#define MI2S_NS_REG REG(0x02E0)
#define MI2S_RX_NS_REG REG(0x0070)
#define MI2S_TX_NS_REG REG(0x0078)
-#define MIDI_NS_REG REG(0x02D0)
#define PLL_ENA_REG REG(0x0264)
#define PMDH_NS_REG REG(0x008C)
#define SDAC_NS_REG REG(0x009C)
@@ -137,36 +136,71 @@
/*
* Clock frequency definitions and macros
*/
-#define F_BASIC(f, s, div, v) \
+#define F_BASIC(f, s, div) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = SDIV(SRC_SEL_##s, div), \
- .sys_vdd = v, \
}
-#define F_MND16(f, s, div, m, n, v) \
+#define F_MND16(f, s, div, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD16(m, n), \
.ns_val = N16(m, n) | SPDIV(SRC_SEL_##s, div), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
-#define F_MND8(f, nmsb, nlsb, s, div, m, n, v) \
+#define F_MND8(f, nmsb, nlsb, s, div, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD8(m, n), \
.ns_val = N8(nmsb, nlsb, m, n) | SPDIV(SRC_SEL_##s, div), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_ops clk_ops_rcg_7x30;
+enum vdd_dig_levels {
+ VDD_DIG_NONE,
+ VDD_DIG_LOW,
+ VDD_DIG_NOMINAL,
+ VDD_DIG_HIGH
+};
+
+static int set_vdd_dig(struct clk_vdd_class *vdd_class, int level)
+{
+ int rc, target_mv;
+
+ static const int mv[] = {
+ [VDD_DIG_NONE] = 1000,
+ [VDD_DIG_LOW] = 1000,
+ [VDD_DIG_NOMINAL] = 1100,
+ [VDD_DIG_HIGH] = 1200
+ };
+
+ target_mv = mv[level];
+ rc = msm_proc_comm(PCOM_CLKCTL_RPC_MIN_MSMC1, &target_mv, NULL);
+ if (rc)
+ return rc;
+ if (target_mv)
+ rc = -EINVAL;
+
+ return rc;
+}
+
+static DEFINE_VDD_CLASS(vdd_dig, set_vdd_dig);
+
+#define VDD_DIG_FMAX_MAP1(l1, f1) \
+ .vdd_class = &vdd_dig, \
+ .fmax[VDD_DIG_##l1] = (f1)
+#define VDD_DIG_FMAX_MAP2(l1, f1, l2, f2) \
+ .vdd_class = &vdd_dig, \
+ .fmax[VDD_DIG_##l1] = (f1), \
+ .fmax[VDD_DIG_##l2] = (f2)
+
#define PCOM_XO_DISABLE 0
#define PCOM_XO_ENABLE 1
#define PCOM_XO_TCXO 0
@@ -290,7 +324,7 @@
static struct clk_ops clk_ops_branch;
static struct clk_freq_tbl clk_tbl_axi[] = {
- F_RAW(1, &lpxo_clk.c, 0, 0, 0, 0, NOMINAL, NULL),
+ F_RAW(1, &lpxo_clk.c, 0, 0, 0, 0, NULL),
F_END,
};
@@ -308,6 +342,7 @@
.c = {
.dbg_name = "glbl_root_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 1),
CLK_INIT(glbl_root_clk.c),
},
};
@@ -948,10 +983,10 @@
};
static struct clk_freq_tbl clk_tbl_csi[] = {
- F_MND8( 0, 0, 0, gnd, 1, 0, 0, NONE),
- F_MND8(153600000, 24, 17, pll1, 2, 2, 5, NOMINAL),
- F_MND8(192000000, 24, 17, pll1, 4, 0, 0, NOMINAL),
- F_MND8(384000000, 24, 17, pll1, 2, 0, 0, NOMINAL),
+ F_MND8( 0, 0, 0, gnd, 1, 0, 0),
+ F_MND8(153600000, 24, 17, pll1, 2, 2, 5),
+ F_MND8(192000000, 24, 17, pll1, 4, 0, 0),
+ F_MND8(384000000, 24, 17, pll1, 2, 0, 0),
F_END,
};
@@ -973,12 +1008,13 @@
.c = {
.dbg_name = "csi0_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 384000000),
CLK_INIT(csi0_clk.c),
},
};
static struct clk_freq_tbl clk_tbl_tcxo[] = {
- F_RAW(19200000, &tcxo_clk.c, 0, 0, 0, 0, NOMINAL, NULL),
+ F_RAW(19200000, &tcxo_clk.c, 0, 0, 0, 0, NULL),
F_END,
};
@@ -997,6 +1033,7 @@
.c = {
.dbg_name = "i2c_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 19200000),
CLK_INIT(i2c_clk.c),
},
};
@@ -1016,6 +1053,7 @@
.c = {
.dbg_name = "i2c_2_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 19200000),
CLK_INIT(i2c_2_clk.c),
},
};
@@ -1035,6 +1073,7 @@
.c = {
.dbg_name = "qup_i2c_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 19200000),
CLK_INIT(qup_i2c_clk.c),
},
};
@@ -1054,6 +1093,7 @@
.c = {
.dbg_name = "uart1_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 19200000),
CLK_INIT(uart1_clk.c),
},
};
@@ -1073,23 +1113,24 @@
.c = {
.dbg_name = "uart2_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 19200000),
CLK_INIT(uart2_clk.c),
},
};
static struct clk_freq_tbl clk_tbl_uartdm[] = {
- F_MND16( 0, gnd, 1, 0, 0, NONE),
- F_MND16( 3686400, pll3, 3, 3, 200, NOMINAL),
- F_MND16( 7372800, pll3, 3, 3, 100, NOMINAL),
- F_MND16(14745600, pll3, 3, 3, 50, NOMINAL),
- F_MND16(32000000, pll3, 3, 25, 192, NOMINAL),
- F_MND16(40000000, pll3, 3, 125, 768, NOMINAL),
- F_MND16(46400000, pll3, 3, 145, 768, NOMINAL),
- F_MND16(48000000, pll3, 3, 25, 128, NOMINAL),
- F_MND16(51200000, pll3, 3, 5, 24, NOMINAL),
- F_MND16(56000000, pll3, 3, 175, 768, NOMINAL),
- F_MND16(58982400, pll3, 3, 6, 25, NOMINAL),
- F_MND16(64000000, pll1, 4, 1, 3, NOMINAL),
+ F_MND16( 0, gnd, 1, 0, 0),
+ F_MND16( 3686400, pll3, 3, 3, 200),
+ F_MND16( 7372800, pll3, 3, 3, 100),
+ F_MND16(14745600, pll3, 3, 3, 50),
+ F_MND16(32000000, pll3, 3, 25, 192),
+ F_MND16(40000000, pll3, 3, 125, 768),
+ F_MND16(46400000, pll3, 3, 145, 768),
+ F_MND16(48000000, pll3, 3, 25, 128),
+ F_MND16(51200000, pll3, 3, 5, 24),
+ F_MND16(56000000, pll3, 3, 175, 768),
+ F_MND16(58982400, pll3, 3, 6, 25),
+ F_MND16(64000000, pll1, 4, 1, 3),
F_END,
};
@@ -1111,6 +1152,7 @@
.c = {
.dbg_name = "uart1dm_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 64000000),
CLK_INIT(uart1dm_clk.c),
},
};
@@ -1133,20 +1175,21 @@
.c = {
.dbg_name = "uart2dm_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 64000000),
CLK_INIT(uart2dm_clk.c),
},
};
static struct clk_freq_tbl clk_tbl_mdh[] = {
- F_BASIC( 0, gnd, 1, NONE),
- F_BASIC( 49150000, pll3, 15, NOMINAL),
- F_BASIC( 92160000, pll3, 8, NOMINAL),
- F_BASIC(122880000, pll3, 6, NOMINAL),
- F_BASIC(184320000, pll3, 4, NOMINAL),
- F_BASIC(245760000, pll3, 3, NOMINAL),
- F_BASIC(368640000, pll3, 2, NOMINAL),
- F_BASIC(384000000, pll1, 2, NOMINAL),
- F_BASIC(445500000, pll4, 2, NOMINAL),
+ F_BASIC( 0, gnd, 1),
+ F_BASIC( 49150000, pll3, 15),
+ F_BASIC( 92160000, pll3, 8),
+ F_BASIC(122880000, pll3, 6),
+ F_BASIC(184320000, pll3, 4),
+ F_BASIC(245760000, pll3, 3),
+ F_BASIC(368640000, pll3, 2),
+ F_BASIC(384000000, pll1, 2),
+ F_BASIC(445500000, pll4, 2),
F_END,
};
@@ -1166,6 +1209,7 @@
.dbg_name = "emdh_clk",
.flags = CLKFLAG_MIN | CLKFLAG_MAX,
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 445500000),
CLK_INIT(emdh_clk.c),
.depends = &axi_li_adsp_a_clk.c,
},
@@ -1187,30 +1231,31 @@
.dbg_name = "pmdh_clk",
.flags = CLKFLAG_MIN | CLKFLAG_MAX,
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 445500000),
CLK_INIT(pmdh_clk.c),
.depends = &axi_li_adsp_a_clk.c,
},
};
static struct clk_freq_tbl clk_tbl_grp[] = {
- F_BASIC( 24576000, lpxo, 1, NOMINAL),
- F_BASIC( 46080000, pll3, 16, NOMINAL),
- F_BASIC( 49152000, pll3, 15, NOMINAL),
- F_BASIC( 52662875, pll3, 14, NOMINAL),
- F_BASIC( 56713846, pll3, 13, NOMINAL),
- F_BASIC( 61440000, pll3, 12, NOMINAL),
- F_BASIC( 67025454, pll3, 11, NOMINAL),
- F_BASIC( 73728000, pll3, 10, NOMINAL),
- F_BASIC( 81920000, pll3, 9, NOMINAL),
- F_BASIC( 92160000, pll3, 8, NOMINAL),
- F_BASIC(105325714, pll3, 7, NOMINAL),
- F_BASIC(122880000, pll3, 6, NOMINAL),
- F_BASIC(147456000, pll3, 5, NOMINAL),
- F_BASIC(184320000, pll3, 4, NOMINAL),
- F_BASIC(192000000, pll1, 4, NOMINAL),
- F_BASIC(245760000, pll3, 3, HIGH),
+ F_BASIC( 24576000, lpxo, 1),
+ F_BASIC( 46080000, pll3, 16),
+ F_BASIC( 49152000, pll3, 15),
+ F_BASIC( 52662875, pll3, 14),
+ F_BASIC( 56713846, pll3, 13),
+ F_BASIC( 61440000, pll3, 12),
+ F_BASIC( 67025454, pll3, 11),
+ F_BASIC( 73728000, pll3, 10),
+ F_BASIC( 81920000, pll3, 9),
+ F_BASIC( 92160000, pll3, 8),
+ F_BASIC(105325714, pll3, 7),
+ F_BASIC(122880000, pll3, 6),
+ F_BASIC(147456000, pll3, 5),
+ F_BASIC(184320000, pll3, 4),
+ F_BASIC(192000000, pll1, 4),
+ F_BASIC(245760000, pll3, 3),
/* Sync to AXI. Hence this "rate" is not fixed. */
- F_RAW(1, &lpxo_clk.c, 0, BIT(14), 0, 0, NOMINAL, NULL),
+ F_RAW(1, &lpxo_clk.c, 0, BIT(14), 0, 0, NULL),
F_END,
};
@@ -1231,6 +1276,7 @@
.c = {
.dbg_name = "grp_2d_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP2(NOMINAL, 192000000, HIGH, 245760000),
CLK_INIT(grp_2d_clk.c),
.depends = &axi_grp_2d_clk.c,
},
@@ -1250,6 +1296,7 @@
.c = {
.dbg_name = "grp_3d_src_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP2(NOMINAL, 192000000, HIGH, 245760000),
CLK_INIT(grp_3d_src_clk.c),
.depends = &axi_li_grp_clk.c,
},
@@ -1288,14 +1335,14 @@
};
static struct clk_freq_tbl clk_tbl_sdc1_3[] = {
- F_MND8( 0, 0, 0, gnd, 1, 0, 0, NONE),
- F_MND8( 144000, 19, 12, lpxo, 1, 1, 171, NOMINAL),
- F_MND8( 400000, 19, 12, lpxo, 1, 2, 123, NOMINAL),
- F_MND8(16027000, 19, 12, pll3, 3, 14, 215, NOMINAL),
- F_MND8(17000000, 19, 12, pll3, 4, 19, 206, NOMINAL),
- F_MND8(20480000, 19, 12, pll3, 4, 23, 212, NOMINAL),
- F_MND8(24576000, 19, 12, lpxo, 1, 0, 0, NOMINAL),
- F_MND8(49152000, 19, 12, pll3, 3, 1, 5, NOMINAL),
+ F_MND8( 0, 0, 0, gnd, 1, 0, 0),
+ F_MND8( 144000, 19, 12, lpxo, 1, 1, 171),
+ F_MND8( 400000, 19, 12, lpxo, 1, 2, 123),
+ F_MND8(16027000, 19, 12, pll3, 3, 14, 215),
+ F_MND8(17000000, 19, 12, pll3, 4, 19, 206),
+ F_MND8(20480000, 19, 12, pll3, 4, 23, 212),
+ F_MND8(24576000, 19, 12, lpxo, 1, 0, 0),
+ F_MND8(49152000, 19, 12, pll3, 3, 1, 5),
F_END,
};
@@ -1317,6 +1364,7 @@
.c = {
.dbg_name = "sdc1_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 49152000),
CLK_INIT(sdc1_clk.c),
},
};
@@ -1339,19 +1387,20 @@
.c = {
.dbg_name = "sdc3_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 49152000),
CLK_INIT(sdc3_clk.c),
},
};
static struct clk_freq_tbl clk_tbl_sdc2_4[] = {
- F_MND8( 0, 0, 0, gnd, 1, 0, 0, NONE),
- F_MND8( 144000, 20, 13, lpxo, 1, 1, 171, NOMINAL),
- F_MND8( 400000, 20, 13, lpxo, 1, 2, 123, NOMINAL),
- F_MND8(16027000, 20, 13, pll3, 3, 14, 215, NOMINAL),
- F_MND8(17000000, 20, 13, pll3, 4, 19, 206, NOMINAL),
- F_MND8(20480000, 20, 13, pll3, 4, 23, 212, NOMINAL),
- F_MND8(24576000, 20, 13, lpxo, 1, 0, 0, NOMINAL),
- F_MND8(49152000, 20, 13, pll3, 3, 1, 5, NOMINAL),
+ F_MND8( 0, 0, 0, gnd, 1, 0, 0),
+ F_MND8( 144000, 20, 13, lpxo, 1, 1, 171),
+ F_MND8( 400000, 20, 13, lpxo, 1, 2, 123),
+ F_MND8(16027000, 20, 13, pll3, 3, 14, 215),
+ F_MND8(17000000, 20, 13, pll3, 4, 19, 206),
+ F_MND8(20480000, 20, 13, pll3, 4, 23, 212),
+ F_MND8(24576000, 20, 13, lpxo, 1, 0, 0),
+ F_MND8(49152000, 20, 13, pll3, 3, 1, 5),
F_END,
};
@@ -1373,6 +1422,7 @@
.c = {
.dbg_name = "sdc2_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 49152000),
CLK_INIT(sdc2_clk.c),
},
};
@@ -1395,20 +1445,21 @@
.c = {
.dbg_name = "sdc4_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 49152000),
CLK_INIT(sdc4_clk.c),
},
};
static struct clk_freq_tbl clk_tbl_mdp_core[] = {
- F_BASIC( 24576000, lpxo, 1, NOMINAL),
- F_BASIC( 46080000, pll3, 16, NOMINAL),
- F_BASIC( 49152000, pll3, 15, NOMINAL),
- F_BASIC( 52663000, pll3, 14, NOMINAL),
- F_BASIC( 92160000, pll3, 8, NOMINAL),
- F_BASIC(122880000, pll3, 6, NOMINAL),
- F_BASIC(147456000, pll3, 5, NOMINAL),
- F_BASIC(153600000, pll1, 5, NOMINAL),
- F_BASIC(192000000, pll1, 4, HIGH),
+ F_BASIC( 24576000, lpxo, 1),
+ F_BASIC( 46080000, pll3, 16),
+ F_BASIC( 49152000, pll3, 15),
+ F_BASIC( 52663000, pll3, 14),
+ F_BASIC( 92160000, pll3, 8),
+ F_BASIC(122880000, pll3, 6),
+ F_BASIC(147456000, pll3, 5),
+ F_BASIC(153600000, pll1, 5),
+ F_BASIC(192000000, pll1, 4),
F_END,
};
@@ -1429,18 +1480,19 @@
.c = {
.dbg_name = "mdp_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP2(NOMINAL, 153600000, HIGH, 192000000),
CLK_INIT(mdp_clk.c),
.depends = &axi_mdp_clk.c,
},
};
static struct clk_freq_tbl clk_tbl_mdp_lcdc[] = {
- F_MND16( 0, gnd, 1, 0, 0, NONE),
- F_MND16(24576000, lpxo, 1, 0, 0, NOMINAL),
- F_MND16(30720000, pll3, 4, 1, 6, NOMINAL),
- F_MND16(32768000, pll3, 3, 2, 15, NOMINAL),
- F_MND16(40960000, pll3, 2, 1, 9, NOMINAL),
- F_MND16(73728000, pll3, 2, 1, 5, NOMINAL),
+ F_MND16( 0, gnd, 1, 0, 0),
+ F_MND16(24576000, lpxo, 1, 0, 0),
+ F_MND16(30720000, pll3, 4, 1, 6),
+ F_MND16(32768000, pll3, 3, 2, 15),
+ F_MND16(40960000, pll3, 2, 1, 9),
+ F_MND16(73728000, pll3, 2, 1, 5),
F_END,
};
@@ -1462,6 +1514,7 @@
.c = {
.dbg_name = "mdp_lcdc_pclk_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 73728000),
CLK_INIT(mdp_lcdc_pclk_clk.c),
},
};
@@ -1483,8 +1536,8 @@
};
static struct clk_freq_tbl clk_tbl_mdp_vsync[] = {
- F_RAW( 0, &gnd_clk.c, 0, (0x3<<2), 0, 0, NONE, NULL),
- F_RAW(24576000, &lpxo_clk.c, 0, (0x1<<2), 0, 0, NOMINAL, NULL),
+ F_RAW( 0, &gnd_clk.c, 0, (0x3<<2), 0, 0, NULL),
+ F_RAW(24576000, &lpxo_clk.c, 0, (0x1<<2), 0, 0, NULL),
F_END,
};
@@ -1504,14 +1557,15 @@
.c = {
.dbg_name = "mdp_vsync_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 24576000),
CLK_INIT(mdp_vsync_clk.c),
},
};
static struct clk_freq_tbl clk_tbl_mi2s_codec[] = {
- F_MND16( 0, gnd, 1, 0, 0, NONE),
- F_MND16( 2048000, lpxo, 4, 1, 3, NOMINAL),
- F_MND16(12288000, lpxo, 2, 0, 0, NOMINAL),
+ F_MND16( 0, gnd, 1, 0, 0),
+ F_MND16( 2048000, lpxo, 4, 1, 3),
+ F_MND16(12288000, lpxo, 2, 0, 0),
F_END,
};
@@ -1533,6 +1587,7 @@
.c = {
.dbg_name = "mi2s_codec_rx_m_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 12288000),
CLK_INIT(mi2s_codec_rx_m_clk.c),
},
};
@@ -1571,6 +1626,7 @@
.c = {
.dbg_name = "mi2s_codec_tx_m_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 12288000),
CLK_INIT(mi2s_codec_tx_m_clk.c),
},
};
@@ -1592,8 +1648,8 @@
};
static struct clk_freq_tbl clk_tbl_mi2s[] = {
- F_MND16( 0, gnd, 1, 0, 0, NONE),
- F_MND16(12288000, lpxo, 2, 0, 0, NOMINAL),
+ F_MND16( 0, gnd, 1, 0, 0),
+ F_MND16(12288000, lpxo, 2, 0, 0),
F_END,
};
@@ -1615,6 +1671,7 @@
.c = {
.dbg_name = "mi2s_m_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 12288000),
CLK_INIT(mi2s_m_clk.c),
},
};
@@ -1635,53 +1692,25 @@
},
};
-static struct clk_freq_tbl clk_tbl_midi[] = {
- F_MND8( 0, 0, 0, gnd, 1, 0, 0, NONE),
- F_MND8(98304000, 19, 12, pll3, 3, 2, 5, NOMINAL),
- F_END,
-};
-
-static struct rcg_clk midi_clk = {
- .b = {
- .ctl_reg = MIDI_NS_REG,
- .en_mask = BIT(9),
- .halt_reg = CLK_HALT_STATEC_REG,
- .halt_bit = 1,
- },
- .ns_reg = MIDI_NS_REG,
- .md_reg = MIDI_NS_REG - 4,
- .ns_mask = F_MASK_MND8(19, 12),
- .root_en_mask = BIT(11),
- .freq_tbl = clk_tbl_midi,
- .current_freq = &rcg_dummy_freq,
- .set_rate = set_rate_mnd,
- .c = {
- .dbg_name = "midi_clk",
- .ops = &clk_ops_rcg_7x30,
- CLK_INIT(midi_clk.c),
- },
-};
-
-#define F_SDAC(f, s, div, m, n, v) \
+#define F_SDAC(f, s, div, m, n) \
{ \
.freq_hz = f, \
.md_val = MD16(m, n), \
.ns_val = N16(m, n) | SPDIV(SRC_SEL_SDAC_##s, div), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
.src_clk = &s##_clk.c, \
}
static struct clk_freq_tbl clk_tbl_sdac[] = {
- F_SDAC( 256000, lpxo, 4, 1, 24, NOMINAL),
- F_SDAC( 352800, lpxo, 1, 147, 10240, NOMINAL),
- F_SDAC( 384000, lpxo, 4, 1, 16, NOMINAL),
- F_SDAC( 512000, lpxo, 4, 1, 12, NOMINAL),
- F_SDAC( 705600, lpxo, 1, 147, 5120, NOMINAL),
- F_SDAC( 768000, lpxo, 4, 1, 8, NOMINAL),
- F_SDAC(1024000, lpxo, 4, 1, 6, NOMINAL),
- F_SDAC(1411200, lpxo, 1, 147, 2560, NOMINAL),
- F_SDAC(1536000, lpxo, 4, 1, 4, NOMINAL),
+ F_SDAC( 256000, lpxo, 4, 1, 24),
+ F_SDAC( 352800, lpxo, 1, 147, 10240),
+ F_SDAC( 384000, lpxo, 4, 1, 16),
+ F_SDAC( 512000, lpxo, 4, 1, 12),
+ F_SDAC( 705600, lpxo, 1, 147, 5120),
+ F_SDAC( 768000, lpxo, 4, 1, 8),
+ F_SDAC(1024000, lpxo, 4, 1, 6),
+ F_SDAC(1411200, lpxo, 1, 147, 2560),
+ F_SDAC(1536000, lpxo, 4, 1, 4),
F_END,
};
@@ -1703,6 +1732,7 @@
.c = {
.dbg_name = "sdac_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 1536000),
CLK_INIT(sdac_clk.c),
},
};
@@ -1724,9 +1754,9 @@
};
static struct clk_freq_tbl clk_tbl_tv[] = {
- F_MND8( 0, 0, 0, gnd, 1, 0, 0, NONE),
- F_MND8(27000000, 23, 16, pll4, 2, 2, 33, NOMINAL),
- F_MND8(74250000, 23, 16, pll4, 2, 1, 6, NOMINAL),
+ F_MND8( 0, 0, 0, gnd, 1, 0, 0),
+ F_MND8(27000000, 23, 16, pll4, 2, 2, 33),
+ F_MND8(74250000, 23, 16, pll4, 2, 1, 6),
F_END,
};
@@ -1745,6 +1775,7 @@
.c = {
.dbg_name = "tv_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 74250000),
CLK_INIT(tv_clk.c),
},
};
@@ -1815,8 +1846,8 @@
};
static struct clk_freq_tbl clk_tbl_usb[] = {
- F_MND8( 0, 0, 0, gnd, 1, 0, 0, NONE),
- F_MND8(60000000, 23, 16, pll1, 2, 5, 32, NOMINAL),
+ F_MND8( 0, 0, 0, gnd, 1, 0, 0),
+ F_MND8(60000000, 23, 16, pll1, 2, 5, 32),
F_END,
};
@@ -1835,6 +1866,7 @@
.c = {
.dbg_name = "usb_hs_src_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 60000000),
CLK_INIT(usb_hs_src_clk.c),
.depends = &axi_li_adsp_a_clk.c,
},
@@ -1936,19 +1968,19 @@
};
static struct clk_freq_tbl clk_tbl_vfe_jpeg[] = {
- F_MND16( 24576000, lpxo, 1, 0, 0, NOMINAL),
- F_MND16( 36864000, pll3, 4, 1, 5, NOMINAL),
- F_MND16( 46080000, pll3, 4, 1, 4, NOMINAL),
- F_MND16( 61440000, pll3, 4, 1, 3, NOMINAL),
- F_MND16( 73728000, pll3, 2, 1, 5, NOMINAL),
- F_MND16( 81920000, pll3, 3, 1, 3, NOMINAL),
- F_MND16( 92160000, pll3, 4, 1, 2, NOMINAL),
- F_MND16( 98304000, pll3, 3, 2, 5, NOMINAL),
- F_MND16(105326000, pll3, 2, 2, 7, NOMINAL),
- F_MND16(122880000, pll3, 2, 1, 3, NOMINAL),
- F_MND16(147456000, pll3, 2, 2, 5, NOMINAL),
- F_MND16(153600000, pll1, 2, 2, 5, NOMINAL),
- F_MND16(192000000, pll1, 4, 0, 0, HIGH),
+ F_MND16( 24576000, lpxo, 1, 0, 0),
+ F_MND16( 36864000, pll3, 4, 1, 5),
+ F_MND16( 46080000, pll3, 4, 1, 4),
+ F_MND16( 61440000, pll3, 4, 1, 3),
+ F_MND16( 73728000, pll3, 2, 1, 5),
+ F_MND16( 81920000, pll3, 3, 1, 3),
+ F_MND16( 92160000, pll3, 4, 1, 2),
+ F_MND16( 98304000, pll3, 3, 2, 5),
+ F_MND16(105326000, pll3, 2, 2, 7),
+ F_MND16(122880000, pll3, 2, 1, 3),
+ F_MND16(147456000, pll3, 2, 2, 5),
+ F_MND16(153600000, pll1, 2, 2, 5),
+ F_MND16(192000000, pll1, 4, 0, 0),
F_END,
};
@@ -1970,6 +2002,7 @@
.c = {
.dbg_name = "jpeg_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP2(NOMINAL, 153600000, HIGH, 192000000),
CLK_INIT(jpeg_clk.c),
.depends = &axi_li_jpeg_clk.c,
},
@@ -1993,6 +2026,7 @@
.c = {
.dbg_name = "vfe_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP2(NOMINAL, 153600000, HIGH, 192000000),
CLK_INIT(vfe_clk.c),
.depends = &axi_li_vfe_clk.c,
},
@@ -2047,16 +2081,16 @@
};
static struct clk_freq_tbl clk_tbl_cam[] = {
- F_MND16( 0, gnd, 1, 0, 0, NONE),
- F_MND16( 6000000, pll1, 4, 1, 32, NOMINAL),
- F_MND16( 8000000, pll1, 4, 1, 24, NOMINAL),
- F_MND16(12000000, pll1, 4, 1, 16, NOMINAL),
- F_MND16(16000000, pll1, 4, 1, 12, NOMINAL),
- F_MND16(19200000, pll1, 4, 1, 10, NOMINAL),
- F_MND16(24000000, pll1, 4, 1, 8, NOMINAL),
- F_MND16(32000000, pll1, 4, 1, 6, NOMINAL),
- F_MND16(48000000, pll1, 4, 1, 4, NOMINAL),
- F_MND16(64000000, pll1, 4, 1, 3, NOMINAL),
+ F_MND16( 0, gnd, 1, 0, 0),
+ F_MND16( 6000000, pll1, 4, 1, 32),
+ F_MND16( 8000000, pll1, 4, 1, 24),
+ F_MND16(12000000, pll1, 4, 1, 16),
+ F_MND16(16000000, pll1, 4, 1, 12),
+ F_MND16(19200000, pll1, 4, 1, 10),
+ F_MND16(24000000, pll1, 4, 1, 8),
+ F_MND16(32000000, pll1, 4, 1, 6),
+ F_MND16(48000000, pll1, 4, 1, 4),
+ F_MND16(64000000, pll1, 4, 1, 3),
F_END,
};
@@ -2076,18 +2110,19 @@
.c = {
.dbg_name = "cam_m_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 64000000),
CLK_INIT(cam_m_clk.c),
},
};
static struct clk_freq_tbl clk_tbl_vpe[] = {
- F_MND8( 24576000, 22, 15, lpxo, 1, 0, 0, NOMINAL),
- F_MND8( 30720000, 22, 15, pll3, 4, 1, 6, NOMINAL),
- F_MND8( 61440000, 22, 15, pll3, 4, 1, 3, NOMINAL),
- F_MND8( 81920000, 22, 15, pll3, 3, 1, 3, NOMINAL),
- F_MND8(122880000, 22, 15, pll3, 3, 1, 2, NOMINAL),
- F_MND8(147456000, 22, 15, pll3, 1, 1, 5, NOMINAL),
- F_MND8(153600000, 22, 15, pll1, 1, 1, 5, NOMINAL),
+ F_MND8( 24576000, 22, 15, lpxo, 1, 0, 0),
+ F_MND8( 30720000, 22, 15, pll3, 4, 1, 6),
+ F_MND8( 61440000, 22, 15, pll3, 4, 1, 3),
+ F_MND8( 81920000, 22, 15, pll3, 3, 1, 3),
+ F_MND8(122880000, 22, 15, pll3, 3, 1, 2),
+ F_MND8(147456000, 22, 15, pll3, 1, 1, 5),
+ F_MND8(153600000, 22, 15, pll1, 1, 1, 5),
F_END,
};
@@ -2109,21 +2144,21 @@
.c = {
.dbg_name = "vpe_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 153600000),
CLK_INIT(vpe_clk.c),
.depends = &axi_vpe_clk.c,
},
};
-
static struct clk_freq_tbl clk_tbl_mfc[] = {
- F_MND8( 24576000, 24, 17, lpxo, 1, 0, 0, NOMINAL),
- F_MND8( 30720000, 24, 17, pll3, 4, 1, 6, NOMINAL),
- F_MND8( 61440000, 24, 17, pll3, 4, 1, 3, NOMINAL),
- F_MND8( 81920000, 24, 17, pll3, 3, 1, 3, NOMINAL),
- F_MND8(122880000, 24, 17, pll3, 3, 1, 2, NOMINAL),
- F_MND8(147456000, 24, 17, pll3, 1, 1, 5, NOMINAL),
- F_MND8(153600000, 24, 17, pll1, 1, 1, 5, NOMINAL),
- F_MND8(170667000, 24, 17, pll1, 1, 2, 9, NOMINAL),
+ F_MND8( 24576000, 24, 17, lpxo, 1, 0, 0),
+ F_MND8( 30720000, 24, 17, pll3, 4, 1, 6),
+ F_MND8( 61440000, 24, 17, pll3, 4, 1, 3),
+ F_MND8( 81920000, 24, 17, pll3, 3, 1, 3),
+ F_MND8(122880000, 24, 17, pll3, 3, 1, 2),
+ F_MND8(147456000, 24, 17, pll3, 1, 1, 5),
+ F_MND8(153600000, 24, 17, pll1, 1, 1, 5),
+ F_MND8(170667000, 24, 17, pll1, 1, 2, 9),
F_END,
};
@@ -2145,6 +2180,7 @@
.c = {
.dbg_name = "mfc_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 170667000),
CLK_INIT(mfc_clk.c),
.depends = &axi_mfc_clk.c,
},
@@ -2167,9 +2203,9 @@
};
static struct clk_freq_tbl clk_tbl_spi[] = {
- F_MND8( 0, 0, 0, gnd, 1, 0, 0, NONE),
- F_MND8( 9963243, 19, 12, pll3, 4, 2, 37, NOMINAL),
- F_MND8(26331429, 19, 12, pll3, 4, 1, 7, NOMINAL),
+ F_MND8( 0, 0, 0, gnd, 1, 0, 0),
+ F_MND8( 9963243, 19, 12, pll3, 4, 2, 37),
+ F_MND8(26331429, 19, 12, pll3, 4, 1, 7),
F_END,
};
@@ -2191,15 +2227,16 @@
.c = {
.dbg_name = "spi_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 26331429),
CLK_INIT(spi_clk.c),
},
};
static struct clk_freq_tbl clk_tbl_lpa_codec[] = {
- F_RAW(1, NULL, 0, 0, 0, 0, LOW, NULL), /* src MI2S_CODEC_RX */
- F_RAW(2, NULL, 0, 1, 0, 0, LOW, NULL), /* src ECODEC_CIF */
- F_RAW(3, NULL, 0, 2, 0, 0, LOW, NULL), /* src MI2S */
- F_RAW(4, NULL, 0, 3, 0, 0, LOW, NULL), /* src SDAC */
+ F_RAW(1, NULL, 0, 0, 0, 0, NULL), /* src MI2S_CODEC_RX */
+ F_RAW(2, NULL, 0, 1, 0, 0, NULL), /* src ECODEC_CIF */
+ F_RAW(3, NULL, 0, 2, 0, 0, NULL), /* src MI2S */
+ F_RAW(4, NULL, 0, 3, 0, 0, NULL), /* src SDAC */
F_END,
};
@@ -2219,12 +2256,13 @@
.c = {
.dbg_name = "lpa_codec_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(LOW, 4),
CLK_INIT(lpa_codec_clk.c),
},
};
static struct clk_freq_tbl clk_tbl_mdc[] = {
- F_RAW(1, NULL, 0, 0, 0, 0, LOW, NULL),
+ F_RAW(1, NULL, 0, 0, 0, 0, NULL),
F_END
};
@@ -2244,6 +2282,7 @@
.c = {
.dbg_name = "mdc_clk",
.ops = &clk_ops_rcg_7x30,
+ VDD_DIG_FMAX_MAP1(LOW, 1),
CLK_INIT(mdc_clk.c),
},
};
@@ -2368,32 +2407,6 @@
static DEFINE_CLK_VOTER(ebi_vfe_clk, &ebi1_fixed_clk.c);
static DEFINE_CLK_VOTER(ebi_adm_clk, &ebi1_fixed_clk.c);
-/*
- * SoC-specific functions required by clock-local driver
- */
-
-/* Update the sys_vdd voltage given a level. */
-static int msm7x30_update_sys_vdd(enum sys_vdd_level level)
-{
- int rc, target_mv;
- static const int mv[NUM_SYS_VDD_LEVELS] = {
- [NONE...LOW] = 1000,
- [NOMINAL] = 1100,
- [HIGH] = 1200,
- };
-
- target_mv = mv[level];
- rc = msm_proc_comm(PCOM_CLKCTL_RPC_MIN_MSMC1, &target_mv, NULL);
- if (rc)
- goto out;
- if (target_mv) {
- rc = -EINVAL;
- goto out;
- }
-out:
- return rc;
-}
-
#ifdef CONFIG_DEBUG_FS
#define CLK_TEST_2(s) (s)
@@ -2412,7 +2425,6 @@
{ CLK_TEST_2(0x07), &lpa_p_clk.c },
{ CLK_TEST_2(0x08), &usb_hs2_p_clk.c },
{ CLK_TEST_2(0x09), &spi_clk.c },
- { CLK_TEST_2(0x0A), &midi_clk.c },
{ CLK_TEST_2(0x0B), &i2c_2_clk.c },
{ CLK_TEST_2(0x0D), &mi2s_m_clk.c },
{ CLK_TEST_2(0x0E), &lpa_core_clk.c },
@@ -2739,7 +2751,7 @@
{ CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL) },
{ CLK_LOOKUP("ebi1_fixed_clk", ebi1_fixed_clk.c, NULL) },
{ CLK_LOOKUP("ecodec_clk", ecodec_clk.c, NULL) },
- { CLK_LOOKUP("gp_clk", gp_clk.c, NULL) },
+ { CLK_LOOKUP("core_clk", gp_clk.c, NULL) },
{ CLK_LOOKUP("core_clk", uart3_clk.c, "msm_serial.2") },
{ CLK_LOOKUP("usb_phy_clk", usb_phy_clk.c, NULL) },
@@ -2777,8 +2789,6 @@
OWN(APPS1, 12, "mi2s_codec_rx_s_clk", mi2s_codec_rx_s_clk, NULL),
OWN(APPS1, 14, "mi2s_codec_tx_m_clk", mi2s_codec_tx_m_clk, NULL),
OWN(APPS1, 14, "mi2s_codec_tx_s_clk", mi2s_codec_tx_s_clk, NULL),
- { CLK_LOOKUP("midi_clk", midi_clk.c, NULL),
- O(APPS1), BIT(22) },
OWN(APPS1, 26, "sdac_clk", sdac_clk, NULL),
OWN(APPS1, 26, "sdac_m_clk", sdac_m_clk, NULL),
OWN(APPS1, 8, "vfe_clk", vfe_clk, NULL),
@@ -2863,10 +2873,10 @@
O(GLBL), BIT(13), &dummy_clk },
OWN(GLBL, 8, "core_clk", ce_clk, "qce.0"),
OWN(GLBL, 8, "core_clk", ce_clk, "crypto.0"),
- OWN(GLBL, 13, "rotator_clk", axi_rotator_clk, NULL),
+ OWN(GLBL, 13, "core_clk", axi_rotator_clk, "msm_rotator.0"),
OWN(GLBL, 13, "core_clk", axi_rotator_clk, "footswitch-pcom.6"),
- OWN(GLBL, 13, "rotator_imem_clk", rotator_imem_clk, NULL),
- OWN(GLBL, 13, "rotator_pclk", rotator_p_clk, NULL),
+ OWN(GLBL, 13, "mem_clk", rotator_imem_clk, "msm_rotator.0"),
+ OWN(GLBL, 13, "iface_clk", rotator_p_clk, "msm_rotator.0"),
OWN(GLBL, 13, "iface_clk", rotator_p_clk, "footswitch-pcom.6"),
{ CLK_LOOKUP("iface_clk", uart1dm_p_clk.c, "msm_serial_hs.0"),
O(GLBL), BIT(8), &dummy_clk },
@@ -2947,8 +2957,6 @@
print_ownership();
set_clock_ownership();
- soc_update_sys_vdd = msm7x30_update_sys_vdd;
-
/* When we have no local clock control, the rest of the code in this
* function is a NOP since writes to shadow regions that we don't own
* are ignored. */
@@ -2968,7 +2976,6 @@
clk_set_rate(&uart1_clk.c, 19200000);
clk_set_rate(&uart2_clk.c, 19200000);
clk_set_rate(&mi2s_m_clk.c, 12288000);
- clk_set_rate(&midi_clk.c, 98304000);
clk_set_rate(&mdp_vsync_clk.c, 24576000);
clk_set_rate(&glbl_root_clk.c, 1);
clk_set_rate(&mdc_clk.c, 1);
@@ -2990,7 +2997,7 @@
static struct clk_ops clk_ops_rcg_7x30 = {
.enable = rcg_clk_enable,
.disable = rcg_clk_disable,
- .auto_off = rcg_clk_auto_off,
+ .auto_off = rcg_clk_disable,
.set_rate = rcg_clk_set_rate,
.set_min_rate = rcg_clk_set_min_rate,
.get_rate = rcg_clk_get_rate,
@@ -3006,7 +3013,7 @@
static struct clk_ops clk_ops_branch = {
.enable = branch_clk_enable,
.disable = branch_clk_disable,
- .auto_off = branch_clk_auto_off,
+ .auto_off = branch_clk_disable,
.is_enabled = branch_clk_is_enabled,
.reset = soc_branch_clk_reset,
.set_flags = soc_clk_set_flags,
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 734b1fe..a0c6878 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -426,6 +426,41 @@
};
#define PLL_RATE(l, m, n, v, d, i) { l, m, n, v, (d>>1), i }
+enum vdd_dig_levels {
+ VDD_DIG_NONE,
+ VDD_DIG_LOW,
+ VDD_DIG_NOMINAL,
+ VDD_DIG_HIGH
+};
+
+static int set_vdd_dig(struct clk_vdd_class *vdd_class, int level)
+{
+ static const int vdd_uv[] = {
+ [VDD_DIG_NONE] = 0,
+ [VDD_DIG_LOW] = 945000,
+ [VDD_DIG_NOMINAL] = 1050000,
+ [VDD_DIG_HIGH] = 1150000
+ };
+
+ return rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S3, RPM_VREG_VOTER3,
+ vdd_uv[level], 1150000, 1);
+}
+
+static DEFINE_VDD_CLASS(vdd_dig, set_vdd_dig);
+
+#define VDD_DIG_FMAX_MAP1(l1, f1) \
+ .vdd_class = &vdd_dig, \
+ .fmax[VDD_DIG_##l1] = (f1)
+#define VDD_DIG_FMAX_MAP2(l1, f1, l2, f2) \
+ .vdd_class = &vdd_dig, \
+ .fmax[VDD_DIG_##l1] = (f1), \
+ .fmax[VDD_DIG_##l2] = (f2)
+#define VDD_DIG_FMAX_MAP3(l1, f1, l2, f2, l3, f3) \
+ .vdd_class = &vdd_dig, \
+ .fmax[VDD_DIG_##l1] = (f1), \
+ .fmax[VDD_DIG_##l2] = (f2), \
+ .fmax[VDD_DIG_##l3] = (f3)
+
/*
* Clock Descriptions
*/
@@ -556,24 +591,6 @@
},
};
-/*
- * SoC-specific functions required by clock-local driver
- */
-
-/* Update the sys_vdd voltage given a level. */
-static int msm8960_update_sys_vdd(enum sys_vdd_level level)
-{
- static const int vdd_uv[] = {
- [NONE] = 0,
- [LOW] = 945000,
- [NOMINAL] = 1050000,
- [HIGH] = 1150000,
- };
-
- return rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S3, RPM_VREG_VOTER3,
- vdd_uv[level], vdd_uv[HIGH], 1);
-}
-
static int soc_clk_reset(struct clk *clk, enum clk_reset_action action)
{
return branch_reset(&to_rcg_clk(clk)->b, action);
@@ -582,7 +599,7 @@
static struct clk_ops clk_ops_rcg_8960 = {
.enable = rcg_clk_enable,
.disable = rcg_clk_disable,
- .auto_off = rcg_clk_auto_off,
+ .auto_off = rcg_clk_disable,
.handoff = rcg_clk_handoff,
.set_rate = rcg_clk_set_rate,
.set_min_rate = rcg_clk_set_min_rate,
@@ -598,7 +615,7 @@
static struct clk_ops clk_ops_branch = {
.enable = branch_clk_enable,
.disable = branch_clk_disable,
- .auto_off = branch_clk_auto_off,
+ .auto_off = branch_clk_disable,
.is_enabled = branch_clk_is_enabled,
.reset = branch_clk_reset,
.is_local = local_clk_is_local,
@@ -1187,34 +1204,34 @@
.c = { \
.dbg_name = #i "_clk", \
.ops = &clk_ops_rcg_8960, \
+ VDD_DIG_FMAX_MAP2(LOW, 32000000, NOMINAL, 64000000), \
CLK_INIT(i##_clk.c), \
}, \
}
-#define F_GSBI_UART(f, s, d, m, n, v) \
+#define F_GSBI_UART(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD16(m, n), \
.ns_val = NS(31, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_gsbi_uart[] = {
- F_GSBI_UART( 0, gnd, 1, 0, 0, NONE),
- F_GSBI_UART( 1843200, pll8, 1, 3, 625, LOW),
- F_GSBI_UART( 3686400, pll8, 1, 6, 625, LOW),
- F_GSBI_UART( 7372800, pll8, 1, 12, 625, LOW),
- F_GSBI_UART(14745600, pll8, 1, 24, 625, LOW),
- F_GSBI_UART(16000000, pll8, 4, 1, 6, LOW),
- F_GSBI_UART(24000000, pll8, 4, 1, 4, LOW),
- F_GSBI_UART(32000000, pll8, 4, 1, 3, LOW),
- F_GSBI_UART(40000000, pll8, 1, 5, 48, NOMINAL),
- F_GSBI_UART(46400000, pll8, 1, 29, 240, NOMINAL),
- F_GSBI_UART(48000000, pll8, 4, 1, 2, NOMINAL),
- F_GSBI_UART(51200000, pll8, 1, 2, 15, NOMINAL),
- F_GSBI_UART(56000000, pll8, 1, 7, 48, NOMINAL),
- F_GSBI_UART(58982400, pll8, 1, 96, 625, NOMINAL),
- F_GSBI_UART(64000000, pll8, 2, 1, 3, NOMINAL),
+ F_GSBI_UART( 0, gnd, 1, 0, 0),
+ F_GSBI_UART( 1843200, pll8, 1, 3, 625),
+ F_GSBI_UART( 3686400, pll8, 1, 6, 625),
+ F_GSBI_UART( 7372800, pll8, 1, 12, 625),
+ F_GSBI_UART(14745600, pll8, 1, 24, 625),
+ F_GSBI_UART(16000000, pll8, 4, 1, 6),
+ F_GSBI_UART(24000000, pll8, 4, 1, 4),
+ F_GSBI_UART(32000000, pll8, 4, 1, 3),
+ F_GSBI_UART(40000000, pll8, 1, 5, 48),
+ F_GSBI_UART(46400000, pll8, 1, 29, 240),
+ F_GSBI_UART(48000000, pll8, 4, 1, 2),
+ F_GSBI_UART(51200000, pll8, 1, 2, 15),
+ F_GSBI_UART(56000000, pll8, 1, 7, 48),
+ F_GSBI_UART(58982400, pll8, 1, 96, 625),
+ F_GSBI_UART(64000000, pll8, 2, 1, 3),
F_END
};
@@ -1251,29 +1268,29 @@
.c = { \
.dbg_name = #i "_clk", \
.ops = &clk_ops_rcg_8960, \
+ VDD_DIG_FMAX_MAP2(LOW, 24000000, NOMINAL, 52000000), \
CLK_INIT(i##_clk.c), \
}, \
}
-#define F_GSBI_QUP(f, s, d, m, n, v) \
+#define F_GSBI_QUP(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD8(16, m, 0, n), \
.ns_val = NS(23, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_gsbi_qup[] = {
- F_GSBI_QUP( 0, gnd, 1, 0, 0, NONE),
- F_GSBI_QUP( 1100000, pxo, 1, 2, 49, LOW),
- F_GSBI_QUP( 5400000, pxo, 1, 1, 5, LOW),
- F_GSBI_QUP(10800000, pxo, 1, 2, 5, LOW),
- F_GSBI_QUP(15060000, pll8, 1, 2, 51, LOW),
- F_GSBI_QUP(24000000, pll8, 4, 1, 4, LOW),
- F_GSBI_QUP(25600000, pll8, 1, 1, 15, NOMINAL),
- F_GSBI_QUP(27000000, pxo, 1, 0, 0, NOMINAL),
- F_GSBI_QUP(48000000, pll8, 4, 1, 2, NOMINAL),
- F_GSBI_QUP(51200000, pll8, 1, 2, 15, NOMINAL),
+ F_GSBI_QUP( 0, gnd, 1, 0, 0),
+ F_GSBI_QUP( 1100000, pxo, 1, 2, 49),
+ F_GSBI_QUP( 5400000, pxo, 1, 1, 5),
+ F_GSBI_QUP(10800000, pxo, 1, 2, 5),
+ F_GSBI_QUP(15060000, pll8, 1, 2, 51),
+ F_GSBI_QUP(24000000, pll8, 4, 1, 4),
+ F_GSBI_QUP(25600000, pll8, 1, 1, 15),
+ F_GSBI_QUP(27000000, pxo, 1, 0, 0),
+ F_GSBI_QUP(48000000, pll8, 4, 1, 2),
+ F_GSBI_QUP(51200000, pll8, 1, 2, 15),
F_END
};
@@ -1290,17 +1307,16 @@
static CLK_GSBI_QUP(gsbi11_qup, 11, CLK_HALT_CFPB_STATEC_REG, 15);
static CLK_GSBI_QUP(gsbi12_qup, 12, CLK_HALT_CFPB_STATEC_REG, 11);
-#define F_QDSS(f, s, d, v) \
+#define F_QDSS(f, s, d) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_DIVSRC(6, 3, d, 2, 0, s##_to_bb_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_qdss[] = {
- F_QDSS( 27000000, pxo, 1, LOW),
- F_QDSS(128000000, pll8, 3, LOW),
- F_QDSS(300000000, pll3, 4, NOMINAL),
+ F_QDSS( 27000000, pxo, 1),
+ F_QDSS(128000000, pll8, 3),
+ F_QDSS(300000000, pll3, 4),
F_END
};
@@ -1416,7 +1432,7 @@
const struct qdss_bank *bank = clk->bank_info;
u32 reg, bank_sel_mask = bank->bank_sel_mask;
- rcg_clk_auto_off(c);
+ rcg_clk_disable(c);
/* Switch to bank 0 */
reg = readl_relaxed(clk->ns_reg);
reg &= ~bank_sel_mask;
@@ -1460,6 +1476,7 @@
.c = {
.dbg_name = "qdss_at_clk",
.ops = &clk_ops_qdss,
+ VDD_DIG_FMAX_MAP2(LOW, 150000000, NOMINAL, 300000000),
CLK_INIT(qdss_at_clk.c),
},
};
@@ -1506,14 +1523,15 @@
.c = {
.dbg_name = "qdss_traceclkin_clk",
.ops = &clk_ops_qdss,
+ VDD_DIG_FMAX_MAP2(LOW, 150000000, NOMINAL, 300000000),
CLK_INIT(qdss_traceclkin_clk.c),
},
};
static struct clk_freq_tbl clk_tbl_qdss_tsctr[] = {
- F_QDSS( 27000000, pxo, 1, LOW),
- F_QDSS(200000000, pll3, 6, LOW),
- F_QDSS(400000000, pll3, 3, NOMINAL),
+ F_QDSS( 27000000, pxo, 1),
+ F_QDSS(200000000, pll3, 6),
+ F_QDSS(400000000, pll3, 3),
F_END
};
@@ -1541,6 +1559,7 @@
.c = {
.dbg_name = "qdss_tsctr_clk",
.ops = &clk_ops_qdss,
+ VDD_DIG_FMAX_MAP2(LOW, 200000000, NOMINAL, 400000000),
CLK_INIT(qdss_tsctr_clk.c),
},
};
@@ -1562,16 +1581,15 @@
},
};
-#define F_PDM(f, s, d, v) \
+#define F_PDM(f, s, d) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_SRC_SEL(1, 0, s##_to_xo_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_pdm[] = {
- F_PDM( 0, gnd, 1, NONE),
- F_PDM(27000000, pxo, 1, LOW),
+ F_PDM( 0, gnd, 1),
+ F_PDM(27000000, pxo, 1),
F_END
};
@@ -1593,6 +1611,7 @@
.c = {
.dbg_name = "pdm_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP1(LOW, 27000000),
CLK_INIT(pdm_clk.c),
},
};
@@ -1611,14 +1630,13 @@
},
};
-#define F_PRNG(f, s, v) \
+#define F_PRNG(f, s) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_prng[] = {
- F_PRNG(64000000, pll8, NOMINAL),
+ F_PRNG(64000000, pll8),
F_END
};
@@ -1636,11 +1654,12 @@
.c = {
.dbg_name = "prng_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 32000000, NOMINAL, 65000000),
CLK_INIT(prng_clk.c),
},
};
-#define CLK_SDC(name, n, h_b, f_table) \
+#define CLK_SDC(name, n, h_b, fmax_low, fmax_nom) \
struct rcg_clk name = { \
.b = { \
.ctl_reg = SDCn_APPS_CLK_NS_REG(n), \
@@ -1655,85 +1674,54 @@
.root_en_mask = BIT(11), \
.ns_mask = (BM(23, 16) | BM(6, 0)), \
.set_rate = set_rate_mnd, \
- .freq_tbl = f_table, \
+ .freq_tbl = clk_tbl_sdc, \
.current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #name, \
.ops = &clk_ops_rcg_8960, \
+ VDD_DIG_FMAX_MAP2(LOW, fmax_low, NOMINAL, fmax_nom), \
CLK_INIT(name.c), \
}, \
}
-#define F_SDC(f, s, d, m, n, v) \
+#define F_SDC(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD8(16, m, 0, n), \
.ns_val = NS(23, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
-static struct clk_freq_tbl clk_tbl_sdc1_2[] = {
- F_SDC( 0, gnd, 1, 0, 0, NONE),
- F_SDC( 144000, pxo, 3, 2, 125, LOW),
- F_SDC( 400000, pll8, 4, 1, 240, LOW),
- F_SDC( 16000000, pll8, 4, 1, 6, LOW),
- F_SDC( 17070000, pll8, 1, 2, 45, LOW),
- F_SDC( 20210000, pll8, 1, 1, 19, LOW),
- F_SDC( 24000000, pll8, 4, 1, 4, LOW),
- F_SDC( 48000000, pll8, 4, 1, 2, LOW),
- F_SDC( 64000000, pll8, 3, 1, 2, NOMINAL),
- F_SDC( 96000000, pll8, 4, 0, 0, NOMINAL),
+static struct clk_freq_tbl clk_tbl_sdc[] = {
+ F_SDC( 0, gnd, 1, 0, 0),
+ F_SDC( 144000, pxo, 3, 2, 125),
+ F_SDC( 400000, pll8, 4, 1, 240),
+ F_SDC( 16000000, pll8, 4, 1, 6),
+ F_SDC( 17070000, pll8, 1, 2, 45),
+ F_SDC( 20210000, pll8, 1, 1, 19),
+ F_SDC( 24000000, pll8, 4, 1, 4),
+ F_SDC( 48000000, pll8, 4, 1, 2),
+ F_SDC( 64000000, pll8, 3, 1, 2),
+ F_SDC( 96000000, pll8, 4, 0, 0),
F_END
};
-static CLK_SDC(sdc1_clk, 1, 6, clk_tbl_sdc1_2);
-static CLK_SDC(sdc2_clk, 2, 5, clk_tbl_sdc1_2);
+static CLK_SDC(sdc1_clk, 1, 6, 52000000, 104000000);
+static CLK_SDC(sdc2_clk, 2, 5, 52000000, 104000000);
+static CLK_SDC(sdc3_clk, 3, 4, 104000000, 208000000);
+static CLK_SDC(sdc4_clk, 4, 3, 33000000, 67000000);
+static CLK_SDC(sdc5_clk, 5, 2, 33000000, 67000000);
-static struct clk_freq_tbl clk_tbl_sdc3[] = {
- F_SDC( 0, gnd, 1, 0, 0, NONE),
- F_SDC( 144000, pxo, 3, 2, 125, LOW),
- F_SDC( 400000, pll8, 4, 1, 240, LOW),
- F_SDC( 16000000, pll8, 4, 1, 6, LOW),
- F_SDC( 17070000, pll8, 1, 2, 45, LOW),
- F_SDC( 20210000, pll8, 1, 1, 19, LOW),
- F_SDC( 24000000, pll8, 4, 1, 4, LOW),
- F_SDC( 48000000, pll8, 4, 1, 2, LOW),
- F_SDC( 64000000, pll8, 3, 1, 2, LOW),
- F_SDC( 96000000, pll8, 4, 0, 0, LOW),
- F_SDC(192000000, pll8, 2, 0, 0, NOMINAL),
- F_END
-};
-
-static CLK_SDC(sdc3_clk, 3, 4, clk_tbl_sdc3);
-
-static struct clk_freq_tbl clk_tbl_sdc4_5[] = {
- F_SDC( 0, gnd, 1, 0, 0, NONE),
- F_SDC( 144000, pxo, 3, 2, 125, LOW),
- F_SDC( 400000, pll8, 4, 1, 240, LOW),
- F_SDC( 16000000, pll8, 4, 1, 6, LOW),
- F_SDC( 17070000, pll8, 1, 2, 45, LOW),
- F_SDC( 20210000, pll8, 1, 1, 19, LOW),
- F_SDC( 24000000, pll8, 4, 1, 4, LOW),
- F_SDC( 48000000, pll8, 4, 1, 2, NOMINAL),
- F_SDC( 64000000, pll8, 3, 1, 2, NOMINAL),
- F_END
-};
-
-static CLK_SDC(sdc4_clk, 4, 3, clk_tbl_sdc4_5);
-static CLK_SDC(sdc5_clk, 5, 2, clk_tbl_sdc4_5);
-
-#define F_TSIF_REF(f, s, d, m, n, v) \
+#define F_TSIF_REF(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD16(m, n), \
.ns_val = NS(31, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_tsif_ref[] = {
- F_TSIF_REF( 0, gnd, 1, 0, 0, NONE),
- F_TSIF_REF(105000, pxo, 1, 1, 256, LOW),
+ F_TSIF_REF( 0, gnd, 1, 0, 0),
+ F_TSIF_REF(105000, pxo, 1, 1, 256),
F_END
};
@@ -1754,20 +1742,20 @@
.c = {
.dbg_name = "tsif_ref_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 27000000, NOMINAL, 54000000),
CLK_INIT(tsif_ref_clk.c),
},
};
-#define F_TSSC(f, s, v) \
+#define F_TSSC(f, s) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_SRC_SEL(1, 0, s##_to_xo_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_tssc[] = {
- F_TSSC( 0, gnd, NONE),
- F_TSSC(27000000, pxo, LOW),
+ F_TSSC( 0, gnd),
+ F_TSSC(27000000, pxo),
F_END
};
@@ -1786,6 +1774,7 @@
.c = {
.dbg_name = "tssc_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP1(LOW, 27000000),
CLK_INIT(tssc_clk.c),
},
};
@@ -1810,22 +1799,22 @@
.c = { \
.dbg_name = #name, \
.ops = &clk_ops_rcg_8960, \
+ VDD_DIG_FMAX_MAP1(NOMINAL, 64000000), \
CLK_INIT(name.c), \
}, \
}
-#define F_USB(f, s, d, m, n, v) \
+#define F_USB(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD8(16, m, 0, n), \
.ns_val = NS(23, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_usb[] = {
- F_USB( 0, gnd, 1, 0, 0, NONE),
- F_USB(60000000, pll8, 1, 5, 32, NOMINAL),
+ F_USB( 0, gnd, 1, 0, 0),
+ F_USB(60000000, pll8, 1, 5, 32),
F_END
};
@@ -1834,8 +1823,8 @@
CLK_USB_HS(usb_hs4_xcvr_clk, 4, 2);
static struct clk_freq_tbl clk_tbl_usb_hsic[] = {
- F_USB( 0, gnd, 1, 0, 0, NONE),
- F_USB(60000000, pll8, 1, 5, 32, LOW),
+ F_USB( 0, gnd, 1, 0, 0),
+ F_USB(60000000, pll8, 1, 5, 32),
F_END
};
@@ -1856,6 +1845,7 @@
.c = {
.dbg_name = "usb_hsic_xcvr_fs_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP1(LOW, 60000000),
CLK_INIT(usb_hsic_xcvr_fs_clk.c),
},
};
@@ -1877,14 +1867,13 @@
},
};
-#define F_USB_HSIC(f, s, v) \
+#define F_USB_HSIC(f, s) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_usb2_hsic[] = {
- F_USB_HSIC(480000000, pll14, LOW),
+ F_USB_HSIC(480000000, pll14),
F_END
};
@@ -1900,6 +1889,7 @@
.c = {
.dbg_name = "usb_hsic_hsic_src_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP1(LOW, 480000000),
CLK_INIT(usb_hsic_hsic_src_clk.c),
},
};
@@ -1919,14 +1909,13 @@
},
};
-#define F_USB_HSIO_CAL(f, s, v) \
+#define F_USB_HSIO_CAL(f, s) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_usb_hsio_cal[] = {
- F_USB_HSIO_CAL(9000000, pxo, LOW),
+ F_USB_HSIO_CAL(9000000, pxo),
F_END
};
@@ -1943,6 +1932,7 @@
.c = {
.dbg_name = "usb_hsic_hsio_cal_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP1(LOW, 10000000),
CLK_INIT(usb_hsic_hsio_cal_clk.c),
},
};
@@ -1959,7 +1949,7 @@
},
};
-#define CLK_USB_FS(i, n) \
+#define CLK_USB_FS(i, n, fmax_nom) \
struct rcg_clk i##_clk = { \
.ns_reg = USB_FSn_XCVR_FS_CLK_NS_REG(n), \
.b = { \
@@ -1975,11 +1965,12 @@
.c = { \
.dbg_name = #i "_clk", \
.ops = &clk_ops_rcg_8960, \
+ VDD_DIG_FMAX_MAP1(NOMINAL, fmax_nom), \
CLK_INIT(i##_clk.c), \
}, \
}
-static CLK_USB_FS(usb_fs1_src, 1);
+static CLK_USB_FS(usb_fs1_src, 1, 64000000);
static struct branch_clk usb_fs1_xcvr_clk = {
.b = {
.ctl_reg = USB_FSn_XCVR_FS_CLK_NS_REG(1),
@@ -2014,7 +2005,7 @@
},
};
-static CLK_USB_FS(usb_fs2_src, 2);
+static CLK_USB_FS(usb_fs2_src, 2, 60000000);
static struct branch_clk usb_fs2_xcvr_clk = {
.b = {
.ctl_reg = USB_FSn_XCVR_FS_CLK_NS_REG(2),
@@ -2078,18 +2069,17 @@
},
};
-#define F_CE3(f, s, d, v) \
+#define F_CE3(f, s, d) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_DIVSRC(6, 3, d, 2, 0, s##_to_bb_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_ce3[] = {
- F_CE3( 0, gnd, 1, NONE),
- F_CE3( 48000000, pll8, 8, LOW),
- F_CE3(100000000, pll3, 12, NOMINAL),
+ F_CE3( 0, gnd, 1),
+ F_CE3( 48000000, pll8, 8),
+ F_CE3(100000000, pll3, 12),
F_END
};
@@ -2107,6 +2097,7 @@
.c = {
.dbg_name = "ce3_src_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 50000000, NOMINAL, 100000000),
CLK_INIT(ce3_src_clk.c),
},
};
@@ -2681,10 +2672,11 @@
.c = { \
.dbg_name = #name, \
.ops = &clk_ops_rcg_8960, \
+ VDD_DIG_FMAX_MAP2(LOW, 64000000, NOMINAL, 128000000), \
CLK_INIT(name.c), \
}, \
}
-#define F_CAM(f, s, d, m, n, v) \
+#define F_CAM(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -2692,21 +2684,20 @@
.ns_val = NS_MM(31, 24, n, m, 15, 14, d, 2, 0, s##_to_mm_mux), \
.ctl_val = CC(6, n), \
.mnd_en_mask = BIT(5) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_cam[] = {
- F_CAM( 0, gnd, 1, 0, 0, NONE),
- F_CAM( 6000000, pll8, 4, 1, 16, LOW),
- F_CAM( 8000000, pll8, 4, 1, 12, LOW),
- F_CAM( 12000000, pll8, 4, 1, 8, LOW),
- F_CAM( 16000000, pll8, 4, 1, 6, LOW),
- F_CAM( 19200000, pll8, 4, 1, 5, LOW),
- F_CAM( 24000000, pll8, 4, 1, 4, LOW),
- F_CAM( 32000000, pll8, 4, 1, 3, LOW),
- F_CAM( 48000000, pll8, 4, 1, 2, LOW),
- F_CAM( 64000000, pll8, 3, 1, 2, LOW),
- F_CAM( 96000000, pll8, 4, 0, 0, NOMINAL),
- F_CAM(128000000, pll8, 3, 0, 0, NOMINAL),
+ F_CAM( 0, gnd, 1, 0, 0),
+ F_CAM( 6000000, pll8, 4, 1, 16),
+ F_CAM( 8000000, pll8, 4, 1, 12),
+ F_CAM( 12000000, pll8, 4, 1, 8),
+ F_CAM( 16000000, pll8, 4, 1, 6),
+ F_CAM( 19200000, pll8, 4, 1, 5),
+ F_CAM( 24000000, pll8, 4, 1, 4),
+ F_CAM( 32000000, pll8, 4, 1, 3),
+ F_CAM( 48000000, pll8, 4, 1, 2),
+ F_CAM( 64000000, pll8, 3, 1, 2),
+ F_CAM( 96000000, pll8, 4, 0, 0),
+ F_CAM(128000000, pll8, 3, 0, 0),
F_END
};
@@ -2714,7 +2705,7 @@
static CLK_CAM(cam1_clk, 1, 16);
static CLK_CAM(cam2_clk, 2, 31);
-#define F_CSI(f, s, d, m, n, v) \
+#define F_CSI(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -2722,12 +2713,12 @@
.ns_val = NS_MM(31, 24, n, m, 15, 14, d, 2, 0, s##_to_mm_mux), \
.ctl_val = CC(6, n), \
.mnd_en_mask = BIT(5) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_csi[] = {
- F_CSI( 0, gnd, 1, 0, 0, NONE),
- F_CSI( 85330000, pll8, 1, 2, 9, LOW),
- F_CSI(177780000, pll2, 1, 2, 9, NOMINAL),
+ F_CSI( 0, gnd, 1, 0, 0),
+ F_CSI( 27000000, pxo, 1, 0, 0),
+ F_CSI( 85330000, pll8, 1, 2, 9),
+ F_CSI(177780000, pll2, 1, 2, 9),
F_END
};
@@ -2747,6 +2738,7 @@
.c = {
.dbg_name = "csi0_src_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 86000000, NOMINAL, 178000000),
CLK_INIT(csi0_src_clk.c),
},
};
@@ -2801,6 +2793,7 @@
.c = {
.dbg_name = "csi1_src_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 86000000, NOMINAL, 178000000),
CLK_INIT(csi1_src_clk.c),
},
};
@@ -2855,6 +2848,7 @@
.c = {
.dbg_name = "csi2_src_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 86000000, NOMINAL, 178000000),
CLK_INIT(csi2_src_clk.c),
},
};
@@ -2893,37 +2887,166 @@
},
};
-/*
- * The csi pix and csi rdi clocks have two bits in two registers to control a
- * three input mux. So we have the generic rcg_clk_enable() path handle the
- * first bit, and this function handle the second bit.
- */
-static void set_rate_pix_rdi(struct rcg_clk *clk, struct clk_freq_tbl *nf)
-{
- u32 reg = readl_relaxed(MISC_CC3_REG);
- u32 bit = (u32)nf->extra_freq_data;
- if (nf->freq_hz == 2)
- reg |= bit;
- else
- reg &= ~bit;
- writel_relaxed(reg, MISC_CC3_REG);
-}
-
-#define F_CSI_PIX(s) \
- { \
- .src_clk = &csi##s##_clk.c, \
- .freq_hz = s, \
- .ns_val = BVAL(25, 25, s), \
- .extra_freq_data = (void *)BIT(13), \
- }
-static struct clk_freq_tbl clk_tbl_csi_pix[] = {
- F_CSI_PIX(0), /* CSI0 source */
- F_CSI_PIX(1), /* CSI1 source */
- F_CSI_PIX(2), /* CSI2 source */
- F_END
+static struct clk *pix_rdi_mux_map[] = {
+ [0] = &csi0_clk.c,
+ [1] = &csi1_clk.c,
+ [2] = &csi2_clk.c,
+ NULL,
};
-static struct rcg_clk csi_pix_clk = {
+struct pix_rdi_clk {
+ bool enabled;
+ unsigned cur_rate;
+
+ void __iomem *const s_reg;
+ u32 s_mask;
+
+ void __iomem *const s2_reg;
+ u32 s2_mask;
+
+ struct branch b;
+ struct clk c;
+};
+
+static inline struct pix_rdi_clk *to_pix_rdi_clk(struct clk *clk)
+{
+ return container_of(clk, struct pix_rdi_clk, c);
+}
+
+static int pix_rdi_clk_set_rate(struct clk *c, unsigned rate)
+{
+ int ret, i;
+ u32 reg;
+ unsigned long flags;
+ struct pix_rdi_clk *clk = to_pix_rdi_clk(c);
+ struct clk **mux_map = pix_rdi_mux_map;
+
+ /*
+ * These clocks select three inputs via two muxes. One mux selects
+ * between csi0 and csi1 and the second mux selects between that mux's
+ * output and csi2. The source and destination selections for each
+ * mux must be clocking for the switch to succeed so just turn on
+ * all three sources because it's easier than figuring out what source
+ * needs to be on at what time.
+ */
+ for (i = 0; mux_map[i]; i++) {
+ ret = clk_enable(mux_map[i]);
+ if (ret)
+ goto err;
+ }
+ if (rate >= i) {
+ ret = -EINVAL;
+ goto err;
+ }
+ /* Keep the new source on when switching inputs of an enabled clock */
+ if (clk->enabled) {
+ clk_disable(mux_map[clk->cur_rate]);
+ clk_enable(mux_map[rate]);
+ }
+ spin_lock_irqsave(&local_clock_reg_lock, flags);
+ reg = readl_relaxed(clk->s2_reg);
+ reg &= ~clk->s2_mask;
+ reg |= rate == 2 ? clk->s2_mask : 0;
+ writel_relaxed(reg, clk->s2_reg);
+ /*
+ * Wait at least 6 cycles of slowest clock
+ * for the glitch-free MUX to fully switch sources.
+ */
+ mb();
+ udelay(1);
+ reg = readl_relaxed(clk->s_reg);
+ reg &= ~clk->s_mask;
+ reg |= rate == 1 ? clk->s_mask : 0;
+ writel_relaxed(reg, clk->s_reg);
+ /*
+ * Wait at least 6 cycles of slowest clock
+ * for the glitch-free MUX to fully switch sources.
+ */
+ mb();
+ udelay(1);
+ clk->cur_rate = rate;
+ spin_unlock_irqrestore(&local_clock_reg_lock, flags);
+err:
+ for (i--; i >= 0; i--)
+ clk_disable(mux_map[i]);
+
+ return 0;
+}
+
+static unsigned pix_rdi_clk_get_rate(struct clk *c)
+{
+ return to_pix_rdi_clk(c)->cur_rate;
+}
+
+static int pix_rdi_clk_enable(struct clk *c)
+{
+ unsigned long flags;
+ struct pix_rdi_clk *clk = to_pix_rdi_clk(c);
+
+ spin_lock_irqsave(&local_clock_reg_lock, flags);
+ __branch_clk_enable_reg(&clk->b, clk->c.dbg_name);
+ spin_unlock_irqrestore(&local_clock_reg_lock, flags);
+ clk->enabled = true;
+
+ return 0;
+}
+
+static void pix_rdi_clk_disable(struct clk *c)
+{
+ unsigned long flags;
+ struct pix_rdi_clk *clk = to_pix_rdi_clk(c);
+
+ spin_lock_irqsave(&local_clock_reg_lock, flags);
+ __branch_clk_disable_reg(&clk->b, clk->c.dbg_name);
+ spin_unlock_irqrestore(&local_clock_reg_lock, flags);
+ clk->enabled = false;
+}
+
+static int pix_rdi_clk_reset(struct clk *clk, enum clk_reset_action action)
+{
+ return branch_reset(&to_pix_rdi_clk(clk)->b, action);
+}
+
+static struct clk *pix_rdi_clk_get_parent(struct clk *c)
+{
+ struct pix_rdi_clk *clk = to_pix_rdi_clk(c);
+
+ return pix_rdi_mux_map[clk->cur_rate];
+}
+
+static int pix_rdi_clk_list_rate(struct clk *c, unsigned n)
+{
+ if (pix_rdi_mux_map[n])
+ return n;
+ return -ENXIO;
+}
+
+static int pix_rdi_clk_handoff(struct clk *c)
+{
+ u32 reg;
+ struct pix_rdi_clk *clk = to_pix_rdi_clk(c);
+
+ reg = readl_relaxed(clk->s_reg);
+ clk->cur_rate = reg & clk->s_mask ? 1 : 0;
+ reg = readl_relaxed(clk->s2_reg);
+ clk->cur_rate = reg & clk->s2_mask ? 2 : clk->cur_rate;
+ return 0;
+}
+
+static struct clk_ops clk_ops_pix_rdi_8960 = {
+ .enable = pix_rdi_clk_enable,
+ .disable = pix_rdi_clk_disable,
+ .auto_off = pix_rdi_clk_disable,
+ .handoff = pix_rdi_clk_handoff,
+ .set_rate = pix_rdi_clk_set_rate,
+ .get_rate = pix_rdi_clk_get_rate,
+ .list_rate = pix_rdi_clk_list_rate,
+ .reset = pix_rdi_clk_reset,
+ .is_local = local_clk_is_local,
+ .get_parent = pix_rdi_clk_get_parent,
+};
+
+static struct pix_rdi_clk csi_pix_clk = {
.b = {
.ctl_reg = MISC_CC_REG,
.en_mask = BIT(26),
@@ -2931,32 +3054,18 @@
.reset_reg = SW_RESET_CORE_REG,
.reset_mask = BIT(26),
},
- .ns_reg = MISC_CC_REG,
- .ns_mask = BIT(25),
- .set_rate = set_rate_pix_rdi,
- .freq_tbl = clk_tbl_csi_pix,
- .current_freq = &rcg_dummy_freq,
+ .s_reg = MISC_CC_REG,
+ .s_mask = BIT(25),
+ .s2_reg = MISC_CC3_REG,
+ .s2_mask = BIT(13),
.c = {
.dbg_name = "csi_pix_clk",
- .ops = &clk_ops_rcg_8960,
+ .ops = &clk_ops_pix_rdi_8960,
CLK_INIT(csi_pix_clk.c),
},
};
-#define F_CSI_PIX1(s) \
- { \
- .src_clk = &csi##s##_clk.c, \
- .freq_hz = s, \
- .ns_val = BVAL(9, 8, s), \
- }
-static struct clk_freq_tbl clk_tbl_csi_pix1[] = {
- F_CSI_PIX1(0), /* CSI0 source */
- F_CSI_PIX1(1), /* CSI1 source */
- F_CSI_PIX1(2), /* CSI2 source */
- F_END
-};
-
-static struct rcg_clk csi_pix1_clk = {
+static struct pix_rdi_clk csi_pix1_clk = {
.b = {
.ctl_reg = MISC_CC3_REG,
.en_mask = BIT(10),
@@ -2964,33 +3073,18 @@
.reset_reg = SW_RESET_CORE_REG,
.reset_mask = BIT(30),
},
- .ns_reg = MISC_CC3_REG,
- .ns_mask = BM(9, 8),
- .set_rate = set_rate_nop,
- .freq_tbl = clk_tbl_csi_pix1,
- .current_freq = &rcg_dummy_freq,
+ .s_reg = MISC_CC3_REG,
+ .s_mask = BIT(8),
+ .s2_reg = MISC_CC3_REG,
+ .s2_mask = BIT(9),
.c = {
.dbg_name = "csi_pix1_clk",
- .ops = &clk_ops_rcg_8960,
+ .ops = &clk_ops_pix_rdi_8960,
CLK_INIT(csi_pix1_clk.c),
},
};
-#define F_CSI_RDI(s) \
- { \
- .src_clk = &csi##s##_clk.c, \
- .freq_hz = s, \
- .ns_val = BVAL(12, 12, s), \
- .extra_freq_data = (void *)BIT(12), \
- }
-static struct clk_freq_tbl clk_tbl_csi_rdi[] = {
- F_CSI_RDI(0), /* CSI0 source */
- F_CSI_RDI(1), /* CSI1 source */
- F_CSI_RDI(2), /* CSI2 source */
- F_END
-};
-
-static struct rcg_clk csi_rdi_clk = {
+static struct pix_rdi_clk csi_rdi_clk = {
.b = {
.ctl_reg = MISC_CC_REG,
.en_mask = BIT(13),
@@ -2998,32 +3092,18 @@
.reset_reg = SW_RESET_CORE_REG,
.reset_mask = BIT(27),
},
- .ns_reg = MISC_CC_REG,
- .ns_mask = BIT(12),
- .set_rate = set_rate_pix_rdi,
- .freq_tbl = clk_tbl_csi_rdi,
- .current_freq = &rcg_dummy_freq,
+ .s_reg = MISC_CC_REG,
+ .s_mask = BIT(12),
+ .s2_reg = MISC_CC3_REG,
+ .s2_mask = BIT(12),
.c = {
.dbg_name = "csi_rdi_clk",
- .ops = &clk_ops_rcg_8960,
+ .ops = &clk_ops_pix_rdi_8960,
CLK_INIT(csi_rdi_clk.c),
},
};
-#define F_CSI_RDI1(s) \
- { \
- .src_clk = &csi##s##_clk.c, \
- .freq_hz = s, \
- .ns_val = BVAL(1, 0, s), \
- }
-static struct clk_freq_tbl clk_tbl_csi_rdi1[] = {
- F_CSI_RDI1(0), /* CSI0 source */
- F_CSI_RDI1(1), /* CSI1 source */
- F_CSI_RDI1(2), /* CSI2 source */
- F_END
-};
-
-static struct rcg_clk csi_rdi1_clk = {
+static struct pix_rdi_clk csi_rdi1_clk = {
.b = {
.ctl_reg = MISC_CC3_REG,
.en_mask = BIT(2),
@@ -3031,32 +3111,18 @@
.reset_reg = SW_RESET_CORE2_REG,
.reset_mask = BIT(1),
},
- .ns_reg = MISC_CC3_REG,
- .ns_mask = BM(1, 0),
- .set_rate = set_rate_nop,
- .freq_tbl = clk_tbl_csi_rdi1,
- .current_freq = &rcg_dummy_freq,
+ .s_reg = MISC_CC3_REG,
+ .s_mask = BIT(0),
+ .s2_reg = MISC_CC3_REG,
+ .s2_mask = BIT(1),
.c = {
.dbg_name = "csi_rdi1_clk",
- .ops = &clk_ops_rcg_8960,
+ .ops = &clk_ops_pix_rdi_8960,
CLK_INIT(csi_rdi1_clk.c),
},
};
-#define F_CSI_RDI2(s) \
- { \
- .src_clk = &csi##s##_clk.c, \
- .freq_hz = s, \
- .ns_val = BVAL(5, 4, s), \
- }
-static struct clk_freq_tbl clk_tbl_csi_rdi2[] = {
- F_CSI_RDI2(0), /* CSI0 source */
- F_CSI_RDI2(1), /* CSI1 source */
- F_CSI_RDI2(2), /* CSI2 source */
- F_END
-};
-
-static struct rcg_clk csi_rdi2_clk = {
+static struct pix_rdi_clk csi_rdi2_clk = {
.b = {
.ctl_reg = MISC_CC3_REG,
.en_mask = BIT(6),
@@ -3064,19 +3130,18 @@
.reset_reg = SW_RESET_CORE2_REG,
.reset_mask = BIT(0),
},
- .ns_reg = MISC_CC3_REG,
- .ns_mask = BM(5, 4),
- .set_rate = set_rate_nop,
- .freq_tbl = clk_tbl_csi_rdi2,
- .current_freq = &rcg_dummy_freq,
+ .s_reg = MISC_CC3_REG,
+ .s_mask = BIT(4),
+ .s2_reg = MISC_CC3_REG,
+ .s2_mask = BIT(5),
.c = {
.dbg_name = "csi_rdi2_clk",
- .ops = &clk_ops_rcg_8960,
+ .ops = &clk_ops_pix_rdi_8960,
CLK_INIT(csi_rdi2_clk.c),
},
};
-#define F_CSI_PHYTIMER(f, s, d, m, n, v) \
+#define F_CSI_PHYTIMER(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -3084,12 +3149,11 @@
.ns_val = NS_MM(31, 24, n, m, 15, 14, d, 2, 0, s##_to_mm_mux), \
.ctl_val = CC(6, n), \
.mnd_en_mask = BIT(5) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_csi_phytimer[] = {
- F_CSI_PHYTIMER( 0, gnd, 1, 0, 0, NONE),
- F_CSI_PHYTIMER( 85330000, pll8, 1, 2, 9, LOW),
- F_CSI_PHYTIMER(177780000, pll2, 1, 2, 9, NOMINAL),
+ F_CSI_PHYTIMER( 0, gnd, 1, 0, 0),
+ F_CSI_PHYTIMER( 85330000, pll8, 1, 2, 9),
+ F_CSI_PHYTIMER(177780000, pll2, 1, 2, 9),
F_END
};
@@ -3109,6 +3173,7 @@
.c = {
.dbg_name = "csiphy_timer_src_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 86000000, NOMINAL, 178000000),
CLK_INIT(csiphy_timer_src_clk.c),
},
};
@@ -3261,7 +3326,7 @@
},
};
-#define F_GFX2D(f, s, m, n, v) \
+#define F_GFX2D(f, s, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -3269,22 +3334,21 @@
.ns_val = NS_MND_BANKED4(20, 16, n, m, 3, 0, s##_to_mm_mux), \
.ctl_val = CC_BANKED(9, 6, n), \
.mnd_en_mask = (BIT(8) | BIT(5)) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_gfx2d[] = {
- F_GFX2D( 0, gnd, 0, 0, NONE),
- F_GFX2D( 27000000, pxo, 0, 0, LOW),
- F_GFX2D( 48000000, pll8, 1, 8, LOW),
- F_GFX2D( 54857000, pll8, 1, 7, LOW),
- F_GFX2D( 64000000, pll8, 1, 6, LOW),
- F_GFX2D( 76800000, pll8, 1, 5, LOW),
- F_GFX2D( 96000000, pll8, 1, 4, LOW),
- F_GFX2D(128000000, pll8, 1, 3, NOMINAL),
- F_GFX2D(145455000, pll2, 2, 11, NOMINAL),
- F_GFX2D(160000000, pll2, 1, 5, NOMINAL),
- F_GFX2D(177778000, pll2, 2, 9, NOMINAL),
- F_GFX2D(200000000, pll2, 1, 4, NOMINAL),
- F_GFX2D(228571000, pll2, 2, 7, HIGH),
+ F_GFX2D( 0, gnd, 0, 0),
+ F_GFX2D( 27000000, pxo, 0, 0),
+ F_GFX2D( 48000000, pll8, 1, 8),
+ F_GFX2D( 54857000, pll8, 1, 7),
+ F_GFX2D( 64000000, pll8, 1, 6),
+ F_GFX2D( 76800000, pll8, 1, 5),
+ F_GFX2D( 96000000, pll8, 1, 4),
+ F_GFX2D(128000000, pll8, 1, 3),
+ F_GFX2D(145455000, pll2, 2, 11),
+ F_GFX2D(160000000, pll2, 1, 5),
+ F_GFX2D(177778000, pll2, 2, 9),
+ F_GFX2D(200000000, pll2, 1, 4),
+ F_GFX2D(228571000, pll2, 2, 7),
F_END
};
@@ -3324,6 +3388,8 @@
.c = {
.dbg_name = "gfx2d0_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP3(LOW, 100000000, NOMINAL, 200000000,
+ HIGH, 228571000),
CLK_INIT(gfx2d0_clk.c),
},
};
@@ -3364,11 +3430,13 @@
.c = {
.dbg_name = "gfx2d1_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP3(LOW, 100000000, NOMINAL, 200000000,
+ HIGH, 228571000),
CLK_INIT(gfx2d1_clk.c),
},
};
-#define F_GFX3D(f, s, m, n, v) \
+#define F_GFX3D(f, s, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -3376,69 +3444,80 @@
.ns_val = NS_MND_BANKED4(18, 14, n, m, 3, 0, s##_to_mm_mux), \
.ctl_val = CC_BANKED(9, 6, n), \
.mnd_en_mask = (BIT(8) | BIT(5)) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_gfx3d_8960[] = {
- F_GFX3D( 0, gnd, 0, 0, NONE),
- F_GFX3D( 27000000, pxo, 0, 0, LOW),
- F_GFX3D( 48000000, pll8, 1, 8, LOW),
- F_GFX3D( 54857000, pll8, 1, 7, LOW),
- F_GFX3D( 64000000, pll8, 1, 6, LOW),
- F_GFX3D( 76800000, pll8, 1, 5, LOW),
- F_GFX3D( 96000000, pll8, 1, 4, LOW),
- F_GFX3D(128000000, pll8, 1, 3, LOW),
- F_GFX3D(145455000, pll2, 2, 11, NOMINAL),
- F_GFX3D(160000000, pll2, 1, 5, NOMINAL),
- F_GFX3D(177778000, pll2, 2, 9, NOMINAL),
- F_GFX3D(200000000, pll2, 1, 4, NOMINAL),
- F_GFX3D(228571000, pll2, 2, 7, NOMINAL),
- F_GFX3D(266667000, pll2, 1, 3, NOMINAL),
- F_GFX3D(320000000, pll2, 2, 5, HIGH),
+ F_GFX3D( 0, gnd, 0, 0),
+ F_GFX3D( 27000000, pxo, 0, 0),
+ F_GFX3D( 48000000, pll8, 1, 8),
+ F_GFX3D( 54857000, pll8, 1, 7),
+ F_GFX3D( 64000000, pll8, 1, 6),
+ F_GFX3D( 76800000, pll8, 1, 5),
+ F_GFX3D( 96000000, pll8, 1, 4),
+ F_GFX3D(128000000, pll8, 1, 3),
+ F_GFX3D(145455000, pll2, 2, 11),
+ F_GFX3D(160000000, pll2, 1, 5),
+ F_GFX3D(177778000, pll2, 2, 9),
+ F_GFX3D(200000000, pll2, 1, 4),
+ F_GFX3D(228571000, pll2, 2, 7),
+ F_GFX3D(266667000, pll2, 1, 3),
+ F_GFX3D(320000000, pll2, 2, 5),
F_END
};
static struct clk_freq_tbl clk_tbl_gfx3d_8960_v2[] = {
- F_GFX3D( 0, gnd, 0, 0, NONE),
- F_GFX3D( 27000000, pxo, 0, 0, LOW),
- F_GFX3D( 48000000, pll8, 1, 8, LOW),
- F_GFX3D( 54857000, pll8, 1, 7, LOW),
- F_GFX3D( 64000000, pll8, 1, 6, LOW),
- F_GFX3D( 76800000, pll8, 1, 5, LOW),
- F_GFX3D( 96000000, pll8, 1, 4, LOW),
- F_GFX3D(128000000, pll8, 1, 3, LOW),
- F_GFX3D(145455000, pll2, 2, 11, NOMINAL),
- F_GFX3D(160000000, pll2, 1, 5, NOMINAL),
- F_GFX3D(177778000, pll2, 2, 9, NOMINAL),
- F_GFX3D(200000000, pll2, 1, 4, NOMINAL),
- F_GFX3D(228571000, pll2, 2, 7, NOMINAL),
- F_GFX3D(266667000, pll2, 1, 3, NOMINAL),
- F_GFX3D(300000000, pll3, 1, 4, NOMINAL),
- F_GFX3D(320000000, pll2, 2, 5, HIGH),
- F_GFX3D(400000000, pll2, 1, 2, HIGH),
+ F_GFX3D( 0, gnd, 0, 0),
+ F_GFX3D( 27000000, pxo, 0, 0),
+ F_GFX3D( 48000000, pll8, 1, 8),
+ F_GFX3D( 54857000, pll8, 1, 7),
+ F_GFX3D( 64000000, pll8, 1, 6),
+ F_GFX3D( 76800000, pll8, 1, 5),
+ F_GFX3D( 96000000, pll8, 1, 4),
+ F_GFX3D(128000000, pll8, 1, 3),
+ F_GFX3D(145455000, pll2, 2, 11),
+ F_GFX3D(160000000, pll2, 1, 5),
+ F_GFX3D(177778000, pll2, 2, 9),
+ F_GFX3D(200000000, pll2, 1, 4),
+ F_GFX3D(228571000, pll2, 2, 7),
+ F_GFX3D(266667000, pll2, 1, 3),
+ F_GFX3D(300000000, pll3, 1, 4),
+ F_GFX3D(320000000, pll2, 2, 5),
+ F_GFX3D(400000000, pll2, 1, 2),
F_END
};
-/* TODO: need to add 325MHz back once it is fixed in the simulation model */
+static unsigned long fmax_gfx3d_8960_v2[MAX_VDD_LEVELS] __initdata = {
+ [VDD_DIG_LOW] = 128000000,
+ [VDD_DIG_NOMINAL] = 300000000,
+ [VDD_DIG_HIGH] = 400000000
+};
+
static struct clk_freq_tbl clk_tbl_gfx3d_8064[] = {
- F_GFX3D( 0, gnd, 0, 0, NONE),
- F_GFX3D( 27000000, pxo, 0, 0, LOW),
- F_GFX3D( 48000000, pll8, 1, 8, LOW),
- F_GFX3D( 54857000, pll8, 1, 7, LOW),
- F_GFX3D( 64000000, pll8, 1, 6, LOW),
- F_GFX3D( 76800000, pll8, 1, 5, LOW),
- F_GFX3D( 96000000, pll8, 1, 4, LOW),
- F_GFX3D(128000000, pll8, 1, 3, LOW),
- F_GFX3D(145455000, pll2, 2, 11, NOMINAL),
- F_GFX3D(160000000, pll2, 1, 5, NOMINAL),
- F_GFX3D(177778000, pll2, 2, 9, NOMINAL),
- F_GFX3D(200000000, pll2, 1, 4, NOMINAL),
- F_GFX3D(228571000, pll2, 2, 7, NOMINAL),
- F_GFX3D(266667000, pll2, 1, 3, NOMINAL),
- F_GFX3D(400000000, pll2, 1, 2, HIGH),
+ F_GFX3D( 0, gnd, 0, 0),
+ F_GFX3D( 27000000, pxo, 0, 0),
+ F_GFX3D( 48000000, pll8, 1, 8),
+ F_GFX3D( 54857000, pll8, 1, 7),
+ F_GFX3D( 64000000, pll8, 1, 6),
+ F_GFX3D( 76800000, pll8, 1, 5),
+ F_GFX3D( 96000000, pll8, 1, 4),
+ F_GFX3D(128000000, pll8, 1, 3),
+ F_GFX3D(145455000, pll2, 2, 11),
+ F_GFX3D(160000000, pll2, 1, 5),
+ F_GFX3D(177778000, pll2, 2, 9),
+ F_GFX3D(200000000, pll2, 1, 4),
+ F_GFX3D(228571000, pll2, 2, 7),
+ F_GFX3D(266667000, pll2, 1, 3),
+ F_GFX3D(325000000, pll15, 1, 3),
+ F_GFX3D(400000000, pll2, 1, 2),
F_END
};
+static unsigned long fmax_gfx3d_8064[MAX_VDD_LEVELS] __initdata = {
+ [VDD_DIG_LOW] = 128000000,
+ [VDD_DIG_NOMINAL] = 325000000,
+ [VDD_DIG_HIGH] = 400000000
+};
+
static struct bank_masks bmnd_info_gfx3d = {
.bank_sel_mask = BIT(11),
.bank0_mask = {
@@ -3475,12 +3554,14 @@
.c = {
.dbg_name = "gfx3d_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP3(LOW, 128000000, NOMINAL, 266667000,
+ HIGH, 320000000),
CLK_INIT(gfx3d_clk.c),
.depends = &gmem_axi_clk.c,
},
};
-#define F_VCAP(f, s, m, n, v) \
+#define F_VCAP(f, s, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -3488,18 +3569,17 @@
.ns_val = NS_MND_BANKED4(18, 14, n, m, 3, 0, s##_to_mm_mux), \
.ctl_val = CC_BANKED(9, 6, n), \
.mnd_en_mask = (BIT(8) | BIT(5)) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_vcap[] = {
- F_VCAP( 0, gnd, 0, 0, NONE),
- F_VCAP( 27000000, pxo, 0, 0, LOW),
- F_VCAP( 54860000, pll8, 1, 7, LOW),
- F_VCAP( 64000000, pll8, 1, 6, LOW),
- F_VCAP( 76800000, pll8, 1, 5, LOW),
- F_VCAP(128000000, pll8, 1, 3, NOMINAL),
- F_VCAP(160000000, pll2, 1, 5, NOMINAL),
- F_VCAP(200000000, pll2, 1, 4, NOMINAL),
+ F_VCAP( 0, gnd, 0, 0),
+ F_VCAP( 27000000, pxo, 0, 0),
+ F_VCAP( 54860000, pll8, 1, 7),
+ F_VCAP( 64000000, pll8, 1, 6),
+ F_VCAP( 76800000, pll8, 1, 5),
+ F_VCAP(128000000, pll8, 1, 3),
+ F_VCAP(160000000, pll2, 1, 5),
+ F_VCAP(200000000, pll2, 1, 4),
F_END
};
@@ -3538,6 +3618,7 @@
.dbg_name = "vcap_clk",
.ops = &clk_ops_rcg_8960,
.depends = &vcap_axi_clk.c,
+ VDD_DIG_FMAX_MAP2(LOW, 100000000, NOMINAL, 200000000),
CLK_INIT(vcap_clk.c),
},
};
@@ -3557,7 +3638,7 @@
},
};
-#define F_IJPEG(f, s, d, m, n, v) \
+#define F_IJPEG(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -3565,37 +3646,34 @@
.ns_val = NS_MM(23, 16, n, m, 15, 12, d, 2, 0, s##_to_mm_mux), \
.ctl_val = CC(6, n), \
.mnd_en_mask = BIT(5) * !!(n), \
- .sys_vdd = v, \
}
-static struct clk_freq_tbl clk_tbl_ijpeg_8960[] = {
- F_IJPEG( 0, gnd, 1, 0, 0, NONE),
- F_IJPEG( 27000000, pxo, 1, 0, 0, LOW),
- F_IJPEG( 36570000, pll8, 1, 2, 21, LOW),
- F_IJPEG( 54860000, pll8, 7, 0, 0, LOW),
- F_IJPEG( 96000000, pll8, 4, 0, 0, LOW),
- F_IJPEG(109710000, pll8, 1, 2, 7, LOW),
- F_IJPEG(128000000, pll8, 3, 0, 0, NOMINAL),
- F_IJPEG(153600000, pll8, 1, 2, 5, NOMINAL),
- F_IJPEG(200000000, pll2, 4, 0, 0, NOMINAL),
- F_IJPEG(228571000, pll2, 1, 2, 7, NOMINAL),
- F_IJPEG(266667000, pll2, 1, 1, 3, NOMINAL),
- F_IJPEG(320000000, pll2, 1, 2, 5, HIGH),
+static struct clk_freq_tbl clk_tbl_ijpeg[] = {
+ F_IJPEG( 0, gnd, 1, 0, 0),
+ F_IJPEG( 27000000, pxo, 1, 0, 0),
+ F_IJPEG( 36570000, pll8, 1, 2, 21),
+ F_IJPEG( 54860000, pll8, 7, 0, 0),
+ F_IJPEG( 96000000, pll8, 4, 0, 0),
+ F_IJPEG(109710000, pll8, 1, 2, 7),
+ F_IJPEG(128000000, pll8, 3, 0, 0),
+ F_IJPEG(153600000, pll8, 1, 2, 5),
+ F_IJPEG(200000000, pll2, 4, 0, 0),
+ F_IJPEG(228571000, pll2, 1, 2, 7),
+ F_IJPEG(266667000, pll2, 1, 1, 3),
+ F_IJPEG(320000000, pll2, 1, 2, 5),
F_END
};
-static struct clk_freq_tbl clk_tbl_ijpeg_8064[] = {
- F_IJPEG( 0, gnd, 1, 0, 0, NONE),
- F_IJPEG( 36570000, pll8, 1, 2, 21, LOW),
- F_IJPEG( 54860000, pll8, 7, 0, 0, LOW),
- F_IJPEG( 96000000, pll8, 4, 0, 0, LOW),
- F_IJPEG(109710000, pll8, 1, 2, 7, LOW),
- F_IJPEG(128000000, pll8, 3, 0, 0, LOW),
- F_IJPEG(153600000, pll8, 1, 2, 5, NOMINAL),
- F_IJPEG(200000000, pll2, 4, 0, 0, NOMINAL),
- F_IJPEG(228571000, pll2, 1, 2, 7, NOMINAL),
- F_IJPEG(320000000, pll2, 1, 2, 5, HIGH),
- F_END
+static unsigned long fmax_ijpeg_8960_v2[MAX_VDD_LEVELS] __initdata = {
+ [VDD_DIG_LOW] = 110000000,
+ [VDD_DIG_NOMINAL] = 266667000,
+ [VDD_DIG_HIGH] = 320000000
+};
+
+static unsigned long fmax_ijpeg_8064[MAX_VDD_LEVELS] __initdata = {
+ [VDD_DIG_LOW] = 128000000,
+ [VDD_DIG_NOMINAL] = 266667000,
+ [VDD_DIG_HIGH] = 320000000
};
static struct rcg_clk ijpeg_clk = {
@@ -3613,30 +3691,30 @@
.ns_mask = (BM(23, 16) | BM(15, 12) | BM(2, 0)),
.ctl_mask = BM(7, 6),
.set_rate = set_rate_mnd,
- .freq_tbl = clk_tbl_ijpeg_8960,
+ .freq_tbl = clk_tbl_ijpeg,
.current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "ijpeg_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 110000000, NOMINAL, 266667000),
CLK_INIT(ijpeg_clk.c),
.depends = &ijpeg_axi_clk.c,
},
};
-#define F_JPEGD(f, s, d, v) \
+#define F_JPEGD(f, s, d) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_DIVSRC(15, 12, d, 2, 0, s##_to_mm_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_jpegd[] = {
- F_JPEGD( 0, gnd, 1, NONE),
- F_JPEGD( 64000000, pll8, 6, LOW),
- F_JPEGD( 76800000, pll8, 5, LOW),
- F_JPEGD( 96000000, pll8, 4, LOW),
- F_JPEGD(160000000, pll2, 5, NOMINAL),
- F_JPEGD(200000000, pll2, 4, NOMINAL),
+ F_JPEGD( 0, gnd, 1),
+ F_JPEGD( 64000000, pll8, 6),
+ F_JPEGD( 76800000, pll8, 5),
+ F_JPEGD( 96000000, pll8, 4),
+ F_JPEGD(160000000, pll2, 5),
+ F_JPEGD(200000000, pll2, 4),
F_END
};
@@ -3658,12 +3736,13 @@
.c = {
.dbg_name = "jpegd_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 96000000, NOMINAL, 200000000),
CLK_INIT(jpegd_clk.c),
.depends = &jpegd_axi_clk.c,
},
};
-#define F_MDP(f, s, m, n, v) \
+#define F_MDP(f, s, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -3671,44 +3750,30 @@
.ns_val = NS_MND_BANKED8(22, 14, n, m, 3, 0, s##_to_mm_mux), \
.ctl_val = CC_BANKED(9, 6, n), \
.mnd_en_mask = (BIT(8) | BIT(5)) * !!(n), \
- .sys_vdd = v, \
}
-static struct clk_freq_tbl clk_tbl_mdp_8960[] = {
- F_MDP( 0, gnd, 0, 0, NONE),
- F_MDP( 9600000, pll8, 1, 40, LOW),
- F_MDP( 13710000, pll8, 1, 28, LOW),
- F_MDP( 27000000, pxo, 0, 0, LOW),
- F_MDP( 29540000, pll8, 1, 13, LOW),
- F_MDP( 34910000, pll8, 1, 11, LOW),
- F_MDP( 38400000, pll8, 1, 10, LOW),
- F_MDP( 59080000, pll8, 2, 13, LOW),
- F_MDP( 76800000, pll8, 1, 5, LOW),
- F_MDP( 85330000, pll8, 2, 9, LOW),
- F_MDP( 96000000, pll8, 1, 4, NOMINAL),
- F_MDP(128000000, pll8, 1, 3, NOMINAL),
- F_MDP(160000000, pll2, 1, 5, NOMINAL),
- F_MDP(177780000, pll2, 2, 9, NOMINAL),
- F_MDP(200000000, pll2, 1, 4, NOMINAL),
+static struct clk_freq_tbl clk_tbl_mdp[] = {
+ F_MDP( 0, gnd, 0, 0),
+ F_MDP( 9600000, pll8, 1, 40),
+ F_MDP( 13710000, pll8, 1, 28),
+ F_MDP( 27000000, pxo, 0, 0),
+ F_MDP( 29540000, pll8, 1, 13),
+ F_MDP( 34910000, pll8, 1, 11),
+ F_MDP( 38400000, pll8, 1, 10),
+ F_MDP( 59080000, pll8, 2, 13),
+ F_MDP( 76800000, pll8, 1, 5),
+ F_MDP( 85330000, pll8, 2, 9),
+ F_MDP( 96000000, pll8, 1, 4),
+ F_MDP(128000000, pll8, 1, 3),
+ F_MDP(160000000, pll2, 1, 5),
+ F_MDP(177780000, pll2, 2, 9),
+ F_MDP(200000000, pll2, 1, 4),
+ F_MDP(266667000, pll2, 1, 3),
F_END
};
-static struct clk_freq_tbl clk_tbl_mdp_8064[] = {
- F_MDP( 0, gnd, 0, 0, NONE),
- F_MDP( 9600000, pll8, 1, 40, LOW),
- F_MDP( 13710000, pll8, 1, 28, LOW),
- F_MDP( 29540000, pll8, 1, 13, LOW),
- F_MDP( 34910000, pll8, 1, 11, LOW),
- F_MDP( 38400000, pll8, 1, 10, LOW),
- F_MDP( 59080000, pll8, 2, 13, LOW),
- F_MDP( 76800000, pll8, 1, 5, LOW),
- F_MDP( 85330000, pll8, 2, 9, LOW),
- F_MDP( 96000000, pll8, 1, 4, LOW),
- F_MDP(128000000, pll8, 1, 3, LOW),
- F_MDP(160000000, pll2, 1, 5, NOMINAL),
- F_MDP(177780000, pll2, 2, 9, NOMINAL),
- F_MDP(200000000, pll2, 1, 4, NOMINAL),
- F_MDP(266000000, pll2, 1, 3, NOMINAL),
- F_END
+static unsigned long fmax_mdp_8064[MAX_VDD_LEVELS] __initdata = {
+ [VDD_DIG_LOW] = 128000000,
+ [VDD_DIG_NOMINAL] = 266667000
};
static struct bank_masks bmnd_info_mdp = {
@@ -3741,12 +3806,13 @@
.ns_reg = MDP_NS_REG,
.root_en_mask = BIT(2),
.set_rate = set_rate_mnd_banked,
- .freq_tbl = clk_tbl_mdp_8960,
+ .freq_tbl = clk_tbl_mdp,
.bank_info = &bmnd_info_mdp,
.current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "mdp_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 96000000, NOMINAL, 200000000),
CLK_INIT(mdp_clk.c),
.depends = &mdp_axi_clk.c,
},
@@ -3767,15 +3833,14 @@
},
};
-#define F_MDP_VSYNC(f, s, v) \
+#define F_MDP_VSYNC(f, s) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_SRC_SEL(13, 13, s##_to_bb_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_mdp_vsync[] = {
- F_MDP_VSYNC(27000000, pxo, LOW),
+ F_MDP_VSYNC(27000000, pxo),
F_END
};
@@ -3796,34 +3861,34 @@
.c = {
.dbg_name = "mdp_vsync_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP1(LOW, 27000000),
CLK_INIT(mdp_vsync_clk.c),
},
};
-#define F_ROT(f, s, d, v) \
+#define F_ROT(f, s, d) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_DIVSRC_BANKED(29, 26, 25, 22, d, \
21, 19, 18, 16, s##_to_mm_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_rot[] = {
- F_ROT( 0, gnd, 1, NONE),
- F_ROT( 27000000, pxo, 1, LOW),
- F_ROT( 29540000, pll8, 13, LOW),
- F_ROT( 32000000, pll8, 12, LOW),
- F_ROT( 38400000, pll8, 10, LOW),
- F_ROT( 48000000, pll8, 8, LOW),
- F_ROT( 54860000, pll8, 7, LOW),
- F_ROT( 64000000, pll8, 6, LOW),
- F_ROT( 76800000, pll8, 5, LOW),
- F_ROT( 96000000, pll8, 4, LOW),
- F_ROT(100000000, pll2, 8, NOMINAL),
- F_ROT(114290000, pll2, 7, NOMINAL),
- F_ROT(133330000, pll2, 6, NOMINAL),
- F_ROT(160000000, pll2, 5, NOMINAL),
- F_ROT(200000000, pll2, 4, NOMINAL),
+ F_ROT( 0, gnd, 1),
+ F_ROT( 27000000, pxo, 1),
+ F_ROT( 29540000, pll8, 13),
+ F_ROT( 32000000, pll8, 12),
+ F_ROT( 38400000, pll8, 10),
+ F_ROT( 48000000, pll8, 8),
+ F_ROT( 54860000, pll8, 7),
+ F_ROT( 64000000, pll8, 6),
+ F_ROT( 76800000, pll8, 5),
+ F_ROT( 96000000, pll8, 4),
+ F_ROT(100000000, pll2, 8),
+ F_ROT(114290000, pll2, 7),
+ F_ROT(133330000, pll2, 6),
+ F_ROT(160000000, pll2, 5),
+ F_ROT(200000000, pll2, 4),
F_END
};
@@ -3855,6 +3920,7 @@
.c = {
.dbg_name = "rot_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 96000000, NOMINAL, 200000000),
CLK_INIT(rot_clk.c),
.depends = &rot_axi_clk.c,
},
@@ -3902,7 +3968,7 @@
CLK_INIT(hdmi_pll_clk),
};
-#define F_TV_GND(f, s, p_r, d, m, n, v) \
+#define F_TV_GND(f, s, p_r, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -3910,9 +3976,8 @@
.ns_val = NS_MM(23, 16, n, m, 15, 14, d, 2, 0, s##_to_mm_mux), \
.ctl_val = CC(6, n), \
.mnd_en_mask = BIT(5) * !!(n), \
- .sys_vdd = v, \
}
-#define F_TV(f, s, p_r, d, m, n, v) \
+#define F_TV(f, s, p_r, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk, \
@@ -3920,20 +3985,24 @@
.ns_val = NS_MM(23, 16, n, m, 15, 14, d, 2, 0, s##_to_mm_mux), \
.ctl_val = CC(6, n), \
.mnd_en_mask = BIT(5) * !!(n), \
- .sys_vdd = v, \
.extra_freq_data = (void *)p_r, \
}
/* Switching TV freqs requires PLL reconfiguration. */
static struct clk_freq_tbl clk_tbl_tv[] = {
- F_TV_GND( 0, gnd, 0, 1, 0, 0, NONE),
- F_TV( 25200000, hdmi_pll, 25200000, 1, 0, 0, LOW),
- F_TV( 27000000, hdmi_pll, 27000000, 1, 0, 0, LOW),
- F_TV( 27030000, hdmi_pll, 27030000, 1, 0, 0, LOW),
- F_TV( 74250000, hdmi_pll, 74250000, 1, 0, 0, NOMINAL),
- F_TV(148500000, hdmi_pll, 148500000, 1, 0, 0, NOMINAL),
+ F_TV_GND( 0, gnd, 0, 1, 0, 0),
+ F_TV( 25200000, hdmi_pll, 25200000, 1, 0, 0),
+ F_TV( 27000000, hdmi_pll, 27000000, 1, 0, 0),
+ F_TV( 27030000, hdmi_pll, 27030000, 1, 0, 0),
+ F_TV( 74250000, hdmi_pll, 74250000, 1, 0, 0),
+ F_TV(148500000, hdmi_pll, 148500000, 1, 0, 0),
F_END
};
+static unsigned long fmax_tv_src_8064[MAX_VDD_LEVELS] __initdata = {
+ [VDD_DIG_LOW] = 74250000,
+ [VDD_DIG_NOMINAL] = 149000000
+};
+
/*
* Unlike other clocks, the TV rate is adjusted through PLL
* re-programming. It is also routed through an MND divider.
@@ -3962,6 +4031,7 @@
.c = {
.dbg_name = "tv_src_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 27030000, NOMINAL, 149000000),
CLK_INIT(tv_src_clk.c),
},
};
@@ -4065,7 +4135,7 @@
.mode_mask = BM(12, 11),
},
};
-#define F_VCODEC(f, s, m, n, v) \
+#define F_VCODEC(f, s, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -4073,18 +4143,17 @@
.ns_val = NS_MND_BANKED8(11, 19, n, m, 0, 27, s##_to_mm_mux), \
.ctl_val = CC_BANKED(6, 11, n), \
.mnd_en_mask = (BIT(10) | BIT(5)) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_vcodec[] = {
- F_VCODEC( 0, gnd, 0, 0, NONE),
- F_VCODEC( 27000000, pxo, 0, 0, LOW),
- F_VCODEC( 32000000, pll8, 1, 12, LOW),
- F_VCODEC( 48000000, pll8, 1, 8, LOW),
- F_VCODEC( 54860000, pll8, 1, 7, LOW),
- F_VCODEC( 96000000, pll8, 1, 4, LOW),
- F_VCODEC(133330000, pll2, 1, 6, NOMINAL),
- F_VCODEC(200000000, pll2, 1, 4, NOMINAL),
- F_VCODEC(228570000, pll2, 2, 7, HIGH),
+ F_VCODEC( 0, gnd, 0, 0),
+ F_VCODEC( 27000000, pxo, 0, 0),
+ F_VCODEC( 32000000, pll8, 1, 12),
+ F_VCODEC( 48000000, pll8, 1, 8),
+ F_VCODEC( 54860000, pll8, 1, 7),
+ F_VCODEC( 96000000, pll8, 1, 4),
+ F_VCODEC(133330000, pll2, 1, 6),
+ F_VCODEC(200000000, pll2, 1, 4),
+ F_VCODEC(228570000, pll2, 2, 7),
F_END
};
@@ -4106,28 +4175,29 @@
.c = {
.dbg_name = "vcodec_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP3(LOW, 100000000, NOMINAL, 200000000,
+ HIGH, 228571000),
CLK_INIT(vcodec_clk.c),
.depends = &vcodec_axi_clk.c,
},
};
-#define F_VPE(f, s, d, v) \
+#define F_VPE(f, s, d) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_DIVSRC(15, 12, d, 2, 0, s##_to_mm_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_vpe[] = {
- F_VPE( 0, gnd, 1, NONE),
- F_VPE( 27000000, pxo, 1, LOW),
- F_VPE( 34909000, pll8, 11, LOW),
- F_VPE( 38400000, pll8, 10, LOW),
- F_VPE( 64000000, pll8, 6, LOW),
- F_VPE( 76800000, pll8, 5, LOW),
- F_VPE( 96000000, pll8, 4, NOMINAL),
- F_VPE(100000000, pll2, 8, NOMINAL),
- F_VPE(160000000, pll2, 5, NOMINAL),
+ F_VPE( 0, gnd, 1),
+ F_VPE( 27000000, pxo, 1),
+ F_VPE( 34909000, pll8, 11),
+ F_VPE( 38400000, pll8, 10),
+ F_VPE( 64000000, pll8, 6),
+ F_VPE( 76800000, pll8, 5),
+ F_VPE( 96000000, pll8, 4),
+ F_VPE(100000000, pll2, 8),
+ F_VPE(160000000, pll2, 5),
F_END
};
@@ -4149,12 +4219,13 @@
.c = {
.dbg_name = "vpe_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 76800000, NOMINAL, 160000000),
CLK_INIT(vpe_clk.c),
.depends = &vpe_axi_clk.c,
},
};
-#define F_VFE(f, s, d, m, n, v) \
+#define F_VFE(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -4162,50 +4233,40 @@
.ns_val = NS_MM(23, 16, n, m, 11, 10, d, 2, 0, s##_to_mm_mux), \
.ctl_val = CC(6, n), \
.mnd_en_mask = BIT(5) * !!(n), \
- .sys_vdd = v, \
}
-static struct clk_freq_tbl clk_tbl_vfe_8960[] = {
- F_VFE( 0, gnd, 1, 0, 0, NONE),
- F_VFE( 13960000, pll8, 1, 2, 55, LOW),
- F_VFE( 27000000, pxo, 1, 0, 0, LOW),
- F_VFE( 36570000, pll8, 1, 2, 21, LOW),
- F_VFE( 38400000, pll8, 2, 1, 5, LOW),
- F_VFE( 45180000, pll8, 1, 2, 17, LOW),
- F_VFE( 48000000, pll8, 2, 1, 4, LOW),
- F_VFE( 54860000, pll8, 1, 1, 7, LOW),
- F_VFE( 64000000, pll8, 2, 1, 3, LOW),
- F_VFE( 76800000, pll8, 1, 1, 5, LOW),
- F_VFE( 96000000, pll8, 2, 1, 2, LOW),
- F_VFE(109710000, pll8, 1, 2, 7, LOW),
- F_VFE(128000000, pll8, 1, 1, 3, NOMINAL),
- F_VFE(153600000, pll8, 1, 2, 5, NOMINAL),
- F_VFE(200000000, pll2, 2, 1, 2, NOMINAL),
- F_VFE(228570000, pll2, 1, 2, 7, NOMINAL),
- F_VFE(266667000, pll2, 1, 1, 3, NOMINAL),
- F_VFE(320000000, pll2, 1, 2, 5, HIGH),
+static struct clk_freq_tbl clk_tbl_vfe[] = {
+ F_VFE( 0, gnd, 1, 0, 0),
+ F_VFE( 13960000, pll8, 1, 2, 55),
+ F_VFE( 27000000, pxo, 1, 0, 0),
+ F_VFE( 36570000, pll8, 1, 2, 21),
+ F_VFE( 38400000, pll8, 2, 1, 5),
+ F_VFE( 45180000, pll8, 1, 2, 17),
+ F_VFE( 48000000, pll8, 2, 1, 4),
+ F_VFE( 54860000, pll8, 1, 1, 7),
+ F_VFE( 64000000, pll8, 2, 1, 3),
+ F_VFE( 76800000, pll8, 1, 1, 5),
+ F_VFE( 96000000, pll8, 2, 1, 2),
+ F_VFE(109710000, pll8, 1, 2, 7),
+ F_VFE(128000000, pll8, 1, 1, 3),
+ F_VFE(153600000, pll8, 1, 2, 5),
+ F_VFE(200000000, pll2, 2, 1, 2),
+ F_VFE(228570000, pll2, 1, 2, 7),
+ F_VFE(266667000, pll2, 1, 1, 3),
+ F_VFE(320000000, pll2, 1, 2, 5),
F_END
};
-static struct clk_freq_tbl clk_tbl_vfe_8064[] = {
- F_VFE( 0, gnd, 1, 0, 0, NONE),
- F_VFE( 13960000, pll8, 1, 2, 55, LOW),
- F_VFE( 36570000, pll8, 1, 2, 21, LOW),
- F_VFE( 38400000, pll8, 2, 1, 5, LOW),
- F_VFE( 45180000, pll8, 1, 2, 17, LOW),
- F_VFE( 48000000, pll8, 2, 1, 4, LOW),
- F_VFE( 54860000, pll8, 1, 1, 7, LOW),
- F_VFE( 64000000, pll8, 2, 1, 3, LOW),
- F_VFE( 76800000, pll8, 1, 1, 5, LOW),
- F_VFE( 96000000, pll8, 2, 1, 2, LOW),
- F_VFE(109710000, pll8, 1, 2, 7, LOW),
- F_VFE(128000000, pll8, 1, 1, 3, LOW),
- F_VFE(153600000, pll8, 1, 2, 5, NOMINAL),
- F_VFE(200000000, pll2, 2, 1, 2, NOMINAL),
- F_VFE(228570000, pll2, 1, 2, 7, NOMINAL),
- F_VFE(266667000, pll2, 1, 1, 3, NOMINAL),
- F_VFE(320000000, pll2, 1, 2, 5, HIGH),
- F_END
+static unsigned long fmax_vfe_8960_v2[MAX_VDD_LEVELS] __initdata = {
+ [VDD_DIG_LOW] = 110000000,
+ [VDD_DIG_NOMINAL] = 266667000,
+ [VDD_DIG_HIGH] = 320000000
+};
+
+static unsigned long fmax_vfe_8064[MAX_VDD_LEVELS] __initdata = {
+ [VDD_DIG_LOW] = 128000000,
+ [VDD_DIG_NOMINAL] = 266667000,
+ [VDD_DIG_HIGH] = 320000000
};
static struct rcg_clk vfe_clk = {
@@ -4223,11 +4284,12 @@
.ns_mask = (BM(23, 16) | BM(11, 10) | BM(2, 0)),
.ctl_mask = BM(7, 6),
.set_rate = set_rate_mnd,
- .freq_tbl = clk_tbl_vfe_8960,
+ .freq_tbl = clk_tbl_vfe,
.current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "vfe_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP2(LOW, 110000000, NOMINAL, 266667000),
CLK_INIT(vfe_clk.c),
.depends = &vfe_axi_clk.c,
},
@@ -4253,28 +4315,27 @@
/*
* Low Power Audio Clocks
*/
-#define F_AIF_OSR(f, s, d, m, n, v) \
+#define F_AIF_OSR(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD8(8, m, 0, n), \
.ns_val = NS(31, 24, n, m, 5, 4, 3, d, 2, 0, s##_to_lpa_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_aif_osr[] = {
- F_AIF_OSR( 0, gnd, 1, 0, 0, NONE),
- F_AIF_OSR( 512000, pll4, 4, 1, 192, LOW),
- F_AIF_OSR( 768000, pll4, 4, 1, 128, LOW),
- F_AIF_OSR( 1024000, pll4, 4, 1, 96, LOW),
- F_AIF_OSR( 1536000, pll4, 4, 1, 64, LOW),
- F_AIF_OSR( 2048000, pll4, 4, 1, 48, LOW),
- F_AIF_OSR( 3072000, pll4, 4, 1, 32, LOW),
- F_AIF_OSR( 4096000, pll4, 4, 1, 24, LOW),
- F_AIF_OSR( 6144000, pll4, 4, 1, 16, LOW),
- F_AIF_OSR( 8192000, pll4, 4, 1, 12, LOW),
- F_AIF_OSR(12288000, pll4, 4, 1, 8, LOW),
- F_AIF_OSR(24576000, pll4, 4, 1, 4, LOW),
+ F_AIF_OSR( 0, gnd, 1, 0, 0),
+ F_AIF_OSR( 512000, pll4, 4, 1, 192),
+ F_AIF_OSR( 768000, pll4, 4, 1, 128),
+ F_AIF_OSR( 1024000, pll4, 4, 1, 96),
+ F_AIF_OSR( 1536000, pll4, 4, 1, 64),
+ F_AIF_OSR( 2048000, pll4, 4, 1, 48),
+ F_AIF_OSR( 3072000, pll4, 4, 1, 32),
+ F_AIF_OSR( 4096000, pll4, 4, 1, 24),
+ F_AIF_OSR( 6144000, pll4, 4, 1, 16),
+ F_AIF_OSR( 8192000, pll4, 4, 1, 12),
+ F_AIF_OSR(12288000, pll4, 4, 1, 8),
+ F_AIF_OSR(24576000, pll4, 4, 1, 4),
F_END
};
@@ -4299,6 +4360,7 @@
.c = { \
.dbg_name = #i "_clk", \
.ops = &clk_ops_rcg_8960, \
+ VDD_DIG_FMAX_MAP1(LOW, 24576000), \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -4323,6 +4385,7 @@
.c = { \
.dbg_name = #i "_clk", \
.ops = &clk_ops_rcg_8960, \
+ VDD_DIG_FMAX_MAP1(LOW, 24576000), \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -4421,28 +4484,27 @@
static CLK_AIF_BIT_DIV(spare_i2s_spkr_bit, LCC_SPARE_I2S_SPKR_NS_REG,
LCC_SPARE_I2S_SPKR_STATUS_REG);
-#define F_PCM(f, s, d, m, n, v) \
+#define F_PCM(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD16(m, n), \
.ns_val = NS(31, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_lpa_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_pcm[] = {
- F_PCM( 0, gnd, 1, 0, 0, NONE),
- F_PCM( 512000, pll4, 4, 1, 192, LOW),
- F_PCM( 768000, pll4, 4, 1, 128, LOW),
- F_PCM( 1024000, pll4, 4, 1, 96, LOW),
- F_PCM( 1536000, pll4, 4, 1, 64, LOW),
- F_PCM( 2048000, pll4, 4, 1, 48, LOW),
- F_PCM( 3072000, pll4, 4, 1, 32, LOW),
- F_PCM( 4096000, pll4, 4, 1, 24, LOW),
- F_PCM( 6144000, pll4, 4, 1, 16, LOW),
- F_PCM( 8192000, pll4, 4, 1, 12, LOW),
- F_PCM(12288000, pll4, 4, 1, 8, LOW),
- F_PCM(24576000, pll4, 4, 1, 4, LOW),
+ F_PCM( 0, gnd, 1, 0, 0),
+ F_PCM( 512000, pll4, 4, 1, 192),
+ F_PCM( 768000, pll4, 4, 1, 128),
+ F_PCM( 1024000, pll4, 4, 1, 96),
+ F_PCM( 1536000, pll4, 4, 1, 64),
+ F_PCM( 2048000, pll4, 4, 1, 48),
+ F_PCM( 3072000, pll4, 4, 1, 32),
+ F_PCM( 4096000, pll4, 4, 1, 24),
+ F_PCM( 6144000, pll4, 4, 1, 16),
+ F_PCM( 8192000, pll4, 4, 1, 12),
+ F_PCM(12288000, pll4, 4, 1, 8),
+ F_PCM(24576000, pll4, 4, 1, 4),
F_END
};
@@ -4466,6 +4528,7 @@
.c = {
.dbg_name = "pcm_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP1(LOW, 24576000),
CLK_INIT(pcm_clk.c),
},
};
@@ -4490,6 +4553,7 @@
.c = {
.dbg_name = "audio_slimbus_clk",
.ops = &clk_ops_rcg_8960,
+ VDD_DIG_FMAX_MAP1(LOW, 24576000),
CLK_INIT(audio_slimbus_clk.c),
},
};
@@ -4542,6 +4606,7 @@
static DEFINE_CLK_VOTER(dfab_sdc4_clk, &dfab_clk.c);
static DEFINE_CLK_VOTER(dfab_sdc5_clk, &dfab_clk.c);
static DEFINE_CLK_VOTER(dfab_sps_clk, &dfab_clk.c);
+static DEFINE_CLK_VOTER(dfab_bam_dmux_clk, &dfab_clk.c);
static DEFINE_CLK_VOTER(ebi1_msmbus_clk, &ebi1_clk.c);
/*
@@ -4979,25 +5044,25 @@
CLK_LOOKUP("core_clk", gsbi5_qup_clk.c, NULL),
CLK_LOOKUP("core_clk", gsbi6_qup_clk.c, NULL),
CLK_LOOKUP("core_clk", gsbi7_qup_clk.c, NULL),
- CLK_LOOKUP("pdm_clk", pdm_clk.c, NULL),
+ CLK_LOOKUP("core_clk", pdm_clk.c, NULL),
CLK_LOOKUP("pmem_clk", pmem_clk.c, NULL),
CLK_DUMMY("core_clk", PRNG_CLK, NULL, OFF),
CLK_LOOKUP("core_clk", sdc1_clk.c, "msm_sdcc.1"),
CLK_LOOKUP("core_clk", sdc2_clk.c, "msm_sdcc.2"),
CLK_LOOKUP("core_clk", sdc3_clk.c, "msm_sdcc.3"),
CLK_LOOKUP("core_clk", sdc4_clk.c, "msm_sdcc.4"),
- CLK_LOOKUP("tsif_ref_clk", tsif_ref_clk.c, NULL),
- CLK_LOOKUP("tssc_clk", tssc_clk.c, NULL),
+ CLK_LOOKUP("ref_clk", tsif_ref_clk.c, NULL),
+ CLK_LOOKUP("core_clk", tssc_clk.c, NULL),
CLK_LOOKUP("usb_hs_clk", usb_hs1_xcvr_clk.c, NULL),
CLK_LOOKUP("core_clk", usb_hs3_xcvr_clk.c, NULL),
CLK_LOOKUP("core_clk", usb_hs4_xcvr_clk.c, NULL),
CLK_LOOKUP("usb_fs_src_clk", usb_fs1_src_clk.c, NULL),
CLK_LOOKUP("usb_fs_clk", usb_fs1_xcvr_clk.c, NULL),
CLK_LOOKUP("usb_fs_sys_clk", usb_fs1_sys_clk.c, NULL),
- CLK_LOOKUP("ce_pclk", ce1_p_clk.c, NULL),
- CLK_LOOKUP("ce_clk", ce1_core_clk.c, NULL),
- CLK_LOOKUP("sata_phy_ref_clk", sata_phy_ref_clk.c, NULL),
- CLK_LOOKUP("sata_phy_cfg_clk", sata_phy_cfg_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", ce1_p_clk.c, NULL),
+ CLK_LOOKUP("core_clk", ce1_core_clk.c, NULL),
+ CLK_LOOKUP("ref_clk", sata_phy_ref_clk.c, NULL),
+ CLK_LOOKUP("cfg_clk", sata_phy_cfg_clk.c, NULL),
CLK_LOOKUP("dma_bam_pclk", dma_bam_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", gsbi1_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", gsbi2_p_clk.c, NULL),
@@ -5006,7 +5071,7 @@
CLK_LOOKUP("iface_clk", gsbi5_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", gsbi6_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", gsbi7_p_clk.c, NULL),
- CLK_LOOKUP("tsif_pclk", tsif_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", tsif_p_clk.c, NULL),
CLK_LOOKUP("usb_fs_pclk", usb_fs1_p_clk.c, NULL),
CLK_LOOKUP("usb_hs_pclk", usb_hs1_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", usb_hs3_p_clk.c, NULL),
@@ -5021,33 +5086,33 @@
CLK_LOOKUP("iface_clk", ce3_p_clk.c, NULL),
CLK_LOOKUP("core_clk", adm0_clk.c, "msm_dmov"),
CLK_LOOKUP("iface_clk", adm0_p_clk.c, "msm_dmov"),
- CLK_LOOKUP("pmic_arb_pclk", pmic_arb0_p_clk.c, NULL),
- CLK_LOOKUP("pmic_arb_pclk", pmic_arb1_p_clk.c, NULL),
- CLK_LOOKUP("pmic_ssbi2", pmic_ssbi2_clk.c, NULL),
- CLK_LOOKUP("rpm_msg_ram_pclk", rpm_msg_ram_p_clk.c, NULL),
- CLK_LOOKUP("amp_clk", amp_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", pmic_arb0_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", pmic_arb1_p_clk.c, NULL),
+ CLK_LOOKUP("core_clk", pmic_ssbi2_clk.c, NULL),
+ CLK_LOOKUP("mem_clk", rpm_msg_ram_p_clk.c, NULL),
+ CLK_LOOKUP("core_clk", amp_clk.c, NULL),
CLK_LOOKUP("cam_clk", cam0_clk.c, NULL),
CLK_LOOKUP("cam_clk", cam1_clk.c, NULL),
CLK_LOOKUP("cam_clk", cam0_clk.c, NULL),
CLK_LOOKUP("cam_clk", cam0_clk.c, NULL),
CLK_LOOKUP("cam_clk", cam0_clk.c, NULL),
- CLK_DUMMY("csi_src_clk", CSI0_SRC_CLK, NULL, OFF),
+ CLK_LOOKUP("csi_src_clk", csi0_src_clk.c, NULL),
CLK_LOOKUP("csi_src_clk", csi1_src_clk.c, NULL),
CLK_LOOKUP("csi_src_clk", csi1_src_clk.c, NULL),
CLK_LOOKUP("csi_src_clk", csi2_src_clk.c, NULL),
- CLK_DUMMY("csi_clk", CSI0_CLK, NULL, OFF),
+ CLK_LOOKUP("csi_clk", csi0_clk.c, NULL),
CLK_LOOKUP("csi_clk", csi1_clk.c, NULL),
CLK_LOOKUP("csi_clk", csi1_clk.c, NULL),
CLK_LOOKUP("csi_clk", csi2_clk.c, NULL),
- CLK_DUMMY("csi_phy_clk", CSI0_PHY_CLK, NULL, OFF),
+ CLK_LOOKUP("csi_phy_clk", csi0_phy_clk.c, NULL),
CLK_LOOKUP("csi_phy_clk", csi1_phy_clk.c, NULL),
CLK_LOOKUP("csi_phy_clk", csi1_phy_clk.c, NULL),
CLK_LOOKUP("csi_phy_clk", csi2_phy_clk.c, NULL),
- CLK_DUMMY("csi_pix_clk", CSI_PIX_CLK, NULL, OFF),
- CLK_DUMMY("csi_rdi_clk", CSI_RDI_CLK, NULL, OFF),
- CLK_DUMMY("csi_pix_clk", CSI_PIX1_CLK, NULL, OFF),
- CLK_DUMMY("csi_rdi_clk", CSI_RDI1_CLK, NULL, OFF),
- CLK_DUMMY("csi_rdi_clk", CSI_RDI2_CLK, NULL, OFF),
+ CLK_LOOKUP("csi_pix_clk", csi_pix_clk.c, NULL),
+ CLK_LOOKUP("csi_pix_clk", csi_pix1_clk.c, NULL),
+ CLK_LOOKUP("csi_rdi_clk", csi_rdi_clk.c, NULL),
+ CLK_LOOKUP("csi_rdi_clk", csi_rdi1_clk.c, NULL),
+ CLK_LOOKUP("csi_rdi_clk", csi_rdi2_clk.c, NULL),
CLK_LOOKUP("csiphy_timer_src_clk", csiphy_timer_src_clk.c, NULL),
CLK_LOOKUP("csiphy_timer_clk", csi0phy_timer_clk.c, NULL),
CLK_LOOKUP("csiphy_timer_clk", csi1phy_timer_clk.c, NULL),
@@ -5059,33 +5124,43 @@
CLK_DUMMY("rgb_tv_clk", RGB_TV_CLK, NULL, OFF),
CLK_DUMMY("npl_tv_clk", NPL_TV_CLK, NULL, OFF),
CLK_LOOKUP("core_clk", gfx3d_clk.c, NULL),
+ CLK_LOOKUP("core_clk", gfx3d_clk.c, "footswitch-8x60.2"),
+ CLK_LOOKUP("bus_clk", gfx3d_axi_clk.c, "footswitch-8x60.2"),
CLK_LOOKUP("iface_clk", vcap_p_clk.c, NULL),
- CLK_LOOKUP("bus_clk", vcap_axi_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", vcap_p_clk.c, "footswitch-8x60.10"),
+ CLK_LOOKUP("bus_clk", vcap_axi_clk.c, "footswitch-8x60.10"),
CLK_LOOKUP("core_clk", vcap_clk.c, NULL),
+ CLK_LOOKUP("core_clk", vcap_clk.c, "footswitch-8x60.10"),
CLK_LOOKUP("vcap_npl_clk", vcap_npl_clk.c, NULL),
- CLK_LOOKUP("bus_clk", ijpeg_axi_clk.c, NULL),
+ CLK_LOOKUP("bus_clk", ijpeg_axi_clk.c, "footswitch-8x60.3"),
CLK_LOOKUP("mem_clk", imem_axi_clk.c, NULL),
CLK_LOOKUP("ijpeg_clk", ijpeg_clk.c, NULL),
- CLK_LOOKUP("jpegd_clk", jpegd_clk.c, NULL),
+ CLK_LOOKUP("core_clk", ijpeg_clk.c, "footswitch-8x60.3"),
+ CLK_LOOKUP("core_clk", jpegd_clk.c, NULL),
CLK_LOOKUP("mdp_clk", mdp_clk.c, NULL),
+ CLK_LOOKUP("core_clk", mdp_clk.c, "footswitch-8x60.4"),
CLK_LOOKUP("mdp_vsync_clk", mdp_vsync_clk.c, NULL),
CLK_LOOKUP("lut_mdp", lut_mdp_clk.c, NULL),
- CLK_LOOKUP("rot_clk", rot_clk.c, NULL),
+ CLK_LOOKUP("core_clk", rot_clk.c, "msm_rotator.0"),
+ CLK_LOOKUP("core_clk", rot_clk.c, "footswitch-8x60.6"),
CLK_DUMMY("tv_src_clk", TV_SRC_CLK, NULL, OFF),
CLK_LOOKUP("core_clk", vcodec_clk.c, NULL),
+ CLK_LOOKUP("core_clk", vcodec_clk.c, "footswitch-8x60.7"),
CLK_DUMMY("mdp_tv_clk", MDP_TV_CLK, NULL, OFF),
CLK_DUMMY("hdmi_clk", HDMI_TV_CLK, NULL, OFF),
CLK_LOOKUP("core_clk", hdmi_app_clk.c, NULL),
CLK_LOOKUP("vpe_clk", vpe_clk.c, NULL),
+ CLK_LOOKUP("core_clk", vpe_clk.c, "footswitch-8x60.9"),
CLK_LOOKUP("vfe_clk", vfe_clk.c, NULL),
+ CLK_LOOKUP("core_clk", vfe_clk.c, "footswitch-8x60.8"),
CLK_LOOKUP("csi_vfe_clk", csi_vfe_clk.c, NULL),
- CLK_LOOKUP("vfe_axi_clk", vfe_axi_clk.c, NULL),
- CLK_LOOKUP("mdp_axi_clk", mdp_axi_clk.c, NULL),
- CLK_LOOKUP("rot_axi_clk", rot_axi_clk.c, NULL),
- CLK_LOOKUP("bus_clk", vcodec_axi_clk.c, NULL),
- CLK_LOOKUP("bus_a_clk", vcodec_axi_a_clk.c, NULL),
- CLK_LOOKUP("bus_b_clk", vcodec_axi_b_clk.c, NULL),
- CLK_LOOKUP("vpe_axi_clk", vpe_axi_clk.c, NULL),
+ CLK_LOOKUP("bus_clk", vfe_axi_clk.c, "footswitch-8x60.8"),
+ CLK_LOOKUP("bus_clk", mdp_axi_clk.c, "footswitch-8x60.4"),
+ CLK_LOOKUP("bus_clk", rot_axi_clk.c, "footswitch-8x60.6"),
+ CLK_LOOKUP("bus_clk", vcodec_axi_clk.c, "footswitch-8x60.7"),
+ CLK_LOOKUP("bus_a_clk", vcodec_axi_a_clk.c, "footswitch-8x60.7"),
+ CLK_LOOKUP("bus_b_clk", vcodec_axi_b_clk.c, "footswitch-8x60.7"),
+ CLK_LOOKUP("bus_clk", vpe_axi_clk.c, "footswitch-8x60.9"),
CLK_LOOKUP("amp_pclk", amp_p_clk.c, NULL),
CLK_LOOKUP("csi_pclk", csi_p_clk.c, NULL),
CLK_LOOKUP("dsi_m_pclk", dsi1_m_p_clk.c, NULL),
@@ -5093,17 +5168,24 @@
CLK_LOOKUP("dsi_m_pclk", dsi2_m_p_clk.c, NULL),
CLK_LOOKUP("dsi_s_pclk", dsi2_s_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", gfx3d_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", gfx3d_p_clk.c, "footswitch-8x60.2"),
CLK_LOOKUP("master_iface_clk", hdmi_m_p_clk.c, NULL),
CLK_LOOKUP("slave_iface_clk", hdmi_s_p_clk.c, NULL),
CLK_LOOKUP("ijpeg_pclk", ijpeg_p_clk.c, NULL),
- CLK_LOOKUP("jpegd_pclk", jpegd_p_clk.c, NULL),
- CLK_LOOKUP("imem_pclk", imem_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", ijpeg_p_clk.c, "footswitch-8x60.3"),
+ CLK_LOOKUP("iface_clk", jpegd_p_clk.c, NULL),
+ CLK_LOOKUP("mem_iface_clk", imem_p_clk.c, NULL),
CLK_LOOKUP("mdp_pclk", mdp_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", mdp_p_clk.c, "footswitch-8x60.4"),
CLK_LOOKUP("iface_clk", smmu_p_clk.c, NULL),
- CLK_LOOKUP("rotator_pclk", rot_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", rot_p_clk.c, "msm_rotator.0"),
+ CLK_LOOKUP("iface_clk", rot_p_clk.c, "footswitch-8x60.6"),
CLK_LOOKUP("iface_clk", vcodec_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", vcodec_p_clk.c, "footswitch-8x60.7"),
CLK_LOOKUP("vfe_pclk", vfe_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", vfe_p_clk.c, "footswitch-8x60.8"),
CLK_LOOKUP("vpe_pclk", vpe_p_clk.c, NULL),
+ CLK_LOOKUP("iface_pclk", vpe_p_clk.c, "footswitch-8x60.9"),
CLK_LOOKUP("mi2s_bit_clk", mi2s_bit_clk.c, NULL),
CLK_LOOKUP("mi2s_osr_clk", mi2s_osr_clk.c, NULL),
CLK_LOOKUP("i2s_mic_bit_clk", codec_i2s_mic_bit_clk.c, NULL),
@@ -5115,8 +5197,8 @@
CLK_LOOKUP("i2s_spkr_bit_clk", spare_i2s_spkr_bit_clk.c, NULL),
CLK_LOOKUP("i2s_spkr_osr_clk", spare_i2s_spkr_osr_clk.c, NULL),
CLK_LOOKUP("pcm_clk", pcm_clk.c, NULL),
- CLK_DUMMY("sps_slimbus_clk", SPS_SLIMBUS_CLK, NULL, OFF),
- CLK_DUMMY("audio_slimbus_clk", AUDIO_SLIMBUS_CLK, NULL, OFF),
+ CLK_LOOKUP("sps_slimbus_clk", sps_slimbus_clk.c, NULL),
+ CLK_LOOKUP("audio_slimbus_clk", audio_slimbus_clk.c, NULL),
CLK_LOOKUP("core_clk", jpegd_axi_clk.c, NULL),
CLK_LOOKUP("core_clk", vpe_axi_clk.c, NULL),
CLK_LOOKUP("core_clk", mdp_axi_clk.c, NULL),
@@ -5126,7 +5208,7 @@
CLK_LOOKUP("core_clk", vfe_axi_clk.c, NULL),
CLK_LOOKUP("core_clk", vcodec_axi_a_clk.c, NULL),
CLK_LOOKUP("core_clk", vcodec_axi_b_clk.c, NULL),
- CLK_DUMMY("core_clk", GFX3D_AXI_CLK, NULL, 0),
+ CLK_LOOKUP("core_clk", gfx3d_axi_clk.c, NULL),
CLK_DUMMY("dfab_dsps_clk", DFAB_DSPS_CLK, NULL, 0),
CLK_DUMMY("dfab_usb_hs_clk", DFAB_USB_HS_CLK, NULL, 0),
CLK_DUMMY("bus_clk", DFAB_SDC1_CLK, NULL, 0),
@@ -5141,7 +5223,7 @@
CLK_LOOKUP("usb_hsic_p_clk", usb_hsic_p_clk.c, NULL),
CLK_LOOKUP("ebi1_msmbus_clk", ebi1_msmbus_clk.c, NULL),
- CLK_LOOKUP("ebi1_clk", ebi1_adm_clk.c, "msm_dmov"),
+ CLK_LOOKUP("mem_clk", ebi1_adm_clk.c, "msm_dmov"),
CLK_LOOKUP("l2_mclk", l2_m_clk, NULL),
CLK_LOOKUP("krait0_mclk", krait0_m_clk, NULL),
@@ -5159,6 +5241,7 @@
CLK_LOOKUP("afab_a_clk", afab_a_clk.c, NULL),
CLK_LOOKUP("cfpb_clk", cfpb_clk.c, NULL),
CLK_LOOKUP("cfpb_a_clk", cfpb_a_clk.c, NULL),
+ CLK_LOOKUP("cfpb_a_clk", cfpb_a_clk.c, "clock-8960"),
CLK_LOOKUP("dfab_clk", dfab_clk.c, NULL),
CLK_LOOKUP("dfab_a_clk", dfab_a_clk.c, NULL),
CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
@@ -5197,9 +5280,7 @@
CLK_LOOKUP("core_clk", gsbi10_qup_clk.c, "qup_i2c.10"),
CLK_LOOKUP("core_clk", gsbi11_qup_clk.c, NULL),
CLK_LOOKUP("core_clk", gsbi12_qup_clk.c, "qup_i2c.12"),
- CLK_LOOKUP("tsif_pclk", tsif_p_clk.c, NULL),
- CLK_LOOKUP("tsif_ref_clk", tsif_ref_clk.c, NULL),
- CLK_LOOKUP("pdm_clk", pdm_clk.c, NULL),
+ CLK_LOOKUP("core_clk", pdm_clk.c, NULL),
CLK_LOOKUP("mem_clk", pmem_clk.c, "msm_sps"),
CLK_LOOKUP("core_clk", prng_clk.c, "msm_rng.0"),
CLK_LOOKUP("core_clk", sdc1_clk.c, "msm_sdcc.1"),
@@ -5209,7 +5290,7 @@
CLK_LOOKUP("core_clk", sdc5_clk.c, "msm_sdcc.5"),
CLK_LOOKUP("slimbus_xo_src_clk", slimbus_xo_src_clk.c, NULL),
CLK_LOOKUP("ref_clk", tsif_ref_clk.c, NULL),
- CLK_LOOKUP("tssc_clk", tssc_clk.c, NULL),
+ CLK_LOOKUP("core_clk", tssc_clk.c, NULL),
CLK_LOOKUP("usb_hs_clk", usb_hs1_xcvr_clk.c, NULL),
CLK_LOOKUP("usb_phy_clk", usb_phy0_clk.c, NULL),
CLK_LOOKUP("usb_fs_clk", usb_fs1_xcvr_clk.c, NULL),
@@ -5246,11 +5327,11 @@
CLK_LOOKUP("iface_clk", sdc5_p_clk.c, "msm_sdcc.5"),
CLK_LOOKUP("core_clk", adm0_clk.c, "msm_dmov"),
CLK_LOOKUP("iface_clk", adm0_p_clk.c, "msm_dmov"),
- CLK_LOOKUP("pmic_arb_pclk", pmic_arb0_p_clk.c, NULL),
- CLK_LOOKUP("pmic_arb_pclk", pmic_arb1_p_clk.c, NULL),
- CLK_LOOKUP("pmic_ssbi2", pmic_ssbi2_clk.c, NULL),
- CLK_LOOKUP("rpm_msg_ram_pclk", rpm_msg_ram_p_clk.c, NULL),
- CLK_LOOKUP("amp_clk", amp_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", pmic_arb0_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", pmic_arb1_p_clk.c, NULL),
+ CLK_LOOKUP("core_clk", pmic_ssbi2_clk.c, NULL),
+ CLK_LOOKUP("mem_clk", rpm_msg_ram_p_clk.c, NULL),
+ CLK_LOOKUP("core_clk", amp_clk.c, NULL),
CLK_LOOKUP("cam_clk", cam0_clk.c, NULL),
CLK_LOOKUP("cam_clk", cam1_clk.c, NULL),
CLK_LOOKUP("cam_clk", cam0_clk.c, "msm_camera_imx074.0"),
@@ -5287,10 +5368,10 @@
CLK_LOOKUP("core_clk", gfx3d_clk.c, "kgsl-3d0.0"),
CLK_LOOKUP("core_clk", gfx3d_clk.c, "footswitch-8x60.2"),
CLK_LOOKUP("bus_clk", ijpeg_axi_clk.c, "footswitch-8x60.3"),
- CLK_LOOKUP("imem_axi_clk", imem_axi_clk.c, NULL),
+ CLK_LOOKUP("mem_clk", imem_axi_clk.c, NULL),
CLK_LOOKUP("ijpeg_clk", ijpeg_clk.c, NULL),
CLK_LOOKUP("core_clk", ijpeg_clk.c, "footswitch-8x60.3"),
- CLK_LOOKUP("jpegd_clk", jpegd_clk.c, NULL),
+ CLK_LOOKUP("core_clk", jpegd_clk.c, NULL),
CLK_LOOKUP("mdp_clk", mdp_clk.c, NULL),
CLK_LOOKUP("core_clk", mdp_clk.c, "footswitch-8x60.4"),
CLK_LOOKUP("mdp_vsync_clk", mdp_vsync_clk.c, NULL),
@@ -5301,7 +5382,7 @@
CLK_LOOKUP("qdss_traceclkin_clk", qdss_traceclkin_clk.c, NULL),
CLK_LOOKUP("qdss_tsctr_clk", qdss_tsctr_clk.c, NULL),
CLK_LOOKUP("qdss_stm_clk", qdss_stm_clk.c, NULL),
- CLK_LOOKUP("rot_clk", rot_clk.c, NULL),
+ CLK_LOOKUP("core_clk", rot_clk.c, "msm_rotator.0"),
CLK_LOOKUP("core_clk", rot_clk.c, "footswitch-8x60.6"),
CLK_LOOKUP("tv_src_clk", tv_src_clk.c, NULL),
CLK_LOOKUP("tv_enc_clk", tv_enc_clk.c, NULL),
@@ -5339,12 +5420,12 @@
CLK_LOOKUP("slave_iface_clk", hdmi_s_p_clk.c, "hdmi_msm.1"),
CLK_LOOKUP("ijpeg_pclk", ijpeg_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", ijpeg_p_clk.c, "footswitch-8x60.3"),
- CLK_LOOKUP("jpegd_pclk", jpegd_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", jpegd_p_clk.c, NULL),
CLK_LOOKUP("mem_iface_clk", imem_p_clk.c, NULL),
CLK_LOOKUP("mdp_pclk", mdp_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", mdp_p_clk.c, "footswitch-8x60.4"),
- CLK_LOOKUP("smmu_pclk", smmu_p_clk.c, NULL),
- CLK_LOOKUP("rotator_pclk", rot_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", smmu_p_clk.c, "msm_iommu"),
+ CLK_LOOKUP("iface_clk", rot_p_clk.c, "msm_rotator.0"),
CLK_LOOKUP("iface_clk", rot_p_clk.c, "footswitch-8x60.6"),
CLK_LOOKUP("tv_enc_pclk", tv_enc_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", vcodec_p_clk.c, "msm_vidc.0"),
@@ -5366,18 +5447,18 @@
CLK_LOOKUP("pcm_clk", pcm_clk.c, NULL),
CLK_LOOKUP("sps_slimbus_clk", sps_slimbus_clk.c, NULL),
CLK_LOOKUP("audio_slimbus_clk", audio_slimbus_clk.c, NULL),
- CLK_LOOKUP("iommu_clk", jpegd_axi_clk.c, "msm_iommu.0"),
- CLK_LOOKUP("iommu_clk", vpe_axi_clk.c, "msm_iommu.1"),
- CLK_LOOKUP("iommu_clk", mdp_axi_clk.c, "msm_iommu.2"),
- CLK_LOOKUP("iommu_clk", mdp_axi_clk.c, "msm_iommu.3"),
- CLK_LOOKUP("iommu_clk", rot_axi_clk.c, "msm_iommu.4"),
- CLK_LOOKUP("iommu_clk", ijpeg_axi_clk.c, "msm_iommu.5"),
- CLK_LOOKUP("iommu_clk", vfe_axi_clk.c, "msm_iommu.6"),
- CLK_LOOKUP("iommu_clk", vcodec_axi_a_clk.c, "msm_iommu.7"),
- CLK_LOOKUP("iommu_clk", vcodec_axi_b_clk.c, "msm_iommu.8"),
- CLK_LOOKUP("iommu_clk", gfx3d_clk.c, "msm_iommu.9"),
- CLK_LOOKUP("iommu_clk", gfx2d0_clk.c, "msm_iommu.10"),
- CLK_LOOKUP("iommu_clk", gfx2d1_clk.c, "msm_iommu.11"),
+ CLK_LOOKUP("core_clk", jpegd_axi_clk.c, "msm_iommu.0"),
+ CLK_LOOKUP("core_clk", vpe_axi_clk.c, "msm_iommu.1"),
+ CLK_LOOKUP("core_clk", mdp_axi_clk.c, "msm_iommu.2"),
+ CLK_LOOKUP("core_clk", mdp_axi_clk.c, "msm_iommu.3"),
+ CLK_LOOKUP("core_clk", rot_axi_clk.c, "msm_iommu.4"),
+ CLK_LOOKUP("core_clk", ijpeg_axi_clk.c, "msm_iommu.5"),
+ CLK_LOOKUP("core_clk", vfe_axi_clk.c, "msm_iommu.6"),
+ CLK_LOOKUP("core_clk", vcodec_axi_a_clk.c, "msm_iommu.7"),
+ CLK_LOOKUP("core_clk", vcodec_axi_b_clk.c, "msm_iommu.8"),
+ CLK_LOOKUP("core_clk", gfx3d_clk.c, "msm_iommu.9"),
+ CLK_LOOKUP("core_clk", gfx2d0_clk.c, "msm_iommu.10"),
+ CLK_LOOKUP("core_clk", gfx2d1_clk.c, "msm_iommu.11"),
CLK_LOOKUP("dfab_dsps_clk", dfab_dsps_clk.c, NULL),
CLK_LOOKUP("dfab_usb_hs_clk", dfab_usb_hs_clk.c, NULL),
CLK_LOOKUP("bus_clk", dfab_sdc1_clk.c, "msm_sdcc.1"),
@@ -5386,6 +5467,7 @@
CLK_LOOKUP("bus_clk", dfab_sdc4_clk.c, "msm_sdcc.4"),
CLK_LOOKUP("bus_clk", dfab_sdc5_clk.c, "msm_sdcc.5"),
CLK_LOOKUP("dfab_clk", dfab_sps_clk.c, "msm_sps"),
+ CLK_LOOKUP("bus_clk", dfab_bam_dmux_clk.c, "BAM_RMNT"),
CLK_LOOKUP("ebi1_msmbus_clk", ebi1_msmbus_clk.c, NULL),
CLK_LOOKUP("mem_clk", ebi1_adm_clk.c, "msm_dmov"),
@@ -5440,6 +5522,11 @@
writel_relaxed(regval, mode_reg);
/* Program bias count */
+ regval &= ~BM(19, 14);
+ regval |= BVAL(19, 14, 0x1);
+ writel_relaxed(regval, mode_reg);
+
+ /* Program lock count */
regval &= ~BM(13, 8);
regval |= BVAL(13, 8, 0x8);
writel_relaxed(regval, mode_reg);
@@ -5504,7 +5591,7 @@
rmwreg(0x80FF0000, VFE_CC_REG, 0xE0FF4010);
rmwreg(0x800000FF, VFE_CC2_REG, 0xE00000FF);
rmwreg(0x80FF0000, VPE_CC_REG, 0xE0FF0010);
- if (cpu_is_msm8960()) {
+ if (cpu_is_msm8960() || cpu_is_msm8930()) {
rmwreg(0x80FF0000, GFX2D0_CC_REG, 0xE0FF0010);
rmwreg(0x80FF0000, GFX2D1_CC_REG, 0xE0FF0010);
rmwreg(0x80FF0000, TV_CC_REG, 0xE1FFC010);
@@ -5549,7 +5636,7 @@
writel_relaxed(BIT(15), PDM_CLK_NS_REG);
/* Source SLIMBus xo src from slimbus reference clock */
- if (cpu_is_msm8960())
+ if (cpu_is_msm8960() || cpu_is_msm8930())
writel_relaxed(0x3, SLIMBUS_XO_SRC_CLK_CTL_REG);
/* Source the dsi_byte_clks from the DSI PHY PLLs */
@@ -5640,11 +5727,6 @@
/* Set VCO frequency */
rmwreg(0x10000, BB_PLL14_CONFIG_REG, 0x30000);
- /* Enable AUX output */
- regval = readl_relaxed(BB_PLL14_TEST_CTL_REG);
- regval |= BIT(12);
- writel_relaxed(regval, BB_PLL14_TEST_CTL_REG);
-
set_fsm_mode(BB_PLL14_MODE_REG);
}
/* Program PLL2 to 800MHz with ref clk = 27MHz */
@@ -5666,11 +5748,6 @@
/* Set VCO frequency */
rmwreg(0x20000, MM_PLL1_CONFIG_REG, 0x30000);
- /* Enable AUX output */
- regval = readl_relaxed(MM_PLL1_TEST_CTL_REG);
- regval |= BIT(12);
- writel_relaxed(regval, MM_PLL1_TEST_CTL_REG);
-
/* Program PLL15 to 975MHz with ref clk = 27MHz */
writel_relaxed(0x24, MM_PLL3_L_VAL_REG);
writel_relaxed(0x1, MM_PLL3_M_VAL_REG);
@@ -5742,11 +5819,19 @@
BUG();
}
- if (cpu_is_msm8960()) {
+ if (cpu_is_msm8960() || cpu_is_msm8930()) {
memcpy(msm_clocks_8960, msm_clocks_8960_v1,
sizeof(msm_clocks_8960_v1));
if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 2) {
gfx3d_clk.freq_tbl = clk_tbl_gfx3d_8960_v2;
+
+ memcpy(gfx3d_clk.c.fmax, fmax_gfx3d_8960_v2,
+ sizeof(gfx3d_clk.c.fmax));
+ memcpy(ijpeg_clk.c.fmax, fmax_ijpeg_8960_v2,
+ sizeof(ijpeg_clk.c.fmax));
+ memcpy(vfe_clk.c.fmax, fmax_vfe_8960_v2,
+ sizeof(vfe_clk.c.fmax));
+
memcpy(msm_clocks_8960 + ARRAY_SIZE(msm_clocks_8960_v1),
msm_clocks_8960_v2, sizeof(msm_clocks_8960_v2));
num_lookups = ARRAY_SIZE(msm_clocks_8960);
@@ -5755,20 +5840,27 @@
}
/*
- * Change the freq tables for gfx3d_clk, ijpeg_clk, mdp_clk,
- * tv_src_clk and vfe_clk at runtime and chain gmem_axi_clk
- * with gfx3d_axi_clk for 8064.
+ * Change the freq tables for and voltage requirements for
+ * clocks which differ between 8960 and 8064.
*/
if (cpu_is_apq8064()) {
gfx3d_clk.freq_tbl = clk_tbl_gfx3d_8064;
- ijpeg_clk.freq_tbl = clk_tbl_ijpeg_8064;
- mdp_clk.freq_tbl = clk_tbl_mdp_8064;
- vfe_clk.freq_tbl = clk_tbl_vfe_8064;
+
+ memcpy(gfx3d_clk.c.fmax, fmax_gfx3d_8064,
+ sizeof(gfx3d_clk.c.fmax));
+ memcpy(ijpeg_clk.c.fmax, fmax_ijpeg_8064,
+ sizeof(ijpeg_clk.c.fmax));
+ memcpy(mdp_clk.c.fmax, fmax_mdp_8064,
+ sizeof(ijpeg_clk.c.fmax));
+ memcpy(tv_src_clk.c.fmax, fmax_tv_src_8064,
+ sizeof(tv_src_clk.c.fmax));
+ memcpy(vfe_clk.c.fmax, fmax_vfe_8064,
+ sizeof(vfe_clk.c.fmax));
+
gmem_axi_clk.c.depends = &gfx3d_axi_clk.c;
}
- soc_update_sys_vdd = msm8960_update_sys_vdd;
- local_vote_sys_vdd(HIGH);
+ vote_vdd_level(&vdd_dig, VDD_DIG_HIGH);
clk_ops_pll.enable = sr_pll_clk_enable;
@@ -5787,11 +5879,18 @@
clk_set_rate(&usb_hs4_xcvr_clk.c, 60000000);
}
clk_set_rate(&usb_fs1_src_clk.c, 60000000);
- if (cpu_is_msm8960())
+ if (cpu_is_msm8960() || cpu_is_msm8930())
clk_set_rate(&usb_fs2_src_clk.c, 60000000);
clk_set_rate(&usb_hsic_xcvr_fs_clk.c, 60000000);
clk_set_rate(&usb_hsic_hsic_src_clk.c, 480000000);
clk_set_rate(&usb_hsic_hsio_cal_clk.c, 9000000);
+ /*
+ * Set the CSI rates to a safe default to avoid warnings when
+ * switching csi pix and rdi clocks.
+ */
+ clk_set_rate(&csi0_src_clk.c, 27000000);
+ clk_set_rate(&csi1_src_clk.c, 27000000);
+ clk_set_rate(&csi2_src_clk.c, 27000000);
/*
* The halt status bits for these clocks may be incorrect at boot.
@@ -5805,7 +5904,9 @@
SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 2) {
clk_enable(&usb_hsic_hsic_clk.c);
clk_disable(&usb_hsic_hsic_clk.c);
- }
+ } else
+ /* CSI2 hardware not present on 8960v1 devices */
+ pix_rdi_mux_map[2] = NULL;
if (machine_is_msm8960_sim()) {
clk_set_rate(&sdc1_clk.c, 48000000);
@@ -5821,6 +5922,7 @@
{
int rc;
struct clk *mmfpb_a_clk = clk_get_sys("clock-8960", "mmfpb_a_clk");
+ struct clk *cfpb_a_clk = clk_get_sys("clock-8960", "cfpb_a_clk");
/* Vote for MMFPB to be at least 76.8MHz when an Apps CPU is active. */
if (WARN(IS_ERR(mmfpb_a_clk), "mmfpb_a_clk not found (%ld)\n",
@@ -5833,7 +5935,18 @@
if (WARN(rc, "mmfpb_a_clk not enabled (%d)\n", rc))
return rc;
- return local_unvote_sys_vdd(HIGH);
+ /* Vote for CFPB to be at least 64MHz when an Apps CPU is active. */
+ if (WARN(IS_ERR(cfpb_a_clk), "cfpb_a_clk not found (%ld)\n",
+ PTR_ERR(cfpb_a_clk)))
+ return PTR_ERR(cfpb_a_clk);
+ rc = clk_set_min_rate(cfpb_a_clk, 64000000);
+ if (WARN(rc, "cfpb_a_clk rate was not set (%d)\n", rc))
+ return rc;
+ rc = clk_enable(cfpb_a_clk);
+ if (WARN(rc, "cfpb_a_clk not enabled (%d)\n", rc))
+ return rc;
+
+ return unvote_vdd_level(&vdd_dig, VDD_DIG_HIGH);
}
struct clock_init_data msm8960_clock_init_data __initdata = {
diff --git a/arch/arm/mach-msm/clock-8x60.c b/arch/arm/mach-msm/clock-8x60.c
index 1273198..c5d3d1d 100644
--- a/arch/arm/mach-msm/clock-8x60.c
+++ b/arch/arm/mach-msm/clock-8x60.c
@@ -313,6 +313,41 @@
| BVAL((mde1_lsb+1), mde1_lsb, MN_MODE_DUAL_EDGE)) \
* !!(n))
+enum vdd_dig_levels {
+ VDD_DIG_NONE,
+ VDD_DIG_LOW,
+ VDD_DIG_NOMINAL,
+ VDD_DIG_HIGH
+};
+
+static int set_vdd_dig(struct clk_vdd_class *vdd_class, int level)
+{
+ static const int vdd_uv[] = {
+ [VDD_DIG_NONE] = 500000,
+ [VDD_DIG_LOW] = 1000000,
+ [VDD_DIG_NOMINAL] = 1100000,
+ [VDD_DIG_HIGH] = 1200000
+ };
+
+ return rpm_vreg_set_voltage(RPM_VREG_ID_PM8058_S1, RPM_VREG_VOTER3,
+ vdd_uv[level], 1200000, 1);
+}
+
+static DEFINE_VDD_CLASS(vdd_dig, set_vdd_dig);
+
+#define VDD_DIG_FMAX_MAP1(l1, f1) \
+ .vdd_class = &vdd_dig, \
+ .fmax[VDD_DIG_##l1] = (f1)
+#define VDD_DIG_FMAX_MAP2(l1, f1, l2, f2) \
+ .vdd_class = &vdd_dig, \
+ .fmax[VDD_DIG_##l1] = (f1), \
+ .fmax[VDD_DIG_##l2] = (f2)
+#define VDD_DIG_FMAX_MAP3(l1, f1, l2, f2, l3, f3) \
+ .vdd_class = &vdd_dig, \
+ .fmax[VDD_DIG_##l1] = (f1), \
+ .fmax[VDD_DIG_##l2] = (f2), \
+ .fmax[VDD_DIG_##l3] = (f3)
+
static struct msm_xo_voter *xo_pxo, *xo_cxo;
static bool xo_clk_is_local(struct clk *clk)
@@ -498,24 +533,6 @@
writel_relaxed(pll_mode, MM_PLL2_MODE_REG);
}
-/*
- * SoC-specific functions required by clock-local driver
- */
-
-/* Update the sys_vdd voltage given a level. */
-static int msm8660_update_sys_vdd(enum sys_vdd_level level)
-{
- static const int vdd_uv[] = {
- [NONE] = 500000,
- [LOW] = 1000000,
- [NOMINAL] = 1100000,
- [HIGH] = 1200000,
- };
-
- return rpm_vreg_set_voltage(RPM_VREG_ID_PM8058_S1, RPM_VREG_VOTER3,
- vdd_uv[level], vdd_uv[HIGH], 1);
-}
-
static int soc_clk_reset(struct clk *clk, enum clk_reset_action action)
{
return branch_reset(&to_rcg_clk(clk)->b, action);
@@ -524,7 +541,7 @@
static struct clk_ops clk_ops_rcg_8x60 = {
.enable = rcg_clk_enable,
.disable = rcg_clk_disable,
- .auto_off = rcg_clk_auto_off,
+ .auto_off = rcg_clk_disable,
.handoff = rcg_clk_handoff,
.set_rate = rcg_clk_set_rate,
.set_min_rate = rcg_clk_set_min_rate,
@@ -540,7 +557,7 @@
static struct clk_ops clk_ops_branch = {
.enable = branch_clk_enable,
.disable = branch_clk_disable,
- .auto_off = branch_clk_auto_off,
+ .auto_off = branch_clk_disable,
.is_enabled = branch_clk_is_enabled,
.reset = branch_clk_reset,
.is_local = local_clk_is_local,
@@ -1053,34 +1070,34 @@
.c = { \
.dbg_name = #i "_clk", \
.ops = &clk_ops_rcg_8x60, \
+ VDD_DIG_FMAX_MAP2(LOW, 32000000, NOMINAL, 64000000), \
CLK_INIT(i##_clk.c), \
}, \
}
-#define F_GSBI_UART(f, s, d, m, n, v) \
+#define F_GSBI_UART(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD16(m, n), \
.ns_val = NS(31, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_gsbi_uart[] = {
- F_GSBI_UART( 0, gnd, 1, 0, 0, NONE),
- F_GSBI_UART( 1843200, pll8, 1, 3, 625, LOW),
- F_GSBI_UART( 3686400, pll8, 1, 6, 625, LOW),
- F_GSBI_UART( 7372800, pll8, 1, 12, 625, LOW),
- F_GSBI_UART(14745600, pll8, 1, 24, 625, LOW),
- F_GSBI_UART(16000000, pll8, 4, 1, 6, LOW),
- F_GSBI_UART(24000000, pll8, 4, 1, 4, LOW),
- F_GSBI_UART(32000000, pll8, 4, 1, 3, LOW),
- F_GSBI_UART(40000000, pll8, 1, 5, 48, NOMINAL),
- F_GSBI_UART(46400000, pll8, 1, 29, 240, NOMINAL),
- F_GSBI_UART(48000000, pll8, 4, 1, 2, NOMINAL),
- F_GSBI_UART(51200000, pll8, 1, 2, 15, NOMINAL),
- F_GSBI_UART(56000000, pll8, 1, 7, 48, NOMINAL),
- F_GSBI_UART(58982400, pll8, 1, 96, 625, NOMINAL),
- F_GSBI_UART(64000000, pll8, 2, 1, 3, NOMINAL),
+ F_GSBI_UART( 0, gnd, 1, 0, 0),
+ F_GSBI_UART( 1843200, pll8, 1, 3, 625),
+ F_GSBI_UART( 3686400, pll8, 1, 6, 625),
+ F_GSBI_UART( 7372800, pll8, 1, 12, 625),
+ F_GSBI_UART(14745600, pll8, 1, 24, 625),
+ F_GSBI_UART(16000000, pll8, 4, 1, 6),
+ F_GSBI_UART(24000000, pll8, 4, 1, 4),
+ F_GSBI_UART(32000000, pll8, 4, 1, 3),
+ F_GSBI_UART(40000000, pll8, 1, 5, 48),
+ F_GSBI_UART(46400000, pll8, 1, 29, 240),
+ F_GSBI_UART(48000000, pll8, 4, 1, 2),
+ F_GSBI_UART(51200000, pll8, 1, 2, 15),
+ F_GSBI_UART(56000000, pll8, 1, 7, 48),
+ F_GSBI_UART(58982400, pll8, 1, 96, 625),
+ F_GSBI_UART(64000000, pll8, 2, 1, 3),
F_END
};
@@ -1117,29 +1134,29 @@
.c = { \
.dbg_name = #i "_clk", \
.ops = &clk_ops_rcg_8x60, \
+ VDD_DIG_FMAX_MAP2(LOW, 24000000, NOMINAL, 52000000), \
CLK_INIT(i##_clk.c), \
}, \
}
-#define F_GSBI_QUP(f, s, d, m, n, v) \
+#define F_GSBI_QUP(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD8(16, m, 0, n), \
.ns_val = NS(23, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_gsbi_qup[] = {
- F_GSBI_QUP( 0, gnd, 1, 0, 0, NONE),
- F_GSBI_QUP( 1100000, pxo, 1, 2, 49, LOW),
- F_GSBI_QUP( 5400000, pxo, 1, 1, 5, LOW),
- F_GSBI_QUP(10800000, pxo, 1, 2, 5, LOW),
- F_GSBI_QUP(15060000, pll8, 1, 2, 51, LOW),
- F_GSBI_QUP(24000000, pll8, 4, 1, 4, LOW),
- F_GSBI_QUP(25600000, pll8, 1, 1, 15, NOMINAL),
- F_GSBI_QUP(27000000, pxo, 1, 0, 0, NOMINAL),
- F_GSBI_QUP(48000000, pll8, 4, 1, 2, NOMINAL),
- F_GSBI_QUP(51200000, pll8, 1, 2, 15, NOMINAL),
+ F_GSBI_QUP( 0, gnd, 1, 0, 0),
+ F_GSBI_QUP( 1100000, pxo, 1, 2, 49),
+ F_GSBI_QUP( 5400000, pxo, 1, 1, 5),
+ F_GSBI_QUP(10800000, pxo, 1, 2, 5),
+ F_GSBI_QUP(15060000, pll8, 1, 2, 51),
+ F_GSBI_QUP(24000000, pll8, 4, 1, 4),
+ F_GSBI_QUP(25600000, pll8, 1, 1, 15),
+ F_GSBI_QUP(27000000, pxo, 1, 0, 0),
+ F_GSBI_QUP(48000000, pll8, 4, 1, 2),
+ F_GSBI_QUP(51200000, pll8, 1, 2, 15),
F_END
};
@@ -1156,16 +1173,15 @@
static CLK_GSBI_QUP(gsbi11_qup, 11, CLK_HALT_CFPB_STATEC_REG, 15);
static CLK_GSBI_QUP(gsbi12_qup, 12, CLK_HALT_CFPB_STATEC_REG, 11);
-#define F_PDM(f, s, d, v) \
+#define F_PDM(f, s, d) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_SRC_SEL(1, 0, s##_to_xo_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_pdm[] = {
- F_PDM( 0, gnd, 1, NONE),
- F_PDM(27000000, pxo, 1, LOW),
+ F_PDM( 0, gnd, 1),
+ F_PDM(27000000, pxo, 1),
F_END
};
@@ -1187,6 +1203,7 @@
.c = {
.dbg_name = "pdm_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP1(LOW, 27000000),
CLK_INIT(pdm_clk.c),
},
};
@@ -1205,14 +1222,13 @@
},
};
-#define F_PRNG(f, s, v) \
+#define F_PRNG(f, s) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_prng[] = {
- F_PRNG(64000000, pll8, NOMINAL),
+ F_PRNG(64000000, pll8),
F_END
};
@@ -1230,6 +1246,7 @@
.c = {
.dbg_name = "prng_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP2(LOW, 32000000, NOMINAL, 65000000),
CLK_INIT(prng_clk.c),
},
};
@@ -1254,27 +1271,27 @@
.c = { \
.dbg_name = #i "_clk", \
.ops = &clk_ops_rcg_8x60, \
+ VDD_DIG_FMAX_MAP2(LOW, 25000000, NOMINAL, 50000000), \
CLK_INIT(i##_clk.c), \
}, \
}
-#define F_SDC(f, s, d, m, n, v) \
+#define F_SDC(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD8(16, m, 0, n), \
.ns_val = NS(23, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_sdc[] = {
- F_SDC( 0, gnd, 1, 0, 0, NONE),
- F_SDC( 144000, pxo, 3, 2, 125, LOW),
- F_SDC( 400000, pll8, 4, 1, 240, LOW),
- F_SDC(16000000, pll8, 4, 1, 6, LOW),
- F_SDC(17070000, pll8, 1, 2, 45, LOW),
- F_SDC(20210000, pll8, 1, 1, 19, LOW),
- F_SDC(24000000, pll8, 4, 1, 4, LOW),
- F_SDC(48000000, pll8, 4, 1, 2, NOMINAL),
+ F_SDC( 0, gnd, 1, 0, 0),
+ F_SDC( 144000, pxo, 3, 2, 125),
+ F_SDC( 400000, pll8, 4, 1, 240),
+ F_SDC(16000000, pll8, 4, 1, 6),
+ F_SDC(17070000, pll8, 1, 2, 45),
+ F_SDC(20210000, pll8, 1, 1, 19),
+ F_SDC(24000000, pll8, 4, 1, 4),
+ F_SDC(48000000, pll8, 4, 1, 2),
F_END
};
@@ -1284,18 +1301,17 @@
static CLK_SDC(sdc4, 4, CLK_HALT_DFAB_STATE_REG, 3);
static CLK_SDC(sdc5, 5, CLK_HALT_DFAB_STATE_REG, 2);
-#define F_TSIF_REF(f, s, d, m, n, v) \
+#define F_TSIF_REF(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD16(m, n), \
.ns_val = NS(31, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_tsif_ref[] = {
- F_TSIF_REF( 0, gnd, 1, 0, 0, NONE),
- F_TSIF_REF(105000, pxo, 1, 1, 256, LOW),
+ F_TSIF_REF( 0, gnd, 1, 0, 0),
+ F_TSIF_REF(105000, pxo, 1, 1, 256),
F_END
};
@@ -1320,16 +1336,15 @@
},
};
-#define F_TSSC(f, s, v) \
+#define F_TSSC(f, s) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_SRC_SEL(1, 0, s##_to_xo_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_tssc[] = {
- F_TSSC( 0, gnd, NONE),
- F_TSSC(27000000, pxo, LOW),
+ F_TSSC( 0, gnd),
+ F_TSSC(27000000, pxo),
F_END
};
@@ -1348,22 +1363,22 @@
.c = {
.dbg_name = "tssc_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP1(LOW, 27000000),
CLK_INIT(tssc_clk.c),
},
};
-#define F_USB(f, s, d, m, n, v) \
+#define F_USB(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD8(16, m, 0, n), \
.ns_val = NS(23, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_usb[] = {
- F_USB( 0, gnd, 1, 0, 0, NONE),
- F_USB(60000000, pll8, 1, 5, 32, NOMINAL),
+ F_USB( 0, gnd, 1, 0, 0),
+ F_USB(60000000, pll8, 1, 5, 32),
F_END
};
@@ -1386,6 +1401,7 @@
.c = {
.dbg_name = "usb_hs1_xcvr_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 60000000),
CLK_INIT(usb_hs1_xcvr_clk.c),
},
};
@@ -1418,6 +1434,7 @@
.c = { \
.dbg_name = #i "_clk", \
.ops = &clk_ops_rcg_8x60, \
+ VDD_DIG_FMAX_MAP1(NOMINAL, 60000000), \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -2014,7 +2031,7 @@
},
};
-#define F_CAM(f, s, d, m, n, v) \
+#define F_CAM(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -2022,21 +2039,20 @@
.ns_val = NS_MM(31, 24, n, m, 15, 14, d, 2, 0, s##_to_mm_mux), \
.ctl_val = CC(6, n), \
.mnd_en_mask = BIT(5) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_cam[] = {
- F_CAM( 0, gnd, 1, 0, 0, NONE),
- F_CAM( 6000000, pll8, 4, 1, 16, LOW),
- F_CAM( 8000000, pll8, 4, 1, 12, LOW),
- F_CAM( 12000000, pll8, 4, 1, 8, LOW),
- F_CAM( 16000000, pll8, 4, 1, 6, LOW),
- F_CAM( 19200000, pll8, 4, 1, 5, LOW),
- F_CAM( 24000000, pll8, 4, 1, 4, LOW),
- F_CAM( 32000000, pll8, 4, 1, 3, LOW),
- F_CAM( 48000000, pll8, 4, 1, 2, LOW),
- F_CAM( 64000000, pll8, 3, 1, 2, LOW),
- F_CAM( 96000000, pll8, 4, 0, 0, NOMINAL),
- F_CAM(128000000, pll8, 3, 0, 0, NOMINAL),
+ F_CAM( 0, gnd, 1, 0, 0),
+ F_CAM( 6000000, pll8, 4, 1, 16),
+ F_CAM( 8000000, pll8, 4, 1, 12),
+ F_CAM( 12000000, pll8, 4, 1, 8),
+ F_CAM( 16000000, pll8, 4, 1, 6),
+ F_CAM( 19200000, pll8, 4, 1, 5),
+ F_CAM( 24000000, pll8, 4, 1, 4),
+ F_CAM( 32000000, pll8, 4, 1, 3),
+ F_CAM( 48000000, pll8, 4, 1, 2),
+ F_CAM( 64000000, pll8, 3, 1, 2),
+ F_CAM( 96000000, pll8, 4, 0, 0),
+ F_CAM(128000000, pll8, 3, 0, 0),
F_END
};
@@ -2057,21 +2073,21 @@
.c = {
.dbg_name = "cam_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP2(LOW, 64000000, NOMINAL, 128000000),
CLK_INIT(cam_clk.c),
},
};
-#define F_CSI(f, s, d, v) \
+#define F_CSI(f, s, d) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_DIVSRC(15, 12, d, 2, 0, s##_to_mm_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_csi[] = {
- F_CSI( 0, gnd, 1, NONE),
- F_CSI(192000000, pll8, 2, LOW),
- F_CSI(384000000, pll8, 1, NOMINAL),
+ F_CSI( 0, gnd, 1),
+ F_CSI(192000000, pll8, 2),
+ F_CSI(384000000, pll8, 1),
F_END
};
@@ -2089,6 +2105,7 @@
.c = {
.dbg_name = "csi_src_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP2(LOW, 192000000, NOMINAL, 384000000),
CLK_INIT(csi_src_clk.c),
},
};
@@ -2178,7 +2195,7 @@
},
};
-#define F_GFX2D(f, s, m, n, v) \
+#define F_GFX2D(f, s, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -2186,22 +2203,21 @@
.ns_val = NS_MND_BANKED4(20, 16, n, m, 3, 0, s##_to_mm_mux), \
.ctl_val = CC_BANKED(9, 6, n), \
.mnd_en_mask = (BIT(8) | BIT(5)) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_gfx2d[] = {
- F_GFX2D( 0, gnd, 0, 0, NONE),
- F_GFX2D( 27000000, pxo, 0, 0, LOW),
- F_GFX2D( 48000000, pll8, 1, 8, LOW),
- F_GFX2D( 54857000, pll8, 1, 7, LOW),
- F_GFX2D( 64000000, pll8, 1, 6, LOW),
- F_GFX2D( 76800000, pll8, 1, 5, LOW),
- F_GFX2D( 96000000, pll8, 1, 4, LOW),
- F_GFX2D(128000000, pll8, 1, 3, NOMINAL),
- F_GFX2D(145455000, pll2, 2, 11, NOMINAL),
- F_GFX2D(160000000, pll2, 1, 5, NOMINAL),
- F_GFX2D(177778000, pll2, 2, 9, NOMINAL),
- F_GFX2D(200000000, pll2, 1, 4, NOMINAL),
- F_GFX2D(228571000, pll2, 2, 7, HIGH),
+ F_GFX2D( 0, gnd, 0, 0),
+ F_GFX2D( 27000000, pxo, 0, 0),
+ F_GFX2D( 48000000, pll8, 1, 8),
+ F_GFX2D( 54857000, pll8, 1, 7),
+ F_GFX2D( 64000000, pll8, 1, 6),
+ F_GFX2D( 76800000, pll8, 1, 5),
+ F_GFX2D( 96000000, pll8, 1, 4),
+ F_GFX2D(128000000, pll8, 1, 3),
+ F_GFX2D(145455000, pll2, 2, 11),
+ F_GFX2D(160000000, pll2, 1, 5),
+ F_GFX2D(177778000, pll2, 2, 9),
+ F_GFX2D(200000000, pll2, 1, 4),
+ F_GFX2D(228571000, pll2, 2, 7),
F_END
};
@@ -2241,6 +2257,8 @@
.c = {
.dbg_name = "gfx2d0_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP3(LOW, 100000000, NOMINAL, 200000000,
+ HIGH, 228571000),
CLK_INIT(gfx2d0_clk.c),
},
};
@@ -2281,11 +2299,13 @@
.c = {
.dbg_name = "gfx2d1_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP3(LOW, 100000000, NOMINAL, 200000000,
+ HIGH, 228571000),
CLK_INIT(gfx2d1_clk.c),
},
};
-#define F_GFX3D(f, s, m, n, v) \
+#define F_GFX3D(f, s, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -2293,24 +2313,23 @@
.ns_val = NS_MND_BANKED4(18, 14, n, m, 3, 0, s##_to_mm_mux), \
.ctl_val = CC_BANKED(9, 6, n), \
.mnd_en_mask = (BIT(8) | BIT(5)) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_gfx3d[] = {
- F_GFX3D( 0, gnd, 0, 0, NONE),
- F_GFX3D( 27000000, pxo, 0, 0, LOW),
- F_GFX3D( 48000000, pll8, 1, 8, LOW),
- F_GFX3D( 54857000, pll8, 1, 7, LOW),
- F_GFX3D( 64000000, pll8, 1, 6, LOW),
- F_GFX3D( 76800000, pll8, 1, 5, LOW),
- F_GFX3D( 96000000, pll8, 1, 4, LOW),
- F_GFX3D(128000000, pll8, 1, 3, NOMINAL),
- F_GFX3D(145455000, pll2, 2, 11, NOMINAL),
- F_GFX3D(160000000, pll2, 1, 5, NOMINAL),
- F_GFX3D(177778000, pll2, 2, 9, NOMINAL),
- F_GFX3D(200000000, pll2, 1, 4, NOMINAL),
- F_GFX3D(228571000, pll2, 2, 7, HIGH),
- F_GFX3D(266667000, pll2, 1, 3, HIGH),
- F_GFX3D(320000000, pll2, 2, 5, HIGH),
+ F_GFX3D( 0, gnd, 0, 0),
+ F_GFX3D( 27000000, pxo, 0, 0),
+ F_GFX3D( 48000000, pll8, 1, 8),
+ F_GFX3D( 54857000, pll8, 1, 7),
+ F_GFX3D( 64000000, pll8, 1, 6),
+ F_GFX3D( 76800000, pll8, 1, 5),
+ F_GFX3D( 96000000, pll8, 1, 4),
+ F_GFX3D(128000000, pll8, 1, 3),
+ F_GFX3D(145455000, pll2, 2, 11),
+ F_GFX3D(160000000, pll2, 1, 5),
+ F_GFX3D(177778000, pll2, 2, 9),
+ F_GFX3D(200000000, pll2, 1, 4),
+ F_GFX3D(228571000, pll2, 2, 7),
+ F_GFX3D(266667000, pll2, 1, 3),
+ F_GFX3D(320000000, pll2, 2, 5),
F_END
};
@@ -2350,12 +2369,14 @@
.c = {
.dbg_name = "gfx3d_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP3(LOW, 96000000, NOMINAL, 200000000,
+ HIGH, 320000000),
CLK_INIT(gfx3d_clk.c),
.depends = &gmem_axi_clk.c,
},
};
-#define F_IJPEG(f, s, d, m, n, v) \
+#define F_IJPEG(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -2363,19 +2384,18 @@
.ns_val = NS_MM(23, 16, n, m, 15, 12, d, 2, 0, s##_to_mm_mux), \
.ctl_val = CC(6, n), \
.mnd_en_mask = BIT(5) * !!n, \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_ijpeg[] = {
- F_IJPEG( 0, gnd, 1, 0, 0, NONE),
- F_IJPEG( 27000000, pxo, 1, 0, 0, LOW),
- F_IJPEG( 36570000, pll8, 1, 2, 21, LOW),
- F_IJPEG( 54860000, pll8, 7, 0, 0, LOW),
- F_IJPEG( 96000000, pll8, 4, 0, 0, LOW),
- F_IJPEG(109710000, pll8, 1, 2, 7, LOW),
- F_IJPEG(128000000, pll8, 3, 0, 0, NOMINAL),
- F_IJPEG(153600000, pll8, 1, 2, 5, NOMINAL),
- F_IJPEG(200000000, pll2, 4, 0, 0, NOMINAL),
- F_IJPEG(228571000, pll2, 1, 2, 7, NOMINAL),
+ F_IJPEG( 0, gnd, 1, 0, 0),
+ F_IJPEG( 27000000, pxo, 1, 0, 0),
+ F_IJPEG( 36570000, pll8, 1, 2, 21),
+ F_IJPEG( 54860000, pll8, 7, 0, 0),
+ F_IJPEG( 96000000, pll8, 4, 0, 0),
+ F_IJPEG(109710000, pll8, 1, 2, 7),
+ F_IJPEG(128000000, pll8, 3, 0, 0),
+ F_IJPEG(153600000, pll8, 1, 2, 5),
+ F_IJPEG(200000000, pll2, 4, 0, 0),
+ F_IJPEG(228571000, pll2, 1, 2, 7),
F_END
};
@@ -2399,25 +2419,25 @@
.c = {
.dbg_name = "ijpeg_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP2(LOW, 110000000, NOMINAL, 228571000),
CLK_INIT(ijpeg_clk.c),
.depends = &ijpeg_axi_clk.c,
},
};
-#define F_JPEGD(f, s, d, v) \
+#define F_JPEGD(f, s, d) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_DIVSRC(15, 12, d, 2, 0, s##_to_mm_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_jpegd[] = {
- F_JPEGD( 0, gnd, 1, NONE),
- F_JPEGD( 64000000, pll8, 6, LOW),
- F_JPEGD( 76800000, pll8, 5, LOW),
- F_JPEGD( 96000000, pll8, 4, LOW),
- F_JPEGD(160000000, pll2, 5, NOMINAL),
- F_JPEGD(200000000, pll2, 4, NOMINAL),
+ F_JPEGD( 0, gnd, 1),
+ F_JPEGD( 64000000, pll8, 6),
+ F_JPEGD( 76800000, pll8, 5),
+ F_JPEGD( 96000000, pll8, 4),
+ F_JPEGD(160000000, pll2, 5),
+ F_JPEGD(200000000, pll2, 4),
F_END
};
@@ -2439,12 +2459,13 @@
.c = {
.dbg_name = "jpegd_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP2(LOW, 96000000, NOMINAL, 200000000),
CLK_INIT(jpegd_clk.c),
.depends = &jpegd_axi_clk.c,
},
};
-#define F_MDP(f, s, m, n, v) \
+#define F_MDP(f, s, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -2452,24 +2473,23 @@
.ns_val = NS_MND_BANKED8(22, 14, n, m, 3, 0, s##_to_mm_mux), \
.ctl_val = CC_BANKED(9, 6, n), \
.mnd_en_mask = (BIT(8) | BIT(5)) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_mdp[] = {
- F_MDP( 0, gnd, 0, 0, NONE),
- F_MDP( 9600000, pll8, 1, 40, LOW),
- F_MDP( 13710000, pll8, 1, 28, LOW),
- F_MDP( 27000000, pxo, 0, 0, LOW),
- F_MDP( 29540000, pll8, 1, 13, LOW),
- F_MDP( 34910000, pll8, 1, 11, LOW),
- F_MDP( 38400000, pll8, 1, 10, LOW),
- F_MDP( 59080000, pll8, 2, 13, LOW),
- F_MDP( 76800000, pll8, 1, 5, LOW),
- F_MDP( 85330000, pll8, 2, 9, LOW),
- F_MDP( 96000000, pll8, 1, 4, NOMINAL),
- F_MDP(128000000, pll8, 1, 3, NOMINAL),
- F_MDP(160000000, pll2, 1, 5, NOMINAL),
- F_MDP(177780000, pll2, 2, 9, NOMINAL),
- F_MDP(200000000, pll2, 1, 4, NOMINAL),
+ F_MDP( 0, gnd, 0, 0),
+ F_MDP( 9600000, pll8, 1, 40),
+ F_MDP( 13710000, pll8, 1, 28),
+ F_MDP( 27000000, pxo, 0, 0),
+ F_MDP( 29540000, pll8, 1, 13),
+ F_MDP( 34910000, pll8, 1, 11),
+ F_MDP( 38400000, pll8, 1, 10),
+ F_MDP( 59080000, pll8, 2, 13),
+ F_MDP( 76800000, pll8, 1, 5),
+ F_MDP( 85330000, pll8, 2, 9),
+ F_MDP( 96000000, pll8, 1, 4),
+ F_MDP(128000000, pll8, 1, 3),
+ F_MDP(160000000, pll2, 1, 5),
+ F_MDP(177780000, pll2, 2, 9),
+ F_MDP(200000000, pll2, 1, 4),
F_END
};
@@ -2509,20 +2529,21 @@
.c = {
.dbg_name = "mdp_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP3(LOW, 85330000, NOMINAL, 200000000,
+ HIGH, 228571000),
CLK_INIT(mdp_clk.c),
.depends = &mdp_axi_clk.c,
},
};
-#define F_MDP_VSYNC(f, s, v) \
+#define F_MDP_VSYNC(f, s) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_SRC_SEL(13, 13, s##_to_bb_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_mdp_vsync[] = {
- F_MDP_VSYNC(27000000, pxo, LOW),
+ F_MDP_VSYNC(27000000, pxo),
F_END
};
@@ -2543,11 +2564,12 @@
.c = {
.dbg_name = "mdp_vsync_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP1(LOW, 27000000),
CLK_INIT(mdp_vsync_clk.c),
},
};
-#define F_PIXEL_MDP(f, s, d, m, n, v) \
+#define F_PIXEL_MDP(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -2555,21 +2577,20 @@
.ns_val = NS_MM(31, 16, n, m, 15, 14, d, 2, 0, s##_to_mm_mux), \
.ctl_val = CC(6, n), \
.mnd_en_mask = BIT(5) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_pixel_mdp[] = {
- F_PIXEL_MDP( 0, gnd, 1, 0, 0, NONE),
- F_PIXEL_MDP( 25600000, pll8, 3, 1, 5, LOW),
- F_PIXEL_MDP( 42667000, pll8, 1, 1, 9, LOW),
- F_PIXEL_MDP( 43192000, pll8, 1, 64, 569, LOW),
- F_PIXEL_MDP( 48000000, pll8, 4, 1, 2, LOW),
- F_PIXEL_MDP( 53990000, pll8, 2, 169, 601, LOW),
- F_PIXEL_MDP( 64000000, pll8, 2, 1, 3, LOW),
- F_PIXEL_MDP( 69300000, pll8, 1, 231, 1280, LOW),
- F_PIXEL_MDP( 76800000, pll8, 1, 1, 5, LOW),
- F_PIXEL_MDP( 85333000, pll8, 1, 2, 9, LOW),
- F_PIXEL_MDP(106500000, pll8, 1, 71, 256, NOMINAL),
- F_PIXEL_MDP(109714000, pll8, 1, 2, 7, NOMINAL),
+ F_PIXEL_MDP( 0, gnd, 1, 0, 0),
+ F_PIXEL_MDP( 25600000, pll8, 3, 1, 5),
+ F_PIXEL_MDP( 42667000, pll8, 1, 1, 9),
+ F_PIXEL_MDP( 43192000, pll8, 1, 64, 569),
+ F_PIXEL_MDP( 48000000, pll8, 4, 1, 2),
+ F_PIXEL_MDP( 53990000, pll8, 2, 169, 601),
+ F_PIXEL_MDP( 64000000, pll8, 2, 1, 3),
+ F_PIXEL_MDP( 69300000, pll8, 1, 231, 1280),
+ F_PIXEL_MDP( 76800000, pll8, 1, 1, 5),
+ F_PIXEL_MDP( 85333000, pll8, 1, 2, 9),
+ F_PIXEL_MDP(106500000, pll8, 1, 71, 256),
+ F_PIXEL_MDP(109714000, pll8, 1, 2, 7),
F_END
};
@@ -2593,6 +2614,7 @@
.c = {
.dbg_name = "pixel_mdp_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP2(LOW, 85333000, NOMINAL, 170000000),
CLK_INIT(pixel_mdp_clk.c),
},
};
@@ -2612,29 +2634,28 @@
},
};
-#define F_ROT(f, s, d, v) \
+#define F_ROT(f, s, d) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_DIVSRC_BANKED(29, 26, 25, 22, d, \
21, 19, 18, 16, s##_to_mm_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_rot[] = {
- F_ROT( 0, gnd, 1, NONE),
- F_ROT( 27000000, pxo, 1, LOW),
- F_ROT( 29540000, pll8, 13, LOW),
- F_ROT( 32000000, pll8, 12, LOW),
- F_ROT( 38400000, pll8, 10, LOW),
- F_ROT( 48000000, pll8, 8, LOW),
- F_ROT( 54860000, pll8, 7, LOW),
- F_ROT( 64000000, pll8, 6, LOW),
- F_ROT( 76800000, pll8, 5, LOW),
- F_ROT( 96000000, pll8, 4, NOMINAL),
- F_ROT(100000000, pll2, 8, NOMINAL),
- F_ROT(114290000, pll2, 7, NOMINAL),
- F_ROT(133330000, pll2, 6, NOMINAL),
- F_ROT(160000000, pll2, 5, NOMINAL),
+ F_ROT( 0, gnd, 1),
+ F_ROT( 27000000, pxo, 1),
+ F_ROT( 29540000, pll8, 13),
+ F_ROT( 32000000, pll8, 12),
+ F_ROT( 38400000, pll8, 10),
+ F_ROT( 48000000, pll8, 8),
+ F_ROT( 54860000, pll8, 7),
+ F_ROT( 64000000, pll8, 6),
+ F_ROT( 76800000, pll8, 5),
+ F_ROT( 96000000, pll8, 4),
+ F_ROT(100000000, pll2, 8),
+ F_ROT(114290000, pll2, 7),
+ F_ROT(133330000, pll2, 6),
+ F_ROT(160000000, pll2, 5),
F_END
};
@@ -2666,12 +2687,13 @@
.c = {
.dbg_name = "rot_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP2(LOW, 80000000, NOMINAL, 160000000),
CLK_INIT(rot_clk.c),
.depends = &rot_axi_clk.c,
},
};
-#define F_TV(f, s, p_r, d, m, n, v) \
+#define F_TV(f, s, p_r, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -2679,7 +2701,6 @@
.ns_val = NS_MM(23, 16, n, m, 15, 14, d, 2, 0, s##_to_mm_mux), \
.ctl_val = CC(6, n), \
.mnd_en_mask = BIT(5) * !!(n), \
- .sys_vdd = v, \
.extra_freq_data = p_r, \
}
/* Switching TV freqs requires PLL reconfiguration. */
@@ -2691,12 +2712,12 @@
[4] = PLL_RATE(44, 0, 0, 2, 4, 0x6248F), /* 297000000 Hz */
};
static struct clk_freq_tbl clk_tbl_tv[] = {
- F_TV( 0, gnd, &mm_pll2_rate[0], 1, 0, 0, NONE),
- F_TV( 25200000, pll3, &mm_pll2_rate[0], 2, 0, 0, LOW),
- F_TV( 27000000, pll3, &mm_pll2_rate[1], 2, 0, 0, LOW),
- F_TV( 27030000, pll3, &mm_pll2_rate[2], 4, 0, 0, LOW),
- F_TV( 74250000, pll3, &mm_pll2_rate[3], 2, 0, 0, NOMINAL),
- F_TV(148500000, pll3, &mm_pll2_rate[4], 2, 0, 0, NOMINAL),
+ F_TV( 0, gnd, &mm_pll2_rate[0], 1, 0, 0),
+ F_TV( 25200000, pll3, &mm_pll2_rate[0], 2, 0, 0),
+ F_TV( 27000000, pll3, &mm_pll2_rate[1], 2, 0, 0),
+ F_TV( 27030000, pll3, &mm_pll2_rate[2], 4, 0, 0),
+ F_TV( 74250000, pll3, &mm_pll2_rate[3], 2, 0, 0),
+ F_TV(148500000, pll3, &mm_pll2_rate[4], 2, 0, 0),
F_END
};
@@ -2716,6 +2737,7 @@
.c = {
.dbg_name = "tv_src_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP2(LOW, 27030000, NOMINAL, 149000000),
CLK_INIT(tv_src_clk.c),
},
};
@@ -2802,7 +2824,7 @@
},
};
-#define F_VCODEC(f, s, m, n, v) \
+#define F_VCODEC(f, s, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -2810,18 +2832,17 @@
.ns_val = NS_MM(18, 11, n, m, 0, 0, 1, 2, 0, s##_to_mm_mux), \
.ctl_val = CC(6, n), \
.mnd_en_mask = BIT(5) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_vcodec[] = {
- F_VCODEC( 0, gnd, 0, 0, NONE),
- F_VCODEC( 27000000, pxo, 0, 0, LOW),
- F_VCODEC( 32000000, pll8, 1, 12, LOW),
- F_VCODEC( 48000000, pll8, 1, 8, LOW),
- F_VCODEC( 54860000, pll8, 1, 7, LOW),
- F_VCODEC( 96000000, pll8, 1, 4, LOW),
- F_VCODEC(133330000, pll2, 1, 6, NOMINAL),
- F_VCODEC(200000000, pll2, 1, 4, NOMINAL),
- F_VCODEC(228570000, pll2, 2, 7, HIGH),
+ F_VCODEC( 0, gnd, 0, 0),
+ F_VCODEC( 27000000, pxo, 0, 0),
+ F_VCODEC( 32000000, pll8, 1, 12),
+ F_VCODEC( 48000000, pll8, 1, 8),
+ F_VCODEC( 54860000, pll8, 1, 7),
+ F_VCODEC( 96000000, pll8, 1, 4),
+ F_VCODEC(133330000, pll2, 1, 6),
+ F_VCODEC(200000000, pll2, 1, 4),
+ F_VCODEC(228570000, pll2, 2, 7),
F_END
};
@@ -2845,29 +2866,30 @@
.c = {
.dbg_name = "vcodec_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP3(LOW, 100000000, NOMINAL, 200000000,
+ HIGH, 228571000),
CLK_INIT(vcodec_clk.c),
.depends = &vcodec_axi_clk.c,
},
};
-#define F_VPE(f, s, d, v) \
+#define F_VPE(f, s, d) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_DIVSRC(15, 12, d, 2, 0, s##_to_mm_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_vpe[] = {
- F_VPE( 0, gnd, 1, NONE),
- F_VPE( 27000000, pxo, 1, LOW),
- F_VPE( 34909000, pll8, 11, LOW),
- F_VPE( 38400000, pll8, 10, LOW),
- F_VPE( 64000000, pll8, 6, LOW),
- F_VPE( 76800000, pll8, 5, LOW),
- F_VPE( 96000000, pll8, 4, NOMINAL),
- F_VPE(100000000, pll2, 8, NOMINAL),
- F_VPE(160000000, pll2, 5, NOMINAL),
- F_VPE(200000000, pll2, 4, HIGH),
+ F_VPE( 0, gnd, 1),
+ F_VPE( 27000000, pxo, 1),
+ F_VPE( 34909000, pll8, 11),
+ F_VPE( 38400000, pll8, 10),
+ F_VPE( 64000000, pll8, 6),
+ F_VPE( 76800000, pll8, 5),
+ F_VPE( 96000000, pll8, 4),
+ F_VPE(100000000, pll2, 8),
+ F_VPE(160000000, pll2, 5),
+ F_VPE(200000000, pll2, 4),
F_END
};
@@ -2889,12 +2911,14 @@
.c = {
.dbg_name = "vpe_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP3(LOW, 76800000, NOMINAL, 160000000,
+ HIGH, 200000000),
CLK_INIT(vpe_clk.c),
.depends = &vpe_axi_clk.c,
},
};
-#define F_VFE(f, s, d, m, n, v) \
+#define F_VFE(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
@@ -2902,26 +2926,25 @@
.ns_val = NS_MM(23, 16, n, m, 11, 10, d, 2, 0, s##_to_mm_mux), \
.ctl_val = CC(6, n), \
.mnd_en_mask = BIT(5) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_vfe[] = {
- F_VFE( 0, gnd, 1, 0, 0, NONE),
- F_VFE( 13960000, pll8, 1, 2, 55, LOW),
- F_VFE( 27000000, pxo, 1, 0, 0, LOW),
- F_VFE( 36570000, pll8, 1, 2, 21, LOW),
- F_VFE( 38400000, pll8, 2, 1, 5, LOW),
- F_VFE( 45180000, pll8, 1, 2, 17, LOW),
- F_VFE( 48000000, pll8, 2, 1, 4, LOW),
- F_VFE( 54860000, pll8, 1, 1, 7, LOW),
- F_VFE( 64000000, pll8, 2, 1, 3, LOW),
- F_VFE( 76800000, pll8, 1, 1, 5, LOW),
- F_VFE( 96000000, pll8, 2, 1, 2, LOW),
- F_VFE(109710000, pll8, 1, 2, 7, LOW),
- F_VFE(128000000, pll8, 1, 1, 3, NOMINAL),
- F_VFE(153600000, pll8, 1, 2, 5, NOMINAL),
- F_VFE(200000000, pll2, 2, 1, 2, NOMINAL),
- F_VFE(228570000, pll2, 1, 2, 7, NOMINAL),
- F_VFE(266667000, pll2, 1, 1, 3, HIGH),
+ F_VFE( 0, gnd, 1, 0, 0),
+ F_VFE( 13960000, pll8, 1, 2, 55),
+ F_VFE( 27000000, pxo, 1, 0, 0),
+ F_VFE( 36570000, pll8, 1, 2, 21),
+ F_VFE( 38400000, pll8, 2, 1, 5),
+ F_VFE( 45180000, pll8, 1, 2, 17),
+ F_VFE( 48000000, pll8, 2, 1, 4),
+ F_VFE( 54860000, pll8, 1, 1, 7),
+ F_VFE( 64000000, pll8, 2, 1, 3),
+ F_VFE( 76800000, pll8, 1, 1, 5),
+ F_VFE( 96000000, pll8, 2, 1, 2),
+ F_VFE(109710000, pll8, 1, 2, 7),
+ F_VFE(128000000, pll8, 1, 1, 3),
+ F_VFE(153600000, pll8, 1, 2, 5),
+ F_VFE(200000000, pll2, 2, 1, 2),
+ F_VFE(228570000, pll2, 1, 2, 7),
+ F_VFE(266667000, pll2, 1, 1, 3),
F_END
};
@@ -2945,6 +2968,8 @@
.c = {
.dbg_name = "vfe_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP3(LOW, 110000000, NOMINAL, 228570000,
+ HIGH, 266667000),
CLK_INIT(vfe_clk.c),
.depends = &vfe_axi_clk.c,
},
@@ -2987,27 +3012,26 @@
/*
* Low Power Audio Clocks
*/
-#define F_AIF_OSR(f, s, d, m, n, v) \
+#define F_AIF_OSR(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD8(8, m, 0, n), \
.ns_val = NS(31, 24, n, m, 5, 4, 3, d, 2, 0, s##_to_lpa_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_aif_osr[] = {
- F_AIF_OSR( 0, gnd, 1, 0, 0, NONE),
- F_AIF_OSR( 768000, pll4, 4, 1, 176, LOW),
- F_AIF_OSR( 1024000, pll4, 4, 1, 132, LOW),
- F_AIF_OSR( 1536000, pll4, 4, 1, 88, LOW),
- F_AIF_OSR( 2048000, pll4, 4, 1, 66, LOW),
- F_AIF_OSR( 3072000, pll4, 4, 1, 44, LOW),
- F_AIF_OSR( 4096000, pll4, 4, 1, 33, LOW),
- F_AIF_OSR( 6144000, pll4, 4, 1, 22, LOW),
- F_AIF_OSR( 8192000, pll4, 2, 1, 33, LOW),
- F_AIF_OSR(12288000, pll4, 4, 1, 11, LOW),
- F_AIF_OSR(24576000, pll4, 2, 1, 11, LOW),
+ F_AIF_OSR( 0, gnd, 1, 0, 0),
+ F_AIF_OSR( 768000, pll4, 4, 1, 176),
+ F_AIF_OSR( 1024000, pll4, 4, 1, 132),
+ F_AIF_OSR( 1536000, pll4, 4, 1, 88),
+ F_AIF_OSR( 2048000, pll4, 4, 1, 66),
+ F_AIF_OSR( 3072000, pll4, 4, 1, 44),
+ F_AIF_OSR( 4096000, pll4, 4, 1, 33),
+ F_AIF_OSR( 6144000, pll4, 4, 1, 22),
+ F_AIF_OSR( 8192000, pll4, 2, 1, 33),
+ F_AIF_OSR(12288000, pll4, 4, 1, 11),
+ F_AIF_OSR(24576000, pll4, 2, 1, 11),
F_END
};
@@ -3032,6 +3056,7 @@
.c = { \
.dbg_name = #i "_clk", \
.ops = &clk_ops_rcg_8x60, \
+ VDD_DIG_FMAX_MAP1(LOW, 24576000), \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -3094,28 +3119,27 @@
static CLK_AIF_BIT(spare_i2s_spkr_bit, LCC_SPARE_I2S_SPKR_NS_REG,
LCC_SPARE_I2S_SPKR_STATUS_REG);
-#define F_PCM(f, s, d, m, n, v) \
+#define F_PCM(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD16(m, n), \
.ns_val = NS(31, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_lpa_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_pcm[] = {
- F_PCM( 0, gnd, 1, 0, 0, NONE),
- F_PCM( 512000, pll4, 4, 1, 264, LOW),
- F_PCM( 768000, pll4, 4, 1, 176, LOW),
- F_PCM( 1024000, pll4, 4, 1, 132, LOW),
- F_PCM( 1536000, pll4, 4, 1, 88, LOW),
- F_PCM( 2048000, pll4, 4, 1, 66, LOW),
- F_PCM( 3072000, pll4, 4, 1, 44, LOW),
- F_PCM( 4096000, pll4, 4, 1, 33, LOW),
- F_PCM( 6144000, pll4, 4, 1, 22, LOW),
- F_PCM( 8192000, pll4, 2, 1, 33, LOW),
- F_PCM(12288000, pll4, 4, 1, 11, LOW),
- F_PCM(24580000, pll4, 2, 1, 11, LOW),
+ F_PCM( 0, gnd, 1, 0, 0),
+ F_PCM( 512000, pll4, 4, 1, 264),
+ F_PCM( 768000, pll4, 4, 1, 176),
+ F_PCM( 1024000, pll4, 4, 1, 132),
+ F_PCM( 1536000, pll4, 4, 1, 88),
+ F_PCM( 2048000, pll4, 4, 1, 66),
+ F_PCM( 3072000, pll4, 4, 1, 44),
+ F_PCM( 4096000, pll4, 4, 1, 33),
+ F_PCM( 6144000, pll4, 4, 1, 22),
+ F_PCM( 8192000, pll4, 2, 1, 33),
+ F_PCM(12288000, pll4, 4, 1, 11),
+ F_PCM(24580000, pll4, 2, 1, 11),
F_END
};
@@ -3139,6 +3163,7 @@
.c = {
.dbg_name = "pcm_clk",
.ops = &clk_ops_rcg_8x60,
+ VDD_DIG_FMAX_MAP1(LOW, 24580000),
CLK_INIT(pcm_clk.c),
},
};
@@ -3567,7 +3592,7 @@
CLK_LOOKUP("core_clk", gsbi11_qup_clk.c, NULL),
CLK_LOOKUP("gsbi_qup_clk", gsbi12_qup_clk.c, "msm_dsps"),
CLK_LOOKUP("core_clk", gsbi12_qup_clk.c, "qup_i2c.5"),
- CLK_LOOKUP("pdm_clk", pdm_clk.c, NULL),
+ CLK_LOOKUP("core_clk", pdm_clk.c, NULL),
CLK_LOOKUP("mem_clk", pmem_clk.c, "msm_dsps"),
CLK_LOOKUP("core_clk", prng_clk.c, "msm_rng.0"),
CLK_LOOKUP("core_clk", sdc1_clk.c, "msm_sdcc.1"),
@@ -3577,7 +3602,7 @@
CLK_LOOKUP("core_clk", sdc5_clk.c, "msm_sdcc.5"),
CLK_LOOKUP("ref_clk", tsif_ref_clk.c, "msm_tsif.0"),
CLK_LOOKUP("ref_clk", tsif_ref_clk.c, "msm_tsif.1"),
- CLK_LOOKUP("tssc_clk", tssc_clk.c, NULL),
+ CLK_LOOKUP("core_clk", tssc_clk.c, NULL),
CLK_LOOKUP("usb_hs_clk", usb_hs1_xcvr_clk.c, NULL),
CLK_LOOKUP("usb_phy_clk", usb_phy0_clk.c, NULL),
CLK_LOOKUP("usb_fs_clk", usb_fs1_xcvr_clk.c, NULL),
@@ -3623,11 +3648,11 @@
CLK_LOOKUP("iface_clk", adm1_p_clk.c, "msm_dmov.1"),
CLK_LOOKUP("modem_ahb1_pclk", modem_ahb1_p_clk.c, NULL),
CLK_LOOKUP("modem_ahb2_pclk", modem_ahb2_p_clk.c, NULL),
- CLK_LOOKUP("pmic_arb_pclk", pmic_arb0_p_clk.c, NULL),
- CLK_LOOKUP("pmic_arb_pclk", pmic_arb1_p_clk.c, NULL),
- CLK_LOOKUP("pmic_ssbi2", pmic_ssbi2_clk.c, NULL),
- CLK_LOOKUP("rpm_msg_ram_pclk", rpm_msg_ram_p_clk.c, NULL),
- CLK_LOOKUP("amp_clk", amp_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", pmic_arb0_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", pmic_arb1_p_clk.c, NULL),
+ CLK_LOOKUP("core_clk", pmic_ssbi2_clk.c, NULL),
+ CLK_LOOKUP("mem_clk", rpm_msg_ram_p_clk.c, NULL),
+ CLK_LOOKUP("core_clk", amp_clk.c, NULL),
CLK_LOOKUP("cam_clk", cam_clk.c, NULL),
CLK_LOOKUP("csi_clk", csi0_clk.c, NULL),
CLK_LOOKUP("csi_clk", csi1_clk.c, "msm_camera_ov7692.0"),
@@ -3643,13 +3668,13 @@
CLK_LOOKUP("core_clk", gfx3d_clk.c, "footswitch-8x60.2"),
CLK_LOOKUP("ijpeg_clk", ijpeg_clk.c, NULL),
CLK_LOOKUP("core_clk", ijpeg_clk.c, "footswitch-8x60.3"),
- CLK_LOOKUP("jpegd_clk", jpegd_clk.c, NULL),
+ CLK_LOOKUP("core_clk", jpegd_clk.c, NULL),
CLK_LOOKUP("mdp_clk", mdp_clk.c, NULL),
CLK_LOOKUP("core_clk", mdp_clk.c, "footswitch-8x60.4"),
CLK_LOOKUP("mdp_vsync_clk", mdp_vsync_clk.c, NULL),
CLK_LOOKUP("pixel_lcdc_clk", pixel_lcdc_clk.c, NULL),
CLK_LOOKUP("pixel_mdp_clk", pixel_mdp_clk.c, NULL),
- CLK_LOOKUP("rot_clk", rot_clk.c, NULL),
+ CLK_LOOKUP("core_clk", rot_clk.c, "msm_rotator.0"),
CLK_LOOKUP("core_clk", rot_clk.c, "footswitch-8x60.6"),
CLK_LOOKUP("tv_enc_clk", tv_enc_clk.c, NULL),
CLK_LOOKUP("tv_dac_clk", tv_dac_clk.c, NULL),
@@ -3666,8 +3691,6 @@
CLK_LOOKUP("csi_vfe_clk", csi1_vfe_clk.c, "msm_camera_ov9726.0"),
CLK_LOOKUP("vfe_clk", vfe_clk.c, NULL),
CLK_LOOKUP("core_clk", vfe_clk.c, "footswitch-8x60.8"),
- CLK_LOOKUP("smmu_jpegd_clk", jpegd_axi_clk.c, NULL),
- CLK_LOOKUP("smmu_vfe_clk", vfe_axi_clk.c, NULL),
CLK_LOOKUP("bus_clk", vfe_axi_clk.c, "footswitch-8x60.8"),
CLK_LOOKUP("bus_clk", ijpeg_axi_clk.c, "footswitch-8x60.3"),
CLK_LOOKUP("mem_clk", imem_axi_clk.c, "kgsl-3d0.0"),
@@ -3691,12 +3714,12 @@
CLK_LOOKUP("slave_iface_clk", hdmi_s_p_clk.c, "hdmi_msm.1"),
CLK_LOOKUP("ijpeg_pclk", ijpeg_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", ijpeg_p_clk.c, "footswitch-8x60.3"),
- CLK_LOOKUP("jpegd_pclk", jpegd_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", jpegd_p_clk.c, NULL),
CLK_LOOKUP("mem_iface_clk", imem_p_clk.c, "kgsl-3d0.0"),
CLK_LOOKUP("mdp_pclk", mdp_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", mdp_p_clk.c, "footswitch-8x60.4"),
- CLK_LOOKUP("smmu_pclk", smmu_p_clk.c, NULL),
- CLK_LOOKUP("rotator_pclk", rot_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", smmu_p_clk.c, "msm_iommu"),
+ CLK_LOOKUP("iface_clk", rot_p_clk.c, "msm_rotator.0"),
CLK_LOOKUP("iface_clk", rot_p_clk.c, "footswitch-8x60.6"),
CLK_LOOKUP("tv_enc_pclk", tv_enc_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", vcodec_p_clk.c, "msm_vidc.0"),
@@ -3716,16 +3739,16 @@
CLK_LOOKUP("i2s_spkr_osr_clk", spare_i2s_spkr_osr_clk.c, NULL),
CLK_LOOKUP("i2s_spkr_bit_clk", spare_i2s_spkr_bit_clk.c, NULL),
CLK_LOOKUP("pcm_clk", pcm_clk.c, NULL),
- CLK_LOOKUP("iommu_clk", jpegd_axi_clk.c, "msm_iommu.0"),
- CLK_LOOKUP("iommu_clk", mdp_axi_clk.c, "msm_iommu.2"),
- CLK_LOOKUP("iommu_clk", mdp_axi_clk.c, "msm_iommu.3"),
- CLK_LOOKUP("iommu_clk", ijpeg_axi_clk.c, "msm_iommu.5"),
- CLK_LOOKUP("iommu_clk", vfe_axi_clk.c, "msm_iommu.6"),
- CLK_LOOKUP("iommu_clk", vcodec_axi_clk.c, "msm_iommu.7"),
- CLK_LOOKUP("iommu_clk", vcodec_axi_clk.c, "msm_iommu.8"),
- CLK_LOOKUP("iommu_clk", gfx3d_clk.c, "msm_iommu.9"),
- CLK_LOOKUP("iommu_clk", gfx2d0_clk.c, "msm_iommu.10"),
- CLK_LOOKUP("iommu_clk", gfx2d1_clk.c, "msm_iommu.11"),
+ CLK_LOOKUP("core_clk", jpegd_axi_clk.c, "msm_iommu.0"),
+ CLK_LOOKUP("core_clk", mdp_axi_clk.c, "msm_iommu.2"),
+ CLK_LOOKUP("core_clk", mdp_axi_clk.c, "msm_iommu.3"),
+ CLK_LOOKUP("core_clk", ijpeg_axi_clk.c, "msm_iommu.5"),
+ CLK_LOOKUP("core_clk", vfe_axi_clk.c, "msm_iommu.6"),
+ CLK_LOOKUP("core_clk", vcodec_axi_clk.c, "msm_iommu.7"),
+ CLK_LOOKUP("core_clk", vcodec_axi_clk.c, "msm_iommu.8"),
+ CLK_LOOKUP("core_clk", gfx3d_clk.c, "msm_iommu.9"),
+ CLK_LOOKUP("core_clk", gfx2d0_clk.c, "msm_iommu.10"),
+ CLK_LOOKUP("core_clk", gfx2d1_clk.c, "msm_iommu.11"),
CLK_LOOKUP("dfab_dsps_clk", dfab_dsps_clk.c, NULL),
CLK_LOOKUP("dfab_usb_hs_clk", dfab_usb_hs_clk.c, NULL),
@@ -3845,7 +3868,6 @@
/* Local clock driver initialization. */
static void __init msm8660_clock_init(void)
{
- soc_update_sys_vdd = msm8660_update_sys_vdd;
xo_pxo = msm_xo_get(MSM_XO_PXO, "clock-8x60");
if (IS_ERR(xo_pxo)) {
pr_err("%s: msm_xo_get(PXO) failed.\n", __func__);
@@ -3857,7 +3879,7 @@
BUG();
}
- local_vote_sys_vdd(HIGH);
+ vote_vdd_level(&vdd_dig, VDD_DIG_HIGH);
/* Initialize clock registers. */
reg_init();
@@ -3895,11 +3917,7 @@
if (WARN(rc, "mmfpb_a_clk not enabled (%d)\n", rc))
return rc;
- /* Remove temporary vote for HIGH vdd_dig. */
- rc = local_unvote_sys_vdd(HIGH);
- WARN(rc, "local_unvote_sys_vdd(HIGH) failed (%d)\n", rc);
-
- return rc;
+ return unvote_vdd_level(&vdd_dig, VDD_DIG_HIGH);
}
struct clock_init_data msm8x60_clock_init_data __initdata = {
diff --git a/arch/arm/mach-msm/clock-9615.c b/arch/arm/mach-msm/clock-9615.c
index 84121ef..dca8268 100644
--- a/arch/arm/mach-msm/clock-9615.c
+++ b/arch/arm/mach-msm/clock-9615.c
@@ -27,6 +27,7 @@
#include <mach/clk.h>
#include <mach/msm_xo.h>
#include <mach/rpm-9615.h>
+#include <mach/rpm-regulator.h>
#include "clock-local.h"
#include "clock-voter.h"
@@ -184,6 +185,36 @@
#define NS_SRC_SEL(s_msb, s_lsb, s) \
BVAL(s_msb, s_lsb, s)
+enum vdd_dig_levels {
+ VDD_DIG_NONE,
+ VDD_DIG_LOW,
+ VDD_DIG_NOMINAL,
+ VDD_DIG_HIGH
+};
+
+static int set_vdd_dig(struct clk_vdd_class *vdd_class, int level)
+{
+ /* TODO: Update these voltages when info becomes available. */
+ static const int vdd_uv[] = {
+ [VDD_DIG_NONE] = 1150000,
+ [VDD_DIG_LOW] = 1150000,
+ [VDD_DIG_NOMINAL] = 1150000,
+ [VDD_DIG_HIGH] = 1150000
+ };
+
+ return rpm_vreg_set_voltage(RPM_VREG_ID_PM8018_S1, RPM_VREG_VOTER3,
+ vdd_uv[level], vdd_uv[VDD_DIG_HIGH], 1);
+}
+
+static DEFINE_VDD_CLASS(vdd_dig, set_vdd_dig);
+
+#define VDD_DIG_FMAX_MAP1(l1, f1) \
+ .vdd_class = &vdd_dig, \
+ .fmax[VDD_DIG_##l1] = (f1)
+#define VDD_DIG_FMAX_MAP2(l1, f1, l2, f2) \
+ .vdd_class = &vdd_dig, \
+ .fmax[VDD_DIG_##l1] = (f1), \
+ .fmax[VDD_DIG_##l2] = (f2)
/*
* Clock Descriptions
@@ -282,27 +313,6 @@
},
};
-/*
- * SoC-specific functions required by clock-local driver
- */
-
-/* TODO: Update these voltages when info becomes available. */
-/* Update the sys_vdd voltage given a level. */
-static int msm9615_update_sys_vdd(enum sys_vdd_level level)
-{
- /* TODO: Implement when rpm-regulator is ready.
- static const int vdd_uv[] = {
- [NONE...LOW] = 945000,
- [NOMINAL] = 1050000,
- [HIGH] = 1150000,
- };
-
- return rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S3, RPM_VREG_VOTER3,
- vdd_uv[level], vdd_uv[HIGH], 1);
- */
- return 0;
-}
-
static int soc_clk_reset(struct clk *clk, enum clk_reset_action action)
{
return branch_reset(&to_rcg_clk(clk)->b, action);
@@ -311,7 +321,7 @@
static struct clk_ops clk_ops_rcg_9615 = {
.enable = rcg_clk_enable,
.disable = rcg_clk_disable,
- .auto_off = rcg_clk_auto_off,
+ .auto_off = rcg_clk_disable,
.set_rate = rcg_clk_set_rate,
.set_min_rate = rcg_clk_set_min_rate,
.get_rate = rcg_clk_get_rate,
@@ -326,7 +336,7 @@
static struct clk_ops clk_ops_branch = {
.enable = branch_clk_enable,
.disable = branch_clk_disable,
- .auto_off = branch_clk_auto_off,
+ .auto_off = branch_clk_disable,
.is_enabled = branch_clk_is_enabled,
.reset = branch_clk_reset,
.is_local = local_clk_is_local,
@@ -357,33 +367,33 @@
.c = { \
.dbg_name = #i "_clk", \
.ops = &clk_ops_rcg_9615, \
+ VDD_DIG_FMAX_MAP2(LOW, 32000000, NOMINAL, 64000000), \
CLK_INIT(i##_clk.c), \
}, \
}
-#define F_GSBI_UART(f, s, d, m, n, v) \
+#define F_GSBI_UART(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD16(m, n), \
.ns_val = NS(31, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_gsbi_uart[] = {
- F_GSBI_UART( 0, gnd, 1, 0, 0, NONE),
- F_GSBI_UART( 3686400, pll8, 1, 6, 625, LOW),
- F_GSBI_UART( 7372800, pll8, 1, 12, 625, LOW),
- F_GSBI_UART(14745600, pll8, 1, 24, 625, LOW),
- F_GSBI_UART(16000000, pll8, 4, 1, 6, LOW),
- F_GSBI_UART(24000000, pll8, 4, 1, 4, LOW),
- F_GSBI_UART(32000000, pll8, 4, 1, 3, LOW),
- F_GSBI_UART(40000000, pll8, 1, 5, 48, NOMINAL),
- F_GSBI_UART(46400000, pll8, 1, 29, 240, NOMINAL),
- F_GSBI_UART(48000000, pll8, 4, 1, 2, NOMINAL),
- F_GSBI_UART(51200000, pll8, 1, 2, 15, NOMINAL),
- F_GSBI_UART(56000000, pll8, 1, 7, 48, NOMINAL),
- F_GSBI_UART(58982400, pll8, 1, 96, 625, NOMINAL),
- F_GSBI_UART(64000000, pll8, 2, 1, 3, NOMINAL),
+ F_GSBI_UART( 0, gnd, 1, 0, 0),
+ F_GSBI_UART( 3686400, pll8, 1, 6, 625),
+ F_GSBI_UART( 7372800, pll8, 1, 12, 625),
+ F_GSBI_UART(14745600, pll8, 1, 24, 625),
+ F_GSBI_UART(16000000, pll8, 4, 1, 6),
+ F_GSBI_UART(24000000, pll8, 4, 1, 4),
+ F_GSBI_UART(32000000, pll8, 4, 1, 3),
+ F_GSBI_UART(40000000, pll8, 1, 5, 48),
+ F_GSBI_UART(46400000, pll8, 1, 29, 240),
+ F_GSBI_UART(48000000, pll8, 4, 1, 2),
+ F_GSBI_UART(51200000, pll8, 1, 2, 15),
+ F_GSBI_UART(56000000, pll8, 1, 7, 48),
+ F_GSBI_UART(58982400, pll8, 1, 96, 625),
+ F_GSBI_UART(64000000, pll8, 2, 1, 3),
F_END
};
@@ -413,28 +423,28 @@
.c = { \
.dbg_name = #i "_clk", \
.ops = &clk_ops_rcg_9615, \
+ VDD_DIG_FMAX_MAP2(LOW, 24000000, NOMINAL, 52000000), \
CLK_INIT(i##_clk.c), \
}, \
}
-#define F_GSBI_QUP(f, s, d, m, n, v) \
+#define F_GSBI_QUP(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD8(16, m, 0, n), \
.ns_val = NS(23, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_gsbi_qup[] = {
- F_GSBI_QUP( 0, gnd, 1, 0, 0, NONE),
- F_GSBI_QUP( 960000, cxo, 4, 1, 5, LOW),
- F_GSBI_QUP( 4800000, cxo, 4, 0, 1, LOW),
- F_GSBI_QUP( 9600000, cxo, 2, 0, 1, LOW),
- F_GSBI_QUP(15058800, pll8, 1, 2, 51, LOW),
- F_GSBI_QUP(24000000, pll8, 4, 1, 4, LOW),
- F_GSBI_QUP(25600000, pll8, 1, 1, 15, NOMINAL),
- F_GSBI_QUP(48000000, pll8, 4, 1, 2, NOMINAL),
- F_GSBI_QUP(51200000, pll8, 1, 2, 15, NOMINAL),
+ F_GSBI_QUP( 0, gnd, 1, 0, 0),
+ F_GSBI_QUP( 960000, cxo, 4, 1, 5),
+ F_GSBI_QUP( 4800000, cxo, 4, 0, 1),
+ F_GSBI_QUP( 9600000, cxo, 2, 0, 1),
+ F_GSBI_QUP(15058800, pll8, 1, 2, 51),
+ F_GSBI_QUP(24000000, pll8, 4, 1, 4),
+ F_GSBI_QUP(25600000, pll8, 1, 1, 15),
+ F_GSBI_QUP(48000000, pll8, 4, 1, 2),
+ F_GSBI_QUP(51200000, pll8, 1, 2, 15),
F_END
};
@@ -444,16 +454,15 @@
static CLK_GSBI_QUP(gsbi4_qup, 4, CLK_HALT_CFPB_STATEB_REG, 24);
static CLK_GSBI_QUP(gsbi5_qup, 5, CLK_HALT_CFPB_STATEB_REG, 20);
-#define F_PDM(f, s, d, v) \
+#define F_PDM(f, s, d) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.ns_val = NS_SRC_SEL(1, 0, s##_to_xo_mux), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_pdm[] = {
- F_PDM( 0, gnd, 1, NONE),
- F_PDM(19200000, cxo, 1, LOW),
+ F_PDM( 0, gnd, 1),
+ F_PDM(19200000, cxo, 1),
F_END
};
@@ -475,6 +484,7 @@
.c = {
.dbg_name = "pdm_clk",
.ops = &clk_ops_rcg_9615,
+ VDD_DIG_FMAX_MAP1(LOW, 19200000),
CLK_INIT(pdm_clk.c),
},
};
@@ -493,14 +503,13 @@
},
};
-#define F_PRNG(f, s, v) \
+#define F_PRNG(f, s) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_prng[] = {
- F_PRNG(32000000, pll8, LOW),
+ F_PRNG(32000000, pll8),
F_END
};
@@ -518,6 +527,7 @@
.c = {
.dbg_name = "prng_clk",
.ops = &clk_ops_rcg_9615,
+ VDD_DIG_FMAX_MAP2(LOW, 32000000, NOMINAL, 65000000),
CLK_INIT(prng_clk.c),
},
};
@@ -542,45 +552,44 @@
.c = { \
.dbg_name = #name, \
.ops = &clk_ops_rcg_9615, \
+ VDD_DIG_FMAX_MAP2(LOW, 25000000, NOMINAL, 50000000), \
CLK_INIT(name.c), \
}, \
}
-#define F_SDC(f, s, d, m, n, v) \
+#define F_SDC(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD8(16, m, 0, n), \
.ns_val = NS(23, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_sdc1_2[] = {
- F_SDC( 0, gnd, 1, 0, 0, NONE),
- F_SDC( 144300, cxo, 1, 1, 133, LOW),
- F_SDC( 400000, pll8, 4, 1, 240, LOW),
- F_SDC( 16000000, pll8, 4, 1, 6, LOW),
- F_SDC( 17070000, pll8, 1, 2, 45, LOW),
- F_SDC( 20210000, pll8, 1, 1, 19, LOW),
- F_SDC( 24000000, pll8, 4, 1, 4, LOW),
- F_SDC( 48000000, pll8, 4, 1, 2, NOMINAL),
+ F_SDC( 0, gnd, 1, 0, 0),
+ F_SDC( 144300, cxo, 1, 1, 133),
+ F_SDC( 400000, pll8, 4, 1, 240),
+ F_SDC( 16000000, pll8, 4, 1, 6),
+ F_SDC( 17070000, pll8, 1, 2, 45),
+ F_SDC( 20210000, pll8, 1, 1, 19),
+ F_SDC( 24000000, pll8, 4, 1, 4),
+ F_SDC( 48000000, pll8, 4, 1, 2),
F_END
};
static CLK_SDC(sdc1_clk, 1, 6, clk_tbl_sdc1_2);
static CLK_SDC(sdc2_clk, 2, 5, clk_tbl_sdc1_2);
-#define F_USB(f, s, d, m, n, v) \
+#define F_USB(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD8(16, m, 0, n), \
.ns_val = NS(23, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_bb_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_usb[] = {
- F_USB( 0, gnd, 1, 0, 0, NONE),
- F_USB(60000000, pll8, 1, 5, 32, NOMINAL),
+ F_USB( 0, gnd, 1, 0, 0),
+ F_USB(60000000, pll8, 1, 5, 32),
F_END
};
@@ -603,6 +612,7 @@
.c = {
.dbg_name = "usb_hs1_xcvr_clk",
.ops = &clk_ops_rcg_9615,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 60000000),
CLK_INIT(usb_hs1_xcvr_clk.c),
},
};
@@ -626,6 +636,7 @@
.c = {
.dbg_name = "usb_hs1_sys_clk",
.ops = &clk_ops_rcg_9615,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 60000000),
CLK_INIT(usb_hs1_sys_clk.c),
},
};
@@ -649,6 +660,7 @@
.c = {
.dbg_name = "usb_hsic_xcvr_clk",
.ops = &clk_ops_rcg_9615,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 60000000),
CLK_INIT(usb_hsic_xcvr_clk.c),
},
};
@@ -672,13 +684,14 @@
.c = {
.dbg_name = "usb_hsic_sys_clk",
.ops = &clk_ops_rcg_9615,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 60000000),
CLK_INIT(usb_hsic_sys_clk.c),
},
};
static struct clk_freq_tbl clk_tbl_usb_hsic[] = {
- F_USB( 0, gnd, 1, 0, 0, NONE),
- F_USB(480000000, pll14, 1, 0, 1, NOMINAL),
+ F_USB( 0, gnd, 1, 0, 0),
+ F_USB(480000000, pll14, 1, 0, 1),
F_END
};
@@ -701,6 +714,7 @@
.c = {
.dbg_name = "usb_hsic_clk",
.ops = &clk_ops_rcg_9615,
+ VDD_DIG_FMAX_MAP1(NOMINAL, 480000000),
CLK_INIT(usb_hsic_clk.c),
},
};
@@ -982,28 +996,27 @@
/*
* Low Power Audio Clocks
*/
-#define F_AIF_OSR(f, s, d, m, n, v) \
+#define F_AIF_OSR(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD8(8, m, 0, n), \
.ns_val = NS(31, 24, n, m, 5, 4, 3, d, 2, 0, s##_to_lpa_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_aif_osr[] = {
- F_AIF_OSR( 0, gnd, 1, 0, 0, NONE),
- F_AIF_OSR( 512000, pll4, 4, 1, 192, LOW),
- F_AIF_OSR( 768000, pll4, 4, 1, 128, LOW),
- F_AIF_OSR( 1024000, pll4, 4, 1, 96, LOW),
- F_AIF_OSR( 1536000, pll4, 4, 1, 64, LOW),
- F_AIF_OSR( 2048000, pll4, 4, 1, 48, LOW),
- F_AIF_OSR( 3072000, pll4, 4, 1, 32, LOW),
- F_AIF_OSR( 4096000, pll4, 4, 1, 24, LOW),
- F_AIF_OSR( 6144000, pll4, 4, 1, 16, LOW),
- F_AIF_OSR( 8192000, pll4, 4, 1, 12, LOW),
- F_AIF_OSR(12288000, pll4, 4, 1, 8, LOW),
- F_AIF_OSR(24576000, pll4, 4, 1, 4, LOW),
+ F_AIF_OSR( 0, gnd, 1, 0, 0),
+ F_AIF_OSR( 512000, pll4, 4, 1, 192),
+ F_AIF_OSR( 768000, pll4, 4, 1, 128),
+ F_AIF_OSR( 1024000, pll4, 4, 1, 96),
+ F_AIF_OSR( 1536000, pll4, 4, 1, 64),
+ F_AIF_OSR( 2048000, pll4, 4, 1, 48),
+ F_AIF_OSR( 3072000, pll4, 4, 1, 32),
+ F_AIF_OSR( 4096000, pll4, 4, 1, 24),
+ F_AIF_OSR( 6144000, pll4, 4, 1, 16),
+ F_AIF_OSR( 8192000, pll4, 4, 1, 12),
+ F_AIF_OSR(12288000, pll4, 4, 1, 8),
+ F_AIF_OSR(24576000, pll4, 4, 1, 4),
F_END
};
@@ -1150,28 +1163,27 @@
static CLK_AIF_BIT_DIV(spare_i2s_spkr_bit, LCC_SPARE_I2S_SPKR_NS_REG,
LCC_SPARE_I2S_SPKR_STATUS_REG);
-#define F_PCM(f, s, d, m, n, v) \
+#define F_PCM(f, s, d, m, n) \
{ \
.freq_hz = f, \
.src_clk = &s##_clk.c, \
.md_val = MD16(m, n), \
.ns_val = NS(31, 16, n, m, 5, 4, 3, d, 2, 0, s##_to_lpa_mux), \
.mnd_en_mask = BIT(8) * !!(n), \
- .sys_vdd = v, \
}
static struct clk_freq_tbl clk_tbl_pcm[] = {
- F_PCM( 0, gnd, 1, 0, 0, NONE),
- F_PCM( 512000, pll4, 4, 1, 192, LOW),
- F_PCM( 768000, pll4, 4, 1, 128, LOW),
- F_PCM( 1024000, pll4, 4, 1, 96, LOW),
- F_PCM( 1536000, pll4, 4, 1, 64, LOW),
- F_PCM( 2048000, pll4, 4, 1, 48, LOW),
- F_PCM( 3072000, pll4, 4, 1, 32, LOW),
- F_PCM( 4096000, pll4, 4, 1, 24, LOW),
- F_PCM( 6144000, pll4, 4, 1, 16, LOW),
- F_PCM( 8192000, pll4, 4, 1, 12, LOW),
- F_PCM(12288000, pll4, 4, 1, 8, LOW),
- F_PCM(24576000, pll4, 4, 1, 4, LOW),
+ F_PCM( 0, gnd, 1, 0, 0),
+ F_PCM( 512000, pll4, 4, 1, 192),
+ F_PCM( 768000, pll4, 4, 1, 128),
+ F_PCM( 1024000, pll4, 4, 1, 96),
+ F_PCM( 1536000, pll4, 4, 1, 64),
+ F_PCM( 2048000, pll4, 4, 1, 48),
+ F_PCM( 3072000, pll4, 4, 1, 32),
+ F_PCM( 4096000, pll4, 4, 1, 24),
+ F_PCM( 6144000, pll4, 4, 1, 16),
+ F_PCM( 8192000, pll4, 4, 1, 12),
+ F_PCM(12288000, pll4, 4, 1, 8),
+ F_PCM(24576000, pll4, 4, 1, 4),
F_END
};
@@ -1195,6 +1207,7 @@
.c = {
.dbg_name = "pcm_clk",
.ops = &clk_ops_rcg_9615,
+ VDD_DIG_FMAX_MAP1(LOW, 24576000),
CLK_INIT(pcm_clk.c),
},
};
@@ -1219,6 +1232,7 @@
.c = {
.dbg_name = "audio_slimbus_clk",
.ops = &clk_ops_rcg_9615,
+ VDD_DIG_FMAX_MAP1(LOW, 24576000),
CLK_INIT(audio_slimbus_clk.c),
},
};
@@ -1522,13 +1536,13 @@
CLK_LOOKUP("core_clk", gsbi4_qup_clk.c, NULL),
CLK_LOOKUP("core_clk", gsbi5_qup_clk.c, "qup_i2c.0"),
- CLK_LOOKUP("pdm_clk", pdm_clk.c, NULL),
+ CLK_LOOKUP("core_clk", pdm_clk.c, NULL),
CLK_LOOKUP("mem_clk", pmem_clk.c, "msm_sps"),
CLK_LOOKUP("core_clk", prng_clk.c, "msm_rng.0"),
CLK_LOOKUP("core_clk", sdc1_clk.c, "msm_sdcc.1"),
CLK_LOOKUP("core_clk", sdc2_clk.c, "msm_sdcc.2"),
- CLK_LOOKUP("ce_pclk", ce1_p_clk.c, NULL),
- CLK_LOOKUP("ce_clk", ce1_core_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", ce1_p_clk.c, NULL),
+ CLK_LOOKUP("core_clk", ce1_core_clk.c, NULL),
CLK_LOOKUP("dma_bam_pclk", dma_bam_p_clk.c, NULL),
CLK_LOOKUP("iface_clk", gsbi1_p_clk.c, NULL),
@@ -1549,10 +1563,10 @@
CLK_LOOKUP("iface_clk", sdc2_p_clk.c, "msm_sdcc.2"),
CLK_LOOKUP("core_clk", adm0_clk.c, "msm_dmov"),
CLK_LOOKUP("iface_clk", adm0_p_clk.c, "msm_dmov"),
- CLK_LOOKUP("pmic_arb_pclk", pmic_arb0_p_clk.c, NULL),
- CLK_LOOKUP("pmic_arb_pclk", pmic_arb1_p_clk.c, NULL),
- CLK_LOOKUP("pmic_ssbi2", pmic_ssbi2_clk.c, NULL),
- CLK_LOOKUP("rpm_msg_ram_pclk", rpm_msg_ram_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", pmic_arb0_p_clk.c, NULL),
+ CLK_LOOKUP("iface_clk", pmic_arb1_p_clk.c, NULL),
+ CLK_LOOKUP("core_clk", pmic_ssbi2_clk.c, NULL),
+ CLK_LOOKUP("mem_clk", rpm_msg_ram_p_clk.c, NULL),
CLK_LOOKUP("mi2s_bit_clk", mi2s_bit_clk.c, NULL),
CLK_LOOKUP("mi2s_osr_clk", mi2s_osr_clk.c, NULL),
@@ -1719,8 +1733,7 @@
BUG();
}
- soc_update_sys_vdd = msm9615_update_sys_vdd;
- local_vote_sys_vdd(HIGH);
+ vote_vdd_level(&vdd_dig, VDD_DIG_HIGH);
clk_ops_pll.enable = sr_pll_clk_enable;
@@ -1746,7 +1759,7 @@
static int __init msm9615_clock_late_init(void)
{
- return local_unvote_sys_vdd(HIGH);
+ return unvote_vdd_level(&vdd_dig, VDD_DIG_HIGH);
}
struct clock_init_data msm9615_clock_init_data __initdata = {
diff --git a/arch/arm/mach-msm/clock-debug.c b/arch/arm/mach-msm/clock-debug.c
index c0af9b5..63fc70f 100644
--- a/arch/arm/mach-msm/clock-debug.c
+++ b/arch/arm/mach-msm/clock-debug.c
@@ -170,10 +170,25 @@
static int list_rates_show(struct seq_file *m, void *unused)
{
struct clk *clock = m->private;
- int rate, i = 0;
+ int rate, level, fmax = 0, i = 0;
- while ((rate = clock->ops->list_rate(clock, i++)) >= 0)
- seq_printf(m, "%d\n", rate);
+ /* Find max frequency supported within voltage constraints. */
+ if (!clock->vdd_class) {
+ fmax = ULONG_MAX;
+ } else {
+ for (level = 0; level < ARRAY_SIZE(clock->fmax); level++)
+ if (clock->fmax[level])
+ fmax = clock->fmax[level];
+ }
+
+ /*
+ * List supported frequencies <= fmax. Higher frequencies may appear in
+ * the frequency table, but are not valid and should not be listed.
+ */
+ while ((rate = clock->ops->list_rate(clock, i++)) >= 0) {
+ if (rate <= fmax)
+ seq_printf(m, "%u\n", rate);
+ }
return 0;
}
@@ -198,7 +213,7 @@
if (!debugfs_base)
return -ENOMEM;
- strncpy(temp, clock->dbg_name, ARRAY_SIZE(temp)-1);
+ strlcpy(temp, clock->dbg_name, ARRAY_SIZE(temp));
for (ptr = temp; *ptr; ptr++)
*ptr = tolower(*ptr);
diff --git a/arch/arm/mach-msm/clock-local.c b/arch/arm/mach-msm/clock-local.c
index ea76512..ca25802 100644
--- a/arch/arm/mach-msm/clock-local.c
+++ b/arch/arm/mach-msm/clock-local.c
@@ -48,9 +48,6 @@
DEFINE_SPINLOCK(local_clock_reg_lock);
struct clk_freq_tbl rcg_dummy_freq = F_END;
-unsigned local_sys_vdd_votes[NUM_SYS_VDD_LEVELS];
-static DEFINE_SPINLOCK(sys_vdd_vote_lock);
-
/*
* Common Set-Rate Functions
*/
@@ -264,81 +261,6 @@
clk->ns_mask = new_bank_masks->ns_mask;
}
-int (*soc_update_sys_vdd)(enum sys_vdd_level level);
-
-/*
- * SYS_VDD voting functions
- */
-
-/* Update system voltage level given the current votes. */
-static int local_update_sys_vdd(void)
-{
- static int cur_level = NUM_SYS_VDD_LEVELS;
- int level, rc = 0;
-
- if (local_sys_vdd_votes[HIGH])
- level = HIGH;
- else if (local_sys_vdd_votes[NOMINAL])
- level = NOMINAL;
- else if (local_sys_vdd_votes[LOW])
- level = LOW;
- else
- level = NONE;
-
- if (level == cur_level)
- return rc;
-
- rc = soc_update_sys_vdd(level);
- if (!rc)
- cur_level = level;
-
- return rc;
-}
-
-/* Vote for a system voltage level. */
-int local_vote_sys_vdd(unsigned level)
-{
- int rc = 0;
- unsigned long flags;
-
- /* Bounds checking. */
- if (level >= ARRAY_SIZE(local_sys_vdd_votes))
- return -EINVAL;
-
- spin_lock_irqsave(&sys_vdd_vote_lock, flags);
- local_sys_vdd_votes[level]++;
- rc = local_update_sys_vdd();
- if (rc)
- local_sys_vdd_votes[level]--;
- spin_unlock_irqrestore(&sys_vdd_vote_lock, flags);
-
- return rc;
-}
-
-/* Remove vote for a system voltage level. */
-int local_unvote_sys_vdd(unsigned level)
-{
- int rc = 0;
- unsigned long flags;
-
- /* Bounds checking. */
- if (level >= ARRAY_SIZE(local_sys_vdd_votes))
- return -EINVAL;
-
- spin_lock_irqsave(&sys_vdd_vote_lock, flags);
-
- if (WARN(!local_sys_vdd_votes[level],
- "Reference counts are incorrect for level %d!\n", level))
- goto out;
-
- local_sys_vdd_votes[level]--;
- rc = local_update_sys_vdd();
- if (rc)
- local_sys_vdd_votes[level]++;
-out:
- spin_unlock_irqrestore(&sys_vdd_vote_lock, flags);
- return rc;
-}
/*
* Clock enable/disable functions
*/
@@ -351,7 +273,7 @@
return invert ? !status_bit : status_bit;
}
-static void __branch_clk_enable_reg(const struct branch *clk, const char *name)
+void __branch_clk_enable_reg(const struct branch *clk, const char *name)
{
u32 reg_val;
@@ -422,7 +344,7 @@
}
/* Perform any register operations required to disable the branch. */
-static u32 __branch_clk_disable_reg(const struct branch *clk, const char *name)
+u32 __branch_clk_disable_reg(const struct branch *clk, const char *name)
{
u32 reg_val;
@@ -486,19 +408,25 @@
}
}
-static void _rcg_clk_enable(struct rcg_clk *clk)
+/* Enable a rate-settable clock. */
+int rcg_clk_enable(struct clk *c)
{
unsigned long flags;
+ struct rcg_clk *clk = to_rcg_clk(c);
spin_lock_irqsave(&local_clock_reg_lock, flags);
__rcg_clk_enable_reg(clk);
clk->enabled = true;
spin_unlock_irqrestore(&local_clock_reg_lock, flags);
+
+ return 0;
}
-static void _rcg_clk_disable(struct rcg_clk *clk)
+/* Disable a rate-settable clock. */
+void rcg_clk_disable(struct clk *c)
{
unsigned long flags;
+ struct rcg_clk *clk = to_rcg_clk(c);
spin_lock_irqsave(&local_clock_reg_lock, flags);
__rcg_clk_disable_reg(clk);
@@ -506,34 +434,6 @@
spin_unlock_irqrestore(&local_clock_reg_lock, flags);
}
-/* Enable a clock and any related power rail. */
-int rcg_clk_enable(struct clk *c)
-{
- int rc;
- struct rcg_clk *clk = to_rcg_clk(c);
-
- rc = local_vote_sys_vdd(clk->current_freq->sys_vdd);
- if (rc)
- return rc;
- _rcg_clk_enable(clk);
- return rc;
-}
-
-/* Disable a clock and any related power rail. */
-void rcg_clk_disable(struct clk *c)
-{
- struct rcg_clk *clk = to_rcg_clk(c);
-
- _rcg_clk_disable(clk);
- local_unvote_sys_vdd(clk->current_freq->sys_vdd);
-}
-
-/* Turn off a clock at boot, without checking refcounts. */
-void rcg_clk_auto_off(struct clk *c)
-{
- _rcg_clk_disable(to_rcg_clk(c));
-}
-
/*
* Frequency-related functions
*/
@@ -544,25 +444,17 @@
struct clk_freq_tbl *cf;
int rc = 0;
struct clk *chld;
- unsigned long flags;
-
- spin_lock_irqsave(&clk->c.lock, flags);
/* Check if frequency is actually changed. */
cf = clk->current_freq;
if (nf == cf)
- goto unlock;
+ return 0;
if (clk->enabled) {
- /* Vote for voltage and source for new freq. */
- rc = local_vote_sys_vdd(nf->sys_vdd);
- if (rc)
- goto unlock;
+ /* Enable source clock dependency for the new freq. */
rc = clk_enable(nf->src_clk);
- if (rc) {
- local_unvote_sys_vdd(nf->sys_vdd);
- goto unlock;
- }
+ if (rc)
+ return rc;
}
spin_lock(&local_clock_reg_lock);
@@ -608,13 +500,9 @@
spin_unlock(&local_clock_reg_lock);
- /* Release requirements of the old freq. */
- if (clk->enabled) {
+ /* Release source requirements of the old freq. */
+ if (clk->enabled)
clk_disable(cf->src_clk);
- local_unvote_sys_vdd(cf->sys_vdd);
- }
-unlock:
- spin_unlock_irqrestore(&clk->c.lock, flags);
return rc;
}
@@ -985,16 +873,6 @@
return branch->enabled;
}
-void branch_clk_auto_off(struct clk *clk)
-{
- struct branch_clk *branch = to_branch_clk(clk);
- unsigned long flags;
-
- spin_lock_irqsave(&local_clock_reg_lock, flags);
- __branch_clk_disable_reg(&branch->b, branch->c.dbg_name);
- spin_unlock_irqrestore(&local_clock_reg_lock, flags);
-}
-
int branch_reset(struct branch *clk, enum clk_reset_action action)
{
int ret = 0;
diff --git a/arch/arm/mach-msm/clock-local.h b/arch/arm/mach-msm/clock-local.h
index f62e753..9887bb1 100644
--- a/arch/arm/mach-msm/clock-local.h
+++ b/arch/arm/mach-msm/clock-local.h
@@ -74,22 +74,17 @@
const struct bank_mask_info bank1_mask;
};
-#define F_RAW(f, sc, m_v, n_v, c_v, m_m, v, e) { \
+#define F_RAW(f, sc, m_v, n_v, c_v, m_m, e) { \
.freq_hz = f, \
.src_clk = sc, \
.md_val = m_v, \
.ns_val = n_v, \
.ctl_val = c_v, \
.mnd_en_mask = m_m, \
- .sys_vdd = v, \
.extra_freq_data = e, \
}
#define FREQ_END (UINT_MAX-1)
-#define F_END \
- { \
- .freq_hz = FREQ_END, \
- .sys_vdd = LOW, \
- }
+#define F_END { .freq_hz = FREQ_END }
/**
* struct branch - branch on/off
@@ -114,6 +109,8 @@
};
int branch_reset(struct branch *clk, enum clk_reset_action action);
+void __branch_clk_enable_reg(const struct branch *clk, const char *name);
+u32 __branch_clk_disable_reg(const struct branch *clk, const char *name);
/*
* Generic clock-definition struct and macros
@@ -146,7 +143,6 @@
int rcg_clk_enable(struct clk *clk);
void rcg_clk_disable(struct clk *clk);
-void rcg_clk_auto_off(struct clk *clk);
int rcg_clk_set_rate(struct clk *clk, unsigned rate);
int rcg_clk_set_min_rate(struct clk *clk, unsigned rate);
unsigned rcg_clk_get_rate(struct clk *clk);
@@ -156,17 +152,6 @@
struct clk *rcg_clk_get_parent(struct clk *c);
int rcg_clk_handoff(struct clk *c);
-/*
- * SYS_VDD voltage levels
- */
-enum sys_vdd_level {
- NONE,
- LOW,
- NOMINAL,
- HIGH,
- NUM_SYS_VDD_LEVELS
-};
-
/**
* struct fixed_clk - fixed rate clock (used for crystal oscillators)
* @rate: output rate
@@ -268,7 +253,6 @@
struct clk *branch_clk_get_parent(struct clk *clk);
int branch_clk_set_parent(struct clk *clk, struct clk *parent);
int branch_clk_is_enabled(struct clk *clk);
-void branch_clk_auto_off(struct clk *clk);
int branch_clk_reset(struct clk *c, enum clk_reset_action action);
/**
@@ -301,16 +285,9 @@
/*
* Local-clock APIs
*/
-int local_vote_sys_vdd(enum sys_vdd_level level);
-int local_unvote_sys_vdd(enum sys_vdd_level level);
bool local_clk_is_local(struct clk *clk);
/*
- * Required SoC-specific functions, implemented for every supported SoC
- */
-extern int (*soc_update_sys_vdd)(enum sys_vdd_level level);
-
-/*
* Generic set-rate implementations
*/
void set_rate_mnd(struct rcg_clk *clk, struct clk_freq_tbl *nf);
diff --git a/arch/arm/mach-msm/clock-pcom-lookup.c b/arch/arm/mach-msm/clock-pcom-lookup.c
index 9a5e644..d1a257d 100644
--- a/arch/arm/mach-msm/clock-pcom-lookup.c
+++ b/arch/arm/mach-msm/clock-pcom-lookup.c
@@ -149,7 +149,7 @@
CLK_LOOKUP("ebi2_clk", ebi2_clk.c, NULL),
CLK_LOOKUP("ecodec_clk", ecodec_clk.c, NULL),
CLK_LOOKUP("emdh_clk", emdh_clk.c, NULL),
- CLK_LOOKUP("gp_clk", gp_clk.c, NULL),
+ CLK_LOOKUP("core_clk", gp_clk.c, NULL),
CLK_LOOKUP("core_clk", grp_3d_clk.c, "kgsl-3d0.0"),
CLK_LOOKUP("core_clk", i2c_clk.c, "msm_i2c.0"),
CLK_LOOKUP("icodec_rx_clk", icodec_rx_clk.c, NULL),
@@ -197,7 +197,7 @@
CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
CLK_LOOKUP("ebi2_clk", ebi2_clk.c, NULL),
CLK_LOOKUP("ecodec_clk", ecodec_clk.c, NULL),
- CLK_LOOKUP("gp_clk", gp_clk.c, NULL),
+ CLK_LOOKUP("core_clk", gp_clk.c, NULL),
CLK_LOOKUP("core_clk", grp_3d_clk.c, "kgsl-3d0.0"),
CLK_LOOKUP("core_clk", grp_3d_clk.c, "footswitch-pcom.2"),
CLK_LOOKUP("iface_clk", grp_3d_p_clk.c, "kgsl-3d0.0"),
@@ -263,6 +263,9 @@
CLK_LOOKUP("csi_clk", csi0_clk.c, "msm_camera_ov9726.0"),
CLK_LOOKUP("csi_pclk", csi0_p_clk.c, "msm_camera_ov9726.0"),
CLK_LOOKUP("csi_vfe_clk", csi0_vfe_clk.c, "msm_camera_ov9726.0"),
+ CLK_LOOKUP("csi_clk", csi0_clk.c, "msm_camera_ov7692.0"),
+ CLK_LOOKUP("csi_pclk", csi0_p_clk.c, "msm_camera_ov7692.0"),
+ CLK_LOOKUP("csi_vfe_clk", csi0_vfe_clk.c, "msm_camera_ov7692.0"),
CLK_LOOKUP("csi_clk", csi1_clk.c, NULL),
CLK_LOOKUP("csi_pclk", csi1_p_clk.c, NULL),
CLK_LOOKUP("csi_vfe_clk", csi1_vfe_clk.c, NULL),
@@ -274,7 +277,7 @@
CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
CLK_LOOKUP("ebi2_clk", ebi2_clk.c, NULL),
CLK_LOOKUP("ecodec_clk", ecodec_clk.c, NULL),
- CLK_LOOKUP("gp_clk", gp_clk.c, NULL),
+ CLK_LOOKUP("core_clk", gp_clk.c, NULL),
CLK_LOOKUP("core_clk", grp_3d_clk.c, "kgsl-3d0.0"),
CLK_LOOKUP("core_clk", grp_3d_clk.c, "footswitch-pcom.2"),
CLK_LOOKUP("iface_clk", grp_3d_p_clk.c, "kgsl-3d0.0"),
@@ -341,7 +344,7 @@
CLK_LOOKUP("ebi2_clk", ebi2_clk.c, NULL),
CLK_LOOKUP("ecodec_clk", ecodec_clk.c, NULL),
CLK_LOOKUP("emdh_clk", emdh_clk.c, NULL),
- CLK_LOOKUP("gp_clk", gp_clk.c, NULL),
+ CLK_LOOKUP("core_clk", gp_clk.c, NULL),
CLK_LOOKUP("core_clk", grp_3d_clk.c, "kgsl-3d0.0"),
CLK_LOOKUP("core_clk", i2c_clk.c, "msm_i2c.0"),
CLK_LOOKUP("icodec_rx_clk", icodec_rx_clk.c, NULL),
diff --git a/arch/arm/mach-msm/clock-rpm.c b/arch/arm/mach-msm/clock-rpm.c
index 286b3d0..2ccebb4 100644
--- a/arch/arm/mach-msm/clock-rpm.c
+++ b/arch/arm/mach-msm/clock-rpm.c
@@ -104,11 +104,6 @@
return;
}
-static void rpm_clk_auto_off(struct clk *clk)
-{
- /* Not supported */
-}
-
static int rpm_clk_set_min_rate(struct clk *clk, unsigned rate)
{
unsigned long flags;
@@ -194,7 +189,6 @@
struct clk_ops clk_ops_rpm = {
.enable = rpm_clk_enable,
.disable = rpm_clk_disable,
- .auto_off = rpm_clk_auto_off,
.set_min_rate = rpm_clk_set_min_rate,
.get_rate = rpm_clk_get_rate,
.is_enabled = rpm_clk_is_enabled,
diff --git a/arch/arm/mach-msm/clock-voter.c b/arch/arm/mach-msm/clock-voter.c
index 1c742b1..e754752 100644
--- a/arch/arm/mach-msm/clock-voter.c
+++ b/arch/arm/mach-msm/clock-voter.c
@@ -75,7 +75,7 @@
static int voter_clk_enable(struct clk *clk)
{
- int ret;
+ int ret = 0;
unsigned long flags;
unsigned cur_rate;
struct clk *parent;
diff --git a/arch/arm/mach-msm/clock.c b/arch/arm/mach-msm/clock.c
index 58a64a3..de89382 100644
--- a/arch/arm/mach-msm/clock.c
+++ b/arch/arm/mach-msm/clock.c
@@ -24,13 +24,116 @@
#include "clock.h"
+/* Find the voltage level required for a given rate. */
+static int find_vdd_level(struct clk *clk, unsigned long rate)
+{
+ int level;
+
+ for (level = 0; level < ARRAY_SIZE(clk->fmax); level++)
+ if (rate <= clk->fmax[level])
+ break;
+
+ if (level == ARRAY_SIZE(clk->fmax)) {
+ pr_err("Rate %lu for %s is greater than highest Fmax\n", rate,
+ clk->dbg_name);
+ return -EINVAL;
+ }
+
+ return level;
+}
+
+/* Update voltage level given the current votes. */
+static int update_vdd(struct clk_vdd_class *vdd_class)
+{
+ int level, rc;
+
+ for (level = ARRAY_SIZE(vdd_class->level_votes)-1; level > 0; level--)
+ if (vdd_class->level_votes[level])
+ break;
+
+ if (level == vdd_class->cur_level)
+ return 0;
+
+ rc = vdd_class->set_vdd(vdd_class, level);
+ if (!rc)
+ vdd_class->cur_level = level;
+
+ return rc;
+}
+
+/* Vote for a voltage level. */
+int vote_vdd_level(struct clk_vdd_class *vdd_class, int level)
+{
+ unsigned long flags;
+ int rc;
+
+ spin_lock_irqsave(&vdd_class->lock, flags);
+ vdd_class->level_votes[level]++;
+ rc = update_vdd(vdd_class);
+ if (rc)
+ vdd_class->level_votes[level]--;
+ spin_unlock_irqrestore(&vdd_class->lock, flags);
+
+ return rc;
+}
+
+/* Remove vote for a voltage level. */
+int unvote_vdd_level(struct clk_vdd_class *vdd_class, int level)
+{
+ unsigned long flags;
+ int rc = 0;
+
+ spin_lock_irqsave(&vdd_class->lock, flags);
+ if (WARN(!vdd_class->level_votes[level],
+ "Reference counts are incorrect for %s level %d\n",
+ vdd_class->class_name, level))
+ goto out;
+ vdd_class->level_votes[level]--;
+ rc = update_vdd(vdd_class);
+ if (rc)
+ vdd_class->level_votes[level]++;
+out:
+ spin_unlock_irqrestore(&vdd_class->lock, flags);
+ return rc;
+}
+
+/* Vote for a voltage level corresponding to a clock's rate. */
+static int vote_rate_vdd(struct clk *clk, unsigned long rate)
+{
+ int level;
+
+ if (!clk->vdd_class)
+ return 0;
+
+ level = find_vdd_level(clk, rate);
+ if (level < 0)
+ return level;
+
+ return vote_vdd_level(clk->vdd_class, level);
+}
+
+/* Remove vote for a voltage level corresponding to a clock's rate. */
+static void unvote_rate_vdd(struct clk *clk, unsigned long rate)
+{
+ int level;
+
+ if (!clk->vdd_class)
+ return;
+
+ level = find_vdd_level(clk, rate);
+ if (level < 0)
+ return;
+
+ unvote_vdd_level(clk->vdd_class, level);
+}
+
/*
* Standard clock functions defined in include/linux/clk.h
*/
int clk_enable(struct clk *clk)
{
int ret = 0;
- unsigned long flags;
+ unsigned long flags, rate;
struct clk *parent;
if (!clk)
@@ -39,22 +142,22 @@
spin_lock_irqsave(&clk->lock, flags);
if (clk->count == 0) {
parent = clk_get_parent(clk);
+ rate = clk_get_rate(clk);
+
ret = clk_enable(parent);
if (ret)
- goto out;
+ goto err_enable_parent;
ret = clk_enable(clk->depends);
- if (ret) {
- clk_disable(parent);
- goto out;
- }
+ if (ret)
+ goto err_enable_depends;
+ ret = vote_rate_vdd(clk, rate);
+ if (ret)
+ goto err_vote_vdd;
if (clk->ops->enable)
ret = clk->ops->enable(clk);
- if (ret) {
- clk_disable(clk->depends);
- clk_disable(parent);
- goto out;
- }
+ if (ret)
+ goto err_enable_clock;
} else if (clk->flags & CLKFLAG_HANDOFF_RATE) {
/*
* The clock was already enabled by handoff code so there is no
@@ -69,6 +172,16 @@
out:
spin_unlock_irqrestore(&clk->lock, flags);
+ return 0;
+
+err_enable_clock:
+ unvote_rate_vdd(clk, rate);
+err_vote_vdd:
+ clk_disable(clk->depends);
+err_enable_depends:
+ clk_disable(parent);
+err_enable_parent:
+ spin_unlock_irqrestore(&clk->lock, flags);
return ret;
}
EXPORT_SYMBOL(clk_enable);
@@ -76,7 +189,6 @@
void clk_disable(struct clk *clk)
{
unsigned long flags;
- struct clk *parent;
if (!clk)
return;
@@ -85,10 +197,13 @@
if (WARN(clk->count == 0, "%s is unbalanced", clk->dbg_name))
goto out;
if (clk->count == 1) {
+ struct clk *parent = clk_get_parent(clk);
+ unsigned long rate = clk_get_rate(clk);
+
if (clk->ops->disable)
clk->ops->disable(clk);
+ unvote_rate_vdd(clk, rate);
clk_disable(clk->depends);
- parent = clk_get_parent(clk);
clk_disable(parent);
}
clk->count--;
@@ -117,10 +232,35 @@
int clk_set_rate(struct clk *clk, unsigned long rate)
{
+ unsigned long start_rate, flags;
+ int rc;
+
if (!clk->ops->set_rate)
return -ENOSYS;
- return clk->ops->set_rate(clk, rate);
+ spin_lock_irqsave(&clk->lock, flags);
+ if (clk->count) {
+ start_rate = clk_get_rate(clk);
+ /* Enforce vdd requirements for target frequency. */
+ rc = vote_rate_vdd(clk, rate);
+ if (rc)
+ goto err_vote_vdd;
+ rc = clk->ops->set_rate(clk, rate);
+ if (rc)
+ goto err_set_rate;
+ /* Release vdd requirements for starting frequency. */
+ unvote_rate_vdd(clk, start_rate);
+ } else {
+ rc = clk->ops->set_rate(clk, rate);
+ }
+ spin_unlock_irqrestore(&clk->lock, flags);
+ return rc;
+
+err_set_rate:
+ unvote_rate_vdd(clk, rate);
+err_vote_vdd:
+ spin_unlock_irqrestore(&clk->lock, flags);
+ return rc;
}
EXPORT_SYMBOL(clk_set_rate);
diff --git a/arch/arm/mach-msm/clock.h b/arch/arm/mach-msm/clock.h
index f4a7363..ed5c9c6 100644
--- a/arch/arm/mach-msm/clock.h
+++ b/arch/arm/mach-msm/clock.h
@@ -33,6 +33,32 @@
#define CLKFLAG_MIN 0x00000400
#define CLKFLAG_MAX 0x00000800
+#define MAX_VDD_LEVELS 4
+
+/**
+ * struct clk_vdd_class - Voltage scaling class
+ * @class_name: name of the class
+ * @set_vdd: function to call when applying a new voltage setting
+ * @level_votes: array of votes for each level
+ * @cur_level: the currently set voltage level
+ * @lock: lock to protect this struct
+ */
+struct clk_vdd_class {
+ const char *class_name;
+ int (*set_vdd)(struct clk_vdd_class *v_class, int level);
+ int level_votes[MAX_VDD_LEVELS];
+ unsigned cur_level;
+ spinlock_t lock;
+};
+
+#define DEFINE_VDD_CLASS(_name, _set_vdd) \
+ struct clk_vdd_class _name = { \
+ .class_name = #_name, \
+ .set_vdd = _set_vdd, \
+ .cur_level = ARRAY_SIZE(_name.level_votes), \
+ .lock = __SPIN_LOCK_UNLOCKED(lock) \
+ }
+
struct clk_ops {
int (*enable)(struct clk *clk);
void (*disable)(struct clk *clk);
@@ -57,12 +83,16 @@
* @count: enable refcount
* @lock: protects clk_enable()/clk_disable() path and @count
* @depends: non-direct parent of clock to enable when this clock is enabled
+ * @vdd_class: voltage scaling requirement class
+ * @fmax: maximum frequency in Hz supported at each voltage level
*/
struct clk {
uint32_t flags;
struct clk_ops *ops;
const char *dbg_name;
struct clk *depends;
+ struct clk_vdd_class *vdd_class;
+ unsigned long fmax[MAX_VDD_LEVELS];
struct list_head children;
struct list_head siblings;
@@ -104,6 +134,8 @@
extern struct clock_init_data qds8x50_clock_init_data;
void msm_clock_init(struct clock_init_data *data);
+int vote_vdd_level(struct clk_vdd_class *vdd_class, int level);
+int unvote_vdd_level(struct clk_vdd_class *vdd_class, int level);
#ifdef CONFIG_DEBUG_FS
int clock_debug_init(struct clock_init_data *data);
diff --git a/arch/arm/mach-msm/dal.c b/arch/arm/mach-msm/dal.c
index 218bd0f..94c02f0 100644
--- a/arch/arm/mach-msm/dal.c
+++ b/arch/arm/mach-msm/dal.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -407,7 +407,7 @@
if (!p)
return NULL;
- strncpy(p->port, port, sizeof(p->port) - 1);
+ strlcpy(p->port, port, sizeof(p->port));
p->refcount = 1;
snprintf(wq_name, sizeof(wq_name), "dalrpc_rcv_%s", port);
@@ -537,8 +537,8 @@
} else if (strnlen((char *)&h->msg.param[1],
DALRPC_MAX_PORTNAME_LEN)) {
/* another port was recommended in the response. */
- strncpy(dyn_port, (char *)&h->msg.param[1],
- DALRPC_MAX_PORTNAME_LEN);
+ strlcpy(dyn_port, (char *)&h->msg.param[1],
+ sizeof(dyn_port));
dyn_port[DALRPC_MAX_PORTNAME_LEN] = 0;
port = dyn_port;
} else if (port == dyn_port) {
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index 99e8d23..fd2be92 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -21,6 +21,7 @@
#include <mach/msm_iomap.h>
#include <mach/usbdiag.h>
#include <mach/msm_sps.h>
+#include <mach/dma.h>
#include "clock.h"
#include "devices.h"
@@ -53,13 +54,21 @@
#define MSM_HSUSB_PHYS 0x12500000
#define MSM_HSUSB_SIZE SZ_4K
-
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_0_IRQ,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18300000,
+ .end = 0x18300000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 0,
+ .sd_size = 0x800,
};
struct platform_device apq8064_device_dmov = {
@@ -67,6 +76,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
static struct resource resources_uart_gsbi1[] = {
@@ -596,7 +608,7 @@
CLK_DUMMY("core_clk", GSBI5_QUP_CLK, "spi_qsd.0", OFF),
CLK_DUMMY("core_clk", GSBI6_QUP_CLK, NULL, OFF),
CLK_DUMMY("core_clk", GSBI7_QUP_CLK, NULL, OFF),
- CLK_DUMMY("pdm_clk", PDM_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", PDM_CLK, NULL, OFF),
CLK_DUMMY("mem_clk", PMEM_CLK, NULL, OFF),
CLK_DUMMY("core_clk", PRNG_CLK, NULL, OFF),
CLK_DUMMY("core_clk", SDC1_CLK, NULL, OFF),
@@ -604,7 +616,7 @@
CLK_DUMMY("core_clk", SDC3_CLK, NULL, OFF),
CLK_DUMMY("core_clk", SDC4_CLK, NULL, OFF),
CLK_DUMMY("ref_clk", TSIF_REF_CLK, NULL, OFF),
- CLK_DUMMY("tssc_clk", TSSC_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", TSSC_CLK, NULL, OFF),
CLK_DUMMY("usb_hs_clk", USB_HS1_XCVR_CLK, NULL, OFF),
CLK_DUMMY("usb_hs_clk", USB_HS3_XCVR_CLK, NULL, OFF),
CLK_DUMMY("usb_hs_clk", USB_HS4_XCVR_CLK, NULL, OFF),
@@ -620,7 +632,7 @@
CLK_DUMMY("pcie_alt_ref_clk", PCIE_ALT_REF_CLK, NULL, OFF),
CLK_DUMMY("sata_rxoob_clk", SATA_RXOOB_CLK, NULL, OFF),
CLK_DUMMY("sata_pmalive_clk", SATA_PMALIVE_CLK, NULL, OFF),
- CLK_DUMMY("sata_phy_ref_clk", SATA_PHY_REF_CLK, NULL, OFF),
+ CLK_DUMMY("ref_clk", SATA_PHY_REF_CLK, NULL, OFF),
CLK_DUMMY("iface_clk", GSBI1_P_CLK, NULL, OFF),
CLK_DUMMY("iface_clk", GSBI2_P_CLK, NULL, OFF),
CLK_DUMMY("iface_clk", GSBI3_P_CLK, "msm_serial_hsl.0", OFF),
@@ -639,11 +651,11 @@
CLK_DUMMY("iface_clk", SDC4_P_CLK, NULL, OFF),
CLK_DUMMY("core_clk", ADM0_CLK, NULL, OFF),
CLK_DUMMY("iface_clk", ADM0_P_CLK, NULL, OFF),
- CLK_DUMMY("pmic_arb_pclk", PMIC_ARB0_P_CLK, NULL, OFF),
- CLK_DUMMY("pmic_arb_pclk", PMIC_ARB1_P_CLK, NULL, OFF),
- CLK_DUMMY("pmic_ssbi2", PMIC_SSBI2_CLK, NULL, OFF),
- CLK_DUMMY("rpm_msg_ram_pclk", RPM_MSG_RAM_P_CLK, NULL, OFF),
- CLK_DUMMY("amp_clk", AMP_CLK, NULL, OFF),
+ CLK_DUMMY("iface_clk", PMIC_ARB0_P_CLK, NULL, OFF),
+ CLK_DUMMY("iface_clk", PMIC_ARB1_P_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", PMIC_SSBI2_CLK, NULL, OFF),
+ CLK_DUMMY("mem_clk", RPM_MSG_RAM_P_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", AMP_CLK, NULL, OFF),
CLK_DUMMY("cam_clk", CAM0_CLK, NULL, OFF),
CLK_DUMMY("cam_clk", CAM1_CLK, NULL, OFF),
CLK_DUMMY("csi_src_clk", CSI0_SRC_CLK, NULL, OFF),
@@ -664,13 +676,13 @@
CLK_DUMMY("core_clk", GFX3D_CLK, NULL, OFF),
CLK_DUMMY("ijpeg_clk", IJPEG_CLK, NULL, OFF),
CLK_DUMMY("mem_clk", IMEM_CLK, NULL, OFF),
- CLK_DUMMY("jpegd_clk", JPEGD_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", JPEGD_CLK, NULL, OFF),
CLK_DUMMY("mdp_clk", MDP_CLK, NULL, OFF),
CLK_DUMMY("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, OFF),
CLK_DUMMY("lut_mdp", LUT_MDP_CLK, NULL, OFF),
- CLK_DUMMY("rot_clk", ROT_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", ROT_CLK, NULL, OFF),
CLK_DUMMY("tv_src_clk", TV_SRC_CLK, NULL, OFF),
- CLK_DUMMY("vcodec_clk", VCODEC_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", VCODEC_CLK, NULL, OFF),
CLK_DUMMY("mdp_tv_clk", MDP_TV_CLK, NULL, OFF),
CLK_DUMMY("rgb_tv_clk", RGB_TV_CLK, NULL, OFF),
CLK_DUMMY("npl_tv_clk", NPL_TV_CLK, NULL, OFF),
@@ -682,7 +694,7 @@
CLK_DUMMY("vfe_axi_clk", VFE_AXI_CLK, NULL, OFF),
CLK_DUMMY("ijpeg_axi_clk", IJPEG_AXI_CLK, NULL, OFF),
CLK_DUMMY("mdp_axi_clk", MDP_AXI_CLK, NULL, OFF),
- CLK_DUMMY("rot_axi_clk", ROT_AXI_CLK, NULL, OFF),
+ CLK_DUMMY("bus_clk", ROT_AXI_CLK, NULL, OFF),
CLK_DUMMY("vcodec_axi_clk", VCODEC_AXI_CLK, NULL, OFF),
CLK_DUMMY("vcodec_axi_a_clk", VCODEC_AXI_A_CLK, NULL, OFF),
CLK_DUMMY("vcodec_axi_b_clk", VCODEC_AXI_B_CLK, NULL, OFF),
@@ -707,8 +719,8 @@
CLK_DUMMY("jpegd_pclk", JPEGD_P_CLK, NULL, OFF),
CLK_DUMMY("mem_iface_clk", IMEM_P_CLK, NULL, OFF),
CLK_DUMMY("mdp_pclk", MDP_P_CLK, NULL, OFF),
- CLK_DUMMY("smmu_pclk", SMMU_P_CLK, NULL, OFF),
- CLK_DUMMY("rotator_pclk", ROT_P_CLK, NULL, OFF),
+ CLK_DUMMY("iface_clk", SMMU_P_CLK, "msm_smmu", OFF),
+ CLK_DUMMY("iface_clk", ROT_P_CLK, NULL, OFF),
CLK_DUMMY("vcodec_pclk", VCODEC_P_CLK, NULL, OFF),
CLK_DUMMY("vfe_pclk", VFE_P_CLK, NULL, OFF),
CLK_DUMMY("vpe_pclk", VPE_P_CLK, NULL, OFF),
@@ -724,12 +736,6 @@
CLK_DUMMY("i2s_spkr_bit_clk", SPARE_I2S_SPKR_BIT_CLK, NULL, OFF),
CLK_DUMMY("pcm_clk", PCM_CLK, NULL, OFF),
CLK_DUMMY("audio_slimbus_clk", AUDIO_SLIMBUS_CLK, NULL, OFF),
- CLK_DUMMY("iommu_clk", JPEGD_AXI_CLK, NULL, 0),
- CLK_DUMMY("iommu_clk", VFE_AXI_CLK, NULL, 0),
- CLK_DUMMY("iommu_clk", VCODEC_AXI_CLK, NULL, 0),
- CLK_DUMMY("iommu_clk", GFX3D_CLK, NULL, 0),
- CLK_DUMMY("iommu_clk", GFX2D0_CLK, NULL, 0),
- CLK_DUMMY("iommu_clk", GFX2D1_CLK, NULL, 0),
CLK_DUMMY("dfab_dsps_clk", DFAB_DSPS_CLK, NULL, 0),
CLK_DUMMY("dfab_usb_hs_clk", DFAB_USB_HS_CLK, NULL, 0),
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index b531dec..899f2e1 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -803,9 +803,18 @@
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_1_IRQ,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18320000,
+ .end = 0x18320000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 1,
+ .sd_size = 0x800,
};
struct platform_device msm8960_device_dmov = {
@@ -813,6 +822,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
static struct platform_device *msm_sdcc_devices[] __initdata = {
@@ -1285,12 +1297,12 @@
static struct msm_rot_clocks rotator_clocks[] = {
{
- .clk_name = "rot_clk",
+ .clk_name = "core_clk",
.clk_type = ROTATOR_CORE_CLK,
.clk_rate = 200 * 1000 * 1000,
},
{
- .clk_name = "rotator_pclk",
+ .clk_name = "iface_clk",
.clk_type = ROTATOR_PCLK,
.clk_rate = 0,
},
@@ -1573,7 +1585,7 @@
CLK_DUMMY("core_clk", GSBI10_QUP_CLK, NULL, OFF),
CLK_DUMMY("core_clk", GSBI11_QUP_CLK, NULL, OFF),
CLK_DUMMY("core_clk", GSBI12_QUP_CLK, NULL, OFF),
- CLK_DUMMY("pdm_clk", PDM_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", PDM_CLK, NULL, OFF),
CLK_DUMMY("mem_clk", PMEM_CLK, NULL, OFF),
CLK_DUMMY("core_clk", PRNG_CLK, NULL, OFF),
CLK_DUMMY("core_clk", SDC1_CLK, NULL, OFF),
@@ -1582,7 +1594,7 @@
CLK_DUMMY("core_clk", SDC4_CLK, NULL, OFF),
CLK_DUMMY("core_clk", SDC5_CLK, NULL, OFF),
CLK_DUMMY("core_clk", TSIF_REF_CLK, NULL, OFF),
- CLK_DUMMY("tssc_clk", TSSC_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", TSSC_CLK, NULL, OFF),
CLK_DUMMY("usb_hs_clk", USB_HS1_XCVR_CLK, NULL, OFF),
CLK_DUMMY("usb_phy_clk", USB_PHY0_CLK, NULL, OFF),
CLK_DUMMY("usb_fs_src_clk", USB_FS1_SRC_CLK, NULL, OFF),
@@ -1618,11 +1630,11 @@
CLK_DUMMY("iface_clk", SDC5_P_CLK, NULL, OFF),
CLK_DUMMY("core_clk", ADM0_CLK, NULL, OFF),
CLK_DUMMY("iface_clk", ADM0_P_CLK, NULL, OFF),
- CLK_DUMMY("pmic_arb_pclk", PMIC_ARB0_P_CLK, NULL, OFF),
- CLK_DUMMY("pmic_arb_pclk", PMIC_ARB1_P_CLK, NULL, OFF),
- CLK_DUMMY("pmic_ssbi2", PMIC_SSBI2_CLK, NULL, OFF),
- CLK_DUMMY("rpm_msg_ram_pclk", RPM_MSG_RAM_P_CLK, NULL, OFF),
- CLK_DUMMY("amp_clk", AMP_CLK, NULL, OFF),
+ CLK_DUMMY("iface_clk", PMIC_ARB0_P_CLK, NULL, OFF),
+ CLK_DUMMY("iface_clk", PMIC_ARB1_P_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", PMIC_SSBI2_CLK, NULL, OFF),
+ CLK_DUMMY("mem_clk", RPM_MSG_RAM_P_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", AMP_CLK, NULL, OFF),
CLK_DUMMY("cam_clk", CAM0_CLK, NULL, OFF),
CLK_DUMMY("cam_clk", CAM1_CLK, NULL, OFF),
CLK_DUMMY("csi_src_clk", CSI0_SRC_CLK, NULL, OFF),
@@ -1643,15 +1655,15 @@
CLK_DUMMY("core_clk", GFX3D_CLK, NULL, OFF),
CLK_DUMMY("ijpeg_clk", IJPEG_CLK, NULL, OFF),
CLK_DUMMY("mem_clk", IMEM_CLK, NULL, OFF),
- CLK_DUMMY("jpegd_clk", JPEGD_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", JPEGD_CLK, NULL, OFF),
CLK_DUMMY("mdp_clk", MDP_CLK, NULL, OFF),
CLK_DUMMY("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, OFF),
CLK_DUMMY("lut_mdp", LUT_MDP_CLK, NULL, OFF),
- CLK_DUMMY("rot_clk", ROT_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", ROT_CLK, NULL, OFF),
CLK_DUMMY("tv_src_clk", TV_SRC_CLK, NULL, OFF),
CLK_DUMMY("tv_enc_clk", TV_ENC_CLK, NULL, OFF),
CLK_DUMMY("tv_dac_clk", TV_DAC_CLK, NULL, OFF),
- CLK_DUMMY("vcodec_clk", VCODEC_CLK, NULL, OFF),
+ CLK_DUMMY("core_clk", VCODEC_CLK, NULL, OFF),
CLK_DUMMY("mdp_tv_clk", MDP_TV_CLK, NULL, OFF),
CLK_DUMMY("hdmi_clk", HDMI_TV_CLK, NULL, OFF),
CLK_DUMMY("hdmi_app_clk", HDMI_APP_CLK, NULL, OFF),
@@ -1661,7 +1673,7 @@
CLK_DUMMY("vfe_axi_clk", VFE_AXI_CLK, NULL, OFF),
CLK_DUMMY("ijpeg_axi_clk", IJPEG_AXI_CLK, NULL, OFF),
CLK_DUMMY("mdp_axi_clk", MDP_AXI_CLK, NULL, OFF),
- CLK_DUMMY("rot_axi_clk", ROT_AXI_CLK, NULL, OFF),
+ CLK_DUMMY("bus_clk", ROT_AXI_CLK, NULL, OFF),
CLK_DUMMY("vcodec_axi_clk", VCODEC_AXI_CLK, NULL, OFF),
CLK_DUMMY("vcodec_axi_a_clk", VCODEC_AXI_A_CLK, NULL, OFF),
CLK_DUMMY("vcodec_axi_b_clk", VCODEC_AXI_B_CLK, NULL, OFF),
@@ -1681,8 +1693,8 @@
CLK_DUMMY("jpegd_pclk", JPEGD_P_CLK, NULL, OFF),
CLK_DUMMY("mem_iface_clk", IMEM_P_CLK, NULL, OFF),
CLK_DUMMY("mdp_pclk", MDP_P_CLK, NULL, OFF),
- CLK_DUMMY("smmu_pclk", SMMU_P_CLK, NULL, OFF),
- CLK_DUMMY("rotator_pclk", ROT_P_CLK, NULL, OFF),
+ CLK_DUMMY("iface_clk", SMMU_P_CLK, NULL, OFF),
+ CLK_DUMMY("iface_clk", ROT_P_CLK, NULL, OFF),
CLK_DUMMY("tv_enc_pclk", TV_ENC_P_CLK, NULL, OFF),
CLK_DUMMY("vcodec_pclk", VCODEC_P_CLK, NULL, OFF),
CLK_DUMMY("vfe_pclk", VFE_P_CLK, NULL, OFF),
@@ -1698,12 +1710,12 @@
CLK_DUMMY("i2s_spkr_osr_clk", SPARE_I2S_SPKR_OSR_CLK, NULL, OFF),
CLK_DUMMY("i2s_spkr_bit_clk", SPARE_I2S_SPKR_BIT_CLK, NULL, OFF),
CLK_DUMMY("pcm_clk", PCM_CLK, NULL, OFF),
- CLK_DUMMY("iommu_clk", JPEGD_AXI_CLK, NULL, 0),
- CLK_DUMMY("iommu_clk", VFE_AXI_CLK, NULL, 0),
- CLK_DUMMY("iommu_clk", VCODEC_AXI_CLK, NULL, 0),
- CLK_DUMMY("iommu_clk", GFX3D_CLK, NULL, 0),
- CLK_DUMMY("iommu_clk", GFX2D0_CLK, NULL, 0),
- CLK_DUMMY("iommu_clk", GFX2D1_CLK, NULL, 0),
+ CLK_DUMMY("core_clk", JPEGD_AXI_CLK, NULL, 0),
+ CLK_DUMMY("core_clk", VFE_AXI_CLK, NULL, 0),
+ CLK_DUMMY("core_clk", VCODEC_AXI_CLK, NULL, 0),
+ CLK_DUMMY("core_clk", GFX3D_CLK, NULL, 0),
+ CLK_DUMMY("core_clk", GFX2D0_CLK, NULL, 0),
+ CLK_DUMMY("core_clk", GFX2D1_CLK, NULL, 0),
CLK_DUMMY("dfab_dsps_clk", DFAB_DSPS_CLK, NULL, 0),
CLK_DUMMY("dfab_usb_hs_clk", DFAB_USB_HS_CLK, NULL, 0),
@@ -1957,7 +1969,7 @@
.num_levels = 5,
.set_grp_async = NULL,
.idle_timeout = HZ/5,
- .nap_allowed = false,
+ .nap_allowed = true,
},
.clk = {
.name = {
diff --git a/arch/arm/mach-msm/devices-9615.c b/arch/arm/mach-msm/devices-9615.c
index 2e586c7..74e7871 100644
--- a/arch/arm/mach-msm/devices-9615.c
+++ b/arch/arm/mach-msm/devices-9615.c
@@ -16,6 +16,7 @@
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/msm_tsens.h>
+#include <linux/platform_data/qcom_crypto_device.h>
#include <linux/dma-mapping.h>
#include <asm/hardware/gic.h>
#include <asm/mach/flash.h>
@@ -29,7 +30,6 @@
#include <mach/msm_sps.h>
#include <mach/dma.h>
#include "devices.h"
-#include "acpuclock.h"
#include "mpm.h"
#include "spm.h"
#include "pm.h"
@@ -59,9 +59,18 @@
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_1_IRQ,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18320000,
+ .end = 0x18320000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 1,
+ .sd_size = 0x800,
};
struct platform_device msm9615_device_dmov = {
@@ -69,6 +78,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
static struct resource resources_otg[] = {
@@ -322,6 +334,117 @@
};
#endif
+#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
+ defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
+ defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
+ defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
+
+#define QCE_SIZE 0x10000
+#define QCE_0_BASE 0x18500000
+
+#define QCE_HW_KEY_SUPPORT 0
+#define QCE_SHA_HMAC_SUPPORT 1
+#define QCE_SHARE_CE_RESOURCE 1
+#define QCE_CE_SHARED 0
+
+static struct resource qcrypto_resources[] = {
+ [0] = {
+ .start = QCE_0_BASE,
+ .end = QCE_0_BASE + QCE_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "crypto_channels",
+ .start = DMOV_CE_IN_CHAN,
+ .end = DMOV_CE_OUT_CHAN,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .name = "crypto_crci_in",
+ .start = DMOV_CE_IN_CRCI,
+ .end = DMOV_CE_IN_CRCI,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .name = "crypto_crci_out",
+ .start = DMOV_CE_OUT_CRCI,
+ .end = DMOV_CE_OUT_CRCI,
+ .flags = IORESOURCE_DMA,
+ },
+};
+
+static struct resource qcedev_resources[] = {
+ [0] = {
+ .start = QCE_0_BASE,
+ .end = QCE_0_BASE + QCE_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "crypto_channels",
+ .start = DMOV_CE_IN_CHAN,
+ .end = DMOV_CE_OUT_CHAN,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .name = "crypto_crci_in",
+ .start = DMOV_CE_IN_CRCI,
+ .end = DMOV_CE_IN_CRCI,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .name = "crypto_crci_out",
+ .start = DMOV_CE_OUT_CRCI,
+ .end = DMOV_CE_OUT_CRCI,
+ .flags = IORESOURCE_DMA,
+ },
+};
+
+#endif
+
+#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
+ defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
+
+static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
+ .ce_shared = QCE_CE_SHARED,
+ .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
+ .hw_key_support = QCE_HW_KEY_SUPPORT,
+ .sha_hmac = QCE_SHA_HMAC_SUPPORT,
+};
+
+struct platform_device msm9615_qcrypto_device = {
+ .name = "qcrypto",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(qcrypto_resources),
+ .resource = qcrypto_resources,
+ .dev = {
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &qcrypto_ce_hw_suppport,
+ },
+};
+#endif
+
+#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
+ defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
+
+static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
+ .ce_shared = QCE_CE_SHARED,
+ .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
+ .hw_key_support = QCE_HW_KEY_SUPPORT,
+ .sha_hmac = QCE_SHA_HMAC_SUPPORT,
+};
+
+struct platform_device msm9615_qcedev_device = {
+ .name = "qce",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(qcedev_resources),
+ .resource = qcedev_resources,
+ .dev = {
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &qcedev_ce_hw_suppport,
+ },
+};
+#endif
+
#define MSM_SDC1_BASE 0x12180000
#define MSM_SDC1_DML_BASE (MSM_SDC1_BASE + 0x800)
#define MSM_SDC1_BAM_BASE (MSM_SDC1_BASE + 0x2000)
@@ -667,8 +790,6 @@
void __init msm9615_device_init(void)
{
msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
- msm_clock_init(&msm9615_clock_init_data);
- acpuclk_init(&acpuclk_9615_soc_data);
BUG_ON(msm_rpm_init(&msm_rpm_data));
BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
ARRAY_SIZE(msm_rpmrs_levels)));
diff --git a/arch/arm/mach-msm/devices-fsm9xxx.c b/arch/arm/mach-msm/devices-fsm9xxx.c
index 426be10..d46e4d6 100644
--- a/arch/arm/mach-msm/devices-fsm9xxx.c
+++ b/arch/arm/mach-msm/devices-fsm9xxx.c
@@ -232,12 +232,21 @@
* ADM
*/
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t) MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x94610000,
+ .end = 0x94610000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -245,6 +254,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
/*
diff --git a/arch/arm/mach-msm/devices-iommu.c b/arch/arm/mach-msm/devices-iommu.c
index 73c96fb..3d2d2e7 100644
--- a/arch/arm/mach-msm/devices-iommu.c
+++ b/arch/arm/mach-msm/devices-iommu.c
@@ -16,8 +16,6 @@
#include <mach/irqs.h>
#include <mach/iommu.h>
#include <mach/socinfo.h>
-#include <mach/irqs-8960.h>
-#include <mach/irqs-8064.h>
static struct resource msm_iommu_jpegd_resources[] = {
{
@@ -28,14 +26,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_JPEGD_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_JPEGD_CB_SC_NON_SECURE_IRQ,
+ .start = 98,
+ .end = 98,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_JPEGD_CB_SC_SECURE_IRQ,
- .end = SMMU_JPEGD_CB_SC_SECURE_IRQ,
+ .start = 97,
+ .end = 97,
.flags = IORESOURCE_IRQ,
},
};
@@ -49,14 +47,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_VPE_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_VPE_CB_SC_NON_SECURE_IRQ,
+ .start = 84,
+ .end = 84,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_VPE_CB_SC_SECURE_IRQ,
- .end = SMMU_VPE_CB_SC_SECURE_IRQ,
+ .start = 83,
+ .end = 83,
.flags = IORESOURCE_IRQ,
},
};
@@ -70,14 +68,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_MDP0_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_MDP0_CB_SC_NON_SECURE_IRQ,
+ .start = 96,
+ .end = 96,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_MDP0_CB_SC_SECURE_IRQ,
- .end = SMMU_MDP0_CB_SC_SECURE_IRQ,
+ .start = 95,
+ .end = 95,
.flags = IORESOURCE_IRQ,
},
};
@@ -91,14 +89,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_MDP1_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_MDP1_CB_SC_NON_SECURE_IRQ,
+ .start = 94,
+ .end = 94,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_MDP1_CB_SC_SECURE_IRQ,
- .end = SMMU_MDP1_CB_SC_SECURE_IRQ,
+ .start = 93,
+ .end = 93,
.flags = IORESOURCE_IRQ,
},
};
@@ -112,14 +110,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_ROT_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_ROT_CB_SC_NON_SECURE_IRQ,
+ .start = 92,
+ .end = 92,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_ROT_CB_SC_SECURE_IRQ,
- .end = SMMU_ROT_CB_SC_SECURE_IRQ,
+ .start = 91,
+ .end = 91,
.flags = IORESOURCE_IRQ,
},
};
@@ -133,14 +131,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_IJPEG_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_IJPEG_CB_SC_NON_SECURE_IRQ,
+ .start = 100,
+ .end = 100,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_IJPEG_CB_SC_SECURE_IRQ,
- .end = SMMU_IJPEG_CB_SC_SECURE_IRQ,
+ .start = 99,
+ .end = 99,
.flags = IORESOURCE_IRQ,
},
};
@@ -154,14 +152,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_VFE_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_VFE_CB_SC_NON_SECURE_IRQ,
+ .start = 86,
+ .end = 86,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_VFE_CB_SC_SECURE_IRQ,
- .end = SMMU_VFE_CB_SC_SECURE_IRQ,
+ .start = 85,
+ .end = 85,
.flags = IORESOURCE_IRQ,
},
};
@@ -175,14 +173,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ,
+ .start = 90,
+ .end = 90,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_VCODEC_A_CB_SC_SECURE_IRQ,
- .end = SMMU_VCODEC_A_CB_SC_SECURE_IRQ,
+ .start = 89,
+ .end = 89,
.flags = IORESOURCE_IRQ,
},
};
@@ -196,14 +194,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ,
+ .start = 88,
+ .end = 88,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_VCODEC_B_CB_SC_SECURE_IRQ,
- .end = SMMU_VCODEC_B_CB_SC_SECURE_IRQ,
+ .start = 87,
+ .end = 87,
.flags = IORESOURCE_IRQ,
},
};
@@ -217,14 +215,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_GFX3D_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_GFX3D_CB_SC_NON_SECURE_IRQ,
+ .start = 102,
+ .end = 102,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_GFX3D_CB_SC_SECURE_IRQ,
- .end = SMMU_GFX3D_CB_SC_SECURE_IRQ,
+ .start = 101,
+ .end = 101,
.flags = IORESOURCE_IRQ,
},
};
@@ -238,14 +236,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_GFX3D1_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_GFX3D1_CB_SC_NON_SECURE_IRQ,
+ .start = 243,
+ .end = 243,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_GFX3D1_CB_SC_SECURE_IRQ,
- .end = SMMU_GFX3D1_CB_SC_SECURE_IRQ,
+ .start = 242,
+ .end = 242,
.flags = IORESOURCE_IRQ,
},
};
@@ -259,14 +257,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_GFX2D0_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_GFX2D0_CB_SC_NON_SECURE_IRQ,
+ .start = 104,
+ .end = 104,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_GFX2D0_CB_SC_SECURE_IRQ,
- .end = SMMU_GFX2D0_CB_SC_SECURE_IRQ,
+ .start = 103,
+ .end = 103,
.flags = IORESOURCE_IRQ,
},
};
@@ -280,14 +278,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_GFX2D1_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_GFX2D1_CB_SC_NON_SECURE_IRQ,
+ .start = 243,
+ .end = 243,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_GFX2D1_CB_SC_SECURE_IRQ,
- .end = SMMU_GFX2D1_CB_SC_SECURE_IRQ,
+ .start = 242,
+ .end = 242,
.flags = IORESOURCE_IRQ,
},
};
@@ -301,14 +299,14 @@
},
{
.name = "nonsecure_irq",
- .start = SMMU_VCAP_CB_SC_NON_SECURE_IRQ,
- .end = SMMU_VCAP_CB_SC_NON_SECURE_IRQ,
+ .start = 269,
+ .end = 269,
.flags = IORESOURCE_IRQ,
},
{
.name = "secure_irq",
- .start = SMMU_VCAP_CB_SC_SECURE_IRQ,
- .end = SMMU_VCAP_CB_SC_SECURE_IRQ,
+ .start = 268,
+ .end = 268,
.flags = IORESOURCE_IRQ,
},
};
@@ -1059,6 +1057,10 @@
static int __init iommu_init(void)
{
int ret;
+ if (!msm_soc_version_supports_iommu()) {
+ pr_err("IOMMU is not supported on this SoC version.\n");
+ return -ENODEV;
+ }
ret = platform_device_register(&msm_root_iommu_dev);
if (ret != 0) {
diff --git a/arch/arm/mach-msm/devices-msm7x01a.c b/arch/arm/mach-msm/devices-msm7x01a.c
index 9ed6fd1..1b9eb86 100644
--- a/arch/arm/mach-msm/devices-msm7x01a.c
+++ b/arch/arm/mach-msm/devices-msm7x01a.c
@@ -384,12 +384,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -397,6 +406,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm7x25.c b/arch/arm/mach-msm/devices-msm7x25.c
index ca3caa2..d918315 100644
--- a/arch/arm/mach-msm/devices-msm7x25.c
+++ b/arch/arm/mach-msm/devices-msm7x25.c
@@ -407,12 +407,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -420,6 +429,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
@@ -930,7 +942,7 @@
CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
CLK_LOOKUP("ebi2_clk", ebi2_clk.c, NULL),
CLK_LOOKUP("ecodec_clk", ecodec_clk.c, NULL),
- CLK_LOOKUP("gp_clk", gp_clk.c, NULL),
+ CLK_LOOKUP("core_clk", gp_clk.c, NULL),
CLK_LOOKUP("core_clk", i2c_clk.c, "msm_i2c.0"),
CLK_LOOKUP("icodec_rx_clk", icodec_rx_clk.c, NULL),
CLK_LOOKUP("icodec_tx_clk", icodec_tx_clk.c, NULL),
diff --git a/arch/arm/mach-msm/devices-msm7x27.c b/arch/arm/mach-msm/devices-msm7x27.c
index 3772884..1bb9a21 100644
--- a/arch/arm/mach-msm/devices-msm7x27.c
+++ b/arch/arm/mach-msm/devices-msm7x27.c
@@ -372,12 +372,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -385,6 +394,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm7x27a.c b/arch/arm/mach-msm/devices-msm7x27a.c
index 488db75..7008bd5 100644
--- a/arch/arm/mach-msm/devices-msm7x27a.c
+++ b/arch/arm/mach-msm/devices-msm7x27a.c
@@ -188,17 +188,29 @@
static struct resource msm_dmov_resource[] = {
{
- .start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
- .flags = IORESOURCE_IRQ,
+ .start = INT_ADM_AARM,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
},
};
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
+};
+
struct platform_device msm_device_dmov = {
- .name = "msm_dmov",
- .id = -1,
- .resource = msm_dmov_resource,
- .num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .name = "msm_dmov",
+ .id = -1,
+ .resource = msm_dmov_resource,
+ .num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
struct platform_device msm_device_smd = {
diff --git a/arch/arm/mach-msm/devices-msm7x30.c b/arch/arm/mach-msm/devices-msm7x30.c
index d7832a3..b76a844 100644
--- a/arch/arm/mach-msm/devices-msm7x30.c
+++ b/arch/arm/mach-msm/devices-msm7x30.c
@@ -585,12 +585,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xAC400000,
+ .end = 0xAC400000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 2,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -598,6 +607,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
@@ -988,17 +1000,17 @@
static struct msm_rot_clocks rotator_clocks[] = {
{
- .clk_name = "rotator_clk",
+ .clk_name = "core_clk",
.clk_type = ROTATOR_CORE_CLK,
.clk_rate = 0,
},
{
- .clk_name = "rotator_pclk",
+ .clk_name = "iface_clk",
.clk_type = ROTATOR_PCLK,
.clk_rate = 0,
},
{
- .clk_name = "rotator_imem_clk",
+ .clk_name = "mem_clk",
.clk_type = ROTATOR_IMEM_CLK,
.clk_rate = 0,
},
diff --git a/arch/arm/mach-msm/devices-msm8x60.c b/arch/arm/mach-msm/devices-msm8x60.c
index 445f1d4..49f3d3b 100644
--- a/arch/arm/mach-msm/devices-msm8x60.c
+++ b/arch/arm/mach-msm/devices-msm8x60.c
@@ -1424,12 +1424,12 @@
static struct msm_rot_clocks rotator_clocks[] = {
{
- .clk_name = "rot_clk",
+ .clk_name = "core_clk",
.clk_type = ROTATOR_CORE_CLK,
.clk_rate = 160 * 1000 * 1000,
},
{
- .clk_name = "rotator_pclk",
+ .clk_name = "iface_clk",
.clk_type = ROTATOR_PCLK,
.clk_rate = 0,
},
@@ -1833,20 +1833,38 @@
.id = -1,
};
-struct resource msm_dmov_resource_adm0[] = {
+static struct resource msm_dmov_resource_adm0[] = {
{
.start = INT_ADM0_AARM,
- .end = (resource_size_t)MSM_DMOV_ADM0_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18320000,
+ .end = 0x18320000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
};
-struct resource msm_dmov_resource_adm1[] = {
+static struct resource msm_dmov_resource_adm1[] = {
{
.start = INT_ADM1_AARM,
- .end = (resource_size_t)MSM_DMOV_ADM1_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18420000,
+ .end = 0x18420000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata_adm0 = {
+ .sd = 1,
+ .sd_size = 0x800,
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata_adm1 = {
+ .sd = 1,
+ .sd_size = 0x800,
};
struct platform_device msm_device_dmov_adm0 = {
@@ -1854,6 +1872,9 @@
.id = 0,
.resource = msm_dmov_resource_adm0,
.num_resources = ARRAY_SIZE(msm_dmov_resource_adm0),
+ .dev = {
+ .platform_data = &msm_dmov_pdata_adm0,
+ },
};
struct platform_device msm_device_dmov_adm1 = {
@@ -1861,6 +1882,9 @@
.id = 1,
.resource = msm_dmov_resource_adm1,
.num_resources = ARRAY_SIZE(msm_dmov_resource_adm1),
+ .dev = {
+ .platform_data = &msm_dmov_pdata_adm1,
+ },
};
/* MSM Video core device */
diff --git a/arch/arm/mach-msm/devices-msm8x60.h b/arch/arm/mach-msm/devices-msm8x60.h
index 9fbe818..6b7d141 100644
--- a/arch/arm/mach-msm/devices-msm8x60.h
+++ b/arch/arm/mach-msm/devices-msm8x60.h
@@ -51,6 +51,7 @@
extern struct platform_device msm_bus_mm_fabric;
extern struct platform_device msm_bus_sys_fpb;
extern struct platform_device msm_bus_cpss_fpb;
+extern struct platform_device msm_bus_def_fab;
extern struct platform_device msm_device_smd;
extern struct platform_device msm_device_gpio;
diff --git a/arch/arm/mach-msm/devices-qsd8x50.c b/arch/arm/mach-msm/devices-qsd8x50.c
index 5ae5b8b..2367719 100644
--- a/arch/arm/mach-msm/devices-qsd8x50.c
+++ b/arch/arm/mach-msm/devices-qsd8x50.c
@@ -438,12 +438,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -451,6 +460,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0300000
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index 1ebc2a7..1748838 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -187,10 +187,19 @@
struct platform_device *msm_add_gsbi9_uart(void);
extern struct platform_device msm_device_touchscreen;
-extern struct pil_device peripheral_dsps;
extern struct platform_device led_pdev;
extern struct platform_device ion_dev;
extern struct platform_device msm_rpm_device;
extern struct platform_device msm_device_rng;
+
+#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
+ defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
+extern struct platform_device msm9615_qcrypto_device;
+#endif
+
+#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
+ defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
+extern struct platform_device msm9615_qcedev_device;
+#endif
#endif
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c
index ddf7732..ad1aecd 100644
--- a/arch/arm/mach-msm/dma.c
+++ b/arch/arm/mach-msm/dma.c
@@ -57,6 +57,8 @@
struct msm_dmov_crci_conf *crci_conf;
struct msm_dmov_chan_conf *chan_conf;
int channel_active;
+ int sd;
+ size_t sd_size;
struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT];
struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT];
spinlock_t lock;
@@ -185,7 +187,8 @@
#endif
#define MSM_DMOV_ID_COUNT (MSM_DMOV_CHANNEL_COUNT * ARRAY_SIZE(dmov_conf))
-#define DMOV_REG(name, adm) ((name) + (dmov_conf[adm].base))
+#define DMOV_REG(name, adm) ((name) + (dmov_conf[adm].base) +\
+ (dmov_conf[adm].sd * dmov_conf[adm].sd_size))
#define DMOV_ID_TO_ADM(id) ((id) / MSM_DMOV_CHANNEL_COUNT)
#define DMOV_ID_TO_CHAN(id) ((id) % MSM_DMOV_CHANNEL_COUNT)
#define DMOV_CHAN_ADM_TO_ID(ch, adm) ((ch) + (adm) * MSM_DMOV_CHANNEL_COUNT)
@@ -620,33 +623,46 @@
int adm = (pdev->id >= 0) ? pdev->id : 0;
int i;
int ret;
- struct resource *res =
+ struct msm_dmov_pdata *pdata = pdev->dev.platform_data;
+ struct resource *irqres =
platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ struct resource *mres =
+ platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (res) {
- dmov_conf[adm].irq = res->start;
- dmov_conf[adm].base = (void *)res->end;
+ if (pdata) {
+ dmov_conf[adm].sd = pdata->sd;
+ dmov_conf[adm].sd_size = pdata->sd_size;
}
- if (!dmov_conf[adm].base || !dmov_conf[adm].irq)
+ if (!dmov_conf[adm].sd_size)
return -ENXIO;
+ if (!irqres || !irqres->start)
+ return -ENXIO;
+ dmov_conf[adm].irq = irqres->start;
+
+ if (!mres || !mres->start)
+ return -ENXIO;
+ dmov_conf[adm].base = ioremap_nocache(mres->start, resource_size(mres));
+ if (!dmov_conf[adm].base)
+ return -ENOMEM;
+
ret = request_irq(dmov_conf[adm].irq, msm_datamover_irq_handler,
0, "msmdatamover", NULL);
if (ret) {
PRINT_ERROR("Requesting ADM%d irq %d failed\n", adm,
dmov_conf[adm].irq);
- return ret;
+ goto out_map;
}
disable_irq(dmov_conf[adm].irq);
ret = msm_dmov_init_clocks(pdev);
if (ret) {
PRINT_ERROR("Requesting ADM%d clocks failed\n", adm);
- return -ENOENT;
+ goto out_irq;
}
ret = msm_dmov_clk_toggle(adm, 1);
if (ret) {
PRINT_ERROR("Enabling ADM%d clocks failed\n", adm);
- return -ENOENT;
+ goto out_irq;
}
config_datamover(adm);
@@ -661,6 +677,11 @@
wmb();
msm_dmov_clk_toggle(adm, 0);
return ret;
+out_irq:
+ free_irq(dmov_conf[adm].irq, NULL);
+out_map:
+ iounmap(dmov_conf[adm].base);
+ return ret;
}
static struct platform_driver msm_dmov_driver = {
diff --git a/arch/arm/mach-msm/footswitch-8x60.c b/arch/arm/mach-msm/footswitch-8x60.c
index 6ece538..98447fa 100644
--- a/arch/arm/mach-msm/footswitch-8x60.c
+++ b/arch/arm/mach-msm/footswitch-8x60.c
@@ -42,6 +42,7 @@
#define VED_GFS_CTL_REG REG(0x0194)
#define VFE_GFS_CTL_REG REG(0x0198)
#define VPE_GFS_CTL_REG REG(0x019C)
+#define VCAP_GFS_CTL_REG REG(0x0254)
#define CLAMP_BIT BIT(5)
#define ENABLE_BIT BIT(8)
@@ -469,6 +470,9 @@
FOOTSWITCH(FS_VPE, "fs_vpe", &standard_fs_ops,
VPE_GFS_CTL_REG, 31, true, 0,
MSM_BUS_MASTER_VPE, 0),
+ FOOTSWITCH(FS_VCAP, "fs_vcap", &standard_fs_ops,
+ VCAP_GFS_CTL_REG, 31, true, 0,
+ MSM_BUS_MASTER_VIDEO_CAP, 0),
};
static int footswitch_probe(struct platform_device *pdev)
diff --git a/arch/arm/mach-msm/footswitch.h b/arch/arm/mach-msm/footswitch.h
index 06b7c79..4882ff0 100644
--- a/arch/arm/mach-msm/footswitch.h
+++ b/arch/arm/mach-msm/footswitch.h
@@ -27,7 +27,8 @@
#define FS_VED 7
#define FS_VFE 8
#define FS_VPE 9
-#define MAX_FS 10
+#define FS_VCAP 10
+#define MAX_FS 11
#define FS_GENERIC(_drv_name, _id, _name) (&(struct platform_device){ \
.name = (_drv_name), \
diff --git a/arch/arm/mach-msm/idle.h b/arch/arm/mach-msm/idle.h
index 740ef91..138db45 100644
--- a/arch/arm/mach-msm/idle.h
+++ b/arch/arm/mach-msm/idle.h
@@ -17,6 +17,7 @@
int msm_arch_idle(void);
int msm_pm_collapse(void);
void msm_pm_collapse_exit(void);
+void msm_warmboot_entry(void);
#ifdef CONFIG_CPU_V7
void msm_pm_boot_entry(void);
diff --git a/arch/arm/mach-msm/include/mach/bam_dmux.h b/arch/arm/mach-msm/include/mach/bam_dmux.h
index e5ec166..a2b0126 100644
--- a/arch/arm/mach-msm/include/mach/bam_dmux.h
+++ b/arch/arm/mach-msm/include/mach/bam_dmux.h
@@ -35,6 +35,8 @@
enum {
BAM_DMUX_RECEIVE, /* data is struct sk_buff */
BAM_DMUX_WRITE_DONE, /* data is struct sk_buff */
+ BAM_DMUX_UL_CONNECTED, /* data is null */
+ BAM_DMUX_UL_DISCONNECTED, /*data is null */
};
/*
@@ -55,6 +57,8 @@
int msm_bam_dmux_close(uint32_t id);
int msm_bam_dmux_write(uint32_t id, struct sk_buff *skb);
+
+void msm_bam_dmux_kickoff_ul_wakeup(void);
#else
int msm_bam_dmux_open(uint32_t id, void *priv,
void (*notify)(void *priv, int event_type,
@@ -72,5 +76,9 @@
{
return -ENODEV;
}
+
+void msm_bam_dmux_kickoff_ul_wakeup(void)
+{
+}
#endif
#endif /* _BAM_DMUX_H */
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 349b2d0..e7f156e 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -23,6 +23,7 @@
#include <linux/usb.h>
#include <linux/leds-pmic8058.h>
#include <linux/clkdev.h>
+#include <linux/of_platform.h>
#include <linux/msm_ssbi.h>
#include <mach/msm_bus.h>
@@ -92,7 +93,7 @@
#define MSM_CAMERA_FLASH_SRC_PWM (0x00000001<<1)
#define MSM_CAMERA_FLASH_SRC_CURRENT_DRIVER (0x00000001<<2)
#define MSM_CAMERA_FLASH_SRC_EXT (0x00000001<<3)
-
+#define MSM_CAMERA_FLASH_SRC_LED (0x00000001<<3)
struct msm_camera_sensor_flash_pmic {
uint8_t num_of_src;
@@ -124,6 +125,11 @@
struct msm_cam_expander_info *expander_info;
};
+struct msm_camera_sensor_flash_led {
+ const char *led_name;
+ const int led_name_len;
+};
+
struct msm_camera_sensor_flash_src {
int flash_sr_type;
@@ -134,6 +140,7 @@
current_driver_src;
struct msm_camera_sensor_flash_external
ext_driver_src;
+ struct msm_camera_sensor_flash_led led_src;
} _fsrc;
};
@@ -212,7 +219,7 @@
struct msm_actuator_info *actuator_info;
};
-int __init msm_get_cam_resources(struct msm_camera_sensor_info *);
+int msm_get_cam_resources(struct msm_camera_sensor_info *);
struct clk_lookup;
@@ -410,23 +417,30 @@
#endif
/* common init routines for use by arch/arm/mach-msm/board-*.c */
-void __init msm_add_devices(void);
-void __init msm_map_common_io(void);
-void __init msm_map_qsd8x50_io(void);
-void __init msm_map_msm8x60_io(void);
-void __init msm_map_msm8960_io(void);
-void __init msm_map_apq8064_io(void);
-void __init msm_map_msm7x30_io(void);
-void __init msm_map_fsm9xxx_io(void);
-void __init msm_init_irq(void);
+#ifdef CONFIG_OF_DEVICE
+void msm_copper_init(struct of_dev_auxdata **);
+#endif
+void msm_add_devices(void);
+void msm_copper_add_devices(void);
+void msm_map_common_io(void);
+void msm_map_qsd8x50_io(void);
+void msm_map_msm8x60_io(void);
+void msm_map_msm8960_io(void);
+void msm_map_msm8930_io(void);
+void msm_map_apq8064_io(void);
+void msm_map_msm7x30_io(void);
+void msm_map_fsm9xxx_io(void);
+void msm_map_copper_io(void);
+void msm_init_irq(void);
+void msm_copper_init_irq(void);
void vic_handle_irq(struct pt_regs *regs);
struct mmc_platform_data;
-int __init msm_add_sdcc(unsigned int controller,
+int msm_add_sdcc(unsigned int controller,
struct mmc_platform_data *plat);
struct msm_usb_host_platform_data;
-int __init msm_add_host(unsigned int host,
+int msm_add_host(unsigned int host,
struct msm_usb_host_platform_data *plat);
#if defined(CONFIG_USB_FUNCTION_MSM_HSUSB) \
|| defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_MSM_72K_MODULE)
@@ -435,8 +449,8 @@
static inline void msm_hsusb_set_vbus_state(int online) {}
#endif
-void __init msm_snddev_init(void);
-void __init msm_snddev_init_timpani(void);
+void msm_snddev_init(void);
+void msm_snddev_init_timpani(void);
void msm_snddev_poweramp_on(void);
void msm_snddev_poweramp_off(void);
void msm_snddev_hsed_voltage_on(void);
diff --git a/arch/arm/mach-msm/include/mach/cpu.h b/arch/arm/mach-msm/include/mach/cpu.h
deleted file mode 100644
index 0308b7b..0000000
--- a/arch/arm/mach-msm/include/mach/cpu.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ARCH_ARM_MACH_MSM_CPU_H__
-#define __ARCH_ARM_MACH_MSM_CPU_H__
-
-/* TODO: For now, only one CPU can be compiled at a time. */
-
-#define cpu_is_msm7x01() 0
-#define cpu_is_msm7x30() 0
-#define cpu_is_qsd8x50() 0
-#define cpu_is_msm8x60() 0
-#define cpu_is_msm8960() 0
-
-#ifdef CONFIG_ARCH_MSM7X00A
-# undef cpu_is_msm7x01
-# define cpu_is_msm7x01() 1
-#endif
-
-#ifdef CONFIG_ARCH_MSM7X30
-# undef cpu_is_msm7x30
-# define cpu_is_msm7x30() 1
-#endif
-
-#ifdef CONFIG_ARCH_QSD8X50
-# undef cpu_is_qsd8x50
-# define cpu_is_qsd8x50() 1
-#endif
-
-#ifdef CONFIG_ARCH_MSM8X60
-# undef cpu_is_msm8x60
-# define cpu_is_msm8x60() 1
-#endif
-
-#ifdef CONFIG_ARCH_MSM8960
-# undef cpu_is_msm8960
-# define cpu_is_msm8960() 1
-#endif
-
-#endif
diff --git a/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h b/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h
index 300ee87..e284267 100644
--- a/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h
+++ b/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h
@@ -13,12 +13,6 @@
#ifndef __ASM_ARCH_MSM_DMA_FSM9XXX_H
#define __ASM_ARCH_MSM_DMA_FSM9XXX_H
-#define DMOV_SD_SIZE 0x1400
-#define DMOV_SD_MASTER 0
-#define DMOV_SD_AARM 3
-#define DMOV_SD_MASTER_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_MASTER)
-#define DMOV_SD_AARM_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_AARM)
-
/* DMA channels allocated to Scorpion */
#define DMOV_GP_CHAN 4
#define DMOV_CE1_IN_CHAN 5
diff --git a/arch/arm/mach-msm/include/mach/dma.h b/arch/arm/mach-msm/include/mach/dma.h
index 9c331a4..1474fcb 100644
--- a/arch/arm/mach-msm/include/mach/dma.h
+++ b/arch/arm/mach-msm/include/mach/dma.h
@@ -38,6 +38,11 @@
void *user; /* Pointer for caller's reference */
};
+struct msm_dmov_pdata {
+ int sd;
+ size_t sd_size;
+};
+
void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd);
void msm_dmov_enqueue_cmd_ext(unsigned id, struct msm_dmov_cmd *cmd);
void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful);
@@ -46,64 +51,37 @@
#define DMOV_CRCIS_PER_CONF 10
-#define DMOV_ADDR(off, ch, sd) ((DMOV_SD_SIZE*(sd)) + (off) + ((ch) << 2))
-#define DMOV_SD0(off, ch) DMOV_ADDR(off, ch, 0)
-#define DMOV_SD1(off, ch) DMOV_ADDR(off, ch, 1)
-#define DMOV_SD2(off, ch) DMOV_ADDR(off, ch, 2)
-#define DMOV_SD3(off, ch) DMOV_ADDR(off, ch, 3)
+#define DMOV_ADDR(off, ch) ((off) + ((ch) << 2))
-#if defined(CONFIG_ARCH_MSM7X30)
-#define DMOV_SD_SIZE 0x400
-#define DMOV_SD_AARM 2
-#elif defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_MSM9615)
-#define DMOV_SD_SIZE 0x800
-#define DMOV_SD_AARM 1
-#elif defined(CONFIG_ARCH_APQ8064)
-#define DMOV_SD_SIZE 0x800
-#define DMOV_SD_AARM 0
-#elif defined(CONFIG_MSM_ADM3)
-#define DMOV_SD_SIZE 0x800
-#define DMOV_SD_MASTER 1
-#define DMOV_SD_AARM 1
-#define DMOV_SD_MASTER_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_MASTER)
-#elif defined(CONFIG_ARCH_FSM9XXX)
-/* defined in dma-fsm9xxx.h */
-#else
-#define DMOV_SD_SIZE 0x400
-#define DMOV_SD_AARM 3
-#endif
-
-#define DMOV_SD_AARM_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_AARM)
-
-#define DMOV_CMD_PTR(ch) DMOV_SD_AARM_ADDR(0x000, ch)
+#define DMOV_CMD_PTR(ch) DMOV_ADDR(0x000, ch)
#define DMOV_CMD_LIST (0 << 29) /* does not work */
#define DMOV_CMD_PTR_LIST (1 << 29) /* works */
#define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */
#define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */
#define DMOV_CMD_ADDR(addr) ((addr) >> 3)
-#define DMOV_RSLT(ch) DMOV_SD_AARM_ADDR(0x040, ch)
+#define DMOV_RSLT(ch) DMOV_ADDR(0x040, ch)
#define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */
#define DMOV_RSLT_ERROR (1 << 3)
#define DMOV_RSLT_FLUSH (1 << 2)
#define DMOV_RSLT_DONE (1 << 1) /* top pointer done */
#define DMOV_RSLT_USER (1 << 0) /* command with FR force result */
-#define DMOV_FLUSH0(ch) DMOV_SD_AARM_ADDR(0x080, ch)
-#define DMOV_FLUSH1(ch) DMOV_SD_AARM_ADDR(0x0C0, ch)
-#define DMOV_FLUSH2(ch) DMOV_SD_AARM_ADDR(0x100, ch)
-#define DMOV_FLUSH3(ch) DMOV_SD_AARM_ADDR(0x140, ch)
-#define DMOV_FLUSH4(ch) DMOV_SD_AARM_ADDR(0x180, ch)
-#define DMOV_FLUSH5(ch) DMOV_SD_AARM_ADDR(0x1C0, ch)
+#define DMOV_FLUSH0(ch) DMOV_ADDR(0x080, ch)
+#define DMOV_FLUSH1(ch) DMOV_ADDR(0x0C0, ch)
+#define DMOV_FLUSH2(ch) DMOV_ADDR(0x100, ch)
+#define DMOV_FLUSH3(ch) DMOV_ADDR(0x140, ch)
+#define DMOV_FLUSH4(ch) DMOV_ADDR(0x180, ch)
+#define DMOV_FLUSH5(ch) DMOV_ADDR(0x1C0, ch)
#define DMOV_FLUSH_TYPE (1 << 31)
-#define DMOV_STATUS(ch) DMOV_SD_AARM_ADDR(0x200, ch)
+#define DMOV_STATUS(ch) DMOV_ADDR(0x200, ch)
#define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29))
#define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3)
#define DMOV_STATUS_RSLT_VALID (1 << 1)
#define DMOV_STATUS_CMD_PTR_RDY (1 << 0)
-#define DMOV_CONF(ch) DMOV_SD_MASTER_ADDR(0x240, ch)
+#define DMOV_CONF(ch) DMOV_ADDR(0x240, ch)
#define DMOV_CONF_SD(sd) (((sd & 4) << 11) | ((sd & 3) << 4))
#define DMOV_CONF_IRQ_EN (1 << 6)
#define DMOV_CONF_FORCE_RSLT_EN (1 << 7)
@@ -111,28 +89,28 @@
#define DMOV_CONF_MPU_DISABLE (1 << 11)
#define DMOV_CONF_PRIORITY(n) (n << 0)
-#define DMOV_DBG_ERR(ci) DMOV_SD_MASTER_ADDR(0x280, ci)
+#define DMOV_DBG_ERR(ci) DMOV_ADDR(0x280, ci)
-#define DMOV_RSLT_CONF(ch) DMOV_SD_AARM_ADDR(0x300, ch)
+#define DMOV_RSLT_CONF(ch) DMOV_ADDR(0x300, ch)
#define DMOV_RSLT_CONF_FORCE_TOP_PTR_RSLT (1 << 2)
#define DMOV_RSLT_CONF_FORCE_FLUSH_RSLT (1 << 1)
#define DMOV_RSLT_CONF_IRQ_EN (1 << 0)
-#define DMOV_ISR DMOV_SD_AARM_ADDR(0x380, 0)
+#define DMOV_ISR DMOV_ADDR(0x380, 0)
-#define DMOV_CI_CONF(ci) DMOV_SD_MASTER_ADDR(0x390, ci)
+#define DMOV_CI_CONF(ci) DMOV_ADDR(0x390, ci)
#define DMOV_CI_CONF_RANGE_END(n) ((n) << 24)
#define DMOV_CI_CONF_RANGE_START(n) ((n) << 16)
#define DMOV_CI_CONF_MAX_BURST(n) ((n) << 0)
-#define DMOV_CI_DBG_ERR(ci) DMOV_SD_MASTER_ADDR(0x3B0, ci)
+#define DMOV_CI_DBG_ERR(ci) DMOV_ADDR(0x3B0, ci)
-#define DMOV_CRCI_CONF0 DMOV_SD_MASTER_ADDR(0x3D0, 0)
-#define DMOV_CRCI_CONF1 DMOV_SD_MASTER_ADDR(0x3D4, 0)
+#define DMOV_CRCI_CONF0 DMOV_ADDR(0x3D0, 0)
+#define DMOV_CRCI_CONF1 DMOV_ADDR(0x3D4, 0)
#define DMOV_CRCI_CONF0_SD(crci, sd) (sd << (crci*3))
#define DMOV_CRCI_CONF1_SD(crci, sd) (sd << ((crci-DMOV_CRCIS_PER_CONF)*3))
-#define DMOV_CRCI_CTL(crci) DMOV_SD_AARM_ADDR(0x400, crci)
+#define DMOV_CRCI_CTL(crci) DMOV_ADDR(0x400, crci)
#define DMOV_CRCI_CTL_BLK_SZ(n) ((n) << 0)
#define DMOV_CRCI_CTL_RST (1 << 17)
#define DMOV_CRCI_MUX (1 << 18)
diff --git a/arch/arm/mach-msm/include/mach/iommu.h b/arch/arm/mach-msm/include/mach/iommu.h
index 5542ff4..9405459 100644
--- a/arch/arm/mach-msm/include/mach/iommu.h
+++ b/arch/arm/mach-msm/include/mach/iommu.h
@@ -15,6 +15,7 @@
#include <linux/interrupt.h>
#include <linux/clk.h>
+#include <mach/socinfo.h>
/* Sharability attributes of MSM IOMMU mappings */
#define MSM_IOMMU_ATTR_NON_SH 0x0
@@ -121,3 +122,17 @@
#endif
#endif
+
+static inline int msm_soc_version_supports_iommu(void)
+{
+ if (cpu_is_msm8960() &&
+ SOCINFO_VERSION_MAJOR(socinfo_get_version()) < 2)
+ return 0;
+
+ if (cpu_is_msm8x60() &&
+ (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2 ||
+ SOCINFO_VERSION_MINOR(socinfo_get_version()) < 1)) {
+ return 0;
+ }
+ return 1;
+}
diff --git a/arch/arm/mach-msm/include/mach/irqs-8930.h b/arch/arm/mach-msm/include/mach/irqs-8930.h
new file mode 100644
index 0000000..ed927bd
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/irqs-8930.h
@@ -0,0 +1,292 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MSM_IRQS_8930_H
+#define __ASM_ARCH_MSM_IRQS_8930_H
+
+/* MSM ACPU Interrupt Numbers */
+
+/* 0-15: STI/SGI (software triggered/generated interrupts)
+ 16-31: PPI (private peripheral interrupts)
+ 32+: SPI (shared peripheral interrupts) */
+
+#define GIC_PPI_START 16
+#define GIC_SPI_START 32
+
+#define INT_VGIC (GIC_PPI_START + 0)
+#define INT_DEBUG_TIMER_EXP (GIC_PPI_START + 1)
+#define INT_GP_TIMER_EXP (GIC_PPI_START + 2)
+#define INT_GP_TIMER2_EXP (GIC_PPI_START + 3)
+#define WDT0_ACCSCSSNBARK_INT (GIC_PPI_START + 4)
+#define WDT1_ACCSCSSNBARK_INT (GIC_PPI_START + 5)
+#define AVS_SVICINT (GIC_PPI_START + 6)
+#define AVS_SVICINTSWDONE (GIC_PPI_START + 7)
+#define CPU_DBGCPUXCOMMRXFULL (GIC_PPI_START + 8)
+#define CPU_DBGCPUXCOMMTXEMPTY (GIC_PPI_START + 9)
+#define INT_ARMQC_PERFMON (GIC_PPI_START + 10)
+#define SC_AVSCPUXDOWN (GIC_PPI_START + 11)
+#define SC_AVSCPUXUP (GIC_PPI_START + 12)
+#define SC_SICCPUXACGIRPTREQ (GIC_PPI_START + 13)
+#define SC_SICCPUXEXTFAULTIRPTREQ (GIC_PPI_START + 14)
+/* PPI 15 is unused */
+
+#define APCC_QGICACGIRPTREQ (GIC_SPI_START + 0)
+#define APCC_QGICL2PERFMONIRPTREQ (GIC_SPI_START + 1)
+#define SC_SICL2PERFMONIRPTREQ APCC_QGICL2PERFMONIRPTREQ
+#define APCC_QGICL2IRPTREQ (GIC_SPI_START + 2)
+#define APCC_QGICMPUIRPTREQ (GIC_SPI_START + 3)
+#define TLMM_MSM_DIR_CONN_IRQ_0 (GIC_SPI_START + 4)
+#define TLMM_MSM_DIR_CONN_IRQ_1 (GIC_SPI_START + 5)
+#define TLMM_MSM_DIR_CONN_IRQ_2 (GIC_SPI_START + 6)
+#define TLMM_MSM_DIR_CONN_IRQ_3 (GIC_SPI_START + 7)
+#define TLMM_MSM_DIR_CONN_IRQ_4 (GIC_SPI_START + 8)
+#define TLMM_MSM_DIR_CONN_IRQ_5 (GIC_SPI_START + 9)
+#define TLMM_MSM_DIR_CONN_IRQ_6 (GIC_SPI_START + 10)
+#define TLMM_MSM_DIR_CONN_IRQ_7 (GIC_SPI_START + 11)
+#define TLMM_MSM_DIR_CONN_IRQ_8 (GIC_SPI_START + 12)
+#define TLMM_MSM_DIR_CONN_IRQ_9 (GIC_SPI_START + 13)
+#define PM8921_SEC_IRQ_103 (GIC_SPI_START + 14)
+#define PM8018_SEC_IRQ_106 (GIC_SPI_START + 15)
+#define TLMM_MSM_SUMMARY_IRQ (GIC_SPI_START + 16)
+#define SPDM_RT_1_IRQ (GIC_SPI_START + 17)
+#define SPDM_DIAG_IRQ (GIC_SPI_START + 18)
+#define RPM_APCC_CPU0_GP_HIGH_IRQ (GIC_SPI_START + 19)
+#define RPM_APCC_CPU0_GP_MEDIUM_IRQ (GIC_SPI_START + 20)
+#define RPM_APCC_CPU0_GP_LOW_IRQ (GIC_SPI_START + 21)
+#define RPM_APCC_CPU0_WAKE_UP_IRQ (GIC_SPI_START + 22)
+#define RPM_APCC_CPU1_GP_HIGH_IRQ (GIC_SPI_START + 23)
+#define RPM_APCC_CPU1_GP_MEDIUM_IRQ (GIC_SPI_START + 24)
+#define RPM_APCC_CPU1_GP_LOW_IRQ (GIC_SPI_START + 25)
+#define RPM_APCC_CPU1_WAKE_UP_IRQ (GIC_SPI_START + 26)
+#define SSBI2_2_SC_CPU0_SECURE_IRQ (GIC_SPI_START + 27)
+#define SSBI2_2_SC_CPU0_NON_SECURE_IRQ (GIC_SPI_START + 28)
+#define SSBI2_1_SC_CPU0_SECURE_IRQ (GIC_SPI_START + 29)
+#define SSBI2_1_SC_CPU0_NON_SECURE_IRQ (GIC_SPI_START + 30)
+#define MSMC_SC_SEC_CE_IRQ (GIC_SPI_START + 31)
+#define MSMC_SC_PRI_CE_IRQ (GIC_SPI_START + 32)
+#define SLIMBUS0_CORE_EE1_IRQ (GIC_SPI_START + 33)
+#define SLIMBUS0_BAM_EE1_IRQ (GIC_SPI_START + 34)
+#define Q6FW_WDOG_EXPIRED_IRQ (GIC_SPI_START + 35)
+#define Q6SW_WDOG_EXPIRED_IRQ (GIC_SPI_START + 36)
+#define MSS_TO_APPS_IRQ_0 (GIC_SPI_START + 37)
+#define MSS_TO_APPS_IRQ_1 (GIC_SPI_START + 38)
+#define MSS_TO_APPS_IRQ_2 (GIC_SPI_START + 39)
+#define MSS_TO_APPS_IRQ_3 (GIC_SPI_START + 40)
+#define MSS_TO_APPS_IRQ_4 (GIC_SPI_START + 41)
+#define MSS_TO_APPS_IRQ_5 (GIC_SPI_START + 42)
+#define MSS_TO_APPS_IRQ_6 (GIC_SPI_START + 43)
+#define MSS_TO_APPS_IRQ_7 (GIC_SPI_START + 44)
+#define MSS_TO_APPS_IRQ_8 (GIC_SPI_START + 45)
+#define MSS_TO_APPS_IRQ_9 (GIC_SPI_START + 46)
+#define VPE_IRQ (GIC_SPI_START + 47)
+#define VFE_IRQ (GIC_SPI_START + 48)
+#define VCODEC_IRQ (GIC_SPI_START + 49)
+/* SPI IRQ 50 is unused */
+#define SMMU_VPE_CB_SC_SECURE_IRQ (GIC_SPI_START + 51)
+#define SMMU_VPE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 52)
+#define SMMU_VFE_CB_SC_SECURE_IRQ (GIC_SPI_START + 53)
+#define SMMU_VFE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 54)
+#define SMMU_VCODEC_B_CB_SC_SECURE_IRQ (GIC_SPI_START + 55)
+#define SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 56)
+#define SMMU_VCODEC_A_CB_SC_SECURE_IRQ (GIC_SPI_START + 57)
+#define SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 58)
+#define SMMU_ROT_CB_SC_SECURE_IRQ (GIC_SPI_START + 59)
+#define SMMU_ROT_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 60)
+#define SMMU_MDP1_CB_SC_SECURE_IRQ (GIC_SPI_START + 61)
+#define SMMU_MDP1_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 62)
+#define SMMU_MDP0_CB_SC_SECURE_IRQ (GIC_SPI_START + 63)
+#define SMMU_MDP0_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 64)
+/* SPI IRQ 65 is unused */
+/* SPI IRQ 66 is unused */
+#define SMMU_IJPEG_CB_SC_SECURE_IRQ (GIC_SPI_START + 67)
+#define SMMU_IJPEG_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 68)
+#define SMMU_GFX3D_CB_SC_SECURE_IRQ (GIC_SPI_START + 69)
+#define SMMU_GFX3D_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 70)
+/* SPI IRQ 71 is unused */
+/* SPI IRQ 72 is unused */
+#define ROT_IRQ (GIC_SPI_START + 73)
+#define MMSS_FABRIC_IRQ (GIC_SPI_START + 74)
+#define MDP_IRQ (GIC_SPI_START + 75)
+/* SPI IRQ 76 is unused */
+#define JPEG_IRQ (GIC_SPI_START + 77)
+#define MMSS_IMEM_IRQ (GIC_SPI_START + 78)
+#define HDMI_IRQ (GIC_SPI_START + 79)
+#define GFX3D_IRQ (GIC_SPI_START + 80)
+/* SPI IRQ 81 is unused */
+#define DSI1_IRQ (GIC_SPI_START + 82)
+#define CSI_1_IRQ (GIC_SPI_START + 83)
+#define CSI_0_IRQ (GIC_SPI_START + 84)
+#define LPASS_SCSS_AUDIO_IF_OUT0_IRQ (GIC_SPI_START + 85)
+#define LPASS_SCSS_MIDI_IRQ (GIC_SPI_START + 86)
+#define LPASS_Q6SS_WDOG_EXPIRED (GIC_SPI_START + 87)
+#define LPASS_SCSS_GP_LOW_IRQ (GIC_SPI_START + 88)
+#define LPASS_SCSS_GP_MEDIUM_IRQ (GIC_SPI_START + 89)
+#define LPASS_SCSS_GP_HIGH_IRQ (GIC_SPI_START + 90)
+#define TOP_IMEM_IRQ (GIC_SPI_START + 91)
+#define FABRIC_SYS_IRQ (GIC_SPI_START + 92)
+#define FABRIC_APPS_IRQ (GIC_SPI_START + 93)
+#define USB1_HS_BAM_IRQ (GIC_SPI_START + 94)
+#define SDC4_BAM_IRQ (GIC_SPI_START + 95)
+#define SDC3_BAM_IRQ (GIC_SPI_START + 96)
+#define SDC2_BAM_IRQ (GIC_SPI_START + 97)
+#define SDC1_BAM_IRQ (GIC_SPI_START + 98)
+#define FABRIC_SPS_IRQ (GIC_SPI_START + 99)
+#define USB1_HS_IRQ (GIC_SPI_START + 100)
+#define SDC4_IRQ_0 (GIC_SPI_START + 101)
+#define SDC3_IRQ_0 (GIC_SPI_START + 102)
+#define SDC2_IRQ_0 (GIC_SPI_START + 103)
+#define SDC1_IRQ_0 (GIC_SPI_START + 104)
+#define SPS_BAM_DMA_IRQ (GIC_SPI_START + 105)
+#define SPS_SEC_VIOL_IRQ (GIC_SPI_START + 106)
+#define SPS_MTI_0 (GIC_SPI_START + 107)
+#define SPS_MTI_1 (GIC_SPI_START + 108)
+#define SPS_MTI_2 (GIC_SPI_START + 109)
+#define SPS_MTI_3 (GIC_SPI_START + 110)
+#define GPS_PPS_OUT (GIC_SPI_START + 111)
+#define SPS_MTI_5 (GIC_SPI_START + 112)
+#define SPS_MTI_6 (GIC_SPI_START + 113)
+#define SPS_MTI_7 (GIC_SPI_START + 114)
+#define SPS_MTI_8 (GIC_SPI_START + 115)
+#define TLMM_MSM_DIR_CONN_IRQ_11 (GIC_SPI_START + 116)
+#define TLMM_MSM_DIR_CONN_IRQ_10 (GIC_SPI_START + 117)
+#define BAM_DMA1 (GIC_SPI_START + 118)
+#define BAM_DMA2 (GIC_SPI_START + 119)
+#define SDC1_IRQ (GIC_SPI_START + 120)
+#define SDC2_IRQ (GIC_SPI_START + 121)
+#define SDC3_IRQ (GIC_SPI_START + 122)
+#define SPS_MTI_16 (GIC_SPI_START + 123)
+#define SPS_MTI_17 (GIC_SPI_START + 124)
+#define SPS_MTI_18 (GIC_SPI_START + 125)
+#define SPS_MTI_19 (GIC_SPI_START + 126)
+#define SPS_MTI_20 (GIC_SPI_START + 127)
+#define SPS_MTI_21 (GIC_SPI_START + 128)
+#define SPS_MTI_22 (GIC_SPI_START + 129)
+#define SPS_MTI_23 (GIC_SPI_START + 130)
+#define SPS_MTI_24 (GIC_SPI_START + 131)
+#define SPS_MTI_25 (GIC_SPI_START + 132)
+#define SPS_MTI_26 (GIC_SPI_START + 133)
+#define SPS_MTI_27 (GIC_SPI_START + 134)
+#define SPS_MTI_28 (GIC_SPI_START + 135)
+#define SPS_MTI_29 (GIC_SPI_START + 136)
+#define SPS_MTI_30 (GIC_SPI_START + 137)
+#define SPS_MTI_31 (GIC_SPI_START + 138)
+#define CSIPHY_4LN_IRQ (GIC_SPI_START + 139)
+#define MSM8930_CSIPHY_2LN_IRQ (GIC_SPI_START + 140)
+#define USB2_IRQ (GIC_SPI_START + 141)
+#define USB1_IRQ (GIC_SPI_START + 142)
+#define TSSC_SSBI_IRQ (GIC_SPI_START + 143)
+#define TSSC_SAMPLE_IRQ (GIC_SPI_START + 144)
+#define TSSC_PENUP_IRQ (GIC_SPI_START + 145)
+#define MSM8930_GSBI1_UARTDM_IRQ (GIC_SPI_START + 146)
+#define MSM8930_GSBI1_QUP_IRQ (GIC_SPI_START + 147)
+#define MSM8930_GSBI2_UARTDM_IRQ (GIC_SPI_START + 148)
+#define MSM8930_GSBI2_QUP_IRQ (GIC_SPI_START + 149)
+#define GSBI3_UARTDM_IRQ (GIC_SPI_START + 150)
+#define GSBI3_QUP_IRQ (GIC_SPI_START + 151)
+#define GSBI4_UARTDM_IRQ (GIC_SPI_START + 152)
+#define GSBI4_QUP_IRQ (GIC_SPI_START + 153)
+#define GSBI5_UARTDM_IRQ (GIC_SPI_START + 154)
+#define GSBI5_QUP_IRQ (GIC_SPI_START + 155)
+#define GSBI6_UARTDM_IRQ (GIC_SPI_START + 156)
+#define GSBI6_QUP_IRQ (GIC_SPI_START + 157)
+#define GSBI7_UARTDM_IRQ (GIC_SPI_START + 158)
+#define GSBI7_QUP_IRQ (GIC_SPI_START + 159)
+#define GSBI8_UARTDM_IRQ (GIC_SPI_START + 160)
+#define GSBI8_QUP_IRQ (GIC_SPI_START + 161)
+#define TSIF_TSPP_IRQ (GIC_SPI_START + 162)
+#define TSIF_BAM_IRQ (GIC_SPI_START + 163)
+#define TSIF2_IRQ (GIC_SPI_START + 164)
+#define TSIF1_IRQ (GIC_SPI_START + 165)
+/* SPI IRQ 166 is unused */
+#define ISPIF_IRQ (GIC_SPI_START + 167)
+#define MSMC_SC_SEC_TMR_IRQ (GIC_SPI_START + 168)
+#define MSMC_SC_SEC_WDOG_BARK_IRQ (GIC_SPI_START + 169)
+#define ADM_0_SCSS_0_IRQ (GIC_SPI_START + 170)
+#define ADM_0_SCSS_1_IRQ (GIC_SPI_START + 171)
+#define ADM_0_SCSS_2_IRQ (GIC_SPI_START + 172)
+#define ADM_0_SCSS_3_IRQ (GIC_SPI_START + 173)
+#define CC_SCSS_WDT1CPU1BITEEXPIRED (GIC_SPI_START + 174)
+#define CC_SCSS_WDT1CPU0BITEEXPIRED (GIC_SPI_START + 175)
+#define CC_SCSS_WDT0CPU1BITEEXPIRED (GIC_SPI_START + 176)
+#define CC_SCSS_WDT0CPU0BITEEXPIRED (GIC_SPI_START + 177)
+#define TSENS_UPPER_LOWER_INT (GIC_SPI_START + 178)
+#define SSBI2_2_SC_CPU1_SECURE_INT (GIC_SPI_START + 179)
+#define SSBI2_2_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 180)
+#define SSBI2_1_SC_CPU1_SECURE_INT (GIC_SPI_START + 181)
+#define SSBI2_1_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 182)
+#define XPU_SUMMARY_IRQ (GIC_SPI_START + 183)
+#define BUS_EXCEPTION_SUMMARY_IRQ (GIC_SPI_START + 184)
+#define HSDDRX_EBI1CH0_IRQ (GIC_SPI_START + 185)
+/* SPI IRQ 186 is unused */
+#define SDC5_BAM_IRQ (GIC_SPI_START + 187)
+#define SDC5_IRQ_0 (GIC_SPI_START + 188)
+#define GSBI9_UARTDM_IRQ (GIC_SPI_START + 189)
+#define GSBI9_QUP_IRQ (GIC_SPI_START + 190)
+#define GSBI10_UARTDM_IRQ (GIC_SPI_START + 191)
+#define GSBI10_QUP_IRQ (GIC_SPI_START + 192)
+#define GSBI11_UARTDM_IRQ (GIC_SPI_START + 193)
+#define GSBI11_QUP_IRQ (GIC_SPI_START + 194)
+#define GSBI12_UARTDM_IRQ (GIC_SPI_START + 195)
+#define GSBI12_QUP_IRQ (GIC_SPI_START + 196)
+#define RIVA_APSS_LTECOEX_IRQ (GIC_SPI_START + 197)
+#define RIVA_APSS_SPARE_IRQ (GIC_SPI_START + 198)
+#define RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ (GIC_SPI_START + 199)
+#define RIVA_APSS_RESET_DONE_IRQ (GIC_SPI_START + 200)
+#define RIVA_APSS_ASIC_IRQ (GIC_SPI_START + 201)
+#define RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ (GIC_SPI_START + 202)
+#define RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ (GIC_SPI_START + 203)
+#define RIVA_APPS_WLAN_SMSM_IRQ (GIC_SPI_START + 204)
+#define RIVA_APPS_LOG_CTRL_IRQ (GIC_SPI_START + 205)
+#define RIVA_APPS_FM_CTRL_IRQ (GIC_SPI_START + 206)
+#define RIVA_APPS_HCI_IRQ (GIC_SPI_START + 207)
+#define RIVA_APPS_WLAN_CTRL_IRQ (GIC_SPI_START + 208)
+#define A2_BAM_IRQ (GIC_SPI_START + 209)
+/* SPI IRQ 210 is unused */
+/* SPI IRQ 211 is unused */
+/* SPI IRQ 212 is unused */
+#define PPSS_WDOG_TIMER_IRQ (GIC_SPI_START + 213)
+#define SPS_SLIMBUS_CORE_EE0_IRQ (GIC_SPI_START + 214)
+#define SPS_SLIMBUS_BAM_EE0_IRQ (GIC_SPI_START + 215)
+#define QDSS_ETB_IRQ (GIC_SPI_START + 216)
+#define QDSS_CTI2KPSS_CPU1_IRQ (GIC_SPI_START + 217)
+#define QDSS_CTI2KPSS_CPU0_IRQ (GIC_SPI_START + 218)
+#define TLMM_MSM_DIR_CONN_IRQ_16 (GIC_SPI_START + 219)
+#define TLMM_MSM_DIR_CONN_IRQ_17 (GIC_SPI_START + 220)
+#define TLMM_MSM_DIR_CONN_IRQ_18 (GIC_SPI_START + 221)
+#define TLMM_MSM_DIR_CONN_IRQ_19 (GIC_SPI_START + 222)
+#define TLMM_MSM_DIR_CONN_IRQ_20 (GIC_SPI_START + 223)
+#define TLMM_MSM_DIR_CONN_IRQ_21 (GIC_SPI_START + 224)
+#define PM8921_SEC_IRQ_104 (GIC_SPI_START + 225)
+#define PM8018_SEC_IRQ_107 (GIC_SPI_START + 226)
+#define USB_HSIC_IRQ (GIC_SPI_START + 229)
+#define CE2_BAM_XPU_IRQ (GIC_SPI_START + 230)
+#define CE1_BAM_XPU_IRQ (GIC_SPI_START + 231)
+#define GFX3D_VBIF_IRPT (GIC_SPI_START + 232)
+#define RBIF_IRQ_0 (GIC_SPI_START + 233)
+#define RBIF_IRQ_1 (GIC_SPI_START + 234)
+#define RBIF_IRQ_2 (GIC_SPI_START + 235)
+
+/* Backwards compatible IRQ macros. */
+#define INT_ADM_AARM ADM_0_SCSS_0_IRQ
+
+/* smd/smsm interrupts */
+#define INT_A9_M2A_0 (GIC_SPI_START + 37) /*MSS_TO_APPS_IRQ_0*/
+#define INT_A9_M2A_5 (GIC_SPI_START + 38) /*MSS_TO_APPS_IRQ_1*/
+#define INT_ADSP_A11 LPASS_SCSS_GP_HIGH_IRQ
+#define INT_ADSP_A11_SMSM LPASS_SCSS_GP_MEDIUM_IRQ
+#define INT_DSPS_A11 SPS_MTI_31
+#define INT_DSPS_A11_SMSM SPS_MTI_30
+#define INT_WCNSS_A11 RIVA_APSS_SPARE_IRQ
+#define INT_WCNSS_A11_SMSM RIVA_APPS_WLAN_SMSM_IRQ
+
+#endif
+
diff --git a/arch/arm/mach-msm/include/mach/irqs-copper.h b/arch/arm/mach-msm/include/mach/irqs-copper.h
new file mode 100644
index 0000000..d019047
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/irqs-copper.h
@@ -0,0 +1,47 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MSM_IRQS_COPPER_H
+#define __ASM_ARCH_MSM_IRQS_COPPER_H
+
+/* MSM ACPU Interrupt Numbers */
+
+/*
+ * 0-15: STI/SGI (software triggered/generated interrupts)
+ * 16-31: PPI (private peripheral interrupts)
+ * 32+: SPI (shared peripheral interrupts)
+ */
+
+#define GIC_PPI_START 16
+#define GIC_SPI_START 32
+
+#define INT_VGIC (GIC_PPI_START + 0)
+#define INT_DEBUG_TIMER_EXP (GIC_PPI_START + 1)
+#define INT_GP_TIMER_EXP (GIC_PPI_START + 2)
+#define AVS_SVICINT (GIC_PPI_START + 6)
+#define AVS_SVICINTSWDONE (GIC_PPI_START + 7)
+#define INT_ARMQC_PERFMON (GIC_PPI_START + 10)
+/* PPI 15 is unused */
+
+#define APCC_QGICL2PERFMONIRPTREQ (GIC_SPI_START + 1)
+#define SC_SICL2PERFMONIRPTREQ APCC_QGICL2PERFMONIRPTREQ
+#define TLMM_MSM_SUMMARY_IRQ (GIC_SPI_START + 16)
+#define SPS_BAM_DMA_IRQ (GIC_SPI_START + 105)
+
+#define NR_MSM_IRQS 256
+#define NR_GPIO_IRQS 156
+#define NR_BOARD_IRQS 100
+#define NR_TLMM_MSM_DIR_CONN_IRQ 8
+#define NR_MSM_GPIOS NR_GPIO_IRQS
+
+#endif
+
diff --git a/arch/arm/mach-msm/include/mach/irqs.h b/arch/arm/mach-msm/include/mach/irqs.h
index f38eddb..8c1e4ff 100644
--- a/arch/arm/mach-msm/include/mach/irqs.h
+++ b/arch/arm/mach-msm/include/mach/irqs.h
@@ -19,12 +19,17 @@
#define MSM_IRQ_BIT(irq) (1 << ((irq) & 31))
-#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064)
+#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) || \
+ defined(CONFIG_ARCH_MSM8930)
#ifdef CONFIG_ARCH_MSM8960
#include "irqs-8960.h"
#endif
+#ifdef CONFIG_ARCH_MSM8930
+#include "irqs-8930.h"
+#endif
+
#ifdef CONFIG_ARCH_APQ8064
#include "irqs-8064.h"
#endif
@@ -44,7 +49,9 @@
#else
-#if defined(CONFIG_ARCH_MSM9615)
+#if defined(CONFIG_ARCH_MSMCOPPER)
+#include "irqs-copper.h"
+#elif defined(CONFIG_ARCH_MSM9615)
#include "irqs-9615.h"
#elif defined(CONFIG_ARCH_MSM7X30)
#include "irqs-7x30.h"
diff --git a/arch/arm/mach-msm/include/mach/msm-krait-l2-accessors.h b/arch/arm/mach-msm/include/mach/msm-krait-l2-accessors.h
index 507d717..f835e82 100644
--- a/arch/arm/mach-msm/include/mach/msm-krait-l2-accessors.h
+++ b/arch/arm/mach-msm/include/mach/msm-krait-l2-accessors.h
@@ -13,24 +13,8 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#ifdef CONFIG_ARCH_MSM_KRAIT
extern void set_l2_indirect_reg(u32 reg_addr, u32 val);
extern u32 get_l2_indirect_reg(u32 reg_addr);
extern u32 set_get_l2_indirect_reg(u32 reg_addr, u32 val);
-#else
-void set_l2_indirect_reg(u32 reg_addr, u32 val)
-{
-}
-
-u32 set_get_l2_indirect_reg(u32 reg_addr, u32 val)
-{
- return 0;
-}
-
-u32 get_l2_indirect_reg(u32 reg_addr)
-{
- return 0;
-}
-#endif
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_bus_board.h b/arch/arm/mach-msm/include/mach/msm_bus_board.h
index 644e1b1..2eb504a 100644
--- a/arch/arm/mach-msm/include/mach/msm_bus_board.h
+++ b/arch/arm/mach-msm/include/mach/msm_bus_board.h
@@ -36,6 +36,7 @@
const unsigned int nslaves;
const unsigned int ntieredslaves;
bool il_flag;
+ const struct msm_bus_board_algorithm *board_algo;
};
enum msm_bus_bw_tier_type {
@@ -55,12 +56,23 @@
extern struct msm_bus_fabric_registration msm_bus_mm_fabric_pdata;
extern struct msm_bus_fabric_registration msm_bus_sys_fpb_pdata;
extern struct msm_bus_fabric_registration msm_bus_cpss_fpb_pdata;
+extern struct msm_bus_fabric_registration msm_bus_def_fab_pdata;
-void msm_bus_board_assign_iids(struct msm_bus_fabric_registration
- *fabreg, int fabid);
-int msm_bus_board_get_iid(int id);
+extern struct msm_bus_fabric_registration msm_bus_8960_apps_fabric_pdata;
+extern struct msm_bus_fabric_registration msm_bus_8960_sys_fabric_pdata;
+extern struct msm_bus_fabric_registration msm_bus_8960_mm_fabric_pdata;
+extern struct msm_bus_fabric_registration msm_bus_8960_sys_fpb_pdata;
+extern struct msm_bus_fabric_registration msm_bus_8960_cpss_fpb_pdata;
+
+extern struct msm_bus_fabric_registration msm_bus_8064_apps_fabric_pdata;
+extern struct msm_bus_fabric_registration msm_bus_8064_sys_fabric_pdata;
+extern struct msm_bus_fabric_registration msm_bus_8064_mm_fabric_pdata;
+extern struct msm_bus_fabric_registration msm_bus_8064_sys_fpb_pdata;
+extern struct msm_bus_fabric_registration msm_bus_8064_cpss_fpb_pdata;
+
void msm_bus_rpm_set_mt_mask(void);
int msm_bus_board_rpm_get_il_ids(uint16_t *id);
+int msm_bus_board_get_iid(int id);
/*
* These macros specify the convention followed for allocating
@@ -124,6 +136,7 @@
/* Topology related enums */
enum msm_bus_fabric_type {
+ MSM_BUS_FAB_DEFAULT = 0,
MSM_BUS_FAB_APPSS = 0,
MSM_BUS_FAB_SYSTEM = 1024,
MSM_BUS_FAB_MMSS = 2048,
@@ -180,7 +193,15 @@
MSM_BUS_MASTER_MSS_SW_PROC,
MSM_BUS_MASTER_MSS_FW_PROC,
MSM_BUS_MMSS_MASTER_UNUSED_2,
+ MSM_BUS_MASTER_GSS_NAV,
+ MSM_BUS_MASTER_PCIE,
+ MSM_BUS_MASTER_SATA,
+ MSM_BUS_MASTER_CRYPTO,
+ MSM_BUS_MASTER_VIDEO_CAP,
+ MSM_BUS_MASTER_GRAPHICS_3D_PORT1,
+ MSM_BUS_MASTER_VIDEO_ENC,
+ MSM_BUS_MASTER_VIDEO_DEC,
MSM_BUS_MASTER_LAST = MSM_BUS_MMSS_MASTER_UNUSED_2,
MSM_BUS_SYSTEM_FPB_MASTER_SYSTEM =
@@ -263,6 +284,8 @@
MSM_BUS_SLAVE_MSM_DIMEM,
MSM_BUS_SLAVE_MSM_TCSR,
MSM_BUS_SLAVE_MSM_PRNG,
+ MSM_BUS_SLAVE_GSS,
+ MSM_BUS_SLAVE_SATA,
MSM_BUS_SLAVE_LAST = MSM_BUS_SLAVE_MSM_PRNG,
MSM_BUS_SYSTEM_FPB_SLAVE_SYSTEM =
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
index 571391b..d1aef0a 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -58,10 +58,6 @@
#define MSM_GPT_BASE MSM_TMR_BASE
#define MSM_DGT_BASE (MSM_TMR_BASE + 0x10)
-#define MSM_DMOV_BASE IOMEM(0xF8002000)
-#define MSM_DMOV_PHYS 0xA9700000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xF8003000)
#define MSM_GPIO1_PHYS 0xA9200000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
index fce9e35..e49e870 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
@@ -47,10 +47,6 @@
#define MSM_TMR_BASE MSM_CSR_BASE
#define MSM_TMR_SIZE SZ_4K
-#define MSM_DMOV_BASE IOMEM(0xFA002000)
-#define MSM_DMOV_PHYS 0xAC400000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xFA003000)
#define MSM_GPIO1_PHYS 0xAC001000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h b/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
index 1fb9d0e..d7dc4f4 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
@@ -47,9 +47,9 @@
#define MSM_TMR_BASE MSM_CSR_BASE
#define MSM_TMR_SIZE SZ_4K
-#define MSM_DMOV_BASE IOMEM(0xFA002000)
-#define MSM_DMOV_PHYS 0xA9700000
-#define MSM_DMOV_SIZE SZ_4K
+#define MSM_TMR0_BASE MSM_TMR_BASE
+
+#define MSM_QGIC_DIST_BASE MSM_VIC_BASE
#define MSM_GPIO1_BASE IOMEM(0xFA003000)
#define MSM_GPIO1_PHYS 0xA9200000
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8064.h b/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
index 665ccd0..7f5bd75 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
@@ -44,9 +44,6 @@
#define APQ8064_QGIC_CPU_PHYS 0x02002000
#define APQ8064_QGIC_CPU_SIZE SZ_4K
-#define APQ8064_DMOV_PHYS 0x18300000
-#define APQ8064_DMOV_SIZE SZ_1M
-
#define APQ8064_TLMM_PHYS 0x00800000
#define APQ8064_TLMM_SIZE SZ_16K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8930.h b/arch/arm/mach-msm/include/mach/msm_iomap-8930.h
new file mode 100644
index 0000000..8e50824
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8930.h
@@ -0,0 +1,116 @@
+/*
+ * Copyright (C) 2007 Google, Inc.
+ * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
+ * Author: Brian Swetland <swetland@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ *
+ * The MSM peripherals are spread all over across 768MB of physical
+ * space, which makes just having a simple IO_ADDRESS macro to slide
+ * them into the right virtual location rough. Instead, we will
+ * provide a master phys->virt mapping for peripherals here.
+ *
+ */
+
+#ifndef __ASM_ARCH_MSM_IOMAP_8930_H
+#define __ASM_ARCH_MSM_IOMAP_8930_H
+
+/* Physical base address and size of peripherals.
+ * Ordered by the virtual base addresses they will be mapped at.
+ *
+ * If you add or remove entries here, you'll want to edit the
+ * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
+ * changes.
+ *
+ */
+
+#define MSM8930_TMR_PHYS 0x0200A000
+#define MSM8930_TMR_SIZE SZ_4K
+
+#define MSM8930_TMR0_PHYS 0x0208A000
+#define MSM8930_TMR0_SIZE SZ_4K
+
+#define MSM8930_RPM_PHYS 0x00108000
+#define MSM8930_RPM_SIZE SZ_4K
+
+#define MSM8930_RPM_MPM_PHYS 0x00200000
+#define MSM8930_RPM_MPM_SIZE SZ_4K
+
+#define MSM8930_TCSR_PHYS 0x1A400000
+#define MSM8930_TCSR_SIZE SZ_4K
+
+#define MSM8930_APCS_GCC_PHYS 0x02011000
+#define MSM8930_APCS_GCC_SIZE SZ_4K
+
+#define MSM8930_SAW_L2_PHYS 0x02012000
+#define MSM8930_SAW_L2_SIZE SZ_4K
+
+#define MSM8930_SAW0_PHYS 0x02089000
+#define MSM8930_SAW0_SIZE SZ_4K
+
+#define MSM8930_SAW1_PHYS 0x02099000
+#define MSM8930_SAW1_SIZE SZ_4K
+
+#define MSM8930_IMEM_PHYS 0x2A03F000
+#define MSM8930_IMEM_SIZE SZ_4K
+
+#define MSM8930_ACC0_PHYS 0x02088000
+#define MSM8930_ACC0_SIZE SZ_4K
+
+#define MSM8930_ACC1_PHYS 0x02098000
+#define MSM8930_ACC1_SIZE SZ_4K
+
+#define MSM8930_QGIC_DIST_PHYS 0x02000000
+#define MSM8930_QGIC_DIST_SIZE SZ_4K
+
+#define MSM8930_QGIC_CPU_PHYS 0x02002000
+#define MSM8930_QGIC_CPU_SIZE SZ_4K
+
+#define MSM8930_CLK_CTL_PHYS 0x00900000
+#define MSM8930_CLK_CTL_SIZE SZ_16K
+
+#define MSM8930_MMSS_CLK_CTL_PHYS 0x04000000
+#define MSM8930_MMSS_CLK_CTL_SIZE SZ_4K
+
+#define MSM8930_LPASS_CLK_CTL_PHYS 0x28000000
+#define MSM8930_LPASS_CLK_CTL_SIZE SZ_4K
+
+#define MSM8930_HFPLL_PHYS 0x00903000
+#define MSM8930_HFPLL_SIZE SZ_4K
+
+#define MSM8930_TLMM_PHYS 0x00800000
+#define MSM8930_TLMM_SIZE SZ_16K
+
+#define MSM8930_DMOV_PHYS 0x18320000
+#define MSM8930_DMOV_SIZE SZ_1M
+
+#define MSM8930_SIC_NON_SECURE_PHYS 0x12100000
+#define MSM8930_SIC_NON_SECURE_SIZE SZ_64K
+
+#define MSM_GPT_BASE (MSM_TMR_BASE + 0x4)
+#define MSM_DGT_BASE (MSM_TMR_BASE + 0x24)
+
+#define MSM8930_HDMI_PHYS 0x04A00000
+#define MSM8930_HDMI_SIZE SZ_4K
+
+#ifdef CONFIG_MSM_DEBUG_UART
+#define MSM_DEBUG_UART_BASE IOMEM(0xFA740000)
+#define MSM_DEBUG_UART_SIZE SZ_4K
+
+#ifdef CONFIG_MSM_DEBUG_UART1
+#define MSM_DEBUG_UART_PHYS 0x16440000
+#endif
+#endif
+
+#define MSM8930_QFPROM_PHYS 0x00700000
+#define MSM8930_QFPROM_SIZE SZ_4K
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index 56cbd2f..24505ae 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -89,9 +89,6 @@
#define MSM8960_TLMM_PHYS 0x00800000
#define MSM8960_TLMM_SIZE SZ_16K
-#define MSM8960_DMOV_PHYS 0x18320000
-#define MSM8960_DMOV_SIZE SZ_1M
-
#define MSM8960_SIC_NON_SECURE_PHYS 0x12100000
#define MSM8960_SIC_NON_SECURE_SIZE SZ_64K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
index cab4027..a073d6a 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
@@ -47,10 +47,6 @@
#define MSM_TMR_BASE MSM_CSR_BASE
#define MSM_TMR_SIZE SZ_4K
-#define MSM_DMOV_BASE IOMEM(0xFA002000)
-#define MSM_DMOV_PHYS 0xA9700000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xFA003000)
#define MSM_GPIO1_PHYS 0xA9000000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 4b91733..c1cf221 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -106,14 +106,6 @@
#define MSM_SAW1_PHYS 0x02052000
#define MSM_SAW1_SIZE SZ_4K
-#define MSM_DMOV_ADM0_BASE IOMEM(0xFA400000)
-#define MSM_DMOV_ADM0_PHYS 0x18320000
-#define MSM_DMOV_ADM0_SIZE SZ_1M
-
-#define MSM_DMOV_ADM1_BASE IOMEM(0xFA500000)
-#define MSM_DMOV_ADM1_PHYS 0x18420000
-#define MSM_DMOV_ADM1_SIZE SZ_1M
-
#define MSM_SIC_NON_SECURE_BASE IOMEM(0xFA600000)
#define MSM_SIC_NON_SECURE_PHYS 0x12100000
#define MSM_SIC_NON_SECURE_SIZE SZ_64K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-9615.h b/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
index e842f8e..dda5f50 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
@@ -41,9 +41,6 @@
#define MSM9615_QGIC_CPU_PHYS 0x02002000
#define MSM9615_QGIC_CPU_SIZE SZ_4K
-#define MSM9615_DMOV_PHYS 0x18320000
-#define MSM9615_DMOV_SIZE SZ_1M
-
#define MSM9615_TLMM_PHYS 0x00800000
#define MSM9615_TLMM_SIZE SZ_1M
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-copper.h b/arch/arm/mach-msm/include/mach/msm_iomap-copper.h
new file mode 100644
index 0000000..3999982
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-copper.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MSM_IOMAP_COPPER_H
+#define __ASM_ARCH_MSM_IOMAP_COPPER_H
+
+/* Physical base address and size of peripherals.
+ * Ordered by the virtual base addresses they will be mapped at.
+ *
+ * If you add or remove entries here, you'll want to edit the
+ * io desc array in arch/arm/mach-msm/io.c to reflect your
+ * changes.
+ *
+ */
+
+#define COPPER_QGIC_DIST_PHYS 0xF9000000
+#define COPPER_QGIC_DIST_SIZE SZ_4K
+
+#define COPPER_QGIC_CPU_PHYS 0xF9002000
+#define COPPER_QGIC_CPU_SIZE SZ_4K
+
+#define COPPER_TLMM_PHYS 0xFC4A0000
+#define COPPER_TLMM_SIZE SZ_16K
+
+#define COPPER_TMR_PHYS 0xF900A000
+#define COPPER_TMR_SIZE SZ_4K
+
+#define COPPER_TMR0_PHYS 0xF908A000
+#define COPPER_TMR0_SIZE SZ_4K
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h b/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h
index 5261bcc..57bfd58 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h
@@ -64,24 +64,6 @@
#define MSM_GRFC_PHYS 0x94038000
#define MSM_GRFC_SIZE SZ_4K
-#define MSM_DMOV_SD0_BASE IOMEM(0xFA00A000)
-#define MSM_DMOV_SD0_PHYS 0x94310000
-#define MSM_DMOV_SD0_SIZE SZ_4K
-
-#define MSM_DMOV_SD1_BASE IOMEM(0xFA00B000)
-#define MSM_DMOV_SD1_PHYS 0x94410000
-#define MSM_DMOV_SD1_SIZE SZ_4K
-
-#define MSM_DMOV_SD2_BASE IOMEM(0xFA00C000)
-#define MSM_DMOV_SD2_PHYS 0x94510000
-#define MSM_DMOV_SD2_SIZE SZ_4K
-
-#define MSM_DMOV_SD3_BASE IOMEM(0xFA00D000)
-#define MSM_DMOV_SD3_PHYS 0x94610000
-#define MSM_DMOV_SD3_SIZE SZ_4K
-
-#define MSM_DMOV_BASE MSM_DMOV_SD0_BASE
-
#define MSM_QFP_FUSE_BASE IOMEM(0xFA010000)
#define MSM_QFP_FUSE_PHYS 0x80000000
#define MSM_QFP_FUSE_SIZE SZ_32K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index df19606..256099b 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -43,8 +43,9 @@
#define IOMEM(x) ((void __force __iomem *)(x))
#endif
-#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) \
- || defined(CONFIG_ARCH_MSM9615)
+#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) || \
+ defined(CONFIG_ARCH_MSM8930) || defined(CONFIG_ARCH_MSM9615) || \
+ defined(CONFIG_ARCH_MSMCOPPER)
/* Unified iomap */
#define MSM_TMR_BASE IOMEM(0xFA000000) /* 4K */
@@ -67,7 +68,6 @@
#define MSM_HFPLL_BASE IOMEM(0xFA016000) /* 4K */
#define MSM_TLMM_BASE IOMEM(0xFA017000) /* 16K */
#define MSM_SHARED_RAM_BASE IOMEM(0xFA300000) /* 2M */
-#define MSM_DMOV_BASE IOMEM(0xFA500000) /* 1M */
#define MSM_SIC_NON_SECURE_BASE IOMEM(0xFA600000) /* 64K */
#define MSM_HDMI_BASE IOMEM(0xFA800000) /* 4K */
#define MSM_RPM_BASE IOMEM(0xFA801000) /* 4K */
@@ -83,8 +83,10 @@
#endif
#include "msm_iomap-8960.h"
+#include "msm_iomap-8930.h"
#include "msm_iomap-8064.h"
#include "msm_iomap-9615.h"
+#include "msm_iomap-copper.h"
#else
/* Legacy single-target iomap */
diff --git a/arch/arm/mach-msm/include/mach/qdsp6v2/rtac.h b/arch/arm/mach-msm/include/mach/qdsp6v2/rtac.h
index 3d3653b..f5bea31 100644
--- a/arch/arm/mach-msm/include/mach/qdsp6v2/rtac.h
+++ b/arch/arm/mach-msm/include/mach/qdsp6v2/rtac.h
@@ -20,7 +20,8 @@
#define RTAC_VOICE_MODES 2
void rtac_add_adm_device(u32 port_id, u32 copp_id, u32 path_id, u32 popp_id);
-void rtac_remove_adm_device(u32 port_id, u32 popp_id);
+void rtac_remove_adm_device(u32 port_id);
+void rtac_remove_popp_from_adm_devices(u32 popp_id);
void rtac_add_voice(u32 cvs_handle, u32 cvp_handle, u32 rx_afe_port,
u32 tx_afe_port, u32 session_id);
void rtac_remove_voice(u32 cvs_handle);
diff --git a/arch/arm/mach-msm/include/mach/rpm-regulator.h b/arch/arm/mach-msm/include/mach/rpm-regulator.h
index 8b5a1e7..7ffa2985 100644
--- a/arch/arm/mach-msm/include/mach/rpm-regulator.h
+++ b/arch/arm/mach-msm/include/mach/rpm-regulator.h
@@ -155,6 +155,9 @@
*
* This function may only be called for regulators which have the sleep flag
* specified in their private data.
+ *
+ * Consumers can vote to disable a regulator with this function by passing
+ * min_uV = 0 and max_uV = 0.
*/
int rpm_vreg_set_voltage(int vreg_id, enum rpm_vreg_voter voter, int min_uV,
int max_uV, int sleep_also);
diff --git a/arch/arm/mach-msm/include/mach/socinfo.h b/arch/arm/mach-msm/include/mach/socinfo.h
index dbfbad2..dbde068 100644
--- a/arch/arm/mach-msm/include/mach/socinfo.h
+++ b/arch/arm/mach-msm/include/mach/socinfo.h
@@ -44,7 +44,7 @@
MSM_CPU_7X25A,
MSM_CPU_7X25AA,
MSM_CPU_8064,
- MSM_CPU_8X30,
+ MSM_CPU_8930,
MSM_CPU_7X27AA,
MSM_CPU_9615,
};
@@ -208,9 +208,13 @@
#endif
}
-static inline int cpu_is_msm8x30(void)
+static inline int cpu_is_msm8930(void)
{
- return read_msm_cpu_type() == MSM_CPU_8X30;
+#ifdef CONFIG_ARCH_MSM8930
+ return read_msm_cpu_type() == MSM_CPU_8930;
+#else
+ return 0;
+#endif
}
static inline int cpu_is_fsm9xxx(void)
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 3bb10fb..65f5da0 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -61,7 +61,6 @@
MSM_DEVICE(VIC),
MSM_DEVICE(CSR),
MSM_DEVICE(TMR),
- MSM_DEVICE(DMOV),
MSM_DEVICE(GPIO1),
MSM_DEVICE(GPIO2),
MSM_DEVICE(CLK_CTL),
@@ -106,7 +105,6 @@
MSM_DEVICE(VIC),
MSM_DEVICE(CSR),
MSM_DEVICE(TMR),
- MSM_DEVICE(DMOV),
MSM_DEVICE(GPIO1),
MSM_DEVICE(GPIO2),
MSM_DEVICE(CLK_CTL),
@@ -145,8 +143,6 @@
MSM_DEVICE(SAW1),
MSM_DEVICE(GCC),
MSM_DEVICE(TLMM),
- MSM_DEVICE(DMOV_ADM0),
- MSM_DEVICE(DMOV_ADM1),
MSM_DEVICE(SCPLL),
MSM_DEVICE(RPM),
MSM_DEVICE(CLK_CTL),
@@ -186,7 +182,6 @@
MSM_CHIP_DEVICE(MMSS_CLK_CTL, MSM8960),
MSM_CHIP_DEVICE(LPASS_CLK_CTL, MSM8960),
MSM_CHIP_DEVICE(RPM, MSM8960),
- MSM_CHIP_DEVICE(DMOV, MSM8960),
MSM_CHIP_DEVICE(TLMM, MSM8960),
MSM_CHIP_DEVICE(HFPLL, MSM8960),
MSM_CHIP_DEVICE(SAW0, MSM8960),
@@ -213,13 +208,51 @@
}
#endif /* CONFIG_ARCH_MSM8960 */
+#ifdef CONFIG_ARCH_MSM8930
+static struct map_desc msm8930_io_desc[] __initdata = {
+ MSM_CHIP_DEVICE(QGIC_DIST, MSM8930),
+ MSM_CHIP_DEVICE(QGIC_CPU, MSM8930),
+ MSM_CHIP_DEVICE(ACC0, MSM8930),
+ MSM_CHIP_DEVICE(ACC1, MSM8930),
+ MSM_CHIP_DEVICE(TMR, MSM8930),
+ MSM_CHIP_DEVICE(TMR0, MSM8930),
+ MSM_CHIP_DEVICE(RPM_MPM, MSM8930),
+ MSM_CHIP_DEVICE(CLK_CTL, MSM8930),
+ MSM_CHIP_DEVICE(MMSS_CLK_CTL, MSM8930),
+ MSM_CHIP_DEVICE(LPASS_CLK_CTL, MSM8930),
+ MSM_CHIP_DEVICE(RPM, MSM8930),
+ MSM_CHIP_DEVICE(TLMM, MSM8930),
+ MSM_CHIP_DEVICE(HFPLL, MSM8930),
+ MSM_CHIP_DEVICE(SAW0, MSM8930),
+ MSM_CHIP_DEVICE(SAW1, MSM8930),
+ MSM_CHIP_DEVICE(SAW_L2, MSM8930),
+ MSM_CHIP_DEVICE(SIC_NON_SECURE, MSM8930),
+ MSM_CHIP_DEVICE(APCS_GCC, MSM8930),
+ MSM_CHIP_DEVICE(IMEM, MSM8930),
+ MSM_CHIP_DEVICE(HDMI, MSM8930),
+ {
+ .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
+ .length = MSM_SHARED_RAM_SIZE,
+ .type = MT_DEVICE,
+ },
+#ifdef CONFIG_MSM_DEBUG_UART
+ MSM_DEVICE(DEBUG_UART),
+#endif
+ MSM_CHIP_DEVICE(QFPROM, MSM8930),
+};
+
+void __init msm_map_msm8930_io(void)
+{
+ msm_map_io(msm8930_io_desc, ARRAY_SIZE(msm8930_io_desc));
+}
+#endif /* CONFIG_ARCH_MSM8930 */
+
#ifdef CONFIG_ARCH_APQ8064
static struct map_desc apq8064_io_desc[] __initdata = {
MSM_CHIP_DEVICE(QGIC_DIST, APQ8064),
MSM_CHIP_DEVICE(QGIC_CPU, APQ8064),
MSM_CHIP_DEVICE(TMR, APQ8064),
MSM_CHIP_DEVICE(TMR0, APQ8064),
- MSM_CHIP_DEVICE(DMOV, APQ8064),
MSM_CHIP_DEVICE(TLMM, APQ8064),
MSM_CHIP_DEVICE(ACC0, APQ8064),
MSM_CHIP_DEVICE(ACC1, APQ8064),
@@ -244,12 +277,26 @@
}
#endif /* CONFIG_ARCH_APQ8064 */
+#ifdef CONFIG_ARCH_MSMCOPPER
+static struct map_desc msm_copper_io_desc[] __initdata = {
+ MSM_CHIP_DEVICE(QGIC_DIST, COPPER),
+ MSM_CHIP_DEVICE(QGIC_CPU, COPPER),
+ MSM_CHIP_DEVICE(TLMM, COPPER),
+ MSM_CHIP_DEVICE(TMR, COPPER),
+ MSM_CHIP_DEVICE(TMR0, COPPER),
+};
+
+void __init msm_map_copper_io(void)
+{
+ msm_map_io(msm_copper_io_desc, ARRAY_SIZE(msm_copper_io_desc));
+}
+#endif /* CONFIG_ARCH_MSMCOPPER */
+
#ifdef CONFIG_ARCH_MSM7X30
static struct map_desc msm7x30_io_desc[] __initdata = {
MSM_DEVICE(VIC),
MSM_DEVICE(CSR),
MSM_DEVICE(TMR),
- MSM_DEVICE(DMOV),
MSM_DEVICE(GPIO1),
MSM_DEVICE(GPIO2),
MSM_DEVICE(CLK_CTL),
@@ -288,10 +335,6 @@
MSM_DEVICE(SAW),
MSM_DEVICE(GCC),
MSM_DEVICE(GRFC),
- MSM_DEVICE(DMOV_SD0),
- MSM_DEVICE(DMOV_SD1),
- MSM_DEVICE(DMOV_SD2),
- MSM_DEVICE(DMOV_SD3),
MSM_DEVICE(QFP_FUSE),
MSM_DEVICE(HH),
#ifdef CONFIG_MSM_DEBUG_UART
@@ -316,7 +359,6 @@
MSM_CHIP_DEVICE(QGIC_CPU, MSM9615),
MSM_CHIP_DEVICE(ACC0, MSM9615),
MSM_CHIP_DEVICE(TMR, MSM9615),
- MSM_CHIP_DEVICE(DMOV, MSM9615),
MSM_CHIP_DEVICE(TLMM, MSM9615),
MSM_CHIP_DEVICE(SAW0, MSM9615),
MSM_CHIP_DEVICE(APCS_GCC, MSM9615),
diff --git a/arch/arm/mach-msm/iommu.c b/arch/arm/mach-msm/iommu.c
index e5fb441..442a1b4 100644
--- a/arch/arm/mach-msm/iommu.c
+++ b/arch/arm/mach-msm/iommu.c
@@ -184,9 +184,6 @@
SET_TTBCR(base, ctx, 0);
SET_TTBR0_PA(base, ctx, (pgtable >> TTBR0_PA_SHIFT));
- /* Set interrupt number to "secure" interrupt */
- SET_IRPTNDX(base, ctx, 0);
-
/* Enable context fault interrupt */
SET_CFEIE(base, ctx, 1);
@@ -1009,6 +1006,9 @@
static int __init msm_iommu_init(void)
{
+ if (!msm_soc_version_supports_iommu())
+ return -ENODEV;
+
setup_iommu_tex_classes();
register_iommu(&msm_iommu_ops);
return 0;
diff --git a/arch/arm/mach-msm/iommu_dev.c b/arch/arm/mach-msm/iommu_dev.c
index f0e0b33..d1dd3ed 100644
--- a/arch/arm/mach-msm/iommu_dev.c
+++ b/arch/arm/mach-msm/iommu_dev.c
@@ -69,7 +69,7 @@
r.name = ctx_name;
found = device_for_each_child(&msm_iommu_root_dev->dev, &r, each_iommu);
- if (!found) {
+ if (!found || !dev_get_drvdata(r.dev)) {
pr_err("Could not find context <%s>\n", ctx_name);
goto fail;
}
@@ -151,7 +151,7 @@
goto fail;
}
- iommu_pclk = clk_get(NULL, "smmu_pclk");
+ iommu_pclk = clk_get_sys("msm_iommu", "iface_clk");
if (IS_ERR(iommu_pclk)) {
ret = -ENODEV;
goto fail;
@@ -161,7 +161,7 @@
if (ret)
goto fail_enable;
- iommu_clk = clk_get(&pdev->dev, "iommu_clk");
+ iommu_clk = clk_get(&pdev->dev, "core_clk");
if (!IS_ERR(iommu_clk)) {
if (clk_get_rate(iommu_clk) == 0)
@@ -335,6 +335,9 @@
SET_M2VCBR_N(drvdata->base, mid, 0);
SET_CBACR_N(drvdata->base, c->num, 0);
+ /* Route page faults to the non-secure interrupt */
+ SET_IRPTNDX(drvdata->base, c->num, 1);
+
/* Set VMID = 0 */
SET_VMID(drvdata->base, mid, 0);
diff --git a/arch/arm/mach-msm/lpass-8660.c b/arch/arm/mach-msm/lpass-8660.c
new file mode 100644
index 0000000..36b8dcc
--- /dev/null
+++ b/arch/arm/mach-msm/lpass-8660.c
@@ -0,0 +1,166 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/reboot.h>
+#include <linux/workqueue.h>
+#include <linux/io.h>
+#include <linux/jiffies.h>
+#include <linux/stringify.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+
+#include <mach/irqs.h>
+#include <mach/scm.h>
+#include <mach/peripheral-loader.h>
+#include <mach/subsystem_restart.h>
+#include <mach/subsystem_notif.h>
+
+#include "smd_private.h"
+#include "modem_notifier.h"
+#include "ramdump.h"
+
+#define Q6SS_WDOG_ENABLE 0x28882024
+#define Q6SS_SOFT_INTR_WAKEUP 0x288A001C
+#define MODULE_NAME "lpass_8x60"
+#define SCM_Q6_NMI_CMD 0x1
+
+/* Subsystem restart: QDSP6 data, functions */
+static void *q6_ramdump_dev;
+static void q6_fatal_fn(struct work_struct *);
+static DECLARE_WORK(q6_fatal_work, q6_fatal_fn);
+
+static void q6_fatal_fn(struct work_struct *work)
+{
+ pr_err("%s: Watchdog bite received from Q6!\n", MODULE_NAME);
+ subsystem_restart("lpass");
+ enable_irq(LPASS_Q6SS_WDOG_EXPIRED);
+}
+
+static void send_q6_nmi(void)
+{
+ /* Send NMI to QDSP6 via an SCM call. */
+ uint32_t cmd = 0x1;
+ void __iomem *q6_wakeup_intr;
+
+ scm_call(SCM_SVC_UTIL, SCM_Q6_NMI_CMD,
+ &cmd, sizeof(cmd), NULL, 0);
+
+ /* Wakeup the Q6 */
+ q6_wakeup_intr = ioremap_nocache(Q6SS_SOFT_INTR_WAKEUP, 8);
+ writel_relaxed(0x2000, q6_wakeup_intr);
+ iounmap(q6_wakeup_intr);
+ mb();
+
+ /* Q6 requires atleast 100ms to dump caches etc.*/
+ msleep(100);
+
+ pr_info("subsystem-fatal-8x60: Q6 NMI was sent.\n");
+}
+
+int subsys_q6_shutdown(const struct subsys_data *crashed_subsys)
+{
+ void __iomem *q6_wdog_addr =
+ ioremap_nocache(Q6SS_WDOG_ENABLE, 8);
+
+ send_q6_nmi();
+ writel_relaxed(0x0, q6_wdog_addr);
+ /* The write needs to go through before the q6 is shutdown. */
+ mb();
+ iounmap(q6_wdog_addr);
+
+ pil_force_shutdown("q6");
+ disable_irq_nosync(LPASS_Q6SS_WDOG_EXPIRED);
+
+ if (get_restart_level() == RESET_SUBSYS_MIXED)
+ smsm_reset_modem(SMSM_RESET);
+
+ return 0;
+}
+
+int subsys_q6_powerup(const struct subsys_data *crashed_subsys)
+{
+ int ret = pil_force_boot("q6");
+ enable_irq(LPASS_Q6SS_WDOG_EXPIRED);
+ return ret;
+}
+
+/* FIXME: Get address, size from PIL */
+static struct ramdump_segment q6_segments[] = { {0x46700000, 0x47F00000 -
+ 0x46700000}, {0x28400000, 0x12800} };
+static int subsys_q6_ramdump(int enable,
+ const struct subsys_data *crashed_subsys)
+{
+ if (enable)
+ return do_ramdump(q6_ramdump_dev, q6_segments,
+ ARRAY_SIZE(q6_segments));
+ else
+ return 0;
+}
+
+void subsys_q6_crash_shutdown(const struct subsys_data *crashed_subsys)
+{
+ send_q6_nmi();
+}
+
+static irqreturn_t lpass_wdog_bite_irq(int irq, void *dev_id)
+{
+ int ret;
+
+ ret = schedule_work(&q6_fatal_work);
+ disable_irq_nosync(LPASS_Q6SS_WDOG_EXPIRED);
+
+ return IRQ_HANDLED;
+}
+
+static struct subsys_data subsys_8x60_q6 = {
+ .name = "lpass",
+ .shutdown = subsys_q6_shutdown,
+ .powerup = subsys_q6_powerup,
+ .ramdump = subsys_q6_ramdump,
+ .crash_shutdown = subsys_q6_crash_shutdown
+};
+
+static void __exit lpass_fatal_exit(void)
+{
+ free_irq(LPASS_Q6SS_WDOG_EXPIRED, NULL);
+}
+
+static int __init lpass_fatal_init(void)
+{
+ int ret;
+
+ ret = request_irq(LPASS_Q6SS_WDOG_EXPIRED, lpass_wdog_bite_irq,
+ IRQF_TRIGGER_RISING, "q6_wdog", NULL);
+
+ if (ret < 0) {
+ pr_err("%s: Unable to request LPASS_Q6SS_WDOG_EXPIRED irq.",
+ __func__);
+ goto out;
+ }
+
+ q6_ramdump_dev = create_ramdump_device("lpass");
+
+ if (!q6_ramdump_dev) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ ret = ssr_register_subsystem(&subsys_8x60_q6);
+out:
+ return ret;
+}
+
+module_init(lpass_fatal_init);
+module_exit(lpass_fatal_exit);
+
diff --git a/arch/arm/mach-msm/subsystem-fatal-8x60.c b/arch/arm/mach-msm/modem-8660.c
similarity index 60%
rename from arch/arm/mach-msm/subsystem-fatal-8x60.c
rename to arch/arm/mach-msm/modem-8660.c
index a061aa0..19711a2 100644
--- a/arch/arm/mach-msm/subsystem-fatal-8x60.c
+++ b/arch/arm/mach-msm/modem-8660.c
@@ -31,11 +31,8 @@
#include "ramdump.h"
#define MODEM_HWIO_MSS_RESET_ADDR 0x00902C48
-#define SCM_Q6_NMI_CMD 0x1
-#define MODULE_NAME "subsystem_fatal_8x60"
-#define Q6SS_SOFT_INTR_WAKEUP 0x288A001C
+#define MODULE_NAME "modem_8660"
#define MODEM_WDOG_ENABLE 0x10020008
-#define Q6SS_WDOG_ENABLE 0x28882024
#define MODEM_CLEANUP_DELAY_MS 20
#define SUBSYS_FATAL_DEBUG
@@ -50,86 +47,8 @@
module_param(reset_modem, int, 0644);
#endif
-static void do_soc_restart(void);
-
-/* Subsystem restart: QDSP6 data, functions */
-static void q6_fatal_fn(struct work_struct *);
-static DECLARE_WORK(q6_fatal_work, q6_fatal_fn);
-static void *q6_ramdump_dev, *modem_ramdump_dev;
-static void __iomem *q6_wakeup_intr;
-
-static void q6_fatal_fn(struct work_struct *work)
-{
- pr_err("%s: Watchdog bite received from Q6!\n", MODULE_NAME);
- subsystem_restart("lpass");
- enable_irq(LPASS_Q6SS_WDOG_EXPIRED);
-}
-
-static void send_q6_nmi(void)
-{
- /* Send NMI to QDSP6 via an SCM call. */
- uint32_t cmd = 0x1;
-
- scm_call(SCM_SVC_UTIL, SCM_Q6_NMI_CMD,
- &cmd, sizeof(cmd), NULL, 0);
-
- /* Wakeup the Q6 */
- if (q6_wakeup_intr)
- writel_relaxed(0x2000, q6_wakeup_intr);
- mb();
-
- /* Q6 requires atleast 100ms to dump caches etc.*/
- mdelay(100);
-
- pr_info("subsystem-fatal-8x60: Q6 NMI was sent.\n");
-}
-
-int subsys_q6_shutdown(const struct subsys_data *crashed_subsys)
-{
- void __iomem *q6_wdog_addr =
- ioremap_nocache(Q6SS_WDOG_ENABLE, 8);
-
- send_q6_nmi();
- writel_relaxed(0x0, q6_wdog_addr);
- /* The write needs to go through before the q6 is shutdown. */
- mb();
- iounmap(q6_wdog_addr);
-
- pil_force_shutdown("q6");
- disable_irq_nosync(LPASS_Q6SS_WDOG_EXPIRED);
-
- if (get_restart_level() == RESET_SUBSYS_MIXED)
- smsm_reset_modem(SMSM_RESET);
-
- return 0;
-}
-
-int subsys_q6_powerup(const struct subsys_data *crashed_subsys)
-{
- int ret = pil_force_boot("q6");
- enable_irq(LPASS_Q6SS_WDOG_EXPIRED);
- return ret;
-}
-
-/* FIXME: Get address, size from PIL */
-static struct ramdump_segment q6_segments[] = { {0x46700000, 0x47F00000 -
- 0x46700000}, {0x28400000, 0x12800} };
-static int subsys_q6_ramdump(int enable,
- const struct subsys_data *crashed_subsys)
-{
- if (enable)
- return do_ramdump(q6_ramdump_dev, q6_segments,
- ARRAY_SIZE(q6_segments));
- else
- return 0;
-}
-
-void subsys_q6_crash_shutdown(const struct subsys_data *crashed_subsys)
-{
- send_q6_nmi();
-}
-
/* Subsystem restart: Modem data, functions */
+static void *modem_ramdump_dev;
static void modem_fatal_fn(struct work_struct *);
static void modem_unlock_timeout(struct work_struct *work);
static int modem_notif_handler(struct notifier_block *this,
@@ -180,7 +99,7 @@
pr_err("%s: User-invoked system reset/powerdown.",
MODULE_NAME);
- do_soc_restart();
+ kernel_restart(NULL);
} else {
@@ -191,7 +110,7 @@
pr_err("%s: Modem AHB locked up.\n", MODULE_NAME);
pr_err("%s: Trying to free up modem!\n", MODULE_NAME);
- writel(0x3, hwio_modem_reset_addr);
+ writel_relaxed(0x3, hwio_modem_reset_addr);
/* If we are still alive after 6 seconds (allowing for
* the 5-second-delayed-panic-reboot), modem is either
@@ -217,7 +136,7 @@
return NOTIFY_DONE;
}
-static int subsys_modem_shutdown(const struct subsys_data *crashed_subsys)
+static int modem_shutdown(const struct subsys_data *crashed_subsys)
{
void __iomem *modem_wdog_addr;
int smsm_notif_unregistered = 0;
@@ -257,7 +176,7 @@
return 0;
}
-static int subsys_modem_powerup(const struct subsys_data *crashed_subsys)
+static int modem_powerup(const struct subsys_data *crashed_subsys)
{
int ret;
@@ -271,7 +190,7 @@
static struct ramdump_segment modem_segments[] = {
{0x42F00000, 0x46000000 - 0x42F00000} };
-static int subsys_modem_ramdump(int enable,
+static int modem_ramdump(int enable,
const struct subsys_data *crashed_subsys)
{
if (enable)
@@ -281,7 +200,7 @@
return 0;
}
-static void subsys_modem_crash_shutdown(
+static void modem_crash_shutdown(
const struct subsys_data *crashed_subsys)
{
/* If modem hasn't already crashed, send SMSM_RESET. */
@@ -294,61 +213,25 @@
mdelay(5);
}
-/* Non-subsystem-specific functions */
-static void do_soc_restart(void)
-{
- pr_err("%s: Rebooting SoC..\n", MODULE_NAME);
- kernel_restart(NULL);
-}
-
-static irqreturn_t subsys_wdog_bite_irq(int irq, void *dev_id)
+static irqreturn_t modem_wdog_bite_irq(int irq, void *dev_id)
{
int ret;
- switch (irq) {
-
- case MARM_WDOG_EXPIRED:
- ret = schedule_work(&modem_fatal_work);
- disable_irq_nosync(MARM_WDOG_EXPIRED);
- break;
-
- case LPASS_Q6SS_WDOG_EXPIRED:
- ret = schedule_work(&q6_fatal_work);
- disable_irq_nosync(LPASS_Q6SS_WDOG_EXPIRED);
- break;
-
- default:
- pr_err("%s: %s: Unknown IRQ!\n", MODULE_NAME, __func__);
- }
+ ret = schedule_work(&modem_fatal_work);
+ disable_irq_nosync(MARM_WDOG_EXPIRED);
return IRQ_HANDLED;
}
-static struct subsys_data subsys_8x60_q6 = {
- .name = "lpass",
- .shutdown = subsys_q6_shutdown,
- .powerup = subsys_q6_powerup,
- .ramdump = subsys_q6_ramdump,
- .crash_shutdown = subsys_q6_crash_shutdown
-};
-
-static struct subsys_data subsys_8x60_modem = {
+static struct subsys_data subsys_8660_modem = {
.name = "modem",
- .shutdown = subsys_modem_shutdown,
- .powerup = subsys_modem_powerup,
- .ramdump = subsys_modem_ramdump,
- .crash_shutdown = subsys_modem_crash_shutdown
+ .shutdown = modem_shutdown,
+ .powerup = modem_powerup,
+ .ramdump = modem_ramdump,
+ .crash_shutdown = modem_crash_shutdown
};
-static int __init subsystem_restart_8x60_init(void)
-{
- ssr_register_subsystem(&subsys_8x60_modem);
- ssr_register_subsystem(&subsys_8x60_q6);
-
- return 0;
-}
-
-static int __init subsystem_fatal_init(void)
+static int __init modem_8660_init(void)
{
int ret;
@@ -359,7 +242,7 @@
schedule_delayed_work(&debug_crash_modem_work, msecs_to_jiffies(5000));
#endif
- ret = request_irq(MARM_WDOG_EXPIRED, subsys_wdog_bite_irq,
+ ret = request_irq(MARM_WDOG_EXPIRED, modem_wdog_bite_irq,
IRQF_TRIGGER_RISING, "modem_wdog", NULL);
if (ret < 0) {
@@ -368,27 +251,6 @@
goto out;
}
- ret = request_irq(LPASS_Q6SS_WDOG_EXPIRED, subsys_wdog_bite_irq,
- IRQF_TRIGGER_RISING, "q6_wdog", NULL);
-
- if (ret < 0) {
- pr_err("%s: Unable to request LPASS_Q6SS_WDOG_EXPIRED irq.",
- __func__);
- goto out;
- }
-
- q6_wakeup_intr = ioremap_nocache(Q6SS_SOFT_INTR_WAKEUP, 8);
-
- if (!q6_wakeup_intr)
- pr_err("%s: Unable to request q6 wakeup interrupt.", __func__);
-
- q6_ramdump_dev = create_ramdump_device("lpass");
-
- if (!q6_ramdump_dev) {
- ret = -ENOMEM;
- goto out;
- }
-
modem_ramdump_dev = create_ramdump_device("modem");
if (!modem_ramdump_dev) {
@@ -396,15 +258,14 @@
goto out;
}
- ret = subsystem_restart_8x60_init();
+ ret = ssr_register_subsystem(&subsys_8660_modem);
out:
return ret;
}
-static void __exit subsystem_fatal_exit(void)
+static void __exit modem_8660_exit(void)
{
free_irq(MARM_WDOG_EXPIRED, NULL);
- free_irq(LPASS_Q6SS_WDOG_EXPIRED, NULL);
}
#ifdef SUBSYS_FATAL_DEBUG
@@ -420,5 +281,6 @@
}
#endif
-module_init(subsystem_fatal_init);
-module_exit(subsystem_fatal_exit);
+module_init(modem_8660_init);
+module_exit(modem_8660_exit);
+
diff --git a/arch/arm/mach-msm/modem-8960.c b/arch/arm/mach-msm/modem-8960.c
index 03afc94..7bcd844 100644
--- a/arch/arm/mach-msm/modem-8960.c
+++ b/arch/arm/mach-msm/modem-8960.c
@@ -227,7 +227,7 @@
{
int ret;
- if (!cpu_is_msm8960())
+ if (!cpu_is_msm8960() && !cpu_is_msm8930())
return -ENODEV;
ret = smsm_state_cb_register(SMSM_MODEM_STATE, SMSM_RESET,
diff --git a/arch/arm/mach-msm/msm-krait-l2-accessors.c b/arch/arm/mach-msm/msm-krait-l2-accessors.c
index 61b5228..b03e2d2 100644
--- a/arch/arm/mach-msm/msm-krait-l2-accessors.c
+++ b/arch/arm/mach-msm/msm-krait-l2-accessors.c
@@ -12,6 +12,7 @@
*/
#include <linux/spinlock.h>
+#include <linux/module.h>
#include <asm/mach-types.h>
DEFINE_RAW_SPINLOCK(l2_access_lock);
@@ -40,6 +41,7 @@
return ret_val;
}
+EXPORT_SYMBOL(set_get_l2_indirect_reg);
void set_l2_indirect_reg(u32 reg_addr, u32 val)
{
@@ -58,6 +60,7 @@
isb();
raw_spin_unlock_irqrestore(&l2_access_lock, flags);
}
+EXPORT_SYMBOL(set_l2_indirect_reg);
u32 get_l2_indirect_reg(u32 reg_addr)
{
@@ -77,3 +80,4 @@
return val;
}
+EXPORT_SYMBOL(get_l2_indirect_reg);
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_arb.c b/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
index 7565eb3..56bc71d 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_arb.c
@@ -394,7 +394,7 @@
int ret = 0;
struct msm_bus_fabric_device *fabdev = to_msm_bus_fabric_device(dev);
MSM_BUS_DBG("Committing: fabid: %d\n", fabdev->id);
- ret = fabdev->algo->commit(fabdev, (int)data);
+ ret = fabdev->algo->commit(fabdev);
return ret;
}
@@ -556,7 +556,7 @@
client->curr = index;
ctx = ACTIVE_CTX;
msm_bus_dbg_client_data(client->pdata, index, cl);
- bus_for_each_dev(&msm_bus_type, NULL, (void *)ctx, msm_bus_commit_fn);
+ bus_for_each_dev(&msm_bus_type, NULL, NULL, msm_bus_commit_fn);
err:
mutex_unlock(&msm_bus_lock);
@@ -613,6 +613,19 @@
return 0;
}
+int msm_bus_board_get_iid(int id)
+{
+ struct msm_bus_fabric_device *deffab;
+
+ deffab = msm_bus_get_fabric_device(MSM_BUS_FAB_DEFAULT);
+ if (!deffab) {
+ MSM_BUS_ERR("Error finding default fabric\n");
+ return -ENXIO;
+ }
+
+ return deffab->board_algo->get_iid(id);
+}
+
void msm_bus_scale_client_reset_pnodes(uint32_t cl)
{
int i, src, pnode, index;
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_board_8660.c b/arch/arm/mach-msm/msm_bus/msm_bus_board_8660.c
index 13b59ed..fde2322 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_board_8660.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_board_8660.c
@@ -805,80 +805,8 @@
},
};
-struct msm_bus_fabric_registration msm_bus_apps_fabric_pdata = {
- .id = MSM_BUS_FAB_APPSS,
- .name = "msm_apps_fab",
- .info = apps_fabric_info,
- .len = ARRAY_SIZE(apps_fabric_info),
- .ahb = 0,
- .fabclk[DUAL_CTX] = "afab_clk",
- .fabclk[ACTIVE_CTX] = "afab_a_clk",
- .haltid = MSM_RPM_ID_APPS_FABRIC_HALT_0,
- .offset = MSM_RPM_ID_APPS_FABRIC_ARB_0,
- .nmasters = 4,
- .nslaves = 4,
- .ntieredslaves = 2,
-};
-
-struct msm_bus_fabric_registration msm_bus_sys_fabric_pdata = {
- .id = MSM_BUS_FAB_SYSTEM,
- .name = "msm_sys_fab",
- system_fabric_info,
- ARRAY_SIZE(system_fabric_info),
- .ahb = 0,
- .fabclk[DUAL_CTX] = "sfab_clk",
- .fabclk[ACTIVE_CTX] = "sfab_a_clk",
- .haltid = MSM_RPM_ID_SYSTEM_FABRIC_HALT_0,
- .offset = MSM_RPM_ID_SYSTEM_FABRIC_ARB_0,
- .nmasters = 17,
- .nslaves = 9,
- .ntieredslaves = 2,
-};
-
-struct msm_bus_fabric_registration msm_bus_mm_fabric_pdata = {
- .id = MSM_BUS_FAB_MMSS,
- .name = "msm_mm_fab",
- mmss_fabric_info,
- ARRAY_SIZE(mmss_fabric_info),
- .ahb = 0,
- .fabclk[DUAL_CTX] = "mmfab_clk",
- .fabclk[ACTIVE_CTX] = "mmfab_a_clk",
- .haltid = MSM_RPM_ID_MM_FABRIC_HALT_0,
- .offset = MSM_RPM_ID_MM_FABRIC_ARB_0,
- .nmasters = 14,
- .nslaves = 4,
- .ntieredslaves = 3,
-};
-
-struct msm_bus_fabric_registration msm_bus_sys_fpb_pdata = {
- .id = MSM_BUS_FAB_SYSTEM_FPB,
- .name = "msm_sys_fpb",
- sys_fpb_fabric_info,
- ARRAY_SIZE(sys_fpb_fabric_info),
- .ahb = 1,
- .fabclk[DUAL_CTX] = "sfpb_clk",
- .fabclk[ACTIVE_CTX] = "sfpb_a_clk",
- .nmasters = 0,
- .nslaves = 0,
- .ntieredslaves = 0,
-};
-
-struct msm_bus_fabric_registration msm_bus_cpss_fpb_pdata = {
- .id = MSM_BUS_FAB_CPSS_FPB,
- .name = "msm_cpss_fpb",
- cpss_fpb_fabric_info,
- ARRAY_SIZE(cpss_fpb_fabric_info),
- .ahb = 1,
- .fabclk[DUAL_CTX] = "cfpb_clk",
- .fabclk[ACTIVE_CTX] = "cfpb_a_clk",
- .nmasters = 0,
- .nslaves = 0,
- .ntieredslaves = 0,
-};
-
-static void msm_bus_board_get_ids(
- struct msm_bus_fabric_registration *fabreg,
- int fabid)
+static void msm_bus_board_assign_iids(struct msm_bus_fabric_registration
+ *fabreg, int fabid)
{
int i;
for (i = 0; i < fabreg->len; i++) {
@@ -895,17 +823,93 @@
}
}
-void msm_bus_board_assign_iids(struct msm_bus_fabric_registration *fabreg,
- int fabid)
-{
- msm_bus_board_get_ids(fabreg, fabid);
-}
-int msm_bus_board_get_iid(int id)
+static int msm_bus_board_8660_get_iid(int id)
{
return ((id < SLAVE_ID_KEY) ? master_iids[id] : slave_iids[id -
SLAVE_ID_KEY]);
}
+static struct msm_bus_board_algorithm msm_bus_board_algo = {
+ .get_iid = msm_bus_board_8660_get_iid,
+ .assign_iids = msm_bus_board_assign_iids,
+};
+
+struct msm_bus_fabric_registration msm_bus_apps_fabric_pdata = {
+ .id = MSM_BUS_FAB_APPSS,
+ .name = "msm_apps_fab",
+ .info = apps_fabric_info,
+ .len = ARRAY_SIZE(apps_fabric_info),
+ .ahb = 0,
+ .fabclk[DUAL_CTX] = "afab_clk",
+ .fabclk[ACTIVE_CTX] = "afab_a_clk",
+ .haltid = MSM_RPM_ID_APPS_FABRIC_HALT_0,
+ .offset = MSM_RPM_ID_APPS_FABRIC_ARB_0,
+ .nmasters = 4,
+ .nslaves = 4,
+ .ntieredslaves = 2,
+ .board_algo = &msm_bus_board_algo,
+};
+
+struct msm_bus_fabric_registration msm_bus_sys_fabric_pdata = {
+ .id = MSM_BUS_FAB_SYSTEM,
+ .name = "msm_sys_fab",
+ system_fabric_info,
+ ARRAY_SIZE(system_fabric_info),
+ .ahb = 0,
+ .fabclk[DUAL_CTX] = "sfab_clk",
+ .fabclk[ACTIVE_CTX] = "sfab_a_clk",
+ .haltid = MSM_RPM_ID_SYSTEM_FABRIC_HALT_0,
+ .offset = MSM_RPM_ID_SYSTEM_FABRIC_ARB_0,
+ .nmasters = 17,
+ .nslaves = 9,
+ .ntieredslaves = 2,
+ .board_algo = &msm_bus_board_algo,
+};
+
+struct msm_bus_fabric_registration msm_bus_mm_fabric_pdata = {
+ .id = MSM_BUS_FAB_MMSS,
+ .name = "msm_mm_fab",
+ mmss_fabric_info,
+ ARRAY_SIZE(mmss_fabric_info),
+ .ahb = 0,
+ .fabclk[DUAL_CTX] = "mmfab_clk",
+ .fabclk[ACTIVE_CTX] = "mmfab_a_clk",
+ .haltid = MSM_RPM_ID_MM_FABRIC_HALT_0,
+ .offset = MSM_RPM_ID_MM_FABRIC_ARB_0,
+ .nmasters = 14,
+ .nslaves = 4,
+ .ntieredslaves = 3,
+ .board_algo = &msm_bus_board_algo,
+};
+
+struct msm_bus_fabric_registration msm_bus_sys_fpb_pdata = {
+ .id = MSM_BUS_FAB_SYSTEM_FPB,
+ .name = "msm_sys_fpb",
+ sys_fpb_fabric_info,
+ ARRAY_SIZE(sys_fpb_fabric_info),
+ .ahb = 1,
+ .fabclk[DUAL_CTX] = "sfpb_clk",
+ .fabclk[ACTIVE_CTX] = "sfpb_a_clk",
+ .nmasters = 0,
+ .nslaves = 0,
+ .ntieredslaves = 0,
+ .board_algo = &msm_bus_board_algo,
+};
+
+struct msm_bus_fabric_registration msm_bus_cpss_fpb_pdata = {
+ .id = MSM_BUS_FAB_CPSS_FPB,
+ .name = "msm_cpss_fpb",
+ cpss_fpb_fabric_info,
+ ARRAY_SIZE(cpss_fpb_fabric_info),
+ .ahb = 1,
+ .fabclk[DUAL_CTX] = "cfpb_clk",
+ .fabclk[ACTIVE_CTX] = "cfpb_a_clk",
+ .nmasters = 0,
+ .nslaves = 0,
+ .ntieredslaves = 0,
+ .board_algo = &msm_bus_board_algo,
+};
+
int msm_bus_board_rpm_get_il_ids(uint16_t id[])
{
return -ENXIO;
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_board_8960.c b/arch/arm/mach-msm/msm_bus/msm_bus_board_8960.c
index 8ab1899..47f3c81 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_board_8960.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_board_8960.c
@@ -832,80 +832,8 @@
},
};
-struct msm_bus_fabric_registration msm_bus_apps_fabric_pdata = {
- .id = MSM_BUS_FAB_APPSS,
- .name = "msm_apps_fab",
- .info = apps_fabric_info,
- .len = ARRAY_SIZE(apps_fabric_info),
- .ahb = 0,
- .fabclk[DUAL_CTX] = "afab_clk",
- .fabclk[ACTIVE_CTX] = "afab_a_clk",
- .haltid = MSM_RPM_ID_APPS_FABRIC_CFG_HALT_0,
- .offset = MSM_RPM_ID_APPS_FABRIC_ARB_0,
- .nmasters = 6,
- .nslaves = 5,
- .ntieredslaves = 3,
-};
-
-struct msm_bus_fabric_registration msm_bus_sys_fabric_pdata = {
- .id = MSM_BUS_FAB_SYSTEM,
- .name = "msm_sys_fab",
- system_fabric_info,
- ARRAY_SIZE(system_fabric_info),
- .ahb = 0,
- .fabclk[DUAL_CTX] = "sfab_clk",
- .fabclk[ACTIVE_CTX] = "sfab_a_clk",
- .haltid = MSM_RPM_ID_SYS_FABRIC_CFG_HALT_0,
- .offset = MSM_RPM_ID_SYSTEM_FABRIC_ARB_0,
- .nmasters = 15,
- .nslaves = 12,
- .ntieredslaves = 3,
-};
-
-struct msm_bus_fabric_registration msm_bus_mm_fabric_pdata = {
- .id = MSM_BUS_FAB_MMSS,
- .name = "msm_mm_fab",
- mmss_fabric_info,
- ARRAY_SIZE(mmss_fabric_info),
- .ahb = 0,
- .fabclk[DUAL_CTX] = "mmfab_clk",
- .fabclk[ACTIVE_CTX] = "mmfab_a_clk",
- .haltid = MSM_RPM_ID_MMSS_FABRIC_CFG_HALT_0,
- .offset = MSM_RPM_ID_MM_FABRIC_ARB_0,
- .nmasters = 14,
- .nslaves = 4,
- .ntieredslaves = 3,
-};
-
-struct msm_bus_fabric_registration msm_bus_sys_fpb_pdata = {
- .id = MSM_BUS_FAB_SYSTEM_FPB,
- .name = "msm_sys_fpb",
- sys_fpb_fabric_info,
- ARRAY_SIZE(sys_fpb_fabric_info),
- .ahb = 1,
- .fabclk[DUAL_CTX] = "sfpb_clk",
- .fabclk[ACTIVE_CTX] = "sfpb_a_clk",
- .nmasters = 0,
- .nslaves = 0,
- .ntieredslaves = 0,
-};
-
-struct msm_bus_fabric_registration msm_bus_cpss_fpb_pdata = {
- .id = MSM_BUS_FAB_CPSS_FPB,
- .name = "msm_cpss_fpb",
- cpss_fpb_fabric_info,
- ARRAY_SIZE(cpss_fpb_fabric_info),
- .ahb = 1,
- .fabclk[DUAL_CTX] = "cfpb_clk",
- .fabclk[ACTIVE_CTX] = "cfpb_a_clk",
- .nmasters = 0,
- .nslaves = 0,
- .ntieredslaves = 0,
-};
-
-static void msm_bus_board_get_ids(
- struct msm_bus_fabric_registration *fabreg,
- int fabid)
+static void msm_bus_board_assign_iids(struct msm_bus_fabric_registration
+ *fabreg, int fabid)
{
int i;
for (i = 0; i < fabreg->len; i++) {
@@ -922,12 +850,7 @@
}
}
-void msm_bus_board_assign_iids(struct msm_bus_fabric_registration *fabreg,
- int fabid)
-{
- msm_bus_board_get_ids(fabreg, fabid);
-}
-int msm_bus_board_get_iid(int id)
+static int msm_bus_board_8960_get_iid(int id)
{
if ((id < SLAVE_ID_KEY && id >= NMASTERS) ||
id >= (SLAVE_ID_KEY + NSLAVES)) {
@@ -939,6 +862,87 @@
SLAVE_ID_KEY]);
}
+static struct msm_bus_board_algorithm msm_bus_board_algo = {
+ .get_iid = msm_bus_board_8960_get_iid,
+ .assign_iids = msm_bus_board_assign_iids,
+};
+
+struct msm_bus_fabric_registration msm_bus_8960_apps_fabric_pdata = {
+ .id = MSM_BUS_FAB_APPSS,
+ .name = "msm_apps_fab",
+ .info = apps_fabric_info,
+ .len = ARRAY_SIZE(apps_fabric_info),
+ .ahb = 0,
+ .fabclk[DUAL_CTX] = "afab_clk",
+ .fabclk[ACTIVE_CTX] = "afab_a_clk",
+ .haltid = MSM_RPM_ID_APPS_FABRIC_CFG_HALT_0,
+ .offset = MSM_RPM_ID_APPS_FABRIC_ARB_0,
+ .nmasters = 6,
+ .nslaves = 5,
+ .ntieredslaves = 3,
+ .board_algo = &msm_bus_board_algo,
+};
+
+struct msm_bus_fabric_registration msm_bus_8960_sys_fabric_pdata = {
+ .id = MSM_BUS_FAB_SYSTEM,
+ .name = "msm_sys_fab",
+ system_fabric_info,
+ ARRAY_SIZE(system_fabric_info),
+ .ahb = 0,
+ .fabclk[DUAL_CTX] = "sfab_clk",
+ .fabclk[ACTIVE_CTX] = "sfab_a_clk",
+ .haltid = MSM_RPM_ID_SYS_FABRIC_CFG_HALT_0,
+ .offset = MSM_RPM_ID_SYSTEM_FABRIC_ARB_0,
+ .nmasters = 15,
+ .nslaves = 12,
+ .ntieredslaves = 3,
+ .board_algo = &msm_bus_board_algo,
+};
+
+struct msm_bus_fabric_registration msm_bus_8960_mm_fabric_pdata = {
+ .id = MSM_BUS_FAB_MMSS,
+ .name = "msm_mm_fab",
+ mmss_fabric_info,
+ ARRAY_SIZE(mmss_fabric_info),
+ .ahb = 0,
+ .fabclk[DUAL_CTX] = "mmfab_clk",
+ .fabclk[ACTIVE_CTX] = "mmfab_a_clk",
+ .haltid = MSM_RPM_ID_MMSS_FABRIC_CFG_HALT_0,
+ .offset = MSM_RPM_ID_MM_FABRIC_ARB_0,
+ .nmasters = 14,
+ .nslaves = 4,
+ .ntieredslaves = 3,
+ .board_algo = &msm_bus_board_algo,
+};
+
+struct msm_bus_fabric_registration msm_bus_8960_sys_fpb_pdata = {
+ .id = MSM_BUS_FAB_SYSTEM_FPB,
+ .name = "msm_sys_fpb",
+ sys_fpb_fabric_info,
+ ARRAY_SIZE(sys_fpb_fabric_info),
+ .ahb = 1,
+ .fabclk[DUAL_CTX] = "sfpb_clk",
+ .fabclk[ACTIVE_CTX] = "sfpb_a_clk",
+ .nmasters = 0,
+ .nslaves = 0,
+ .ntieredslaves = 0,
+ .board_algo = &msm_bus_board_algo,
+};
+
+struct msm_bus_fabric_registration msm_bus_8960_cpss_fpb_pdata = {
+ .id = MSM_BUS_FAB_CPSS_FPB,
+ .name = "msm_cpss_fpb",
+ cpss_fpb_fabric_info,
+ ARRAY_SIZE(cpss_fpb_fabric_info),
+ .ahb = 1,
+ .fabclk[DUAL_CTX] = "cfpb_clk",
+ .fabclk[ACTIVE_CTX] = "cfpb_a_clk",
+ .nmasters = 0,
+ .nslaves = 0,
+ .ntieredslaves = 0,
+ .board_algo = &msm_bus_board_algo,
+};
+
int msm_bus_board_rpm_get_il_ids(uint16_t id[])
{
id[0] = MSM_RPM_STATUS_ID_EBI1_CH0_RANGE;
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_core.h b/arch/arm/mach-msm/msm_bus/msm_bus_core.h
index 56a5b8da..8a46026 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_core.h
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_core.h
@@ -107,6 +107,7 @@
const char *name;
struct device dev;
const struct msm_bus_fab_algorithm *algo;
+ const struct msm_bus_board_algorithm *board_algo;
int visited;
};
#define to_msm_bus_fabric_device(d) container_of(d, \
@@ -121,8 +122,7 @@
unsigned int cl_active_flag);
int (*port_halt)(struct msm_bus_fabric_device *fabdev, int portid);
int (*port_unhalt)(struct msm_bus_fabric_device *fabdev, int portid);
- int (*commit)(struct msm_bus_fabric_device *fabdev,
- int active_only);
+ int (*commit)(struct msm_bus_fabric_device *fabdev);
struct msm_bus_inode_info *(*find_node)(struct msm_bus_fabric_device
*fabdev, int id);
struct msm_bus_inode_info *(*find_gw_node)(struct msm_bus_fabric_device
@@ -133,6 +133,12 @@
long int add_bw, int *master_tiers, int ctx);
};
+struct msm_bus_board_algorithm {
+ void (*assign_iids)(struct msm_bus_fabric_registration *fabreg,
+ int fabid);
+ int (*get_iid)(int id);
+};
+
/**
* Used to store the list of fabrics and other info to be
* maintained outside the fabric structure.
@@ -160,8 +166,7 @@
struct msm_rpm_iv_pair *allocate_rpm_data(struct msm_bus_fabric_registration
*fab_pdata);
int msm_bus_rpm_commit(struct msm_bus_fabric_registration
- *fab_pdata, int ctx, struct msm_rpm_iv_pair *rpm_data,
- void *cdata);
+ *fab_pdata, struct msm_rpm_iv_pair *rpm_data, void **cdata);
void free_commit_data(void *cdata);
void msm_bus_rpm_update_bw(struct msm_bus_inode_info *hop,
struct msm_bus_inode_info *info,
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c b/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
index fe6dbed..1747425 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_fabric.c
@@ -418,13 +418,10 @@
* msm_bus_fabric_rpm_commit() - Commit the arbitration data to RPM
* @fabric: Fabric for which the data should be committed
* */
-static int msm_bus_fabric_rpm_commit(struct msm_bus_fabric_device *fabdev,
- int ctx)
-
+static int msm_bus_fabric_rpm_commit(struct msm_bus_fabric_device *fabdev)
{
int status = 0;
struct msm_bus_fabric *fabric = to_msm_bus_fabric(fabdev);
- void *cdata;
/*
* For a non-zero bandwidth request, clocks should be enabled before
@@ -441,9 +438,8 @@
goto skip_arb;
}
- cdata = fabric->cdata[ctx];
- status = msm_bus_rpm_commit(fabric->pdata, ctx,
- fabric->rpm_data, cdata);
+ status = msm_bus_rpm_commit(fabric->pdata, fabric->rpm_data,
+ (void **)fabric->cdata);
if (status)
MSM_BUS_DBG("Error committing arb data for fabric: %d\n",
fabric->fabdev.id);
@@ -653,7 +649,9 @@
pdata->il_flag = msm_bus_rpm_is_mem_interleaved();
fabric->ahb = pdata->ahb;
fabric->pdata = pdata;
- msm_bus_board_assign_iids(fabric->pdata, fabric->fabdev.id);
+ fabric->pdata->board_algo->assign_iids(fabric->pdata,
+ fabric->fabdev.id);
+ fabric->fabdev.board_algo = fabric->pdata->board_algo;
for (ctx = 0; ctx < NUM_CTX; ctx++) {
if (pdata->fabclk[ctx]) {
diff --git a/arch/arm/mach-msm/msm_bus/msm_bus_rpm.c b/arch/arm/mach-msm/msm_bus/msm_bus_rpm.c
index 332d3c1..84e2da5 100644
--- a/arch/arm/mach-msm/msm_bus/msm_bus_rpm.c
+++ b/arch/arm/mach-msm/msm_bus/msm_bus_rpm.c
@@ -325,16 +325,35 @@
#define RPM_SHIFT_VAL 16
#define RPM_SHIFT(n) ((n) << RPM_SHIFT_VAL)
-/**
- * msm_bus_rpm_commit() - Commit the arbitration data to RPM
- * @fabric: Fabric for which the data should be committed
- * */
-int msm_bus_rpm_commit(struct msm_bus_fabric_registration
+static int msm_bus_rpm_compare_cdata(
+ struct msm_bus_fabric_registration *fab_pdata,
+ struct commit_data *cd1, struct commit_data *cd2)
+{
+ size_t n;
+ int ret;
+ n = sizeof(uint16_t) * fab_pdata->nslaves;
+ ret = memcmp(cd1->bwsum, cd2->bwsum, n);
+ if (ret) {
+ MSM_BUS_DBG("Commit Data bwsum not equal\n");
+ return ret;
+ }
+
+ n = sizeof(uint16_t *) * ((fab_pdata->ntieredslaves *
+ fab_pdata->nmasters) + 1);
+ ret = memcmp(cd1->arb, cd2->arb, n);
+ if (ret) {
+ MSM_BUS_DBG("Commit Data arb[%d] not equal\n", i);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int msm_bus_rpm_commit_arb(struct msm_bus_fabric_registration
*fab_pdata, int ctx, struct msm_rpm_iv_pair *rpm_data,
- void *cdata)
+ struct commit_data *cd, bool valid)
{
int i, j, offset = 0, status = 0, count, index = 0;
- struct commit_data *cd = (struct commit_data *)cdata;
/*
* count is the number of 2-byte words required to commit the
* data to rpm. This is calculated by the following formula.
@@ -398,12 +417,33 @@
nmasters, fab_pdata->nslaves, fab_pdata->ntieredslaves,
MSM_BUS_DBG_OP);
if (fab_pdata->rpm_enabled) {
- if (ctx == ACTIVE_CTX)
- status = msm_rpm_set(MSM_RPM_CTX_SET_0, rpm_data,
- count);
+ if (valid) {
+ if (ctx == ACTIVE_CTX) {
+ status = msm_rpm_set(MSM_RPM_CTX_SET_0,
+ rpm_data, count);
+ MSM_BUS_DBG("msm_rpm_set returned: %d\n",
+ status);
+ } else if (ctx == DUAL_CTX) {
+ status = msm_rpm_set(MSM_RPM_CTX_SET_SLEEP,
+ rpm_data, count);
+ MSM_BUS_DBG("msm_rpm_set returned: %d\n",
+ status);
+ }
+ } else {
+ if (ctx == ACTIVE_CTX) {
+ status = msm_rpm_clear(MSM_RPM_CTX_SET_0,
+ rpm_data, count);
+ MSM_BUS_DBG("msm_rpm_clear returned: %d\n",
+ status);
+ } else if (ctx == DUAL_CTX) {
+ status = msm_rpm_clear(MSM_RPM_CTX_SET_SLEEP,
+ rpm_data, count);
+ MSM_BUS_DBG("msm_rpm_clear returned: %d\n",
+ status);
+ }
+ }
}
- MSM_BUS_DBG("msm_rpm_set returned: %d\n", status);
return status;
}
@@ -571,14 +611,37 @@
return rpm_data;
}
-int msm_bus_rpm_commit(struct msm_bus_fabric_registration
- *fab_pdata, int ctx, struct msm_rpm_iv_pair *rpm_data,
- void *cdata)
+static int msm_bus_rpm_compare_cdata(
+ struct msm_bus_fabric_registration *fab_pdata,
+ struct commit_data *cd1, struct commit_data *cd2)
{
+ size_t n;
+ int i, ret;
+ n = sizeof(uint16_t) * fab_pdata->nslaves;
+ ret = memcmp(cd1->bwsum, cd2->bwsum, n);
+ if (ret) {
+ MSM_BUS_DBG("Commit Data bwsum not equal\n");
+ return ret;
+ }
+ n = sizeof(uint8_t *) * ((fab_pdata->ntieredslaves *
+ fab_pdata->nmasters) + 1);
+ for (i = 0; i < NUM_TIERS; i++) {
+ ret = memcmp(cd1->arb[i], cd2->arb[i], n);
+ if (ret) {
+ MSM_BUS_DBG("Commit Data arb[%d] not equal\n", i);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int msm_bus_rpm_commit_arb(struct msm_bus_fabric_registration
+ *fab_pdata, int ctx, struct msm_rpm_iv_pair *rpm_data,
+ struct commit_data *cd, bool valid)
+{
int i, j, k, offset = 0, status = 0, count, index = 0;
- struct commit_data *cd = (struct commit_data *)cdata;
-
/*
* count is the number of 2-byte words required to commit the
* data to rpm. This is calculated by the following formula.
@@ -646,16 +709,37 @@
}
MSM_FAB_DBG("calling msm_rpm_set: %d\n", status);
- msm_bus_dbg_commit_data(fab_pdata->name, cdata, fab_pdata->
+ msm_bus_dbg_commit_data(fab_pdata->name, (void *)cd, fab_pdata->
nmasters, fab_pdata->nslaves, fab_pdata->ntieredslaves,
MSM_BUS_DBG_OP);
if (fab_pdata->rpm_enabled) {
- if (ctx == ACTIVE_CTX)
- status = msm_rpm_set(MSM_RPM_CTX_SET_0, rpm_data,
- count);
+ if (valid) {
+ if (ctx == ACTIVE_CTX) {
+ status = msm_rpm_set(MSM_RPM_CTX_SET_0,
+ rpm_data, count);
+ MSM_BUS_DBG("msm_rpm_set returned: %d\n",
+ status);
+ } else if (ctx == DUAL_CTX) {
+ status = msm_rpm_set(MSM_RPM_CTX_SET_SLEEP,
+ rpm_data, count);
+ MSM_BUS_DBG("msm_rpm_set returned: %d\n",
+ status);
+ }
+ } else {
+ if (ctx == ACTIVE_CTX) {
+ status = msm_rpm_clear(MSM_RPM_CTX_SET_0,
+ rpm_data, count);
+ MSM_BUS_DBG("msm_rpm_clear returned: %d\n",
+ status);
+ } else if (ctx == DUAL_CTX) {
+ status = msm_rpm_clear(MSM_RPM_CTX_SET_SLEEP,
+ rpm_data, count);
+ MSM_BUS_DBG("msm_rpm_clear returned: %d\n",
+ status);
+ }
+ }
}
- MSM_FAB_DBG("msm_rpm_set returned: %d\n", status);
return status;
}
@@ -771,3 +855,47 @@
}
}
#endif
+
+/**
+* msm_bus_rpm_commit() - Commit the arbitration data to RPM
+* @fabric: Fabric for which the data should be committed
+**/
+int msm_bus_rpm_commit(struct msm_bus_fabric_registration
+ *fab_pdata, struct msm_rpm_iv_pair *rpm_data,
+ void **cdata)
+{
+
+ int ret;
+ bool valid;
+ struct commit_data *dual_cd, *act_cd;
+ dual_cd = (struct commit_data *)cdata[DUAL_CTX];
+ act_cd = (struct commit_data *)cdata[ACTIVE_CTX];
+
+ /*
+ * If the arb data for active set and sleep set is
+ * different, commit both sets.
+ * If the arb data for active set and sleep set is
+ * the same, invalidate the sleep set.
+ */
+ ret = msm_bus_rpm_compare_cdata(fab_pdata, act_cd, dual_cd);
+ if (!ret)
+ /* Invalidate sleep set.*/
+ valid = false;
+ else
+ valid = true;
+
+ ret = msm_bus_rpm_commit_arb(fab_pdata, DUAL_CTX, rpm_data,
+ dual_cd, valid);
+ if (ret)
+ MSM_BUS_ERR("Error comiting fabric:%d in %d ctx\n",
+ fab_pdata->id, DUAL_CTX);
+
+ valid = true;
+ ret = msm_bus_rpm_commit_arb(fab_pdata, ACTIVE_CTX, rpm_data, act_cd,
+ valid);
+ if (ret)
+ MSM_BUS_ERR("Error comiting fabric:%d in %d ctx\n",
+ fab_pdata->id, ACTIVE_CTX);
+
+ return ret;
+}
diff --git a/arch/arm/mach-msm/msm_rq_stats.c b/arch/arm/mach-msm/msm_rq_stats.c
index 81c8ad5..83d5e96 100644
--- a/arch/arm/mach-msm/msm_rq_stats.c
+++ b/arch/arm/mach-msm/msm_rq_stats.c
@@ -13,7 +13,6 @@
/*
* Qualcomm MSM Runqueue Stats Interface for Userspace
*/
-
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
@@ -26,60 +25,11 @@
#include <linux/workqueue.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
+#include <linux/rq_stats.h>
-struct rq_data {
- unsigned int rq_avg;
- unsigned int rq_poll_ms;
- unsigned int def_timer_ms;
- unsigned int def_interval;
- int64_t last_time;
- int64_t total_time;
- int64_t def_start_time;
- struct delayed_work rq_work;
- struct attribute_group *attr_group;
- struct kobject *kobj;
- struct delayed_work def_timer_work;
-};
-
-static struct rq_data rq_info;
-static DEFINE_SPINLOCK(rq_lock);
-static struct workqueue_struct *rq_wq;
-
-static void rq_work_fn(struct work_struct *work)
-{
- int64_t time_diff = 0;
- int64_t rq_avg = 0;
- unsigned long flags = 0;
-
- spin_lock_irqsave(&rq_lock, flags);
-
- if (!rq_info.last_time)
- rq_info.last_time = ktime_to_ns(ktime_get());
- if (!rq_info.rq_avg)
- rq_info.total_time = 0;
-
- rq_avg = nr_running() * 10;
- time_diff = ktime_to_ns(ktime_get()) - rq_info.last_time;
- do_div(time_diff, (1000 * 1000));
-
- if (time_diff && rq_info.total_time) {
- rq_avg = (rq_avg * time_diff) +
- (rq_info.rq_avg * rq_info.total_time);
- do_div(rq_avg, rq_info.total_time + time_diff);
- }
-
- rq_info.rq_avg = (unsigned int)rq_avg;
-
- /* Set the next poll */
- if (rq_info.rq_poll_ms)
- queue_delayed_work(rq_wq, &rq_info.rq_work,
- msecs_to_jiffies(rq_info.rq_poll_ms));
-
- rq_info.total_time += time_diff;
- rq_info.last_time = ktime_to_ns(ktime_get());
-
- spin_unlock_irqrestore(&rq_lock, flags);
-}
+#define MAX_LONG_SIZE 24
+#define DEFAULT_RQ_POLL_JIFFIES 1
+#define DEFAULT_DEF_TIMER_JIFFIES 5
static void def_work_fn(struct work_struct *work)
{
@@ -109,22 +59,24 @@
}
static ssize_t show_run_queue_poll_ms(struct kobject *kobj,
- struct kobj_attribute *attr, char *buf)
+ struct kobj_attribute *attr, char *buf)
{
int ret = 0;
unsigned long flags = 0;
spin_lock_irqsave(&rq_lock, flags);
- ret = sprintf(buf, "%u\n", rq_info.rq_poll_ms);
+ ret = snprintf(buf, MAX_LONG_SIZE, "%u\n",
+ jiffies_to_msecs(rq_info.rq_poll_jiffies));
spin_unlock_irqrestore(&rq_lock, flags);
return ret;
}
static ssize_t store_run_queue_poll_ms(struct kobject *kobj,
- struct kobj_attribute *attr, const char *buf, size_t count)
+ struct kobj_attribute *attr,
+ const char *buf, size_t count)
{
- int val = 0;
+ unsigned int val = 0;
unsigned long flags = 0;
static DEFINE_MUTEX(lock_poll_ms);
@@ -132,15 +84,9 @@
spin_lock_irqsave(&rq_lock, flags);
sscanf(buf, "%u", &val);
- rq_info.rq_poll_ms = val;
+ rq_info.rq_poll_jiffies = msecs_to_jiffies(val);
spin_unlock_irqrestore(&rq_lock, flags);
- if (val <= 0)
- cancel_delayed_work(&rq_info.rq_work);
- else
- queue_delayed_work(rq_wq, &rq_info.rq_work,
- msecs_to_jiffies(val));
-
mutex_unlock(&lock_poll_ms);
return count;
@@ -149,7 +95,10 @@
static ssize_t show_def_timer_ms(struct kobject *kobj,
struct kobj_attribute *attr, char *buf)
{
- return sprintf(buf, "%u\n", rq_info.def_interval);
+ int64_t diff_ms;
+ diff_ms = ktime_to_ns(ktime_get()) - rq_info.def_start_time;
+ do_div(diff_ms, 1000 * 1000);
+ return snprintf(buf, MAX_LONG_SIZE, "%lld\n", diff_ms);
}
static ssize_t store_def_timer_ms(struct kobject *kobj,
@@ -158,16 +107,9 @@
unsigned int val = 0;
sscanf(buf, "%u", &val);
- rq_info.def_timer_ms = val;
+ rq_info.def_timer_jiffies = msecs_to_jiffies(val);
- if (val <= 0)
- cancel_delayed_work(&rq_info.def_timer_work);
- else {
- rq_info.def_start_time = ktime_to_ns(ktime_get());
- queue_delayed_work(rq_wq, &rq_info.def_timer_work,
- msecs_to_jiffies(val));
- }
-
+ rq_info.def_start_time = ktime_to_ns(ktime_get());
return count;
}
@@ -210,7 +152,6 @@
goto rel;
rq_info.rq_avg = 0;
- rq_info.rq_poll_ms = 0;
attribs[0] = MSM_RQ_STATS_RW_ATTRIB(def_timer_ms);
attribs[1] = MSM_RQ_STATS_RO_ATTRIB(run_queue_avg);
@@ -257,8 +198,13 @@
{
rq_wq = create_singlethread_workqueue("rq_stats");
BUG_ON(!rq_wq);
- INIT_DELAYED_WORK_DEFERRABLE(&rq_info.rq_work, rq_work_fn);
- INIT_DELAYED_WORK_DEFERRABLE(&rq_info.def_timer_work, def_work_fn);
+ INIT_WORK(&rq_info.def_timer_work, def_work_fn);
+ spin_lock_init(&rq_lock);
+ rq_info.rq_poll_jiffies = DEFAULT_RQ_POLL_JIFFIES;
+ rq_info.def_timer_jiffies = DEFAULT_DEF_TIMER_JIFFIES;
+ rq_info.rq_poll_last_jiffy = 0;
+ rq_info.def_timer_last_jiffy = 0;
+ rq_info.init = 1;
return init_rq_attribs();
}
late_initcall(msm_rq_stats_init);
diff --git a/arch/arm/mach-msm/msm_xo.c b/arch/arm/mach-msm/msm_xo.c
index a82d4d5..1e9c05f 100644
--- a/arch/arm/mach-msm/msm_xo.c
+++ b/arch/arm/mach-msm/msm_xo.c
@@ -190,11 +190,11 @@
{
int ret;
unsigned long flags;
- /* TODO: Remove or fix this function for 8064 once xo is in */
- if (cpu_is_apq8064())
+
+ if (!xo_voter)
return 0;
- if (mode >= NUM_MSM_XO_MODES)
+ if (mode >= NUM_MSM_XO_MODES || IS_ERR(xo_voter))
return -EINVAL;
spin_lock_irqsave(&msm_xo_lock, flags);
@@ -221,7 +221,10 @@
unsigned long flags;
struct msm_xo_voter *xo_voter;
- /* TODO: Remove or fix this function for 8064 once xo is in */
+ /*
+ * TODO: Remove early return for 8064 once RPM XO voting support
+ * is available.
+ */
if (cpu_is_apq8064())
return NULL;
@@ -271,6 +274,9 @@
{
unsigned long flags;
+ if (!xo_voter || IS_ERR(xo_voter))
+ return;
+
spin_lock_irqsave(&msm_xo_lock, flags);
__msm_xo_mode_vote(xo_voter, MSM_XO_MODE_OFF);
xo_voter->xo->votes[MSM_XO_MODE_OFF]--;
diff --git a/arch/arm/mach-msm/peripheral-loader.c b/arch/arm/mach-msm/peripheral-loader.c
index dc3b26f..672f332 100644
--- a/arch/arm/mach-msm/peripheral-loader.c
+++ b/arch/arm/mach-msm/peripheral-loader.c
@@ -12,13 +12,14 @@
#include <linux/module.h>
#include <linux/string.h>
-#include <linux/platform_device.h>
+#include <linux/device.h>
#include <linux/firmware.h>
#include <linux/io.h>
#include <linux/debugfs.h>
#include <linux/elf.h>
#include <linux/mutex.h>
#include <linux/memblock.h>
+#include <linux/slab.h>
#include <mach/socinfo.h>
@@ -27,6 +28,13 @@
#include "peripheral-loader.h"
+struct pil_device {
+ struct pil_desc *desc;
+ int count;
+ struct mutex lock;
+ struct list_head list;
+};
+
static DEFINE_MUTEX(pil_list_lock);
static LIST_HEAD(pil_list);
@@ -35,7 +43,7 @@
struct pil_device *dev;
list_for_each_entry(dev, &pil_list, list)
- if (!strcmp(dev->name, str))
+ if (!strcmp(dev->desc->name, str))
return dev;
return NULL;
}
@@ -65,24 +73,24 @@
const u8 *data;
if (memblock_is_region_memory(phdr->p_paddr, phdr->p_memsz)) {
- dev_err(&pil->pdev.dev, "Kernel memory would be overwritten");
+ dev_err(pil->desc->dev, "Kernel memory would be overwritten");
return -EPERM;
}
if (phdr->p_filesz) {
- snprintf(fw_name, ARRAY_SIZE(fw_name), "%s.b%02d", pil->name,
- num);
- ret = request_firmware(&fw, fw_name, &pil->pdev.dev);
+ snprintf(fw_name, ARRAY_SIZE(fw_name), "%s.b%02d",
+ pil->desc->name, num);
+ ret = request_firmware(&fw, fw_name, pil->desc->dev);
if (ret) {
- dev_err(&pil->pdev.dev, "Failed to locate blob %s\n",
+ dev_err(pil->desc->dev, "Failed to locate blob %s\n",
fw_name);
return ret;
}
if (fw->size != phdr->p_filesz) {
- dev_err(&pil->pdev.dev,
- "Blob size %u doesn't match %u\n",
- fw->size, phdr->p_filesz);
+ dev_err(pil->desc->dev,
+ "Blob size %u doesn't match %u\n", fw->size,
+ phdr->p_filesz);
ret = -EPERM;
goto release_fw;
}
@@ -99,7 +107,7 @@
size = min_t(size_t, IOMAP_SIZE, count);
buf = ioremap(paddr, size);
if (!buf) {
- dev_err(&pil->pdev.dev, "Failed to map memory\n");
+ dev_err(pil->desc->dev, "Failed to map memory\n");
ret = -ENOMEM;
goto release_fw;
}
@@ -120,7 +128,7 @@
size = min_t(size_t, IOMAP_SIZE, count);
buf = ioremap(paddr, size);
if (!buf) {
- dev_err(&pil->pdev.dev, "Failed to map memory\n");
+ dev_err(pil->desc->dev, "Failed to map memory\n");
ret = -ENOMEM;
goto release_fw;
}
@@ -131,9 +139,10 @@
paddr += size;
}
- ret = pil->ops->verify_blob(pil, phdr->p_paddr, phdr->p_memsz);
+ ret = pil->desc->ops->verify_blob(pil->desc, phdr->p_paddr,
+ phdr->p_memsz);
if (ret)
- dev_err(&pil->pdev.dev, "Blob %u failed verification\n", num);
+ dev_err(pil->desc->dev, "Blob %u failed verification\n", num);
release_fw:
release_firmware(fw);
@@ -155,41 +164,41 @@
const struct elf32_phdr *phdr;
const struct firmware *fw;
- snprintf(fw_name, sizeof(fw_name), "%s.mdt", pil->name);
- ret = request_firmware(&fw, fw_name, &pil->pdev.dev);
+ snprintf(fw_name, sizeof(fw_name), "%s.mdt", pil->desc->name);
+ ret = request_firmware(&fw, fw_name, pil->desc->dev);
if (ret) {
- dev_err(&pil->pdev.dev, "Failed to locate %s\n", fw_name);
+ dev_err(pil->desc->dev, "Failed to locate %s\n", fw_name);
goto out;
}
if (fw->size < sizeof(*ehdr)) {
- dev_err(&pil->pdev.dev, "Not big enough to be an elf header\n");
+ dev_err(pil->desc->dev, "Not big enough to be an elf header\n");
ret = -EIO;
goto release_fw;
}
ehdr = (struct elf32_hdr *)fw->data;
if (memcmp(ehdr->e_ident, ELFMAG, SELFMAG)) {
- dev_err(&pil->pdev.dev, "Not an elf header\n");
+ dev_err(pil->desc->dev, "Not an elf header\n");
ret = -EIO;
goto release_fw;
}
if (ehdr->e_phnum == 0) {
- dev_err(&pil->pdev.dev, "No loadable segments\n");
+ dev_err(pil->desc->dev, "No loadable segments\n");
ret = -EIO;
goto release_fw;
}
if (sizeof(struct elf32_phdr) * ehdr->e_phnum +
sizeof(struct elf32_hdr) > fw->size) {
- dev_err(&pil->pdev.dev, "Program headers not within mdt\n");
+ dev_err(pil->desc->dev, "Program headers not within mdt\n");
ret = -EIO;
goto release_fw;
}
- ret = pil->ops->init_image(pil, fw->data, fw->size);
+ ret = pil->desc->ops->init_image(pil->desc, fw->data, fw->size);
if (ret) {
- dev_err(&pil->pdev.dev, "Invalid firmware metadata\n");
+ dev_err(pil->desc->dev, "Invalid firmware metadata\n");
goto release_fw;
}
@@ -200,15 +209,15 @@
ret = load_segment(phdr, i, pil);
if (ret) {
- dev_err(&pil->pdev.dev, "Failed to load segment %d\n",
+ dev_err(pil->desc->dev, "Failed to load segment %d\n",
i);
goto release_fw;
}
}
- ret = pil->ops->auth_and_reset(pil);
+ ret = pil->desc->ops->auth_and_reset(pil->desc);
if (ret) {
- dev_err(&pil->pdev.dev, "Failed to bring out of reset\n");
+ dev_err(pil->desc->dev, "Failed to bring out of reset\n");
goto release_fw;
}
@@ -242,9 +251,9 @@
if (!pil)
return ERR_PTR(-ENODEV);
- pil_d = find_peripheral(pil->depends_on);
+ pil_d = find_peripheral(pil->desc->depends_on);
if (pil_d) {
- void *p = pil_get(pil_d->name);
+ void *p = pil_get(pil_d->desc->name);
if (IS_ERR(p))
return p;
}
@@ -290,11 +299,11 @@
if (pil->count)
pil->count--;
if (pil->count == 0)
- pil->ops->shutdown(pil);
+ pil->desc->ops->shutdown(pil->desc);
unlock:
mutex_unlock(&pil->lock);
- pil_d = find_peripheral(pil->depends_on);
+ pil_d = find_peripheral(pil->desc->depends_on);
if (pil_d)
pil_put(pil_d);
}
@@ -310,7 +319,7 @@
mutex_lock(&pil->lock);
if (!WARN(!pil->count, "%s: Reference count mismatch\n", __func__))
- pil->ops->shutdown(pil);
+ pil->desc->ops->shutdown(pil->desc);
mutex_unlock(&pil->lock);
}
EXPORT_SYMBOL(pil_force_shutdown);
@@ -366,7 +375,7 @@
return -EFAULT;
if (!strncmp(buf, "get", 3)) {
- if (IS_ERR(pil_get(pil->name)))
+ if (IS_ERR(pil_get(pil->desc->name)))
return -EIO;
} else if (!strncmp(buf, "put", 3))
pil_put(pil);
@@ -401,8 +410,8 @@
if (!pil_base_dir)
return -ENOMEM;
- if (!debugfs_create_file(pil->name, S_IRUGO | S_IWUSR, pil_base_dir,
- pil, &msm_pil_debugfs_fops))
+ if (!debugfs_create_file(pil->desc->name, S_IRUGO | S_IWUSR,
+ pil_base_dir, pil, &msm_pil_debugfs_fops))
return -ENOMEM;
return 0;
}
@@ -416,29 +425,30 @@
mutex_lock(&pil_list_lock);
list_for_each_entry(pil, &pil_list, list)
- pil->ops->shutdown(pil);
+ pil->desc->ops->shutdown(pil->desc);
mutex_unlock(&pil_list_lock);
return 0;
}
late_initcall(msm_pil_shutdown_at_boot);
-int msm_pil_add_device(struct pil_device *pil)
+int msm_pil_register(struct pil_desc *desc)
{
- int ret;
- ret = platform_device_register(&pil->pdev);
- if (ret)
- return ret;
+ struct pil_device *pil = kzalloc(sizeof(*pil), GFP_KERNEL);
+ if (!pil)
+ return -ENOMEM;
mutex_init(&pil->lock);
+ INIT_LIST_HEAD(&pil->list);
+ pil->desc = desc;
mutex_lock(&pil_list_lock);
list_add(&pil->list, &pil_list);
mutex_unlock(&pil_list_lock);
- msm_pil_debugfs_add(pil);
- return 0;
+ return msm_pil_debugfs_add(pil);
}
+EXPORT_SYMBOL(msm_pil_register);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Load peripheral images and bring peripherals out of reset");
diff --git a/arch/arm/mach-msm/peripheral-loader.h b/arch/arm/mach-msm/peripheral-loader.h
index 097d9d7..3d4b4b2 100644
--- a/arch/arm/mach-msm/peripheral-loader.h
+++ b/arch/arm/mach-msm/peripheral-loader.h
@@ -12,28 +12,23 @@
#ifndef __MSM_PERIPHERAL_LOADER_H
#define __MSM_PERIPHERAL_LOADER_H
-#include <linux/list.h>
-#include <linux/mutex.h>
-#include <linux/platform_device.h>
+struct device;
-struct pil_device {
+struct pil_desc {
const char *name;
const char *depends_on;
- int count;
- struct mutex lock;
- struct platform_device pdev;
- struct list_head list;
- struct pil_reset_ops *ops;
+ struct device *dev;
+ const struct pil_reset_ops *ops;
};
struct pil_reset_ops {
- int (*init_image)(struct pil_device *pil, const u8 *metadata,
+ int (*init_image)(struct pil_desc *pil, const u8 *metadata,
size_t size);
- int (*verify_blob)(struct pil_device *pil, u32 phy_addr, size_t size);
- int (*auth_and_reset)(struct pil_device *pil);
- int (*shutdown)(struct pil_device *pil);
+ int (*verify_blob)(struct pil_desc *pil, u32 phy_addr, size_t size);
+ int (*auth_and_reset)(struct pil_desc *pil);
+ int (*shutdown)(struct pil_desc *pil);
};
-extern int msm_pil_add_device(struct pil_device *pil);
+extern int msm_pil_register(struct pil_desc *desc);
#endif
diff --git a/arch/arm/mach-msm/peripheral-reset-8960.c b/arch/arm/mach-msm/peripheral-reset-8960.c
index 2c47ee0..b964417 100644
--- a/arch/arm/mach-msm/peripheral-reset-8960.c
+++ b/arch/arm/mach-msm/peripheral-reset-8960.c
@@ -18,6 +18,7 @@
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/regulator/consumer.h>
+#include <linux/platform_device.h>
#include <asm/mach-types.h>
@@ -167,25 +168,25 @@
static void __iomem *msm_riva_base;
static unsigned long riva_start;
-static int init_image_lpass_q6_trusted(struct pil_device *pil,
+static int init_image_lpass_q6_trusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
return pas_init_image(PAS_Q6, metadata, size);
}
-static int init_image_modem_fw_q6_trusted(struct pil_device *pil,
+static int init_image_modem_fw_q6_trusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
return pas_init_image(PAS_MODEM_FW, metadata, size);
}
-static int init_image_modem_sw_q6_trusted(struct pil_device *pil,
+static int init_image_modem_sw_q6_trusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
return pas_init_image(PAS_MODEM_SW, metadata, size);
}
-static int init_image_lpass_q6_untrusted(struct pil_device *pil,
+static int init_image_lpass_q6_untrusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -193,7 +194,7 @@
return 0;
}
-static int init_image_modem_fw_q6_untrusted(struct pil_device *pil,
+static int init_image_modem_fw_q6_untrusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -201,7 +202,7 @@
return 0;
}
-static int init_image_modem_sw_q6_untrusted(struct pil_device *pil,
+static int init_image_modem_sw_q6_untrusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -209,7 +210,7 @@
return 0;
}
-static int verify_blob(struct pil_device *pil, u32 phy_addr, size_t size)
+static int verify_blob(struct pil_desc *pil, u32 phy_addr, size_t size)
{
return 0;
}
@@ -245,17 +246,17 @@
return pas_auth_and_reset(id);
}
-static int reset_lpass_q6_trusted(struct pil_device *pil)
+static int reset_lpass_q6_trusted(struct pil_desc *pil)
{
return reset_q6_trusted(PAS_Q6, &q6_lpass);
}
-static int reset_modem_fw_q6_trusted(struct pil_device *pil)
+static int reset_modem_fw_q6_trusted(struct pil_desc *pil)
{
return reset_q6_trusted(PAS_MODEM_FW, &q6_modem_fw);
}
-static int reset_modem_sw_q6_trusted(struct pil_device *pil)
+static int reset_modem_sw_q6_trusted(struct pil_desc *pil)
{
return reset_q6_trusted(PAS_MODEM_SW, &q6_modem_sw);
}
@@ -364,17 +365,17 @@
return 0;
}
-static int reset_lpass_q6_untrusted(struct pil_device *pil)
+static int reset_lpass_q6_untrusted(struct pil_desc *pil)
{
return reset_q6_untrusted(&q6_lpass);
}
-static int reset_modem_fw_q6_untrusted(struct pil_device *pil)
+static int reset_modem_fw_q6_untrusted(struct pil_desc *pil)
{
return reset_q6_untrusted(&q6_modem_fw);
}
-static int reset_modem_sw_q6_untrusted(struct pil_device *pil)
+static int reset_modem_sw_q6_untrusted(struct pil_desc *pil)
{
return reset_q6_untrusted(&q6_modem_sw);
}
@@ -395,17 +396,17 @@
return ret;
}
-static int shutdown_lpass_q6_trusted(struct pil_device *pil)
+static int shutdown_lpass_q6_trusted(struct pil_desc *pil)
{
return shutdown_q6_trusted(PAS_Q6, &q6_lpass);
}
-static int shutdown_modem_fw_q6_trusted(struct pil_device *pil)
+static int shutdown_modem_fw_q6_trusted(struct pil_desc *pil)
{
return shutdown_q6_trusted(PAS_MODEM_FW, &q6_modem_fw);
}
-static int shutdown_modem_sw_q6_trusted(struct pil_device *pil)
+static int shutdown_modem_sw_q6_trusted(struct pil_desc *pil)
{
return shutdown_q6_trusted(PAS_MODEM_SW, &q6_modem_sw);
}
@@ -438,22 +439,22 @@
return 0;
}
-static int shutdown_lpass_q6_untrusted(struct pil_device *pil)
+static int shutdown_lpass_q6_untrusted(struct pil_desc *pil)
{
return shutdown_q6_untrusted(&q6_lpass);
}
-static int shutdown_modem_fw_q6_untrusted(struct pil_device *pil)
+static int shutdown_modem_fw_q6_untrusted(struct pil_desc *pil)
{
return shutdown_q6_untrusted(&q6_modem_fw);
}
-static int shutdown_modem_sw_q6_untrusted(struct pil_device *pil)
+static int shutdown_modem_sw_q6_untrusted(struct pil_desc *pil)
{
return shutdown_q6_untrusted(&q6_modem_sw);
}
-static int init_image_riva_untrusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_riva_untrusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -461,7 +462,7 @@
return 0;
}
-static int reset_riva_untrusted(struct pil_device *pil)
+static int reset_riva_untrusted(struct pil_desc *pil)
{
u32 reg;
bool xo;
@@ -552,7 +553,7 @@
return 0;
}
-static int shutdown_riva_untrusted(struct pil_device *pil)
+static int shutdown_riva_untrusted(struct pil_desc *pil)
{
u32 reg;
/* Put riva into reset */
@@ -562,23 +563,23 @@
return 0;
}
-static int init_image_riva_trusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_riva_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_RIVA, metadata, size);
}
-static int reset_riva_trusted(struct pil_device *pil)
+static int reset_riva_trusted(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_RIVA);
}
-static int shutdown_riva_trusted(struct pil_device *pil)
+static int shutdown_riva_trusted(struct pil_desc *pil)
{
return pas_shutdown(PAS_RIVA);
}
-static int init_image_dsps_untrusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_dsps_untrusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
/* Bring memory and bus interface out of reset */
@@ -587,7 +588,7 @@
return 0;
}
-static int reset_dsps_untrusted(struct pil_device *pil)
+static int reset_dsps_untrusted(struct pil_desc *pil)
{
writel_relaxed(0x10, PPSS_PROC_CLK_CTL);
/* Bring DSPS out of reset */
@@ -595,41 +596,41 @@
return 0;
}
-static int shutdown_dsps_untrusted(struct pil_device *pil)
+static int shutdown_dsps_untrusted(struct pil_desc *pil)
{
writel_relaxed(0x2, PPSS_RESET);
writel_relaxed(0x0, PPSS_PROC_CLK_CTL);
return 0;
}
-static int init_image_dsps_trusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_dsps_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_DSPS, metadata, size);
}
-static int reset_dsps_trusted(struct pil_device *pil)
+static int reset_dsps_trusted(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_DSPS);
}
-static int shutdown_dsps_trusted(struct pil_device *pil)
+static int shutdown_dsps_trusted(struct pil_desc *pil)
{
return pas_shutdown(PAS_DSPS);
}
-static int init_image_tzapps(struct pil_device *pil, const u8 *metadata,
+static int init_image_tzapps(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_TZAPPS, metadata, size);
}
-static int reset_tzapps(struct pil_device *pil)
+static int reset_tzapps(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_TZAPPS);
}
-static int shutdown_tzapps(struct pil_device *pil)
+static int shutdown_tzapps(struct pil_desc *pil)
{
return pas_shutdown(PAS_TZAPPS);
}
@@ -676,59 +677,65 @@
.shutdown = shutdown_tzapps,
};
-static struct pil_device pil_lpass_q6 = {
+static struct platform_device pil_lpass_q6 = {
+ .name = "pil_lpass_q6",
+};
+
+static struct pil_desc pil_lpass_q6_desc = {
.name = "q6",
- .pdev = {
- .name = "pil_lpass_q6",
- .id = -1,
- },
+ .dev = &pil_lpass_q6.dev,
.ops = &pil_lpass_q6_ops,
};
-static struct pil_device pil_modem_fw_q6 = {
+static struct platform_device pil_modem_fw_q6 = {
+ .name = "pil_modem_fw_q6",
+};
+
+static struct pil_desc pil_modem_fw_q6_desc = {
.name = "modem_fw",
.depends_on = "q6",
- .pdev = {
- .name = "pil_modem_fw_q6",
- .id = -1,
- },
+ .dev = &pil_modem_fw_q6.dev,
.ops = &pil_modem_fw_q6_ops,
};
-static struct pil_device pil_modem_sw_q6 = {
+static struct platform_device pil_modem_sw_q6 = {
+ .name = "pil_modem_sw_q6",
+};
+
+static struct pil_desc pil_modem_sw_q6_desc = {
.name = "modem",
.depends_on = "modem_fw",
- .pdev = {
- .name = "pil_modem_sw_q6",
- .id = -1,
- },
+ .dev = &pil_modem_sw_q6.dev,
.ops = &pil_modem_sw_q6_ops,
};
-static struct pil_device pil_riva = {
+static struct platform_device pil_riva = {
+ .name = "pil_riva",
+};
+
+static struct pil_desc pil_riva_desc = {
.name = "wcnss",
- .pdev = {
- .name = "pil_riva",
- .id = -1,
- },
+ .dev = &pil_riva.dev,
.ops = &pil_riva_ops,
};
-static struct pil_device pil_dsps = {
+static struct platform_device pil_dsps = {
+ .name = "pil_dsps",
+};
+
+static struct pil_desc pil_dsps_desc = {
.name = "dsps",
- .pdev = {
- .name = "pil_dsps",
- .id = -1,
- },
+ .dev = &pil_dsps.dev,
.ops = &pil_dsps_ops,
};
-static struct pil_device pil_tzapps = {
+static struct platform_device pil_tzapps = {
+ .name = "pil_tzapps",
+};
+
+static struct pil_desc pil_tzapps_desc = {
.name = "tzapps",
- .pdev = {
- .name = "pil_tzapps",
- .id = -1,
- },
+ .dev = &pil_tzapps.dev,
.ops = &pil_tzapps_ops,
};
@@ -807,7 +814,8 @@
err = q6_reset_init(&q6_lpass);
if (err)
return err;
- msm_pil_add_device(&pil_lpass_q6);
+ BUG_ON(platform_device_register(&pil_lpass_q6));
+ BUG_ON(msm_pil_register(&pil_lpass_q6_desc));
mss_enable_reg = ioremap(MSM_MSS_ENABLE_PHYS, 4);
if (!mss_enable_reg)
@@ -818,20 +826,29 @@
iounmap(mss_enable_reg);
return err;
}
- msm_pil_add_device(&pil_modem_fw_q6);
+ BUG_ON(platform_device_register(&pil_modem_fw_q6));
+ if (err) {
+ iounmap(mss_enable_reg);
+ return err;
+ }
+ BUG_ON(msm_pil_register(&pil_modem_fw_q6_desc));
err = q6_reset_init(&q6_modem_sw);
if (err)
return err;
- msm_pil_add_device(&pil_modem_sw_q6);
+ BUG_ON(platform_device_register(&pil_modem_sw_q6));
+ BUG_ON(msm_pil_register(&pil_modem_sw_q6_desc));
- msm_pil_add_device(&pil_dsps);
- msm_pil_add_device(&pil_tzapps);
+ BUG_ON(platform_device_register(&pil_dsps));
+ BUG_ON(msm_pil_register(&pil_dsps_desc));
+ BUG_ON(platform_device_register(&pil_tzapps));
+ BUG_ON(msm_pil_register(&pil_tzapps_desc));
msm_riva_base = ioremap(MSM_RIVA_PHYS, SZ_256);
if (!msm_riva_base)
return -ENOMEM;
- msm_pil_add_device(&pil_riva);
+ BUG_ON(platform_device_register(&pil_riva));
+ BUG_ON(msm_pil_register(&pil_riva_desc));
return 0;
}
diff --git a/arch/arm/mach-msm/peripheral-reset.c b/arch/arm/mach-msm/peripheral-reset.c
index 5456e14..f3f5388 100644
--- a/arch/arm/mach-msm/peripheral-reset.c
+++ b/arch/arm/mach-msm/peripheral-reset.c
@@ -20,6 +20,9 @@
#include <linux/clk.h>
#include <linux/timer.h>
#include <linux/jiffies.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
#include <mach/scm.h>
#include <mach/msm_iomap.h>
@@ -68,13 +71,13 @@
static void __iomem *msm_mms_regs_base;
static void __iomem *msm_lpass_qdsp6ss_base;
-static int init_image_modem_trusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_modem_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_MODEM, metadata, size);
}
-static int init_image_modem_untrusted(struct pil_device *pil,
+static int init_image_modem_untrusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -82,13 +85,13 @@
return 0;
}
-static int init_image_q6_trusted(struct pil_device *pil,
+static int init_image_q6_trusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
return pas_init_image(PAS_Q6, metadata, size);
}
-static int init_image_q6_untrusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_q6_untrusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -96,13 +99,13 @@
return 0;
}
-static int init_image_dsps_trusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_dsps_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_DSPS, metadata, size);
}
-static int init_image_dsps_untrusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_dsps_untrusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -113,7 +116,7 @@
return 0;
}
-static int verify_blob(struct pil_device *pil, u32 phy_addr, size_t size)
+static int verify_blob(struct pil_desc *pil, u32 phy_addr, size_t size)
{
return 0;
}
@@ -142,7 +145,7 @@
remove_modem_proxy_votes(0);
}
-static int reset_modem_untrusted(struct pil_device *pil)
+static int reset_modem_untrusted(struct pil_desc *pil)
{
u32 reg;
@@ -221,7 +224,7 @@
return 0;
}
-static int reset_modem_trusted(struct pil_device *pil)
+static int reset_modem_trusted(struct pil_desc *pil)
{
int ret;
@@ -234,7 +237,7 @@
return ret;
}
-static int shutdown_modem_untrusted(struct pil_device *pil)
+static int shutdown_modem_untrusted(struct pil_desc *pil)
{
u32 reg;
@@ -275,7 +278,7 @@
return 0;
}
-static int shutdown_modem_trusted(struct pil_device *pil)
+static int shutdown_modem_trusted(struct pil_desc *pil)
{
int ret;
@@ -343,7 +346,7 @@
remove_q6_proxy_votes(0);
}
-static int reset_q6_untrusted(struct pil_device *pil)
+static int reset_q6_untrusted(struct pil_desc *pil)
{
u32 reg;
@@ -389,14 +392,14 @@
return 0;
}
-static int reset_q6_trusted(struct pil_device *pil)
+static int reset_q6_trusted(struct pil_desc *pil)
{
make_q6_proxy_votes();
return pas_auth_and_reset(PAS_Q6);
}
-static int shutdown_q6_untrusted(struct pil_device *pil)
+static int shutdown_q6_untrusted(struct pil_desc *pil)
{
u32 reg;
@@ -423,7 +426,7 @@
return 0;
}
-static int shutdown_q6_trusted(struct pil_device *pil)
+static int shutdown_q6_trusted(struct pil_desc *pil)
{
int ret;
@@ -436,7 +439,7 @@
return 0;
}
-static int reset_dsps_untrusted(struct pil_device *pil)
+static int reset_dsps_untrusted(struct pil_desc *pil)
{
__raw_writel(0x10, PPSS_PROC_CLK_CTL);
while (__raw_readl(CLK_HALT_DFAB_STATE) & BIT(18))
@@ -447,35 +450,35 @@
return 0;
}
-static int reset_dsps_trusted(struct pil_device *pil)
+static int reset_dsps_trusted(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_DSPS);
}
-static int shutdown_dsps_trusted(struct pil_device *pil)
+static int shutdown_dsps_trusted(struct pil_desc *pil)
{
return pas_shutdown(PAS_DSPS);
}
-static int shutdown_dsps_untrusted(struct pil_device *pil)
+static int shutdown_dsps_untrusted(struct pil_desc *pil)
{
__raw_writel(0x2, PPSS_RESET);
__raw_writel(0x0, PPSS_PROC_CLK_CTL);
return 0;
}
-static int init_image_playready(struct pil_device *pil, const u8 *metadata,
+static int init_image_playready(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_PLAYREADY, metadata, size);
}
-static int reset_playready(struct pil_device *pil)
+static int reset_playready(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_PLAYREADY);
}
-static int shutdown_playready(struct pil_device *pil)
+static int shutdown_playready(struct pil_desc *pil)
{
return pas_shutdown(PAS_PLAYREADY);
}
@@ -508,47 +511,49 @@
.shutdown = shutdown_playready,
};
-static struct pil_device peripherals[] = {
- {
- .name = "modem",
- .depends_on = "q6",
- .pdev = {
- .name = "pil_modem",
- .id = -1,
- },
- .ops = &pil_modem_ops,
- },
- {
- .name = "q6",
- .pdev = {
- .name = "pil_q6",
- .id = -1,
- },
- .ops = &pil_q6_ops,
- },
- {
- .name = "tzapps",
- .pdev = {
- .name = "pil_playready",
- .id = -1,
- },
- .ops = &pil_playready_ops,
- },
+static struct platform_device pil_modem = {
+ .name = "pil_modem",
};
-struct pil_device peripheral_dsps = {
+static struct pil_desc pil_modem_desc = {
+ .name = "modem",
+ .depends_on = "q6",
+ .dev = &pil_modem.dev,
+ .ops = &pil_modem_ops,
+};
+
+static struct platform_device pil_q6 = {
+ .name = "pil_q6",
+};
+
+static struct pil_desc pil_q6_desc = {
+ .name = "q6",
+ .dev = &pil_q6.dev,
+ .ops = &pil_q6_ops,
+};
+
+static struct platform_device pil_playready = {
+ .name = "pil_playready",
+};
+
+static struct pil_desc pil_playready_desc = {
+ .name = "tzapps",
+ .dev = &pil_playready.dev,
+ .ops = &pil_playready_ops,
+};
+
+static struct platform_device pil_dsps = {
+ .name = "pil_dsps",
+};
+
+static struct pil_desc pil_dsps_desc = {
.name = "dsps",
- .pdev = {
- .name = "pil_dsps",
- .id = -1,
- },
+ .dev = &pil_dsps.dev,
.ops = &pil_dsps_ops,
};
static int __init msm_peripheral_reset_init(void)
{
- unsigned i;
-
msm_mms_regs_base = ioremap(MSM_MMS_REGS_BASE, SZ_256);
if (!msm_mms_regs_base)
goto err;
@@ -583,8 +588,17 @@
pil_dsps_ops.shutdown = shutdown_dsps_trusted;
}
- for (i = 0; i < ARRAY_SIZE(peripherals); i++)
- msm_pil_add_device(&peripherals[i]);
+ BUG_ON(platform_device_register(&pil_q6));
+ BUG_ON(msm_pil_register(&pil_q6_desc));
+ BUG_ON(platform_device_register(&pil_modem));
+ BUG_ON(msm_pil_register(&pil_modem_desc));
+ BUG_ON(platform_device_register(&pil_playready));
+ BUG_ON(msm_pil_register(&pil_playready_desc));
+
+ if (machine_is_msm8x60_fluid())
+ pil_dsps_desc.name = "dsps_fluid";
+ BUG_ON(platform_device_register(&pil_dsps));
+ BUG_ON(msm_pil_register(&pil_dsps_desc));
return 0;
diff --git a/arch/arm/mach-msm/pm-8x60.c b/arch/arm/mach-msm/pm-8x60.c
index c831d4b..6a78597 100644
--- a/arch/arm/mach-msm/pm-8x60.c
+++ b/arch/arm/mach-msm/pm-8x60.c
@@ -48,6 +48,7 @@
#include "spm.h"
#include "timer.h"
#include "qdss.h"
+#include "pm-boot.h"
/******************************************************************************
* Debug Definitions
@@ -279,7 +280,7 @@
ret = 0;
mode_sysfs_add_cpu_exit:
- if (!ret) {
+ if (ret) {
if (mode && mode->kobj)
kobject_del(mode->kobj);
kfree(mode);
@@ -649,7 +650,7 @@
entry = (!dev->cpu || from_idle) ?
msm_pm_collapse_exit : msm_secondary_startup;
- msm_pm_write_boot_vector(dev->cpu, virt_to_phys(entry));
+ msm_pm_boot_config_before_pc(dev->cpu, virt_to_phys(entry));
if (MSM_PM_DEBUG_RESET_VECTOR & msm_pm_debug_mask)
pr_info("CPU%u: %s: program vector to %p\n",
@@ -661,6 +662,8 @@
collapsed = msm_pm_collapse();
+ msm_pm_boot_config_after_pc(dev->cpu);
+
if (collapsed) {
#ifdef CONFIG_VFP
vfp_reinit();
@@ -1179,15 +1182,6 @@
init_completion(&dev->cpu_killed);
#endif
}
-#ifdef CONFIG_MSM_SCM
- ret = scm_set_boot_addr((void *)virt_to_phys(msm_pm_boot_entry),
- SCM_FLAG_WARMBOOT_CPU0 | SCM_FLAG_WARMBOOT_CPU1);
- if (ret) {
- pr_err("%s: failed to set up scm boot addr: %d\n",
- __func__, ret);
- return ret;
- }
-#endif
#ifdef CONFIG_MSM_IDLE_STATS
for_each_possible_cpu(cpu) {
diff --git a/arch/arm/mach-msm/pm-boot.c b/arch/arm/mach-msm/pm-boot.c
new file mode 100644
index 0000000..6becc61
--- /dev/null
+++ b/arch/arm/mach-msm/pm-boot.c
@@ -0,0 +1,114 @@
+/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include "scm-boot.h"
+#include "idle.h"
+#include "pm-boot.h"
+
+static uint32_t *msm_pm_reset_vector;
+static uint32_t saved_vector[2];
+static void (*msm_pm_boot_before_pc)(unsigned int cpu, unsigned long entry);
+static void (*msm_pm_boot_after_pc)(unsigned int cpu);
+
+#ifdef CONFIG_MSM_SCM
+static int __init msm_pm_tz_boot_init(void)
+{
+ int flag = 0;
+ if (num_possible_cpus() == 1)
+ flag = SCM_FLAG_WARMBOOT_CPU0;
+ else if (num_possible_cpus() == 2)
+ flag = SCM_FLAG_WARMBOOT_CPU0 | SCM_FLAG_WARMBOOT_CPU1;
+ else
+ __WARN();
+
+ return scm_set_boot_addr((void *)virt_to_phys(msm_pm_boot_entry), flag);
+}
+
+static void msm_pm_config_tz_before_pc(unsigned int cpu,
+ unsigned long entry)
+{
+ msm_pm_write_boot_vector(cpu, entry);
+}
+#else
+static int __init msm_pm_tz_boot_init(void)
+{
+ return 0;
+};
+
+static inline void msm_pm_config_tz_before_pc(unsigned int cpu,
+ unsigned long entry) {}
+#endif
+
+static int __init msm_pm_boot_reset_vector_init(uint32_t *reset_vector)
+{
+ WARN_ON(!reset_vector);
+ msm_pm_reset_vector = reset_vector;
+ mb();
+
+ return 0;
+}
+
+static void msm_pm_config_rst_vector_before_pc(unsigned int cpu,
+ unsigned long entry)
+{
+ saved_vector[0] = msm_pm_reset_vector[0];
+ saved_vector[1] = msm_pm_reset_vector[1];
+ msm_pm_reset_vector[0] = 0xE51FF004; /* ldr pc, 4 */
+ msm_pm_reset_vector[1] = entry;
+}
+
+static void msm_pm_config_rst_vector_after_pc(unsigned int cpu)
+{
+ msm_pm_reset_vector[0] = saved_vector[0];
+ msm_pm_reset_vector[1] = saved_vector[1];
+}
+
+void msm_pm_boot_config_before_pc(unsigned int cpu, unsigned long entry)
+{
+ if (msm_pm_boot_before_pc)
+ msm_pm_boot_before_pc(cpu, entry);
+}
+
+void msm_pm_boot_config_after_pc(unsigned int cpu)
+{
+ if (msm_pm_boot_after_pc)
+ msm_pm_boot_after_pc(cpu);
+}
+
+int __init msm_pm_boot_init(int tz_available, uint32_t* address)
+{
+ int ret = 0;
+
+ switch (tz_available) {
+ case MSM_PM_BOOT_CONFIG_TZ:
+ ret = msm_pm_tz_boot_init();
+ msm_pm_boot_before_pc = msm_pm_config_tz_before_pc;
+ msm_pm_boot_after_pc = NULL;
+ break;
+ case MSM_PM_BOOT_CONFIG_RESET_VECTOR:
+ ret = msm_pm_boot_reset_vector_init(address);
+ msm_pm_boot_before_pc
+ = msm_pm_config_rst_vector_before_pc;
+ msm_pm_boot_after_pc
+ = msm_pm_config_rst_vector_after_pc;
+ break;
+ default:
+ __WARN();
+ }
+
+ return ret;
+}
diff --git a/arch/arm/mach-msm/pm-boot.h b/arch/arm/mach-msm/pm-boot.h
new file mode 100644
index 0000000..7e1a439
--- /dev/null
+++ b/arch/arm/mach-msm/pm-boot.h
@@ -0,0 +1,25 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef _ARCH_ARM_MACH_MSM_PM_BOOT_H
+#define _ARCH_ARM_MACH_MSM_PM_BOOT_H
+
+enum {
+ MSM_PM_BOOT_CONFIG_TZ = 0,
+ MSM_PM_BOOT_CONFIG_RESET_VECTOR = 1,
+};
+
+int __init msm_pm_boot_init(int boot_config, uint32_t* address);
+void msm_pm_boot_config_before_pc(unsigned int cpu, unsigned long entry);
+void msm_pm_boot_config_after_pc(unsigned int cpu);
+
+#endif
diff --git a/arch/arm/mach-msm/pm.c b/arch/arm/mach-msm/pm.c
index 9e19d40..d684a5a 100644
--- a/arch/arm/mach-msm/pm.c
+++ b/arch/arm/mach-msm/pm.c
@@ -45,6 +45,7 @@
#include "gpio.h"
#include "timer.h"
#include "pm.h"
+#include "pm-boot.h"
enum {
MSM_PM_DEBUG_SUSPEND = 1U << 0,
@@ -100,7 +101,6 @@
struct smsm_interrupt_info_ext *int_info_ext;
} msm_pm_sma;
-static uint32_t *msm_pm_reset_vector;
static uint32_t msm_pm_max_sleep_time;
static struct msm_pm_platform_data *msm_pm_modes;
@@ -238,7 +238,6 @@
static int msm_sleep(int sleep_mode, uint32_t sleep_delay,
uint32_t sleep_limit, int from_idle)
{
- uint32_t saved_vector[2];
int collapsed;
uint32_t enter_state;
uint32_t enter_wait_set = 0;
@@ -344,17 +343,10 @@
msm_pm_sma.int_info->aArm_en_mask,
msm_pm_sma.int_info->aArm_wakeup_reason,
msm_pm_sma.int_info->aArm_interrupts_pending);
- saved_vector[0] = msm_pm_reset_vector[0];
- saved_vector[1] = msm_pm_reset_vector[1];
- msm_pm_reset_vector[0] = 0xE51FF004; /* ldr pc, 4 */
- msm_pm_reset_vector[1] = virt_to_phys(msm_pm_collapse_exit);
- if (msm_pm_debug_mask & MSM_PM_DEBUG_RESET_VECTOR)
- printk(KERN_INFO "msm_sleep(): vector %x %x -> "
- "%x %x\n", saved_vector[0], saved_vector[1],
- msm_pm_reset_vector[0], msm_pm_reset_vector[1]);
+ msm_pm_boot_config_before_pc(smp_processor_id(),
+ virt_to_phys(msm_pm_collapse_exit));
collapsed = msm_pm_collapse();
- msm_pm_reset_vector[0] = saved_vector[0];
- msm_pm_reset_vector[1] = saved_vector[1];
+ msm_pm_boot_config_after_pc(smp_processor_id());
if (collapsed) {
cpu_init();
local_fiq_enable();
@@ -871,22 +863,6 @@
return -ENODEV;
}
-#if defined(CONFIG_ARCH_MSM_SCORPION) && !defined(CONFIG_MSM_SMP)
- /* The bootloader is responsible for initializing many of Scorpion's
- * coprocessor registers for things like cache timing. The state of
- * these coprocessor registers is lost on reset, so part of the
- * bootloader must be re-executed. Do not overwrite the reset vector
- * or bootloader area.
- */
- msm_pm_reset_vector = (uint32_t *) PAGE_OFFSET;
-#else
- msm_pm_reset_vector = ioremap(0, PAGE_SIZE);
- if (msm_pm_reset_vector == NULL) {
- printk(KERN_ERR "msm_pm_init: failed to map reset vector\n");
- return -ENODEV;
- }
-#endif /* CONFIG_ARCH_MSM_SCORPION */
-
ret = msm_timer_init_time_sync(msm_pm_timeout);
if (ret)
return ret;
diff --git a/arch/arm/mach-msm/pm2.c b/arch/arm/mach-msm/pm2.c
index 6b24a02..4cdd7ae 100644
--- a/arch/arm/mach-msm/pm2.c
+++ b/arch/arm/mach-msm/pm2.c
@@ -61,6 +61,7 @@
#include "pm.h"
#include "spm.h"
#include "sirc.h"
+#include "pm-boot.h"
/******************************************************************************
* Debug Definitions
@@ -962,7 +963,6 @@
*
*****************************************************************************/
static struct msm_pm_smem_t *msm_pm_smem_data;
-static uint32_t *msm_pm_reset_vector;
static atomic_t msm_pm_init_done = ATOMIC_INIT(0);
static int msm_pm_modem_busy(void)
@@ -991,7 +991,6 @@
{
struct msm_pm_polled_group state_grps[2];
unsigned long saved_acpuclk_rate;
- uint32_t saved_vector[2];
int collapsed = 0;
int ret;
@@ -1078,15 +1077,8 @@
goto power_collapse_early_exit;
}
- saved_vector[0] = msm_pm_reset_vector[0];
- saved_vector[1] = msm_pm_reset_vector[1];
- msm_pm_reset_vector[0] = 0xE51FF004; /* ldr pc, 4 */
- msm_pm_reset_vector[1] = virt_to_phys(msm_pm_collapse_exit);
-
- MSM_PM_DPRINTK(MSM_PM_DEBUG_RESET_VECTOR, KERN_INFO,
- "%s(): vector %x %x -> %x %x\n", __func__,
- saved_vector[0], saved_vector[1],
- msm_pm_reset_vector[0], msm_pm_reset_vector[1]);
+ msm_pm_boot_config_before_pc(smp_processor_id(),
+ virt_to_phys(msm_pm_collapse_exit));
#ifdef CONFIG_VFP
if (from_idle)
@@ -1103,8 +1095,7 @@
l2x0_resume(collapsed);
#endif
- msm_pm_reset_vector[0] = saved_vector[0];
- msm_pm_reset_vector[1] = saved_vector[1];
+ msm_pm_boot_config_after_pc(smp_processor_id());
if (collapsed) {
#ifdef CONFIG_VFP
@@ -1283,7 +1274,6 @@
*/
static int msm_pm_power_collapse_standalone(void)
{
- uint32_t saved_vector[2];
int collapsed = 0;
int ret;
@@ -1293,15 +1283,8 @@
ret = msm_spm_set_low_power_mode(MSM_SPM_MODE_POWER_COLLAPSE, false);
WARN_ON(ret);
- saved_vector[0] = msm_pm_reset_vector[0];
- saved_vector[1] = msm_pm_reset_vector[1];
- msm_pm_reset_vector[0] = 0xE51FF004; /* ldr pc, 4 */
- msm_pm_reset_vector[1] = virt_to_phys(msm_pm_collapse_exit);
-
- MSM_PM_DPRINTK(MSM_PM_DEBUG_RESET_VECTOR, KERN_INFO,
- "%s(): vector %x %x -> %x %x\n", __func__,
- saved_vector[0], saved_vector[1],
- msm_pm_reset_vector[0], msm_pm_reset_vector[1]);
+ msm_pm_boot_config_before_pc(smp_processor_id(),
+ virt_to_phys(msm_pm_collapse_exit));
#ifdef CONFIG_VFP
vfp_flush_context();
@@ -1317,8 +1300,7 @@
l2x0_resume(collapsed);
#endif
- msm_pm_reset_vector[0] = saved_vector[0];
- msm_pm_reset_vector[1] = saved_vector[1];
+ msm_pm_boot_config_after_pc(smp_processor_id());
if (collapsed) {
#ifdef CONFIG_VFP
@@ -1836,21 +1818,6 @@
printk(KERN_ERR "%s: failed to get smsm_data\n", __func__);
return -ENODEV;
}
-#if defined(CONFIG_ARCH_MSM_SCORPION) && !defined(CONFIG_MSM_SMP)
- /* The bootloader is responsible for initializing many of Scorpion's
- * coprocessor registers for things like cache timing. The state of
- * these coprocessor registers is lost on reset, so part of the
- * bootloader must be re-executed. Do not overwrite the reset vector
- * or bootloader area.
- */
- msm_pm_reset_vector = (uint32_t *) PAGE_OFFSET;
-#else
- msm_pm_reset_vector = ioremap(0, PAGE_SIZE);
- if (msm_pm_reset_vector == NULL) {
- printk(KERN_ERR "%s: failed to map reset vector\n", __func__);
- return -ENODEV;
- }
-#endif /* CONFIG_ARCH_MSM_SCORPION */
ret = msm_timer_init_time_sync(msm_pm_timeout);
if (ret)
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_acdb.c b/arch/arm/mach-msm/qdsp5v2/audio_acdb.c
index 36ace7f..ec275b4 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_acdb.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_acdb.c
@@ -31,6 +31,7 @@
#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/audio_dev_ctl.h>
#include <mach/qdsp5v2/audpp.h>
+#include <mach/socinfo.h>
#include <mach/qdsp5v2/audpreproc.h>
#include <mach/qdsp5v2/qdsp5audppcmdi.h>
#include <mach/qdsp5v2/qdsp5audpreproccmdi.h>
@@ -130,6 +131,7 @@
unsigned long get_blk_paddr;
u8 *get_blk_kvaddr;
struct msm_mapped_buffer *map_v_get_blk;
+ char *build_id;
};
static struct acdb_data acdb_data;
@@ -1109,23 +1111,26 @@
rtc_acdb.set_iid = 0;
rtc_acdb.valid_abid = false;
rtc_acdb.tx_rx_ctl = 0;
- snprintf(name, sizeof name, "get_set_abid");
- get_set_abid_dentry = debugfs_create_file(name,
+ if (acdb_data.build_id[17] == '1') {
+ snprintf(name, sizeof name, "get_set_abid");
+ get_set_abid_dentry = debugfs_create_file(name,
S_IFREG | S_IRUGO | S_IWUGO,
NULL, NULL, &rtc_acdb_debug_fops);
- if (IS_ERR(get_set_abid_dentry)) {
- MM_ERR("SET GET ABID debugfs_create_file failed\n");
- return false;
- }
+ if (IS_ERR(get_set_abid_dentry)) {
+ MM_ERR("SET GET ABID debugfs_create_file failed\n");
+ return false;
+ }
- snprintf(name1, sizeof name1, "get_set_abid_data");
- get_set_abid_data_dentry = debugfs_create_file(name1,
- S_IFREG | S_IRUGO | S_IWUGO,
- NULL, NULL,
- &rtc_acdb_data_debug_fops);
- if (IS_ERR(get_set_abid_data_dentry)) {
- MM_ERR("SET GET ABID DATA debugfs_create_file failed\n");
- return false;
+ snprintf(name1, sizeof name1, "get_set_abid_data");
+ get_set_abid_data_dentry = debugfs_create_file(name1,
+ S_IFREG | S_IRUGO | S_IWUGO,
+ NULL, NULL,
+ &rtc_acdb_data_debug_fops);
+ if (IS_ERR(get_set_abid_data_dentry)) {
+ MM_ERR("SET GET ABID DATA"
+ " debugfs_create_file failed\n");
+ return false;
+ }
}
rtc_read->phys = allocate_contiguous_ebi_nomap(PMEM_RTC_ACDB_QUERY_MEM,
@@ -2332,18 +2337,20 @@
MM_DBG("AUDPREPROC is calibrated"
" with calib_gain_tx\n");
}
- acdb_rmc = get_rmc_blk();
- if (acdb_rmc != NULL) {
- result = afe_config_rmc_block(acdb_rmc);
- if (result) {
- MM_ERR("ACDB=> Failed to send rmc"
- " data to afe\n");
- result = -EINVAL;
- goto done;
+ if (acdb_data.build_id[17] != '0') {
+ acdb_rmc = get_rmc_blk();
+ if (acdb_rmc != NULL) {
+ result = afe_config_rmc_block(acdb_rmc);
+ if (result) {
+ MM_ERR("ACDB=> Failed to send rmc"
+ " data to afe\n");
+ result = -EINVAL;
+ goto done;
+ } else
+ MM_DBG("AFE is calibrated with rmc params\n");
} else
- MM_DBG("AFE is calibrated with rmc params\n");
- } else
- MM_DBG("RMC block was not found\n");
+ MM_DBG("RMC block was not found\n");
+ }
if (!acdb_data.fleuce_feature_status[acdb_data.preproc_stream_id]) {
result = acdb_fill_audpreproc_fluence();
if (!(IS_ERR_VALUE(result))) {
@@ -3050,9 +3057,11 @@
MM_INFO("audpreproc is routed to pseudo device\n");
return result;
}
- if (session_info[stream_id].sampling_freq)
- acdb_data.device_info->sample_rate =
+ if (acdb_data.build_id[17] == '1') {
+ if (session_info[stream_id].sampling_freq)
+ acdb_data.device_info->sample_rate =
session_info[stream_id].sampling_freq;
+ }
if (!(acdb_data.acdb_state & CAL_DATA_READY)) {
result = check_tx_acdb_values_cached();
if (result) {
@@ -3110,17 +3119,19 @@
callback at this scenario we should not access
device information
*/
- if (acdb_data.device_info &&
- session_info[stream_id].sampling_freq) {
- acdb_data.device_info->sample_rate =
+ if (acdb_data.build_id[17] != '0') {
+ if (acdb_data.device_info &&
+ session_info[stream_id].sampling_freq) {
+ acdb_data.device_info->sample_rate =
session_info[stream_id].sampling_freq;
- result = check_tx_acdb_values_cached();
- if (!result) {
- MM_INFO("acdb values for the stream is" \
- " querried from modem");
- acdb_data.acdb_state |= CAL_DATA_READY;
- } else {
- acdb_data.acdb_state &= ~CAL_DATA_READY;
+ result = check_tx_acdb_values_cached();
+ if (!result) {
+ MM_INFO("acdb values for the stream is" \
+ " querried from modem");
+ acdb_data.acdb_state |= CAL_DATA_READY;
+ } else {
+ acdb_data.acdb_state &= ~CAL_DATA_READY;
+ }
}
}
if (acdb_data.preproc_stream_id == 0)
@@ -3195,6 +3206,7 @@
if (result)
goto err4;
+
return result;
err4:
@@ -3276,10 +3288,12 @@
result = acdb_initialize_data();
if (result)
goto done;
-
- result = initialize_modem_acdb();
- if (result < 0)
- MM_ERR("failed to initialize modem ACDB\n");
+ MM_ERR("acdb_data.build_id[17] = %c\n", acdb_data.build_id[17]);
+ if (acdb_data.build_id[17] != '0') {
+ result = initialize_modem_acdb();
+ if (result < 0)
+ MM_ERR("failed to initialize modem ACDB\n");
+ }
while (!kthread_should_stop()) {
MM_DBG("Waiting for call back events\n");
@@ -3375,6 +3389,10 @@
result = -ENODEV;
goto err;
}
+
+ acdb_data.build_id = socinfo_get_build_id();
+ MM_INFO("build id used is = %s\n", acdb_data.build_id);
+
#ifdef CONFIG_DEBUG_FS
/*This is RTC specific INIT used only with debugfs*/
if (!rtc_acdb_init())
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_lpa.c b/arch/arm/mach-msm/qdsp5v2/audio_lpa.c
index 9baf521..c38fefc 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_lpa.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_lpa.c
@@ -603,16 +603,14 @@
temp = audio->bytecount_head;
used_buf = list_first_entry(&audio->out_queue,
struct audlpa_buffer_node, list);
- if ((audio->bytecount_head + used_buf->buf.data_len) <
- audio->bytecount_consumed) {
- audio->bytecount_head += used_buf->buf.data_len;
- temp = audio->bytecount_head;
- list_del(&used_buf->list);
- evt_payload.aio_buf = used_buf->buf;
- audlpa_post_event(audio, AUDIO_EVENT_WRITE_DONE,
- evt_payload);
- kfree(used_buf);
- }
+
+ audio->bytecount_head += used_buf->buf.data_len;
+ temp = audio->bytecount_head;
+ list_del(&used_buf->list);
+ evt_payload.aio_buf = used_buf->buf;
+ audlpa_post_event(audio, AUDIO_EVENT_WRITE_DONE,
+ evt_payload);
+ kfree(used_buf);
audio->drv_status &= ~ADRV_STATUS_OBUF_GIVEN;
}
}
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c b/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
index 7f68c03..43f3d26 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
@@ -638,30 +638,52 @@
rc = -EFAULT;
break;
}
- if (cfg.channel_count == 1) {
- cfg.channel_count = AUDREC_CMD_MODE_MONO;
- if ((cfg.buffer_size == MONO_DATA_SIZE_256) ||
- (cfg.buffer_size == MONO_DATA_SIZE_512) ||
- (cfg.buffer_size == MONO_DATA_SIZE_1024)) {
- audio->buffer_size = cfg.buffer_size;
+ MM_ERR("build_id[17] = %c\n", audio->build_id[17]);
+ if (audio->build_id[17] == '1') {
+ audio->enc_type = ENC_TYPE_EXT_WAV | audio->mode;
+ if (cfg.channel_count == 1) {
+ cfg.channel_count = AUDREC_CMD_MODE_MONO;
+ if ((cfg.buffer_size == MONO_DATA_SIZE_256) ||
+ (cfg.buffer_size ==
+ MONO_DATA_SIZE_512) ||
+ (cfg.buffer_size ==
+ MONO_DATA_SIZE_1024)) {
+ audio->buffer_size = cfg.buffer_size;
+ } else {
+ rc = -EINVAL;
+ break;
+ }
+ } else if (cfg.channel_count == 2) {
+ cfg.channel_count = AUDREC_CMD_MODE_STEREO;
+ if ((cfg.buffer_size ==
+ STEREO_DATA_SIZE_256) ||
+ (cfg.buffer_size ==
+ STEREO_DATA_SIZE_512) ||
+ (cfg.buffer_size ==
+ STEREO_DATA_SIZE_1024)) {
+ audio->buffer_size = cfg.buffer_size;
+ } else {
+ rc = -EINVAL;
+ break;
+ }
} else {
rc = -EINVAL;
break;
}
- } else if (cfg.channel_count == 2) {
- cfg.channel_count = AUDREC_CMD_MODE_STEREO;
- if ((cfg.buffer_size == STEREO_DATA_SIZE_256) ||
- (cfg.buffer_size == STEREO_DATA_SIZE_512) ||
- (cfg.buffer_size == STEREO_DATA_SIZE_1024)) {
- audio->buffer_size = cfg.buffer_size;
- } else {
- rc = -EINVAL;
- break;
+ } else if (audio->build_id[17] == '0') {
+ audio->enc_type = ENC_TYPE_WAV | audio->mode;
+ if (cfg.channel_count == 1) {
+ cfg.channel_count = AUDREC_CMD_MODE_MONO;
+ audio->buffer_size = MONO_DATA_SIZE_1024;
+ } else if (cfg.channel_count == 2) {
+ cfg.channel_count = AUDREC_CMD_MODE_STEREO;
+ audio->buffer_size = STEREO_DATA_SIZE_1024;
}
} else {
- rc = -EINVAL;
- break;
+ MM_ERR("wrong build_id = %s\n", audio->build_id);
+ return -ENODEV;
}
+ MM_ERR("buffer size configured is = %d\n", audio->buffer_size);
audio->samp_rate = cfg.sample_rate;
audio->channel_mode = cfg.channel_count;
break;
diff --git a/arch/arm/mach-msm/qdsp6v2/audio_multi_aac.c b/arch/arm/mach-msm/qdsp6v2/audio_multi_aac.c
index 122634f..75af881 100644
--- a/arch/arm/mach-msm/qdsp6v2/audio_multi_aac.c
+++ b/arch/arm/mach-msm/qdsp6v2/audio_multi_aac.c
@@ -18,6 +18,8 @@
#include <linux/msm_audio_aac.h>
#include "audio_utils_aio.h"
+#define AUDIO_AAC_DUAL_MONO_INVALID -1
+
/* Default number of pre-allocated event packets */
#define PCM_BUFSZ_MIN_AACM ((8*1024) + sizeof(struct dec_meta_out))
@@ -115,7 +117,7 @@
aac_cfg.sample_rate);
/* Configure Media format block */
- rc = q6asm_media_format_block_aac(audio->ac, &aac_cfg);
+ rc = q6asm_media_format_block_multi_aac(audio->ac, &aac_cfg);
if (rc < 0) {
pr_err("cmd media format block failed\n");
break;
@@ -146,10 +148,52 @@
break;
}
case AUDIO_SET_AAC_CONFIG: {
+ struct msm_audio_aac_config *aac_config;
if (copy_from_user(audio->codec_cfg, (void *)arg,
sizeof(struct msm_audio_aac_config))) {
rc = -EFAULT;
- break;
+ } else {
+ uint16_t sce_left = 1, sce_right = 2;
+ aac_config = audio->codec_cfg;
+ if ((aac_config->dual_mono_mode <
+ AUDIO_AAC_DUAL_MONO_PL_PR) ||
+ (aac_config->dual_mono_mode >
+ AUDIO_AAC_DUAL_MONO_PL_SR)) {
+ pr_err("%s:AUDIO_SET_AAC_CONFIG: Invalid"
+ "dual_mono mode =%d\n", __func__,
+ aac_config->dual_mono_mode);
+ } else {
+ /* convert the data from user into sce_left
+ * and sce_right based on the definitions
+ */
+ pr_debug("%s: AUDIO_SET_AAC_CONFIG: modify"
+ "dual_mono mode =%d\n", __func__,
+ aac_config->dual_mono_mode);
+ switch (aac_config->dual_mono_mode) {
+ case AUDIO_AAC_DUAL_MONO_PL_PR:
+ sce_left = 1;
+ sce_right = 1;
+ break;
+ case AUDIO_AAC_DUAL_MONO_SL_SR:
+ sce_left = 2;
+ sce_right = 2;
+ break;
+ case AUDIO_AAC_DUAL_MONO_SL_PR:
+ sce_left = 2;
+ sce_right = 1;
+ break;
+ case AUDIO_AAC_DUAL_MONO_PL_SR:
+ default:
+ sce_left = 1;
+ sce_right = 2;
+ break;
+ }
+ rc = q6asm_cfg_dual_mono_aac(audio->ac,
+ sce_left, sce_right);
+ if (rc < 0)
+ pr_err("%s: asm cmd dualmono failed"
+ " rc=%d\n", __func__, rc);
+ } break;
}
break;
}
@@ -165,6 +209,7 @@
{
struct q6audio_aio *audio = NULL;
int rc = 0;
+ struct msm_audio_aac_config *aac_config = NULL;
#ifdef CONFIG_DEBUG_FS
/* 4 bytes represents decoder number, 1 byte for terminate string */
@@ -186,7 +231,10 @@
return -ENOMEM;
}
+ aac_config = audio->codec_cfg;
+
audio->pcm_cfg.buffer_size = PCM_BUFSZ_MIN_AACM;
+ aac_config->dual_mono_mode = AUDIO_AAC_DUAL_MONO_INVALID;
audio->ac = q6asm_audio_client_alloc((app_cb) q6_audio_aac_cb,
(void *)audio);
@@ -201,7 +249,7 @@
/* open in T/NT mode */
if ((file->f_mode & FMODE_WRITE) && (file->f_mode & FMODE_READ)) {
rc = q6asm_open_read_write(audio->ac, FORMAT_LINEAR_PCM,
- FORMAT_MPEG4_AAC);
+ FORMAT_MPEG4_MULTI_AAC);
if (rc < 0) {
pr_err("NT mode Open failed rc=%d\n", rc);
rc = -ENODEV;
@@ -213,7 +261,7 @@
audio->buf_cfg.meta_info_enable = 0x01;
} else if ((file->f_mode & FMODE_WRITE) &&
!(file->f_mode & FMODE_READ)) {
- rc = q6asm_open_write(audio->ac, FORMAT_MPEG4_AAC);
+ rc = q6asm_open_write(audio->ac, FORMAT_MPEG4_MULTI_AAC);
if (rc < 0) {
pr_err("T mode Open failed rc=%d\n", rc);
rc = -ENODEV;
diff --git a/arch/arm/mach-msm/qdsp6v2/rtac.c b/arch/arm/mach-msm/qdsp6v2/rtac.c
index 948c66e..9823209 100644
--- a/arch/arm/mach-msm/qdsp6v2/rtac.c
+++ b/arch/arm/mach-msm/qdsp6v2/rtac.c
@@ -28,7 +28,8 @@
#ifndef CONFIG_RTAC
void rtac_add_adm_device(u32 port_id, u32 copp_id, u32 path_id, u32 popp_id) {}
-void rtac_remove_adm_device(u32 port_id, u32 popp_id) {}
+void rtac_remove_adm_device(u32 port_id) {}
+void rtac_remove_popp_from_adm_devices(u32 popp_id) {}
void rtac_set_adm_handle(void *handle) {}
bool rtac_make_adm_callback(uint32_t *payload, u32 payload_size)
{return false; }
@@ -222,44 +223,49 @@
}
}
-void rtac_remove_adm_device(u32 port_id, u32 popp_id)
+void rtac_remove_adm_device(u32 port_id)
{
- s32 i, j;
- pr_debug("%s: port_id = %d, popp_id = %d\n", __func__, port_id,
- popp_id);
+ s32 i;
+ pr_debug("%s: port_id = %d\n", __func__, port_id);
mutex_lock(&rtac_adm_mutex);
/* look for device */
for (i = 0; i < rtac_adm_data.num_of_dev; i++) {
if (rtac_adm_data.device[i].afe_port == port_id) {
- if (rtac_adm_data.device[i].num_of_popp == 1) {
- memset(&rtac_adm_data.device[i], 0,
- sizeof(rtac_adm_data.device[i]));
- rtac_adm_data.num_of_dev--;
- } else {
- for (j = 0; j <
- rtac_adm_data.device[i].num_of_popp; j++) {
- if (rtac_adm_data.device[i].popp[j] ==
- popp_id) {
- rtac_adm_data.device[i].popp[j]
- = 0;
- rtac_adm_data.device[i].num_of_popp--;
- shift_popp(i, j);
- goto done;
- }
- }
- }
+ memset(&rtac_adm_data.device[i], 0,
+ sizeof(rtac_adm_data.device[i]));
+ rtac_adm_data.num_of_dev--;
+
if (rtac_adm_data.num_of_dev >= 1) {
shift_adm_devices(i);
break;
}
}
}
-done:
+
mutex_unlock(&rtac_adm_mutex);
return;
}
+void rtac_remove_popp_from_adm_devices(u32 popp_id)
+{
+ s32 i, j;
+ pr_debug("%s: popp_id = %d\n", __func__, popp_id);
+
+ mutex_lock(&rtac_adm_mutex);
+
+ for (i = 0; i < rtac_adm_data.num_of_dev; i++) {
+ for (j = 0; j < rtac_adm_data.device[i].num_of_popp; j++) {
+ if (rtac_adm_data.device[i].popp[j] == popp_id) {
+ rtac_adm_data.device[i].popp[j] = 0;
+ rtac_adm_data.device[i].num_of_popp--;
+ shift_popp(i, j);
+ }
+ }
+ }
+
+ mutex_unlock(&rtac_adm_mutex);
+}
/* Voice Info */
static void set_rtac_voice_data(int idx, u32 cvs_handle, u32 cvp_handle,
diff --git a/arch/arm/mach-msm/rpm-regulator.c b/arch/arm/mach-msm/rpm-regulator.c
index 2494969..5c2bb8e 100644
--- a/arch/arm/mach-msm/rpm-regulator.c
+++ b/arch/arm/mach-msm/rpm-regulator.c
@@ -416,6 +416,9 @@
*
* This function may only be called for regulators which have the sleep flag
* specified in their private data.
+ *
+ * Consumers can vote to disable a regulator with this function by passing
+ * min_uV = 0 and max_uV = 0.
*/
int rpm_vreg_set_voltage(int vreg_id, enum rpm_vreg_voter voter, int min_uV,
int max_uV, int sleep_also)
@@ -452,38 +455,41 @@
return -EINVAL;
}
- /*
- * Check if request voltage is outside of allowed range. The regulator
- * core has already checked that constraint range is inside of the
- * physically allowed range.
- */
- lim_min_uV = vreg->pdata.init_data.constraints.min_uV;
- lim_max_uV = vreg->pdata.init_data.constraints.max_uV;
+ /* Allow min_uV == max_uV == 0 to represent a disable request. */
+ if (min_uV != 0 || max_uV != 0) {
+ /*
+ * Check if request voltage is outside of allowed range. The
+ * regulator core has already checked that constraint range
+ * is inside of the physically allowed range.
+ */
+ lim_min_uV = vreg->pdata.init_data.constraints.min_uV;
+ lim_max_uV = vreg->pdata.init_data.constraints.max_uV;
- if (uV < lim_min_uV && max_uV >= lim_min_uV)
- uV = lim_min_uV;
+ if (uV < lim_min_uV && max_uV >= lim_min_uV)
+ uV = lim_min_uV;
- if (uV < lim_min_uV || uV > lim_max_uV) {
- vreg_err(vreg,
- "request v=[%d, %d] is outside allowed v=[%d, %d]\n",
- min_uV, max_uV, lim_min_uV, lim_max_uV);
- return -EINVAL;
- }
-
- /* Find the range which uV is inside of. */
- for (i = vreg->set_points->count - 1; i > 0; i--) {
- if (uV > vreg->set_points->range[i - 1].max_uV) {
- range = &vreg->set_points->range[i];
- break;
+ if (uV < lim_min_uV || uV > lim_max_uV) {
+ vreg_err(vreg, "request v=[%d, %d] is outside allowed "
+ "v=[%d, %d]\n", min_uV, max_uV, lim_min_uV,
+ lim_max_uV);
+ return -EINVAL;
}
- }
- /*
- * Force uV to be an allowed set point and apply a ceiling function
- * to non-set point values.
- */
- uV = (uV - range->min_uV + range->step_uV - 1) / range->step_uV;
- uV = uV * range->step_uV + range->min_uV;
+ /* Find the range which uV is inside of. */
+ for (i = vreg->set_points->count - 1; i > 0; i--) {
+ if (uV > vreg->set_points->range[i - 1].max_uV) {
+ range = &vreg->set_points->range[i];
+ break;
+ }
+ }
+
+ /*
+ * Force uV to be an allowed set point and apply a ceiling
+ * function to non-set point values.
+ */
+ uV = (uV - range->min_uV + range->step_uV - 1) / range->step_uV;
+ uV = uV * range->step_uV + range->min_uV;
+ }
if (vreg->part->uV.mask) {
val[vreg->part->uV.word] = uV << vreg->part->uV.shift;
diff --git a/arch/arm/mach-msm/rpm_resources.c b/arch/arm/mach-msm/rpm_resources.c
index e29afa6..6bbfee4 100644
--- a/arch/arm/mach-msm/rpm_resources.c
+++ b/arch/arm/mach-msm/rpm_resources.c
@@ -64,11 +64,9 @@
static ssize_t msm_rpmrs_resource_attr_store(struct kobject *kobj,
struct kobj_attribute *attr, const char *buf, size_t count);
-#ifdef CONFIG_MSM_L2_SPM
static void *msm_rpmrs_l2_counter_addr;
static int msm_rpmrs_l2_reset_count;
#define L2_PC_COUNTER_ADDR 0x660
-#endif
#define MSM_RPMRS_MAX_RS_REGISTER_COUNT 2
@@ -267,7 +265,6 @@
}
}
-#ifdef CONFIG_MSM_L2_SPM
static bool msm_spm_l2_cache_beyond_limits(struct msm_rpmrs_limits *limits)
{
struct msm_rpmrs_resource *rs = &msm_rpmrs_l2_cache;
@@ -278,7 +275,6 @@
return l2_cache > limits->l2_cache;
}
-#endif
static void msm_rpmrs_restore_l2_cache(void)
{
@@ -918,9 +914,9 @@
} else if ((sleep_us >> 10) > level->time_overhead_us) {
power = level->steady_state_power;
} else {
- power = (sleep_us - level->time_overhead_us);
- power *= level->steady_state_power;
- power /= sleep_us;
+ power = level->steady_state_power;
+ power -= (level->time_overhead_us *
+ level->steady_state_power)/sleep_us;
power += level->energy_overhead / sleep_us;
}
@@ -967,7 +963,6 @@
msm_mpm_exit_sleep(from_idle);
}
-#ifdef CONFIG_MSM_L2_SPM
static int rpmrs_cpu_callback(struct notifier_block *nfb,
unsigned long action, void *hcpu)
{
@@ -993,7 +988,6 @@
static struct notifier_block __refdata rpmrs_cpu_notifier = {
.notifier_call = rpmrs_cpu_callback,
};
-#endif
int __init msm_rpmrs_levels_init(struct msm_rpmrs_level *levels, int size)
{
@@ -1061,20 +1055,25 @@
}
early_initcall(msm_rpmrs_early_init);
-#ifdef CONFIG_MSM_L2_SPM
static int __init msm_rpmrs_l2_counter_init(void)
{
- msm_rpmrs_l2_counter_addr = MSM_IMEM_BASE + L2_PC_COUNTER_ADDR;
- writel_relaxed(msm_rpmrs_l2_reset_count, msm_rpmrs_l2_counter_addr);
- mb();
+ if (cpu_is_msm8960() || cpu_is_msm8930()) {
+ msm_rpmrs_l2_counter_addr = MSM_IMEM_BASE + L2_PC_COUNTER_ADDR;
+ writel_relaxed(msm_rpmrs_l2_reset_count,
+ msm_rpmrs_l2_counter_addr);
+ mb();
- msm_rpmrs_l2_cache.beyond_limits = msm_spm_l2_cache_beyond_limits;
- msm_rpmrs_l2_cache.aggregate = NULL;
- msm_rpmrs_l2_cache.restore = NULL;
+ msm_rpmrs_l2_cache.beyond_limits =
+ msm_spm_l2_cache_beyond_limits;
+ msm_rpmrs_l2_cache.aggregate = NULL;
+ msm_rpmrs_l2_cache.restore = NULL;
+ register_hotcpu_notifier(&rpmrs_cpu_notifier);
- register_hotcpu_notifier(&rpmrs_cpu_notifier);
-
+ } else if (cpu_is_msm9615()) {
+ msm_rpmrs_l2_cache.beyond_limits = NULL;
+ msm_rpmrs_l2_cache.aggregate = NULL;
+ msm_rpmrs_l2_cache.restore = NULL;
+ }
return 0;
}
early_initcall(msm_rpmrs_l2_counter_init);
-#endif
diff --git a/arch/arm/mach-msm/sdio_al.c b/arch/arm/mach-msm/sdio_al.c
index ace437b..891d655 100644
--- a/arch/arm/mach-msm/sdio_al.c
+++ b/arch/arm/mach-msm/sdio_al.c
@@ -15,7 +15,7 @@
*
* To be used with Qualcomm's SDIO-Client connected to this host.
*/
-#include <sdio_al_private.h>
+#include "sdio_al_private.h"
#include <linux/module.h>
#include <linux/scatterlist.h>
@@ -878,8 +878,7 @@
*/
static int write_lpm_info(struct sdio_al_device *sdio_al_dev)
{
- struct sdio_func *lpm_func =
- sdio_al_dev->card->sdio_func[sdio_al_dev->lpm_chan+1];
+ struct sdio_func *lpm_func = NULL;
int offset = offsetof(struct peer_sdioc_sw_mailbox, ch_config)+
sizeof(struct peer_sdioc_channel_config) *
sdio_al_dev->lpm_chan+
@@ -893,6 +892,14 @@
return -EINVAL;
}
+ if (!sdio_al_dev->card ||
+ !sdio_al_dev->card->sdio_func[sdio_al_dev->lpm_chan+1]) {
+ sdio_al_loge(sdio_al_dev->dev_log, MODULE_NAME
+ ": NULL card or lpm_func\n");
+ return -ENODEV;
+ }
+ lpm_func = sdio_al_dev->card->sdio_func[sdio_al_dev->lpm_chan+1];
+
pr_debug(MODULE_NAME ":write_lpm_info is_ok_to_sleep=%d, device %d\n",
sdio_al_dev->is_ok_to_sleep,
sdio_al_dev->host->index);
@@ -1900,8 +1907,7 @@
ch->poll_delay_msec = 0;
ch->num = i;
-
- ch->func = sdio_al_dev->card->sdio_func[ch->num+1];
+ ch->func = NULL;
ch->rx_pipe_index = ch->num*2;
ch->tx_pipe_index = ch->num*2+1;
@@ -1916,6 +1922,15 @@
ch->state = SDIO_CHANNEL_STATE_IDLE;
ch->sdio_al_dev = sdio_al_dev;
+ if (sdio_al_dev->card->sdio_func[ch->num+1]) {
+ ch->func =
+ sdio_al_dev->card->sdio_func[ch->num+1];
+ } else {
+ sdio_al_loge(sdio_al_dev->dev_log, MODULE_NAME
+ ": NULL func for channel %s\n",
+ ch->name);
+ goto exit_err;
+ }
} else {
ch->state = SDIO_CHANNEL_STATE_INVALID;
}
@@ -2802,18 +2817,19 @@
{
int ret;
int offset;
- struct sdio_func *wk_func;
+ struct sdio_func *wk_func = NULL;
u32 peer_operation;
int loop_count = 0;
- wk_func = sdio_al_dev->card->sdio_func[SDIO_AL_WAKEUP_FUNC-1];
- if (!wk_func) {
- sdio_al_loge(sdio_al_dev->dev_log, MODULE_NAME ":%s: NULL "
- "wakeup func:%d\n", __func__,
- SDIO_AL_WAKEUP_FUNC);
+ if (!sdio_al_dev->card ||
+ !sdio_al_dev->card->sdio_func[SDIO_AL_WAKEUP_FUNC-1]) {
+ sdio_al_loge(sdio_al_dev->dev_log, MODULE_NAME
+ ": NULL card or wk_func\n");
ret = -ENODEV;
goto exit;
}
+ wk_func = sdio_al_dev->card->sdio_func[SDIO_AL_WAKEUP_FUNC-1];
+
/* calculate offset of peer_operation field in sw mailbox struct */
offset = offsetof(struct peer_sdioc_sw_mailbox, ch_config) +
sizeof(struct peer_sdioc_channel_config) * ch->num +
@@ -3440,7 +3456,6 @@
*sdio_al_dev)
{
int ret = 0;
- struct sdio_func *func1 = NULL;
struct platform_device *pdev_arr[SDIO_AL_MAX_CHANNELS];
int j;
@@ -3449,13 +3464,6 @@
if (sdio_al_claim_mutex_and_verify_dev(sdio_al_dev, __func__))
return;
- if (!sdio_al_dev->card || !sdio_al_dev->card->sdio_func[0]) {
- sdio_al_loge(&sdio_al->gen_log, MODULE_NAME ": %s: "
- "NULL func1 for card %d", __func__,
- sdio_al_dev->host->index);
- goto exit_err;
- }
-
if (sdio_al_dev->state == CARD_REMOVED) {
sdio_al_logi(&sdio_al->gen_log, MODULE_NAME ": %s: "
"card %d is already removed", __func__,
@@ -3487,13 +3495,13 @@
ret = sdio_al_wake_up(sdio_al_dev, 1, NULL);
}
- if (!ret && (!sdio_al_dev->is_err)) {
- sdio_al_logi(sdio_al_dev->dev_log, MODULE_NAME
+ if (!ret && (!sdio_al_dev->is_err) && sdio_al_dev->card &&
+ sdio_al_dev->card->sdio_func[0]) {
+ sdio_al_logi(sdio_al_dev->dev_log, MODULE_NAME
": %s: sdio_release_irq for card %d",
__func__,
sdio_al_dev->host->index);
- func1 = sdio_al_dev->card->sdio_func[0];
- sdio_release_irq(sdio_al_dev->card->sdio_func[0]);
+ sdio_release_irq(sdio_al_dev->card->sdio_func[0]);
}
memset(pdev_arr, 0, sizeof(pdev_arr));
diff --git a/arch/arm/mach-msm/sdio_al_dloader.c b/arch/arm/mach-msm/sdio_al_dloader.c
index a172d2b..77a06a3 100644
--- a/arch/arm/mach-msm/sdio_al_dloader.c
+++ b/arch/arm/mach-msm/sdio_al_dloader.c
@@ -25,7 +25,7 @@
#include <linux/dma-mapping.h>
#include <mach/dma.h>
#include <linux/mmc/sdio_func.h>
-#include <sdio_al_private.h>
+#include "sdio_al_private.h"
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/kthread.h>
diff --git a/arch/arm/mach-msm/sdio_al_test.c b/arch/arm/mach-msm/sdio_al_test.c
index 9653b9a..8b9abcf 100644
--- a/arch/arm/mach-msm/sdio_al_test.c
+++ b/arch/arm/mach-msm/sdio_al_test.c
@@ -30,7 +30,7 @@
#include <linux/wakelock.h>
#include <linux/uaccess.h>
-#include <sdio_al_private.h>
+#include "sdio_al_private.h"
#include <linux/debugfs.h>
#include <linux/kthread.h>
@@ -60,6 +60,7 @@
#define A2_MIN_PACKET_SIZE 5
#define RMNT_PACKET_SIZE (4*1024)
#define DUN_PACKET_SIZE (2*1024)
+#define CSVT_PACKET_SIZE 1700
#define TEST_DBG(x...) if (test_ctx->runtime_debug) pr_info(x)
@@ -70,6 +71,9 @@
#define LPM_TEST_CONFIG_SIGNATURE 0xDEADBABE
#define LPM_MSG_NAME_SIZE 20
#define MAX_STR_SIZE 10
+#define MAX_AVG_RTT_TIME_USEC 2500
+#define SDIO_RMNT_RTT_PACKET_SIZE 32
+#define SDIO_CSVT_RTT_PACKET_SIZE 1900
#define A2_HEADER_OVERHEAD 8
@@ -143,6 +147,7 @@
SDIO_DUN,
SDIO_SMEM,
SDIO_CIQ,
+ SDIO_CSVT,
SDIO_MAX_CHANNELS
};
@@ -240,6 +245,7 @@
struct dentry *dun_a2_validation_test;
struct dentry *rmnet_a2_perf_test;
struct dentry *dun_a2_perf_test;
+ struct dentry *csvt_a2_perf_test;
struct dentry *rmnet_dun_a2_perf_test;
struct dentry *rpc_sender_rmnet_a2_perf_test;
struct dentry *all_channels_test;
@@ -247,6 +253,7 @@
struct dentry *host_sender_no_lp_diag_rpc_ciq_test;
struct dentry *rmnet_small_packets_test;
struct dentry *rmnet_rtt_test;
+ struct dentry *csvt_rtt_test;
struct dentry *modem_reset_rpc_test;
struct dentry *modem_reset_rmnet_test;
struct dentry *modem_reset_channels_4bit_dev_test;
@@ -337,6 +344,11 @@
{
int i = 0;
+ if (!test_ctx) {
+ pr_err(TEST_MODULE_NAME ":%s - test_ctx is NULL.\n", __func__);
+ return;
+ }
+
for (i = 0 ; i < MAX_NUM_OF_SDIO_DEVICES ; ++i)
test_ctx->test_dev_arr[i].sdio_al_device = NULL;
@@ -937,6 +949,74 @@
.read = dun_a2_perf_test_read,
};
+/* CSVT A2 PERFORMANCE TEST */
+static ssize_t csvt_a2_perf_test_write(struct file *file,
+ const char __user *buf,
+ size_t count,
+ loff_t *ppos)
+{
+ int ret = 0;
+ int i = 0;
+ int number = -1;
+
+ pr_info(TEST_MODULE_NAME "-- CSVT A2 PERFORMANCE TEST --\n");
+
+ number = sdio_al_test_extract_number(buf, count);
+
+ if (number < 0) {
+ pr_err(TEST_MODULE_NAME " : %s - sdio_al_test_extract_number() "
+ "failed. number = %d\n", __func__, number);
+ return count;
+ }
+
+ for (i = 0 ; i < number ; ++i) {
+ pr_info(TEST_MODULE_NAME " - Cycle # %d / %d\n", i+1, number);
+ pr_info(TEST_MODULE_NAME " ===================");
+
+ sdio_al_test_initial_dev_and_chan(test_ctx);
+
+ set_params_a2_perf(test_ctx->test_ch_arr[SDIO_CSVT]);
+
+ ret = test_start();
+
+ if (ret)
+ break;
+ }
+
+ return count;
+}
+
+static ssize_t csvt_a2_perf_test_read(struct file *file,
+ char __user *buffer,
+ size_t count,
+ loff_t *offset)
+{
+ memset((void *)buffer, 0, count);
+
+ snprintf(buffer, count,
+ "\nCSVT_A2_PERFORMANCE_TEST\n"
+ "========================\n"
+ "Description:\n"
+ "Loopback test on the CSVT Channel, in order to check "
+ "throughput performance.\n"
+ "Packet size that are sent on the CSVT channel in this "
+ "test is %d.bytes\n\n"
+ "END OF DESCRIPTION\n", CSVT_PACKET_SIZE);
+
+ if (message_repeat == 1) {
+ message_repeat = 0;
+ return strnlen(buffer, count);
+ } else {
+ return 0;
+ }
+}
+
+const struct file_operations csvt_a2_perf_test_ops = {
+ .open = sdio_al_test_open,
+ .write = csvt_a2_perf_test_write,
+ .read = csvt_a2_perf_test_read,
+};
+
/* RMNET DUN A2 PERFORMANCE TEST */
static ssize_t rmnet_dun_a2_perf_test_write(struct file *file,
const char __user *buf,
@@ -1101,6 +1181,7 @@
set_params_a2_perf(test_ctx->test_ch_arr[SDIO_DUN]);
set_params_smem_test(test_ctx->test_ch_arr[SDIO_SMEM]);
set_params_loopback_9k(test_ctx->test_ch_arr[SDIO_CIQ]);
+ set_params_a2_perf(test_ctx->test_ch_arr[SDIO_CSVT]);
ret = test_start();
@@ -1399,6 +1480,72 @@
.read = rmnet_rtt_test_read,
};
+/* CSVT RTT TEST */
+static ssize_t csvt_rtt_test_write(struct file *file,
+ const char __user *buf,
+ size_t count,
+ loff_t *ppos)
+{
+ int ret = 0;
+ int i = 0;
+ int number = -1;
+
+ pr_info(TEST_MODULE_NAME "-- CSVT RTT TEST --");
+
+ number = sdio_al_test_extract_number(buf, count);
+
+ if (number < 0) {
+ pr_err(TEST_MODULE_NAME " : %s - sdio_al_test_extract_number() "
+ "failed. number = %d\n", __func__, number);
+ return count;
+ }
+
+ for (i = 0 ; i < number ; ++i) {
+ pr_info(TEST_MODULE_NAME " - Cycle # %d / %d\n", i+1, number);
+ pr_info(TEST_MODULE_NAME " ===================");
+
+ sdio_al_test_initial_dev_and_chan(test_ctx);
+
+ set_params_rtt(test_ctx->test_ch_arr[SDIO_CSVT]);
+
+ ret = test_start();
+
+ if (ret)
+ break;
+ }
+
+ return count;
+}
+
+static ssize_t csvt_rtt_test_read(struct file *file,
+ char __user *buffer,
+ size_t count,
+ loff_t *offset)
+{
+ memset((void *)buffer, 0, count);
+
+ snprintf(buffer, count,
+ "\nCSVT_RTT_TEST\n"
+ "==============\n"
+ "Description:\n"
+ "In this test the HOST send a message of %d bytes "
+ "to the CLIENT\n\n"
+ "END OF DESCRIPTION\n", SDIO_CSVT_RTT_PACKET_SIZE);
+
+ if (message_repeat == 1) {
+ message_repeat = 0;
+ return strnlen(buffer, count);
+ } else {
+ return 0;
+ }
+}
+
+const struct file_operations csvt_rtt_test_ops = {
+ .open = sdio_al_test_open,
+ .write = csvt_rtt_test_write,
+ .read = csvt_rtt_test_read,
+};
+
/* MODEM RESET RPC TEST */
static ssize_t modem_reset_rpc_test_write(struct file *file,
const char __user *buf,
@@ -1768,6 +1915,7 @@
set_params_loopback_9k_close(ch_arr[SDIO_QMI]);
set_params_loopback_9k_close(ch_arr[SDIO_RMNT]);
set_params_loopback_9k_close(ch_arr[SDIO_DUN]);
+ set_params_loopback_9k_close(ch_arr[SDIO_CSVT]);
ret = test_start();
@@ -1803,7 +1951,8 @@
"following sequence: Send a random burst of packets on "
"Diag, CIQ and Rmnet channels, read 0 or a random number "
"of packets, close and re-open the channel. At the end of the "
- "test, the channel is verified by running a loopback test\n");
+ "test, the channel is verified by running a loopback test\n\n"
+ "END OF DESCRIPTION\n");
if (message_repeat == 1) {
message_repeat = 0;
@@ -1873,7 +2022,8 @@
"In this test the host sends 5k packets to the modem in the "
"following sequence: Send a random burst of packets on "
"DUN and Rmnet channels, read 0 or a random number "
- "of packets, close and re-open the channel.\n");
+ "of packets, close and re-open the channel.\n\n"
+ "END OF DESCRIPTION\n");
if (message_repeat == 1) {
message_repeat = 0;
@@ -2345,6 +2495,13 @@
NULL,
&dun_a2_perf_test_ops);
+ test_ctx->debug.csvt_a2_perf_test =
+ debugfs_create_file("71_csvt_a2_perf_test",
+ S_IRUGO | S_IWUGO,
+ test_ctx->debug.debug_root,
+ NULL,
+ &csvt_a2_perf_test_ops);
+
test_ctx->debug.rmnet_dun_a2_perf_test =
debugfs_create_file("70_rmnet_dun_a2_perf_test",
S_IRUGO | S_IWUGO,
@@ -2408,6 +2565,13 @@
NULL,
&rmnet_rtt_test_ops);
+ test_ctx->debug.csvt_rtt_test =
+ debugfs_create_file("191_csvt_rtt_test",
+ S_IRUGO | S_IWUGO,
+ test_ctx->debug.debug_root,
+ NULL,
+ &csvt_rtt_test_ops);
+
test_ctx->debug.modem_reset_rpc_test =
debugfs_create_file("220_modem_reset_rpc_test",
S_IRUGO | S_IWUGO,
@@ -2535,6 +2699,9 @@
else if (!strncmp(name, "SDIO_CIQ_TEST",
strnlen("SDIO_CIQ_TEST", TEST_CH_NAME_SIZE)))
return SDIO_CIQ;
+ else if (!strncmp(name, "SDIO_CSVT_TEST",
+ strnlen("SDIO_CSVT_TEST", TEST_CH_NAME_SIZE)))
+ return SDIO_CSVT;
else
return SDIO_MAX_CHANNELS;
@@ -4095,10 +4262,17 @@
total_bytes , (int) time_msec, test_ch->name);
if (!test_ch->random_packet_size) {
- throughput = (total_bytes / time_msec) * 8 / 1000;
- pr_err(TEST_MODULE_NAME ":Performance = %d Mbit/sec for "
- "chan %s\n",
- throughput, test_ch->name);
+ if (time_msec) {
+ throughput = (total_bytes / time_msec) * 8 / 1000;
+ pr_err(TEST_MODULE_NAME ": %s - Performance = "
+ "%d Mbit/sec for chan %s\n",
+ __func__, throughput, test_ch->name);
+ } else {
+ pr_err(TEST_MODULE_NAME ": %s - time_msec = 0 Couldn't "
+ "calculate performence for chan %s\n",
+ __func__, test_ch->name);
+ }
+
}
#ifdef CONFIG_DEBUG_FS
@@ -4199,10 +4373,10 @@
u32 write_avail = 0;
int tx_packet_count = 0;
int rx_packet_count = 0;
- u16 *buf16 = (u16 *) test_ch->buf;
+ u16 *buf16 = NULL;
int i;
- int max_packets = test_ch->config_msg.num_packets;
- u32 packet_size = test_ch->packet_length;
+ int max_packets = 0;
+ u32 packet_size = 0;
s64 start_time, end_time;
int delta_usec = 0;
int time_average = 0;
@@ -4210,6 +4384,24 @@
int max_delta_usec = 0;
int total_time = 0;
int expected_read_size = 0;
+ int delay_ms = 0;
+ int slow_rtt_counter = 0;
+ int read_avail_so_far = 0;
+
+ if (test_ch) {
+ /*
+ * Cleanup the pending RX data (such as loopback of the
+ * config msg)
+ */
+ rx_cleanup(test_ch, &rx_packet_count);
+ rx_packet_count = 0;
+ } else {
+ return;
+ }
+
+ max_packets = test_ch->config_msg.num_packets;
+ packet_size = test_ch->packet_length;
+ buf16 = (u16 *) test_ch->buf;
for (i = 0; i < packet_size / 2; i++)
buf16[i] = (u16) (i & 0xFFFF);
@@ -4217,9 +4409,18 @@
pr_info(TEST_MODULE_NAME ": A2 RTT TEST START for chan %s\n",
test_ch->name);
- /* Cleanup the pending RX data (such as loopback of te config msg) */
- rx_cleanup(test_ch, &rx_packet_count);
- rx_packet_count = 0;
+ switch (test_ch->ch_id) {
+ case SDIO_RMNT:
+ delay_ms = 100;
+ break;
+ case SDIO_CSVT:
+ delay_ms = 0;
+ break;
+ default:
+ pr_err(TEST_MODULE_NAME ": %s - ch_id invalid.\n",
+ __func__);
+ return;
+ }
while (tx_packet_count < max_packets) {
if (test_ctx->exit_flag) {
@@ -4228,11 +4429,10 @@
}
start_time = 0;
end_time = 0;
+ read_avail_so_far = 0;
- /* Allow sdio_al to go to sleep to change the read_threshold
- * to 1
- */
- msleep(100);
+ if (delay_ms)
+ msleep(delay_ms);
/* wait for data ready event */
write_avail = sdio_write_avail(test_ch->ch);
@@ -4272,38 +4472,53 @@
expected_read_size = packet_size + A2_HEADER_OVERHEAD;
- read_avail = sdio_read_avail(test_ch->ch);
- TEST_DBG(TEST_MODULE_NAME ":channel %s, read_avail=%d\n",
- test_ch->name, read_avail);
- while (read_avail < expected_read_size) {
- wait_event(test_ch->wait_q,
- atomic_read(&test_ch->rx_notify_count));
- atomic_dec(&test_ch->rx_notify_count);
- read_avail = sdio_read_avail(test_ch->ch);
- }
+ while (read_avail_so_far < expected_read_size) {
- if (read_avail >= expected_read_size) {
- pr_debug(TEST_MODULE_NAME ":read_avail=%d for ch %s.\n",
- read_avail, test_ch->name);
+ read_avail = sdio_read_avail(test_ch->ch);
+
+ if (!read_avail) {
+ wait_event(test_ch->wait_q,
+ atomic_read(&test_ch->
+ rx_notify_count));
+
+ atomic_dec(&test_ch->rx_notify_count);
+ continue;
+ }
+
+ read_avail_so_far += read_avail;
+
+ if (read_avail_so_far > expected_read_size) {
+ pr_err(TEST_MODULE_NAME ": %s - Invalid "
+ "read_avail(%d) read_avail_so_far(%d) "
+ "can't be larger than "
+ "expected_read_size(%d).",
+ __func__,
+ read_avail,
+ read_avail_so_far,
+ expected_read_size);
+ goto exit_err;
+ }
+
+ /*
+ * must read entire pending bytes, so later, we will
+ * get a notification when more data arrives
+ */
ret = sdio_read(test_ch->ch, test_ch->buf,
- expected_read_size);
+ read_avail);
+
if (ret) {
pr_info(TEST_MODULE_NAME ": sdio_read size %d "
" err=%d for chan %s\n",
- expected_read_size, -ret,
+ read_avail, -ret,
test_ch->name);
goto exit_err;
}
- end_time = ktime_to_us(ktime_get());
- rx_packet_count++;
- test_ch->rx_bytes += expected_read_size;
- } else {
- pr_info(TEST_MODULE_NAME ": Invalid read_avail "
- "%d for chan %s\n",
- read_avail, test_ch->name);
- goto exit_err;
}
+ end_time = ktime_to_us(ktime_get());
+ rx_packet_count++;
+ test_ch->rx_bytes += expected_read_size;
+
delta_usec = (int)(end_time - start_time);
total_time += delta_usec;
if (delta_usec < min_delta_usec)
@@ -4311,24 +4526,47 @@
if (delta_usec > max_delta_usec)
max_delta_usec = delta_usec;
+ /* checking the RTT per channel criteria */
+ if (delta_usec > MAX_AVG_RTT_TIME_USEC) {
+ pr_err(TEST_MODULE_NAME ": %s - "
+ "msg # %d - rtt time (%d usec) is "
+ "longer than %d usec\n",
+ __func__,
+ tx_packet_count,
+ delta_usec,
+ MAX_AVG_RTT_TIME_USEC);
+ slow_rtt_counter++;
+ }
+
TEST_DBG(TEST_MODULE_NAME
":RTT time=%d for packet #%d for chan %s\n",
delta_usec, tx_packet_count, test_ch->name);
-
} /* while (tx_packet_count < max_packets ) */
+ pr_info(TEST_MODULE_NAME ": %s - tx_packet_count = %d\n",
+ __func__, tx_packet_count);
- pr_info(TEST_MODULE_NAME ":total rx bytes = 0x%x , rx_packet#=%d for"
- " chan %s.\n",
- test_ch->rx_bytes, rx_packet_count, test_ch->name);
- pr_info(TEST_MODULE_NAME ":total tx bytes = 0x%x , tx_packet#=%d"
- " for chan %s.\n",
- test_ch->tx_bytes, tx_packet_count, test_ch->name);
+ pr_info(TEST_MODULE_NAME ": %s - total rx bytes = 0x%x, "
+ "rx_packet# = %d for chan %s.\n",
+ __func__, test_ch->rx_bytes, rx_packet_count, test_ch->name);
- time_average = total_time / tx_packet_count;
+ pr_info(TEST_MODULE_NAME ": %s - total tx bytes = 0x%x, "
+ "tx_packet# = %d for chan %s.\n",
+ __func__, test_ch->tx_bytes, tx_packet_count, test_ch->name);
- pr_info(TEST_MODULE_NAME ":Average RTT time = %d for chan %s\n",
+ pr_info(TEST_MODULE_NAME ": %s - slow_rtt_counter = %d for "
+ "chan %s.\n",
+ __func__, slow_rtt_counter, test_ch->name);
+
+ if (tx_packet_count) {
+ time_average = total_time / tx_packet_count;
+ pr_info(TEST_MODULE_NAME ":Average RTT time = %d for chan %s\n",
time_average, test_ch->name);
+ } else {
+ pr_err(TEST_MODULE_NAME ": %s - tx_packet_count=0. couldn't "
+ "calculate average rtt time", __func__);
+ }
+
pr_info(TEST_MODULE_NAME ":MIN RTT time = %d for chan %s\n",
min_delta_usec, test_ch->name);
pr_info(TEST_MODULE_NAME ":MAX RTT time = %d for chan %s\n",
@@ -4337,6 +4575,17 @@
pr_info(TEST_MODULE_NAME ": A2 RTT TEST END for chan %s.\n",
test_ch->name);
+ if (ret)
+ goto exit_err;
+
+ if (time_average == 0 || time_average > MAX_AVG_RTT_TIME_USEC) {
+ pr_err(TEST_MODULE_NAME ": %s - average_time = %d. Invalid "
+ "value",
+ __func__, time_average);
+ goto exit_err;
+
+ }
+
pr_info(TEST_MODULE_NAME ": TEST PASS for chan %s\n", test_ch->name);
test_ch->test_completed = 1;
test_ch->test_result = TEST_PASSED;
@@ -4351,7 +4600,6 @@
return;
}
-
/**
* Process Rx Data - Helper for A2 Validation Test
* @test_ch(in/out) : Test channel that contains Rx data buffer to process.
@@ -5599,11 +5847,22 @@
tch->test_type = SDIO_TEST_PERF;
tch->config_msg.signature = TEST_CONFIG_SIGNATURE;
tch->config_msg.test_case = SDIO_TEST_LOOPBACK_CLIENT;
- tch->packet_length = MAX_XFER_SIZE;
- if (tch->ch_id == SDIO_DIAG)
+
+ switch (tch->ch_id) {
+ case SDIO_DIAG:
tch->packet_length = 512;
- else if (tch->ch_id == SDIO_DUN)
- tch->packet_length = DUN_PACKET_SIZE;
+ break;
+ case SDIO_DUN:
+ tch->packet_length = DUN_PACKET_SIZE;
+ break;
+ case SDIO_CSVT:
+ tch->packet_length = CSVT_PACKET_SIZE;
+ break;
+ default:
+ tch->packet_length = MAX_XFER_SIZE;
+ break;
+ }
+
pr_info(TEST_MODULE_NAME ": %s: packet_length=%d", __func__,
tch->packet_length);
@@ -5626,7 +5885,21 @@
tch->test_type = SDIO_TEST_RTT;
tch->config_msg.signature = TEST_CONFIG_SIGNATURE;
tch->config_msg.test_case = SDIO_TEST_LOOPBACK_CLIENT;
- tch->packet_length = 32;
+
+ switch (tch->ch_id) {
+ case SDIO_RMNT:
+ tch->packet_length = SDIO_RMNT_RTT_PACKET_SIZE;
+ break;
+ case SDIO_CSVT:
+ tch->packet_length = SDIO_CSVT_RTT_PACKET_SIZE;
+ break;
+ default:
+ pr_err(TEST_MODULE_NAME ": %s - ch_id invalid.\n", __func__);
+ return -EINVAL;
+ }
+
+ pr_info(TEST_MODULE_NAME ": %s: packet_length=%d", __func__,
+ tch->packet_length);
tch->config_msg.num_packets = 200;
tch->config_msg.num_iterations = 1;
@@ -5816,6 +6089,12 @@
struct test_channel *tch = NULL;
tch = test_ctx->test_ch_arr[channel_num];
+ if (!tch) {
+ pr_info(TEST_MODULE_NAME ":%s ch#%d is NULL\n",
+ __func__, channel_num);
+ return 0;
+ }
+
ret = open_sdio_ch(tch);
if (ret) {
pr_err(TEST_MODULE_NAME":%s open channel %s"
@@ -6108,6 +6387,15 @@
},
};
+static struct platform_driver sdio_csvt_drv = {
+ .probe = sdio_test_channel_probe,
+ .remove = sdio_test_channel_remove,
+ .driver = {
+ .name = "SDIO_CSVT_TEST",
+ .owner = THIS_MODULE,
+ },
+};
+
static struct class *test_class;
const struct file_operations test_fops = {
@@ -6177,6 +6465,7 @@
platform_driver_register(&sdio_rmnt_drv);
platform_driver_register(&sdio_dun_drv);
platform_driver_register(&sdio_ciq_drv);
+ platform_driver_register(&sdio_csvt_drv);
return ret;
}
@@ -6205,6 +6494,7 @@
platform_driver_unregister(&sdio_rmnt_drv);
platform_driver_unregister(&sdio_dun_drv);
platform_driver_unregister(&sdio_ciq_drv);
+ platform_driver_unregister(&sdio_csvt_drv);
for (i = 0; i < SDIO_MAX_CHANNELS; i++) {
struct test_channel *tch = test_ctx->test_ch_arr[i];
diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
index 94dd8b8..eeaab60 100644
--- a/arch/arm/mach-msm/smd.c
+++ b/arch/arm/mach-msm/smd.c
@@ -172,7 +172,8 @@
#define MSM_TRIG_A2DSPS_SMSM_INT
#define MSM_TRIG_A2WCNSS_SMD_INT
#define MSM_TRIG_A2WCNSS_SMSM_INT
-#elif defined(CONFIG_ARCH_MSM8960)
+#elif defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_MSM8930) || \
+ defined(CONFIG_ARCH_APQ8064)
#define MSM_TRIG_A2M_SMD_INT \
(smd_write_intr(1 << 3, MSM_APCS_GCC_BASE + 0x8))
#define MSM_TRIG_A2Q6_SMD_INT \
@@ -202,23 +203,6 @@
#define MSM_TRIG_A2DSPS_SMSM_INT
#define MSM_TRIG_A2WCNSS_SMD_INT
#define MSM_TRIG_A2WCNSS_SMSM_INT
-#elif defined(CONFIG_ARCH_APQ8064)
-#define MSM_TRIG_A2M_SMD_INT \
- (smd_write_intr(1 << 3, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2Q6_SMD_INT \
- (smd_write_intr(1 << 15, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2M_SMSM_INT \
- (smd_write_intr(1 << 4, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2Q6_SMSM_INT \
- (smd_write_intr(1 << 14, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2DSPS_SMD_INT \
- (smd_write_intr(1, MSM_SIC_NON_SECURE_BASE + 0x4080))
-#define MSM_TRIG_A2DSPS_SMSM_INT \
- (smd_write_intr(1, MSM_SIC_NON_SECURE_BASE + 0x4094))
-#define MSM_TRIG_A2WCNSS_SMD_INT \
- (smd_write_intr(1 << 25, MSM_APCS_GCC_BASE + 0x8))
-#define MSM_TRIG_A2WCNSS_SMSM_INT \
- (smd_write_intr(1 << 23, MSM_APCS_GCC_BASE + 0x8))
#elif defined(CONFIG_ARCH_FSM9XXX)
#define MSM_TRIG_A2Q6_SMD_INT \
(smd_write_intr(1 << 10, MSM_GCC_BASE + 0x8))
@@ -277,8 +261,10 @@
* trigger GPIO 40 to wake up RIVA from power collaspe
* not to be sent to customers
*/
- __raw_writel(0x0, MSM_TLMM_BASE + 0x1284);
- __raw_writel(0x2, MSM_TLMM_BASE + 0x1284);
+ if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 1) {
+ __raw_writel(0x0, MSM_TLMM_BASE + 0x1284);
+ __raw_writel(0x2, MSM_TLMM_BASE + 0x1284);
+ }
/* end workaround */
}
#else
@@ -297,17 +283,15 @@
if (smsm_info.intr_mask &&
(__raw_readl(SMSM_INTR_MASK_ADDR(smsm_entry, SMSM_Q6))
& notify_mask)) {
-#if !defined(CONFIG_ARCH_MSM8X60) && !defined(MCONFIG_ARCH_MSM8960)
uint32_t mux_val;
- if (smsm_info.intr_mux) {
+ if (cpu_is_qsd8x50() && smsm_info.intr_mux) {
mux_val = __raw_readl(
SMSM_INTR_MUX_ADDR(SMEM_APPS_Q6_SMSM));
mux_val++;
__raw_writel(mux_val,
SMSM_INTR_MUX_ADDR(SMEM_APPS_Q6_SMSM));
}
-#endif
MSM_TRIG_A2Q6_SMSM_INT;
}
@@ -1269,6 +1253,7 @@
return r;
}
+#if (defined(CONFIG_MSM_SMD_PKG4) || defined(CONFIG_MSM_SMD_PKG3))
static int smd_alloc_v2(struct smd_channel *ch)
{
struct smd_shared_v2 *shared2;
@@ -1278,18 +1263,19 @@
shared2 = smem_alloc(SMEM_SMD_BASE_ID + ch->n, sizeof(*shared2));
if (!shared2) {
SMD_INFO("smem_alloc failed ch=%d\n", ch->n);
- return -1;
+ return -EINVAL;
}
buffer = smem_get_entry(SMEM_SMD_FIFO_BASE_ID + ch->n, &buffer_sz);
if (!buffer) {
- SMD_INFO("smem_get_entry failed \n");
- return -1;
+ SMD_INFO("smem_get_entry failed\n");
+ return -EINVAL;
}
/* buffer must be a power-of-two size */
- if (buffer_sz & (buffer_sz - 1))
- return -1;
-
+ if (buffer_sz & (buffer_sz - 1)) {
+ SMD_INFO("Buffer size: %u not power of two\n", buffer_sz);
+ return -EINVAL;
+ }
buffer_sz /= 2;
ch->send = &shared2->ch0;
ch->recv = &shared2->ch1;
@@ -1301,11 +1287,22 @@
static int smd_alloc_v1(struct smd_channel *ch)
{
+ return -EINVAL;
+}
+
+#else /* define v1 for older targets */
+static int smd_alloc_v2(struct smd_channel *ch)
+{
+ return -EINVAL;
+}
+
+static int smd_alloc_v1(struct smd_channel *ch)
+{
struct smd_shared_v1 *shared1;
shared1 = smem_alloc(ID_SMD_CHANNELS + ch->n, sizeof(*shared1));
if (!shared1) {
pr_err("smd_alloc_channel() cid %d does not exist\n", ch->n);
- return -1;
+ return -EINVAL;
}
ch->send = &shared1->ch0;
ch->recv = &shared1->ch1;
@@ -1315,6 +1312,8 @@
return 0;
}
+#endif
+
static int smd_alloc_channel(struct smd_alloc_elm *alloc_elm)
{
struct smd_channel *ch;
@@ -2026,23 +2025,20 @@
{
unsigned long flags;
-#if !defined(CONFIG_ARCH_MSM8X60)
- uint32_t mux_val;
- static uint32_t prev_smem_q6_apps_smsm;
-
if (irq == INT_ADSP_A11_SMSM) {
- if (!smsm_info.intr_mux)
- return IRQ_HANDLED;
- mux_val = __raw_readl(SMSM_INTR_MUX_ADDR(SMEM_Q6_APPS_SMSM));
- if (mux_val != prev_smem_q6_apps_smsm)
- prev_smem_q6_apps_smsm = mux_val;
+ uint32_t mux_val;
+ static uint32_t prev_smem_q6_apps_smsm;
+
+ if (smsm_info.intr_mux && cpu_is_qsd8x50()) {
+ mux_val = __raw_readl(
+ SMSM_INTR_MUX_ADDR(SMEM_Q6_APPS_SMSM));
+ if (mux_val != prev_smem_q6_apps_smsm)
+ prev_smem_q6_apps_smsm = mux_val;
+ }
+
+ schedule_work(&smsm_cb_work);
return IRQ_HANDLED;
}
-#else
- if (irq == INT_ADSP_A11_SMSM)
- return IRQ_HANDLED;
-#endif
-
spin_lock_irqsave(&smem_lock, flags);
if (!smsm_info.state) {
@@ -2058,7 +2054,7 @@
/* If we get an interrupt and the apps SMSM_RESET
bit is already set, the modem is acking the
app's reset ack. */
- if (!cpu_is_msm8960())
+ if (!cpu_is_msm8960() && !cpu_is_msm8930())
apps &= ~SMSM_RESET;
/* Issue a fake irq to handle any
* smd state changes during reset
@@ -2069,7 +2065,7 @@
modem_queue_start_reset_notify();
} else if (modm & SMSM_RESET) {
- if (!cpu_is_msm8960())
+ if (!cpu_is_msm8960() && !cpu_is_msm8930())
apps |= SMSM_RESET;
pr_err("\nSMSM: Modem SMSM state changed to SMSM_RESET.");
@@ -2533,6 +2529,8 @@
smd_initialized = 1;
smd_alloc_loopback_channel();
+ smsm_irq_handler(0, 0);
+ tasklet_schedule(&smd_fake_irq_tasklet);
return 0;
}
diff --git a/arch/arm/mach-msm/smd_rpcrouter.c b/arch/arm/mach-msm/smd_rpcrouter.c
index 93fa244..983d0c1 100644
--- a/arch/arm/mach-msm/smd_rpcrouter.c
+++ b/arch/arm/mach-msm/smd_rpcrouter.c
@@ -2126,17 +2126,27 @@
int msm_rpcrouter_close(void)
{
- struct rpcrouter_xprt_info *xprt_info, *tmp_xprt_info;
+ struct rpcrouter_xprt_info *xprt_info;
union rr_control_msg ctl;
ctl.cmd = RPCROUTER_CTRL_CMD_BYE;
mutex_lock(&xprt_info_list_lock);
- list_for_each_entry_safe(xprt_info, tmp_xprt_info,
- &xprt_info_list, list) {
+ while (!list_empty(&xprt_info_list)) {
+ xprt_info = list_first_entry(&xprt_info_list,
+ struct rpcrouter_xprt_info, list);
+ xprt_info->abort_data_read = 1;
+ wake_up(&xprt_info->read_wait);
rpcrouter_send_control_msg(xprt_info, &ctl);
xprt_info->xprt->close();
list_del(&xprt_info->list);
+ mutex_unlock(&xprt_info_list_lock);
+
+ flush_workqueue(xprt_info->workqueue);
+ destroy_workqueue(xprt_info->workqueue);
+ wake_lock_destroy(&xprt_info->wakelock);
kfree(xprt_info);
+
+ mutex_lock(&xprt_info_list_lock);
}
mutex_unlock(&xprt_info_list_lock);
return 0;
diff --git a/arch/arm/mach-msm/socinfo.c b/arch/arm/mach-msm/socinfo.c
index 33cfccc..9df1a68 100644
--- a/arch/arm/mach-msm/socinfo.c
+++ b/arch/arm/mach-msm/socinfo.c
@@ -210,9 +210,12 @@
[104] = MSM_CPU_9615,
[105] = MSM_CPU_9615,
- /* 8064 IDs*/
+ /* 8064 IDs */
[109] = MSM_CPU_8064,
+ /* 8930 IDs */
+ [116] = MSM_CPU_8930,
+
/* Uninitialized IDs are not known to run Linux.
MSM_CPU_UNKNOWN is set to 0 to ensure these IDs are
considered as unknown CPU. */
@@ -700,9 +703,12 @@
const int read_msm_cpu_type(void)
{
- if (machine_is_msm8960_sim())
+ if (machine_is_msm8960_sim() || machine_is_msm8960_rumi3())
return MSM_CPU_8960;
+ if (socinfo_get_msm_cpu() != MSM_CPU_UNKNOWN)
+ return socinfo_get_msm_cpu();
+
switch (read_cpuid_id()) {
case 0x510F02D0:
case 0x510F02D2:
@@ -712,13 +718,12 @@
case 0x510F04D0:
case 0x510F04D1:
case 0x510F04D2:
+ case 0x511F04D0:
+ case 0x512F04D0:
return MSM_CPU_8960;
- case 0x511F04D0:
- if (get_core_count() == 2)
- return MSM_CPU_8960;
- else
- return MSM_CPU_8X30;
+ case 0x51404D11: /* We can't get here unless we are in bringup */
+ return MSM_CPU_8930;
case 0x510F06F0:
return MSM_CPU_8064;
diff --git a/arch/arm/mach-msm/subsystem_restart.c b/arch/arm/mach-msm/subsystem_restart.c
index b862ad4..ff699e2 100644
--- a/arch/arm/mach-msm/subsystem_restart.c
+++ b/arch/arm/mach-msm/subsystem_restart.c
@@ -569,7 +569,7 @@
n_restart_orders = ARRAY_SIZE(orders_8x60_all);
}
- if (cpu_is_msm8960()) {
+ if (cpu_is_msm8960() || cpu_is_msm8930()) {
restart_orders = restart_orders_8960;
n_restart_orders = ARRAY_SIZE(restart_orders_8960);
}
diff --git a/arch/arm/mach-msm/sysmon.h b/arch/arm/mach-msm/sysmon.h
index 5fb75bc..429a155 100644
--- a/arch/arm/mach-msm/sysmon.h
+++ b/arch/arm/mach-msm/sysmon.h
@@ -17,6 +17,9 @@
#include <mach/subsystem_notif.h>
+/**
+ * enum subsys_id - Destination subsystems for events.
+ */
enum subsys_id {
SYSMON_SS_MODEM,
SYSMON_SS_LPASS,
@@ -26,6 +29,20 @@
SYSMON_NUM_SS
};
+
+/**
+ * sysmon_send_event() - Notify a subsystem of another's state change.
+ * @dest_ss: ID of subsystem the notification should be sent to.
+ * @event_ss: String name of the subsystem that generated the notification.
+ * @notif: ID of the notification type (ex. SUBSYS_BEFORE_SHUTDOWN)
+ *
+ * Returns 0 for success, -EINVAL for invalid destination or notification IDs,
+ * -ENODEV if the SMD channel is not open, -ETIMEDOUT if the destination
+ * subsystem does not respond, and -ENOSYS if the destination subsystem
+ * responds, but with something other than an acknowledgement.
+ *
+ * If CONFIG_MSM_SYSMON_COMM is not defined, always return success (0).
+ */
#ifdef CONFIG_MSM_SYSMON_COMM
int sysmon_send_event(enum subsys_id dest_ss, const char *event_ss,
enum subsys_notif_type notif);
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 8e4d98c..1df3c23 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -27,6 +27,7 @@
#include <asm/mach/time.h>
#include <asm/hardware/gic.h>
#include <asm/sched_clock.h>
+#include <asm/smp_plat.h>
#include <mach/msm_iomap.h>
#include <mach/irqs.h>
#include <mach/socinfo.h>
@@ -42,29 +43,13 @@
static int msm_timer_debug_mask;
module_param_named(debug_mask, msm_timer_debug_mask, int, S_IRUGO | S_IWUSR | S_IWGRP);
-#if defined(CONFIG_ARCH_MSM7X30) || defined(CONFIG_ARCH_MSM8X60) || \
- defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_FSM9XXX) || \
- defined(CONFIG_ARCH_APQ8064) || defined(CONFIG_ARCH_MSM9615)
-#define MSM_GPT_BASE (MSM_TMR_BASE + 0x4)
-#define MSM_DGT_BASE (MSM_TMR_BASE + 0x24)
-#else
-#define MSM_GPT_BASE MSM_TMR_BASE
-#define MSM_DGT_BASE (MSM_TMR_BASE + 0x10)
-#endif
-
#ifdef CONFIG_MSM7X00A_USE_GP_TIMER
#define DG_TIMER_RATING 100
- #define MSM_GLOBAL_TIMER MSM_CLOCK_GPT
#else
#define DG_TIMER_RATING 300
- #define MSM_GLOBAL_TIMER MSM_CLOCK_DGT
#endif
-#if defined(CONFIG_CPU_V6) || defined(CONFIG_ARCH_MSM7X27A)
#define MSM_DGT_SHIFT (5)
-#else
-#define MSM_DGT_SHIFT (0)
-#endif
#define TIMER_MATCH_VAL 0x0000
#define TIMER_COUNT_VAL 0x0004
@@ -88,43 +73,14 @@
* access to come from the CPU0 region.
*/
static int global_timer_offset;
-
-#if defined(CONFIG_MSM_DIRECT_SCLK_ACCESS)
-#define MPM_SCLK_COUNT_VAL 0x0024
-#endif
+static int msm_global_timer;
#define NR_TIMERS ARRAY_SIZE(msm_clocks)
-#if defined(CONFIG_ARCH_QSD8X50) || defined(CONFIG_ARCH_FSM9XXX)
-#define DGT_HZ 4800000 /* Uses TCXO/4 (19.2 MHz / 4) */
-#elif defined(CONFIG_ARCH_MSM7X30)
-#define DGT_HZ 6144000 /* Uses LPXO/4 (24.576 MHz / 4) */
-#elif defined(CONFIG_ARCH_MSM8X60) || defined(CONFIG_ARCH_MSM8960) || \
- defined(CONFIG_ARCH_APQ8064) || defined(CONFIG_ARCH_MSM9615)
-/* Uses PXO/4 (24.576 MHz / 4) on V1, (27 MHz / 4) on V2 */
-#define DGT_HZ 6750000
-#else
-#define DGT_HZ 19200000 /* Uses TCXO (19.2 MHz) */
-#endif
+unsigned int gpt_hz = 32768;
+unsigned int sclk_hz = 32768;
-#define GPT_HZ 32768
-#define SCLK_HZ 32768
-
-#if defined(CONFIG_MSM_N_WAY_SMSM)
-/* Time Master State Bits */
-#define MASTER_BITS_PER_CPU 1
-#define MASTER_TIME_PENDING \
- (0x01UL << (MASTER_BITS_PER_CPU * SMSM_APPS_STATE))
-
-/* Time Slave State Bits */
-#define SLAVE_TIME_REQUEST 0x0400
-#define SLAVE_TIME_POLL 0x0800
-#define SLAVE_TIME_INIT 0x1000
-#endif
-
-#ifdef CONFIG_SMP
static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt);
-#endif
static irqreturn_t msm_timer_interrupt(int irq, void *dev_id);
static cycle_t msm_gpt_read(struct clocksource *cs);
static cycle_t msm_dgt_read(struct clocksource *cs);
@@ -203,8 +159,8 @@
.dev_id = &msm_clocks[0].clockevent,
.irq = INT_GP_TIMER_EXP
},
- .regbase = MSM_GPT_BASE,
- .freq = GPT_HZ,
+ .regbase = MSM_TMR_BASE + 0x4,
+ .freq = 32768,
.index = MSM_CLOCK_GPT,
.flags =
#if defined(CONFIG_CPU_V6) || defined(CONFIG_ARCH_MSM7X27A)
@@ -219,7 +175,7 @@
.clockevent = {
.name = "dg_timer",
.features = CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32 + MSM_DGT_SHIFT,
+ .shift = 32,
.rating = DG_TIMER_RATING,
.set_next_event = msm_timer_set_next_event,
.set_mode = msm_timer_set_mode,
@@ -228,8 +184,8 @@
.name = "dg_timer",
.rating = DG_TIMER_RATING,
.read = msm_dgt_read,
- .mask = CLOCKSOURCE_MASK((32-MSM_DGT_SHIFT)),
- .shift = 24 - MSM_DGT_SHIFT,
+ .mask = CLOCKSOURCE_MASK(32),
+ .shift = 24,
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
},
.irq = {
@@ -240,10 +196,8 @@
.dev_id = &msm_clocks[1].clockevent,
.irq = INT_DEBUG_TIMER_EXP
},
- .regbase = MSM_DGT_BASE,
- .freq = DGT_HZ >> MSM_DGT_SHIFT,
+ .regbase = MSM_TMR_BASE + 0x24,
.index = MSM_CLOCK_DGT,
- .shift = MSM_DGT_SHIFT,
.write_delay = 9,
}
};
@@ -317,22 +271,24 @@
&per_cpu(msm_clocks_percpu, 0)[MSM_CLOCK_DGT];
if (clock_state->stopped)
- return clock_state->stopped_tick >> MSM_DGT_SHIFT;
+ return clock_state->stopped_tick >> clock->shift;
return (msm_read_timer_count(clock, GLOBAL_TIMER) +
- clock_state->sleep_offset) >> MSM_DGT_SHIFT;
+ clock_state->sleep_offset) >> clock->shift;
}
-#ifdef CONFIG_SMP
static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt)
{
int i;
+
+ if (!is_smp())
+ return container_of(evt, struct msm_clock, clockevent);
+
for (i = 0; i < NR_TIMERS; i++)
if (evt == &(msm_clocks[i].clockevent))
return &msm_clocks[i];
- return &msm_clocks[MSM_GLOBAL_TIMER];
+ return &msm_clocks[msm_global_timer];
}
-#endif
static int msm_timer_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
@@ -344,11 +300,7 @@
uint32_t alarm;
int late;
-#ifdef CONFIG_SMP
clock = clockevent_to_clock(evt);
-#else
- clock = container_of(evt, struct msm_clock, clockevent);
-#endif
clock_state = &__get_cpu_var(msm_clocks_percpu)[clock->index];
if (clock_state->stopped)
return 0;
@@ -384,12 +336,9 @@
struct msm_clock *clock;
struct msm_clock_percpu_data *clock_state, *gpt_state;
unsigned long irq_flags;
+ struct irq_chip *chip;
-#ifdef CONFIG_SMP
clock = clockevent_to_clock(evt);
-#else
- clock = container_of(evt, struct msm_clock, clockevent);
-#endif
clock_state = &__get_cpu_var(msm_clocks_percpu)[clock->index];
gpt_state = &__get_cpu_var(msm_clocks_percpu)[MSM_CLOCK_GPT];
@@ -407,11 +356,9 @@
get_cpu_var(msm_active_clock) = clock;
put_cpu_var(msm_active_clock);
__raw_writel(TIMER_ENABLE_EN, clock->regbase + TIMER_ENABLE);
- if (irq_get_chip(clock->irq.irq) &&
- irq_get_chip(clock->irq.irq)->irq_unmask) {
- irq_get_chip(clock->irq.irq)->irq_unmask(
- irq_get_irq_data(clock->irq.irq));
- }
+ chip = irq_get_chip(clock->irq.irq);
+ if (chip && chip->irq_unmask)
+ chip->irq_unmask(irq_get_irq_data(clock->irq.irq));
if (clock != &msm_clocks[MSM_CLOCK_GPT])
__raw_writel(TIMER_ENABLE_EN,
msm_clocks[MSM_CLOCK_GPT].regbase +
@@ -427,15 +374,14 @@
msm_read_timer_count(clock, LOCAL_TIMER) +
clock_state->sleep_offset;
__raw_writel(0, clock->regbase + TIMER_MATCH_VAL);
- if (irq_get_chip(clock->irq.irq) &&
- irq_get_chip(clock->irq.irq)->irq_mask) {
- irq_get_chip(clock->irq.irq)->irq_mask(
- irq_get_irq_data(clock->irq.irq));
- }
-#ifdef CONFIG_MSM_SMP
- if (clock != &msm_clocks[MSM_CLOCK_DGT] || smp_processor_id())
-#endif
+ chip = irq_get_chip(clock->irq.irq);
+ if (chip && chip->irq_mask)
+ chip->irq_mask(irq_get_irq_data(clock->irq.irq));
+
+ if (!is_smp() || clock != &msm_clocks[MSM_CLOCK_DGT]
+ || smp_processor_id())
__raw_writel(0, clock->regbase + TIMER_ENABLE);
+
if (clock != &msm_clocks[MSM_CLOCK_GPT]) {
gpt_state->in_sync = 0;
__raw_writel(0, msm_clocks[MSM_CLOCK_GPT].regbase +
@@ -453,6 +399,8 @@
return MSM_TMR_BASE + global_timer_offset;
}
+#define MPM_SCLK_COUNT_VAL 0x0024
+
#ifdef CONFIG_PM
/*
* Retrieve the cycle count from sclk and optionally synchronize local clock
@@ -480,7 +428,9 @@
uint32_t t1, t2;
int loop_count = 10;
int loop_zero_count = 3;
- int tmp = USEC_PER_SEC/SCLK_HZ/(loop_zero_count-1);
+ int tmp = USEC_PER_SEC;
+ do_div(tmp, sclk_hz);
+ tmp /= (loop_zero_count-1);
while (loop_zero_count--) {
t1 = __raw_readl(MSM_RPM_MPM_BASE + MPM_SCLK_COUNT_VAL);
@@ -507,10 +457,21 @@
}
if (update != NULL)
- update(data, t1, SCLK_HZ);
+ update(data, t1, sclk_hz);
return t1;
}
#elif defined(CONFIG_MSM_N_WAY_SMSM)
+
+/* Time Master State Bits */
+#define MASTER_BITS_PER_CPU 1
+#define MASTER_TIME_PENDING \
+ (0x01UL << (MASTER_BITS_PER_CPU * SMSM_APPS_STATE))
+
+/* Time Slave State Bits */
+#define SLAVE_TIME_REQUEST 0x0400
+#define SLAVE_TIME_POLL 0x0800
+#define SLAVE_TIME_INIT 0x1000
+
static uint32_t msm_timer_do_sync_to_sclk(
void (*time_start)(struct msm_timer_sync_data_t *data),
bool (*time_expired)(struct msm_timer_sync_data_t *data),
@@ -567,7 +528,7 @@
if (smem_clock_val) {
if (update != NULL)
- update(data, smem_clock_val, SCLK_HZ);
+ update(data, smem_clock_val, sclk_hz);
if (msm_timer_debug_mask & MSM_TIMER_DEBUG_SYNC)
printk(KERN_INFO
@@ -641,7 +602,7 @@
if (smem_clock_val) {
if (update != NULL)
- update(data, smem_clock_val, SCLK_HZ);
+ update(data, smem_clock_val, sclk_hz);
} else {
printk(KERN_EMERG
"get_smem_clock: timeout state %x clock %u\n",
@@ -761,9 +722,11 @@
&__get_cpu_var(msm_clocks_percpu)[clock->index];
struct msm_timer_sync_data_t data;
uint32_t gpt_clk_val;
- u64 gpt_period = (1ULL << 32) * HZ / GPT_HZ;
+ u64 gpt_period = (1ULL << 32) * HZ;
u64 now = get_jiffies_64();
+ do_div(gpt_period, gpt_hz);
+
BUG_ON(clock == gpt_clk);
if (clock_state->in_sync &&
@@ -780,7 +743,7 @@
data.timeout = 0;
data.exit_sleep = exit_sleep;
- msm_timer_sync_update(&data, gpt_clk_val, GPT_HZ);
+ msm_timer_sync_update(&data, gpt_clk_val, gpt_hz);
clock_state->in_sync = 1;
clock_state->last_sync_gpt = gpt_clk_val;
@@ -937,12 +900,14 @@
if (period) {
tmp = 1LL << 32;
- tmp = tmp * NSEC_PER_SEC / SCLK_HZ;
+ tmp *= NSEC_PER_SEC;
+ do_div(tmp, sclk_hz);
*period = tmp;
}
tmp = (int64_t)clock_value;
- tmp = tmp * NSEC_PER_SEC / SCLK_HZ;
+ tmp *= NSEC_PER_SEC;
+ do_div(tmp, sclk_hz);
return tmp;
}
@@ -973,7 +938,7 @@
unsigned long long notrace sched_clock(void)
{
- struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER];
+ struct msm_clock *clock = &msm_clocks[msm_global_timer];
struct clocksource *cs = &clock->clocksource;
u32 cyc = cs->read(cs);
return cyc_to_sched_clock(&cd, cyc, ((u32)~0 >> clock->shift));
@@ -981,24 +946,22 @@
static void notrace msm_update_sched_clock(void)
{
- struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER];
+ struct msm_clock *clock = &msm_clocks[msm_global_timer];
struct clocksource *cs = &clock->clocksource;
u32 cyc = cs->read(cs);
update_sched_clock(&cd, cyc, ((u32)~0) >> clock->shift);
}
-#ifdef CONFIG_MSM_SMP
int read_current_timer(unsigned long *timer_val)
{
struct msm_clock *dgt = &msm_clocks[MSM_CLOCK_DGT];
*timer_val = msm_read_timer_count(dgt, GLOBAL_TIMER);
return 0;
}
-#endif
static void __init msm_sched_clock_init(void)
{
- struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER];
+ struct msm_clock *clock = &msm_clocks[msm_global_timer];
init_sched_clock(&cd, msm_update_sched_clock, 32 - clock->shift,
clock->freq);
@@ -1007,11 +970,48 @@
{
int i;
int res;
+ struct irq_chip *chip;
+ struct msm_clock *dgt = &msm_clocks[MSM_CLOCK_DGT];
+ struct msm_clock *gpt = &msm_clocks[MSM_CLOCK_GPT];
-#if defined(CONFIG_ARCH_MSM8X60) || defined(CONFIG_ARCH_MSM8960) || \
- defined(CONFIG_ARCH_APQ8064) || defined(CONFIG_ARCH_MSM9615)
- __raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
-#endif
+ if (cpu_is_msm7x01() || cpu_is_msm7x25() || cpu_is_msm7x27() ||
+ cpu_is_msm7x25a() || cpu_is_msm7x27a() || cpu_is_msm7x25aa() ||
+ cpu_is_msm7x27aa()) {
+ dgt->shift = MSM_DGT_SHIFT;
+ dgt->freq = 19200000 >> MSM_DGT_SHIFT;
+ dgt->clockevent.shift = 32 + MSM_DGT_SHIFT;
+ dgt->clocksource.mask = CLOCKSOURCE_MASK(32 - MSM_DGT_SHIFT);
+ dgt->clocksource.shift = 24 - MSM_DGT_SHIFT;
+ gpt->regbase = MSM_TMR_BASE;
+ dgt->regbase = MSM_TMR_BASE + 0x10;
+ } else if (cpu_is_qsd8x50()) {
+ dgt->freq = 4800000;
+ gpt->regbase = MSM_TMR_BASE;
+ dgt->regbase = MSM_TMR_BASE + 0x10;
+ } else if (cpu_is_fsm9xxx())
+ dgt->freq = 4800000;
+ else if (cpu_is_msm7x30() || cpu_is_msm8x55())
+ dgt->freq = 6144000;
+ else if (cpu_is_msm8x60()) {
+ dgt->freq = 6750000;
+ __raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
+ } else if (cpu_is_msm8960() || cpu_is_apq8064() || cpu_is_msm8930()
+ || cpu_is_msm9615()) {
+ dgt->freq = 6750000;
+ __raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
+ gpt->freq = 32765;
+ gpt_hz = 32765;
+ sclk_hz = 32765;
+ } else {
+ WARN_ON("Timer running on unknown hardware. Configure this! "
+ "Assuming default configuration.\n");
+ dgt->freq = 6750000;
+ }
+
+ if (msm_clocks[MSM_CLOCK_GPT].clocksource.rating > DG_TIMER_RATING)
+ msm_global_timer = MSM_CLOCK_GPT;
+ else
+ msm_global_timer = MSM_CLOCK_DGT;
for (i = 0; i < ARRAY_SIZE(msm_clocks); i++) {
struct msm_clock *clock = &msm_clocks[i];
@@ -1022,14 +1022,14 @@
__raw_writel(0, clock->regbase + TIMER_COUNT_VAL);
__raw_writel(~0, clock->regbase + TIMER_MATCH_VAL);
- if ((clock->freq << clock->shift) == GPT_HZ) {
+ if ((clock->freq << clock->shift) == gpt_hz) {
clock->rollover_offset = 0;
} else {
uint64_t temp;
temp = clock->freq << clock->shift;
temp <<= 32;
- temp /= GPT_HZ;
+ do_div(temp, gpt_hz);
clock->rollover_offset = (uint32_t) temp;
}
@@ -1054,16 +1054,19 @@
printk(KERN_ERR "msm_timer_init: setup_irq "
"failed for %s\n", cs->name);
- irq_get_chip(clock->irq.irq)->irq_mask(irq_get_irq_data(
- clock->irq.irq));
+ chip = irq_get_chip(clock->irq.irq);
+ if (chip && chip->irq_mask)
+ chip->irq_mask(irq_get_irq_data(clock->irq.irq));
clockevents_register_device(ce);
}
msm_sched_clock_init();
-#ifdef CONFIG_MSM_SMP
- __raw_writel(1, msm_clocks[MSM_CLOCK_DGT].regbase + TIMER_ENABLE);
- set_delay_fn(read_current_timer_delay_loop);
-#endif
+
+ if (is_smp()) {
+ __raw_writel(1,
+ msm_clocks[MSM_CLOCK_DGT].regbase + TIMER_ENABLE);
+ set_delay_fn(read_current_timer_delay_loop);
+ }
}
#ifdef CONFIG_SMP
@@ -1072,14 +1075,16 @@
{
unsigned long flags;
static DEFINE_PER_CPU(bool, first_boot) = true;
- struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER];
+ struct msm_clock *clock = &msm_clocks[msm_global_timer];
/* Use existing clock_event for cpu 0 */
if (!smp_processor_id())
return 0;
global_timer_offset = MSM_TMR0_BASE - MSM_TMR_BASE;
- __raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
+ if (cpu_is_msm8x60() || cpu_is_msm8960() || cpu_is_apq8064()
+ || cpu_is_msm8930())
+ __raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
if (__get_cpu_var(first_boot)) {
__raw_writel(0, clock->regbase + TIMER_ENABLE);
diff --git a/arch/arm/mach-msm/wcnss-ssr-8960.c b/arch/arm/mach-msm/wcnss-ssr-8960.c
index 954b925..2ef5c61 100644
--- a/arch/arm/mach-msm/wcnss-ssr-8960.c
+++ b/arch/arm/mach-msm/wcnss-ssr-8960.c
@@ -38,8 +38,7 @@
static void riva_smsm_cb_fn(struct work_struct *work)
{
- pr_err("%s: Initiating subsytem restart\n", MODULE_NAME);
- subsystem_restart("riva");
+ panic(MODULE_NAME ": SMSM reset request received from Riva");
}
static void smsm_state_cb_hdlr(void *data, uint32_t old_state,
@@ -59,9 +58,8 @@
static void riva_fatal_fn(struct work_struct *work)
{
- pr_err("%s: Watchdog bite received from Riva\n", MODULE_NAME);
if (!ss_restart_inprogress)
- subsystem_restart("riva");
+ panic(MODULE_NAME ": Watchdog bite received from Riva");
}
/* SMSM reset Riva */
diff --git a/drivers/base/iommu.c b/drivers/base/iommu.c
index 1377e85..6507d8b 100644
--- a/drivers/base/iommu.c
+++ b/drivers/base/iommu.c
@@ -45,6 +45,9 @@
struct iommu_domain *domain;
int ret;
+ if (!iommu_found())
+ return NULL;
+
domain = kmalloc(sizeof(*domain), GFP_KERNEL);
if (!domain)
return NULL;
@@ -64,6 +67,9 @@
void iommu_domain_free(struct iommu_domain *domain)
{
+ if (!iommu_found())
+ return;
+
iommu_ops->domain_destroy(domain);
kfree(domain);
}
@@ -71,12 +77,18 @@
int iommu_attach_device(struct iommu_domain *domain, struct device *dev)
{
+ if (!iommu_found())
+ return -ENODEV;
+
return iommu_ops->attach_dev(domain, dev);
}
EXPORT_SYMBOL_GPL(iommu_attach_device);
void iommu_detach_device(struct iommu_domain *domain, struct device *dev)
{
+ if (!iommu_found())
+ return;
+
iommu_ops->detach_dev(domain, dev);
}
EXPORT_SYMBOL_GPL(iommu_detach_device);
@@ -84,6 +96,9 @@
phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain,
unsigned long iova)
{
+ if (!iommu_found())
+ return 0;
+
return iommu_ops->iova_to_phys(domain, iova);
}
EXPORT_SYMBOL_GPL(iommu_iova_to_phys);
@@ -91,6 +106,9 @@
int iommu_domain_has_cap(struct iommu_domain *domain,
unsigned long cap)
{
+ if (!iommu_found())
+ return -ENODEV;
+
return iommu_ops->domain_has_cap(domain, cap);
}
EXPORT_SYMBOL_GPL(iommu_domain_has_cap);
@@ -101,6 +119,9 @@
unsigned long invalid_mask;
size_t size;
+ if (!iommu_found())
+ return -ENODEV;
+
size = 0x1000UL << gfp_order;
invalid_mask = size - 1;
@@ -115,6 +136,9 @@
unsigned long invalid_mask;
size_t size;
+ if (!iommu_found())
+ return -ENODEV;
+
size = 0x1000UL << gfp_order;
invalid_mask = size - 1;
@@ -127,6 +151,9 @@
int iommu_map_range(struct iommu_domain *domain, unsigned int iova,
struct scatterlist *sg, unsigned int len, int prot)
{
+ if (!iommu_found())
+ return -ENODEV;
+
BUG_ON(iova & (~PAGE_MASK));
return iommu_ops->map_range(domain, iova, sg, len, prot);
@@ -136,6 +163,9 @@
int iommu_unmap_range(struct iommu_domain *domain, unsigned int iova,
unsigned int len)
{
+ if (!iommu_found())
+ return -ENODEV;
+
BUG_ON(iova & (~PAGE_MASK));
return iommu_ops->unmap_range(domain, iova, len);
diff --git a/drivers/bluetooth/hci_smd.c b/drivers/bluetooth/hci_smd.c
index 66bab6b..2ecddcf 100644
--- a/drivers/bluetooth/hci_smd.c
+++ b/drivers/bluetooth/hci_smd.c
@@ -147,7 +147,7 @@
goto out_data;
}
- rc = smd_read_from_cb(hsmd->data_channel, (void *)buf, len);
+ rc = smd_read(hsmd->data_channel, (void *)buf, len);
if (rc < len) {
BT_ERR("Error in reading from the channel");
goto out_data;
@@ -220,7 +220,7 @@
rc = -ENOMEM;
goto out_event;
}
- rc = smd_read_from_cb(hsmd->event_channel, (void *)buf, len);
+ rc = smd_read(hsmd->event_channel, (void *)buf, len);
if (rc < len) {
BT_ERR("Error in reading from the event channel");
goto out_event;
@@ -285,7 +285,7 @@
break;
case HCI_ACLDATA_PKT:
case HCI_SCODATA_PKT:
- avail = smd_write_avail(hs.event_channel);
+ avail = smd_write_avail(hs.data_channel);
if (!avail) {
BT_ERR("No space available for smd frame");
ret = -ENOSPC;
diff --git a/drivers/char/diag/diagchar_core.c b/drivers/char/diag/diagchar_core.c
index eabdb4f..0729753 100644
--- a/drivers/char/diag/diagchar_core.c
+++ b/drivers/char/diag/diagchar_core.c
@@ -142,7 +142,7 @@
if (diagpriv_data)
diagpriv_data->pid = current->tgid;
file->private_data = diagpriv_data;
- strncpy(driver->client_map[i].name, current->comm, 20);
+ strlcpy(driver->client_map[i].name, current->comm, 20);
driver->client_map[i].name[19] = '\0';
}
diff --git a/drivers/char/diag/diagfwd.c b/drivers/char/diag/diagfwd.c
index caf3901..0ae987a 100644
--- a/drivers/char/diag/diagfwd.c
+++ b/drivers/char/diag/diagfwd.c
@@ -503,7 +503,7 @@
} else {
if (len > 0) {
if (entry.client_id == MODEM_PROC && driver->ch) {
- if (cpu_is_msm8960() &&
+ if ((cpu_is_msm8960() || cpu_is_msm8930()) &&
(int)(*(char *)buf) == MODE_CMD)
if ((int)(*(char *)(buf+1)) == RESET_ID)
return;
@@ -542,7 +542,7 @@
temp += 2;
data_type = APPS_DATA;
/* Dont send any command other than mode reset */
- if (cpu_is_msm8960() && cmd_code == MODE_CMD) {
+ if ((cpu_is_msm8960() || cpu_is_msm8930()) && cmd_code == MODE_CMD) {
if (subsys_id != RESET_ID)
data_type = MODEM_DATA;
}
@@ -826,7 +826,8 @@
return 0;
}
/* Check for download command */
- else if ((cpu_is_msm8x60() || cpu_is_msm8960()) && (*buf == 0x3A)) {
+ else if ((cpu_is_msm8x60() || cpu_is_msm8960() || cpu_is_msm8930())
+ && (*buf == 0x3A)) {
/* send response back */
driver->apps_rsp_buf[0] = *buf;
ENCODE_RSP_AND_SEND(0);
diff --git a/drivers/char/hw_random/msm_rng.c b/drivers/char/hw_random/msm_rng.c
index 5937c78..b03a4ec 100644
--- a/drivers/char/hw_random/msm_rng.c
+++ b/drivers/char/hw_random/msm_rng.c
@@ -22,6 +22,7 @@
#include <linux/io.h>
#include <linux/err.h>
#include <linux/types.h>
+#include <mach/msm_iomap.h>
#include <mach/socinfo.h>
#define DRIVER_NAME "msm_rng"
@@ -36,11 +37,12 @@
#define PRNG_LFSR_CFG_MASK 0xFFFF0000
#define PRNG_LFSR_CFG_CLOCKS 0x0000DDDD
#define PRNG_CONFIG_MASK 0xFFFFFFFD
-#define PRNG_CONFIG_ENABLE 0x00000002
+#define PRNG_HW_ENABLE 0x00000002
#define MAX_HW_FIFO_DEPTH 16 /* FIFO is 16 words deep */
#define MAX_HW_FIFO_SIZE (MAX_HW_FIFO_DEPTH * 4) /* FIFO is 32 bits wide */
+
struct msm_rng_device {
struct platform_device *pdev;
void __iomem *base;
@@ -110,40 +112,43 @@
static int __devinit msm_rng_enable_hw(struct msm_rng_device *msm_rng_dev)
{
unsigned long val = 0;
+ unsigned long reg_val = 0;
int ret = 0;
- int error = 0;
+ /* Enable the PRNG CLK */
ret = clk_enable(msm_rng_dev->prng_clk);
if (ret) {
dev_err(&(msm_rng_dev->pdev)->dev,
"failed to enable clock in probe\n");
- error = -EPERM;
- return error;
+ return -EPERM;
}
-
- /* enable PRNG h/w*/
val = readl_relaxed(msm_rng_dev->base + PRNG_LFSR_CFG_OFFSET) &
- PRNG_LFSR_CFG_MASK;
+ PRNG_LFSR_CFG_MASK;
val |= PRNG_LFSR_CFG_MASK;
writel_relaxed(val, msm_rng_dev->base + PRNG_LFSR_CFG_OFFSET);
- /* The PRNG CONFIG register should be read after writing to the
- * PRNG_LFSR_CFG register.
- */
+ /* The PRNG CONFIG register should be first written before reading */
mb();
- val = readl_relaxed(msm_rng_dev->base + PRNG_CONFIG_OFFSET) &
- PRNG_CONFIG_MASK;
- val |= PRNG_CONFIG_ENABLE;
- writel_relaxed(val, msm_rng_dev->base + PRNG_CONFIG_OFFSET);
- /* The PRNG clk should be disabled only after we have enabled the
- * PRNG H/W by writting to the PRNG_CONFIG register.
- */
- mb();
+ /* Enable PRNG h/w only if it is NOT ON */
+ val = readl_relaxed(msm_rng_dev->base + PRNG_CONFIG_OFFSET) &
+ PRNG_HW_ENABLE;
+ /* PRNG H/W is not ON */
+ if (val != PRNG_HW_ENABLE) {
+ reg_val = readl_relaxed(msm_rng_dev->base + PRNG_CONFIG_OFFSET)
+ & PRNG_CONFIG_MASK;
+ reg_val |= PRNG_HW_ENABLE;
+ writel_relaxed(reg_val, msm_rng_dev->base + PRNG_CONFIG_OFFSET);
+
+ /* The PRNG clk should be disabled only after we enable the
+ * PRNG h/w by writing to the PRNG CONFIG register.
+ */
+ mb();
+ }
clk_disable(msm_rng_dev->prng_clk);
- return error;
+ return 0;
}
static int __devinit msm_rng_probe(struct platform_device *pdev)
@@ -188,8 +193,7 @@
platform_set_drvdata(pdev, msm_rng_dev);
/* Enable rng h/w */
- if (cpu_is_msm9615())
- error = msm_rng_enable_hw(msm_rng_dev);
+ error = msm_rng_enable_hw(msm_rng_dev);
if (error)
goto rollback_clk;
diff --git a/drivers/char/msm_rotator.c b/drivers/char/msm_rotator.c
index 555e4fa..bb31b6a 100644
--- a/drivers/char/msm_rotator.c
+++ b/drivers/char/msm_rotator.c
@@ -61,10 +61,6 @@
#define MSM_ROTATOR_MAX_H 0x1fff
#define MSM_ROTATOR_MAX_W 0x1fff
-#define IS_NONPLANAR 0x0
-#define IS_PLANAR 0x1
-#define IS_PLANAR_16ALIGNED 0x2
-
/* from lsb to msb */
#define GET_PACK_PATTERN(a, x, y, z, bit) \
(((a)<<((bit)*3))|((x)<<((bit)*2))|((y)<<(bit))|(z))
@@ -94,6 +90,15 @@
unsigned int row_tile_h; /* tiles per row's height */
};
+struct msm_rotator_mem_planes {
+ unsigned int num_planes;
+ unsigned int plane_size[4];
+ unsigned int total_size;
+};
+
+#define checkoffset(offset, size, max_size) \
+ ((size) > (max_size) || (offset) > ((max_size) - (size)))
+
struct msm_rotator_dev {
void __iomem *io_base;
int irq;
@@ -120,8 +125,6 @@
wait_queue_head_t wq;
};
-#define chroma_addr(start, w, h, bpp) ((start) + ((h) * (w) * (bpp)))
-
#define COMPONENT_5BITS 1
#define COMPONENT_6BITS 2
#define COMPONENT_8BITS 3
@@ -246,6 +249,19 @@
return IRQ_HANDLED;
}
+static unsigned int tile_size(unsigned int src_width,
+ unsigned int src_height,
+ const struct tile_parm *tp)
+{
+ unsigned int tile_w, tile_h;
+ unsigned int row_num_w, row_num_h;
+ tile_w = tp->width * tp->row_tile_w;
+ tile_h = tp->height * tp->row_tile_h;
+ row_num_w = (src_width + tile_w - 1) / tile_w;
+ row_num_h = (src_height + tile_h - 1) / tile_h;
+ return ((row_num_w * row_num_h * tile_w * tile_h) + 8191) & ~8191;
+}
+
static int get_bpp(int format)
{
switch (format) {
@@ -285,6 +301,81 @@
}
+static int msm_rotator_get_plane_sizes(uint32_t format, uint32_t w, uint32_t h,
+ struct msm_rotator_mem_planes *p)
+{
+ /*
+ * each row of samsung tile consists of two tiles in height
+ * and two tiles in width which means width should align to
+ * 64 x 2 bytes and height should align to 32 x 2 bytes.
+ * video decoder generate two tiles in width and one tile
+ * in height which ends up height align to 32 X 1 bytes.
+ */
+ const struct tile_parm tile = {64, 32, 2, 1};
+ int i;
+
+ if (p == NULL)
+ return -EINVAL;
+
+ if ((w > MSM_ROTATOR_MAX_W) || (h > MSM_ROTATOR_MAX_H))
+ return -ERANGE;
+
+ memset(p, 0, sizeof(*p));
+
+ switch (format) {
+ case MDP_XRGB_8888:
+ case MDP_ARGB_8888:
+ case MDP_RGBA_8888:
+ case MDP_BGRA_8888:
+ case MDP_RGBX_8888:
+ case MDP_RGB_888:
+ case MDP_RGB_565:
+ case MDP_BGR_565:
+ case MDP_YCRYCB_H2V1:
+ p->num_planes = 1;
+ p->plane_size[0] = w * h * get_bpp(format);
+ break;
+ case MDP_Y_CRCB_H2V1:
+ case MDP_Y_CBCR_H2V1:
+ p->num_planes = 2;
+ p->plane_size[0] = w * h;
+ p->plane_size[1] = w * h;
+ break;
+ case MDP_Y_CBCR_H2V2:
+ case MDP_Y_CRCB_H2V2:
+ p->num_planes = 2;
+ p->plane_size[0] = w * h;
+ p->plane_size[1] = w * h / 2;
+ break;
+ case MDP_Y_CRCB_H2V2_TILE:
+ case MDP_Y_CBCR_H2V2_TILE:
+ p->num_planes = 2;
+ p->plane_size[0] = tile_size(w, h, &tile);
+ p->plane_size[1] = tile_size(w, h/2, &tile);
+ break;
+ case MDP_Y_CB_CR_H2V2:
+ case MDP_Y_CR_CB_H2V2:
+ p->num_planes = 3;
+ p->plane_size[0] = w * h;
+ p->plane_size[1] = (w / 2) * (h / 2);
+ p->plane_size[2] = (w / 2) * (h / 2);
+ break;
+ case MDP_Y_CR_CB_GH2V2:
+ p->num_planes = 3;
+ p->plane_size[0] = ALIGN(w, 16) * h;
+ p->plane_size[1] = ALIGN(w / 2, 16) * (h / 2);
+ p->plane_size[2] = ALIGN(w / 2, 16) * (h / 2);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ for (i = 0; i < p->num_planes; i++)
+ p->total_size += p->plane_size[i];
+
+ return 0;
+}
+
static int msm_rotator_ycxcx_h2v1(struct msm_rotator_img_info *info,
unsigned int in_paddr,
unsigned int out_paddr,
@@ -294,7 +385,6 @@
unsigned int out_chroma_paddr)
{
int bpp;
- unsigned int in_chr_addr, out_chr_addr;
if (info->src.format != info->dst.format)
return -EINVAL;
@@ -303,28 +393,12 @@
if (bpp < 0)
return -ENOTTY;
- if (!in_chroma_paddr) {
- in_chr_addr = chroma_addr(in_paddr, info->src.width,
- info->src.height,
- bpp);
- } else
- in_chr_addr = in_chroma_paddr;
-
- if (!out_chroma_paddr) {
- out_chr_addr = chroma_addr(out_paddr, info->dst.width,
- info->dst.height,
- bpp);
- } else
- out_chr_addr = out_chroma_paddr;
-
iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
-
- iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
- iowrite32(in_chr_addr, MSM_ROTATOR_SRCP1_ADDR);
+ iowrite32(in_chroma_paddr, MSM_ROTATOR_SRCP1_ADDR);
iowrite32(out_paddr +
((info->dst_y * info->dst.width) + info->dst_x),
MSM_ROTATOR_OUTP0_ADDR);
- iowrite32(out_chr_addr +
+ iowrite32(out_chroma_paddr +
((info->dst_y * info->dst.width) + info->dst_x),
MSM_ROTATOR_OUTP1_ADDR);
@@ -380,60 +454,45 @@
int new_session,
unsigned int in_chroma_paddr,
unsigned int out_chroma_paddr,
- int planar_mode)
+ unsigned int in_chroma2_paddr)
{
- int bpp;
- unsigned int in_chr_addr, out_chr_addr;
+ uint32_t dst_format;
+ int is_tile = 0;
- bpp = get_bpp(info->src.format);
- if (bpp < 0)
- return -ENOTTY;
-
- if (!in_chroma_paddr) {
- if (planar_mode & IS_PLANAR_16ALIGNED)
- in_chr_addr = chroma_addr(in_paddr,
- ALIGN(info->src.width, 16),
- info->src.height,
- bpp);
- else
- in_chr_addr = chroma_addr(in_paddr, info->src.width,
- info->src.height,
- bpp);
- } else
- in_chr_addr = in_chroma_paddr;
-
- if (!out_chroma_paddr) {
- out_chr_addr = chroma_addr(out_paddr, info->dst.width,
- info->dst.height,
- bpp);
- } else
- out_chr_addr = out_chroma_paddr;
+ switch (info->src.format) {
+ case MDP_Y_CRCB_H2V2_TILE:
+ is_tile = 1;
+ case MDP_Y_CR_CB_H2V2:
+ case MDP_Y_CR_CB_GH2V2:
+ case MDP_Y_CRCB_H2V2:
+ dst_format = MDP_Y_CRCB_H2V2;
+ break;
+ case MDP_Y_CBCR_H2V2_TILE:
+ is_tile = 1;
+ case MDP_Y_CB_CR_H2V2:
+ case MDP_Y_CBCR_H2V2:
+ dst_format = MDP_Y_CBCR_H2V2;
+ break;
+ default:
+ return -EINVAL;
+ }
+ if (info->dst.format != dst_format)
+ return -EINVAL;
iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
- iowrite32(in_chr_addr,
- MSM_ROTATOR_SRCP1_ADDR);
+ iowrite32(in_chroma_paddr, MSM_ROTATOR_SRCP1_ADDR);
+ iowrite32(in_chroma2_paddr, MSM_ROTATOR_SRCP2_ADDR);
+
iowrite32(out_paddr +
((info->dst_y * info->dst.width) + info->dst_x),
MSM_ROTATOR_OUTP0_ADDR);
- iowrite32(out_chr_addr +
+ iowrite32(out_chroma_paddr +
((info->dst_y * info->dst.width)/2 + info->dst_x),
MSM_ROTATOR_OUTP1_ADDR);
- if (planar_mode & IS_PLANAR) {
- if (planar_mode & IS_PLANAR_16ALIGNED)
- iowrite32(in_chr_addr +
- ALIGN((info->src.width / 2), 16) *
- (info->src.height / 2),
- MSM_ROTATOR_SRCP2_ADDR);
- else
- iowrite32(in_chr_addr +
- (info->src.width / 2) * (info->src.height / 2),
- MSM_ROTATOR_SRCP2_ADDR);
- }
-
if (new_session) {
- if (planar_mode & IS_PLANAR) {
- if (planar_mode & IS_PLANAR_16ALIGNED) {
+ if (in_chroma2_paddr) {
+ if (info->src.format == MDP_Y_CR_CB_GH2V2) {
iowrite32(ALIGN(info->src.width, 16) |
ALIGN((info->src.width / 2), 16) << 16,
MSM_ROTATOR_SRC_YSTRIDE1);
@@ -455,8 +514,7 @@
info->dst.width << 16,
MSM_ROTATOR_OUT_YSTRIDE1);
- if ((info->src.format == MDP_Y_CBCR_H2V2) ||
- (info->src.format == MDP_Y_CB_CR_H2V2)) {
+ if (dst_format == MDP_Y_CBCR_H2V2) {
iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
MSM_ROTATOR_SRC_UNPACK_PATTERN1);
iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
@@ -471,118 +529,14 @@
(ROTATIONS_TO_BITMASK(info->rotations) << 9) |
1 << 8, /* ROT_EN */
MSM_ROTATOR_SUB_BLOCK_CFG);
- iowrite32(0 << 29 | /* frame format 0 = linear */
+
+ iowrite32((is_tile ? 2 : 0) << 29 | /* frame format */
(use_imem ? 0 : 1) << 22 | /* tile size */
- ((planar_mode & IS_PLANAR) ?
- 1 : 2) << 19 | /* fetch planes */
+ (in_chroma2_paddr ? 1 : 2) << 19 | /* fetch planes */
0 << 18 | /* unpack align */
1 << 17 | /* unpack tight */
1 << 13 | /* unpack count 0=1 component */
- (bpp-1) << 9 | /* src Bpp 0=1 byte ... */
- 0 << 8 | /* has alpha */
- 0 << 6 | /* alpha bits 3=8bits */
- 3 << 4 | /* R/Cr bits 1=5 2=6 3=8 */
- 3 << 2 | /* B/Cb bits 1=5 2=6 3=8 */
- 3 << 0, /* G/Y bits 1=5 2=6 3=8 */
- MSM_ROTATOR_SRC_FORMAT);
- }
- return 0;
-}
-
-static unsigned int tile_size(unsigned int src_width,
- unsigned int src_height,
- const struct tile_parm *tp)
-{
- unsigned int tile_w, tile_h;
- unsigned int row_num_w, row_num_h;
- tile_w = tp->width * tp->row_tile_w;
- tile_h = tp->height * tp->row_tile_h;
- row_num_w = (src_width + tile_w - 1) / tile_w;
- row_num_h = (src_height + tile_h - 1) / tile_h;
- return ((row_num_w * row_num_h * tile_w * tile_h) + 8191) & ~8191;
-}
-
-static int msm_rotator_ycxcx_h2v2_tile(struct msm_rotator_img_info *info,
- unsigned int in_paddr,
- unsigned int out_paddr,
- unsigned int use_imem,
- int new_session,
- unsigned in_chroma_paddr,
- unsigned out_chroma_paddr)
-{
- int bpp;
- unsigned int offset = 0;
- unsigned int in_chr_addr, out_chr_addr;
- /*
- * each row of samsung tile consists of two tiles in height
- * and two tiles in width which means width should align to
- * 64 x 2 bytes and height should align to 32 x 2 bytes.
- * video decoder generate two tiles in width and one tile
- * in height which ends up height align to 32 X 1 bytes.
- */
- const struct tile_parm tile = {64, 32, 2, 1};
- if ((info->src.format == MDP_Y_CRCB_H2V2_TILE &&
- info->dst.format != MDP_Y_CRCB_H2V2) ||
- (info->src.format == MDP_Y_CBCR_H2V2_TILE &&
- info->dst.format != MDP_Y_CBCR_H2V2))
- return -EINVAL;
-
- bpp = get_bpp(info->src.format);
- if (bpp < 0)
- return -ENOTTY;
-
- offset = tile_size(info->src.width, info->src.height, &tile);
- if (!in_chroma_paddr)
- in_chr_addr = in_paddr + offset;
- else
- in_chr_addr = in_chroma_paddr;
-
- if (!out_chroma_paddr) {
- out_chr_addr = chroma_addr(out_paddr, info->dst.width,
- info->dst.height,
- bpp);
- } else
- out_chr_addr = out_chroma_paddr;
-
- iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
- iowrite32(in_paddr + offset, MSM_ROTATOR_SRCP1_ADDR);
- iowrite32(out_paddr +
- ((info->dst_y * info->dst.width) + info->dst_x),
- MSM_ROTATOR_OUTP0_ADDR);
- iowrite32(out_chr_addr +
- ((info->dst_y * info->dst.width)/2 + info->dst_x),
- MSM_ROTATOR_OUTP1_ADDR);
-
- if (new_session) {
- iowrite32(info->src.width |
- info->src.width << 16,
- MSM_ROTATOR_SRC_YSTRIDE1);
-
- iowrite32(info->dst.width |
- info->dst.width << 16,
- MSM_ROTATOR_OUT_YSTRIDE1);
- if (info->src.format == MDP_Y_CBCR_H2V2_TILE) {
- iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
- MSM_ROTATOR_SRC_UNPACK_PATTERN1);
- iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
- MSM_ROTATOR_OUT_PACK_PATTERN1);
- } else {
- iowrite32(GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8),
- MSM_ROTATOR_SRC_UNPACK_PATTERN1);
- iowrite32(GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8),
- MSM_ROTATOR_OUT_PACK_PATTERN1);
- }
- iowrite32((3 << 18) | /* chroma sampling 3=4:2:0 */
- (ROTATIONS_TO_BITMASK(info->rotations) << 9) |
- 1 << 8, /* ROT_EN */
- MSM_ROTATOR_SUB_BLOCK_CFG);
- iowrite32(2 << 29 | /* frame format 2 = supertile */
- (use_imem ? 0 : 1) << 22 | /* tile size */
- 2 << 19 | /* fetch planes 2 = pseudo */
- 0 << 18 | /* unpack align */
- 1 << 17 | /* unpack tight */
- 1 << 13 | /* unpack count 0=1 component */
- (bpp-1) << 9 | /* src Bpp 0=1 byte ... */
+ 0 << 9 | /* src Bpp 0=1 byte ... */
0 << 8 | /* has alpha */
0 << 6 | /* alpha bits 3=8bits */
3 << 4 | /* R/Cr bits 1=5 2=6 3=8 */
@@ -796,7 +750,7 @@
unsigned int status;
struct msm_rotator_data_info info;
unsigned int in_paddr, out_paddr;
- unsigned long len;
+ unsigned long src_len, dst_len;
struct file *src_file = 0;
struct file *dst_file = 0;
int use_imem = 0;
@@ -804,29 +758,14 @@
struct file *src_chroma_file = 0;
struct file *dst_chroma_file = 0;
unsigned int in_chroma_paddr = 0, out_chroma_paddr = 0;
+ unsigned int in_chroma2_paddr = 0;
uint32_t format;
+ struct msm_rotator_img_info *img_info;
+ struct msm_rotator_mem_planes src_planes, dst_planes;
if (copy_from_user(&info, (void __user *)arg, sizeof(info)))
return -EFAULT;
- rc = get_img(info.src.memory_id, (unsigned long *)&in_paddr,
- (unsigned long *)&len, &src_file);
- if (rc) {
- printk(KERN_ERR "%s: in get_img() failed id=0x%08x\n",
- DRIVER_NAME, info.src.memory_id);
- return rc;
- }
- in_paddr += info.src.offset;
-
- rc = get_img(info.dst.memory_id, (unsigned long *)&out_paddr,
- (unsigned long *)&len, &dst_file);
- if (rc) {
- printk(KERN_ERR "%s: out get_img() failed id=0x%08x\n",
- DRIVER_NAME, info.dst.memory_id);
- goto do_rotate_fail_dst_img;
- }
- out_paddr += info.dst.offset;
-
mutex_lock(&msm_rotator_dev->rotator_lock);
for (s = 0; s < MAX_SESSIONS; s++)
if ((msm_rotator_dev->img_info[s] != NULL) &&
@@ -851,36 +790,128 @@
goto do_rotate_unlock_mutex;
}
+ img_info = msm_rotator_dev->img_info[s];
+ if (msm_rotator_get_plane_sizes(img_info->src.format,
+ img_info->src.width,
+ img_info->src.height,
+ &src_planes)) {
+ pr_err("%s: invalid src format\n", __func__);
+ rc = -EINVAL;
+ goto do_rotate_unlock_mutex;
+ }
+ if (msm_rotator_get_plane_sizes(img_info->dst.format,
+ img_info->dst.width,
+ img_info->dst.height,
+ &dst_planes)) {
+ pr_err("%s: invalid dst format\n", __func__);
+ rc = -EINVAL;
+ goto do_rotate_unlock_mutex;
+ }
+
+ rc = get_img(info.src.memory_id, (unsigned long *)&in_paddr,
+ (unsigned long *)&src_len, &src_file);
+ if (rc) {
+ pr_err("%s: in get_img() failed id=0x%08x\n",
+ DRIVER_NAME, info.src.memory_id);
+ goto do_rotate_unlock_mutex;
+ }
+
+ rc = get_img(info.dst.memory_id, (unsigned long *)&out_paddr,
+ (unsigned long *)&dst_len, &dst_file);
+ if (rc) {
+ pr_err("%s: out get_img() failed id=0x%08x\n",
+ DRIVER_NAME, info.dst.memory_id);
+ goto do_rotate_unlock_mutex;
+ }
+
format = msm_rotator_dev->img_info[s]->src.format;
if (((info.version_key & VERSION_KEY_MASK) == 0xA5B4C300) &&
- ((info.version_key & ~VERSION_KEY_MASK) > 0) &&
- (format == MDP_Y_CBCR_H2V2 ||
- format == MDP_Y_CRCB_H2V2 ||
- format == MDP_Y_CRCB_H2V2_TILE ||
- format == MDP_Y_CBCR_H2V2_TILE ||
- format == MDP_Y_CBCR_H2V1 ||
- format == MDP_Y_CRCB_H2V1)) {
+ ((info.version_key & ~VERSION_KEY_MASK) > 0) &&
+ (src_planes.num_planes == 2)) {
+ if (checkoffset(info.src.offset,
+ src_planes.plane_size[0],
+ src_len)) {
+ pr_err("%s: invalid src buffer (len=%lu offset=%x)\n",
+ __func__, src_len, info.src.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+ if (checkoffset(info.dst.offset,
+ dst_planes.plane_size[0],
+ dst_len)) {
+ pr_err("%s: invalid dst buffer (len=%lu offset=%x)\n",
+ __func__, dst_len, info.dst.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+
rc = get_img(info.src_chroma.memory_id,
(unsigned long *)&in_chroma_paddr,
- (unsigned long *)&len, &src_chroma_file);
+ (unsigned long *)&src_len, &src_chroma_file);
if (rc) {
- printk(KERN_ERR "%s: in chroma get_img() failed id=0x%08x\n",
+ pr_err("%s: in chroma get_img() failed id=0x%08x\n",
DRIVER_NAME, info.src_chroma.memory_id);
goto do_rotate_unlock_mutex;
}
- in_chroma_paddr += info.src_chroma.offset;
rc = get_img(info.dst_chroma.memory_id,
(unsigned long *)&out_chroma_paddr,
- (unsigned long *)&len, &dst_chroma_file);
+ (unsigned long *)&dst_len, &dst_chroma_file);
if (rc) {
- printk(KERN_ERR "%s: out chroma get_img() failed id=0x%08x\n",
+ pr_err("%s: out chroma get_img() failed id=0x%08x\n",
DRIVER_NAME, info.dst_chroma.memory_id);
- goto do_rotate_fail_dst_chr_img;
+ goto do_rotate_unlock_mutex;
}
+
+ if (checkoffset(info.src_chroma.offset,
+ src_planes.plane_size[1],
+ src_len)) {
+ pr_err("%s: invalid chr src buf len=%lu offset=%x\n",
+ __func__, src_len, info.src_chroma.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+
+ if (checkoffset(info.dst_chroma.offset,
+ src_planes.plane_size[1],
+ dst_len)) {
+ pr_err("%s: invalid chr dst buf len=%lu offset=%x\n",
+ __func__, dst_len, info.dst_chroma.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+
+ in_chroma_paddr += info.src_chroma.offset;
out_chroma_paddr += info.dst_chroma.offset;
+ } else {
+ if (checkoffset(info.src.offset,
+ src_planes.total_size,
+ src_len)) {
+ pr_err("%s: invalid src buffer (len=%lu offset=%x)\n",
+ __func__, src_len, info.src.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+ if (checkoffset(info.dst.offset,
+ dst_planes.total_size,
+ dst_len)) {
+ pr_err("%s: invalid dst buffer (len=%lu offset=%x)\n",
+ __func__, dst_len, info.dst.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
}
+ in_paddr += info.src.offset;
+ out_paddr += info.dst.offset;
+
+ if (!in_chroma_paddr && src_planes.num_planes >= 2)
+ in_chroma_paddr = in_paddr + src_planes.plane_size[0];
+ if (!out_chroma_paddr && dst_planes.num_planes >= 2)
+ out_chroma_paddr = out_paddr + dst_planes.plane_size[0];
+ if (src_planes.num_planes >= 3)
+ in_chroma2_paddr = in_chroma_paddr + src_planes.plane_size[1];
+
cancel_delayed_work(&msm_rotator_dev->rot_clk_work);
if (msm_rotator_dev->rot_clk_state != CLK_EN) {
enable_rot_clks();
@@ -931,43 +962,19 @@
break;
case MDP_Y_CBCR_H2V2:
case MDP_Y_CRCB_H2V2:
- rc = msm_rotator_ycxcx_h2v2(msm_rotator_dev->img_info[s],
- in_paddr, out_paddr, use_imem,
- msm_rotator_dev->last_session_idx
- != s,
- in_chroma_paddr,
- out_chroma_paddr,
- IS_NONPLANAR);
- break;
case MDP_Y_CB_CR_H2V2:
case MDP_Y_CR_CB_H2V2:
- rc = msm_rotator_ycxcx_h2v2(msm_rotator_dev->img_info[s],
- in_paddr, out_paddr, use_imem,
- msm_rotator_dev->last_session_idx
- != s,
- in_chroma_paddr,
- out_chroma_paddr,
- IS_PLANAR);
- break;
case MDP_Y_CR_CB_GH2V2:
- rc = msm_rotator_ycxcx_h2v2(msm_rotator_dev->img_info[s],
- in_paddr, out_paddr, use_imem,
- msm_rotator_dev->last_session_idx
- != s,
- in_chroma_paddr,
- out_chroma_paddr,
- IS_PLANAR | IS_PLANAR_16ALIGNED);
- break;
case MDP_Y_CRCB_H2V2_TILE:
case MDP_Y_CBCR_H2V2_TILE:
- rc = msm_rotator_ycxcx_h2v2_tile(msm_rotator_dev->img_info[s],
- in_paddr, out_paddr, use_imem,
- msm_rotator_dev->last_session_idx
- != s,
- in_chroma_paddr,
- out_chroma_paddr);
- break;
-
+ rc = msm_rotator_ycxcx_h2v2(msm_rotator_dev->img_info[s],
+ in_paddr, out_paddr, use_imem,
+ msm_rotator_dev->last_session_idx
+ != s,
+ in_chroma_paddr,
+ out_chroma_paddr,
+ in_chroma2_paddr);
+ break;
case MDP_Y_CBCR_H2V1:
case MDP_Y_CRCB_H2V1:
rc = msm_rotator_ycxcx_h2v1(msm_rotator_dev->img_info[s],
@@ -1011,18 +1018,16 @@
msm_rotator_imem_free(ROTATOR_REQUEST);
#endif
schedule_delayed_work(&msm_rotator_dev->rot_clk_work, HZ);
+do_rotate_unlock_mutex:
if (dst_chroma_file)
put_pmem_file(dst_chroma_file);
-do_rotate_fail_dst_chr_img:
if (src_chroma_file)
put_pmem_file(src_chroma_file);
-do_rotate_unlock_mutex:
- mutex_unlock(&msm_rotator_dev->rotator_lock);
if (dst_file)
put_pmem_file(dst_file);
-do_rotate_fail_dst_img:
if (src_file)
put_pmem_file(src_file);
+ mutex_unlock(&msm_rotator_dev->rotator_lock);
dev_dbg(msm_rotator_dev->device, "%s() returning rc = %d\n",
__func__, rc);
return rc;
@@ -1034,25 +1039,28 @@
int rc = 0;
int s;
int first_free_index = INVALID_SESSION;
+ unsigned int dst_w, dst_h;
if (copy_from_user(&info, (void __user *)arg, sizeof(info)))
return -EFAULT;
+ if (info.rotations & MDP_ROT_90) {
+ dst_w = info.src_rect.h;
+ dst_h = info.src_rect.w;
+ } else {
+ dst_w = info.src_rect.w;
+ dst_h = info.src_rect.h;
+ }
+
if ((info.rotations > MSM_ROTATOR_MAX_ROT) ||
(info.src.height > MSM_ROTATOR_MAX_H) ||
(info.src.width > MSM_ROTATOR_MAX_W) ||
(info.dst.height > MSM_ROTATOR_MAX_H) ||
(info.dst.width > MSM_ROTATOR_MAX_W) ||
- ((info.src_rect.x + info.src_rect.w) > info.src.width) ||
- ((info.src_rect.y + info.src_rect.h) > info.src.height) ||
- ((info.rotations & MDP_ROT_90) &&
- ((info.dst_x + info.src_rect.h) > info.dst.width)) ||
- ((info.rotations & MDP_ROT_90) &&
- ((info.dst_y + info.src_rect.w) > info.dst.height)) ||
- (!(info.rotations & MDP_ROT_90) &&
- ((info.dst_x + info.src_rect.w) > info.dst.width)) ||
- (!(info.rotations & MDP_ROT_90) &&
- ((info.dst_y + info.src_rect.h) > info.dst.height)))
+ checkoffset(info.src_rect.x, info.src_rect.w, info.src.width) ||
+ checkoffset(info.src_rect.y, info.src_rect.h, info.src.height) ||
+ checkoffset(info.dst_x, dst_w, info.dst.width) ||
+ checkoffset(info.dst_y, dst_h, info.dst.height))
return -EINVAL;
switch (info.src.format) {
diff --git a/drivers/crypto/msm/qcedev.c b/drivers/crypto/msm/qcedev.c
index 405d021..3ae1647 100644
--- a/drivers/crypto/msm/qcedev.c
+++ b/drivers/crypto/msm/qcedev.c
@@ -439,7 +439,7 @@
creq.alg = CIPHER_ALG_AES;
break;
default:
- break;
+ return -EINVAL;
};
switch (qcedev_areq->cipher_op_req.mode) {
@@ -458,7 +458,7 @@
creq.mode = QCE_MODE_XTS;
break;
default:
- break;
+ return -EINVAL;
};
if ((creq.alg == CIPHER_ALG_AES) &&
diff --git a/drivers/crypto/msm/qcrypto.c b/drivers/crypto/msm/qcrypto.c
index 73627d4..67301877 100644
--- a/drivers/crypto/msm/qcrypto.c
+++ b/drivers/crypto/msm/qcrypto.c
@@ -889,6 +889,9 @@
if (areq->assoclen)
qreq->nonce[0] |= 64;
+ if (i > MAX_NONCE)
+ return -EINVAL;
+
return aead_ccm_set_msg_len(qreq->nonce + 16 - i, qreq->cryptlen, i);
}
diff --git a/drivers/gpu/ion/ion.c b/drivers/gpu/ion/ion.c
index a9dfc60..60bc276 100644
--- a/drivers/gpu/ion/ion.c
+++ b/drivers/gpu/ion/ion.c
@@ -204,6 +204,7 @@
/* XXX Can a handle be destroyed while it's map count is non-zero?:
if (handle->map_cnt) unmap
*/
+ WARN_ON(handle->kmap_cnt || handle->dmap_cnt || handle->usermap_cnt);
ion_buffer_put(handle->buffer);
mutex_lock(&handle->client->lock);
if (!RB_EMPTY_NODE(&handle->node))
@@ -630,7 +631,7 @@
buffer = handle->buffer;
mutex_lock(&buffer->lock);
- if (ION_IS_CACHED(buffer->flags)) {
+ if (!ION_IS_CACHED(buffer->flags)) {
ret = 0;
goto out;
}
@@ -673,8 +674,8 @@
return ERR_PTR(-EINVAL);
}
if (file->f_op != &ion_share_fops) {
- pr_err("%s: imported file is not a shared ion file.\n",
- __func__);
+ pr_err("%s: imported file %s is not a shared ion"
+ " file.", __func__, file->f_dentry->d_name.name);
handle = ERR_PTR(-EINVAL);
goto end;
}
@@ -688,29 +689,25 @@
{
struct ion_client *client = s->private;
struct rb_node *n;
- size_t sizes[ION_NUM_HEAPS] = {0};
- const char *names[ION_NUM_HEAPS] = {0};
- int i;
+ seq_printf(s, "%16.16s: %16.16s : %16.16s : %16.16s\n", "heap_name",
+ "size_in_bytes", "handle refcount", "buffer");
mutex_lock(&client->lock);
for (n = rb_first(&client->handles); n; n = rb_next(n)) {
struct ion_handle *handle = rb_entry(n, struct ion_handle,
node);
- enum ion_heap_type type = handle->buffer->heap->type;
- if (!names[type])
- names[type] = handle->buffer->heap->name;
- sizes[type] += handle->buffer->size;
+ seq_printf(s, "%16.16s: %16x : %16d : %16p\n",
+ handle->buffer->heap->name,
+ handle->buffer->size,
+ atomic_read(&handle->ref.refcount),
+ handle->buffer);
}
+
+ seq_printf(s, "%16.16s %d\n", "client refcount:",
+ atomic_read(&client->ref.refcount));
mutex_unlock(&client->lock);
- seq_printf(s, "%16.16s: %16.16s\n", "heap_name", "size_in_bytes");
- for (i = 0; i < ION_NUM_HEAPS; i++) {
- if (!names[i])
- continue;
- seq_printf(s, "%16.16s: %16u %d\n", names[i], sizes[i],
- atomic_read(&client->ref.refcount));
- }
return 0;
}
@@ -874,9 +871,32 @@
void ion_client_destroy(struct ion_client *client)
{
- ion_client_put(client);
+ if (client)
+ ion_client_put(client);
}
+int ion_handle_get_flags(struct ion_client *client, struct ion_handle *handle,
+ unsigned long *flags)
+{
+ struct ion_buffer *buffer;
+
+ mutex_lock(&client->lock);
+ if (!ion_handle_validate(client, handle)) {
+ pr_err("%s: invalid handle passed to %s.\n",
+ __func__, __func__);
+ mutex_unlock(&client->lock);
+ return -EINVAL;
+ }
+ buffer = handle->buffer;
+ mutex_lock(&buffer->lock);
+ *flags = buffer->flags;
+ mutex_unlock(&buffer->lock);
+ mutex_unlock(&client->lock);
+
+ return 0;
+}
+EXPORT_SYMBOL(ion_handle_get_flags);
+
static int ion_share_release(struct inode *inode, struct file* file)
{
struct ion_buffer *buffer = file->private_data;
@@ -1163,6 +1183,22 @@
data.offset, data.length, cmd);
}
+ case ION_IOC_GET_FLAGS:
+ {
+ struct ion_flag_data data;
+ int ret;
+ if (copy_from_user(&data, (void __user *)arg,
+ sizeof(struct ion_flag_data)))
+ return -EFAULT;
+
+ ret = ion_handle_get_flags(client, data.handle, &data.flags);
+ if (ret < 0)
+ return ret;
+ if (copy_to_user((void __user *)arg, &data,
+ sizeof(struct ion_flag_data)))
+ return -EFAULT;
+ break;
+ }
default:
return -ENOTTY;
}
@@ -1201,7 +1237,7 @@
};
static size_t ion_debug_heap_total(struct ion_client *client,
- enum ion_heap_type type)
+ enum ion_heap_ids id)
{
size_t size = 0;
struct rb_node *n;
@@ -1211,7 +1247,7 @@
struct ion_handle *handle = rb_entry(n,
struct ion_handle,
node);
- if (handle->buffer->heap->type == type)
+ if (handle->buffer->heap->id == id)
size += handle->buffer->size;
}
mutex_unlock(&client->lock);
@@ -1229,24 +1265,32 @@
struct ion_client *client = rb_entry(n, struct ion_client,
node);
char task_comm[TASK_COMM_LEN];
- size_t size = ion_debug_heap_total(client, heap->type);
+ size_t size = ion_debug_heap_total(client, heap->id);
if (!size)
continue;
get_task_comm(task_comm, client->task);
- seq_printf(s, "%16.s %16u %16u\n", task_comm, client->pid,
+ seq_printf(s, "%16.s %16u %16x\n", task_comm, client->pid,
size);
}
for (n = rb_first(&dev->kernel_clients); n; n = rb_next(n)) {
struct ion_client *client = rb_entry(n, struct ion_client,
node);
- size_t size = ion_debug_heap_total(client, heap->type);
+ size_t size = ion_debug_heap_total(client, heap->id);
if (!size)
continue;
- seq_printf(s, "%16.s %16u %16u\n", client->name, client->pid,
+ seq_printf(s, "%16.s %16u %16x\n", client->name, client->pid,
size);
}
+ if (heap->ops->get_allocated) {
+ seq_printf(s, "total bytes currently allocated: %lx\n",
+ heap->ops->get_allocated(heap));
+ }
+ if (heap->ops->get_total) {
+ seq_printf(s, "total heap size: %lx\n",
+ heap->ops->get_total(heap));
+ }
return 0;
}
@@ -1293,6 +1337,83 @@
mutex_unlock(&dev->lock);
}
+static int ion_debug_leak_show(struct seq_file *s, void *unused)
+{
+ struct ion_device *dev = s->private;
+ struct rb_node *n;
+ struct rb_node *n2;
+
+ /* mark all buffers as 1 */
+ seq_printf(s, "%16.s %16.s %16.s %16.s\n", "buffer", "heap", "size",
+ "ref cnt");
+ mutex_lock(&dev->lock);
+ for (n = rb_first(&dev->buffers); n; n = rb_next(n)) {
+ struct ion_buffer *buf = rb_entry(n, struct ion_buffer,
+ node);
+
+ buf->marked = 1;
+ }
+
+ /* now see which buffers we can access */
+ for (n = rb_first(&dev->kernel_clients); n; n = rb_next(n)) {
+ struct ion_client *client = rb_entry(n, struct ion_client,
+ node);
+
+ mutex_lock(&client->lock);
+ for (n2 = rb_first(&client->handles); n2; n2 = rb_next(n2)) {
+ struct ion_handle *handle = rb_entry(n2,
+ struct ion_handle, node);
+
+ handle->buffer->marked = 0;
+
+ }
+ mutex_unlock(&client->lock);
+
+ }
+
+ for (n = rb_first(&dev->user_clients); n; n = rb_next(n)) {
+ struct ion_client *client = rb_entry(n, struct ion_client,
+ node);
+
+ mutex_lock(&client->lock);
+ for (n2 = rb_first(&client->handles); n2; n2 = rb_next(n2)) {
+ struct ion_handle *handle = rb_entry(n2,
+ struct ion_handle, node);
+
+ handle->buffer->marked = 0;
+
+ }
+ mutex_unlock(&client->lock);
+
+ }
+ /* And anyone still marked as a 1 means a leaked handle somewhere */
+ for (n = rb_first(&dev->buffers); n; n = rb_next(n)) {
+ struct ion_buffer *buf = rb_entry(n, struct ion_buffer,
+ node);
+
+ if (buf->marked == 1)
+ seq_printf(s, "%16.x %16.s %16.x %16.d\n",
+ (int)buf, buf->heap->name, buf->size,
+ atomic_read(&buf->ref.refcount));
+ }
+ mutex_unlock(&dev->lock);
+ return 0;
+}
+
+static int ion_debug_leak_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, ion_debug_leak_show, inode->i_private);
+}
+
+static const struct file_operations debug_leak_fops = {
+ .open = ion_debug_leak_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+
+
struct ion_device *ion_device_create(long (*custom_ioctl)
(struct ion_client *client,
unsigned int cmd,
@@ -1325,6 +1446,8 @@
idev->heaps = RB_ROOT;
idev->user_clients = RB_ROOT;
idev->kernel_clients = RB_ROOT;
+ debugfs_create_file("check_leaked_fds", 0664, idev->debug_root, idev,
+ &debug_leak_fops);
return idev;
}
diff --git a/drivers/gpu/ion/ion_carveout_heap.c b/drivers/gpu/ion/ion_carveout_heap.c
index 86d4c8e..f6097ac 100644
--- a/drivers/gpu/ion/ion_carveout_heap.c
+++ b/drivers/gpu/ion/ion_carveout_heap.c
@@ -31,6 +31,8 @@
struct ion_heap heap;
struct gen_pool *pool;
ion_phys_addr_t base;
+ unsigned long allocated_bytes;
+ unsigned long total_size;
};
ion_phys_addr_t ion_carveout_allocate(struct ion_heap *heap,
@@ -42,9 +44,19 @@
unsigned long offset = gen_pool_alloc_aligned(carveout_heap->pool,
size, ilog2(align));
- if (!offset)
+ if (!offset) {
+ if ((carveout_heap->total_size -
+ carveout_heap->allocated_bytes) > size)
+ pr_debug("%s: heap %s has enough memory (%lx) but"
+ " the allocation of size %lx still failed."
+ " Memory is probably fragmented.",
+ __func__, heap->name,
+ carveout_heap->total_size -
+ carveout_heap->allocated_bytes, size);
return ION_CARVEOUT_ALLOCATE_FAIL;
+ }
+ carveout_heap->allocated_bytes += size;
return offset;
}
@@ -57,6 +69,7 @@
if (addr == ION_CARVEOUT_ALLOCATE_FAIL)
return;
gen_pool_free(carveout_heap->pool, addr, size);
+ carveout_heap->allocated_bytes -= size;
}
static int ion_carveout_heap_phys(struct ion_heap *heap,
@@ -156,6 +169,22 @@
return 0;
}
+static unsigned long ion_carveout_get_allocated(struct ion_heap *heap)
+{
+ struct ion_carveout_heap *carveout_heap =
+ container_of(heap, struct ion_carveout_heap, heap);
+
+ return carveout_heap->allocated_bytes;
+}
+
+static unsigned long ion_carveout_get_total(struct ion_heap *heap)
+{
+ struct ion_carveout_heap *carveout_heap =
+ container_of(heap, struct ion_carveout_heap, heap);
+
+ return carveout_heap->total_size;
+}
+
static struct ion_heap_ops carveout_heap_ops = {
.allocate = ion_carveout_heap_allocate,
.free = ion_carveout_heap_free,
@@ -164,6 +193,8 @@
.map_kernel = ion_carveout_heap_map_kernel,
.unmap_kernel = ion_carveout_heap_unmap_kernel,
.cache_op = ion_carveout_cache_ops,
+ .get_allocated = ion_carveout_get_allocated,
+ .get_total = ion_carveout_get_total,
};
struct ion_heap *ion_carveout_heap_create(struct ion_platform_heap *heap_data)
@@ -189,6 +220,8 @@
}
carveout_heap->heap.ops = &carveout_heap_ops;
carveout_heap->heap.type = ION_HEAP_TYPE_CARVEOUT;
+ carveout_heap->allocated_bytes = 0;
+ carveout_heap->total_size = heap_data->size;
return &carveout_heap->heap;
}
diff --git a/drivers/gpu/ion/ion_priv.h b/drivers/gpu/ion/ion_priv.h
index fd5c125..888b599 100644
--- a/drivers/gpu/ion/ion_priv.h
+++ b/drivers/gpu/ion/ion_priv.h
@@ -72,6 +72,7 @@
int dmap_cnt;
struct scatterlist *sglist;
int umap_cnt;
+ int marked;
};
/**
@@ -104,6 +105,8 @@
int (*cache_op)(struct ion_heap *heap, struct ion_buffer *buffer,
void *vaddr, unsigned int offset,
unsigned int length, unsigned int cmd);
+ unsigned long (*get_allocated)(struct ion_heap *heap);
+ unsigned long (*get_total)(struct ion_heap *heap);
};
/**
diff --git a/drivers/gpu/ion/ion_system_heap.c b/drivers/gpu/ion/ion_system_heap.c
index 5609b72..b26d48c 100644
--- a/drivers/gpu/ion/ion_system_heap.c
+++ b/drivers/gpu/ion/ion_system_heap.c
@@ -23,6 +23,9 @@
#include "ion_priv.h"
#include <mach/memory.h>
+static atomic_t system_heap_allocated;
+static atomic_t system_contig_heap_allocated;
+
static int ion_system_heap_allocate(struct ion_heap *heap,
struct ion_buffer *buffer,
unsigned long size, unsigned long align,
@@ -31,12 +34,15 @@
buffer->priv_virt = vmalloc_user(size);
if (!buffer->priv_virt)
return -ENOMEM;
+
+ atomic_add(size, &system_heap_allocated);
return 0;
}
void ion_system_heap_free(struct ion_buffer *buffer)
{
vfree(buffer->priv_virt);
+ atomic_sub(buffer->size, &system_heap_allocated);
}
struct scatterlist *ion_system_heap_map_dma(struct ion_heap *heap,
@@ -149,6 +155,11 @@
return 0;
}
+static unsigned long ion_system_heap_get_allocated(struct ion_heap *heap)
+{
+ return atomic_read(&system_heap_allocated);
+}
+
static struct ion_heap_ops vmalloc_ops = {
.allocate = ion_system_heap_allocate,
.free = ion_system_heap_free,
@@ -158,6 +169,7 @@
.unmap_kernel = ion_system_heap_unmap_kernel,
.map_user = ion_system_heap_map_user,
.cache_op = ion_system_heap_cache_ops,
+ .get_allocated = ion_system_heap_get_allocated,
};
struct ion_heap *ion_system_heap_create(struct ion_platform_heap *unused)
@@ -186,12 +198,14 @@
buffer->priv_virt = kzalloc(len, GFP_KERNEL);
if (!buffer->priv_virt)
return -ENOMEM;
+ atomic_add(len, &system_contig_heap_allocated);
return 0;
}
void ion_system_contig_heap_free(struct ion_buffer *buffer)
{
kfree(buffer->priv_virt);
+ atomic_sub(buffer->size, &system_contig_heap_allocated);
}
static int ion_system_contig_heap_phys(struct ion_heap *heap,
@@ -266,6 +280,11 @@
return 0;
}
+static unsigned long ion_system_contig_heap_get_allocated(struct ion_heap *heap)
+{
+ return atomic_read(&system_contig_heap_allocated);
+}
+
static struct ion_heap_ops kmalloc_ops = {
.allocate = ion_system_contig_heap_allocate,
.free = ion_system_contig_heap_free,
@@ -276,6 +295,7 @@
.unmap_kernel = ion_system_heap_unmap_kernel,
.map_user = ion_system_contig_heap_map_user,
.cache_op = ion_system_contig_heap_cache_ops,
+ .get_allocated = ion_system_contig_heap_get_allocated,
};
struct ion_heap *ion_system_contig_heap_create(struct ion_platform_heap *unused)
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 4207def..7599894 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -359,7 +359,7 @@
* adreno 22x gpus are indicated by coreid 2,
* but REG_RBBM_PERIPHID1 always contains 0 for this field
*/
- if (cpu_is_msm8960() || cpu_is_msm8x60())
+ if (cpu_is_msm8960() || cpu_is_msm8x60() || cpu_is_msm8930())
chipid = 2 << 24;
else
chipid = (coreid & 0xF) << 24;
@@ -536,7 +536,7 @@
adreno_regwrite(device, REG_SQ_VS_PROGRAM, 0x00000000);
adreno_regwrite(device, REG_SQ_PS_PROGRAM, 0x00000000);
- if (cpu_is_msm8960())
+ if (cpu_is_msm8960() || cpu_is_msm8930())
adreno_regwrite(device, REG_RBBM_PM_OVERRIDE1, 0x200);
else
adreno_regwrite(device, REG_RBBM_PM_OVERRIDE1, 0);
diff --git a/drivers/gpu/msm/adreno.h b/drivers/gpu/msm/adreno.h
index 0098045..51ee31a 100644
--- a/drivers/gpu/msm/adreno.h
+++ b/drivers/gpu/msm/adreno.h
@@ -54,7 +54,6 @@
enum adreno_gpurev gpurev;
struct kgsl_memregion gmemspace;
struct adreno_context *drawctxt_active;
- wait_queue_head_t ib1_wq;
const char *pfp_fwfile;
unsigned int *pfp_fw;
size_t pfp_fw_size;
diff --git a/drivers/gpu/msm/adreno_ringbuffer.c b/drivers/gpu/msm/adreno_ringbuffer.c
index 639f219..d59057c 100644
--- a/drivers/gpu/msm/adreno_ringbuffer.c
+++ b/drivers/gpu/msm/adreno_ringbuffer.c
@@ -61,7 +61,7 @@
adreno_regwrite(rb->device, REG_CP_RB_WPTR, rb->wptr);
}
-static int
+static void
adreno_ringbuffer_waitspace(struct adreno_ringbuffer *rb, unsigned int numcmds,
int wptr_ahead)
{
@@ -102,8 +102,6 @@
freecmds = rb->rptr - rb->wptr;
} while ((freecmds != 0) && (freecmds <= numcmds));
-
- return 0;
}
@@ -111,7 +109,6 @@
unsigned int numcmds)
{
unsigned int *ptr = NULL;
- int status = 0;
BUG_ON(numcmds >= rb->sizedwords);
@@ -122,22 +119,20 @@
/* reserve dwords for nop packet */
if ((rb->wptr + numcmds) > (rb->sizedwords -
GSL_RB_NOP_SIZEDWORDS))
- status = adreno_ringbuffer_waitspace(rb, numcmds, 1);
+ adreno_ringbuffer_waitspace(rb, numcmds, 1);
} else {
/* wptr behind rptr */
if ((rb->wptr + numcmds) >= rb->rptr)
- status = adreno_ringbuffer_waitspace(rb, numcmds, 0);
+ adreno_ringbuffer_waitspace(rb, numcmds, 0);
/* check for remaining space */
/* reserve dwords for nop packet */
if ((rb->wptr + numcmds) > (rb->sizedwords -
GSL_RB_NOP_SIZEDWORDS))
- status = adreno_ringbuffer_waitspace(rb, numcmds, 1);
+ adreno_ringbuffer_waitspace(rb, numcmds, 1);
}
- if (status == 0) {
- ptr = (unsigned int *)rb->buffer_desc.hostptr + rb->wptr;
- rb->wptr += numcmds;
- }
+ ptr = (unsigned int *)rb->buffer_desc.hostptr + rb->wptr;
+ rb->wptr += numcmds;
return ptr;
}
@@ -391,7 +386,7 @@
return status;
}
-int adreno_ringbuffer_stop(struct adreno_ringbuffer *rb)
+void adreno_ringbuffer_stop(struct adreno_ringbuffer *rb)
{
if (rb->flags & KGSL_FLAGS_STARTED) {
/* ME_HALT */
@@ -399,8 +394,6 @@
rb->flags &= ~KGSL_FLAGS_STARTED;
}
-
- return 0;
}
int adreno_ringbuffer_init(struct kgsl_device *device)
@@ -443,7 +436,7 @@
return 0;
}
-int adreno_ringbuffer_close(struct adreno_ringbuffer *rb)
+void adreno_ringbuffer_close(struct adreno_ringbuffer *rb)
{
struct adreno_device *adreno_dev = ADRENO_DEVICE(rb->device);
@@ -457,8 +450,6 @@
adreno_dev->pm4_fw = NULL;
memset(rb, 0, sizeof(struct adreno_ringbuffer));
-
- return 0;
}
static uint32_t
diff --git a/drivers/gpu/msm/adreno_ringbuffer.h b/drivers/gpu/msm/adreno_ringbuffer.h
index 487a748..a90b0cb 100644
--- a/drivers/gpu/msm/adreno_ringbuffer.h
+++ b/drivers/gpu/msm/adreno_ringbuffer.h
@@ -117,9 +117,9 @@
int adreno_ringbuffer_start(struct adreno_ringbuffer *rb,
unsigned int init_ram);
-int adreno_ringbuffer_stop(struct adreno_ringbuffer *rb);
+void adreno_ringbuffer_stop(struct adreno_ringbuffer *rb);
-int adreno_ringbuffer_close(struct adreno_ringbuffer *rb);
+void adreno_ringbuffer_close(struct adreno_ringbuffer *rb);
void adreno_ringbuffer_issuecmds(struct kgsl_device *device,
unsigned int flags,
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index 165bbbf..7e61a32 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -1226,7 +1226,11 @@
entry->memdesc.size = size;
entry->memdesc.physaddr = phys + (offset & PAGE_MASK);
entry->memdesc.hostptr = (void *) (virt + (offset & PAGE_MASK));
- entry->memdesc.ops = &kgsl_contiguous_ops;
+
+ ret = memdesc_sg_phys(&entry->memdesc,
+ phys + (offset & PAGE_MASK), size);
+ if (ret)
+ goto err;
return 0;
err:
@@ -1236,6 +1240,60 @@
return ret;
}
+static int memdesc_sg_virt(struct kgsl_memdesc *memdesc,
+ void *addr, int size)
+{
+ int i;
+ int sglen = PAGE_ALIGN(size) / PAGE_SIZE;
+ unsigned long paddr = (unsigned long) addr;
+
+ memdesc->sg = kmalloc(sglen * sizeof(struct scatterlist),
+ GFP_KERNEL);
+ if (memdesc->sg == NULL)
+ return -ENOMEM;
+
+ memdesc->sglen = sglen;
+ sg_init_table(memdesc->sg, sglen);
+
+ spin_lock(¤t->mm->page_table_lock);
+
+ for (i = 0; i < sglen; i++, paddr += PAGE_SIZE) {
+ struct page *page;
+ pmd_t *ppmd;
+ pte_t *ppte;
+ pgd_t *ppgd = pgd_offset(current->mm, paddr);
+
+ if (pgd_none(*ppgd) || pgd_bad(*ppgd))
+ goto err;
+
+ ppmd = pmd_offset(ppgd, paddr);
+ if (pmd_none(*ppmd) || pmd_bad(*ppmd))
+ goto err;
+
+ ppte = pte_offset_map(ppmd, paddr);
+ if (ppte == NULL)
+ goto err;
+
+ page = pfn_to_page(pte_pfn(*ppte));
+ if (!page)
+ goto err;
+
+ sg_set_page(&memdesc->sg[i], page, PAGE_SIZE, 0);
+ pte_unmap(ppte);
+ }
+
+ spin_unlock(¤t->mm->page_table_lock);
+
+ return 0;
+
+err:
+ spin_unlock(¤t->mm->page_table_lock);
+ kfree(memdesc->sg);
+ memdesc->sg = NULL;
+
+ return -EINVAL;
+}
+
static int kgsl_setup_hostptr(struct kgsl_mem_entry *entry,
struct kgsl_pagetable *pagetable,
void *hostptr, unsigned int offset,
@@ -1285,9 +1343,9 @@
entry->memdesc.pagetable = pagetable;
entry->memdesc.size = size;
entry->memdesc.hostptr = hostptr + (offset & PAGE_MASK);
- entry->memdesc.ops = &kgsl_userptr_ops;
- return 0;
+ return memdesc_sg_virt(&entry->memdesc,
+ hostptr + (offset & PAGE_MASK), size);
}
#ifdef CONFIG_ASHMEM
@@ -1335,11 +1393,13 @@
}
entry->file_ptr = filep;
-
entry->memdesc.pagetable = pagetable;
entry->memdesc.size = ALIGN(size, PAGE_SIZE);
entry->memdesc.hostptr = hostptr;
- entry->memdesc.ops = &kgsl_userptr_ops;
+
+ ret = memdesc_sg_virt(&entry->memdesc, hostptr, size);
+ if (ret)
+ goto err;
return 0;
@@ -1725,7 +1785,7 @@
{
struct kgsl_mem_entry *entry = vma->vm_private_data;
- if (!entry->memdesc.ops->vmfault)
+ if (!entry->memdesc.ops || !entry->memdesc.ops->vmfault)
return VM_FAULT_SIGBUS;
return entry->memdesc.ops->vmfault(&entry->memdesc, vma, vmf);
@@ -1772,7 +1832,9 @@
if (entry == NULL)
return -EINVAL;
- if (!entry->memdesc.ops->vmflags || !entry->memdesc.ops->vmfault)
+ if (!entry->memdesc.ops ||
+ !entry->memdesc.ops->vmflags ||
+ !entry->memdesc.ops->vmfault)
return -EINVAL;
vma->vm_flags |= entry->memdesc.ops->vmflags(&entry->memdesc);
diff --git a/drivers/gpu/msm/kgsl.h b/drivers/gpu/msm/kgsl.h
index 8db2cb4..1480df4 100644
--- a/drivers/gpu/msm/kgsl.h
+++ b/drivers/gpu/msm/kgsl.h
@@ -115,6 +115,8 @@
unsigned int physaddr;
unsigned int size;
unsigned int priv;
+ struct scatterlist *sg;
+ unsigned int sglen;
struct kgsl_memdesc_ops *ops;
};
diff --git a/drivers/gpu/msm/kgsl_cffdump.c b/drivers/gpu/msm/kgsl_cffdump.c
index d419592..aa33152 100644
--- a/drivers/gpu/msm/kgsl_cffdump.c
+++ b/drivers/gpu/msm/kgsl_cffdump.c
@@ -363,7 +363,7 @@
/*TODO: move this to where we can report correct gmemsize*/
unsigned int va_base;
- if (cpu_is_msm8x60() || cpu_is_msm8960())
+ if (cpu_is_msm8x60() || cpu_is_msm8960() || cpu_is_msm8930())
va_base = 0x40000000;
else
va_base = 0x20000000;
diff --git a/drivers/gpu/msm/kgsl_drm.c b/drivers/gpu/msm/kgsl_drm.c
index 202783b..cdf9dc4 100644
--- a/drivers/gpu/msm/kgsl_drm.c
+++ b/drivers/gpu/msm/kgsl_drm.c
@@ -293,7 +293,6 @@
}
priv->memdesc.size = obj->size * priv->bufcount;
- priv->memdesc.ops = &kgsl_contiguous_ops;
} else if (TYPE_IS_MEM(priv->type)) {
priv->memdesc.hostptr =
diff --git a/drivers/gpu/msm/kgsl_gpummu.c b/drivers/gpu/msm/kgsl_gpummu.c
index 383b910..fe5677e 100644
--- a/drivers/gpu/msm/kgsl_gpummu.c
+++ b/drivers/gpu/msm/kgsl_gpummu.c
@@ -659,68 +659,45 @@
return 0;
}
+#define SUPERPTE_IS_DIRTY(_p) \
+(((_p) & (GSL_PT_SUPER_PTE - 1)) == 0 && \
+GSL_TLBFLUSH_FILTER_ISDIRTY((_p) / GSL_PT_SUPER_PTE))
+
static int
kgsl_gpummu_map(void *mmu_specific_pt,
struct kgsl_memdesc *memdesc,
unsigned int protflags)
{
- int numpages;
- unsigned int pte, ptefirst, ptelast, physaddr;
- int flushtlb;
- unsigned int offset = 0;
+ unsigned int pte;
struct kgsl_gpummu_pt *gpummu_pt = mmu_specific_pt;
+ struct scatterlist *s;
+ int flushtlb = 0;
+ int i;
- if (!protflags ||
- protflags & ~(GSL_PT_PAGE_RV | GSL_PT_PAGE_WV)) {
- KGSL_CORE_ERR("Invalid protflags for "
- "kgsl_mmu_specific_map: %x", protflags);
- return -EINVAL;
- }
+ pte = kgsl_pt_entry_get(KGSL_PAGETABLE_BASE, memdesc->gpuaddr);
- numpages = (memdesc->size >> PAGE_SHIFT);
-
- ptefirst = kgsl_pt_entry_get(KGSL_PAGETABLE_BASE, memdesc->gpuaddr);
- ptelast = ptefirst + numpages;
-
- pte = ptefirst;
- flushtlb = 0;
-
- /* tlb needs to be flushed when the first and last pte are not at
- * superpte boundaries */
- if ((ptefirst & (GSL_PT_SUPER_PTE - 1)) != 0 ||
- ((ptelast + 1) & (GSL_PT_SUPER_PTE-1)) != 0)
+ /* Flush the TLB if the first PTE isn't at the superpte boundary */
+ if (pte & (GSL_PT_SUPER_PTE - 1))
flushtlb = 1;
- for (pte = ptefirst; pte < ptelast; pte++, offset += PAGE_SIZE) {
-#ifdef VERBOSE_DEBUG
- /* check if PTE exists */
- uint32_t val = kgsl_pt_map_get(gpummu_pt, pte);
- if (val != 0 && val != GSL_PT_PAGE_DIRTY) {
- KGSL_CORE_ERR("pt entry %x is already set with "
- "value %x for pagetable %p\n", pte, val, gpummu_pt);
- return -EINVAL;
- }
-#endif
- if ((pte & (GSL_PT_SUPER_PTE-1)) == 0)
- if (GSL_TLBFLUSH_FILTER_ISDIRTY(pte / GSL_PT_SUPER_PTE))
- flushtlb = 1;
- /* mark pte as in use */
+ for_each_sg(memdesc->sg, s, memdesc->sglen, i) {
+ unsigned int paddr = sg_phys(s);
+ unsigned int j;
- physaddr = memdesc->ops->physaddr(memdesc, offset);
- if (!physaddr) {
- KGSL_CORE_ERR("Failed to convert %x address to "
- "physical", (unsigned int)memdesc->hostptr + offset);
- kgsl_gpummu_unmap(mmu_specific_pt, memdesc);
- return -EFAULT;
+ /* Each sg entry might be multiple pages long */
+ for (j = paddr; j < paddr + s->length; pte++, j += PAGE_SIZE) {
+ if (SUPERPTE_IS_DIRTY(pte))
+ flushtlb = 1;
+ kgsl_pt_map_set(gpummu_pt, pte, j | protflags);
}
- kgsl_pt_map_set(gpummu_pt, pte, physaddr | protflags);
}
- /* Post all writes to the pagetable */
+ /* Flush the TLB if the last PTE isn't at the superpte boundary */
+ if ((pte + 1) & (GSL_PT_SUPER_PTE - 1))
+ flushtlb = 1;
+
wmb();
- /* Invalidate tlb only if current page table used by GPU is the
- * pagetable that we used to allocate */
if (flushtlb) {
/*set all devices as needing flushing*/
gpummu_pt->tlb_flags = UINT_MAX;
diff --git a/drivers/gpu/msm/kgsl_iommu.c b/drivers/gpu/msm/kgsl_iommu.c
index f9b9b4a..30365a3 100644
--- a/drivers/gpu/msm/kgsl_iommu.c
+++ b/drivers/gpu/msm/kgsl_iommu.c
@@ -226,8 +226,6 @@
{
int ret;
unsigned int range = memdesc->size;
- unsigned int iommu_map_addr;
- int map_order = get_order(SZ_4K);
struct iommu_domain *domain = (struct iommu_domain *)
mmu_specific_pt;
@@ -240,14 +238,11 @@
if (range == 0 || gpuaddr == 0)
return 0;
- for (iommu_map_addr = gpuaddr; iommu_map_addr < (gpuaddr + range);
- iommu_map_addr += SZ_4K) {
- ret = iommu_unmap(domain, iommu_map_addr, map_order);
- if (ret)
- KGSL_CORE_ERR("iommu_unmap(%p, %x, %d) failed "
- "with err: %d\n", domain, iommu_map_addr,
- map_order, ret);
- }
+ ret = iommu_unmap_range(domain, gpuaddr, range);
+ if (ret)
+ KGSL_CORE_ERR("iommu_unmap_range(%p, %x, %d) failed "
+ "with err: %d\n", domain, gpuaddr,
+ range, ret);
return 0;
}
@@ -257,38 +252,23 @@
struct kgsl_memdesc *memdesc,
unsigned int protflags)
{
- int ret = 0;
- unsigned int physaddr;
+ int ret;
unsigned int iommu_virt_addr;
- unsigned int offset = 0;
- int map_order;
- struct iommu_domain *domain = (struct iommu_domain *)
- mmu_specific_pt;
+ struct iommu_domain *domain = mmu_specific_pt;
BUG_ON(NULL == domain);
- map_order = get_order(SZ_4K);
- for (iommu_virt_addr = memdesc->gpuaddr;
- iommu_virt_addr < (memdesc->gpuaddr + memdesc->size);
- iommu_virt_addr += SZ_4K, offset += PAGE_SIZE) {
- physaddr = memdesc->ops->physaddr(memdesc, offset);
- if (!physaddr) {
- KGSL_CORE_ERR("Failed to convert %x address to "
- "physical\n", (unsigned int)memdesc->hostptr + offset);
- kgsl_iommu_unmap(mmu_specific_pt, memdesc);
- return -EFAULT;
- }
- ret = iommu_map(domain, iommu_virt_addr, physaddr,
- map_order, MSM_IOMMU_ATTR_NONCACHED);
- if (ret) {
- KGSL_CORE_ERR("iommu_map(%p, %x, %x, %d, %d) "
- "failed with err: %d\n", domain,
- iommu_virt_addr, physaddr, map_order,
- MSM_IOMMU_ATTR_NONCACHED, ret);
- kgsl_iommu_unmap(mmu_specific_pt, memdesc);
- return ret;
- }
+ iommu_virt_addr = memdesc->gpuaddr;
+
+ ret = iommu_map_range(domain, iommu_virt_addr, memdesc->sg,
+ memdesc->size, MSM_IOMMU_ATTR_NONCACHED);
+ if (ret) {
+ KGSL_CORE_ERR("iommu_map_range(%p, %x, %p, %d, %d) "
+ "failed with err: %d\n", domain,
+ iommu_virt_addr, memdesc->sg, memdesc->size,
+ MSM_IOMMU_ATTR_NONCACHED, ret);
+ return ret;
}
return ret;
diff --git a/drivers/gpu/msm/kgsl_mmu.c b/drivers/gpu/msm/kgsl_mmu.c
index 7eec9e5..1879666 100644
--- a/drivers/gpu/msm/kgsl_mmu.c
+++ b/drivers/gpu/msm/kgsl_mmu.c
@@ -525,37 +525,6 @@
*/
}
-unsigned int kgsl_virtaddr_to_physaddr(void *virtaddr)
-{
- unsigned int physaddr = 0;
- pgd_t *pgd_ptr = NULL;
- pmd_t *pmd_ptr = NULL;
- pte_t *pte_ptr = NULL, pte;
-
- pgd_ptr = pgd_offset(current->mm, (unsigned long) virtaddr);
- if (pgd_none(*pgd) || pgd_bad(*pgd)) {
- KGSL_CORE_ERR("Invalid pgd entry\n");
- return 0;
- }
-
- pmd_ptr = pmd_offset(pgd_ptr, (unsigned long) virtaddr);
- if (pmd_none(*pmd_ptr) || pmd_bad(*pmd_ptr)) {
- KGSL_CORE_ERR("Invalid pmd entry\n");
- return 0;
- }
-
- pte_ptr = pte_offset_map(pmd_ptr, (unsigned long) virtaddr);
- if (!pte_ptr) {
- KGSL_CORE_ERR("pt_offset_map failed\n");
- return 0;
- }
- pte = *pte_ptr;
- physaddr = pte_pfn(pte);
- pte_unmap(pte_ptr);
- physaddr <<= PAGE_SHIFT;
- return physaddr;
-}
-
int
kgsl_mmu_map(struct kgsl_pagetable *pagetable,
struct kgsl_memdesc *memdesc,
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index 84f2b33..343a39a 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -582,11 +582,10 @@
idle_check_ws);
mutex_lock(&device->mutex);
- if (device->ftbl->isidle(device) &&
- (device->requested_state != KGSL_STATE_SLEEP))
- kgsl_pwrscale_idle(device);
-
if (device->state & (KGSL_STATE_ACTIVE | KGSL_STATE_NAP)) {
+ if (device->requested_state != KGSL_STATE_SLEEP)
+ kgsl_pwrscale_idle(device);
+
if (kgsl_pwrctrl_sleep(device) != 0) {
mod_timer(&device->idle_timer,
jiffies +
diff --git a/drivers/gpu/msm/kgsl_pwrscale.c b/drivers/gpu/msm/kgsl_pwrscale.c
index fa7203d..b5c6876 100644
--- a/drivers/gpu/msm/kgsl_pwrscale.c
+++ b/drivers/gpu/msm/kgsl_pwrscale.c
@@ -272,8 +272,11 @@
static void _kgsl_pwrscale_detach_policy(struct kgsl_device *device)
{
- if (device->pwrscale.policy != NULL)
+ if (device->pwrscale.policy != NULL) {
device->pwrscale.policy->close(device, &device->pwrscale);
+ kgsl_pwrctrl_pwrlevel_change(device,
+ device->pwrctrl.thermal_pwrlevel);
+ }
device->pwrscale.policy = NULL;
}
diff --git a/drivers/gpu/msm/kgsl_pwrscale_trustzone.c b/drivers/gpu/msm/kgsl_pwrscale_trustzone.c
index 45f7607..f3e84e4 100644
--- a/drivers/gpu/msm/kgsl_pwrscale_trustzone.c
+++ b/drivers/gpu/msm/kgsl_pwrscale_trustzone.c
@@ -166,7 +166,7 @@
struct tz_priv *priv;
/* Trustzone is only valid for some SOCs */
- if (!(cpu_is_msm8x60() || cpu_is_msm8960()))
+ if (!(cpu_is_msm8x60() || cpu_is_msm8960() || cpu_is_msm8930()))
return -EINVAL;
priv = pwrscale->priv = kzalloc(sizeof(struct tz_priv), GFP_KERNEL);
diff --git a/drivers/gpu/msm/kgsl_sharedmem.c b/drivers/gpu/msm/kgsl_sharedmem.c
index 09070e4..8f75daa 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.c
+++ b/drivers/gpu/msm/kgsl_sharedmem.c
@@ -207,28 +207,21 @@
break;
}
}
-#endif
-static unsigned long kgsl_vmalloc_physaddr(struct kgsl_memdesc *memdesc,
- unsigned int offset)
+static void outer_cache_range_op_sg(struct scatterlist *sg, int sglen, int op)
{
- unsigned int addr;
+ struct scatterlist *s;
+ int i;
- if (offset > memdesc->size)
- return 0;
-
- addr = vmalloc_to_pfn(memdesc->hostptr + offset);
- return addr << PAGE_SHIFT;
+ for_each_sg(sg, s, sglen, i) {
+ unsigned int paddr = sg_phys(s);
+ _outer_cache_range_op(op, paddr, s->length);
+ }
}
-#ifdef CONFIG_OUTER_CACHE
-static void kgsl_vmalloc_outer_cache(struct kgsl_memdesc *memdesc, int op)
+#else
+static void outer_cache_range_op_sg(struct scatterlist *sg, int sglen, int op)
{
- void *vaddr = memdesc->hostptr;
- for (; vaddr < (memdesc->hostptr + memdesc->size); vaddr += PAGE_SIZE) {
- unsigned long paddr = page_to_phys(vmalloc_to_page(vaddr));
- _outer_cache_range_op(op, paddr, PAGE_SIZE);
- }
}
#endif
@@ -306,88 +299,24 @@
memdesc->hostptr, memdesc->physaddr);
}
-static unsigned long kgsl_contiguous_physaddr(struct kgsl_memdesc *memdesc,
- unsigned int offset)
-{
- if (offset > memdesc->size)
- return 0;
-
- return memdesc->physaddr + offset;
-}
-
-#ifdef CONFIG_OUTER_CACHE
-static void kgsl_contiguous_outer_cache(struct kgsl_memdesc *memdesc, int op)
-{
- _outer_cache_range_op(op, memdesc->physaddr, memdesc->size);
-}
-#endif
-
-#ifdef CONFIG_OUTER_CACHE
-static void kgsl_userptr_outer_cache(struct kgsl_memdesc *memdesc, int op)
-{
- void *vaddr = memdesc->hostptr;
- for (; vaddr < (memdesc->hostptr + memdesc->size); vaddr += PAGE_SIZE) {
- unsigned long paddr = kgsl_virtaddr_to_physaddr(vaddr);
- if (paddr)
- _outer_cache_range_op(op, paddr, PAGE_SIZE);
- }
-}
-#endif
-
-static unsigned long kgsl_userptr_physaddr(struct kgsl_memdesc *memdesc,
- unsigned int offset)
-{
- return kgsl_virtaddr_to_physaddr(memdesc->hostptr + offset);
-}
-
/* Global - also used by kgsl_drm.c */
struct kgsl_memdesc_ops kgsl_vmalloc_ops = {
- .physaddr = kgsl_vmalloc_physaddr,
.free = kgsl_vmalloc_free,
.vmflags = kgsl_vmalloc_vmflags,
.vmfault = kgsl_vmalloc_vmfault,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_vmalloc_outer_cache,
-#endif
};
EXPORT_SYMBOL(kgsl_vmalloc_ops);
static struct kgsl_memdesc_ops kgsl_ebimem_ops = {
- .physaddr = kgsl_contiguous_physaddr,
.free = kgsl_ebimem_free,
.vmflags = kgsl_contiguous_vmflags,
.vmfault = kgsl_contiguous_vmfault,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_contiguous_outer_cache,
-#endif
};
static struct kgsl_memdesc_ops kgsl_coherent_ops = {
- .physaddr = kgsl_contiguous_physaddr,
.free = kgsl_coherent_free,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_contiguous_outer_cache,
-#endif
};
-/* Global - also used by kgsl.c and kgsl_drm.c */
-struct kgsl_memdesc_ops kgsl_contiguous_ops = {
- .physaddr = kgsl_contiguous_physaddr,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_contiguous_outer_cache
-#endif
-};
-EXPORT_SYMBOL(kgsl_contiguous_ops);
-
-/* Global - also used by kgsl.c */
-struct kgsl_memdesc_ops kgsl_userptr_ops = {
- .physaddr = kgsl_userptr_physaddr,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_userptr_outer_cache,
-#endif
-};
-EXPORT_SYMBOL(kgsl_userptr_ops);
-
void kgsl_cache_range_op(struct kgsl_memdesc *memdesc, int op)
{
void *addr = memdesc->hostptr;
@@ -405,8 +334,7 @@
break;
}
- if (memdesc->ops->outer_cache)
- memdesc->ops->outer_cache(memdesc, op);
+ outer_cache_range_op_sg(memdesc->sg, memdesc->sglen, op);
}
EXPORT_SYMBOL(kgsl_cache_range_op);
@@ -415,7 +343,9 @@
struct kgsl_pagetable *pagetable,
void *ptr, size_t size, unsigned int protflags)
{
- int result;
+ int order, ret = 0;
+ int sglen = PAGE_ALIGN(size) / PAGE_SIZE;
+ int i;
memdesc->size = size;
memdesc->pagetable = pagetable;
@@ -423,25 +353,44 @@
memdesc->ops = &kgsl_vmalloc_ops;
memdesc->hostptr = (void *) ptr;
- kgsl_cache_range_op(memdesc, KGSL_CACHE_OP_INV);
-
- result = kgsl_mmu_map(pagetable, memdesc, protflags);
-
- if (result) {
- kgsl_sharedmem_free(memdesc);
- } else {
- int order;
-
- KGSL_STATS_ADD(size, kgsl_driver.stats.vmalloc,
- kgsl_driver.stats.vmalloc_max);
-
- order = get_order(size);
-
- if (order < 16)
- kgsl_driver.stats.histogram[order]++;
+ memdesc->sg = kmalloc(sglen * sizeof(struct scatterlist), GFP_KERNEL);
+ if (memdesc->sg == NULL) {
+ ret = -ENOMEM;
+ goto done;
}
- return result;
+ memdesc->sglen = sglen;
+ sg_init_table(memdesc->sg, sglen);
+
+ for (i = 0; i < memdesc->sglen; i++, ptr += PAGE_SIZE) {
+ struct page *page = vmalloc_to_page(ptr);
+ if (!page) {
+ ret = -EINVAL;
+ goto done;
+ }
+ sg_set_page(&memdesc->sg[i], page, PAGE_SIZE, 0);
+ }
+
+ kgsl_cache_range_op(memdesc, KGSL_CACHE_OP_INV);
+
+ ret = kgsl_mmu_map(pagetable, memdesc, protflags);
+
+ if (ret)
+ goto done;
+
+ KGSL_STATS_ADD(size, kgsl_driver.stats.vmalloc,
+ kgsl_driver.stats.vmalloc_max);
+
+ order = get_order(size);
+
+ if (order < 16)
+ kgsl_driver.stats.histogram[order]++;
+
+done:
+ if (ret)
+ kgsl_sharedmem_free(memdesc);
+
+ return ret;
}
int
@@ -494,24 +443,35 @@
int
kgsl_sharedmem_alloc_coherent(struct kgsl_memdesc *memdesc, size_t size)
{
+ int result = 0;
+
size = ALIGN(size, PAGE_SIZE);
+ memdesc->size = size;
+ memdesc->ops = &kgsl_coherent_ops;
+
memdesc->hostptr = dma_alloc_coherent(NULL, size, &memdesc->physaddr,
GFP_KERNEL);
if (memdesc->hostptr == NULL) {
KGSL_CORE_ERR("dma_alloc_coherent(%d) failed\n", size);
- return -ENOMEM;
+ result = -ENOMEM;
+ goto err;
}
- memdesc->size = size;
- memdesc->ops = &kgsl_coherent_ops;
+ result = memdesc_sg_phys(memdesc, memdesc->physaddr, size);
+ if (result)
+ goto err;
/* Record statistics */
KGSL_STATS_ADD(size, kgsl_driver.stats.coherent,
kgsl_driver.stats.coherent_max);
- return 0;
+err:
+ if (result)
+ kgsl_sharedmem_free(memdesc);
+
+ return result;
}
EXPORT_SYMBOL(kgsl_sharedmem_alloc_coherent);
@@ -523,9 +483,11 @@
if (memdesc->gpuaddr)
kgsl_mmu_unmap(memdesc->pagetable, memdesc);
- if (memdesc->ops->free)
+ if (memdesc->ops && memdesc->ops->free)
memdesc->ops->free(memdesc);
+ kfree(memdesc->sg);
+
memset(memdesc, 0, sizeof(*memdesc));
}
EXPORT_SYMBOL(kgsl_sharedmem_free);
@@ -534,8 +496,11 @@
_kgsl_sharedmem_ebimem(struct kgsl_memdesc *memdesc,
struct kgsl_pagetable *pagetable, size_t size)
{
- int result;
+ int result = 0;
+ memdesc->size = size;
+ memdesc->pagetable = pagetable;
+ memdesc->ops = &kgsl_ebimem_ops;
memdesc->physaddr = allocate_contiguous_ebi_nomap(size, SZ_8K);
if (memdesc->physaddr == 0) {
@@ -544,19 +509,24 @@
return -ENOMEM;
}
- memdesc->size = size;
- memdesc->pagetable = pagetable;
- memdesc->ops = &kgsl_ebimem_ops;
+ result = memdesc_sg_phys(memdesc, memdesc->physaddr, size);
+
+ if (result)
+ goto err;
result = kgsl_mmu_map(pagetable, memdesc,
GSL_PT_PAGE_RV | GSL_PT_PAGE_WV);
if (result)
- kgsl_sharedmem_free(memdesc);
+ goto err;
KGSL_STATS_ADD(size, kgsl_driver.stats.coherent,
kgsl_driver.stats.coherent_max);
+err:
+ if (result)
+ kgsl_sharedmem_free(memdesc);
+
return result;
}
diff --git a/drivers/gpu/msm/kgsl_sharedmem.h b/drivers/gpu/msm/kgsl_sharedmem.h
index 9e57e78..a9abcf9 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.h
+++ b/drivers/gpu/msm/kgsl_sharedmem.h
@@ -13,6 +13,7 @@
#ifndef __KGSL_SHAREDMEM_H
#define __KGSL_SHAREDMEM_H
+#include <linux/slab.h>
#include <linux/dma-mapping.h>
struct kgsl_device;
@@ -26,8 +27,6 @@
#define KGSL_MEMFLAGS_CACHED 0x00000001
struct kgsl_memdesc_ops {
- unsigned long (*physaddr)(struct kgsl_memdesc *, unsigned int);
- void (*outer_cache)(struct kgsl_memdesc *, int);
int (*vmflags)(struct kgsl_memdesc *);
int (*vmfault)(struct kgsl_memdesc *, struct vm_area_struct *,
struct vm_fault *);
@@ -35,8 +34,6 @@
};
extern struct kgsl_memdesc_ops kgsl_vmalloc_ops;
-extern struct kgsl_memdesc_ops kgsl_contiguous_ops;
-extern struct kgsl_memdesc_ops kgsl_userptr_ops;
int kgsl_sharedmem_vmalloc(struct kgsl_memdesc *memdesc,
struct kgsl_pagetable *pagetable, size_t size);
@@ -78,6 +75,22 @@
void kgsl_sharedmem_uninit_sysfs(void);
static inline int
+memdesc_sg_phys(struct kgsl_memdesc *memdesc,
+ unsigned int physaddr, unsigned int size)
+{
+ struct page *page = phys_to_page(physaddr);
+
+ memdesc->sg = kmalloc(sizeof(struct scatterlist) * 1, GFP_KERNEL);
+ if (memdesc->sg == NULL)
+ return -ENOMEM;
+
+ memdesc->sglen = 1;
+ sg_init_table(memdesc->sg, 1);
+ sg_set_page(&memdesc->sg[0], page, size, 0);
+ return 0;
+}
+
+static inline int
kgsl_allocate(struct kgsl_memdesc *memdesc,
struct kgsl_pagetable *pagetable, size_t size)
{
diff --git a/drivers/hwmon/pm8921-adc.c b/drivers/hwmon/pm8921-adc.c
index 5ab6296..33f4a3a 100644
--- a/drivers/hwmon/pm8921-adc.c
+++ b/drivers/hwmon/pm8921-adc.c
@@ -31,6 +31,7 @@
#include <linux/mfd/pm8xxx/pm8921-adc.h>
#include <linux/hwmon.h>
#include <linux/hwmon-sysfs.h>
+#include <linux/wakelock.h>
/* User Bank register set */
#define PM8921_ADC_ARB_USRP_CNTRL1 0x197
@@ -142,6 +143,8 @@
uint32_t mpp_base;
struct sensor_device_attribute *sens_attr;
struct device *hwmon;
+ struct wake_lock adc_wakelock;
+ int msm_suspend_check;
};
struct pm8921_adc_amux_properties {
@@ -188,14 +191,18 @@
static bool pm8921_adc_calib_first_adc;
static bool pm8921_adc_initialized, pm8921_adc_calib_device_init;
-static int32_t pm8921_adc_arb_cntrl(uint32_t arb_cntrl)
+static int32_t pm8921_adc_arb_cntrl(uint32_t arb_cntrl, uint32_t channel)
{
struct pm8921_adc *adc_pmic = pmic_adc;
int i, rc;
u8 data_arb_cntrl = 0;
- if (arb_cntrl)
+ if (arb_cntrl) {
+ if (adc_pmic->msm_suspend_check)
+ pr_err("PM8921 ADC request being made after suspend "
+ "irq with channel id:%d\n", channel);
data_arb_cntrl |= PM8921_ADC_ARB_USRP_CNTRL1_EN_ARB;
+ }
/* Write twice to the CNTRL register for the arbiter settings
to take into effect */
@@ -212,6 +219,13 @@
data_arb_cntrl |= PM8921_ADC_ARB_USRP_CNTRL1_REQ;
rc = pm8xxx_writeb(adc_pmic->dev->parent,
PM8921_ADC_ARB_USRP_CNTRL1, data_arb_cntrl);
+ if (rc < 0) {
+ pr_err("PM8921 arb cntrl write failed with %d\n", rc);
+ return rc;
+ }
+ wake_lock(&adc_pmic->adc_wakelock);
+ } else {
+ wake_unlock(&adc_pmic->adc_wakelock);
}
return 0;
@@ -369,7 +383,7 @@
if (!pm8921_adc_calib_first_adc)
enable_irq(adc_pmic->adc_irq);
- rc = pm8921_adc_arb_cntrl(1);
+ rc = pm8921_adc_arb_cntrl(1, chan_prop->amux_mpp_channel);
if (rc < 0) {
pr_err("Configuring ADC Arbiter"
"enable failed with %d\n", rc);
@@ -409,7 +423,7 @@
/* Default value for switching off the arbiter after reading
the ADC value. Bit 0 set to 0. */
- rc = pm8921_adc_arb_cntrl(0);
+ rc = pm8921_adc_arb_cntrl(0, CHANNEL_MUXOFF);
if (rc < 0) {
pr_err("%s: Configuring ADC Arbiter disable"
"failed\n", __func__);
@@ -558,7 +572,7 @@
(calib_read_1 - calib_read_2);
adc_pmic->conv->chan_prop->adc_graph[ADC_CALIB_ABSOLUTE].dx
= PM8921_CHANNEL_ADC_625_MV;
- rc = pm8921_adc_arb_cntrl(0);
+ rc = pm8921_adc_arb_cntrl(0, CHANNEL_MUXOFF);
if (rc < 0) {
pr_err("%s: Configuring ADC Arbiter disable"
"failed\n", __func__);
@@ -638,7 +652,7 @@
adc_pmic->conv->chan_prop->adc_graph[ADC_CALIB_RATIOMETRIC].dx =
adc_pmic->adc_prop->adc_vdd_reference;
calib_fail:
- rc = pm8921_adc_arb_cntrl(0);
+ rc = pm8921_adc_arb_cntrl(0, CHANNEL_MUXOFF);
if (rc < 0) {
pr_err("%s: Configuring ADC Arbiter disable"
"failed\n", __func__);
@@ -1122,11 +1136,43 @@
return rc;
}
+#ifdef CONFIG_PM
+static int pm8921_adc_suspend_noirq(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct pm8921_adc *adc_pmic = platform_get_drvdata(pdev);
+
+ adc_pmic->msm_suspend_check = 1;
+
+ return 0;
+}
+
+static int pm8921_adc_resume_noirq(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct pm8921_adc *adc_pmic = platform_get_drvdata(pdev);
+
+ adc_pmic->msm_suspend_check = 0;
+
+ return 0;
+}
+
+static const struct dev_pm_ops pm8921_adc_dev_pm_ops = {
+ .suspend_noirq = pm8921_adc_suspend_noirq,
+ .resume_noirq = pm8921_adc_resume_noirq,
+};
+
+#define PM8921_ADC_DEV_PM_OPS (&pm8921_adc_dev_pm_ops)
+#else
+#define PM8921_ADC_DEV_PM_OPS NULL
+#endif
+
static int __devexit pm8921_adc_teardown(struct platform_device *pdev)
{
struct pm8921_adc *adc_pmic = pmic_adc;
int i;
+ wake_lock_destroy(&adc_pmic->adc_wakelock);
free_irq(adc_pmic->adc_irq, adc_pmic);
free_irq(adc_pmic->btm_warm_irq, adc_pmic);
free_irq(adc_pmic->btm_cool_irq, adc_pmic);
@@ -1262,6 +1308,8 @@
INIT_WORK(&adc_pmic->warm_work, pm8921_adc_btm_warm_scheduler_fn);
INIT_WORK(&adc_pmic->cool_work, pm8921_adc_btm_cool_scheduler_fn);
+ wake_lock_init(&adc_pmic->adc_wakelock, WAKE_LOCK_SUSPEND,
+ "pm8921_adc_wakelock");
create_debugfs_entries();
pm8921_adc_calib_first_adc = false;
pm8921_adc_calib_device_init = false;
@@ -1286,6 +1334,7 @@
.driver = {
.name = PM8921_ADC_DEV_NAME,
.owner = THIS_MODULE,
+ .pm = PM8921_ADC_DEV_PM_OPS,
},
};
diff --git a/drivers/i2c/busses/i2c-qup.c b/drivers/i2c/busses/i2c-qup.c
index 00c7633..7a3df4d1 100644
--- a/drivers/i2c/busses/i2c-qup.c
+++ b/drivers/i2c/busses/i2c-qup.c
@@ -601,9 +601,18 @@
{
int total_len = 0;
int ret = 0;
- if (dev->msg->len >= (dev->out_fifo_sz - 1)) {
- total_len = dev->msg->len + 1 +
- (dev->msg->len/(dev->out_blk_sz-1));
+ int len = dev->msg->len;
+ struct i2c_msg *next = NULL;
+ if (rem > 1)
+ next = dev->msg + 1;
+ while (rem > 1 && next->flags == 0) {
+ len += next->len + 1;
+ next = next + 1;
+ rem--;
+ }
+ if (len >= (dev->out_fifo_sz - 1)) {
+ total_len = len + 1 + (len/(dev->out_blk_sz-1));
+
writel_relaxed(QUP_WR_BLK_MODE | QUP_PACK_EN | QUP_UNPACK_EN,
dev->base + QUP_IO_MODE);
dev->wr_sz = dev->out_blk_sz;
@@ -612,7 +621,6 @@
dev->base + QUP_IO_MODE);
if (rem > 1) {
- struct i2c_msg *next = dev->msg + 1;
if (next->addr == dev->msg->addr &&
next->flags == I2C_M_RD) {
qup_set_read_mode(dev, next->len);
diff --git a/drivers/input/keyboard/pmic8xxx-keypad.c b/drivers/input/keyboard/pmic8xxx-keypad.c
index f0629ce..0866332 100644
--- a/drivers/input/keyboard/pmic8xxx-keypad.c
+++ b/drivers/input/keyboard/pmic8xxx-keypad.c
@@ -710,9 +710,9 @@
return 0;
err_pmic_reg_read:
- free_irq(kp->key_stuck_irq, NULL);
+ free_irq(kp->key_stuck_irq, kp);
err_req_stuck_irq:
- free_irq(kp->key_sense_irq, NULL);
+ free_irq(kp->key_sense_irq, kp);
err_gpio_config:
err_get_irq:
input_free_device(kp->input);
@@ -727,8 +727,8 @@
struct pmic8xxx_kp *kp = platform_get_drvdata(pdev);
device_init_wakeup(&pdev->dev, 0);
- free_irq(kp->key_stuck_irq, NULL);
- free_irq(kp->key_sense_irq, NULL);
+ free_irq(kp->key_stuck_irq, kp);
+ free_irq(kp->key_sense_irq, kp);
input_unregister_device(kp->input);
kfree(kp);
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index aaa650b..87cdb02 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -414,6 +414,18 @@
help
This enables support for Synaptics RMI over I2C based touchscreens.
+config TOUCHSCREEN_SYNAPTICS_RMI4_I2C
+ tristate "Synaptics i2c touchscreen(ClearPad 3000)"
+ depends on I2C
+ select SYNA_MULTI_TOUCH
+ help
+ This enables support for Synaptics RMI over I2C based touchscreens(ClearPad 3000).
+
+config SYNA_MULTI_TOUCH
+ tristate "Synaptics i2c touchscreen(ClearPad 3000) MutilTouch support"
+ depends on TOUCHSCREEN_SYNAPTICS_RMI4_I2C
+ default y
+
config TOUCHSCREEN_TOUCHRIGHT
tristate "Touchright serial touchscreen"
select SERIO
diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
index bfe9daf..1d67427 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -48,6 +48,7 @@
obj-$(CONFIG_TOUCHSCREEN_STMPE) += stmpe-ts.o
obj-$(CONFIG_TOUCHSCREEN_TNETV107X) += tnetv107x-ts.o
obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI) += synaptics_i2c_rmi.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C) +=synaptics/
obj-$(CONFIG_TOUCHSCREEN_TOUCHIT213) += touchit213.o
obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o
obj-$(CONFIG_TOUCHSCREEN_TOUCHWIN) += touchwin.o
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c b/drivers/input/touchscreen/atmel_mxt_ts.c
index c9a5ba2..4d97331 100644
--- a/drivers/input/touchscreen/atmel_mxt_ts.c
+++ b/drivers/input/touchscreen/atmel_mxt_ts.c
@@ -3,6 +3,7 @@
*
* Copyright (C) 2010 Samsung Electronics Co.Ltd
* Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -180,10 +181,12 @@
#define MXT_VTG_MIN_UV 2700000
#define MXT_VTG_MAX_UV 3300000
#define MXT_ACTIVE_LOAD_UA 15000
+#define MXT_LPM_LOAD_UA 10
#define MXT_I2C_VTG_MIN_UV 1800000
#define MXT_I2C_VTG_MAX_UV 1800000
#define MXT_I2C_LOAD_UA 10000
+#define MXT_I2C_LPM_LOAD_UA 10
/* Define for MXT_GEN_COMMAND */
#define MXT_BOOT_VALUE 0xa5
@@ -196,6 +199,8 @@
#define MXT_FWRESET_TIME 175 /* msec */
+#define MXT_WAKE_TIME 25
+
/* Command to unlock bootloader */
#define MXT_UNLOCK_CMD_MSB 0xaa
#define MXT_UNLOCK_CMD_LSB 0xdc
@@ -229,7 +234,9 @@
#define MXT_MAX_FINGER 10
#define MXT_BUFF_SIZE 100
-#define T7_DATA_SIZE 3
+#define T7_DATA_SIZE 3
+#define MXT_MAX_RW_TRIES 3
+#define MXT_BLOCK_SIZE 256
struct mxt_info {
u8 family_id;
@@ -274,14 +281,14 @@
struct mxt_info info;
struct mxt_finger finger[MXT_MAX_FINGER];
unsigned int irq;
- unsigned int max_x;
- unsigned int max_y;
struct regulator *vcc;
struct regulator *vcc_i2c;
#if defined(CONFIG_HAS_EARLYSUSPEND)
struct early_suspend early_suspend;
#endif
+
u8 t7_data[T7_DATA_SIZE];
+ u16 t7_start_addr;
u8 t9_ctrl;
};
@@ -416,6 +423,7 @@
{
struct i2c_msg xfer[2];
u8 buf[2];
+ int i = 0;
buf[0] = reg & 0xff;
buf[1] = (reg >> 8) & 0xff;
@@ -432,12 +440,14 @@
xfer[1].len = len;
xfer[1].buf = val;
- if (i2c_transfer(client->adapter, xfer, 2) != 2) {
- dev_err(&client->dev, "%s: i2c transfer failed\n", __func__);
- return -EIO;
- }
+ do {
+ if (i2c_transfer(client->adapter, xfer, 2) == 2)
+ return 0;
+ msleep(MXT_WAKE_TIME);
+ } while (++i < MXT_MAX_RW_TRIES);
- return 0;
+ dev_err(&client->dev, "%s: i2c transfer failed\n", __func__);
+ return -EIO;
}
static int mxt_read_reg(struct i2c_client *client, u16 reg, u8 *val)
@@ -445,20 +455,33 @@
return __mxt_read_reg(client, reg, 1, val);
}
+static int __mxt_write_reg(struct i2c_client *client,
+ u16 addr, u16 length, u8 *value)
+{
+ u8 buf[MXT_BLOCK_SIZE + 2];
+ int i, tries = 0;
+
+ if (length > MXT_BLOCK_SIZE)
+ return -EINVAL;
+
+ buf[0] = addr & 0xff;
+ buf[1] = (addr >> 8) & 0xff;
+ for (i = 0; i < length; i++)
+ buf[i + 2] = *value++;
+
+ do {
+ if (i2c_master_send(client, buf, length + 2) == (length + 2))
+ return 0;
+ msleep(MXT_WAKE_TIME);
+ } while (++tries < MXT_MAX_RW_TRIES);
+
+ dev_err(&client->dev, "%s: i2c send failed\n", __func__);
+ return -EIO;
+}
+
static int mxt_write_reg(struct i2c_client *client, u16 reg, u8 val)
{
- u8 buf[3];
-
- buf[0] = reg & 0xff;
- buf[1] = (reg >> 8) & 0xff;
- buf[2] = val;
-
- if (i2c_master_send(client, buf, 3) != 3) {
- dev_err(&client->dev, "%s: i2c send failed\n", __func__);
- return -EIO;
- }
-
- return 0;
+ return __mxt_write_reg(client, reg, 1, &val);
}
static int mxt_read_object_table(struct i2c_client *client,
@@ -591,9 +614,9 @@
x = (message->message[1] << 4) | ((message->message[3] >> 4) & 0xf);
y = (message->message[2] << 4) | ((message->message[3] & 0xf));
- if (data->max_x < 1024)
+ if (data->pdata->x_size < 1024)
x = x >> 2;
- if (data->max_y < 1024)
+ if (data->pdata->y_size < 1024)
y = y >> 2;
area = message->message[4];
@@ -705,54 +728,6 @@
return 0;
}
-static void mxt_handle_pdata(struct mxt_data *data)
-{
- const struct mxt_platform_data *pdata = data->pdata;
- u8 voltage;
-
- /* Set touchscreen lines */
- mxt_write_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_XSIZE,
- pdata->x_line);
- mxt_write_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_YSIZE,
- pdata->y_line);
-
- /* Set touchscreen orient */
- mxt_write_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_ORIENT,
- pdata->orient);
-
- /* Set touchscreen burst length */
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_BLEN, pdata->blen);
-
- /* Set touchscreen threshold */
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_TCHTHR, pdata->threshold);
-
- /* Set touchscreen resolution */
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_XRANGE_LSB, (pdata->x_size - 1) & 0xff);
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_XRANGE_MSB, (pdata->x_size - 1) >> 8);
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_YRANGE_LSB, (pdata->y_size - 1) & 0xff);
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_YRANGE_MSB, (pdata->y_size - 1) >> 8);
-
- /* Set touchscreen voltage */
- if (pdata->voltage) {
- if (pdata->voltage < MXT_VOLTAGE_DEFAULT) {
- voltage = (MXT_VOLTAGE_DEFAULT - pdata->voltage) /
- MXT_VOLTAGE_STEP;
- voltage = 0xff - voltage + 1;
- } else
- voltage = (pdata->voltage - MXT_VOLTAGE_DEFAULT) /
- MXT_VOLTAGE_STEP;
-
- mxt_write_object(data, MXT_SPT_CTECONFIG,
- MXT_CTE_VOLTAGE, voltage);
- }
-}
-
static int mxt_get_info(struct mxt_data *data)
{
struct i2c_client *client = data->client;
@@ -840,10 +815,11 @@
{
struct i2c_client *client = data->client;
struct mxt_info *info = &data->info;
- int error, i;
+ int error;
int timeout_counter = 0;
u8 val;
u8 command_register;
+ struct mxt_object *t7_object;
error = mxt_get_info(data);
if (error)
@@ -868,14 +844,19 @@
return error;
/* Store T7 and T9 locally, used in suspend/resume operations */
- for (i = 0; i < T7_DATA_SIZE; i++) {
- error = mxt_read_object(data, MXT_GEN_POWER, i,
- &data->t7_data[i]);
- if (error < 0) {
- dev_err(&client->dev,
- "failed to save current power state\n");
- return error;
- }
+ t7_object = mxt_get_object(data, MXT_GEN_POWER);
+ if (!t7_object) {
+ dev_err(&client->dev, "Failed to get T7 object\n");
+ return -EINVAL;
+ }
+
+ data->t7_start_addr = t7_object->start_address;
+ error = __mxt_read_reg(client, data->t7_start_addr,
+ T7_DATA_SIZE, data->t7_data);
+ if (error < 0) {
+ dev_err(&client->dev,
+ "failed to save current power state\n");
+ return error;
}
error = mxt_read_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_CTRL,
&data->t9_ctrl);
@@ -884,8 +865,6 @@
return error;
}
- mxt_handle_pdata(data);
-
/* Backup to memory */
mxt_write_object(data, MXT_GEN_COMMAND,
MXT_COMMAND_BACKUPNV,
@@ -935,20 +914,6 @@
return 0;
}
-static void mxt_calc_resolution(struct mxt_data *data)
-{
- unsigned int max_x = data->pdata->x_size - 1;
- unsigned int max_y = data->pdata->y_size - 1;
-
- if (data->pdata->orient & MXT_XY_SWITCH) {
- data->max_x = max_y;
- data->max_y = max_x;
- } else {
- data->max_x = max_x;
- data->max_y = max_y;
- }
-}
-
static ssize_t mxt_object_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -1108,17 +1073,17 @@
static int mxt_start(struct mxt_data *data)
{
- int i, error;
+ int error;
+
/* restore the old power state values and reenable touch */
- for (i = 0; i < T7_DATA_SIZE; i++) {
- error = mxt_write_object(data, MXT_GEN_POWER, i,
- data->t7_data[i]);
- if (error < 0) {
- dev_err(&data->client->dev,
- "failed to restore old power state\n");
- return error;
- }
+ error = __mxt_write_reg(data->client, data->t7_start_addr,
+ T7_DATA_SIZE, data->t7_data);
+ if (error < 0) {
+ dev_err(&data->client->dev,
+ "failed to restore old power state\n");
+ return error;
}
+
error = mxt_write_object(data,
MXT_TOUCH_MULTI, MXT_TOUCH_CTRL, data->t9_ctrl);
if (error < 0) {
@@ -1131,22 +1096,21 @@
static int mxt_stop(struct mxt_data *data)
{
- int i, error;
- /* configure deep sleep mode and disable touch */
- for (i = 0; i < T7_DATA_SIZE; i++) {
- error = mxt_write_object(data, MXT_GEN_POWER, i, 0);
- if (error < 0) {
- dev_err(&data->client->dev,
- "failed to configure deep sleep mode\n");
- return error;
- }
+ int error;
+ u8 t7_data[T7_DATA_SIZE] = {0};
+
+ /* disable touch and configure deep sleep mode */
+ error = mxt_write_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_CTRL, 0);
+ if (error < 0) {
+ dev_err(&data->client->dev, "failed to disable touch\n");
+ return error;
}
- error = mxt_write_object(data,
- MXT_TOUCH_MULTI, MXT_TOUCH_CTRL, 0);
+ error = __mxt_write_reg(data->client, data->t7_start_addr,
+ T7_DATA_SIZE, t7_data);
if (error < 0) {
dev_err(&data->client->dev,
- "failed to disable touch\n");
+ "failed to configure deep sleep mode\n");
return error;
}
@@ -1308,6 +1272,68 @@
}
#ifdef CONFIG_PM
+static int mxt_regulator_lpm(struct mxt_data *data, bool on)
+{
+
+ int rc;
+
+ if (on == false)
+ goto regulator_hpm;
+
+ rc = regulator_set_optimum_mode(data->vcc, MXT_LPM_LOAD_UA);
+ if (rc < 0) {
+ dev_err(&data->client->dev,
+ "Regulator set_opt failed rc=%d\n", rc);
+ goto fail_regulator_lpm;
+ }
+
+ if (data->pdata->i2c_pull_up) {
+ rc = regulator_set_optimum_mode(data->vcc_i2c,
+ MXT_I2C_LPM_LOAD_UA);
+ if (rc < 0) {
+ dev_err(&data->client->dev,
+ "Regulator set_opt failed rc=%d\n", rc);
+ goto fail_regulator_lpm;
+ }
+ }
+
+ return 0;
+
+regulator_hpm:
+
+ rc = regulator_set_optimum_mode(data->vcc, MXT_ACTIVE_LOAD_UA);
+ if (rc < 0) {
+ dev_err(&data->client->dev,
+ "Regulator set_opt failed rc=%d\n", rc);
+ goto fail_regulator_hpm;
+ }
+
+ if (data->pdata->i2c_pull_up) {
+ rc = regulator_set_optimum_mode(data->vcc_i2c, MXT_I2C_LOAD_UA);
+ if (rc < 0) {
+ dev_err(&data->client->dev,
+ "Regulator set_opt failed rc=%d\n", rc);
+ goto fail_regulator_hpm;
+ }
+ }
+
+ return 0;
+
+fail_regulator_lpm:
+ regulator_set_optimum_mode(data->vcc, MXT_ACTIVE_LOAD_UA);
+ if (data->pdata->i2c_pull_up)
+ regulator_set_optimum_mode(data->vcc_i2c, MXT_I2C_LOAD_UA);
+
+ return rc;
+
+fail_regulator_hpm:
+ regulator_set_optimum_mode(data->vcc, MXT_LPM_LOAD_UA);
+ if (data->pdata->i2c_pull_up)
+ regulator_set_optimum_mode(data->vcc_i2c, MXT_I2C_LPM_LOAD_UA);
+
+ return rc;
+}
+
static int mxt_suspend(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
@@ -1320,7 +1346,7 @@
if (input_dev->users) {
error = mxt_stop(data);
if (error < 0) {
- dev_err(&client->dev, "mxt_stop failed in suspend\n");
+ dev_err(dev, "mxt_stop failed in suspend\n");
mutex_unlock(&input_dev->mutex);
return error;
}
@@ -1329,6 +1355,13 @@
mutex_unlock(&input_dev->mutex);
+ /* put regulators in low power mode */
+ error = mxt_regulator_lpm(data, true);
+ if (error < 0) {
+ dev_err(dev, "failed to enter low power mode\n");
+ return error;
+ }
+
return 0;
}
@@ -1338,18 +1371,20 @@
struct mxt_data *data = i2c_get_clientdata(client);
struct input_dev *input_dev = data->input_dev;
int error;
- /* Soft reset */
- mxt_write_object(data, MXT_GEN_COMMAND,
- MXT_COMMAND_RESET, 1);
- mxt_reset_delay(data);
+ /* put regulators in high power mode */
+ error = mxt_regulator_lpm(data, false);
+ if (error < 0) {
+ dev_err(dev, "failed to enter high power mode\n");
+ return error;
+ }
mutex_lock(&input_dev->mutex);
if (input_dev->users) {
error = mxt_start(data);
if (error < 0) {
- dev_err(&client->dev, "mxt_start failed in resume\n");
+ dev_err(dev, "mxt_start failed in resume\n");
mutex_unlock(&input_dev->mutex);
return error;
}
@@ -1414,25 +1449,23 @@
data->pdata = pdata;
data->irq = client->irq;
- mxt_calc_resolution(data);
-
__set_bit(EV_ABS, input_dev->evbit);
__set_bit(EV_KEY, input_dev->evbit);
__set_bit(BTN_TOUCH, input_dev->keybit);
/* For single touch */
input_set_abs_params(input_dev, ABS_X,
- 0, data->max_x, 0, 0);
+ 0, data->pdata->x_size, 0, 0);
input_set_abs_params(input_dev, ABS_Y,
- 0, data->max_y, 0, 0);
+ 0, data->pdata->y_size, 0, 0);
/* For multi touch */
input_set_abs_params(input_dev, ABS_MT_TOUCH_MAJOR,
0, MXT_MAX_AREA, 0, 0);
input_set_abs_params(input_dev, ABS_MT_POSITION_X,
- 0, data->max_x, 0, 0);
+ 0, data->pdata->x_size, 0, 0);
input_set_abs_params(input_dev, ABS_MT_POSITION_Y,
- 0, data->max_y, 0, 0);
+ 0, data->pdata->y_size, 0, 0);
input_set_drvdata(input_dev, data);
i2c_set_clientdata(client, data);
diff --git a/drivers/input/touchscreen/synaptics/Makefile b/drivers/input/touchscreen/synaptics/Makefile
new file mode 100644
index 0000000..32cbd76
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/Makefile
@@ -0,0 +1,11 @@
+CFLAGS_rmi_bus.o := -DDEBUG
+CFLAGS_rmi_sensor.o := -DDEBUG
+CFLAGS_rmi_function.o := -DDEBUG
+CFLAGS_rmi_f01.o := -DDEBUG
+CFLAGS_rmi_f05.o := -DDEBUG
+CFLAGS_rmi_f11.o := -DDEBUG
+CFLAGS_rmi_f19.o := -DDEBUG
+CFLAGS_rmi_f34.o := -DDEBUG
+CFLAGS_rmi_i2c.o := -DDEBUG
+CFLAGS_rmi_spi.o := -DDEBUG
+obj-y += rmi_bus.o rmi_sensor.o rmi_function.o rmi_f01.o rmi_f05.o rmi_f11.o rmi_f19.o rmi_f34.o rmi_i2c.o
diff --git a/drivers/input/touchscreen/synaptics/rmi.h b/drivers/input/touchscreen/synaptics/rmi.h
new file mode 100644
index 0000000..7484258
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi.h
@@ -0,0 +1,164 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) Header File.
+ * Copyright (c) 2007 - 2011, Synaptics Incorporated
+ *
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+#ifndef _RMI_H
+#define _RMI_H
+
+/* RMI4 Protocol Support
+ */
+
+/* For each function present on the RMI device, we need to get the RMI4 Function
+ * Descriptor info from the Page Descriptor Table. This will give us the
+ * addresses for Query, Command, Control, Data and the Source Count (number
+ * of sources for this function) and the function id.
+ */
+struct rmi_function_descriptor {
+ unsigned char queryBaseAddr;
+ unsigned char commandBaseAddr;
+ unsigned char controlBaseAddr;
+ unsigned char dataBaseAddr;
+ unsigned char interruptSrcCnt;
+ unsigned char functionNum;
+};
+
+/* This encapsulates the information found using the RMI4 Function $01
+ * query registers. There is only one Function $01 per device.
+ *
+ * Assuming appropriate endian-ness, you can populate most of this
+ * structure by reading query registers starting at the query base address
+ * that was obtained from RMI4 function 0x01 function descriptor info read
+ * from the Page Descriptor Table.
+ *
+ * Specific register information is provided in the comments for each field.
+ * For further reference, please see the "Synaptics RMI 4 Interfacing
+ * Guide" document : go to http://www.synaptics.com/developers/manuals - and
+ * select "Synaptics RMI 4 Interfacting Guide".
+ */
+struct rmi_F01_query {
+ /* The manufacturer identification byte.*/
+ unsigned char mfgid;
+
+ /* The Product Properties information.*/
+ unsigned char properties;
+
+ /* The product info bytes.*/
+ unsigned char prod_info[2];
+
+ /* Date Code - Year, Month, Day.*/
+ unsigned char date_code[3];
+
+ /* Tester ID (14 bits).*/
+ unsigned short tester_id;
+
+ /* Serial Number (14 bits).*/
+ unsigned short serial_num;
+
+ /* A null-terminated string that identifies this particular product.*/
+ char prod_id[11];
+};
+
+/* This encapsulates the F01 Device Control control registers.
+ * TODO: This isn't right. The number of interrupt enables needs to be determined
+ * dynamically as the sensor is initialized. Fix this.
+ */
+struct rmi_F01_control {
+ unsigned char deviceControl;
+ unsigned char interruptEnable[1];
+};
+
+/** This encapsulates the F01 Device Control data registers.
+ * TODO: This isn't right. The number of irqs needs to be determined
+ * dynamically as the sensor is initialized. Fix this.
+ */
+struct rmi_F01_data {
+ unsigned char deviceStatus;
+ unsigned char irqs[1];
+};
+
+
+/**********************************************************/
+
+/** This is the data read from the F11 query registers.
+ */
+struct rmi_F11_device_query {
+ bool hasQuery9;
+ unsigned char numberOfSensors;
+};
+
+struct rmi_F11_sensor_query {
+ bool configurable;
+ bool hasSensitivityAdjust;
+ bool hasGestures;
+ bool hasAbs;
+ bool hasRel;
+ unsigned char numberOfFingers;
+ unsigned char numberOfXElectrodes;
+ unsigned char numberOfYElectrodes;
+ unsigned char maximumElectrodes;
+ bool hasAnchoredFinger;
+ unsigned char absDataSize;
+};
+
+struct rmi_F11_control {
+ bool relativeBallistics;
+ bool relativePositionFilter;
+ bool absolutePositionFilter;
+ unsigned char reportingMode;
+ bool manuallyTrackedFinger;
+ bool manuallyTrackedFingerEnable;
+ unsigned char motionSensitivity;
+ unsigned char palmDetectThreshold;
+ unsigned char deltaXPosThreshold;
+ unsigned char deltaYPosThreshold;
+ unsigned char velocity;
+ unsigned char acceleration;
+ unsigned short sensorMaxXPos;
+ unsigned short sensorMaxYPos;
+};
+
+
+/**********************************************************/
+
+/** This is the data read from the F19 query registers.
+ */
+struct rmi_F19_query {
+ bool hasHysteresisThreshold;
+ bool hasSensitivityAdjust;
+ bool configurable;
+ unsigned char buttonCount;
+};
+
+struct rmi_F19_control {
+ unsigned char buttonUsage;
+ unsigned char filterMode;
+ unsigned char *intEnableRegisters;
+ unsigned char *singleButtonControl;
+ unsigned char *sensorMap;
+ unsigned char *singleButtonSensitivity;
+ unsigned char globalSensitivityAdjustment;
+ unsigned char globalHysteresisThreshold;
+};
+
+#endif
diff --git a/drivers/input/touchscreen/synaptics/rmi_bus.c b/drivers/input/touchscreen/synaptics/rmi_bus.c
new file mode 100644
index 0000000..c24ee22
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_bus.c
@@ -0,0 +1,401 @@
+/**
+ * Synaptics Register Mapped Interface (RMI4) - RMI Bus Module.
+ * Copyright (C) 2007 - 2011, Synaptics Incorporated
+ *
+ * Impliments "rmi" bus per Documentation/driver-model/bus.txt
+ *
+ * This protocol is layered as follows.
+ *
+ *
+ *
+ * +-------+ +-------+ +-------+ +--------+
+ * | Fn32 | | Fn11| | Fn19 | | Fn11 | Devices/Functions
+ * *---|---+ +--|----+ +----|--+ +----|---* (2D, cap. btns, etc.)
+ * | | | |
+ * +----------------+ +----------------+
+ * | Sensor0 | | Sensor1 | Sensors Dev/Drivers
+ * +----------------+ +----------------+ (a sensor has one or
+ * | | more functions)
+ * | |
+ * +----------------------------------------+
+ * | |
+ * | RMI4 Bus | RMI Bus Layer
+ * | (this file) |
+ * *--|-----|------|--------------|---------*
+ * | | | |
+ * | | | |
+ * +-----+-----+-------+--------------------+
+ * | I2C | SPI | SMBus | etc. | Physical Layer
+ * +-----+-----+-------+--------------------+
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+static const char busname[] = "rmi";
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/hrtimer.h>
+#include <linux/list.h>
+#include <linux/miscdevice.h>
+#include <linux/fs.h>
+#include <linux/delay.h>
+#include <linux/uaccess.h>
+#include <linux/slab.h>
+#include <linux/input/rmi_platformdata.h>
+
+#include "rmi_drvr.h"
+#include "rmi.h"
+#include "rmi_bus.h"
+#include "rmi_sensor.h"
+#include "rmi_function.h"
+
+/* list of physical drivers - i2c, spi, etc. */
+static LIST_HEAD(phys_drivers);
+static DEFINE_MUTEX(phys_drivers_mutex);
+
+/* list of sensors found on a physical bus (i2c, smi, etc.)*/
+static LIST_HEAD(sensor_drivers);
+static DEFINE_MUTEX(sensor_drivers_mutex);
+static LIST_HEAD(sensor_devices);
+static DEFINE_MUTEX(sensor_devices_mutex);
+
+#define PDT_START_SCAN_LOCATION 0x00E9
+#define PDT_END_SCAN_LOCATION 0x0005
+#define PDT_ENTRY_SIZE 0x0006
+
+/* definitions for rmi bus */
+struct device rmi_bus_device;
+
+struct bus_type rmi_bus_type;
+EXPORT_SYMBOL(rmi_bus_type);
+
+
+/*
+ * This method is called, perhaps multiple times, whenever a new device or driver
+ * is added for this bus. It should return a nonzero value if the given device can be
+ * handled by the given driver. This function must be handled at the bus level,
+ * because that is where the proper logic exists; the core kernel cannot know how
+ * to match devices and drivers for every possible bus type
+ * The match function does a comparison between the hardware ID provided by
+ * the device itself and the IDs supported by the driver.
+ *
+ */
+static int rmi_bus_match(struct device *dev, struct device_driver *driver)
+{
+ printk(KERN_DEBUG "%s: Matching %s for rmi bus.\n", __func__, dev->bus->name);
+ return !strncmp(dev->bus->name, driver->name, strlen(driver->name));
+}
+
+/** Stub for now.
+ */
+static int rmi_bus_suspend(struct device *dev, pm_message_t state)
+{
+ printk(KERN_INFO "%s: RMI bus suspending.", __func__);
+ return 0;
+}
+
+/** Stub for now.
+ */
+static int rmi_bus_resume(struct device *dev)
+{
+ printk(KERN_INFO "%s: RMI bus resuming.", __func__);
+ return 0;
+}
+
+/*
+ * This method is called, whenever a new device is added for this bus.
+ * It will scan the devices PDT to get the function $01 query, control,
+ * command and data regsiters so that it can create a function $01 (sensor)
+ * device for the new physical device. It also caches the PDT for later use by
+ * other functions that are created for the device. For example, if a function
+ * $11 is found it will need the query, control, command and data register
+ * addresses for that function. The new function could re-scan the PDT but
+ * since it is being done here we can cache it and keep it around.
+ *
+ * TODO: If the device is reset or some action takes place that would invalidate
+ * the PDT - such as a reflash of the firmware - then the device should be re-added
+ * to the bus and the PDT re-scanned and cached.
+ *
+ */
+int rmi_register_sensor(struct rmi_phys_driver *rpd, struct rmi_sensordata *sensordata)
+{
+ int i;
+ int pdt_entry_count = 0;
+ struct rmi_sensor_device *rmi_sensor_dev;
+ struct rmi_function_info *rfi;
+ struct rmi_function_descriptor rmi_fd;
+ int retval;
+ static int index;
+
+ /* Make sure we have a read, write, read_multiple, write_multiple
+ function pointers from whatever physical layer the sensor is on.
+ */
+ if (!rpd->name) {
+ printk(KERN_ERR "%s: Physical driver must specify a name",
+ __func__);
+ return -EINVAL;
+ }
+ if (!rpd->write) {
+ printk(KERN_ERR
+ "%s: Physical driver %s must specify a writer.",
+ __func__, rpd->name);
+ return -EINVAL;
+ }
+ if (!rpd->read) {
+ printk(KERN_ERR
+ "%s: Physical driver %s must specify a reader.",
+ __func__, rpd->name);
+ return -EINVAL;
+ }
+ if (!rpd->write_multiple) {
+ printk(KERN_ERR "%s: Physical driver %s must specify a "
+ "multiple writer.",
+ __func__, rpd->name);
+ return -EINVAL;
+ }
+ if (!rpd->read_multiple) {
+ printk(KERN_ERR "%s: Physical driver %s must specify a "
+ "multiple reader.",
+ __func__, rpd->name);
+ return -EINVAL;
+ }
+
+ /* Get some information from the device */
+ printk(KERN_DEBUG "%s: Identifying sensors by presence of F01...", __func__);
+
+ rmi_sensor_dev = NULL;
+
+ /* Scan the page descriptor table until we find F01. If we find that,
+ * we assume that we can reliably talk to this sensor.
+ */
+ for (i = PDT_START_SCAN_LOCATION; /* Register the rmi sensor driver */
+ i >= PDT_END_SCAN_LOCATION;
+ i -= PDT_ENTRY_SIZE) {
+ retval = rpd->read_multiple(rpd, i, (char *)&rmi_fd,
+ sizeof(rmi_fd));
+ if (!retval) {
+ rfi = NULL;
+
+ if (rmi_fd.functionNum != 0x00 && rmi_fd.functionNum != 0xff) {
+ pdt_entry_count++;
+ if ((rmi_fd.functionNum & 0xff) == 0x01) {
+ printk(KERN_DEBUG "%s: F01 Found - RMI Device Control", __func__);
+
+ /* This appears to be a valid device, so create a sensor
+ * device and sensor driver for it. */
+ rmi_sensor_dev = kzalloc(sizeof(*rmi_sensor_dev), GFP_KERNEL);
+ if (!rmi_sensor_dev) {
+ printk(KERN_ERR "%s: Error allocating memory for rmi_sensor_device\n", __func__);
+ retval = -ENOMEM;
+ goto exit_fail;
+ }
+ rmi_sensor_dev->dev.bus = &rmi_bus_type;
+
+ retval = rmi_sensor_register_device(rmi_sensor_dev, index++);
+ if (retval < 0) {
+ printk(KERN_ERR "%s: Error %d registering sensor device.", __func__, retval);
+ goto exit_fail;
+ }
+
+ rmi_sensor_dev->driver = kzalloc(sizeof(struct rmi_sensor_driver), GFP_KERNEL);
+ if (!rmi_sensor_dev->driver) {
+ printk(KERN_ERR "%s: Error allocating memory for rmi_sensor_driver\n", __func__);
+ retval = -ENOMEM;
+ goto exit_fail;
+ }
+ rmi_sensor_dev->driver->sensor_device = rmi_sensor_dev;
+ rmi_sensor_dev->driver->polling_required = rpd->polling_required;
+ rmi_sensor_dev->driver->rpd = rpd;
+ if (sensordata)
+ rmi_sensor_dev->driver->perfunctiondata = sensordata->perfunctiondata;
+ INIT_LIST_HEAD(&rmi_sensor_dev->driver->functions);
+
+ retval = rmi_sensor_register_driver(rmi_sensor_dev->driver);
+ if (retval < 0) {
+ printk(KERN_ERR "%s: Error %d registering sensor driver.", __func__, retval);
+ goto exit_fail;
+ }
+
+ /* link the attention fn in the rpd to the sensor attn fn */
+
+ rpd->sensor = rmi_sensor_dev->driver;
+ rpd->attention = rmi_sensor_dev->driver->attention;
+
+ /* Add it into the list of sensors on the rmi bus */
+ mutex_lock(&sensor_devices_mutex);
+ list_add_tail(&rmi_sensor_dev->sensors, &sensor_devices);
+ mutex_unlock(&sensor_devices_mutex);
+
+ /* All done with this sensor, fall out of PDT scan loop. */
+ break;
+ } else {
+ /* Just print out the function found for now */
+ printk(KERN_DEBUG "%s: Found Function %02x - Ignored.\n", __func__, rmi_fd.functionNum & 0xff);
+ }
+ } else {
+ /* A zero or 0xff in the function number
+ signals the end of the PDT */
+ pr_debug("%s: Found End of PDT.",
+ __func__);
+ break;
+ }
+ } else {
+ /* failed to read next PDT entry - end PDT
+ scan - this may result in an incomplete set
+ of recognized functions - should probably
+ return an error but the driver may still be
+ viable for diagnostics and debugging so let's
+ let it continue. */
+ printk(KERN_ERR "%s: Read Error %d when reading next PDT entry - "
+ "ending PDT scan.",
+ __func__, retval);
+ break;
+ }
+ }
+
+ /* If we actually found a sensor, keep it around. */
+ if (rmi_sensor_dev) {
+ /* Add physical driver struct to list */
+ mutex_lock(&phys_drivers_mutex);
+ list_add_tail(&rpd->drivers, &phys_drivers);
+ mutex_unlock(&phys_drivers_mutex);
+ printk(KERN_DEBUG "%s: Registered sensor drivers.", __func__);
+ retval = 0;
+ } else {
+ printk(KERN_ERR "%s: Failed to find sensor. PDT contained %d entries.", __func__, pdt_entry_count);
+ retval = -ENODEV;
+ }
+
+exit_fail:
+ return retval;
+}
+EXPORT_SYMBOL(rmi_register_sensor);
+
+int rmi_unregister_sensors(struct rmi_phys_driver *rpd)
+{
+ if (rpd->sensor) {
+ printk(KERN_WARNING "%s: WARNING: unregister of %s while %s still attached.",
+ __func__, rpd->name, rpd->sensor->drv.name);
+ }
+
+ pr_debug("%s: Unregistering sensor drivers %s\n", __func__, rpd->name);
+
+ /* TODO: We should call sensor_teardown() for each sensor before we get
+ * rid of this list.
+ */
+
+ mutex_lock(&sensor_drivers_mutex);
+ list_del(&rpd->sensor->sensor_drivers);
+ mutex_unlock(&sensor_drivers_mutex);
+
+ return 0;
+}
+EXPORT_SYMBOL(rmi_unregister_sensors);
+
+
+static void rmi_bus_dev_release(struct device *dev)
+{
+ printk(KERN_DEBUG "rmi bus device release\n");
+}
+
+
+int rmi_register_bus_device(struct device *rmibusdev)
+{
+ printk(KERN_DEBUG "%s: Registering RMI4 bus device.\n", __func__);
+
+ /* Here, we simply fill in some of the embedded device structure fields
+ (which individual drivers should not need to know about), and register
+ the device with the driver core. */
+
+ rmibusdev->bus = &rmi_bus_type;
+ rmibusdev->parent = &rmi_bus_device;
+ rmibusdev->release = rmi_bus_dev_release;
+ dev_set_name(rmibusdev, "rmi");
+
+ /* If we wanted to add bus-specific attributes to the device, we could do so here.*/
+
+ return device_register(rmibusdev);
+}
+EXPORT_SYMBOL(rmi_register_bus_device);
+
+void rmi_unregister_bus_device(struct device *rmibusdev)
+{
+ printk(KERN_DEBUG "%s: Unregistering bus device.", __func__);
+
+ device_unregister(rmibusdev);
+}
+EXPORT_SYMBOL(rmi_unregister_bus_device);
+
+static int __init rmi_bus_init(void)
+{
+ int status;
+
+ status = 0;
+
+ printk(KERN_INFO "%s: RMI Bus Driver Init", __func__);
+
+ /* Register the rmi bus */
+ rmi_bus_type.name = busname;
+ rmi_bus_type.match = rmi_bus_match;
+ rmi_bus_type.suspend = rmi_bus_suspend;
+ rmi_bus_type.resume = rmi_bus_resume;
+ status = bus_register(&rmi_bus_type);
+ if (status < 0) {
+ printk(KERN_ERR "%s: Error %d registering the rmi bus.", __func__, status);
+ goto err_exit;
+ }
+ printk(KERN_DEBUG "%s: registered bus.", __func__);
+
+#if 0
+ /** This doesn't seem to be required any more. It worked OK in Froyo,
+ * but breaks in Gingerbread */
+ /* Register the rmi bus device - "rmi". There is only one rmi bus device. */
+ status = rmi_register_bus_device(&rmi_bus_device);
+ if (status < 0) {
+ printk(KERN_ERR "%s: Error %d registering rmi bus device.", __func__, status);
+ bus_unregister(&rmi_bus_type);
+ goto err_exit;
+ }
+ printk(KERN_DEBUG "%s: Registered bus device.", __func__);
+#endif
+
+ return 0;
+err_exit:
+ return status;
+}
+
+static void __exit rmi_bus_exit(void)
+{
+ printk(KERN_DEBUG "%s: RMI Bus Driver Exit.", __func__);
+
+ /* Unregister the rmi bus device - "rmi". There is only one rmi bus device. */
+ rmi_unregister_bus_device(&rmi_bus_device);
+
+ /* Unregister the rmi bus */
+ bus_unregister(&rmi_bus_type);
+}
+
+
+module_init(rmi_bus_init);
+module_exit(rmi_bus_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("RMI4 Driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/input/touchscreen/synaptics/rmi_bus.h b/drivers/input/touchscreen/synaptics/rmi_bus.h
new file mode 100644
index 0000000..1e9bd24
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_bus.h
@@ -0,0 +1,32 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) - RMI Bus Module Header.
+ * Copyright (C) 2007 - 2010, Synaptics Incorporated
+ *
+ */
+/*
+ *
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+#ifndef _RMI_BUS_H
+#define _RMI_BUS_H
+
+
+extern struct bus_type rmi_bus_type;
+
+#endif
diff --git a/drivers/input/touchscreen/synaptics/rmi_drvr.h b/drivers/input/touchscreen/synaptics/rmi_drvr.h
new file mode 100644
index 0000000..d8c848d
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_drvr.h
@@ -0,0 +1,104 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) RMI Driver Header File.
+ * Copyright (c) 2007 - 2011, Synaptics Incorporated
+ *
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+#include "rmi.h"
+
+#ifndef _RMI_DRVR_H
+#define _RMI_DRVR_H
+
+#include <linux/input/rmi_platformdata.h>
+
+/* RMI4 Protocol Support
+ */
+
+struct rmi_phys_driver {
+ char *name;
+ int (*write)(struct rmi_phys_driver *physdrvr, unsigned short address,
+ char data);
+ int (*read)(struct rmi_phys_driver *physdrvr, unsigned short address,
+ char *buffer);
+ int (*write_multiple)(struct rmi_phys_driver *physdrvr,
+ unsigned short address, char *buffer, int length);
+ int (*read_multiple)(struct rmi_phys_driver *physdrvr, unsigned short address,
+ char *buffer, int length);
+ void (*attention)(struct rmi_phys_driver *physdrvr, int instance);
+ bool polling_required;
+ int irq;
+
+ /* Standard kernel linked list implementation.
+ * Documentation on how to use it can be found at
+ * http://isis.poly.edu/kulesh/stuff/src/klist/.
+ */
+ struct list_head drivers;
+ struct rmi_sensor_driver *sensor;
+ struct module *module;
+};
+
+int rmi_read(struct rmi_sensor_driver *sensor, unsigned short address, char *dest);
+int rmi_write(struct rmi_sensor_driver *sensor, unsigned short address,
+ unsigned char data);
+int rmi_read_multiple(struct rmi_sensor_driver *sensor, unsigned short address,
+ char *dest, int length);
+int rmi_write_multiple(struct rmi_sensor_driver *sensor, unsigned short address,
+ unsigned char *data, int length);
+int rmi_register_sensor(struct rmi_phys_driver *physdrvr,
+ struct rmi_sensordata *sensordata);
+int rmi_unregister_sensors(struct rmi_phys_driver *physdrvr);
+
+/* Utility routine to set bits in a register. */
+int rmi_set_bits(struct rmi_sensor_driver *sensor, unsigned short address, unsigned char bits);
+/* Utility routine to clear bits in a register. */
+int rmi_clear_bits(struct rmi_sensor_driver *sensor, unsigned short address, unsigned char bits);
+/* Utility routine to set the value of a bit field in a register. */
+int rmi_set_bit_field(struct rmi_sensor_driver *sensor, unsigned short address,
+ unsigned char field_mask, unsigned char bits);
+
+/* Set this to 1 to turn on code used in detecting buffer leaks. */
+#define RMI_ALLOC_STATS 1
+
+#if RMI_ALLOC_STATS
+extern int appallocsrmi;
+extern int rfiallocsrmi;
+extern int fnallocsrmi;
+
+#define INC_ALLOC_STAT(X) (X##allocsrmi++)
+#define DEC_ALLOC_STAT(X) \
+ do { \
+ if (X##allocsrmi) X##allocsrmi--; \
+ else printk(KERN_DEBUG "Too many " #X " frees\n"); \
+ } while (0)
+#define CHECK_ALLOC_STAT(X) \
+ do { \
+ if (X##allocsrmi) \
+ printk(KERN_DEBUG "Left over " #X " buffers: %d\n", \
+ X##allocsrmi); \
+ } while (0)
+#else
+#define INC_ALLOC_STAT(X) do { } while (0)
+#define DEC_ALLOC_STAT(X) do { } while (0)
+#define CHECK_ALLOC_STAT(X) do { } while (0)
+#endif
+
+#endif
diff --git a/drivers/input/touchscreen/synaptics/rmi_f01.c b/drivers/input/touchscreen/synaptics/rmi_f01.c
new file mode 100644
index 0000000..8f85b63
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_f01.c
@@ -0,0 +1,602 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) Function $01 support for sensor
+ * control and configuration.
+ *
+ * Copyright (c) 2007 - 2011, Synaptics Incorporated
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/kthread.h>
+#include <linux/freezer.h>
+#include <linux/input.h>
+#include <linux/slab.h>
+#include <linux/sysfs.h>
+#include <linux/param.h>
+#include <linux/input/rmi_platformdata.h>
+
+#include "rmi.h"
+#include "rmi_drvr.h"
+#include "rmi_bus.h"
+#include "rmi_sensor.h"
+#include "rmi_function.h"
+#include "rmi_f01.h"
+
+/* Control register bits. */
+#define F01_CONFIGURED (1 << 7)
+#define NONSTANDARD_REPORT_RATE (1 << 6)
+
+/* Command register bits. */
+#define F01_RESET 1
+#define F01_SHUTDOWN (1 << 1)
+
+/* Data register 0 bits. */
+#define F01_UNCONFIGURED (1 << 7)
+#define F01_FLASH_PROGRAMMING_MODE (1 << 6)
+#define F01_STATUS_MASK 0x0F
+
+/** Context data for each F01 we find.
+ */
+struct f01_instance_data {
+ struct rmi_F01_control *controlRegisters;
+ struct rmi_F01_data *dataRegisters;
+ struct rmi_F01_query *query_registers;
+
+ bool nonstandard_report_rate;
+};
+
+static ssize_t rmi_fn_01_productinfo_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_01_productinfo_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(productinfo, 0444, rmi_fn_01_productinfo_show, rmi_fn_01_productinfo_store); /* RO attr */
+
+static ssize_t rmi_fn_01_productid_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_01_productid_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(productid, 0444, rmi_fn_01_productid_show, rmi_fn_01_productid_store); /* RO attr */
+
+static ssize_t rmi_fn_01_manufacturer_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_01_manufacturer_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(manufacturer, 0444, rmi_fn_01_manufacturer_show, rmi_fn_01_manufacturer_store); /* RO attr */
+
+static ssize_t rmi_fn_01_datecode_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_01_datecode_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(datecode, 0444, rmi_fn_01_datecode_show, rmi_fn_01_datecode_store); /* RO attr */
+
+static ssize_t rmi_fn_01_reportrate_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_01_reportrate_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(reportrate, 0644, rmi_fn_01_reportrate_show, rmi_fn_01_reportrate_store); /* RW attr */
+
+static ssize_t rmi_fn_01_reset_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_01_reset_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(reset, 0200, rmi_fn_01_reset_show, rmi_fn_01_reset_store); /* WO attr */
+
+static ssize_t rmi_fn_01_testerid_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_01_testerid_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(testerid, 0444, rmi_fn_01_testerid_show, rmi_fn_01_testerid_store); /* RO attr */
+
+static ssize_t rmi_fn_01_serialnumber_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_01_serialnumber_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(serialnumber, 0444, rmi_fn_01_serialnumber_show, rmi_fn_01_serialnumber_store); /* RO attr */
+
+static int set_report_rate(struct rmi_function_info *function_info, bool nonstandard)
+{
+ if (nonstandard) {
+ return rmi_set_bits(function_info->sensor, function_info->funcDescriptor.controlBaseAddr, NONSTANDARD_REPORT_RATE);
+ } else {
+ return rmi_set_bits(function_info->sensor, function_info->funcDescriptor.controlBaseAddr, NONSTANDARD_REPORT_RATE);
+ }
+}
+
+/*.
+ * The interrupt handler for Fn $01 doesn't do anything (for now).
+ */
+void FN_01_inthandler(struct rmi_function_info *rmifninfo,
+ unsigned int assertedIRQs)
+{
+ struct f01_instance_data *instanceData = (struct f01_instance_data *) rmifninfo->fndata;
+
+ printk(KERN_DEBUG "%s: Read device status.", __func__);
+
+ if (rmi_read_multiple(rmifninfo->sensor, rmifninfo->funcDescriptor.dataBaseAddr,
+ &instanceData->dataRegisters->deviceStatus, 1)) {
+ printk(KERN_ERR "%s : Could not read F01 device status.\n",
+ __func__);
+ }
+ printk(KERN_INFO "%s: read device status register. Value 0x%02X.", __func__, instanceData->dataRegisters->deviceStatus);
+
+ if (instanceData->dataRegisters->deviceStatus & F01_UNCONFIGURED) {
+ printk(KERN_INFO "%s: ++++ Device reset detected.", __func__);
+ /* TODO: Handle device reset appropriately.
+ */
+ }
+}
+EXPORT_SYMBOL(FN_01_inthandler);
+
+/*
+ * This reads in the function $01 source data.
+ *
+ */
+void FN_01_attention(struct rmi_function_info *rmifninfo)
+{
+ struct f01_instance_data *instanceData = (struct f01_instance_data *) rmifninfo->fndata;
+
+ /* TODO: Compute size to read and number of IRQ registers to processors
+ * dynamically. See comments in rmi.h. */
+ if (rmi_read_multiple(rmifninfo->sensor, rmifninfo->funcDescriptor.dataBaseAddr+1,
+ instanceData->dataRegisters->irqs, 1)) {
+ printk(KERN_ERR "%s : Could not read interrupt status registers at 0x%02x\n",
+ __func__, rmifninfo->funcDescriptor.dataBaseAddr);
+ return;
+ }
+
+ if (instanceData->dataRegisters->irqs[0] & instanceData->controlRegisters->interruptEnable[0]) {
+// printk(KERN_INFO "%s: ++++ IRQs == 0x%02X", __func__, instanceData->dataRegisters->irqs[0]);
+ /* call down to the sensors irq dispatcher to dispatch all enabled IRQs */
+ rmifninfo->sensor->dispatchIRQs(rmifninfo->sensor,
+ instanceData->dataRegisters->irqs[0]);
+ }
+
+}
+EXPORT_SYMBOL(FN_01_attention);
+
+int FN_01_config(struct rmi_function_info *rmifninfo)
+{
+ int retval = 0;
+ struct f01_instance_data *instance_data = rmifninfo->fndata;
+
+ printk(KERN_DEBUG "%s: RMI4 function $01 config\n", __func__);
+
+ /* First thing to do is set the configuration bit. We'll check this at
+ * the end to determine if the device has reset during the config process.
+ */
+ retval = rmi_set_bits(rmifninfo->sensor, rmifninfo->funcDescriptor.controlBaseAddr, F01_CONFIGURED);
+ if (retval)
+ printk(KERN_WARNING "%s: failed to set configured bit, errno = %d.",
+ __func__, retval);
+
+ /* At config time, the device is presumably in its default state, so we
+ * only need to write non-default configuration settings.
+ */
+ if (instance_data->nonstandard_report_rate) {
+ retval = set_report_rate(rmifninfo, true);
+ if (!retval)
+ printk(KERN_WARNING "%s: failed to configure report rate, errno = %d.",
+ __func__, retval);
+ }
+
+ /* TODO: Check for reset! */
+
+ return retval;
+}
+EXPORT_SYMBOL(FN_01_config);
+
+/* Initialize any function $01 specific params and settings - input
+ * settings, device settings, etc.
+ */
+int FN_01_init(struct rmi_function_device *function_device)
+{
+ int retval;
+ struct rmi_f01_functiondata *functiondata = rmi_sensor_get_functiondata(function_device->sensor, RMI_F01_INDEX);
+ struct f01_instance_data *instance_data = function_device->rfi->fndata;
+
+ pr_debug("%s: RMI4 function $01 init\n", __func__);
+
+ if (functiondata) {
+ instance_data->nonstandard_report_rate = functiondata->nonstandard_report_rate;
+ }
+
+ retval = device_create_file(&function_device->dev, &dev_attr_productinfo);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create productinfo.", __func__);
+ return retval;
+ }
+ retval = device_create_file(&function_device->dev, &dev_attr_productid);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create productid.", __func__);
+ return retval;
+ }
+ retval = device_create_file(&function_device->dev, &dev_attr_manufacturer);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create manufacturer.", __func__);
+ return retval;
+ }
+ retval = device_create_file(&function_device->dev, &dev_attr_datecode);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create datecode.", __func__);
+ return retval;
+ }
+ retval = device_create_file(&function_device->dev, &dev_attr_reportrate);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create reportrate.", __func__);
+ return retval;
+ }
+ retval = device_create_file(&function_device->dev, &dev_attr_reset);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create reset.", __func__);
+ return retval;
+ }
+ retval = device_create_file(&function_device->dev, &dev_attr_serialnumber);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create serialnumber.", __func__);
+ return retval;
+ }
+ retval = device_create_file(&function_device->dev, &dev_attr_testerid);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create testerid.", __func__);
+ return retval;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(FN_01_init);
+
+int FN_01_detect(struct rmi_function_info *rmifninfo,
+ struct rmi_function_descriptor *fndescr, unsigned int interruptCount)
+{
+ int i;
+ int InterruptOffset;
+ int retval = 0;
+ struct f01_instance_data *instanceData = NULL;
+ struct rmi_F01_control *controlRegisters = NULL;
+ struct rmi_F01_data *dataRegisters = NULL;
+ struct rmi_F01_query *query_registers = NULL;
+ unsigned char query_buffer[21];
+
+ pr_debug("%s: RMI4 function $01 detect\n", __func__);
+
+ /* Store addresses - used elsewhere to read data,
+ * control, query, etc. */
+ rmifninfo->funcDescriptor.queryBaseAddr = fndescr->queryBaseAddr;
+ rmifninfo->funcDescriptor.commandBaseAddr = fndescr->commandBaseAddr;
+ rmifninfo->funcDescriptor.controlBaseAddr = fndescr->controlBaseAddr;
+ rmifninfo->funcDescriptor.dataBaseAddr = fndescr->dataBaseAddr;
+ rmifninfo->funcDescriptor.interruptSrcCnt = fndescr->interruptSrcCnt;
+ rmifninfo->funcDescriptor.functionNum = fndescr->functionNum;
+
+ rmifninfo->numSources = fndescr->interruptSrcCnt;
+
+ /* Set up context data. */
+ instanceData = kzalloc(sizeof(*instanceData), GFP_KERNEL);
+ if (!instanceData) {
+ printk(KERN_ERR "%s: Error allocating memory for F01 context data.\n", __func__);
+ retval = -ENOMEM;
+ goto error_exit;
+ }
+ query_registers = kzalloc(sizeof(*query_registers), GFP_KERNEL);
+ if (!query_registers) {
+ printk(KERN_ERR "%s: Error allocating memory for F01 query registers.\n", __func__);
+ retval = -ENOMEM;
+ goto error_exit;
+ }
+ instanceData->query_registers = query_registers;
+
+ /* Read the query info and unpack it. */
+ retval = rmi_read_multiple(rmifninfo->sensor, rmifninfo->funcDescriptor.queryBaseAddr,
+ query_buffer, 21);
+ if (retval) {
+ printk(KERN_ERR "%s : Could not read F01 query registers at 0x%02x. Error %d.\n",
+ __func__, rmifninfo->funcDescriptor.queryBaseAddr, retval);
+ /* Presumably if the read fails, the buffer should be all zeros, so we're OK to continue. */
+ }
+ query_registers->mfgid = query_buffer[0];
+ query_registers->properties = query_buffer[1];
+ query_registers->prod_info[0] = query_buffer[2] & 0x7F;
+ query_registers->prod_info[1] = query_buffer[3] & 0x7F;
+ query_registers->date_code[0] = query_buffer[4] & 0x1F;
+ query_registers->date_code[1] = query_buffer[5] & 0x0F;
+ query_registers->date_code[2] = query_buffer[6] & 0x1F;
+ query_registers->tester_id = (((unsigned short) query_buffer[7] & 0x7F) << 7) | (query_buffer[8] & 0x7F);
+ query_registers->serial_num = (((unsigned short) query_buffer[9] & 0x7F) << 7) | (query_buffer[10] & 0x7F);
+ memcpy(query_registers->prod_id, &query_buffer[11], 10);
+
+ printk(KERN_DEBUG "%s: RMI4 Protocol Function $01 Query information, rmifninfo->funcDescriptor.queryBaseAddr = %d\n", __func__, rmifninfo->funcDescriptor.queryBaseAddr);
+ printk(KERN_DEBUG "%s: Manufacturer ID: %d %s\n", __func__,
+ query_registers->mfgid, query_registers->mfgid == 1 ? "(Synaptics)" : "");
+ printk(KERN_DEBUG "%s: Product Properties: 0x%x\n",
+ __func__, query_registers->properties);
+ printk(KERN_DEBUG "%s: Product Info: 0x%x 0x%x\n",
+ __func__, query_registers->prod_info[0], query_registers->prod_info[1]);
+ printk(KERN_DEBUG "%s: Date Code: Year : %d Month: %d Day: %d\n",
+ __func__, query_registers->date_code[0], query_registers->date_code[1],
+ query_registers->date_code[2]);
+ printk(KERN_DEBUG "%s: Tester ID: %d\n", __func__, query_registers->tester_id);
+ printk(KERN_DEBUG "%s: Serial Number: 0x%x\n",
+ __func__, query_registers->serial_num);
+ printk(KERN_DEBUG "%s: Product ID: %s\n", __func__, query_registers->prod_id);
+
+ /* TODO: size of control registers needs to be computed dynamically. See comment
+ * in rmi.h. */
+ controlRegisters = kzalloc(sizeof(*controlRegisters), GFP_KERNEL);
+ if (!controlRegisters) {
+ printk(KERN_ERR "%s: Error allocating memory for F01 control registers.\n", __func__);
+ retval = -ENOMEM;
+ goto error_exit;
+ }
+ instanceData->controlRegisters = controlRegisters;
+ retval = rmi_read_multiple(rmifninfo->sensor, rmifninfo->funcDescriptor.controlBaseAddr,
+ (char *)instanceData->controlRegisters, sizeof(struct rmi_F01_control));
+ if (retval) {
+ printk(KERN_ERR "%s : Could not read F01 control registers at 0x%02x. Error %d.\n",
+ __func__, rmifninfo->funcDescriptor.controlBaseAddr, retval);
+ }
+
+ /* TODO: size of data registers needs to be computed dynamically. See comment
+ * in rmi.h. */
+ dataRegisters = kzalloc(sizeof(*dataRegisters), GFP_KERNEL);
+ if (!dataRegisters) {
+ printk(KERN_ERR "%s: Error allocating memory for F01 data registers.\n", __func__);
+ retval = -ENOMEM;
+ goto error_exit;
+ }
+ instanceData->dataRegisters = dataRegisters;
+ rmifninfo->fndata = instanceData;
+
+ /* Need to get interrupt info to be used later when handling
+ * interrupts. */
+ rmifninfo->interruptRegister = interruptCount/8;
+
+ /* loop through interrupts for each source and or in a bit
+ * to the interrupt mask for each. */
+ InterruptOffset = interruptCount % 8;
+
+ for (i = InterruptOffset;
+ i < ((fndescr->interruptSrcCnt & 0x7) + InterruptOffset);
+ i++) {
+ rmifninfo->interruptMask |= 1 << i;
+ }
+
+ return retval;
+
+error_exit:
+ kfree(instanceData);
+ kfree(query_registers);
+ kfree(controlRegisters);
+ kfree(dataRegisters);
+ return retval;
+}
+EXPORT_SYMBOL(FN_01_detect);
+
+static ssize_t rmi_fn_01_productinfo_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f01_instance_data *instance_data = (struct f01_instance_data *)fn->rfi->fndata;
+
+ if (instance_data && instance_data->query_registers && instance_data->query_registers->prod_info)
+ return sprintf(buf, "0x%02X 0x%02X\n", instance_data->query_registers->prod_info[0], instance_data->query_registers->prod_info[1]);
+
+ return sprintf(buf, "unknown");
+}
+
+static ssize_t rmi_fn_01_productinfo_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ return -EPERM;
+}
+
+
+static ssize_t rmi_fn_01_productid_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f01_instance_data *instance_data = (struct f01_instance_data *)fn->rfi->fndata;
+
+ if (instance_data && instance_data->query_registers && instance_data->query_registers->prod_id)
+ return sprintf(buf, "%s\n", instance_data->query_registers->prod_id);
+
+ return sprintf(buf, "unknown");
+}
+
+static ssize_t rmi_fn_01_productid_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ return -EPERM;
+}
+
+static ssize_t rmi_fn_01_manufacturer_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f01_instance_data *instance_data = (struct f01_instance_data *)fn->rfi->fndata;
+
+ if (instance_data && instance_data->query_registers)
+ return sprintf(buf, "0x%02X\n", instance_data->query_registers->mfgid);
+
+ return sprintf(buf, "unknown");
+}
+
+static ssize_t rmi_fn_01_manufacturer_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ return -EPERM;
+}
+
+static ssize_t rmi_fn_01_datecode_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f01_instance_data *instance_data = (struct f01_instance_data *)fn->rfi->fndata;
+
+ if (instance_data && instance_data->query_registers && instance_data->query_registers->date_code)
+ return sprintf(buf, "20%02u-%02u-%02u\n", instance_data->query_registers->date_code[0], instance_data->query_registers->date_code[1], instance_data->query_registers->date_code[2]);
+
+ return sprintf(buf, "unknown");
+}
+
+static ssize_t rmi_fn_01_datecode_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ return -EPERM;
+}
+
+static ssize_t rmi_fn_01_reportrate_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f01_instance_data *instance_data = (struct f01_instance_data *)fn->rfi->fndata;
+
+ if (instance_data && instance_data->query_registers && instance_data->query_registers->date_code)
+ return sprintf(buf, "%d\n", instance_data->nonstandard_report_rate);
+
+ return sprintf(buf, "unknown");
+}
+
+static ssize_t rmi_fn_01_reportrate_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f01_instance_data *instance_data = (struct f01_instance_data *)fn->rfi->fndata;
+ unsigned int new_rate;
+ int retval;
+
+ printk(KERN_DEBUG "%s: Report rate set to %s", __func__, buf);
+
+ if (sscanf(buf, "%u", &new_rate) != 1)
+ return -EINVAL;
+ if (new_rate < 0 || new_rate > 1)
+ return -EINVAL;
+ instance_data->nonstandard_report_rate = new_rate;
+
+ retval = set_report_rate(fn->rfi, new_rate);
+ if (retval < 0) {
+ printk(KERN_ERR "%s: failed to set report rate bit, error = %d.", __func__, retval);
+ return retval;
+ }
+
+ return count;
+}
+
+static ssize_t rmi_fn_01_reset_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return -EPERM;
+}
+
+static ssize_t rmi_fn_01_reset_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ unsigned int reset;
+ int retval;
+
+ printk(KERN_INFO "%s: Reset written with %s", __func__, buf);
+
+ if (sscanf(buf, "%u", &reset) != 1)
+ return -EINVAL;
+ if (reset < 0 || reset > 1)
+ return -EINVAL;
+
+ /* Per spec, 0 has no effect, so we skip it entirely. */
+ if (reset) {
+ retval = rmi_set_bits(fn->sensor, fn->rfi->funcDescriptor.commandBaseAddr, F01_RESET);
+ if (retval < 0) {
+ printk(KERN_ERR "%s: failed to issue reset command, error = %d.", __func__, retval);
+ return retval;
+ }
+ }
+
+ return count;
+}
+
+static ssize_t rmi_fn_01_serialnumber_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f01_instance_data *instance_data = (struct f01_instance_data *)fn->rfi->fndata;
+
+ if (instance_data && instance_data->query_registers)
+ return sprintf(buf, "%u\n", instance_data->query_registers->serial_num);
+
+ return sprintf(buf, "unknown");
+}
+
+static ssize_t rmi_fn_01_serialnumber_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ return -EPERM;
+}
+
+static ssize_t rmi_fn_01_testerid_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f01_instance_data *instance_data = (struct f01_instance_data *)fn->rfi->fndata;
+
+ if (instance_data && instance_data->query_registers)
+ return sprintf(buf, "%u\n", instance_data->query_registers->tester_id);
+
+ return sprintf(buf, "unknown");
+}
+
+static ssize_t rmi_fn_01_testerid_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ return -EPERM;
+}
diff --git a/drivers/input/touchscreen/synaptics/rmi_f01.h b/drivers/input/touchscreen/synaptics/rmi_f01.h
new file mode 100644
index 0000000..976e062
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_f01.h
@@ -0,0 +1,40 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) Function $01 header.
+ * Copyright (c) 2007 - 2011, Synaptics Incorporated
+ *
+ * There is only one function $01 for each RMI4 sensor. This will be
+ * the function that is used to set sensor control and configurations
+ * and check the interrupts to find the source function that is interrupting.
+ *
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+#ifndef _RMI_FUNCTION_01_H
+#define _RMI_FUNCTION_01_H
+
+void FN_01_inthandler(struct rmi_function_info *rmifninfo,
+ unsigned int assertedIRQs);
+int FN_01_config(struct rmi_function_info *rmifninfo);
+int FN_01_init(struct rmi_function_device *function_device);
+int FN_01_detect(struct rmi_function_info *rmifninfo,
+ struct rmi_function_descriptor *fndescr,
+ unsigned int interruptCount);
+void FN_01_attention(struct rmi_function_info *rmifninfo);
+#endif
diff --git a/drivers/input/touchscreen/synaptics/rmi_f05.c b/drivers/input/touchscreen/synaptics/rmi_f05.c
new file mode 100644
index 0000000..0531364
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_f05.c
@@ -0,0 +1,136 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) Function $11 support for 2D.
+ * Copyright (c) 2007 - 2011, Synaptics Incorporated
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/kthread.h>
+#include <linux/freezer.h>
+#include <linux/input.h>
+#include <linux/slab.h>
+#include <linux/input/rmi_platformdata.h>
+
+#include "rmi.h"
+#include "rmi_drvr.h"
+#include "rmi_bus.h"
+#include "rmi_sensor.h"
+#include "rmi_function.h"
+#include "rmi_f05.h"
+
+struct f05_instance_data {
+ int dummy; /* TODO: Write this */
+};
+
+/*
+ * There is no attention function for F05 - it is left NULL
+ * in the function table so it is not called.
+ *
+ */
+
+
+/*
+ * This reads in a sample and reports the F05 source data to the
+ * input subsystem. It is used for both polling and interrupt driven
+ * operation. This is called a lot so don't put in any informational
+ * printks since they will slow things way down!
+ */
+void FN_05_inthandler(struct rmi_function_info *rmifninfo,
+ unsigned int assertedIRQs)
+{
+// struct f05_instance_data *instance_data = rmifninfo->fndata;
+}
+EXPORT_SYMBOL(FN_05_inthandler);
+
+int FN_05_config(struct rmi_function_info *rmifninfo)
+{
+ int retval = 0;
+
+ pr_debug("%s: RMI4 F05 config\n", __func__);
+
+ /* TODO: Perform configuration. In particular, write any cached control
+ * register values to the device. */
+
+ return retval;
+}
+EXPORT_SYMBOL(FN_05_config);
+
+/* Initialize any F05 specific params and settings - input
+ * settings, device settings, etc.
+ */
+int FN_05_init(struct rmi_function_device *function_device)
+{
+ int retval = 0;
+// struct f05_instance_data *instance_data = function_device->rfi->fndata;
+// struct rmi_f05_functiondata *functiondata = rmi_sensor_get_functiondata(function_device->sensor, RMI_F05_INDEX);
+
+ printk(KERN_DEBUG "%s: RMI4 F05 init\n", __func__);
+
+ return retval;
+}
+EXPORT_SYMBOL(FN_05_init);
+
+
+int FN_05_detect(struct rmi_function_info *rmifninfo,
+ struct rmi_function_descriptor *fndescr, unsigned int interruptCount)
+{
+ int retval = 0;
+ int i;
+ struct f05_instance_data *instanceData;
+ int fn05InterruptOffset;
+
+ printk(KERN_DEBUG "%s: RMI4 F05 detect\n", __func__);
+
+ instanceData = kzalloc(sizeof(struct f05_instance_data), GFP_KERNEL);
+ if (!instanceData) {
+ printk(KERN_ERR "%s: Error allocating F05 instance data.\n", __func__);
+ return -ENOMEM;
+ }
+ rmifninfo->fndata = instanceData;
+
+ /* Store addresses - used elsewhere to read data,
+ * control, query, etc. */
+ rmifninfo->funcDescriptor.queryBaseAddr = fndescr->queryBaseAddr;
+ rmifninfo->funcDescriptor.commandBaseAddr = fndescr->commandBaseAddr;
+ rmifninfo->funcDescriptor.controlBaseAddr = fndescr->controlBaseAddr;
+ rmifninfo->funcDescriptor.dataBaseAddr = fndescr->dataBaseAddr;
+ rmifninfo->funcDescriptor.interruptSrcCnt = fndescr->interruptSrcCnt;
+ rmifninfo->funcDescriptor.functionNum = fndescr->functionNum;
+
+ rmifninfo->numSources = fndescr->interruptSrcCnt;
+ /* Need to get interrupt info to be used later when handling
+ interrupts. */
+ rmifninfo->interruptRegister = interruptCount/8;
+
+ /* loop through interrupts for each source in fn $11 and or in a bit
+ to the interrupt mask for each. */
+ fn05InterruptOffset = interruptCount % 8;
+
+ for (i = fn05InterruptOffset;
+ i < ((fndescr->interruptSrcCnt & 0x7) + fn05InterruptOffset);
+ i++)
+ rmifninfo->interruptMask |= 1 << i;
+
+ return retval;
+}
+EXPORT_SYMBOL(FN_05_detect);
diff --git a/drivers/input/touchscreen/synaptics/rmi_f05.h b/drivers/input/touchscreen/synaptics/rmi_f05.h
new file mode 100644
index 0000000..b820e71
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_f05.h
@@ -0,0 +1,43 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) Function $11 header.
+ * Copyright (c) 2007 - 2010, Synaptics Incorporated
+ *
+ * For every RMI4 function that has a data source - like 2D sensors,
+ * buttons, LEDs, GPIOs, etc. - the user will create a new rmi_function_xx.c
+ * file and add these functions to perform the config(), init(), report()
+ * and detect() functionality. The function pointers are then srored under
+ * the RMI function info and these functions will automatically be called by
+ * the global config(), init(), report() and detect() functions that will
+ * loop through all data sources and call the data sources functions using
+ * these functions pointed to by the function ptrs.
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+#ifndef _RMI_FUNCTION_05_H
+#define _RMI_FUNCTION_05_H
+
+void FN_05_inthandler(struct rmi_function_info *rmifninfo,
+ unsigned int assertedIRQs);
+int FN_05_config(struct rmi_function_info *rmifninfo);
+int FN_05_init(struct rmi_function_device *function_device);
+int FN_05_detect(struct rmi_function_info *rmifninfo,
+ struct rmi_function_descriptor *fndescr,
+ unsigned int interruptCount);
+/* No attention function for F05 */
+#endif
diff --git a/drivers/input/touchscreen/synaptics/rmi_f11.c b/drivers/input/touchscreen/synaptics/rmi_f11.c
new file mode 100644
index 0000000..9a23776
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_f11.c
@@ -0,0 +1,928 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) Function $11 support for 2D.
+ * Copyright (c) 2007 - 2011, Synaptics Incorporated
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/kthread.h>
+#include <linux/freezer.h>
+#include <linux/input.h>
+#include <linux/slab.h>
+#include <linux/sysfs.h>
+#include <linux/input/rmi_platformdata.h>
+
+#include "rmi.h"
+#include "rmi_drvr.h"
+#include "rmi_bus.h"
+#include "rmi_sensor.h"
+#include "rmi_function.h"
+#include "rmi_f11.h"
+
+static int sensorMaxX;
+static int sensorMaxY;
+
+struct f11_instance_data {
+ struct rmi_F11_device_query *deviceInfo;
+ struct rmi_F11_sensor_query *sensorInfo;
+ struct rmi_F11_control *controlRegisters;
+ int button_height;
+ unsigned char fingerDataBufferSize;
+ unsigned char absDataOffset;
+ unsigned char absDataSize;
+ unsigned char relDataOffset;
+ unsigned char gestureDataOffset;
+ unsigned char *fingerDataBuffer;
+ /* Last X & Y seen, needed at finger lift. Was down indicates at least one finger was here. */
+ /* TODO: Eventually we'll need to track this info on a per finger basis. */
+ bool wasdown;
+ unsigned int oldX;
+ unsigned int oldY;
+ /* Transformations to be applied to coordinates before reporting. */
+ bool flipX;
+ bool flipY;
+ int offsetX;
+ int offsetY;
+ int clipXLow;
+ int clipXHigh;
+ int clipYLow;
+ int clipYHigh;
+ bool swap_axes;
+ bool relReport;
+};
+
+enum f11_finger_state {
+ F11_NO_FINGER = 0,
+ F11_PRESENT = 1,
+ F11_INACCURATE = 2,
+ F11_RESERVED = 3
+};
+
+static ssize_t rmi_fn_11_flip_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_11_flip_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(flip, 0664, rmi_fn_11_flip_show, rmi_fn_11_flip_store); /* RW attr */
+
+static ssize_t rmi_fn_11_clip_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_11_clip_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(clip, 0664, rmi_fn_11_clip_show, rmi_fn_11_clip_store); /* RW attr */
+
+static ssize_t rmi_fn_11_offset_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_11_offset_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(offset, 0664, rmi_fn_11_offset_show, rmi_fn_11_offset_store); /* RW attr */
+
+static ssize_t rmi_fn_11_swap_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_11_swap_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(swap, 0664, rmi_fn_11_swap_show, rmi_fn_11_swap_store); /* RW attr */
+
+static ssize_t rmi_fn_11_relreport_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_11_relreport_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(relreport, 0664, rmi_fn_11_relreport_show, rmi_fn_11_relreport_store); /* RW attr */
+
+static ssize_t rmi_fn_11_maxPos_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_11_maxPos_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(maxPos, 0664, rmi_fn_11_maxPos_show, rmi_fn_11_maxPos_store); /* RW attr */
+
+
+static void FN_11_relreport(struct rmi_function_info *rmifninfo);
+
+/*
+ * There is no attention function for Fn $11 - it is left NULL
+ * in the function table so it is not called.
+ *
+ */
+
+
+/*
+ * This reads in a sample and reports the function $11 source data to the
+ * input subsystem. It is used for both polling and interrupt driven
+ * operation. This is called a lot so don't put in any informational
+ * printks since they will slow things way down!
+ */
+void FN_11_inthandler(struct rmi_function_info *rmifninfo,
+ unsigned int assertedIRQs)
+{
+ /* number of touch points - fingers down in this case */
+ int fingerDownCount;
+ int finger;
+ struct rmi_function_device *function_device;
+ struct f11_instance_data *instanceData;
+
+ instanceData = (struct f11_instance_data *) rmifninfo->fndata;
+
+ fingerDownCount = 0;
+ function_device = rmifninfo->function_device;
+
+ /* get 2D sensor finger data */
+
+ if (rmi_read_multiple(rmifninfo->sensor, rmifninfo->funcDescriptor.dataBaseAddr,
+ instanceData->fingerDataBuffer, instanceData->fingerDataBufferSize)) {
+ printk(KERN_ERR "%s: Failed to read finger data registers.\n", __func__);
+ return;
+ }
+
+ /* First we need to count the fingers and generate some events related to that. */
+ for (finger = 0; finger < instanceData->sensorInfo->numberOfFingers; finger++) {
+ int reg;
+ int fingerShift;
+ int fingerStatus;
+
+ /* determine which data byte the finger status is in */
+ reg = finger/4;
+ /* bit shift to get finger's status */
+ fingerShift = (finger % 4) * 2;
+ fingerStatus = (instanceData->fingerDataBuffer[reg] >> fingerShift) & 3;
+
+ if (fingerStatus == F11_PRESENT || fingerStatus == F11_INACCURATE) {
+ fingerDownCount++;
+ instanceData->wasdown = true;
+ }
+ }
+ input_report_key(function_device->input,
+ BTN_TOUCH, fingerDownCount);
+ for (finger = 0; finger < (instanceData->sensorInfo->numberOfFingers - 1); finger++) {
+ input_report_key(function_device->input,
+ BTN_2 + finger, fingerDownCount >= (finger + 2));
+ }
+
+ for (finger = 0; finger < instanceData->sensorInfo->numberOfFingers; finger++) {
+ int reg;
+ int fingerShift;
+ int fingerStatus;
+ int X = 0, Y = 0, Z = 0, Wy = 0, Wx = 0;
+
+ /* determine which data byte the finger status is in */
+ reg = finger/4;
+ /* bit shift to get finger's status */
+ fingerShift = (finger % 4) * 2;
+ fingerStatus = (instanceData->fingerDataBuffer[reg] >> fingerShift) & 3;
+
+ /* if finger status indicates a finger is present then
+ read the finger data and report it */
+ if (fingerStatus == F11_PRESENT || fingerStatus == F11_INACCURATE) {
+
+ if (instanceData->sensorInfo->hasAbs) {
+ int maxX = instanceData->controlRegisters->sensorMaxXPos;
+ int maxY = instanceData->controlRegisters->sensorMaxYPos;
+ reg = instanceData->absDataOffset + (finger * instanceData->absDataSize);
+ X = (instanceData->fingerDataBuffer[reg] << 4) & 0x0ff0;
+ X |= (instanceData->fingerDataBuffer[reg+2] & 0x0f);
+ Y = (instanceData->fingerDataBuffer[reg+1] << 4) & 0x0ff0;
+ Y |= ((instanceData->fingerDataBuffer[reg+2] & 0xf0) >> 4) & 0x0f;
+ /* First thing to do is swap axes if needed.
+ */
+ if (instanceData->swap_axes) {
+ int temp = X;
+ X = Y;
+ Y = temp;
+ maxX = instanceData->controlRegisters->sensorMaxYPos;
+ maxY = instanceData->controlRegisters->sensorMaxXPos;
+ }
+ if (instanceData->flipX)
+ X = max(maxX-X, 0);
+ X = X - instanceData->offsetX;
+ X = min(max(X, instanceData->clipXLow), instanceData->clipXHigh);
+ if (instanceData->flipY)
+ Y = max(maxY-Y, 0);
+ Y = Y - instanceData->offsetY;
+ Y = min(max(Y, instanceData->clipYLow), instanceData->clipYHigh);
+
+ /* upper 4 bits of W are Wy,
+ lower 4 of W are Wx */
+ Wy = (instanceData->fingerDataBuffer[reg+3] >> 4) & 0x0f;
+ Wx = instanceData->fingerDataBuffer[reg+3] & 0x0f;
+ if (instanceData->swap_axes) {
+ int temp = Wx;
+ Wx = Wy;
+ Wy = temp;
+ }
+
+ Z = instanceData->fingerDataBuffer[reg+4];
+
+ /* if this is the first finger report normal
+ ABS_X, ABS_Y, PRESSURE, TOOL_WIDTH events for
+ non-MT apps. Apps that support Multi-touch
+ will ignore these events and use the MT events.
+ Apps that don't support Multi-touch will still
+ function.
+ */
+ if (fingerDownCount == 1) {
+ instanceData->oldX = X;
+ instanceData->oldY = Y;
+ input_report_abs(function_device->input, ABS_X, X);
+ input_report_abs(function_device->input, ABS_Y, Y);
+ input_report_abs(function_device->input, ABS_PRESSURE, Z);
+ input_report_abs(function_device->input, ABS_TOOL_WIDTH,
+ max(Wx, Wy));
+
+ } else {
+ /* TODO generate non MT events for multifinger situation. */
+ }
+#ifdef CONFIG_SYNA_MULTI_TOUCH
+ /* Report Multi-Touch events for each finger */
+ /* major axis of touch area ellipse */
+ input_report_abs(function_device->input, ABS_MT_TOUCH_MAJOR, Z);
+ /* minor axis of touch area ellipse */
+ input_report_abs(function_device->input, ABS_MT_WIDTH_MAJOR,
+ max(Wx, Wy));
+ /* Currently only 2 supported - 1 or 0 */
+ input_report_abs(function_device->input, ABS_MT_ORIENTATION,
+ (Wx > Wy ? 1 : 0));
+ input_report_abs(function_device->input, ABS_MT_POSITION_X, X);
+ input_report_abs(function_device->input, ABS_MT_POSITION_Y, Y);
+
+ /* TODO: Tracking ID needs to be reported but not used yet. */
+ /* Could be formed by keeping an id per position and assiging */
+ /* a new id when fingerStatus changes for that position.*/
+ input_report_abs(function_device->input, ABS_MT_TRACKING_ID,
+ finger+1);
+ /* MT sync between fingers */
+ input_mt_sync(function_device->input);
+#endif
+ }
+ }
+ }
+
+ /* if we had a finger down before and now we don't have any send a button up. */
+ if ((fingerDownCount == 0) && instanceData->wasdown) {
+ instanceData->wasdown = false;
+
+#ifdef CONFIG_SYNA_MULTI_TOUCH
+ input_report_abs(function_device->input, ABS_MT_TOUCH_MAJOR, 0);
+ input_report_abs(function_device->input, ABS_MT_WIDTH_MAJOR, 0);
+ input_report_abs(function_device->input, ABS_MT_POSITION_X, instanceData->oldX);
+ input_report_abs(function_device->input, ABS_MT_POSITION_Y, instanceData->oldY);
+ input_report_abs(function_device->input, ABS_MT_TRACKING_ID, 1);
+ input_mt_sync(function_device->input);
+#endif
+
+ input_report_abs(function_device->input, ABS_X, instanceData->oldX);
+ input_report_abs(function_device->input, ABS_Y, instanceData->oldY);
+ instanceData->oldX = instanceData->oldY = 0;
+ }
+
+ FN_11_relreport(rmifninfo);
+ input_sync(function_device->input); /* sync after groups of events */
+
+}
+EXPORT_SYMBOL(FN_11_inthandler);
+
+/* This function reads in relative data for first finger and send to input system */
+static void FN_11_relreport(struct rmi_function_info *rmifninfo)
+{
+ struct f11_instance_data *instanceData;
+ struct rmi_function_device *function_device;
+ signed char X, Y;
+ unsigned short fn11DataBaseAddr;
+
+ instanceData = (struct f11_instance_data *) rmifninfo->fndata;
+
+ if (instanceData->sensorInfo->hasRel && instanceData->relReport) {
+ int reg = instanceData->relDataOffset;
+
+ function_device = rmifninfo->function_device;
+
+ fn11DataBaseAddr = rmifninfo->funcDescriptor.dataBaseAddr;
+ /* Read and report Rel data for primary finger one register for X and one for Y*/
+ X = instanceData->fingerDataBuffer[reg];
+ Y = instanceData->fingerDataBuffer[reg+1];
+ if (instanceData->swap_axes) {
+ signed char temp = X;
+ X = Y;
+ Y = temp;
+ }
+ if (instanceData->flipX) {
+ X = -X;
+ }
+ if (instanceData->flipY) {
+ Y = -Y;
+ }
+ X = (signed char) min(127, max(-128, (int) X));
+ Y = (signed char) min(127, max(-128, (int) Y));
+
+ input_report_rel(function_device->input, REL_X, X);
+ input_report_rel(function_device->input, REL_Y, Y);
+ }
+}
+
+int FN_11_config(struct rmi_function_info *rmifninfo)
+{
+ /* For the data source - print info and do any
+ source specific configuration. */
+ unsigned char data[14];
+ int retval = 0;
+
+ pr_debug("%s: RMI4 function $11 config\n", __func__);
+
+ /* Get and print some info about the data source... */
+
+ /* To Query 2D devices we need to read from the address obtained
+ * from the function descriptor stored in the RMI function info.
+ */
+ retval = rmi_read_multiple(rmifninfo->sensor, rmifninfo->funcDescriptor.queryBaseAddr,
+ data, 9);
+ if (retval) {
+ printk(KERN_ERR "%s: RMI4 function $11 config:"
+ "Could not read function query registers 0x%x\n",
+ __func__, rmifninfo->funcDescriptor.queryBaseAddr);
+ } else {
+ pr_debug("%s: Number of Fingers: %d\n",
+ __func__, data[1] & 7);
+ pr_debug("%s: Is Configurable: %d\n",
+ __func__, data[1] & (1 << 7) ? 1 : 0);
+ pr_debug("%s: Has Gestures: %d\n",
+ __func__, data[1] & (1 << 5) ? 1 : 0);
+ pr_debug("%s: Has Absolute: %d\n",
+ __func__, data[1] & (1 << 4) ? 1 : 0);
+ pr_debug("%s: Has Relative: %d\n",
+ __func__, data[1] & (1 << 3) ? 1 : 0);
+
+ pr_debug("%s: Number X Electrodes: %d\n",
+ __func__, data[2] & 0x1f);
+ pr_debug("%s: Number Y Electrodes: %d\n",
+ __func__, data[3] & 0x1f);
+ pr_debug("%s: Maximum Electrodes: %d\n",
+ __func__, data[4] & 0x1f);
+
+ pr_debug("%s: Absolute Data Size: %d\n",
+ __func__, data[5] & 3);
+
+ pr_debug("%s: Has XY Dist: %d\n",
+ __func__, data[7] & (1 << 7) ? 1 : 0);
+ pr_debug("%s: Has Pinch: %d\n",
+ __func__, data[7] & (1 << 6) ? 1 : 0);
+ pr_debug("%s: Has Press: %d\n",
+ __func__, data[7] & (1 << 5) ? 1 : 0);
+ pr_debug("%s: Has Flick: %d\n",
+ __func__, data[7] & (1 << 4) ? 1 : 0);
+ pr_debug("%s: Has Early Tap: %d\n",
+ __func__, data[7] & (1 << 3) ? 1 : 0);
+ pr_debug("%s: Has Double Tap: %d\n",
+ __func__, data[7] & (1 << 2) ? 1 : 0);
+ pr_debug("%s: Has Tap and Hold: %d\n",
+ __func__, data[7] & (1 << 1) ? 1 : 0);
+ pr_debug("%s: Has Tap: %d\n",
+ __func__, data[7] & 1 ? 1 : 0);
+ pr_debug("%s: Has Palm Detect: %d\n",
+ __func__, data[8] & 1 ? 1 : 0);
+ pr_debug("%s: Has Rotate: %d\n",
+ __func__, data[8] & (1 << 1) ? 1 : 0);
+
+ retval = rmi_read_multiple(rmifninfo->sensor,
+ rmifninfo->funcDescriptor.controlBaseAddr, data, 14);
+ if (retval) {
+ printk(KERN_ERR "%s: RMI4 function $11 config:"
+ "Could not read control registers 0x%x\n",
+ __func__, rmifninfo->funcDescriptor.controlBaseAddr);
+ return retval;
+ }
+
+ /* Store these for use later...*/
+ sensorMaxX = ((data[6] & 0x1f) << 8) | ((data[7] & 0xff) << 0);
+ sensorMaxY = ((data[8] & 0x1f) << 8) | ((data[9] & 0xff) << 0);
+
+ pr_debug("%s: Sensor Max X: %d\n", __func__, sensorMaxX);
+ pr_debug("%s: Sensor Max Y: %d\n", __func__, sensorMaxY);
+ }
+
+ return retval;
+}
+EXPORT_SYMBOL(FN_11_config);
+
+/* This operation is done in a number of places, so we have a handy routine
+ * for it.
+ */
+static void f11_set_abs_params(struct rmi_function_device *function_device)
+{
+ struct f11_instance_data *instance_data = function_device->rfi->fndata;
+ /* Use the max X and max Y read from the device, or the clip values,
+ * whichever is stricter.
+ */
+ int xMin = instance_data->clipXLow;
+ int xMax = min((int) instance_data->controlRegisters->sensorMaxXPos, instance_data->clipXHigh);
+ int yMin = instance_data->clipYLow;
+ int yMax = min((int) instance_data->controlRegisters->sensorMaxYPos, instance_data->clipYHigh) - instance_data->button_height;
+ if (instance_data->swap_axes) {
+ int temp = xMin;
+ xMin = yMin;
+ yMin = temp;
+ temp = xMax;
+ xMax = yMax;
+ yMax = temp;
+ }
+ printk(KERN_DEBUG "%s: Set ranges X=[%d..%d] Y=[%d..%d].", __func__, xMin, xMax, yMin, yMax);
+ input_set_abs_params(function_device->input, ABS_X, xMin, xMax,
+ 0, 0);
+ input_set_abs_params(function_device->input, ABS_Y, yMin, yMax,
+ 0, 0);
+ input_set_abs_params(function_device->input, ABS_PRESSURE, 0, 255, 0, 0);
+ input_set_abs_params(function_device->input, ABS_TOOL_WIDTH, 0, 15, 0, 0);
+
+#ifdef CONFIG_SYNA_MULTI_TOUCH
+ input_set_abs_params(function_device->input, ABS_MT_TOUCH_MAJOR, 0, 15, 0, 0);
+ input_set_abs_params(function_device->input, ABS_MT_TOUCH_MINOR, 0, 15, 0, 0);
+ input_set_abs_params(function_device->input, ABS_MT_ORIENTATION, 0, 1, 0, 0);
+ input_set_abs_params(function_device->input, ABS_MT_TRACKING_ID, 1, 10, 0, 0);
+ input_set_abs_params(function_device->input, ABS_MT_POSITION_X, xMin, xMax,
+ 0, 0);
+ input_set_abs_params(function_device->input, ABS_MT_POSITION_Y, yMin, yMax,
+ 0, 0);
+#endif
+}
+
+/* Initialize any function $11 specific params and settings - input
+ * settings, device settings, etc.
+ */
+int FN_11_init(struct rmi_function_device *function_device)
+{
+ struct f11_instance_data *instanceData = function_device->rfi->fndata;
+ int retval = 0;
+ struct rmi_f11_functiondata *functiondata = rmi_sensor_get_functiondata(function_device->sensor, RMI_F11_INDEX);
+ printk(KERN_DEBUG "%s: RMI4 F11 init", __func__);
+
+ /* TODO: Initialize these through some normal kernel mechanism.
+ */
+ instanceData->flipX = false;
+ instanceData->flipY = false;
+ instanceData->swap_axes = false;
+ instanceData->relReport = true;
+ instanceData->offsetX = instanceData->offsetY = 0;
+ instanceData->clipXLow = instanceData->clipYLow = 0;
+ /* TODO: 65536 should actually be the largest valid RMI4 position coordinate */
+ instanceData->clipXHigh = instanceData->clipYHigh = 65536;
+
+ /* Load any overrides that were specified via platform data.
+ */
+ if (functiondata) {
+ printk(KERN_DEBUG "%s: found F11 per function platformdata.", __func__);
+ instanceData->flipX = functiondata->flipX;
+ instanceData->flipY = functiondata->flipY;
+ instanceData->button_height = functiondata->button_height;
+ instanceData->swap_axes = functiondata->swap_axes;
+ if (functiondata->offset) {
+ instanceData->offsetX = functiondata->offset->x;
+ instanceData->offsetY = functiondata->offset->y;
+ }
+ if (functiondata->clipX) {
+ if (functiondata->clipX->min >= functiondata->clipX->max) {
+ printk(KERN_WARNING "%s: Clip X min (%d) >= X clip max (%d) - ignored.",
+ __func__, functiondata->clipX->min, functiondata->clipX->max);
+ } else {
+ instanceData->clipXLow = functiondata->clipX->min;
+ instanceData->clipXHigh = functiondata->clipX->max;
+ }
+ }
+ if (functiondata->clipY) {
+ if (functiondata->clipY->min >= functiondata->clipY->max) {
+ printk(KERN_WARNING "%s: Clip Y min (%d) >= Y clip max (%d) - ignored.",
+ __func__, functiondata->clipY->min, functiondata->clipY->max);
+ } else {
+ instanceData->clipYLow = functiondata->clipY->min;
+ instanceData->clipYHigh = functiondata->clipY->max;
+ }
+ }
+ }
+
+ /* need to init the input abs params for the 2D */
+ set_bit(EV_ABS, function_device->input->evbit);
+ set_bit(EV_SYN, function_device->input->evbit);
+ set_bit(EV_KEY, function_device->input->evbit);
+ set_bit(BTN_MISC, function_device->input->keybit);
+ set_bit(KEY_OK, function_device->input->keybit);
+
+ f11_set_abs_params(function_device);
+
+ printk(KERN_DEBUG "%s: Creating sysfs files.", __func__);
+ retval = device_create_file(&function_device->dev, &dev_attr_flip);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create flip.", __func__);
+ return retval;
+ }
+ retval = device_create_file(&function_device->dev, &dev_attr_clip);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create clip.", __func__);
+ return retval;
+ }
+ retval = device_create_file(&function_device->dev, &dev_attr_offset);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create offset.", __func__);
+ return retval;
+ }
+ retval = device_create_file(&function_device->dev, &dev_attr_swap);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create swap.", __func__);
+ return retval;
+ }
+ retval = device_create_file(&function_device->dev, &dev_attr_relreport);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create relreport.", __func__);
+ return retval;
+ }
+ retval = device_create_file(&function_device->dev, &dev_attr_maxPos);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create maxPos.", __func__);
+ return retval;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(FN_11_init);
+
+int FN_11_detect(struct rmi_function_info *rmifninfo,
+ struct rmi_function_descriptor *fndescr, unsigned int interruptCount)
+{
+ unsigned char fn11Queries[12]; /* TODO: Compute size correctly. */
+ unsigned char fn11Control[12]; /* TODO: Compute size correctly. */
+ int i;
+ unsigned short fn11InterruptOffset;
+ unsigned char fn11AbsDataBlockSize;
+ int fn11HasPinch, fn11HasFlick, fn11HasTap;
+ int fn11HasTapAndHold, fn11HasDoubleTap;
+ int fn11HasEarlyTap, fn11HasPress;
+ int fn11HasPalmDetect, fn11HasRotate;
+ int fn11HasRel;
+ unsigned char f11_egr_0, f11_egr_1;
+ unsigned int fn11AllDataBlockSize;
+ int retval = 0;
+ struct f11_instance_data *instanceData;
+
+ printk(KERN_DEBUG "%s: RMI4 F11 detect\n", __func__);
+
+ instanceData = kzalloc(sizeof(struct f11_instance_data), GFP_KERNEL);
+ if (!instanceData) {
+ printk(KERN_ERR "%s: Error allocating F11 instance data.\n", __func__);
+ return -ENOMEM;
+ }
+ instanceData->deviceInfo = kzalloc(sizeof(struct rmi_F11_device_query), GFP_KERNEL);
+ if (!instanceData->deviceInfo) {
+ printk(KERN_ERR "%s: Error allocating F11 device query.\n", __func__);
+ return -ENOMEM;
+ }
+ instanceData->sensorInfo = kzalloc(sizeof(struct rmi_F11_sensor_query), GFP_KERNEL);
+ if (!instanceData->sensorInfo) {
+ printk(KERN_ERR "%s: Error allocating F11 sensor query.\n", __func__);
+ return -ENOMEM;
+ }
+ rmifninfo->fndata = instanceData;
+
+ /* Store addresses - used elsewhere to read data,
+ * control, query, etc. */
+ rmifninfo->funcDescriptor.queryBaseAddr = fndescr->queryBaseAddr;
+ rmifninfo->funcDescriptor.commandBaseAddr = fndescr->commandBaseAddr;
+ rmifninfo->funcDescriptor.controlBaseAddr = fndescr->controlBaseAddr;
+ rmifninfo->funcDescriptor.dataBaseAddr = fndescr->dataBaseAddr;
+ rmifninfo->funcDescriptor.interruptSrcCnt = fndescr->interruptSrcCnt;
+ rmifninfo->funcDescriptor.functionNum = fndescr->functionNum;
+
+ rmifninfo->numSources = fndescr->interruptSrcCnt;
+
+ /* need to get number of fingers supported, data size, etc. -
+ to be used when getting data since the number of registers to
+ read depends on the number of fingers supported and data size. */
+ retval = rmi_read_multiple(rmifninfo->sensor, fndescr->queryBaseAddr, fn11Queries,
+ sizeof(fn11Queries));
+ if (retval) {
+ printk(KERN_ERR "%s: RMI4 function $11 detect: "
+ "Could not read function query registers 0x%x\n",
+ __func__, rmifninfo->funcDescriptor.queryBaseAddr);
+ return retval;
+ }
+
+ /* Extract device data. */
+ instanceData->deviceInfo->hasQuery9 = (fn11Queries[0] & 0x04) != 0;
+ instanceData->deviceInfo->numberOfSensors = (fn11Queries[0] & 0x07) + 1;
+ printk(KERN_DEBUG "%s: F11 device - %d sensors. Query 9? %d.", __func__, instanceData->deviceInfo->numberOfSensors, instanceData->deviceInfo->hasQuery9);
+
+ /* Extract sensor data. */
+ /* 2D data sources have only 3 bits for the number of fingers
+ supported - so the encoding is a bit wierd. */
+ instanceData->sensorInfo->numberOfFingers = 2; /* default number of fingers supported */
+ if ((fn11Queries[1] & 0x7) <= 4)
+ /* add 1 since zero based */
+ instanceData->sensorInfo->numberOfFingers = (fn11Queries[1] & 0x7) + 1;
+ else {
+ /* a value of 5 is up to 10 fingers - 6 and 7 are reserved
+ (shouldn't get these i int retval;n a normal 2D source). */
+ if ((fn11Queries[1] & 0x7) == 5)
+ instanceData->sensorInfo->numberOfFingers = 10;
+ }
+ instanceData->sensorInfo->configurable = (fn11Queries[1] & 0x80) != 0;
+ instanceData->sensorInfo->hasSensitivityAdjust = (fn11Queries[1] & 0x40) != 0;
+ instanceData->sensorInfo->hasGestures = (fn11Queries[1] & 0x20) != 0;
+ instanceData->sensorInfo->hasAbs = (fn11Queries[1] & 0x10) != 0;
+ instanceData->sensorInfo->hasRel = (fn11Queries[1] & 0x08) != 0;
+ instanceData->sensorInfo->absDataSize = fn11Queries[5] & 0x03;
+ printk(KERN_DEBUG "%s: Number of fingers: %d.", __func__, instanceData->sensorInfo->numberOfFingers);
+
+ /* Need to get interrupt info to be used later when handling
+ interrupts. */
+ rmifninfo->interruptRegister = interruptCount/8;
+
+ /* loop through interrupts for each source in fn $11 and or in a bit
+ to the interrupt mask for each. */
+ fn11InterruptOffset = interruptCount % 8;
+
+ for (i = fn11InterruptOffset;
+ i < ((fndescr->interruptSrcCnt & 0x7) + fn11InterruptOffset);
+ i++)
+ rmifninfo->interruptMask |= 1 << i;
+
+ /* Figure out just how much data we'll need to read. */
+ instanceData->fingerDataBufferSize = (instanceData->sensorInfo->numberOfFingers + 3) / 4;
+ /* One each for X and Y, one for LSB for X & Y, one for W, one for Z */
+ fn11AbsDataBlockSize = 5;
+ if (instanceData->sensorInfo->absDataSize != 0)
+ printk(KERN_WARNING "%s: Unrecognized abs data size %d ignored.", __func__, instanceData->sensorInfo->absDataSize);
+ if (instanceData->sensorInfo->hasAbs) {
+ instanceData->absDataSize = fn11AbsDataBlockSize;
+ instanceData->absDataOffset = instanceData->fingerDataBufferSize;
+ instanceData->fingerDataBufferSize += instanceData->sensorInfo->numberOfFingers * fn11AbsDataBlockSize;
+ }
+ if (instanceData->sensorInfo->hasRel) {
+ instanceData->relDataOffset = ((instanceData->sensorInfo->numberOfFingers + 3) / 4) +
+ /* absolute data, per finger times number of fingers */
+ (fn11AbsDataBlockSize * instanceData->sensorInfo->numberOfFingers);
+ instanceData->fingerDataBufferSize += instanceData->sensorInfo->numberOfFingers * 2;
+ }
+ if (instanceData->sensorInfo->hasGestures) {
+ instanceData->gestureDataOffset = instanceData->fingerDataBufferSize;
+ printk(KERN_WARNING "%s: WARNING Need to correctly compute gesture data location.", __func__);
+ }
+
+ /* need to determine the size of data to read - this depends on
+ conditions such as whether Relative data is reported and if Gesture
+ data is reported. */
+ f11_egr_0 = fn11Queries[7];
+ f11_egr_1 = fn11Queries[8];
+
+ /* Get info about what EGR data is supported, whether it has
+ Relative data supported, etc. */
+ fn11HasPinch = f11_egr_0 & 0x40;
+ fn11HasFlick = f11_egr_0 & 0x10;
+ fn11HasTap = f11_egr_0 & 0x01;
+ fn11HasTapAndHold = f11_egr_0 & 0x02;
+ fn11HasDoubleTap = f11_egr_0 & 0x04;
+ fn11HasEarlyTap = f11_egr_0 & 0x08;
+ fn11HasPress = f11_egr_0 & 0x20;
+ fn11HasPalmDetect = f11_egr_1 & 0x01;
+ fn11HasRotate = f11_egr_1 & 0x02;
+ fn11HasRel = fn11Queries[1] & 0x08;
+
+ /* Size of all data including finger status, absolute data for each
+ finger, relative data and EGR data */
+ fn11AllDataBlockSize =
+ /* finger status, four fingers per register */
+ ((instanceData->sensorInfo->numberOfFingers + 3) / 4) +
+ /* absolute data, per finger times number of fingers */
+ (fn11AbsDataBlockSize * instanceData->sensorInfo->numberOfFingers) +
+ /* two relative registers (if relative is being reported) */
+ 2 * fn11HasRel +
+ /* F11_2D_Data8 is only present if the egr_0
+ register is non-zero. */
+ !!(f11_egr_0) +
+ /* F11_2D_Data9 is only present if either egr_0 or
+ egr_1 registers are non-zero. */
+ (f11_egr_0 || f11_egr_1) +
+ /* F11_2D_Data10 is only present if EGR_PINCH or EGR_FLICK of
+ egr_0 reports as 1. */
+ !!(fn11HasPinch | fn11HasFlick) +
+ /* F11_2D_Data11 and F11_2D_Data12 are only present if
+ EGR_FLICK of egr_0 reports as 1. */
+ 2 * !!(fn11HasFlick);
+ instanceData->fingerDataBuffer = kcalloc(instanceData->fingerDataBufferSize, sizeof(unsigned char), GFP_KERNEL);
+ if (!instanceData->fingerDataBuffer) {
+ printk(KERN_ERR "%s: Failed to allocate finger data buffer.", __func__);
+ return -ENOMEM;
+ }
+
+ /* Grab a copy of the control registers. */
+ instanceData->controlRegisters = kzalloc(sizeof(struct rmi_F11_control), GFP_KERNEL);
+ if (!instanceData->controlRegisters) {
+ printk(KERN_ERR "%s: Error allocating F11 control registers.\n", __func__);
+ return -ENOMEM;
+ }
+ retval = rmi_read_multiple(rmifninfo->sensor, fndescr->controlBaseAddr,
+ fn11Control, sizeof(fn11Control));
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to read F11 control registers.", __func__);
+ return retval;
+ }
+ instanceData->controlRegisters->sensorMaxXPos = (((int) fn11Control[7] & 0x0F) << 8) + fn11Control[6];
+ instanceData->controlRegisters->sensorMaxYPos = (((int) fn11Control[9] & 0x0F) << 8) + fn11Control[8];
+ printk(KERN_DEBUG "%s: Max X %d Max Y %d", __func__, instanceData->controlRegisters->sensorMaxXPos, instanceData->controlRegisters->sensorMaxYPos);
+ return 0;
+}
+EXPORT_SYMBOL(FN_11_detect);
+
+static ssize_t rmi_fn_11_maxPos_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f11_instance_data *instance_data = (struct f11_instance_data *)fn->rfi->fndata;
+
+ return sprintf(buf, "%u %u\n", instance_data->controlRegisters->sensorMaxXPos, instance_data->controlRegisters->sensorMaxYPos);
+}
+
+static ssize_t rmi_fn_11_maxPos_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ return -EPERM;
+}
+
+static ssize_t rmi_fn_11_flip_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f11_instance_data *instance_data = (struct f11_instance_data *)fn->rfi->fndata;
+
+ return sprintf(buf, "%u %u\n", instance_data->flipX, instance_data->flipY);
+}
+
+static ssize_t rmi_fn_11_flip_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f11_instance_data *instance_data = (struct f11_instance_data *)fn->rfi->fndata;
+ unsigned int newX, newY;
+
+ printk(KERN_DEBUG "%s: Flip set to %s", __func__, buf);
+
+ if (sscanf(buf, "%u %u", &newX, &newY) != 2)
+ return -EINVAL;
+ if (newX < 0 || newX > 1 || newY < 0 || newY > 1)
+ return -EINVAL;
+ instance_data->flipX = newX;
+ instance_data->flipY = newY;
+
+ return count;
+}
+
+static ssize_t rmi_fn_11_swap_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f11_instance_data *instance_data = (struct f11_instance_data *)fn->rfi->fndata;
+
+ return sprintf(buf, "%u\n", instance_data->swap_axes);
+}
+
+static ssize_t rmi_fn_11_swap_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f11_instance_data *instance_data = (struct f11_instance_data *)fn->rfi->fndata;
+ unsigned int newSwap;
+
+ printk(KERN_DEBUG "%s: Swap set to %s", __func__, buf);
+
+ if (sscanf(buf, "%u", &newSwap) != 1)
+ return -EINVAL;
+ if (newSwap < 0 || newSwap > 1)
+ return -EINVAL;
+ instance_data->swap_axes = newSwap;
+
+ f11_set_abs_params(fn);
+
+ return count;
+}
+
+static ssize_t rmi_fn_11_relreport_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f11_instance_data *instance_data = (struct f11_instance_data *)fn->rfi->fndata;
+
+ return sprintf(buf, "%u \n", instance_data->relReport);
+}
+
+static ssize_t rmi_fn_11_relreport_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f11_instance_data *instance_data = (struct f11_instance_data *)fn->rfi->fndata;
+ unsigned int relRep;
+
+ printk(KERN_DEBUG "%s: relReport set to %s", __func__, buf);
+ if (sscanf(buf, "%u", &relRep) != 1)
+ return -EINVAL;
+ if (relRep < 0 || relRep > 1)
+ return -EINVAL;
+ instance_data->relReport = relRep;
+
+ return count;
+}
+
+static ssize_t rmi_fn_11_offset_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f11_instance_data *instance_data = (struct f11_instance_data *)fn->rfi->fndata;
+
+ return sprintf(buf, "%d %d\n", instance_data->offsetX, instance_data->offsetY);
+}
+
+static ssize_t rmi_fn_11_offset_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f11_instance_data *instance_data = (struct f11_instance_data *)fn->rfi->fndata;
+ int newX, newY;
+
+ printk(KERN_DEBUG "%s: Offset set to %s", __func__, buf);
+
+ if (sscanf(buf, "%d %d", &newX, &newY) != 2)
+ return -EINVAL;
+ instance_data->offsetX = newX;
+ instance_data->offsetY = newY;
+
+ return count;
+}
+
+static ssize_t rmi_fn_11_clip_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f11_instance_data *instance_data = (struct f11_instance_data *)fn->rfi->fndata;
+
+ return sprintf(buf, "%u %u %u %u\n",
+ instance_data->clipXLow, instance_data->clipXHigh,
+ instance_data->clipYLow, instance_data->clipYHigh);
+}
+
+static ssize_t rmi_fn_11_clip_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f11_instance_data *instance_data = (struct f11_instance_data *)fn->rfi->fndata;
+ unsigned int newXLow, newXHigh, newYLow, newYHigh;
+
+ printk(KERN_DEBUG "%s: Clip set to %s", __func__, buf);
+
+ if (sscanf(buf, "%u %u %u %u", &newXLow, &newXHigh, &newYLow, &newYHigh) != 4)
+ return -EINVAL;
+ if (newXLow < 0 || newXLow >= newXHigh || newYLow < 0 || newYLow >= newYHigh)
+ return -EINVAL;
+ instance_data->clipXLow = newXLow;
+ instance_data->clipXHigh = newXHigh;
+ instance_data->clipYLow = newYLow;
+ instance_data->clipYHigh = newYHigh;
+
+ f11_set_abs_params(fn);
+
+ return count;
+}
diff --git a/drivers/input/touchscreen/synaptics/rmi_f11.h b/drivers/input/touchscreen/synaptics/rmi_f11.h
new file mode 100644
index 0000000..0bf386a
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_f11.h
@@ -0,0 +1,43 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) Function $11 header.
+ * Copyright (c) 2007 - 2010, Synaptics Incorporated
+ *
+ * For every RMI4 function that has a data source - like 2D sensors,
+ * buttons, LEDs, GPIOs, etc. - the user will create a new rmi_function_xx.c
+ * file and add these functions to perform the config(), init(), report()
+ * and detect() functionality. The function pointers are then srored under
+ * the RMI function info and these functions will automatically be called by
+ * the global config(), init(), report() and detect() functions that will
+ * loop through all data sources and call the data sources functions using
+ * these functions pointed to by the function ptrs.
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+#ifndef _RMI_FUNCTION_11_H
+#define _RMI_FUNCTION_11_H
+
+void FN_11_inthandler(struct rmi_function_info *rmifninfo,
+ unsigned int assertedIRQs);
+int FN_11_config(struct rmi_function_info *rmifninfo);
+int FN_11_init(struct rmi_function_device *function_device);
+int FN_11_detect(struct rmi_function_info *rmifninfo,
+ struct rmi_function_descriptor *fndescr,
+ unsigned int interruptCount);
+/* No attention function for Fn $11 */
+#endif
diff --git a/drivers/input/touchscreen/synaptics/rmi_f19.c b/drivers/input/touchscreen/synaptics/rmi_f19.c
new file mode 100644
index 0000000..e22c221
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_f19.c
@@ -0,0 +1,513 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) Function $11 support for 2D.
+ * Copyright (c) 2007 - 2011, Synaptics Incorporated
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/kthread.h>
+#include <linux/freezer.h>
+#include <linux/input.h>
+#include <linux/slab.h>
+#include <linux/input/rmi_platformdata.h>
+
+#include "rmi.h"
+#include "rmi_drvr.h"
+#include "rmi_bus.h"
+#include "rmi_sensor.h"
+#include "rmi_function.h"
+#include "rmi_f19.h"
+
+struct f19_instance_data {
+ struct rmi_F19_query *deviceInfo;
+ struct rmi_F19_control *controlRegisters;
+ bool *buttonDown;
+ unsigned char buttonDataBufferSize;
+ unsigned char *buttonDataBuffer;
+ unsigned char *buttonMap;
+ int fn19ControlRegisterSize;
+ int fn19regCountForBitPerButton;
+ int fn19btnUsageandfilterModeOffset;
+ int fn19intEnableOffset;
+ int fn19intEnableLen;
+ int fn19singleBtnCtrlLen;
+ int fn19singleBtnCtrlOffset;
+ int fn19sensorMapCtrlOffset;
+ int fn19sensorMapCtrlLen;
+ int fn19singleBtnSensOffset;
+ int fn19singleBtnSensLen;
+ int fn19globalSensOffset;
+ int fn19globalHystThreshOffset;
+};
+
+static ssize_t rmi_f19_buttonCount_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_f19_buttonCount_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(buttonCount, 0444, rmi_f19_buttonCount_show, rmi_f19_buttonCount_store); /* RO attr */
+
+static ssize_t rmi_f19_buttonMap_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_f19_buttonMap_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+DEVICE_ATTR(buttonMap, 0664, rmi_f19_buttonMap_show, rmi_f19_buttonMap_store); /* RW attr */
+
+
+/*
+ * There is no attention function for F19 - it is left NULL
+ * in the function table so it is not called.
+ *
+ */
+
+
+/*
+ * This reads in a sample and reports the F19 source data to the
+ * input subsystem. It is used for both polling and interrupt driven
+ * operation. This is called a lot so don't put in any informational
+ * printks since they will slow things way down!
+ */
+void FN_19_inthandler(struct rmi_function_info *rmifninfo,
+ unsigned int assertedIRQs)
+{
+ struct rmi_function_device *function_device;
+ struct f19_instance_data *instanceData;
+ int button;
+
+ instanceData = (struct f19_instance_data *) rmifninfo->fndata;
+
+ function_device = rmifninfo->function_device;
+
+ /* Read the button data. */
+
+ if (rmi_read_multiple(rmifninfo->sensor, rmifninfo->funcDescriptor.dataBaseAddr,
+ instanceData->buttonDataBuffer, instanceData->buttonDataBufferSize)) {
+ printk(KERN_ERR "%s: Failed to read button data registers.\n", __func__);
+ return;
+ }
+
+ /* Generate events for buttons that change state. */
+ for (button = 0; button < instanceData->deviceInfo->buttonCount; button++) {
+ int buttonReg;
+ int buttonShift;
+ bool buttonStatus;
+
+ /* determine which data byte the button status is in */
+ buttonReg = button/4;
+ /* bit shift to get button's status */
+ buttonShift = button % 8;
+ buttonStatus = ((instanceData->buttonDataBuffer[buttonReg] >> buttonShift) & 0x01) != 0;
+
+ /* if the button state changed from the last time report it and store the new state */
+ if (buttonStatus != instanceData->buttonDown[button]) {
+ printk(KERN_DEBUG "%s: Button %d (code %d) -> %d.", __func__, button, instanceData->buttonMap[button], buttonStatus);
+ /* Generate an event here. */
+ input_report_key(function_device->input,
+ instanceData->buttonMap[button], buttonStatus);
+ instanceData->buttonDown[button] = buttonStatus;
+ }
+ }
+
+ input_sync(function_device->input); /* sync after groups of events */
+}
+EXPORT_SYMBOL(FN_19_inthandler);
+
+int FN_19_config(struct rmi_function_info *rmifninfo)
+{
+ int retval = 0;
+
+ pr_debug("%s: RMI4 F19 config\n", __func__);
+
+ /* TODO: Perform configuration. In particular, write any cached control
+ * register values to the device. */
+
+ return retval;
+}
+EXPORT_SYMBOL(FN_19_config);
+
+/* Initialize any F19 specific params and settings - input
+ * settings, device settings, etc.
+ */
+int FN_19_init(struct rmi_function_device *function_device)
+{
+ int i, retval = 0;
+ struct f19_instance_data *instance_data = function_device->rfi->fndata;
+ struct rmi_f19_functiondata *functiondata = rmi_sensor_get_functiondata(function_device->sensor, RMI_F19_INDEX);
+
+ printk(KERN_DEBUG "%s: RMI4 F19 init\n", __func__);
+
+ if (functiondata) {
+ if (functiondata->button_map) {
+ if (functiondata->button_map->nbuttons != instance_data->deviceInfo->buttonCount) {
+ printk(KERN_WARNING "%s: Platformdata button map size (%d) != number of buttons on device (%d) - ignored.", __func__, functiondata->button_map->nbuttons, instance_data->deviceInfo->buttonCount);
+ } else if (!functiondata->button_map->map) {
+ printk(KERN_WARNING "%s: Platformdata button map is missing!", __func__);
+ } else {
+ for (i = 0; i < functiondata->button_map->nbuttons; i++)
+ instance_data->buttonMap[i] = functiondata->button_map->map[i];
+ }
+ }
+ }
+
+ /* Set up any input events. */
+ set_bit(EV_SYN, function_device->input->evbit);
+ set_bit(EV_KEY, function_device->input->evbit);
+ /* set bits for each button...*/
+ for (i = 0; i < instance_data->deviceInfo->buttonCount; i++) {
+ set_bit(instance_data->buttonMap[i], function_device->input->keybit);
+ }
+
+ printk(KERN_DEBUG "%s: Creating sysfs files.", __func__);
+ retval = device_create_file(&function_device->dev, &dev_attr_buttonCount);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create button count.", __func__);
+ return retval;
+ }
+
+ retval = device_create_file(&function_device->dev, &dev_attr_buttonMap);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to create button map.", __func__);
+ return retval;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(FN_19_init);
+
+static int getControlRegisters(struct rmi_function_info *rmifninfo,
+ struct rmi_function_descriptor *fndescr)
+{
+ struct f19_instance_data *instanceData;
+ unsigned char *fn19Control = NULL;
+ int retval = 0;
+
+ /* Get the instance data - it should have been allocated and stored in detect.*/
+ instanceData = rmifninfo->fndata;
+
+ /* Check to make sure instanceData is really there before using.*/
+ if (!instanceData) {
+ printk(KERN_ERR "%s: Error - instance data not initialized yet when getting fn19 control registers.\n", __func__);
+ return -EINVAL;
+ }
+
+ /* Allocate memory for the control registers. */
+ instanceData->controlRegisters = kzalloc(sizeof(struct rmi_F19_control), GFP_KERNEL);
+ if (!instanceData->controlRegisters) {
+ printk(KERN_ERR "%s: Error allocating F19 control registers.\n", __func__);
+ return -ENOMEM;
+ }
+
+ instanceData->fn19regCountForBitPerButton = (instanceData->deviceInfo->buttonCount + 7)/8;
+
+ /* Need to compute the amount of data to read since it varies with the
+ * number of buttons */
+ instanceData->fn19ControlRegisterSize = 1 /* 1 for filter mode and button usage bits */
+ + 2*instanceData->fn19regCountForBitPerButton /* interrupt enable bits and single button participation bits */
+ + 2*instanceData->deviceInfo->buttonCount /* sensormap registers + single button sensitivity registers */
+ + 2; /* 1 for global sensitivity adjust + 1 for global hysteresis threshold */
+
+ /* Allocate a temp memory buffer to read the control registers into */
+ fn19Control = kzalloc(instanceData->fn19ControlRegisterSize, GFP_KERNEL);
+ if (!fn19Control) {
+ printk(KERN_ERR "%s: Error allocating temp storage to read fn19 control info.\n", __func__);
+ return -ENOMEM;
+ }
+
+ /* Grab a copy of the control registers. */
+ retval = rmi_read_multiple(rmifninfo->sensor, fndescr->controlBaseAddr,
+ fn19Control, instanceData->fn19ControlRegisterSize);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed to read F19 control registers.", __func__);
+ return retval;
+ }
+
+ /* Copy over control registers data to the instance data */
+ instanceData->fn19btnUsageandfilterModeOffset = 0;
+ instanceData->controlRegisters->buttonUsage = fn19Control[instanceData->fn19btnUsageandfilterModeOffset] & 0x3;
+ instanceData->controlRegisters->filterMode = fn19Control[instanceData->fn19btnUsageandfilterModeOffset] & 0xc;
+
+ /* Fill in interrupt enable registers */
+ instanceData->fn19intEnableOffset = 1;
+ instanceData->fn19intEnableLen = instanceData->fn19regCountForBitPerButton;
+ instanceData->controlRegisters->intEnableRegisters = kzalloc(instanceData->fn19intEnableLen, GFP_KERNEL);
+ if (!instanceData->controlRegisters->intEnableRegisters) {
+ printk(KERN_ERR "%s: Error allocating storage for interrupt enable control info.\n", __func__);
+ return -ENOMEM;
+ }
+ memcpy(instanceData->controlRegisters->intEnableRegisters, &fn19Control[instanceData->fn19intEnableOffset],
+ instanceData->fn19intEnableLen);
+
+ /* Fill in single button control registers */
+ instanceData->fn19singleBtnCtrlOffset = instanceData->fn19intEnableOffset + instanceData->fn19intEnableLen;
+ instanceData->fn19singleBtnCtrlLen = instanceData->fn19regCountForBitPerButton;
+ instanceData->controlRegisters->singleButtonControl = kzalloc(instanceData->fn19singleBtnCtrlLen, GFP_KERNEL);
+ if (!instanceData->controlRegisters->singleButtonControl) {
+ printk(KERN_ERR "%s: Error allocating storage for single button participation control info.\n", __func__);
+ return -ENOMEM;
+ }
+ memcpy(instanceData->controlRegisters->singleButtonControl, &fn19Control[instanceData->fn19singleBtnCtrlOffset],
+ instanceData->fn19singleBtnCtrlLen);
+
+ /* Fill in sensor map registers */
+ instanceData->fn19sensorMapCtrlOffset = instanceData->fn19singleBtnCtrlOffset + instanceData->fn19singleBtnCtrlLen;
+ instanceData->fn19sensorMapCtrlLen = instanceData->deviceInfo->buttonCount;
+ instanceData->controlRegisters->sensorMap = kzalloc(instanceData->fn19sensorMapCtrlLen, GFP_KERNEL);
+ if (!instanceData->controlRegisters->sensorMap) {
+ printk(KERN_ERR "%s: Error allocating storage for sensor map control info.\n", __func__);
+ return -ENOMEM;
+ }
+ memcpy(instanceData->controlRegisters->sensorMap, &fn19Control[instanceData->fn19sensorMapCtrlOffset],
+ instanceData->fn19sensorMapCtrlLen);
+
+ /* Fill in single button sensitivity registers */
+ instanceData->fn19singleBtnSensOffset = instanceData->fn19sensorMapCtrlOffset + instanceData->fn19sensorMapCtrlLen;
+ instanceData->fn19singleBtnSensLen = instanceData->deviceInfo->buttonCount;
+ instanceData->controlRegisters->singleButtonSensitivity = kzalloc(instanceData->fn19singleBtnSensLen, GFP_KERNEL);
+ if (!instanceData->controlRegisters->intEnableRegisters) {
+ printk(KERN_ERR "%s: Error allocating storage for single button sensitivity control info.\n", __func__);
+ return -ENOMEM;
+ }
+ memcpy(instanceData->controlRegisters->singleButtonSensitivity, &fn19Control[instanceData->fn19singleBtnSensOffset],
+ instanceData->fn19singleBtnSensLen);
+
+ /* Fill in global sensitivity adjustment and global hysteresis threshold values */
+ instanceData->fn19globalSensOffset = instanceData->fn19singleBtnSensOffset + instanceData->fn19singleBtnSensLen;
+ instanceData->fn19globalHystThreshOffset = instanceData->fn19globalSensOffset + 1;
+ instanceData->controlRegisters->globalSensitivityAdjustment = fn19Control[instanceData->fn19globalSensOffset] & 0x1f;
+ instanceData->controlRegisters->globalHysteresisThreshold = fn19Control[instanceData->fn19globalHystThreshOffset] & 0x0f;
+
+ /* Free up temp storage that held copy of control registers */
+ kfree(fn19Control);
+
+ return 0;
+}
+
+int FN_19_detect(struct rmi_function_info *rmifninfo,
+ struct rmi_function_descriptor *fndescr, unsigned int interruptCount)
+{
+ unsigned char fn19queries[2];
+ int retval = 0;
+ int i;
+ struct f19_instance_data *instanceData;
+ int fn19InterruptOffset;
+
+ printk(KERN_DEBUG "%s: RMI4 F19 detect\n", __func__);
+
+ instanceData = kzalloc(sizeof(struct f19_instance_data), GFP_KERNEL);
+ if (!instanceData) {
+ printk(KERN_ERR "%s: Error allocating F19 instance data.\n", __func__);
+ return -ENOMEM;
+ }
+ instanceData->deviceInfo = kzalloc(sizeof(struct rmi_F19_query), GFP_KERNEL);
+ if (!instanceData->deviceInfo) {
+ printk(KERN_ERR "%s: Error allocating F19 device query.\n", __func__);
+ return -ENOMEM;
+ }
+ rmifninfo->fndata = instanceData;
+
+ /* Store addresses - used elsewhere to read data,
+ * control, query, etc. */
+ rmifninfo->funcDescriptor.queryBaseAddr = fndescr->queryBaseAddr;
+ rmifninfo->funcDescriptor.commandBaseAddr = fndescr->commandBaseAddr;
+ rmifninfo->funcDescriptor.controlBaseAddr = fndescr->controlBaseAddr;
+ rmifninfo->funcDescriptor.dataBaseAddr = fndescr->dataBaseAddr;
+ rmifninfo->funcDescriptor.interruptSrcCnt = fndescr->interruptSrcCnt;
+ rmifninfo->funcDescriptor.functionNum = fndescr->functionNum;
+
+ rmifninfo->numSources = fndescr->interruptSrcCnt;
+
+ /* need to get number of fingers supported, data size, etc. -
+ to be used when getting data since the number of registers to
+ read depends on the number of fingers supported and data size. */
+ retval = rmi_read_multiple(rmifninfo->sensor, fndescr->queryBaseAddr, fn19queries,
+ sizeof(fn19queries));
+ if (retval) {
+ printk(KERN_ERR "%s: RMI4 F19 detect: "
+ "Could not read function query registers 0x%x\n",
+ __func__, rmifninfo->funcDescriptor.queryBaseAddr);
+ return retval;
+ }
+
+ /* Extract device data. */
+ instanceData->deviceInfo->configurable = fn19queries[0] & 0x01;
+ instanceData->deviceInfo->hasSensitivityAdjust = fn19queries[0] & 0x02;
+ instanceData->deviceInfo->hasHysteresisThreshold = fn19queries[0] & 0x04;
+ instanceData->deviceInfo->buttonCount = fn19queries[1] & 0x01F;
+ printk(KERN_DEBUG "%s: F19 device - %d buttons...", __func__, instanceData->deviceInfo->buttonCount);
+
+ /* Need to get interrupt info to be used later when handling
+ interrupts. */
+ rmifninfo->interruptRegister = interruptCount/8;
+
+ /* loop through interrupts for each source in fn $11 and or in a bit
+ to the interrupt mask for each. */
+ fn19InterruptOffset = interruptCount % 8;
+
+ for (i = fn19InterruptOffset;
+ i < ((fndescr->interruptSrcCnt & 0x7) + fn19InterruptOffset);
+ i++)
+ rmifninfo->interruptMask |= 1 << i;
+
+ /* Figure out just how much data we'll need to read. */
+ instanceData->buttonDown = kcalloc(instanceData->deviceInfo->buttonCount, sizeof(bool), GFP_KERNEL);
+ if (!instanceData->buttonDown) {
+ printk(KERN_ERR "%s: Error allocating F19 button state buffer.\n", __func__);
+ return -ENOMEM;
+ }
+
+ instanceData->buttonDataBufferSize = (instanceData->deviceInfo->buttonCount + 7) / 8;
+ instanceData->buttonDataBuffer = kcalloc(instanceData->buttonDataBufferSize, sizeof(unsigned char), GFP_KERNEL);
+ if (!instanceData->buttonDataBuffer) {
+ printk(KERN_ERR "%s: Failed to allocate button data buffer.", __func__);
+ return -ENOMEM;
+ }
+
+ instanceData->buttonMap = kcalloc(instanceData->deviceInfo->buttonCount, sizeof(unsigned char), GFP_KERNEL);
+ if (!instanceData->buttonMap) {
+ printk(KERN_ERR "%s: Error allocating F19 button map.\n", __func__);
+ return -ENOMEM;
+ }
+
+ for (i = 0; i < instanceData->deviceInfo->buttonCount; i++)
+ instanceData->buttonMap[i] = BTN_0 + i; /* default values */
+
+ /* Grab the control register info. */
+ retval = getControlRegisters(rmifninfo, fndescr);
+ if (retval) {
+ printk(KERN_ERR "%s: Error %d getting fn19 control register info.\n", __func__, retval);
+ return retval;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(FN_19_detect);
+
+static ssize_t rmi_f19_buttonCount_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f19_instance_data *instance_data = (struct f19_instance_data *)fn->rfi->fndata;
+
+ return sprintf(buf, "%u\n", instance_data->deviceInfo->buttonCount);
+}
+
+static ssize_t rmi_f19_buttonCount_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ /* Not allowed. */
+ return -EPERM;
+}
+
+static ssize_t rmi_f19_buttonMap_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f19_instance_data *instance_data = (struct f19_instance_data *)fn->rfi->fndata;
+ int i, len, totalLen = 0;
+
+ /* loop through each button map value and copy it's string representation into buf */
+ for (i = 0; i < instance_data->deviceInfo->buttonCount; i++) {
+ /* get next button mapping value and write it to buf */
+ len = sprintf(buf, "%u ", instance_data->buttonMap[i]);
+ /* bump up ptr to next location in buf if the sprintf was valid */
+ if (len > 0) {
+ buf += len;
+ totalLen += len;
+ }
+ }
+
+ return totalLen;
+}
+
+static ssize_t rmi_f19_buttonMap_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct f19_instance_data *instance_data = (struct f19_instance_data *)fn->rfi->fndata;
+ unsigned int button;
+ int i;
+ int retval = count;
+ int buttonCount = 0;
+ unsigned char *tmpButtonMap;
+
+ /* Do validation on the button map data passed in. */
+ /* Store button mappings into a temp buffer and then verify button count
+ and data prior to clearing out old button mappings and storing the new ones. */
+ tmpButtonMap = kzalloc(instance_data->deviceInfo->buttonCount, GFP_KERNEL);
+ if (!tmpButtonMap) {
+ printk(KERN_ERR "%s: Error allocating temp button map.\n", __func__);
+ return -ENOMEM;
+ }
+
+ for (i = 0; i < instance_data->deviceInfo->buttonCount && *buf != 0; i++) {
+ /* get next button mapping value and store and bump up to point to next item in buf */
+ sscanf(buf, "%u", &button);
+
+ /* Make sure the key is a valid key */
+ if (button > KEY_MAX) {
+ printk(KERN_ERR "%s: Error - button map for button %d is not a valid value 0x%x.\n",
+ __func__, i, button);
+ retval = -EINVAL;
+ goto err_ret;
+ }
+
+ tmpButtonMap[i] = button;
+ buttonCount++;
+
+ /* bump up buf to point to next item to read */
+ while (*buf != 0) {
+ buf++;
+ if (*(buf-1) == ' ')
+ break;
+ }
+ }
+
+ /* Make sure the button count matches */
+ if (buttonCount != instance_data->deviceInfo->buttonCount) {
+ printk(KERN_ERR "%s: Error - button map count of %d doesn't match device button count of %d.\n"
+ , __func__, buttonCount, instance_data->deviceInfo->buttonCount);
+ retval = -EINVAL;
+ goto err_ret;
+ }
+
+ /* Clear out old buttonMap data */
+ memset(instance_data->buttonMap, 0, buttonCount);
+
+ /* Loop through the temp buffer and copy the button event and set the key bit for the new mapping. */
+ for (i = 0; i < buttonCount; i++) {
+ instance_data->buttonMap[i] = tmpButtonMap[1];
+ set_bit(instance_data->buttonMap[i], fn->input->keybit);
+ }
+
+err_ret:
+ kfree(tmpButtonMap);
+
+ return retval;
+}
diff --git a/drivers/input/touchscreen/synaptics/rmi_f19.h b/drivers/input/touchscreen/synaptics/rmi_f19.h
new file mode 100644
index 0000000..41f3e4d
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_f19.h
@@ -0,0 +1,43 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) Function $11 header.
+ * Copyright (c) 2007 - 2010, Synaptics Incorporated
+ *
+ * For every RMI4 function that has a data source - like 2D sensors,
+ * buttons, LEDs, GPIOs, etc. - the user will create a new rmi_function_xx.c
+ * file and add these functions to perform the config(), init(), report()
+ * and detect() functionality. The function pointers are then srored under
+ * the RMI function info and these functions will automatically be called by
+ * the global config(), init(), report() and detect() functions that will
+ * loop through all data sources and call the data sources functions using
+ * these functions pointed to by the function ptrs.
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+#ifndef _RMI_FUNCTION_19_H
+#define _RMI_FUNCTION_19_H
+
+void FN_19_inthandler(struct rmi_function_info *rmifninfo,
+ unsigned int assertedIRQs);
+int FN_19_config(struct rmi_function_info *rmifninfo);
+int FN_19_init(struct rmi_function_device *function_device);
+int FN_19_detect(struct rmi_function_info *rmifninfo,
+ struct rmi_function_descriptor *fndescr,
+ unsigned int interruptCount);
+/* No attention function for Fn $19 */
+#endif
diff --git a/drivers/input/touchscreen/synaptics/rmi_f34.c b/drivers/input/touchscreen/synaptics/rmi_f34.c
new file mode 100644
index 0000000..f884410
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_f34.c
@@ -0,0 +1,556 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) Function $34 support for sensor
+ * firmware reflashing.
+ *
+ * Copyright (c) 2007 - 2011, Synaptics Incorporated
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/kthread.h>
+#include <linux/freezer.h>
+#include <linux/input.h>
+#include <linux/sysfs.h>
+#include <linux/math64.h>
+#include "rmi_drvr.h"
+#include "rmi_bus.h"
+#include "rmi_sensor.h"
+#include "rmi_function.h"
+#include "rmi_f34.h"
+
+/* data specific to fn $34 that needs to be kept around */
+struct rmi_fn_34_data {
+ unsigned char status;
+ unsigned char cmd;
+ unsigned short bootloaderid;
+ unsigned short blocksize;
+};
+
+
+static ssize_t rmi_fn_34_status_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_34_status_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+
+static ssize_t rmi_fn_34_cmd_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_34_cmd_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+static ssize_t rmi_fn_34_data_read(struct file *,
+ struct kobject *kobj,
+ struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count);
+
+static ssize_t rmi_fn_34_data_write(struct file *,
+ struct kobject *kobj,
+ struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count);
+
+static ssize_t rmi_fn_34_bootloaderid_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_34_bootloaderid_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+static ssize_t rmi_fn_34_blocksize_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmi_fn_34_blocksize_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count);
+
+/* define the device attributes using DEVICE_ATTR macros */
+DEVICE_ATTR(status, 0444, rmi_fn_34_status_show, rmi_fn_34_status_store); /* RO attr */
+DEVICE_ATTR(cmd, 0664, rmi_fn_34_cmd_show, rmi_fn_34_cmd_store); /* RW attr */
+DEVICE_ATTR(bootloaderid, 0644, rmi_fn_34_bootloaderid_show, rmi_fn_34_bootloaderid_store); /* RW attr */
+DEVICE_ATTR(blocksize, 0444, rmi_fn_34_blocksize_show, rmi_fn_34_blocksize_store); /* RO attr */
+
+
+struct bin_attribute dev_attr_data = {
+ .attr = {
+ .name = "data",
+ .mode = 0644
+ },
+ .size = 0,
+ .read = rmi_fn_34_data_read,
+ .write = rmi_fn_34_data_write,
+};
+
+/* Helper fn to convert from processor specific data to our firmware specific endianness.
+ * TODO: Should we use ntohs or something like that?
+ */
+void copyEndianAgnostic(unsigned char *dest, unsigned short src)
+{
+ dest[0] = src%0x100;
+ dest[1] = src/0x100;
+}
+
+/*.
+ * The interrupt handler for Fn $34.
+ */
+void FN_34_inthandler(struct rmi_function_info *rmifninfo,
+ unsigned int assertedIRQs)
+{
+ unsigned int status;
+ struct rmi_fn_34_data *fn34data = (struct rmi_fn_34_data *)rmifninfo->fndata;
+
+ /* Read the Fn $34 status register to see whether the previous command executed OK */
+ /* inform user space - through a sysfs param. */
+ if (rmi_read_multiple(rmifninfo->sensor, rmifninfo->funcDescriptor.dataBaseAddr+3,
+ (unsigned char *)&status, 1)) {
+ printk(KERN_ERR "%s : Could not read status from 0x%x\n",
+ __func__, rmifninfo->funcDescriptor.dataBaseAddr+3);
+ status = 0xff; /* failure */
+ }
+
+ /* set a sysfs value that the user mode can read - only upper 4 bits are the status */
+ fn34data->status = status & 0xf0; /* successful is $80, anything else is failure */
+}
+EXPORT_SYMBOL(FN_34_inthandler);
+
+void FN_34_attention(struct rmi_function_info *rmifninfo)
+{
+
+}
+EXPORT_SYMBOL(FN_34_attention);
+
+int FN_34_config(struct rmi_function_info *rmifninfo)
+{
+ pr_debug("%s: RMI4 function $34 config\n", __func__);
+ return 0;
+}
+EXPORT_SYMBOL(FN_34_config);
+
+
+int FN_34_init(struct rmi_function_device *function_device)
+{
+ int retval = 0;
+ unsigned char uData[2];
+ struct rmi_function_info *rmifninfo = function_device->rfi;
+ struct rmi_fn_34_data *fn34data;
+
+ pr_debug("%s: RMI4 function $34 init\n", __func__);
+
+ /* Here we will need to set up sysfs files for Bootloader ID and Block size */
+ fn34data = kzalloc(sizeof(struct rmi_fn_34_data), GFP_KERNEL);
+ if (!fn34data) {
+ printk(KERN_ERR "%s: Error allocating memeory for rmi_fn_34_data.\n", __func__);
+ return -ENOMEM;
+ }
+ rmifninfo->fndata = (void *)fn34data;
+
+ /* set up sysfs file for Bootloader ID. */
+ if (sysfs_create_file(&function_device->dev.kobj, &dev_attr_bootloaderid.attr) < 0) {
+ printk(KERN_ERR "%s: Failed to create sysfs file for fn 34 bootloaderid.\n", __func__);
+ return -ENODEV;
+ }
+
+ /* set up sysfs file for Block Size. */
+ if (sysfs_create_file(&function_device->dev.kobj, &dev_attr_blocksize.attr) < 0) {
+ printk(KERN_ERR "%s: Failed to create sysfs file for fn 34 blocksize.\n", __func__);
+ return -ENODEV;
+ }
+
+ /* get the Bootloader ID and Block Size and store in the sysfs attributes. */
+ retval = rmi_read_multiple(rmifninfo->sensor, rmifninfo->funcDescriptor.queryBaseAddr,
+ uData, 2);
+ if (retval) {
+ printk(KERN_ERR "%s : Could not read bootloaderid from 0x%x\n",
+ __func__, function_device->function->functionQueryBaseAddr);
+ return retval;
+ }
+ /* need to convert from our firmware storage to processore specific data */
+ fn34data->bootloaderid = (unsigned int)uData[0] + (unsigned int)uData[1]*0x100;
+
+ retval = rmi_read_multiple(rmifninfo->sensor, rmifninfo->funcDescriptor.queryBaseAddr+3,
+ uData, 2);
+ if (retval) {
+ printk(KERN_ERR "%s : Could not read block size from 0x%x\n",
+ __func__, rmifninfo->funcDescriptor.queryBaseAddr+3);
+ return retval;
+ }
+ /* need to convert from our firmware storage to processor specific data */
+ fn34data->blocksize = (unsigned int)uData[0] + (unsigned int)uData[1]*0x100;
+
+ /* set up sysfs file for status. */
+ if (sysfs_create_file(&function_device->dev.kobj, &dev_attr_status.attr) < 0) {
+ printk(KERN_ERR "%s: Failed to create sysfs file for fn 34 status.\n", __func__);
+ return -ENODEV;
+ }
+
+ /* Also, sysfs will need to have a file set up to distinguish between commands - like
+ Config write/read, Image write/verify.*/
+ /* set up sysfs file for command code. */
+ if (sysfs_create_file(&function_device->dev.kobj, &dev_attr_cmd.attr) < 0) {
+ printk(KERN_ERR "%s: Failed to create sysfs file for fn 34 cmd.\n", __func__);
+ return -ENODEV;
+ }
+
+ /* We will also need a sysfs file for the image/config block to write or read.*/
+ /* set up sysfs bin file for binary data block. Since the image is already in our format
+ there is no need to convert the data for endianess. */
+ if (sysfs_create_bin_file(&function_device->dev.kobj, &dev_attr_data) < 0) {
+ printk(KERN_ERR "%s: Failed to create sysfs file for fn 34 data.\n", __func__);
+ return -ENODEV;
+ }
+
+ return retval;
+}
+EXPORT_SYMBOL(FN_34_init);
+
+int FN_34_detect(struct rmi_function_info *rmifninfo,
+ struct rmi_function_descriptor *fndescr, unsigned int interruptCount)
+{
+ int i;
+ int InterruptOffset;
+ int retval = 0;
+
+ pr_debug("%s: RMI4 function $34 detect\n", __func__);
+ if (rmifninfo->sensor == NULL) {
+ printk(KERN_ERR "%s: NULL sensor passed in!", __func__);
+ return -EINVAL;
+ }
+
+ /* Store addresses - used elsewhere to read data,
+ * control, query, etc. */
+ rmifninfo->funcDescriptor.queryBaseAddr = fndescr->queryBaseAddr;
+ rmifninfo->funcDescriptor.commandBaseAddr = fndescr->commandBaseAddr;
+ rmifninfo->funcDescriptor.controlBaseAddr = fndescr->controlBaseAddr;
+ rmifninfo->funcDescriptor.dataBaseAddr = fndescr->dataBaseAddr;
+ rmifninfo->funcDescriptor.interruptSrcCnt = fndescr->interruptSrcCnt;
+ rmifninfo->funcDescriptor.functionNum = fndescr->functionNum;
+
+ rmifninfo->numSources = fndescr->interruptSrcCnt;
+
+ /* Need to get interrupt info to be used later when handling
+ interrupts. */
+ rmifninfo->interruptRegister = interruptCount/8;
+
+ /* loop through interrupts for each source and or in a bit
+ to the interrupt mask for each. */
+ InterruptOffset = interruptCount % 8;
+
+ for (i = InterruptOffset;
+ i < ((fndescr->interruptSrcCnt & 0x7) + InterruptOffset);
+ i++) {
+ rmifninfo->interruptMask |= 1 << i;
+ }
+
+ return retval;
+}
+EXPORT_SYMBOL(FN_34_detect);
+
+static ssize_t rmi_fn_34_bootloaderid_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct rmi_fn_34_data *fn34data = (struct rmi_fn_34_data *)fn->rfi->fndata;
+
+ return sprintf(buf, "%u\n", fn34data->bootloaderid);
+}
+
+static ssize_t rmi_fn_34_bootloaderid_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ int error;
+ unsigned long val;
+ unsigned char uData[2];
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct rmi_fn_34_data *fn34data = (struct rmi_fn_34_data *)fn->rfi->fndata;
+
+ /* need to convert the string data to an actual value */
+ error = strict_strtoul(buf, 10, &val);
+
+ if (error)
+ return error;
+
+ fn34data->bootloaderid = val;
+
+ /* Write the Bootloader ID key data back to the first two Block Data registers
+ (F34_Flash_Data2.0 and F34_Flash_Data2.1).*/
+ copyEndianAgnostic(uData, (unsigned short)val);
+ error = rmi_write_multiple(fn->sensor, fn->function->functionDataBaseAddr,
+ uData, 2);
+ if (error) {
+ printk(KERN_ERR "%s : Could not write bootloader id to 0x%x\n",
+ __func__, fn->function->functionDataBaseAddr);
+ return error;
+ }
+
+ return count;
+}
+
+static ssize_t rmi_fn_34_blocksize_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct rmi_fn_34_data *fn34data = (struct rmi_fn_34_data *)fn->rfi->fndata;
+
+ return sprintf(buf, "%u\n", fn34data->blocksize);
+}
+
+static ssize_t rmi_fn_34_blocksize_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ /* Block Size is RO so we shouldn't do anything if the
+ user space writes to the sysfs file. */
+
+ return -EPERM;
+}
+
+static ssize_t rmi_fn_34_status_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct rmi_fn_34_data *fn34data = (struct rmi_fn_34_data *)fn->rfi->fndata;
+
+ return sprintf(buf, "%u\n", fn34data->status);
+}
+
+static ssize_t rmi_fn_34_status_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ /* Status is RO so we shouldn't do anything if the user
+ app writes to the sysfs file. */
+ return -EPERM;
+}
+
+static ssize_t rmi_fn_34_cmd_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct rmi_fn_34_data *fn34data = (struct rmi_fn_34_data *)fn->rfi->fndata;
+
+ return sprintf(buf, "%u\n", fn34data->cmd);
+}
+
+static ssize_t rmi_fn_34_cmd_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct rmi_fn_34_data *fn34data = (struct rmi_fn_34_data *)fn->rfi->fndata;
+ unsigned long val;
+ unsigned char cmd;
+ int error;
+
+ /* need to convert the string data to an actual value */
+ error = strict_strtoul(buf, 10, &val);
+
+ if (error)
+ return error;
+
+ fn34data->cmd = val;
+
+ /* determine the proper command to issue.
+ */
+ switch (val) {
+ case ENABLE_FLASH_PROG:
+ /* Issue a Flash Program Enable ($0F) command to the Flash Command
+ (F34_Flash_Data3, bits 3:0) field.*/
+ cmd = 0x0F;
+ error = rmi_write_multiple(fn->sensor, fn->function->functionDataBaseAddr+3,
+ (unsigned char *)&cmd, 1);
+ if (error) {
+ printk(KERN_ERR "%s : Could not write Flash Program Enable cmd to 0x%x\n",
+ __func__, fn->function->functionDataBaseAddr+3);
+ return error;
+ }
+ break;
+
+ case ERASE_ALL:
+ /* Issue a Erase All ($03) command to the Flash Command
+ (F34_Flash_Data3, bits 3:0) field.*/
+ cmd = 0x03;
+ error = rmi_write_multiple(fn->sensor, fn->function->functionDataBaseAddr+3,
+ (unsigned char *)&cmd, 1);
+ if (error) {
+ printk(KERN_ERR "%s : Could not write Erase All cmd to 0x%x\n",
+ __func__, fn->function->functionDataBaseAddr+3);
+ return error;
+ }
+ break;
+
+ case ERASE_CONFIG:
+ /* Issue a Erase Configuration ($07) command to the Flash Command
+ (F34_Flash_Data3, bits 3:0) field.*/
+ cmd = 0x07;
+ error = rmi_write_multiple(fn->sensor, fn->function->functionDataBaseAddr+3,
+ (unsigned char *)&cmd, 1);
+ if (error) {
+ printk(KERN_ERR "%s : Could not write Erase Configuration cmd to 0x%x\n",
+ __func__, fn->function->functionDataBaseAddr+3);
+ return error;
+ }
+ break;
+
+ case WRITE_FW_BLOCK:
+ /* Issue a Write Firmware Block ($02) command to the Flash Command
+ (F34_Flash_Data3, bits 3:0) field.*/
+ cmd = 0x02;
+ error = rmi_write_multiple(fn->sensor, fn->function->functionDataBaseAddr+3,
+ (unsigned char *)&cmd, 1);
+ if (error) {
+ printk(KERN_ERR "%s : Could not write Write Firmware Block cmd to 0x%x\n",
+ __func__, fn->function->functionDataBaseAddr+3);
+ return error;
+ }
+ break;
+
+ case WRITE_CONFIG_BLOCK:
+ /* Issue a Write Config Block ($06) command to the Flash Command
+ (F34_Flash_Data3, bits 3:0) field.*/
+ cmd = 0x06;
+ error = rmi_write_multiple(fn->sensor, fn->function->functionDataBaseAddr+3,
+ (unsigned char *)&cmd, 1);
+ if (error) {
+ printk(KERN_ERR "%s : Could not write Write Config Block cmd to 0x%x\n",
+ __func__, fn->function->functionDataBaseAddr+3);
+ return error;
+ }
+ break;
+
+ case READ_CONFIG_BLOCK:
+ /* Issue a Read Config Block ($05) command to the Flash Command
+ (F34_Flash_Data3, bits 3:0) field.*/
+ cmd = 0x05;
+ error = rmi_write_multiple(fn->sensor, fn->function->functionDataBaseAddr+3,
+ (unsigned char *)&cmd, 1);
+ if (error) {
+ printk(KERN_ERR "%s : Could not write Read Config Block cmd to 0x%x\n",
+ __func__, fn->function->functionDataBaseAddr+3);
+ return error;
+ }
+ break;
+
+ case DISABLE_FLASH_PROG:
+ /* Issue a reset command ($01) - this will reboot the sensor and ATTN will now go to
+ the Fn $01 instead of the Fn $34 since the sensor will no longer be in Flash mode. */
+ cmd = 0x01;
+ /*if ((error = rmi_write_multiple(fn->sensor, fn->sensor->sensorCommandBaseAddr,
+ (unsigned char *)&cmd, 1))) {
+ printk(KERN_ERR "%s : Could not write Reset cmd to 0x%x\n",
+ __func__, fn->sensor->sensorCommandBaseAddr);
+ return error;
+ }*/
+ break;
+
+ default:
+ pr_debug("%s: RMI4 function $34 - unknown command.\n", __func__);
+ break;
+ }
+
+ return count;
+}
+
+static ssize_t rmi_fn_34_data_read(struct file * filp,
+ struct kobject *kobj,
+ struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count)
+{
+ struct device *dev = container_of(kobj, struct device, kobj);
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ int error;
+
+ /* TODO: add check for count to verify it's the correct blocksize */
+
+ /* read the data from flash into buf. */
+ /* the app layer will be blocked at reading from the sysfs file. */
+ /* when we return the count (or error if we fail) the app will resume. */
+ error = rmi_read_multiple(fn->sensor, fn->function->functionDataBaseAddr+pos,
+ (unsigned char *)buf, count);
+ if (error) {
+ printk(KERN_ERR "%s : Could not read data from 0x%llx\n",
+ __func__, fn->function->functionDataBaseAddr+pos);
+ return error;
+ }
+
+ return count;
+}
+
+static ssize_t rmi_fn_34_data_write(struct file *filp,
+ struct kobject *kobj,
+ struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count)
+{
+ struct device *dev = container_of(kobj, struct device, kobj);
+ struct rmi_function_device *fn = dev_get_drvdata(dev);
+ struct rmi_fn_34_data *fn34data = (struct rmi_fn_34_data *)fn->rfi->fndata;
+ unsigned int blocknum;
+ int error;
+
+ /* write the data from buf to flash. */
+ /* the app layer will be blocked at writing to the sysfs file. */
+ /* when we return the count (or error if we fail) the app will resume. */
+
+ /* TODO: Add check on count - if non-zero veriy it's the correct blocksize */
+
+ /* Verify that the byte offset is always aligned on a block boundary and if not
+ return an error. We can't just use the mod operator % and do a (pos % fn34data->blocksize) because of a gcc
+ bug that results in undefined symbols. So we have to compute it the hard
+ way. Grumble. */
+ unsigned int remainder;
+ div_u64_rem(pos, fn34data->blocksize, &remainder);
+ if (remainder) {
+ printk(KERN_ERR "%s : Invalid byte offset of %llx leads to invalid block number.\n",
+ __func__, pos);
+ return -EINVAL;
+ }
+
+ /* Compute the block number using the byte offset (pos) and the block size.
+ once again, we can't just do a divide due to a gcc bug. */
+ blocknum = div_u64(pos, fn34data->blocksize);
+
+ /* Write the block number first */
+ error = rmi_write_multiple(fn->sensor, fn->function->functionDataBaseAddr,
+ (unsigned char *)&blocknum, 2);
+ if (error) {
+ printk(KERN_ERR "%s : Could not write block number to 0x%x\n",
+ __func__, fn->function->functionDataBaseAddr);
+ return error;
+ }
+
+ /* Write the data block - only if the count is non-zero */
+ if (count) {
+ error = rmi_write_multiple(fn->sensor, fn->function->functionDataBaseAddr+2,
+ (unsigned char *)buf, count);
+ if (error) {
+ printk(KERN_ERR "%s : Could not write block data to 0x%x\n",
+ __func__, fn->function->functionDataBaseAddr+2);
+ return error;
+ }
+ }
+
+ return count;
+}
diff --git a/drivers/input/touchscreen/synaptics/rmi_f34.h b/drivers/input/touchscreen/synaptics/rmi_f34.h
new file mode 100644
index 0000000..48293e3
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_f34.h
@@ -0,0 +1,50 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) Function $34 header.
+ * Copyright (c) 2007 - 2011, Synaptics Incorporated
+ *
+ * There is only one function $34 for each RMI4 sensor. This will be
+ * the function that is used to reflash the firmware and get the
+ * boot loader address and the boot image block size.
+ *
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+#ifndef _RMI_FUNCTION_34_H
+#define _RMI_FUNCTION_34_H
+
+/* define fn $34 commands */
+#define WRITE_FW_BLOCK 2
+#define ERASE_ALL 3
+#define READ_CONFIG_BLOCK 5
+#define WRITE_CONFIG_BLOCK 6
+#define ERASE_CONFIG 7
+#define ENABLE_FLASH_PROG 15
+#define DISABLE_FLASH_PROG 16
+
+void FN_34_inthandler(struct rmi_function_info *rmifninfo,
+ unsigned int assertedIRQs);
+int FN_34_config(struct rmi_function_info *rmifninfo);
+int FN_34_init(struct rmi_function_device *function_device);
+int FN_34_detect(struct rmi_function_info *rmifninfo,
+ struct rmi_function_descriptor *fndescr,
+ unsigned int interruptCount);
+void FN_34_attention(struct rmi_function_info *rmifninfo);
+
+#endif
diff --git a/drivers/input/touchscreen/synaptics/rmi_function.c b/drivers/input/touchscreen/synaptics/rmi_function.c
new file mode 100644
index 0000000..2be6ef6
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_function.c
@@ -0,0 +1,325 @@
+/**
+ * Synaptics Register Mapped Interface (RMI4) - RMI Function Module.
+ * Copyright (C) 2007 - 2011, Synaptics Incorporated
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+static const char functionname[10] = "fn";
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/hrtimer.h>
+#include <linux/miscdevice.h>
+#include <linux/fs.h>
+#include <linux/delay.h>
+#include <linux/uaccess.h>
+#include <linux/slab.h>
+#include <linux/kthread.h>
+#include <linux/freezer.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+
+#include "rmi_drvr.h"
+#include "rmi_function.h"
+#include "rmi_bus.h"
+#include "rmi_sensor.h"
+#include "rmi_f01.h"
+#include "rmi_f05.h"
+#include "rmi_f11.h"
+#include "rmi_f19.h"
+#include "rmi_f34.h"
+
+/* Each time a new RMI4 function support is added the developer needs to
+bump the number of supported functions and add the info for
+that RMI4 function to the array along with pointers to the report,
+config, init and detect functions that they coded in rmi_fxx.c
+and rmi_fxx.h - where xx is the RMI4 function number in hex for the new
+RMI4 data source function. The information for the RMI4 functions is
+obtained from the RMI4 specification document.
+ */
+#define rmi4_num_supported_data_src_fns 5
+
+/* supported RMI4 functions list - controls what we
+ * will provide support for - if it's not in the list then
+ * the developer needs to add support functions for it.*/
+static LIST_HEAD(fns_list);
+static DEFINE_MUTEX(fns_mutex);
+
+/* NOTE: Developer - add in any new RMI4 fn data info - function number
+ * and ptrs to report, config, init and detect functions. This data is
+ * used to point to the functions that need to be called to config, init,
+ * detect and report data for the new RMI4 function. Refer to the RMI4
+ * specification for information on RMI4 functions.
+ */
+/* TODO: This will eventually go away, and each function will be an independent
+ * module. */
+static struct rmi_functions_data
+ rmi4_supported_data_src_functions[rmi4_num_supported_data_src_fns] = {
+ /* Fn $11 - 2D sensing */
+ {.functionNumber = 0x11, .inthandlerFn = FN_11_inthandler, .configFn = FN_11_config, .initFn = FN_11_init, .detectFn = FN_11_detect, .attnFn = NULL},
+ /* Fn $01 - device control */
+ {.functionNumber = 0x01, .inthandlerFn = FN_01_inthandler, .configFn = FN_01_config, .initFn = FN_01_init, .detectFn = FN_01_detect, .attnFn = FN_01_attention},
+ /* Fn $05 - analog report */
+ {.functionNumber = 0x05, .inthandlerFn = FN_05_inthandler, .configFn = FN_05_config, .initFn = FN_05_init, .detectFn = FN_05_detect, .attnFn = NULL},
+ /* Fn $19 - buttons */
+ {.functionNumber = 0x19, .inthandlerFn = FN_19_inthandler, .configFn = FN_19_config, .initFn = FN_19_init, .detectFn = FN_19_detect, .attnFn = NULL},
+ /* Fn $34 - firmware reflash */
+ {.functionNumber = 0x34, .inthandlerFn = FN_34_inthandler, .configFn = FN_34_config, .initFn = FN_34_init, .detectFn = FN_34_detect, .attnFn = FN_34_attention},
+};
+
+
+/* This function is here to provide a way for external modules to access the
+ * functions list. It will try to find a matching function base on the passed
+ * in RMI4 function number and return the pointer to the struct rmi_functions
+ * if a match is found or NULL if not found.
+ */
+struct rmi_functions *rmi_find_function(int functionNum)
+{
+ struct rmi_functions *fn;
+ bool found = false;
+
+ list_for_each_entry(fn, &fns_list, link) {
+ if (functionNum == fn->functionNum) {
+ found = true;
+ break;
+ }
+ }
+
+ if (!found)
+ return NULL;
+ else
+ return fn;
+}
+EXPORT_SYMBOL(rmi_find_function);
+
+
+static void rmi_function_config(struct rmi_function_device *function)
+{
+ printk(KERN_DEBUG "%s: rmi_function_config", __func__);
+
+}
+
+#if 0 /* This may not be needed anymore. */
+/**
+ * This is the probe function passed to the RMI4 subsystem that gives us a
+ * chance to recognize an RMI4 function.
+ */
+static int rmi_function_probe(struct rmi_function_driver *function)
+{
+ struct rmi_phys_driver *rpd;
+
+ rpd = function->rpd;
+
+ if (!rpd) {
+ printk(KERN_ERR "%s: Invalid rmi physical driver - null ptr.", __func__);
+ return 0;
+ }
+
+ return 1;
+}
+#endif
+
+/** Just a stub for now.
+ */
+static int rmi_function_suspend(struct device *dev, pm_message_t state)
+{
+ printk(KERN_INFO "%s: function suspend called.", __func__);
+ return 0;
+}
+
+/** Just a stub for now.
+ */
+static int rmi_function_resume(struct device *dev)
+{
+ printk(KERN_INFO "%s: function resume called.", __func__);
+ return 0;
+}
+
+int rmi_function_register_driver(struct rmi_function_driver *drv, int fnNumber)
+{
+ int retval;
+ char *drvrname;
+
+ printk(KERN_INFO "%s: Registering function driver for F%02x.\n", __func__, fnNumber);
+
+ retval = 0;
+
+ /* Create a function device and function driver for this Fn */
+ drvrname = kzalloc(sizeof(functionname) + 4, GFP_KERNEL);
+ if (!drvrname) {
+ printk(KERN_ERR "%s: Error allocating memeory for rmi_function_driver name.\n", __func__);
+ return -ENOMEM;
+ }
+ sprintf(drvrname, "fn%02x", fnNumber);
+
+ drv->drv.name = drvrname;
+ drv->module = drv->drv.owner;
+
+ drv->drv.suspend = rmi_function_suspend;
+ drv->drv.resume = rmi_function_resume;
+
+ /* register the sensor driver */
+ retval = driver_register(&drv->drv);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed driver_register %d\n",
+ __func__, retval);
+ }
+
+ return retval;
+}
+EXPORT_SYMBOL(rmi_function_register_driver);
+
+void rmi_function_unregister_driver(struct rmi_function_driver *drv)
+{
+ printk(KERN_INFO "%s: Unregistering function driver.\n", __func__);
+
+ driver_unregister(&drv->drv);
+}
+EXPORT_SYMBOL(rmi_function_unregister_driver);
+
+int rmi_function_register_device(struct rmi_function_device *function_device, int fnNumber)
+{
+ struct input_dev *input;
+ int retval;
+
+ printk(KERN_INFO "%s: Registering function device for F%02x.\n", __func__, fnNumber);
+
+ retval = 0;
+
+ /* make name - fn11, fn19, etc. */
+ dev_set_name(&function_device->dev, "%sfn%02x", function_device->sensor->drv.name, fnNumber);
+ dev_set_drvdata(&function_device->dev, function_device);
+ retval = device_register(&function_device->dev);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed device_register for function device.\n",
+ __func__);
+ return retval;
+ }
+
+ input = input_allocate_device();
+ if (input == NULL) {
+ printk(KERN_ERR "%s: Failed to allocate memory for a "
+ "new input device.\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ input->name = dev_name(&function_device->dev);
+ input->phys = "rmi_function";
+ function_device->input = input;
+
+
+ /* init any input specific params for this function */
+ function_device->rmi_funcs->init(function_device);
+
+ retval = input_register_device(input);
+
+ if (retval) {
+ printk(KERN_ERR "%s: Failed input_register_device.\n",
+ __func__);
+ return retval;
+ }
+
+
+ rmi_function_config(function_device);
+
+ return retval;
+}
+EXPORT_SYMBOL(rmi_function_register_device);
+
+void rmi_function_unregister_device(struct rmi_function_device *dev)
+{
+ printk(KERN_INFO "%s: Unregistering function device.n", __func__);
+
+ input_unregister_device(dev->input);
+ device_unregister(&dev->dev);
+}
+EXPORT_SYMBOL(rmi_function_unregister_device);
+
+static int __init rmi_function_init(void)
+{
+ struct rmi_functions_data *rmi4_fn;
+ int i;
+
+ printk(KERN_DEBUG "%s: RMI Function Init\n", __func__);
+
+ /* Initialize global list of RMI4 Functions.
+ We need to add the supported RMI4 funcions so that we will have
+ pointers to the associated functions for init, config, report and
+ detect. See rmi.h for more details. The developer will add a new
+ RMI4 function number in the array in rmi_drvr.h, then add a new file to
+ the build (called rmi_fXX.c where XX is the hex number for
+ the added RMI4 function). The rest should be automatic.
+ */
+
+ /* for each function number defined in rmi.h creat a new rmi_function
+ struct and initialize the pointers to the servicing functions and then
+ add it into the global list for function support.
+ */
+ for (i = 0; i < rmi4_num_supported_data_src_fns; i++) {
+ /* Add new rmi4 function struct to list */
+ struct rmi_functions *fn = kzalloc(sizeof(*fn), GFP_KERNEL);
+ if (!fn) {
+ printk(KERN_ERR "%s: could not allocate memory "
+ "for rmi_function struct for function 0x%x\n",
+ __func__,
+ rmi4_supported_data_src_functions[i].functionNumber);
+ return -ENOMEM;
+ } else {
+
+ rmi4_fn = &rmi4_supported_data_src_functions[i];
+ fn->functionNum = rmi4_fn->functionNumber;
+ /* Fill in ptrs to functions. The functions are
+ linked in from a file called rmi_fxx.c
+ where xx is the hex number of the RMI4 function
+ from the RMI4 spec. Also, the function prototypes
+ need to be added to rmi_fxx.h - also where
+ xx is the hex number of the RMI4 function. So
+ that you don't get compile errors and that new
+ header needs to be included in the rmi_function.h
+ */
+ fn->inthandler = rmi4_fn->inthandlerFn;
+ fn->config = rmi4_fn->configFn;
+ fn->init = rmi4_fn->initFn;
+ fn->detect = rmi4_fn->detectFn;
+ fn->attention = rmi4_fn->attnFn;
+
+ /* Add the new fn to the global list */
+ mutex_lock(&fns_mutex);
+ list_add_tail(&fn->link, &fns_list);
+ mutex_unlock(&fns_mutex);
+ }
+ }
+
+ return 0;
+}
+
+static void __exit rmi_function_exit(void)
+{
+ printk(KERN_DEBUG "%s: RMI Function Exit\n", __func__);
+}
+
+
+module_init(rmi_function_init);
+module_exit(rmi_function_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("RMI4 Function Driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/input/touchscreen/synaptics/rmi_function.h b/drivers/input/touchscreen/synaptics/rmi_function.h
new file mode 100644
index 0000000..801609b
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_function.h
@@ -0,0 +1,213 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) Function Device Header File.
+ * Copyright (c) 2007 - 2011, Synaptics Incorporated
+ *
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+#ifndef _RMI_FUNCTION_H
+#define _RMI_FUNCTION_H
+
+#include <linux/input.h>
+#include <linux/device.h>
+
+
+/* For each function present on the RMI device, there will be a corresponding
+ * entry in the functions list of the rmi_sensor_driver structure. This entry
+ * gives information about the number of data sources and the number of data
+ * registers associated with the function.
+ */
+struct rmi_function_info {
+ /* The sensor this function belongs to.
+ */
+ struct rmi_sensor_driver *sensor;
+
+ /* A device associated with this function.
+ */
+ struct rmi_function_device *function_device;
+
+ unsigned char functionNum;
+
+ /* This is the number of data sources associated with the function.*/
+ unsigned char numSources;
+
+ /* This is the number of data registers to read.*/
+ unsigned char dataRegBlockSize;
+
+ /* This is the interrupt register and mask - needed for enabling the
+ * interrupts and for checking what source had caused the attention line
+ * interrupt.
+ */
+ unsigned char interruptRegister;
+ unsigned char interruptMask;
+
+ /* This is the RMI function descriptor associated with this function.
+ * It contains the Base addresses for the functions query, command,
+ * control, and data registers.
+ */
+ struct rmi_function_descriptor funcDescriptor;
+
+ /* pointer to data specific to a functions implementation. */
+ void *fndata;
+
+ /* A list of the function information.
+ * This list uses the standard kernel linked list implementation.
+ * Documentation on on how to use it can be found at
+ * http://isis.poly.edu/kulesh/stuff/src/klist/.
+ */
+ struct list_head link;
+};
+
+
+/* This struct is for creating a list of RMI4 functions that have data sources
+associated with them. This is to facilitate adding new support for other
+data sources besides 2D sensors.
+To add a new data source support, the developer will create a new file
+and add these 4 functions below with FN$## in front of the names - where
+## is the hex number for the function taken from the RMI4 specification.
+
+The function number will be associated with this and later will be used to
+match the RMI4 function to the 4 functions for that RMI4 function number.
+The user will also have to add code that adds the new rmi_functions item
+to the global list of RMI4 functions and stores the pointers to the 4
+functions in the function pointers.
+ */
+struct rmi_functions {
+ unsigned char functionNum;
+
+ /* Pointers to function specific functions for interruptHandler, config, init
+ , detect and attention. */
+ /* These ptrs. need to be filled in for every RMI4 function that has
+ data source(s) associated with it - like fn $11 (2D sensors),
+ fn $19 (buttons), etc. Each RMI4 function that has data sources
+ will be added into a list that is used to match the function
+ number against the number stored here.
+ */
+ /* The sensor implementation will call this whenever and IRQ is
+ * dispatched that this function is interested in.
+ */
+ void (*inthandler)(struct rmi_function_info *rfi, unsigned int assertedIRQs);
+
+ int (*config)(struct rmi_function_info *rmifninfo);
+ int (*init)(struct rmi_function_device *function_device);
+ int (*detect)(struct rmi_function_info *rmifninfo,
+ struct rmi_function_descriptor *fndescr,
+ unsigned int interruptCount);
+ /** If this is non-null, the sensor implemenation will call this
+ * whenever the ATTN line is asserted.
+ */
+ void (*attention)(struct rmi_function_info *rmifninfo);
+
+
+ /* Standard kernel linked list implementation.
+ * Documentation on how to use it can be found at
+ * http://isis.poly.edu/kulesh/stuff/src/klist/.
+ */
+ struct list_head link;
+};
+
+
+typedef void(*inthandlerFuncPtr)(struct rmi_function_info *rfi, unsigned int assertedIRQs);
+typedef int(*configFuncPtr)(struct rmi_function_info *rmifninfo);
+typedef int(*initFuncPtr)(struct rmi_function_device *function_device);
+typedef int(*detectFuncPtr)(struct rmi_function_info *rmifninfo,
+ struct rmi_function_descriptor *fndescr,
+ unsigned int interruptCount);
+typedef void (*attnFuncPtr)(struct rmi_function_info *rmifninfo);
+
+struct rmi_functions_data {
+ int functionNumber;
+ inthandlerFuncPtr inthandlerFn;
+ configFuncPtr configFn;
+ initFuncPtr initFn;
+ detectFuncPtr detectFn;
+ attnFuncPtr attnFn;
+};
+
+
+struct rmi_functions *rmi_find_function(int functionNum);
+int rmi_functions_init(struct input_dev *inputdev);
+
+struct rmi_function_driver {
+ struct module *module;
+ struct device_driver drv;
+
+ /* Probe Function
+ * This function is called to give the function driver layer an
+ * opportunity to claim an RMI function.
+ */
+ int (*probe)(struct rmi_function_driver *function);
+ /* Config Function
+ * This function is called after a successful probe. It gives the
+ * function driver an opportunity to query and/or configure an RMI
+ * function before data starts flowing.
+ */
+ void (*config)(struct rmi_function_driver *function);
+
+ unsigned short functionQueryBaseAddr; /* RMI4 function control */
+ unsigned short functionControlBaseAddr;
+ unsigned short functionCommandBaseAddr;
+ unsigned short functionDataBaseAddr;
+ unsigned int interruptRegisterOffset; /* offset from start of interrupt registers */
+ unsigned int interruptMask;
+
+ /* pointer to the corresponding phys driver info for this sensor */
+ /* The phys driver has the pointers to read, write, etc. */
+ /* Probably don't need it here - used down in bus driver and sensor driver */
+ struct rmi_phys_driver *rpd;
+
+ /* Standard kernel linked list implementation.
+ * Documentation on how to use it can be found at
+ * http://isis.poly.edu/kulesh/stuff/src/klist/.
+ */
+ struct list_head function_drivers; /* link function drivers into list */
+};
+
+struct rmi_function_device {
+ struct rmi_function_driver *function;
+ struct device dev;
+ struct input_dev *input;
+ struct rmi_sensor_driver *sensor; /* need this to be bound to phys driver layer */
+
+ /* the function ptrs to the config, init, detect and
+ report fns for this rmi function device. */
+ struct rmi_functions *rmi_funcs;
+ struct rmi_function_info *rfi;
+
+ /** An RMI sensor might actually have several IRQ registers -
+ * this tells us which IRQ register this function is interested in.
+ */
+ unsigned int irqRegisterSet;
+
+ /** This is a mask of the IRQs the function is interested in.
+ */
+ unsigned int irqMask;
+
+ /* Standard kernel linked list implementation.
+ * Documentation on how to use it can be found at
+ * http://isis.poly.edu/kulesh/stuff/src/klist/.
+ */
+ struct list_head functions; /* link functions into list */
+};
+
+int rmi_function_register_device(struct rmi_function_device *dev, int fnNumber);
+
+#endif
diff --git a/drivers/input/touchscreen/synaptics/rmi_i2c.c b/drivers/input/touchscreen/synaptics/rmi_i2c.c
new file mode 100644
index 0000000..1932b9b
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_i2c.c
@@ -0,0 +1,633 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) I2C Physical Layer Driver.
+ * Copyright (c) 2007-2011, Synaptics Incorporated
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/input/rmi_platformdata.h>
+#include <linux/input/rmi_i2c.h>
+
+#include "rmi_drvr.h"
+
+#define DRIVER_NAME "rmi4_ts"
+
+#define DEVICE_NAME "rmi4_ts"
+
+/* Used to lock access to the page address.*/
+/* TODO: for multiple device support will need a per-device mutex */
+static DEFINE_MUTEX(page_mutex);
+
+
+static const struct i2c_device_id rmi_i2c_id_table[] = {
+ { DEVICE_NAME, 0 },
+ { },
+};
+MODULE_DEVICE_TABLE(i2c, rmi_i2c_id_table);
+
+
+/* Used to count the number of I2C modules we get.
+ */
+static int device_count;
+
+
+/*
+ * This is the data kept on a per instance (client) basis. This data is
+ * always accessible by using the container_of() macro of the various elements
+ * inside.
+ */
+struct instance_data {
+ int instance_no;
+ int irq;
+ struct rmi_phys_driver rmiphysdrvr;
+ struct i2c_client *i2cclient; /* pointer to i2c_client for later use in
+ read, write, read_multiple, etc. */
+ int page;
+};
+
+/*
+ * RMI devices have 16-bit addressing, but some of the physical
+ * implementations (like SMBus) only have 8-bit addressing. So RMI implements
+ * a page address at 0xff of every page so we can reliable page addresses
+ * every 256 registers. This function sets the page.
+ *
+ * The page_mutex lock must be held when this function is entered.
+ *
+ * param[in] id - The pointer to the instance_data struct
+ * param[in] page - The new page address.
+ * returns zero on success, non-zero on failure.
+ */
+/** Writing to page select is giving errors in some configurations. It's
+ * not needed for basic operation, so we've turned it off for the moment.
+ */
+#if defined(USE_PAGESELECT)
+int
+rmi_set_page(struct instance_data *instancedata, unsigned int page)
+{
+ char txbuf[2];
+ int retval;
+ txbuf[0] = 0xff;
+ txbuf[1] = page;
+ retval = i2c_master_send(instancedata->i2cclient, txbuf, 2);
+ if (retval != 2) {
+ dev_err(&instancedata->i2cclient->dev,
+ "%s: Set page failed: %d.", __func__, retval);
+ } else {
+ retval = 0;
+ instancedata->page = page;
+ }
+ return retval;
+}
+#else
+int
+rmi_set_page(struct instance_data *instancedata, unsigned int page)
+{
+ return 0;
+}
+#endif
+
+/*
+ * Read a single register through i2c.
+ *
+ * param[in] pd - The pointer to the rmi_phys_driver struct
+ * param[in] address - The address at which to start the data read.
+ * param[out] valp - Pointer to the buffer where the data will be stored.
+ * returns zero upon success (with the byte read in valp), non-zero upon error.
+ */
+static int
+rmi_i2c_read(struct rmi_phys_driver *physdrvr, unsigned short address, char *valp)
+{
+ struct instance_data *instancedata =
+ container_of(physdrvr, struct instance_data, rmiphysdrvr);
+
+ char txbuf[2];
+ int retval = 0;
+ int retry_count = 0;
+
+ /* Can't have anyone else changing the page behind our backs */
+ mutex_lock(&page_mutex);
+
+ if (((address >> 8) & 0xff) != instancedata->page) {
+ /* Switch pages */
+ retval = rmi_set_page(instancedata, ((address >> 8) & 0xff));
+ if (retval)
+ goto exit;
+ }
+
+retry:
+ txbuf[0] = address & 0xff;
+ retval = i2c_master_send(instancedata->i2cclient, txbuf, 1);
+
+ if (retval != 1) {
+ dev_err(&instancedata->i2cclient->dev, "%s: Write fail: %d\n",
+ __func__, retval);
+ goto exit;
+ }
+ retval = i2c_master_recv(instancedata->i2cclient, txbuf, 1);
+
+ if (retval != 1) {
+ if (++retry_count == 5) {
+ dev_err(&instancedata->i2cclient->dev,
+ "%s: Read of 0x%04x fail: %d\n",
+ __func__, address, retval);
+ } else {
+ mdelay(10);
+ rmi_set_page(instancedata, ((address >> 8) & 0xff));
+ goto retry;
+ }
+ } else {
+ retval = 0;
+ *valp = txbuf[0];
+ }
+exit:
+
+ mutex_unlock(&page_mutex);
+ return retval;
+}
+
+/*
+ * Same as rmi_i2c_read, except that multiple bytes are allowed to be read.
+ *
+ * param[in] pd - The pointer to the rmi_phys_driver struct
+ * param[in] address - The address at which to start the data read.
+ * param[out] valp - Pointer to the buffer where the data will be stored. This
+ * buffer must be at least size bytes long.
+ * param[in] size - The number of bytes to be read.
+ * returns zero upon success (with the byte read in valp), non-zero upon error.
+ *
+ */
+static int
+rmi_i2c_read_multiple(struct rmi_phys_driver *physdrvr, unsigned short address,
+ char *valp, int size)
+{
+ struct instance_data *instancedata =
+ container_of(physdrvr, struct instance_data, rmiphysdrvr);
+
+ char txbuf[2];
+ int retval = 0;
+ int retry_count = 0;
+
+ /* Can't have anyone else changing the page behind our backs */
+ mutex_lock(&page_mutex);
+
+ if (((address >> 8) & 0xff) != instancedata->page) {
+ /* Switch pages */
+ retval = rmi_set_page(instancedata, ((address >> 8) & 0xff));
+ if (retval)
+ goto exit;
+ }
+
+retry:
+ txbuf[0] = address & 0xff;
+ retval = i2c_master_send(instancedata->i2cclient, txbuf, 1);
+
+ if (retval != 1) {
+ dev_err(&instancedata->i2cclient->dev, "%s: Write fail: %d\n",
+ __func__, retval);
+ goto exit;
+ }
+ retval = i2c_master_recv(instancedata->i2cclient, valp, size);
+
+ if (retval != size) {
+ if (++retry_count == 5) {
+ dev_err(&instancedata->i2cclient->dev,
+ "%s: Read of 0x%04x size %d fail: %d\n",
+ __func__, address, size, retval);
+ } else {
+ mdelay(10);
+ rmi_set_page(instancedata, ((address >> 8) & 0xff));
+ goto retry;
+ }
+ } else {
+ retval = 0;
+ }
+exit:
+
+ mutex_unlock(&page_mutex);
+ return retval;
+}
+
+
+/*
+ * Write a single register through i2c.
+ * You can write multiple registers at once, but I made the functions for that
+ * seperate for performance reasons. Writing multiple requires allocation and
+ * freeing.
+ *
+ * param[in] pd - The pointer to the rmi_phys_driver struct
+ * param[in] address - The address at which to start the write.
+ * param[in] data - The data to be written.
+ * returns one upon success, something else upon error.
+ */
+static int
+rmi_i2c_write(struct rmi_phys_driver *physdrvr, unsigned short address, char data)
+{
+ struct instance_data *instancedata =
+ container_of(physdrvr, struct instance_data, rmiphysdrvr);
+
+ unsigned char txbuf[2];
+ int retval = 0;
+
+ /* Can't have anyone else changing the page behind our backs */
+ mutex_lock(&page_mutex);
+
+ if (((address >> 8) & 0xff) != instancedata->page) {
+ /* Switch pages */
+ retval = rmi_set_page(instancedata, ((address >> 8) & 0xff));
+ if (retval)
+ goto exit;
+ }
+
+ txbuf[0] = address & 0xff;
+ txbuf[1] = data;
+ retval = i2c_master_send(instancedata->i2cclient, txbuf, 2);
+
+ /* TODO: Add in retry on writes only in certian error return values */
+ if (retval != 2) {
+ dev_err(&instancedata->i2cclient->dev, "%s: Write fail: %d\n",
+ __func__, retval);
+ goto exit; /* Leave this in case we add code below */
+ } else {
+ retval = 1;
+ }
+exit:
+
+ mutex_unlock(&page_mutex);
+ return retval;
+}
+
+/*
+ * Write multiple registers.
+ *
+ * For fast writes of 16 bytes of less we will re-use a buffer on the stack.
+ * For larger writes (like for RMI reflashing) we will need to allocate a
+ * temp buffer.
+ *
+ * param[in] pd - The pointer to the rmi_phys_driver struct
+ * param[in] address - The address at which to start the write.
+ * param[in] valp - A pointer to a buffer containing the data to be written.
+ * param[in] size - The number of bytes to write.
+ * returns one upon success, something else upon error.
+ */
+static int
+rmi_i2c_write_multiple(struct rmi_phys_driver *physdrvr, unsigned short address,
+ char *valp, int size)
+{
+ struct instance_data *instancedata =
+ container_of(physdrvr, struct instance_data, rmiphysdrvr);
+
+ unsigned char *txbuf;
+ unsigned char txbuf_most[17]; /* Use this buffer for fast writes of 16
+ bytes or less. The first byte will
+ contain the address at which to start
+ the write. */
+ int retval = 0;
+ int i;
+
+ if (size < sizeof(txbuf_most)) {
+ /* Avoid an allocation if we can help it. */
+ txbuf = txbuf_most;
+ } else {
+ /* over 16 bytes write we'll need to allocate a temp buffer */
+ txbuf = kzalloc(size + 1, GFP_KERNEL);
+ if (!txbuf)
+ return -ENOMEM;
+ }
+
+ /* Yes, it stinks here that we have to copy the buffer */
+ /* We copy from valp to txbuf leaving
+ the first location open for the address */
+ for (i = 0; i < size; i++)
+ txbuf[i + 1] = valp[i];
+
+ /* Can't have anyone else changing the page behind our backs */
+ mutex_lock(&page_mutex);
+
+ if (((address >> 8) & 0xff) != instancedata->page) {
+ /* Switch pages */
+ retval = rmi_set_page(instancedata, ((address >> 8) & 0xff));
+ if (retval)
+ goto exit;
+ }
+
+ txbuf[0] = address & 0xff; /* put the address in the first byte */
+ retval = i2c_master_send(instancedata->i2cclient, txbuf, size + 1);
+
+ /* TODO: Add in retyr on writes only in certian error return values */
+ if (retval != 1) {
+ dev_err(&instancedata->i2cclient->dev, "%s: Write fail: %d\n",
+ __func__, retval);
+ goto exit;
+ }
+exit:
+
+ mutex_unlock(&page_mutex);
+ if (txbuf != txbuf_most)
+ kfree(txbuf);
+ return retval;
+}
+
+/*
+ * This is the Interrupt Service Routine. It just notifies the application
+ * layer that attention is required.
+ */
+static irqreturn_t
+i2c_attn_isr(int irq, void *info)
+{
+ struct instance_data *instancedata = info;
+
+ disable_irq_nosync(instancedata->irq);
+
+ if (instancedata->rmiphysdrvr.attention) {
+ instancedata->rmiphysdrvr.attention(&instancedata->rmiphysdrvr,
+ instancedata->instance_no);
+ }
+
+ return IRQ_HANDLED;
+}
+
+/* The Driver probe function - will allocate and initialize the instance
+ * data and request the irq and set the instance data as the clients
+ * platform data then register the physical driver which will do a scan of
+ * the RMI4 Physical Device Table and enumerate any RMI4 functions that
+ * have data sources associated with them.
+ */
+static int
+rmi_i2c_probe(struct i2c_client *client, const struct i2c_device_id *dev_id)
+{
+
+ struct instance_data *instancedata;
+ int retval = 0;
+ int irqtype = 0;
+
+ struct rmi_i2c_platformdata *platformdata;
+ struct rmi_sensordata *sensordata;
+
+ if (client == NULL) {
+ printk(KERN_ERR "%s: Invalid NULL client received.", __func__);
+ return -EINVAL;
+ }
+
+ printk(KERN_DEBUG "%s: Probing i2c RMI device, addr: 0x%02x", __func__, client->addr);
+
+
+ /* Allocate and initialize the instance data for this client */
+ instancedata = kzalloc(sizeof(*instancedata), GFP_KERNEL);
+ if (!instancedata) {
+ dev_err(&client->dev,
+ "%s: Out of memory trying to allocate instance_data.\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ instancedata->rmiphysdrvr.name = DRIVER_NAME;
+ instancedata->rmiphysdrvr.write = rmi_i2c_write;
+ instancedata->rmiphysdrvr.read = rmi_i2c_read;
+ instancedata->rmiphysdrvr.write_multiple = rmi_i2c_write_multiple;
+ instancedata->rmiphysdrvr.read_multiple = rmi_i2c_read_multiple;
+ instancedata->rmiphysdrvr.module = THIS_MODULE;
+
+ /* Set default to polling in case no matching platform data is located
+ for this device. We'll still work but in polling mode since we didn't
+ find any irq info */
+ instancedata->rmiphysdrvr.polling_required = true;
+
+ instancedata->page = 0xffff; /* Force a set page the first time */
+
+ /* cast to our struct rmi_i2c_platformdata so we know
+ the fields (see rmi_ic2.h) */
+ platformdata = client->dev.platform_data;
+ if (platformdata == NULL) {
+ printk(KERN_ERR "%s: CONFIGURATION ERROR - platform data is NULL.", __func__);
+ return -EINVAL;
+ }
+ sensordata = platformdata->sensordata;
+
+ /* Egregiously horrible delay here that seems to prevent I2C disasters on
+ * certain broken dev systems. In most cases, you can safely leave this
+ * as zero.
+ */
+ if (platformdata->delay_ms > 0)
+ mdelay(platformdata->delay_ms);
+
+ /* Call the platform setup routine, to do any setup that is required before
+ * interacting with the device.
+ */
+ if (sensordata && sensordata->rmi_sensor_setup) {
+ retval = sensordata->rmi_sensor_setup();
+ if (retval) {
+ printk(KERN_ERR "%s: sensor setup failed with code %d.", __func__, retval);
+ return retval;
+ }
+ }
+
+ printk(KERN_DEBUG "%s: sensor addr: 0x%02x irq: 0x%x type: %d",
+ __func__, platformdata->i2c_address, platformdata->irq, platformdata->irq_type);
+ if (client->addr != platformdata->i2c_address) {
+ printk(KERN_ERR "%s: CONFIGURATION ERROR - client I2C address 0x%02x doesn't match platform data address 0x%02x.", __func__, client->addr, platformdata->i2c_address);
+ return -EINVAL;
+ }
+
+ instancedata->instance_no = device_count++;
+
+ /* set the device name using the instance_no appended
+ to DEVICE_NAME to make a unique name */
+ dev_set_name(&client->dev,
+ "rmi4-i2c%d", instancedata->instance_no);
+
+ /* Determine if we need to poll (inefficient) or use interrupts.
+ */
+ if (platformdata->irq) {
+ instancedata->irq = platformdata->irq;
+ switch (platformdata->irq_type) {
+ case IORESOURCE_IRQ_HIGHEDGE:
+ irqtype = IRQF_TRIGGER_RISING;
+ break;
+ case IORESOURCE_IRQ_LOWEDGE:
+ irqtype = IRQF_TRIGGER_FALLING;
+ break;
+ case IORESOURCE_IRQ_HIGHLEVEL:
+ irqtype = IRQF_TRIGGER_HIGH;
+ break;
+ case IORESOURCE_IRQ_LOWLEVEL:
+ irqtype = IRQF_TRIGGER_LOW;
+ break;
+ default:
+ dev_warn(&client->dev,
+ "%s: Invalid IRQ flags in platform data.\n",
+ __func__);
+ kfree(instancedata);
+ return -ENXIO;
+ }
+
+ instancedata->rmiphysdrvr.polling_required = false;
+ instancedata->rmiphysdrvr.irq = instancedata->irq;
+
+ } else {
+ instancedata->rmiphysdrvr.polling_required = true;
+ dev_info(&client->dev,
+ "%s: No IRQ info given. Polling required.\n",
+ __func__);
+ }
+
+ /* Store the instance data in the i2c_client - we need to do this prior
+ * to calling register_physical_driver since it may use the read, write
+ * functions. If nothing was found then the id fields will be set to 0
+ * for the irq and the default will be set to polling required so we
+ * will still work but in polling mode. */
+ i2c_set_clientdata(client, instancedata);
+
+ /* Copy i2c_client pointer into instance_data's i2c_client pointer for
+ later use in rmi4_read, rmi4_write, etc. */
+ instancedata->i2cclient = client;
+
+ /* Register sensor drivers - this will call the detect function that
+ * will then scan the device and determine the supported RMI4 sensors
+ * and functions.
+ */
+ retval = rmi_register_sensor(&instancedata->rmiphysdrvr, platformdata->sensordata);
+ if (retval) {
+ dev_err(&client->dev, "%s: Failed to Register %s sensor drivers\n",
+ __func__, instancedata->rmiphysdrvr.name);
+ i2c_set_clientdata(client, NULL);
+ kfree(instancedata);
+ return retval;
+ }
+
+ if (instancedata->rmiphysdrvr.polling_required == false) {
+ retval = request_irq(instancedata->irq, i2c_attn_isr,
+ irqtype, "rmi_i2c", instancedata);
+ if (retval) {
+ dev_err(&client->dev, "%s: failed to obtain IRQ %d. Result: %d.",
+ __func__, instancedata->irq, retval);
+ dev_info(&client->dev, "%s: Reverting to polling.\n", __func__);
+ instancedata->rmiphysdrvr.polling_required = true;
+ /* TODO: Need to revert back to polling - create and start timer. */
+ } else {
+ dev_dbg(&client->dev, "%s: got irq.\n", __func__);
+ }
+ }
+
+ dev_dbg(&client->dev, "%s: Successfully registered %s sensor driver.\n",
+ __func__, instancedata->rmiphysdrvr.name);
+
+ printk(KERN_INFO "%s: Successfully registered %s sensor driver.\n", __func__, instancedata->rmiphysdrvr.name);
+
+ return retval;
+}
+
+/* The Driver remove function. We tear down the instance data and unregister
+ * the phys driver in this call.
+ */
+static int
+rmi_i2c_remove(struct i2c_client *client)
+{
+ struct instance_data *instancedata =
+ i2c_get_clientdata(client);
+
+ dev_dbg(&client->dev, "%s: Unregistering phys driver %s\n", __func__,
+ instancedata->rmiphysdrvr.name);
+
+ rmi_unregister_sensors(&instancedata->rmiphysdrvr);
+
+ dev_dbg(&client->dev, "%s: Unregistered phys driver %s\n",
+ __func__, instancedata->rmiphysdrvr.name);
+
+ /* only free irq if we have an irq - otherwise the instance_data
+ will be 0 for that field */
+ if (instancedata->irq)
+ free_irq(instancedata->irq, instancedata);
+
+ kfree(instancedata);
+ dev_dbg(&client->dev, "%s: Remove successful\n", __func__);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int
+rmi_i2c_suspend(struct i2c_client *client, pm_message_t mesg)
+{
+ /* Touch sleep mode */
+ return 0;
+}
+
+static int
+rmi_i2c_resume(struct i2c_client *client)
+{
+ /* Re-initialize upon resume */
+ return 0;
+}
+#else
+#define rmi_i2c_suspend NULL
+#define rmi_i2c_resume NULL
+#endif
+
+/*
+ * This structure tells the i2c subsystem about us.
+ *
+ * TODO: we should add .suspend and .resume fns.
+ *
+ */
+static struct i2c_driver rmi_i2c_driver = {
+ .probe = rmi_i2c_probe,
+ .remove = rmi_i2c_remove,
+ .suspend = rmi_i2c_suspend,
+ .resume = rmi_i2c_resume,
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ },
+ .id_table = rmi_i2c_id_table,
+};
+
+/*
+ * Register ourselves with i2c Chip Driver.
+ *
+ */
+static int __init rmi_phys_i2c_init(void)
+{
+ return i2c_add_driver(&rmi_i2c_driver);
+}
+
+/*
+ * Un-register ourselves from the i2c Chip Driver.
+ *
+ */
+static void __exit rmi_phys_i2c_exit(void)
+{
+ i2c_del_driver(&rmi_i2c_driver);
+}
+
+
+module_init(rmi_phys_i2c_init);
+module_exit(rmi_phys_i2c_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("RMI4 Driver I2C Physical Layer");
+MODULE_LICENSE("GPL");
diff --git a/drivers/input/touchscreen/synaptics/rmi_sensor.c b/drivers/input/touchscreen/synaptics/rmi_sensor.c
new file mode 100644
index 0000000..da8a93d
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_sensor.c
@@ -0,0 +1,661 @@
+/**
+ * Synaptics Register Mapped Interface (RMI4) - RMI Sensor Module.
+ * Copyright (C) 2007 - 2011, Synaptics Incorporated
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *############################################################################
+ */
+
+static const char sensorname[] = "sensor";
+
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/list.h>
+#include <linux/device.h>
+#include <linux/hrtimer.h>
+#include <linux/miscdevice.h>
+#include <linux/fs.h>
+#include <linux/delay.h>
+#include <linux/uaccess.h>
+#include <linux/slab.h>
+#include <linux/kthread.h>
+#include <linux/freezer.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+
+
+#include "rmi_drvr.h"
+#include "rmi_bus.h"
+#include "rmi_function.h"
+#include "rmi_sensor.h"
+
+long polltime = 25000000; /* Shared with rmi_function.c. */
+EXPORT_SYMBOL(polltime);
+module_param(polltime, long, 0644);
+MODULE_PARM_DESC(polltime, "How long to wait between polls (in nano seconds).");
+
+
+#define PDT_START_SCAN_LOCATION 0x00E9
+#define PDT_END_SCAN_LOCATION 0x0005
+#define PDT_ENTRY_SIZE 0x0006
+
+static DEFINE_MUTEX(rfi_mutex);
+
+struct rmi_functions *rmi_find_function(int functionNum);
+
+int rmi_read(struct rmi_sensor_driver *sensor, unsigned short address,
+ char *dest)
+{
+ struct rmi_phys_driver *rpd = sensor->rpd;
+ if (!rpd)
+ return -ENODEV;
+ return rpd->read(rpd, address, dest);
+}
+EXPORT_SYMBOL(rmi_read);
+
+int rmi_write(struct rmi_sensor_driver *sensor, unsigned short address,
+ unsigned char data)
+{
+ struct rmi_phys_driver *rpd = sensor->rpd;
+ if (!rpd)
+ return -ENODEV;
+ return rpd->write(rpd, address, data);
+}
+EXPORT_SYMBOL(rmi_write);
+
+int rmi_read_multiple(struct rmi_sensor_driver *sensor,
+ unsigned short address, char *dest, int length)
+{
+ struct rmi_phys_driver *rpd = sensor->rpd;
+ if (!rpd)
+ return -ENODEV;
+ return rpd->read_multiple(rpd, address, dest, length);
+}
+EXPORT_SYMBOL(rmi_read_multiple);
+
+int rmi_write_multiple(struct rmi_sensor_driver *sensor,
+ unsigned short address, unsigned char *data, int length)
+{
+ struct rmi_phys_driver *rpd = sensor->rpd;
+ if (!rpd)
+ return -ENODEV;
+ return rpd->write_multiple(rpd, address, data, length);
+}
+EXPORT_SYMBOL(rmi_write_multiple);
+
+/* Utility routine to set bits in a register. */
+int rmi_set_bits(struct rmi_sensor_driver *sensor, unsigned short address,
+ unsigned char bits)
+{
+ unsigned char reg_contents;
+ int retval;
+
+ retval = rmi_read(sensor, address, ®_contents);
+ if (retval)
+ return retval;
+ reg_contents = reg_contents | bits;
+ retval = rmi_write(sensor, address, reg_contents);
+ if (retval == 1)
+ return 0;
+ else if (retval == 0)
+ return -EINVAL; /* TODO: What should this be? */
+ else
+ return retval;
+}
+EXPORT_SYMBOL(rmi_set_bits);
+
+/* Utility routine to clear bits in a register. */
+int rmi_clear_bits(struct rmi_sensor_driver *sensor,
+ unsigned short address, unsigned char bits)
+{
+ unsigned char reg_contents;
+ int retval;
+
+ retval = rmi_read(sensor, address, ®_contents);
+ if (retval)
+ return retval;
+ reg_contents = reg_contents & ~bits;
+ retval = rmi_write(sensor, address, reg_contents);
+ if (retval == 1)
+ return 0;
+ else if (retval == 0)
+ return -EINVAL; /* TODO: What should this be? */
+ else
+ return retval;
+}
+EXPORT_SYMBOL(rmi_clear_bits);
+
+/* Utility routine to set the value of a bit field in a register. */
+int rmi_set_bit_field(struct rmi_sensor_driver *sensor,
+ unsigned short address, unsigned char field_mask, unsigned char bits)
+{
+ unsigned char reg_contents;
+ int retval;
+
+ retval = rmi_read(sensor, address, ®_contents);
+ if (retval)
+ return retval;
+ reg_contents = (reg_contents & ~field_mask) | bits;
+ retval = rmi_write(sensor, address, reg_contents);
+ if (retval == 1)
+ return 0;
+ else if (retval == 0)
+ return -EINVAL; /* TODO: What should this be? */
+ else
+ return retval;
+}
+EXPORT_SYMBOL(rmi_set_bit_field);
+
+bool rmi_polling_required(struct rmi_sensor_driver *sensor)
+{
+ return sensor->polling_required;
+}
+EXPORT_SYMBOL(rmi_polling_required);
+
+/** Functions can call this in order to dispatch IRQs. */
+void dispatchIRQs(struct rmi_sensor_driver *sensor, unsigned int irqStatus)
+{
+ struct rmi_function_info *functionInfo;
+
+ list_for_each_entry(functionInfo, &sensor->functions, link) {
+ if ((functionInfo->interruptMask & irqStatus)) {
+ if (functionInfo->function_device->
+ rmi_funcs->inthandler) {
+ /* Call the functions interrupt handler function. */
+ functionInfo->function_device->rmi_funcs->
+ inthandler(functionInfo,
+ (functionInfo->interruptMask & irqStatus));
+ }
+ }
+ }
+}
+
+/**
+ * This is the function we pass to the RMI4 subsystem so we can be notified
+ * when attention is required. It may be called in interrupt context.
+ */
+static void attention(struct rmi_phys_driver *physdrvr, int instance)
+{
+ /* All we have to do is schedule work. */
+
+ /* TODO: It's possible that workIsReady is not really needed anymore.
+ * Investigate this to see if the race condition between setting up
+ * the work and enabling the interrupt still exists.
+ */
+ if (physdrvr->sensor->workIsReady) {
+ schedule_work(&(physdrvr->sensor->work));
+ } else {
+ /* Got an interrupt but we're not ready so enable the irq
+ * so it doesn't get hung up
+ */
+ printk(KERN_DEBUG "%s: Work not initialized yet -"
+ "enabling irqs.\n", __func__);
+ enable_irq(physdrvr->irq);
+ }
+}
+
+/**
+ * This notifies any interested functions that there
+ * is an Attention interrupt. The interested functions should take
+ * appropriate
+ * actions (such as reading the interrupt status register and dispatching any
+ * appropriate RMI4 interrupts).
+ */
+void attn_notify(struct rmi_sensor_driver *sensor)
+{
+ struct rmi_function_info *functionInfo;
+
+ /* check each function that has data sources and if the interrupt for
+ * that triggered then call that RMI4 functions report() function to
+ * gather data and report it to the input subsystem
+ */
+ list_for_each_entry(functionInfo, &sensor->functions, link) {
+ if (functionInfo->function_device &&
+ functionInfo->function_device->rmi_funcs->attention)
+ functionInfo->function_device->
+ rmi_funcs->attention(functionInfo);
+ }
+}
+
+/* This is the worker function - for now it simply has to call attn_notify.
+ * This work should be scheduled whenever an ATTN interrupt is asserted by
+ * the touch sensor.
+ * We then call attn_notify to dispatch notification of the ATTN interrupt
+ * to all
+ * interested functions. After all the attention handling functions
+ * have returned, it is presumed safe to re-enable the Attention interrupt.
+ */
+static void sensor_work_func(struct work_struct *work)
+{
+ struct rmi_sensor_driver *sensor = container_of(work,
+ struct rmi_sensor_driver, work);
+
+ attn_notify(sensor);
+
+ /* we only need to enable the irq if doing interrupts */
+ if (!rmi_polling_required(sensor))
+ enable_irq(sensor->rpd->irq);
+}
+
+/* This is the timer function for polling - it simply has to schedule work
+ * and restart the timer. */
+static enum hrtimer_restart sensor_poll_timer_func(struct hrtimer *timer)
+{
+ struct rmi_sensor_driver *sensor = container_of(timer,
+ struct rmi_sensor_driver, timer);
+
+ schedule_work(&sensor->work);
+ hrtimer_start(&sensor->timer, ktime_set(0, polltime),
+ HRTIMER_MODE_REL);
+ return HRTIMER_NORESTART;
+}
+
+/* This is the probe function passed to the RMI4 subsystem that gives us a
+ * chance to recognize an RMI4 device. In this case, we're looking for
+ * Synaptics devices that have data sources - such as touch screens, buttons,
+ * etc.
+ *
+ * TODO: Well, it used to do this. I'm not sure it's required any more.
+ */
+static int probe(struct rmi_sensor_driver *sensor)
+{
+ struct rmi_phys_driver *rpd;
+
+ rpd = sensor->rpd;
+
+ if (!rpd) {
+ printk(KERN_ERR "%s: Invalid rmi physical driver - null ptr:"
+ "%p\n", __func__, rpd);
+ return 0;
+ }
+
+ return 1;
+}
+
+static void config(struct rmi_sensor_driver *sensor)
+{
+ /* For each data source we had detected print info and set up interrupts
+ or polling. */
+ struct rmi_function_info *functionInfo;
+ struct rmi_phys_driver *rpd;
+
+ rpd = sensor->rpd; /* get ptr to rmi_physical_driver from app */
+
+ list_for_each_entry(functionInfo, &sensor->functions, link) {
+ /* Get and print some info about the data sources... */
+ struct rmi_functions *fn;
+ bool found = false;
+ /* check if function number matches - if so call that
+ config function */
+ fn = rmi_find_function(functionInfo->functionNum);
+ if (fn) {
+ found = true;
+
+ if (fn->config) {
+ fn->config(functionInfo);
+ } else {
+ /* the developer did not add in the
+ pointer to the config function into
+ rmi4_supported_data_src_functions */
+ printk(KERN_ERR
+ "%s: no config function for "
+ "function 0x%x\n",
+ __func__, functionInfo->functionNum);
+ break;
+ }
+ }
+
+ if (!found) {
+ /* if no support found for this RMI4 function
+ it means the developer did not add the
+ appropriate function pointer list into the
+ rmi4_supported_data_src_functions array and/or
+ did not bump up the number of supported RMI4
+ functions in rmi.h as required */
+ printk(KERN_ERR "%s: could not find support "
+ "for function 0x%x\n",
+ __func__, functionInfo->functionNum);
+ }
+ }
+
+ /* This will handle interrupts on the ATTN line (interrupt driven)
+ * or will be called every poll interval (when we're not interrupt
+ * driven).
+ */
+ INIT_WORK(&sensor->work, sensor_work_func);
+ sensor->workIsReady = true;
+
+ if (rmi_polling_required(sensor)) {
+ /* We're polling driven, so set up the polling timer
+ and timer function. */
+ hrtimer_init(&sensor->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ sensor->timer.function = sensor_poll_timer_func;
+ hrtimer_start(&sensor->timer, ktime_set(1, 0), HRTIMER_MODE_REL);
+ }
+}
+
+/** Just a stub for now.
+ */
+static int rmi_sensor_suspend(struct device *dev, pm_message_t state)
+{
+ printk(KERN_INFO "%s: sensor suspend called.", __func__);
+ return 0;
+}
+
+/** Just a stub for now.
+ */
+static int rmi_sensor_resume(struct device *dev)
+{
+ printk(KERN_INFO "%s: sensor resume called.", __func__);
+ return 0;
+}
+
+/*
+ * This method is called, whenever a new sensor device is added for the rmi
+ * bus.
+ *
+ * It will scan the devices PDT to determine the supported functions
+ * and create a new function device for each of these. It will read
+ * the query, control, command and data regsiters for the function
+ * to be used for each newly created function device.
+ *
+ * The sensor device is then bound to every function it supports.
+ *
+ */
+int rmi_sensor_register_functions(struct rmi_sensor_driver *sensor)
+{
+ struct rmi_function_device *function;
+ unsigned int interruptRegisterCount;
+ struct rmi_phys_driver *rpd;
+ int i;
+ unsigned char interruptCount;
+ struct rmi_function_info *functionInfo;
+ struct rmi_function_descriptor rmi_fd;
+ struct rmi_functions *fn;
+ int retval;
+
+ pr_debug("%s: Registering sensor functions\n", __func__);
+
+ retval = 0;
+
+ /* Scan device for functions that may be supported */
+ {
+ pr_debug("%s: Scanning sensor for Functions:\n", __func__);
+
+ interruptCount = 0;
+ rpd = sensor->rpd;
+
+ /* Read the Page Descriptor Table to determine what functions
+ * are present */
+
+ printk(KERN_DEBUG "%s: Scanning page descriptors.", __func__);
+ for (i = PDT_START_SCAN_LOCATION;
+ i >= PDT_END_SCAN_LOCATION;
+ i -= PDT_ENTRY_SIZE) {
+ printk(KERN_DEBUG "%s: Reading page descriptor 0x%02x", __func__, i);
+ retval = rpd->read_multiple(rpd, i, (char *)&rmi_fd,
+ sizeof(rmi_fd));
+ if (!retval) {
+ functionInfo = NULL;
+
+ if (rmi_fd.functionNum != 0x00 && rmi_fd.functionNum != 0xff) {
+ printk(KERN_DEBUG "%s: F%02x - queries %02x commands %02x control %02x data %02x ints %02x", __func__, rmi_fd.functionNum, rmi_fd.queryBaseAddr, rmi_fd.commandBaseAddr, rmi_fd.controlBaseAddr, rmi_fd.dataBaseAddr, rmi_fd.interruptSrcCnt);
+
+ if ((rmi_fd.functionNum & 0xff) == 0x01)
+ printk(KERN_DEBUG "%s: Fn $01 Found - RMI Device Control", __func__);
+
+ /* determine if the function is supported and if so
+ * then bind this function device to the sensor */
+ if (rmi_fd.interruptSrcCnt) {
+ functionInfo = kzalloc(sizeof(*functionInfo), GFP_KERNEL);
+ if (!functionInfo) {
+ printk(KERN_ERR "%s: could not allocate memory for function 0x%x.",
+ __func__, rmi_fd.functionNum);
+ retval = -ENOMEM;
+ goto exit_fail;
+ }
+ functionInfo->sensor = sensor;
+ functionInfo->functionNum = (rmi_fd.functionNum & 0xff);
+ INIT_LIST_HEAD(&functionInfo->link);
+ /* Get the ptr to the detect function based on
+ * the function number */
+ printk(KERN_DEBUG "%s: Checking for RMI function F%02x.", __func__, rmi_fd.functionNum);
+ fn = rmi_find_function(rmi_fd.functionNum);
+ if (fn) {
+ retval = fn->detect(functionInfo, &rmi_fd,
+ interruptCount);
+ if (retval)
+ printk(KERN_ERR "%s: Function detect for F%02x failed with %d.",
+ __func__, rmi_fd.functionNum, retval);
+
+ /* Create a function device and function driver for this Fn */
+ function = kzalloc(sizeof(*function), GFP_KERNEL);
+ if (!function) {
+ printk(KERN_ERR "%s: Error allocating memory for rmi_function_device.", __func__);
+ return -ENOMEM;
+ }
+
+ function->dev.parent = &sensor->sensor_device->dev;
+ function->dev.bus = sensor->sensor_device->dev.bus;
+ function->rmi_funcs = fn;
+ function->sensor = sensor;
+ function->rfi = functionInfo;
+ functionInfo->function_device = function;
+
+ /* Check if we have an interrupt mask of 0 and a non-NULL interrupt
+ handler function and print a debug message since we should never
+ have this.
+ */
+ if (functionInfo->interruptMask == 0 && fn->inthandler != NULL) {
+ printk(KERN_DEBUG "%s: Can't have a zero interrupt mask for function F%02x (which requires an interrupt handler).\n",
+ __func__, rmi_fd.functionNum);
+ }
+
+
+ /* Check if we have a non-zero interrupt mask and a NULL interrupt
+ handler function and print a debug message since we should never
+ have this.
+ */
+ if (functionInfo->interruptMask != 0 && fn->inthandler == NULL) {
+ printk(KERN_DEBUG "%s: Can't have a non-zero interrupt mask %d for function F%02x with a NULL inthandler fn.\n",
+ __func__, functionInfo->interruptMask, rmi_fd.functionNum);
+ }
+
+ /* Register the rmi function device */
+ retval = rmi_function_register_device(function, rmi_fd.functionNum);
+ if (retval) {
+ printk(KERN_ERR "%s: Failed rmi_function_register_device.\n",
+ __func__);
+ return retval;
+ }
+ } else {
+ printk(KERN_ERR "%s: could not find support for function 0x%02X.\n",
+ __func__, rmi_fd.functionNum);
+ }
+ } else {
+ printk(KERN_DEBUG "%s: Found function F%02x - Ignored.\n", __func__, rmi_fd.functionNum & 0xff);
+ }
+
+ /* bump interrupt count for next iteration */
+ /* NOTE: The value 7 is reserved - for now, only bump up one for an interrupt count of 7 */
+ if ((rmi_fd.interruptSrcCnt & 0x7) == 0x7) {
+ interruptCount += 1;
+ } else {
+ interruptCount +=
+ (rmi_fd.interruptSrcCnt & 0x7);
+ }
+
+ /* link this function info to the RMI module infos list
+ of functions */
+ if (functionInfo == NULL) {
+ printk(KERN_DEBUG "%s: WTF? functionInfo is null here.", __func__);
+ } else {
+ printk(KERN_DEBUG "%s: Adding function F%02x with %d sources.\n",
+ __func__, functionInfo->functionNum, functionInfo->numSources);
+
+ mutex_lock(&rfi_mutex);
+ list_add_tail(&functionInfo->link,
+ &sensor->functions);
+ mutex_unlock(&rfi_mutex);
+ }
+
+ } else {
+ /* A zero or 0xff in the function number
+ signals the end of the PDT */
+ printk(KERN_DEBUG "%s: Found End of PDT\n",
+ __func__);
+ break;
+ }
+ } else {
+ /* failed to read next PDT entry - end PDT
+ scan - this may result in an incomplete set
+ of recognized functions - should probably
+ return an error but the driver may still be
+ viable for diagnostics and debugging so let's
+ let it continue. */
+ printk(KERN_ERR "%s: Read Error %d when reading next PDT entry - "
+ "ending PDT scan.\n",
+ __func__, retval);
+ break;
+ }
+ }
+ printk(KERN_DEBUG "%s: Done scanning.", __func__);
+
+ /* calculate the interrupt register count - used in the
+ ISR to read the correct number of interrupt registers */
+ interruptRegisterCount = (interruptCount + 7) / 8;
+ sensor->interruptRegisterCount = interruptRegisterCount; /* TODO: Is this needed by the sensor anymore? */
+ }
+
+ return 0;
+
+exit_fail:
+ return retval;
+}
+EXPORT_SYMBOL(rmi_sensor_register_functions);
+
+int rmi_sensor_register_device(struct rmi_sensor_device *dev, int index)
+{
+ int status;
+
+ printk(KERN_INFO "%s: Registering sensor device.\n", __func__);
+
+ /* make name - sensor00, sensor01, etc. */
+ dev_set_name(&dev->dev, "sensor%02d", index);
+ status = device_register(&dev->dev);
+
+ return status;
+}
+EXPORT_SYMBOL(rmi_sensor_register_device);
+
+static void rmi_sensor_unregister_device(struct rmi_sensor_device *rmisensordev)
+{
+ printk(KERN_INFO "%s: Unregistering sensor device.\n", __func__);
+
+ device_unregister(&rmisensordev->dev);
+}
+EXPORT_SYMBOL(rmi_sensor_unregister_device);
+
+int rmi_sensor_register_driver(struct rmi_sensor_driver *driver)
+{
+ static int index;
+ int ret;
+ char *drvrname;
+
+ driver->workIsReady = false;
+
+ printk(KERN_INFO "%s: Registering sensor driver.\n", __func__);
+ driver->dispatchIRQs = dispatchIRQs;
+ driver->attention = attention;
+ driver->config = config;
+ driver->probe = probe;
+
+ /* assign the bus type for this driver to be rmi bus */
+ driver->drv.bus = &rmi_bus_type;
+ driver->drv.suspend = rmi_sensor_suspend;
+ driver->drv.resume = rmi_sensor_resume;
+ /* Create a function device and function driver for this Fn */
+ drvrname = kzalloc(sizeof(sensorname) + 4, GFP_KERNEL);
+ if (!drvrname) {
+ printk(KERN_ERR "%s: Error allocating memeory for rmi_sensor_driver name.\n", __func__);
+ return -ENOMEM;
+ }
+ sprintf(drvrname, "sensor%02d", index++);
+
+ driver->drv.name = drvrname;
+ driver->module = driver->drv.owner;
+
+ /* register the sensor driver */
+ ret = driver_register(&driver->drv);
+ if (ret) {
+ printk(KERN_ERR "%s: Failed driver_register %d\n",
+ __func__, ret);
+ goto exit_fail;
+ }
+
+ /* register the functions on the sensor */
+ ret = rmi_sensor_register_functions(driver);
+ if (ret) {
+ printk(KERN_ERR "%s: Failed rmi_sensor_register_functions %d\n",
+ __func__, ret);
+ }
+
+ /* configure the sensor - enable interrupts for each function, init work, set polling timer or adjust report rate, etc. */
+ config(driver);
+
+ printk(KERN_DEBUG "%s: sensor driver registration completed.", __func__);
+
+exit_fail:
+ return ret;
+}
+EXPORT_SYMBOL(rmi_sensor_register_driver);
+
+static void rmi_sensor_unregister_driver(struct rmi_sensor_driver *driver)
+{
+ printk(KERN_DEBUG "%s: Unregistering sensor driver.\n", __func__);
+
+ /* Stop the polling timer if doing polling */
+ if (rmi_polling_required(driver))
+ hrtimer_cancel(&driver->timer);
+
+ flush_scheduled_work(); /* Make sure all scheduled work is stopped */
+
+ driver_unregister(&driver->drv);
+}
+EXPORT_SYMBOL(rmi_sensor_unregister_driver);
+
+
+static int __init rmi_sensor_init(void)
+{
+ printk(KERN_DEBUG "%s: RMI Sensor Init\n", __func__);
+ return 0;
+}
+
+static void __exit rmi_sensor_exit(void)
+{
+ printk(KERN_DEBUG "%s: RMI Sensor Driver Exit\n", __func__);
+ flush_scheduled_work(); /* Make sure all scheduled work is stopped */
+}
+
+
+module_init(rmi_sensor_init);
+module_exit(rmi_sensor_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("RMI4 Sensor Driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/input/touchscreen/synaptics/rmi_sensor.h b/drivers/input/touchscreen/synaptics/rmi_sensor.h
new file mode 100644
index 0000000..63d2555
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_sensor.h
@@ -0,0 +1,143 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) - RMI Sensor Module Header.
+ * Copyright (C) 2007 - 2011, Synaptics Incorporated
+ *
+ */
+/*
+ *
+ * This file is licensed under the GPL2 license.
+ *
+ *############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *############################################################################
+ */
+
+#include <linux/device.h>
+
+#ifndef _RMI_SENSOR_H
+#define _RMI_SENSOR_H
+
+#include <linux/input/rmi_platformdata.h>
+
+struct rmi_sensor_driver {
+ struct module *module;
+ struct device_driver drv;
+ struct rmi_sensor_device *sensor_device;
+
+ /* Attention Function
+ * This function is called by the low level isr in the physical
+ * driver. It merely schedules work to be done.
+ */
+ void (*attention)(struct rmi_phys_driver *physdrvr, int instance);
+ /* Probe Function
+ * This function is called to give the sensor driver layer an
+ * opportunity to claim an RMI device. The sensor layer cannot
+ * read RMI registers at this point since the rmi physical driver
+ * has not been bound to it yet. Defer that to the config
+ * function call which occurs immediately after a successful probe.
+ */
+ int (*probe)(struct rmi_sensor_driver *sensor);
+ /* Config Function
+ * This function is called after a successful probe. It gives the
+ * sensor driver an opportunity to query and/or configure an RMI
+ * device before data starts flowing.
+ */
+ void (*config)(struct rmi_sensor_driver *sensor);
+
+ /* Functions can call this in order to dispatch IRQs. */
+ void (*dispatchIRQs)(struct rmi_sensor_driver *sensor,
+ unsigned int irqStatus);
+
+ /* Register Functions
+ * This function is called in the rmi bus
+ * driver to have the sensor driver scan for any supported
+ * functions on the sensor and add devices for each one.
+ */
+ void (*rmi_sensor_register_functions)(struct rmi_sensor_driver
+ *sensor);
+
+ unsigned int interruptRegisterCount;
+
+ bool polling_required;
+
+ /* pointer to the corresponding phys driver info for this sensor */
+ /* The phys driver has the pointers to read, write, etc. */
+ struct rmi_phys_driver *rpd;
+
+ struct hrtimer timer;
+ struct work_struct work;
+ bool workIsReady;
+
+ /* This list is for keeping around the list of sensors.
+ * Every time that a physical device is detected by the
+ * physical layer - be it i2c, spi, or some other - then
+ * we need to bind the physical layer to the device. When
+ * the Page Descriptor Table is scanned and when Function $01
+ * is found then a new sensor device is created. The corresponding
+ * rmi_phys_driver struct pointer needs to be bound to the new
+ * sensor since Function $01 will be used to control and get
+ * interrupt information about the particular data source that is
+ * doing the interrupt. The rmi_phys_driver contains the pointers
+ * to the particular read, write, read_multiple, write_multiple
+ * functions for this device. This rmi_phys_driver struct will
+ * have to be up-bound to any drivers upstream that need it.
+ */
+
+ /* Standard kernel linked list implementation.
+ * Documentation on how to use it can be found at
+ * http://isis.poly.edu/kulesh/stuff/src/klist/.
+ */
+ struct list_head sensor_drivers; /* link sensor drivers into list */
+
+ struct list_head functions; /* List of rmi_function_infos */
+ /* Per function initialization data. */
+ struct rmi_functiondata_list *perfunctiondata;
+};
+
+/* macro to get the pointer to the device_driver struct from the sensor */
+#define to_rmi_sensor_driver(drv) container_of(drv, \
+ struct rmi_sensor_driver, drv);
+
+struct rmi_sensor_device {
+ struct rmi_sensor_driver *driver;
+ struct device dev;
+
+ /* Standard kernel linked list implementation.
+ * Documentation on how to use it can be found at
+ * http://isis.poly.edu/kulesh/stuff/src/klist/.
+ */
+ struct list_head sensors; /* link sensors into list */
+};
+
+int rmi_sensor_register_device(struct rmi_sensor_device *dev, int index);
+int rmi_sensor_register_driver(struct rmi_sensor_driver *driver);
+int rmi_sensor_register_functions(struct rmi_sensor_driver *sensor);
+bool rmi_polling_required(struct rmi_sensor_driver *sensor);
+
+static inline void *rmi_sensor_get_functiondata(struct rmi_sensor_driver
+ *driver, unsigned char function_index)
+{
+ int i;
+ if (driver->perfunctiondata) {
+ for (i = 0; i < driver->perfunctiondata->count; i++) {
+ if (driver->perfunctiondata->functiondata[i].
+ function_index == function_index)
+ return driver->perfunctiondata->
+ functiondata[i].data;
+ }
+ }
+ return NULL;
+}
+
+#endif
diff --git a/drivers/input/touchscreen/synaptics/rmi_spi.c b/drivers/input/touchscreen/synaptics/rmi_spi.c
new file mode 100644
index 0000000..d6b247d
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_spi.c
@@ -0,0 +1,616 @@
+/**
+ *
+ * Synaptics Register Mapped Interface (RMI4) SPI Physical Layer Driver.
+ * Copyright (C) 2008-2011, Synaptics Incorporated
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *############################################################################
+ */
+
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/spi/spi.h>
+#include <linux/platform_device.h>
+#include <linux/semaphore.h>
+#include <linux/spi/spi.h>
+#include <linux/input/rmi_platformdata.h>
+#include "rmi_spi.h"
+#include "rmi_drvr.h"
+
+#define COMM_DEBUG 1 /* Set to 1 to dump transfers. */
+
+/* 65 microseconds inter-byte delay between bytes for RMI chip*/
+#define RMI_DEFAULT_BYTE_DELAY_US 0 /* 65 */
+#define SPI_BUFFER_SIZE 32
+
+static u8 *buf;
+
+/* This is the data kept on a per instance (client) basis. This data is
+ * always accessible by using the container_of() macro of the various elements
+ * inside.
+ */
+struct spi_device_instance_data {
+ int instance_no;
+ int irq;
+ unsigned int byte_delay_us;
+ struct rmi_phys_driver rpd;
+ struct spi_device *spidev;
+ struct rmi_spi_platformdata *platformdata;
+};
+
+static int spi_xfer(struct spi_device_instance_data *instance_data,
+ const u8 *txbuf, unsigned n_tx, u8 *rxbuf, unsigned n_rx)
+{
+ struct spi_device *spi = instance_data->spidev;
+#if COMM_DEBUG
+ int i;
+#endif
+ int status;
+ struct spi_message message;
+ struct spi_transfer *xfer_list;
+ u8 *local_buf;
+ int nXfers = 0;
+ int xfer_index = 0;
+
+ if ((n_tx + n_rx) > SPI_BUFFER_SIZE)
+ return -EINVAL;
+
+ if (n_tx)
+ nXfers += 1;
+ if (n_rx) {
+ if (instance_data->byte_delay_us)
+ nXfers += n_rx;
+ else
+ nXfers += 1;
+ }
+
+ xfer_list = kcalloc(nXfers, sizeof(struct spi_transfer), GFP_KERNEL);
+ if (!xfer_list)
+ return -ENOMEM;
+
+ /* ... unless someone else is using the pre-allocated buffer */
+ local_buf = kzalloc(SPI_BUFFER_SIZE, GFP_KERNEL);
+ if (!local_buf) {
+ kfree(xfer_list);
+ return -ENOMEM;
+ }
+
+ spi_message_init(&message);
+
+ if (n_tx) {
+ memset(&xfer_list[0], 0, sizeof(struct spi_transfer));
+ xfer_list[0].len = n_tx;
+ xfer_list[0].delay_usecs = instance_data->byte_delay_us;
+ spi_message_add_tail(&xfer_list[0], &message);
+ memcpy(local_buf, txbuf, n_tx);
+ xfer_list[0].tx_buf = local_buf;
+ xfer_index++;
+ }
+ if (n_rx) {
+ if (instance_data->byte_delay_us) {
+ int buffer_offset = n_tx;
+ for (; xfer_index < nXfers; xfer_index++) {
+ memset(&xfer_list[xfer_index], 0,
+ sizeof(struct spi_transfer));
+ xfer_list[xfer_index].len = 1;
+ xfer_list[xfer_index].delay_usecs =
+ instance_data->byte_delay_us;
+ xfer_list[xfer_index].rx_buf =
+ local_buf + buffer_offset;
+ buffer_offset++;
+ spi_message_add_tail(&xfer_list[xfer_index],
+ &message);
+#ifdef CONFIG_ARCH_OMAP
+ printk(KERN_INFO "%s: Did you compensate for
+ ARCH_OMAP?", __func__);
+/* x[1].len = n_rx-1; */ /* since OMAP has one dummy byte. */
+#else
+/* x[1].len = n_rx; */
+#endif
+ }
+ } else {
+ memset(&xfer_list[xfer_index], 0, sizeof(struct
+ spi_transfer));
+#ifdef CONFIG_ARCH_OMAP
+ /* since OMAP has one dummy byte. */
+ xfer_list[xfer_index].len = n_rx-1;
+#else
+ xfer_list[xfer_index].len = n_rx;
+#endif
+ xfer_list[xfer_index].rx_buf = local_buf + n_tx;
+ spi_message_add_tail(&xfer_list[xfer_index],
+ &message);
+ xfer_index++;
+ }
+ }
+ printk(KERN_INFO "%s: Ready to go, xfer_index = %d, nXfers = %d.",
+ __func__, xfer_index, nXfers);
+#if COMM_DEBUG
+ printk(KERN_INFO "%s: SPI transmits %d bytes...", __func__, n_tx);
+ for (i = 0; i < n_tx; i++)
+ printk(KERN_INFO " 0x%02X", local_buf[i]);
+#endif
+
+ /* do the i/o */
+ status = spi_sync(spi, &message);
+ if (status == 0) {
+ memcpy(rxbuf, local_buf + n_tx, n_rx);
+ status = message.status;
+#if COMM_DEBUG
+ if (n_rx) {
+ printk(KERN_INFO "%s: SPI received %d bytes...",
+ __func__, n_rx);
+ for (i = 0; i < n_rx; i++)
+ printk(KERN_INFO " 0x%02X", rxbuf[i]);
+ }
+#endif
+ } else {
+ printk(KERN_ERR "%s: spi_sync failed with error code %d.",
+ __func__, status);
+ }
+
+ kfree(local_buf);
+ kfree(xfer_list);
+
+ return status;
+}
+
+/**
+ * Read a single register through spi.
+ * \param[in] pd
+ * \param[in] address The address at which to start the data read.
+ * \param[out] valp Pointer to the buffer where the data will be stored.
+ * \return zero upon success (with the byte read in valp),non-zero upon error.
+ */
+static int
+rmi_spi_read(struct rmi_phys_driver *pd, unsigned short address, char *valp)
+{
+ struct spi_device_instance_data *id =
+ container_of(pd, struct spi_device_instance_data, rpd);
+
+ char rxbuf[2];
+ int retval;
+ unsigned short addr = address;
+
+ addr = ((addr & 0xff00) >> 8);
+ address = ((address & 0x00ff) << 8);
+ addr |= address;
+ addr |= 0x80; /* High bit set indicates read. */
+
+ retval = spi_xfer(id, (u8 *)&addr, 2, rxbuf, 1);
+
+ *valp = rxbuf[0];
+
+ return retval;
+}
+
+/**
+ * Same as rmi_spi_read, except that multiple bytes are allowed to be read.
+ * \param[in] pd
+ * \param[in] address The address at which to start the data read.
+ * \param[out] valp Pointer to the buffer where the data will be stored. This
+ * buffer must be at least size bytes long.
+ * \param[in] size The number of bytes to be read.
+ * \return zero upon success(with the byte read in valp), non-zero upon error.
+ */
+static int
+rmi_spi_read_multiple(struct rmi_phys_driver *pd, unsigned short address,
+ char *valp, int size)
+{
+ struct spi_device_instance_data *id =
+ container_of(pd, struct spi_device_instance_data, rpd);
+ int retval;
+
+ unsigned short addr = address;
+
+ addr = ((addr & 0xff00) >> 8);
+ address = ((address & 0x00ff) << 8);
+ addr |= address;
+ addr |= 0x80; /* High bit set indicates read. */
+
+ retval = spi_xfer(id, (u8 *)&addr, 2, valp, size);
+
+ return retval;
+}
+
+/**
+ * Write a single register through spi.
+ * You can write multiple registers at once, but I made the functions for that
+ * seperate for performance reasons. Writing multiple requires allocation and
+ * freeing.
+ * \param[in] pd
+ * \param[in] address The address at which to start the write.
+ * \param[in] data The data to be written.
+ * \return one upon success, something else upon error.
+ */
+static int
+rmi_spi_write(struct rmi_phys_driver *pd, unsigned short address, char data)
+{
+ struct spi_device_instance_data *id =
+ container_of(pd, struct spi_device_instance_data, rpd);
+ unsigned char txbuf[4];
+ int retval;
+
+ txbuf[2] = data;
+ txbuf[1] = address;
+ txbuf[0] = address>>8;
+
+ retval = spi_xfer(id, txbuf, 3, NULL, 0);
+ return retval ? 0 : 1;
+}
+
+/**
+ * Write multiple registers.
+ * \param[in] pd
+ * \param[in] address The address at which to start the write.
+ * \param[in] valp A pointer to a buffer containing the data to be written.
+ * \param[in] size The number of bytes to write.
+ * \return one upon success, something else upon error.
+ */
+static int
+rmi_spi_write_multiple(struct rmi_phys_driver *pd, unsigned short address,
+ char *valp, int size)
+{
+ struct spi_device_instance_data *id =
+ container_of(pd, struct spi_device_instance_data, rpd);
+ unsigned char txbuf[32];
+ int retval;
+ int i;
+
+ txbuf[1] = address;
+ txbuf[0] = address>>8;
+
+ for (i = 0; i < size; i++)
+ txbuf[i + 2] = valp[i];
+
+ retval = spi_xfer(id, txbuf, size+2, NULL, 0);
+
+ return retval ? 0 : 1;
+}
+
+/**
+ * This is the Interrupt Service Routine.
+ * It just notifies the physical device
+ * that attention is required.
+ */
+static irqreturn_t spi_attn_isr(int irq, void *info)
+{
+ struct spi_device_instance_data *instance_data = info;
+ disable_irq_nosync(instance_data->irq);
+ if (instance_data->rpd.attention)
+ instance_data->rpd.attention(&instance_data->rpd,
+ instance_data->instance_no);
+ return IRQ_HANDLED;
+}
+
+/* TODO: Move this to rmi_bus, and call a function to get the next sensorID
+ */
+static int sensor_count;
+
+static int __devinit rmi_spi_probe(struct spi_device *spi)
+{
+ struct spi_device_instance_data *instance_data;
+ int retval;
+ struct rmi_spi_platformdata *platformdata;
+ struct rmi_sensordata *sensordata;
+ int irqtype = 0;
+
+ printk(KERN_INFO "Probing RMI4 SPI device\n");
+
+ /* This should have already been set up in the board file,
+ shouldn't it? */
+ spi->bits_per_word = 8;
+
+ spi->mode = SPI_MODE_3;
+
+ retval = spi_setup(spi);
+ if (retval < 0) {
+ printk(KERN_ERR "%s: spi_setup failed with %d.", __func__,
+ retval);
+ return retval;
+ }
+
+ buf = kzalloc(SPI_BUFFER_SIZE, GFP_KERNEL);
+ if (!buf) {
+ printk(KERN_ERR "%s: Failed to allocate memory for spi
+ buffer.", __func__);
+ return -ENOMEM;
+ }
+
+ instance_data = kzalloc(sizeof(*instance_data), GFP_KERNEL);
+ if (!instance_data) {
+ printk(KERN_ERR "%s: Failer to allocate memory for instance
+ data.", __func__);
+ return -ENOMEM;
+ }
+
+ instance_data->byte_delay_us = RMI_DEFAULT_BYTE_DELAY_US;
+ instance_data->spidev = spi;
+ instance_data->rpd.name = RMI4_SPI_DRIVER_NAME;
+ instance_data->rpd.write = rmi_spi_write;
+ instance_data->rpd.read = rmi_spi_read;
+ instance_data->rpd.write_multiple = rmi_spi_write_multiple;
+ instance_data->rpd.read_multiple = rmi_spi_read_multiple;
+ instance_data->rpd.module = THIS_MODULE;
+ /* default to polling if irq not used */
+ instance_data->rpd.polling_required = true;
+
+ platformdata = spi->dev.platform_data;
+ if (platformdata == NULL) {
+ printk(KERN_ERR "%s: CONFIGURATION ERROR - platform data
+ is NULL.", __func__);
+ return -EINVAL;
+ }
+
+ instance_data->platformdata = platformdata;
+ sensordata = platformdata->sensordata;
+
+ /* Call the platform setup routine, to do any setup that is required
+ * before
+ * interacting with the device.
+ */
+ if (sensordata && sensordata->rmi_sensor_setup) {
+ retval = sensordata->rmi_sensor_setup();
+ if (retval) {
+ printk(KERN_ERR "%s: sensor setup failed with
+ code %d.", __func__, retval);
+ kfree(instance_data);
+ return retval;
+ }
+ }
+
+ /* TODO: I think this if is no longer required. */
+ if (platformdata->chip == RMI_SUPPORT) {
+ instance_data->instance_no = sensor_count;
+ sensor_count++;
+
+ /* set the device name using the instance_no
+ * appended to DEVICE_NAME to make a unique name
+ */
+ dev_set_name(&spi->dev, "%s%d", RMI4_SPI_DEVICE_NAME,
+ instance_data->instance_no);
+ /*
+ * Determine if we need to poll (inefficient) or
+ * use interrupts.
+ */
+ if (platformdata->irq) {
+ switch (platformdata->irq_type) {
+ case IORESOURCE_IRQ_HIGHEDGE:
+ irqtype = IRQF_TRIGGER_RISING;
+ break;
+ case IORESOURCE_IRQ_LOWEDGE:
+ irqtype = IRQF_TRIGGER_FALLING;
+ break;
+ case IORESOURCE_IRQ_HIGHLEVEL:
+ irqtype = IRQF_TRIGGER_HIGH;
+ break;
+ case IORESOURCE_IRQ_LOWLEVEL:
+ irqtype = IRQF_TRIGGER_LOW;
+ break;
+ default:
+ dev_warn(&spi->dev, "%s: Invalid IRQ flags
+ in platform data.", __func__);
+ retval = -ENXIO;
+ goto error_exit;
+ }
+/*
+ retval = request_irq(instance_data->irq, spi_attn_isr,
+ irqtype, "rmi_spi", instance_data);
+ if (retval) {
+ dev_info(&spi->dev, "%s: Unable to get attn
+ irq %d. Reverting to polling. ", __func__,
+ instance_data->irq);
+ instance_data->rpd.polling_required = true;
+ } else {
+ dev_dbg(&spi->dev, "%s: got irq", __func__);
+ instance_data->rpd.polling_required = false;
+ instance_data->rpd.irq = instance_data->irq;
+ }
+*/
+ instance_data->rpd.polling_required = false;
+ } else {
+ instance_data->rpd.polling_required = true;
+ dev_info(&spi->dev, "%s: No IRQ info given.
+ Polling required.", __func__);
+ }
+ }
+
+ /* Store instance data for later access. */
+ if (instance_data)
+ spi_set_drvdata(spi, instance_data);
+
+ /* Register the sensor driver -
+ * which will trigger a scan of the PDT.
+ */
+ retval = rmi_register_sensor(&instance_data->rpd,
+ platformdata->sensordata);
+ if (retval) {
+ printk(KERN_ERR "%s: sensor registration failed with code
+ %d.", __func__, retval);
+ goto error_exit;
+ }
+
+ if (instance_data->rpd.polling_required == false) {
+ instance_data->irq = platformdata->irq;
+ retval = request_irq(platformdata->irq, spi_attn_isr,
+ irqtype, dev_name(&spi->dev), instance_data);
+ if (retval) {
+ dev_err(&spi->dev, "%s: failed to obtain IRQ %d.
+ Result: %d.", __func__,
+ platformdata->irq, retval);
+ dev_info(&spi->dev, "%s: Reverting to polling.\n",
+ __func__);
+ instance_data->rpd.polling_required = true;
+ instance_data->irq = 0;
+ /* TODO: Need to revert back to polling
+ * - create and start timer.
+ */
+ } else {
+ dev_dbg(&spi->dev, "%s: got irq.\n", __func__);
+ instance_data->rpd.irq = instance_data->irq;
+ }
+ }
+
+ printk(KERN_INFO "%s: Successfully Registered %s.",
+ __func__, instance_data->rpd.name);
+
+ return 0;
+
+error_exit:
+ if (sensordata && sensordata->rmi_sensor_teardown)
+ sensordata->rmi_sensor_teardown();
+ if (instance_data->irq)
+ free_irq(instance_data->irq, instance_data);
+ kfree(instance_data);
+ return retval;
+}
+
+static int rmi_spi_suspend(struct spi_device *spi, pm_message_t message)
+{
+ printk(KERN_INFO "%s: Suspending...", __func__);
+ return 0;
+}
+
+static int rmi_spi_resume(struct spi_device *spi)
+{
+ printk(KERN_INFO "%s: Resuming...", __func__);
+ return 0;
+}
+
+static int __devexit rmi_spi_remove(struct spi_device *spi)
+{
+ struct spi_device_instance_data *id = spi_get_drvdata(spi);
+
+ printk(KERN_INFO "%s: RMI SPI device removed.", __func__);
+
+ rmi_spi_suspend(spi, PMSG_SUSPEND);
+
+ rmi_unregister_sensors(&id->rpd);
+
+ if (id) {
+ if (id->irq)
+ free_irq(id->irq, id);
+ kfree(id);
+ }
+
+ return 0;
+}
+
+static struct spi_driver rmi_spi_driver = {
+ .driver = {
+ .name = RMI4_SPI_DRIVER_NAME,
+ .bus = &spi_bus_type,
+ .owner = THIS_MODULE,
+ },
+ .probe = rmi_spi_probe,
+ .remove = __devexit_p(rmi_spi_remove),
+ .suspend = rmi_spi_suspend,
+ .resume = rmi_spi_resume,
+};
+
+/**
+ * The Platform Driver probe function. We just tell the spi subsystem about
+ * ourselves in this call.
+ */
+static int
+rmi_spi_plat_probe(struct platform_device *dev)
+{
+ struct rmi_spi_platformdata *platform_data = dev->dev.platform_data;
+
+ printk(KERN_INFO "%s: Platform driver probe.", __func__);
+
+ if (!platform_data) {
+ printk(KERN_ERR "A platform device must contain
+ rmi_spi_platformdata\n");
+ return -ENXIO;
+ }
+
+ return spi_register_driver(&rmi_spi_driver);
+}
+
+/**
+ * Tell the spi subsystem that we're done.
+ * \param[in] dev
+ * \return Always returns 0.
+ */
+static int
+rmi_spi_plat_remove(struct platform_device *dev)
+{
+ printk(KERN_INFO "%s: Platform driver removed.", __func__);
+ spi_unregister_driver(&rmi_spi_driver);
+ return 0;
+}
+
+/**
+ * Structure used to tell the Platform Driver subsystem about us.
+ */
+static struct platform_driver rmi_spi_platform_driver = {
+ .driver = {
+ .name = RMI4_SPI_DRIVER_NAME,
+ .owner = THIS_MODULE,
+ },
+ .probe = rmi_spi_plat_probe,
+ .remove = __devexit_p(rmi_spi_plat_remove),
+};
+
+static int __init rmi_spi_init(void)
+{
+ int retval;
+
+ printk(KERN_INFO "%s: RMI SPI physical layer initialization.",
+ __func__);
+ retval = spi_register_driver(&rmi_spi_driver);
+ if (retval < 0) {
+ printk(KERN_ERR "%s: Failed to register spi driver, code
+ = %d.", __func__, retval);
+ return retval;
+ }
+/*
+#else
+ retval = platform_driver_register(&rmi_spi_platform_driver);
+ if (retval < 0) {
+ printk(KERN_ERR "%s: Failed to register platform driver,
+ code = %d.", __func__, retval);
+ return retval;
+ }
+#endif
+*/
+ printk(KERN_INFO "%s: result = %d", __func__, retval);
+ return retval;
+}
+module_init(rmi_spi_init);
+
+static void __exit rmi_spi_exit(void)
+{
+ printk(KERN_INFO "%s: RMI SPI physical layer exits.", __func__);
+ kfree(buf);
+ buf = NULL;
+ platform_driver_unregister(&rmi_spi_platform_driver);
+}
+module_exit(rmi_spi_exit);
+
+/** Standard driver module information - the author of the module.
+ */
+MODULE_AUTHOR("Synaptics, Inc.");
+/** Standard driver module information - a summary description of this module.
+ */
+MODULE_DESCRIPTION("RMI4 Driver SPI Physical Layer");
+/** Standard driver module information - the license under which this module
+ * is included in the kernel.
+ */
+MODULE_LICENSE("GPL");
diff --git a/drivers/input/touchscreen/synaptics/rmi_spi.h b/drivers/input/touchscreen/synaptics/rmi_spi.h
new file mode 100644
index 0000000..daeebed
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics/rmi_spi.h
@@ -0,0 +1,57 @@
+/**
+ *
+ * Register Mapped Interface SPI Physical Layer Driver Header File.
+ * Copyright (C) 2008-2011, Synaptics Incorporated
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+#if !defined(_RMI_SPI_H)
+#define _RMI_SPI_H
+
+#include <linux/input/rmi_platformdata.h>
+
+#define RMI_CHIP_VER_3 0
+#define RMI_CHIP_VER_4 1
+
+#define RMI_SUPPORT (RMI_CHIP_VER_3|RMI_CHIP_VER_4)
+
+#define RMI4_SPI_DRIVER_NAME "rmi4_ts"
+#define RMI4_SPI_DEVICE_NAME "rmi4_ts"
+
+/** Platform-specific configuration data.
+ * This structure is used by the platform-specific driver to designate
+ * specific information about the hardware. A platform client may supply
+ * an array of these to the rmi_phys_spi driver.
+ */
+struct rmi_spi_platformdata {
+ int chip;
+
+ /* The number of the irq. Set to zero if polling is required. */
+ int irq;
+
+ /* The type of the irq (e.g., IRQF_TRIGGER_FALLING). Only valid if
+ * irq != 0 */
+ int irq_type;
+
+ /* Use this to specify platformdata that is not I2C specific. */
+ struct rmi_sensordata *sensordata;
+};
+
+#endif
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index feb345d..60c200e 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -354,7 +354,7 @@
config LEDS_MSM_PMIC
tristate "LED Support for Qualcomm PMIC connected LEDs"
- default y
+ default n
depends on ARCH_MSM
help
This option enables support for LEDs connected over PMIC
diff --git a/drivers/leds/led-class.c b/drivers/leds/led-class.c
index b9520c8..b76b6d9 100644
--- a/drivers/leds/led-class.c
+++ b/drivers/leds/led-class.c
@@ -20,53 +20,12 @@
#include <linux/err.h>
#include <linux/ctype.h>
#include <linux/leds.h>
-#include <linux/slab.h>
#include "leds.h"
#define LED_BUFF_SIZE 50
static struct class *leds_class;
-#ifdef CONFIG_HAS_EARLYSUSPEND
-
-static void change_brightness(struct work_struct *brightness_change_data)
-{
- struct deferred_brightness_change *brightness_change = container_of(
- brightness_change_data,
- struct deferred_brightness_change,
- brightness_change_work);
- struct led_classdev *led_cdev = brightness_change->led_cdev;
- enum led_brightness value = brightness_change->value;
-
- led_cdev->brightness_set(led_cdev, value);
-
- /* Free up memory for the brightness_change structure. */
- kfree(brightness_change);
-}
-
-int queue_brightness_change(struct led_classdev *led_cdev,
- enum led_brightness value)
-{
- /* Initialize the brightness_change_work and its super-struct. */
- struct deferred_brightness_change *brightness_change =
- kzalloc(sizeof(struct deferred_brightness_change), GFP_KERNEL);
-
- if (!brightness_change)
- return -ENOMEM;
-
- brightness_change->led_cdev = led_cdev;
- brightness_change->value = value;
-
- INIT_WORK(&(brightness_change->brightness_change_work),
- change_brightness);
- queue_work(suspend_work_queue,
- &(brightness_change->brightness_change_work));
-
- return 0;
-}
-
-#endif
-
static void led_update_brightness(struct led_classdev *led_cdev)
{
if (led_cdev->brightness_get)
diff --git a/drivers/leds/leds-pm8xxx.c b/drivers/leds/leds-pm8xxx.c
index 94af3ce..025b756 100644
--- a/drivers/leds/leds-pm8xxx.c
+++ b/drivers/leds/leds-pm8xxx.c
@@ -18,8 +18,10 @@
#include <linux/platform_device.h>
#include <linux/leds.h>
#include <linux/workqueue.h>
+#include <linux/err.h>
#include <linux/mfd/pm8xxx/core.h>
+#include <linux/mfd/pm8xxx/pwm.h>
#include <linux/leds-pm8xxx.h>
#define SSBI_REG_ADDR_DRV_KEYPAD 0x48
@@ -54,6 +56,8 @@
#define PM8XXX_LED_OFFSET(id) ((id) - PM8XXX_ID_LED_0)
+#define PM8XXX_LED_PWM_FLAGS (PM_PWM_LUT_LOOP | PM_PWM_LUT_RAMP_UP)
+
/**
* struct pm8xxx_led_data - internal led data structure
* @led_classdev - led class device
@@ -61,6 +65,10 @@
* @work - workqueue for led
* @lock - to protect the transactions
* @reg - cached value of led register
+ * @pwm_dev - pointer to PWM device if LED is driven using PWM
+ * @pwm_channel - PWM channel ID
+ * @pwm_period_us - PWM period in micro seconds
+ * @pwm_duty_cycles - struct that describes PWM duty cycles info
*/
struct pm8xxx_led_data {
struct led_classdev cdev;
@@ -69,6 +77,10 @@
struct device *dev;
struct work_struct work;
struct mutex lock;
+ struct pwm_device *pwm_dev;
+ int pwm_channel;
+ u32 pwm_period_us;
+ struct pm8xxx_pwm_duty_cycles *pwm_duty_cycles;
};
static void led_kp_set(struct pm8xxx_led_data *led, enum led_brightness value)
@@ -133,6 +145,26 @@
led->id, rc);
}
+static int pm8xxx_led_pwm_work(struct pm8xxx_led_data *led)
+{
+ int duty_us;
+ int rc = 0;
+
+ if (led->pwm_duty_cycles == NULL) {
+ duty_us = (led->pwm_period_us * led->cdev.brightness) /
+ LED_FULL;
+ rc = pwm_config(led->pwm_dev, duty_us, led->pwm_period_us);
+ if (led->cdev.brightness)
+ rc = pwm_enable(led->pwm_dev);
+ else
+ pwm_disable(led->pwm_dev);
+ } else {
+ rc = pm8xxx_pwm_lut_enable(led->pwm_dev, led->cdev.brightness);
+ }
+
+ return rc;
+}
+
static void __pm8xxx_led_work(struct pm8xxx_led_data *led,
enum led_brightness level)
{
@@ -158,11 +190,19 @@
static void pm8xxx_led_work(struct work_struct *work)
{
+ int rc;
+
struct pm8xxx_led_data *led = container_of(work,
struct pm8xxx_led_data, work);
- int level = led->cdev.brightness;
- __pm8xxx_led_work(led, level);
+ if (led->pwm_dev == NULL) {
+ __pm8xxx_led_work(led, led->cdev.brightness);
+ } else {
+ rc = pm8xxx_led_pwm_work(led);
+ if (rc)
+ pr_err("could not configure PWM mode for LED:%d\n",
+ led->id);
+ }
}
static void pm8xxx_led_set(struct led_classdev *led_cdev,
@@ -270,6 +310,47 @@
return rc;
}
+static int pm8xxx_led_pwm_configure(struct pm8xxx_led_data *led)
+{
+ int start_idx, idx_len, duty_us, rc;
+
+ led->pwm_dev = pwm_request(led->pwm_channel,
+ led->cdev.name);
+
+ if (IS_ERR_OR_NULL(led->pwm_dev)) {
+ pr_err("could not acquire PWM Channel %d, "
+ "error %ld\n", led->pwm_channel,
+ PTR_ERR(led->pwm_dev));
+ led->pwm_dev = NULL;
+ return -ENODEV;
+ }
+
+ if (led->pwm_duty_cycles != NULL) {
+ start_idx = led->pwm_duty_cycles->start_idx;
+ idx_len = led->pwm_duty_cycles->num_duty_pcts;
+
+ if (idx_len >= PM_PWM_LUT_SIZE && start_idx) {
+ pr_err("Wrong LUT size or index\n");
+ return -EINVAL;
+ }
+ if ((start_idx + idx_len) > PM_PWM_LUT_SIZE) {
+ pr_err("Exceed LUT limit\n");
+ return -EINVAL;
+ }
+
+ rc = pm8xxx_pwm_lut_config(led->pwm_dev, led->pwm_period_us,
+ led->pwm_duty_cycles->duty_pcts,
+ led->pwm_duty_cycles->duty_ms,
+ start_idx, idx_len, 0, 0,
+ PM8XXX_LED_PWM_FLAGS);
+ } else {
+ duty_us = led->pwm_period_us;
+ rc = pwm_config(led->pwm_dev, duty_us, led->pwm_period_us);
+ }
+
+ return rc;
+}
+
static int __devinit pm8xxx_led_probe(struct platform_device *pdev)
{
const struct pm8xxx_led_platform_data *pdata = pdev->dev.platform_data;
@@ -304,6 +385,9 @@
led_cfg = &pdata->configs[i];
led_dat->id = led_cfg->id;
+ led_dat->pwm_channel = led_cfg->pwm_channel;
+ led_dat->pwm_period_us = led_cfg->pwm_period_us;
+ led_dat->pwm_duty_cycles = led_cfg->pwm_duty_cycles;
if (!((led_dat->id >= PM8XXX_ID_LED_KB_LIGHT) &&
(led_dat->id <= PM8XXX_ID_FLASH_LED_1))) {
@@ -340,11 +424,22 @@
goto fail_id_check;
}
- if (led_cfg->mode != PM8XXX_LED_MODE_MANUAL)
+ if (led_cfg->mode != PM8XXX_LED_MODE_MANUAL) {
__pm8xxx_led_work(led_dat,
led_dat->cdev.max_brightness);
- else
+
+ if (led_dat->pwm_channel != -1) {
+ led_dat->cdev.max_brightness = LED_FULL;
+ rc = pm8xxx_led_pwm_configure(led_dat);
+ if (rc) {
+ dev_err(&pdev->dev, "failed to "
+ "configure LED, error: %d\n", rc);
+ goto fail_id_check;
+ }
+ }
+ } else {
__pm8xxx_led_work(led_dat, LED_OFF);
+ }
}
platform_set_drvdata(pdev, led);
@@ -356,6 +451,8 @@
for (i = i - 1; i >= 0; i--) {
mutex_destroy(&led[i].lock);
led_classdev_unregister(&led[i].cdev);
+ if (led[i].pwm_dev != NULL)
+ pwm_free(led[i].pwm_dev);
}
}
kfree(led);
@@ -373,6 +470,8 @@
cancel_work_sync(&led[i].work);
mutex_destroy(&led[i].lock);
led_classdev_unregister(&led[i].cdev);
+ if (led[i].pwm_dev != NULL)
+ pwm_free(led[i].pwm_dev);
}
kfree(led);
diff --git a/drivers/leds/leds.h b/drivers/leds/leds.h
index 593a63c..e77c7f8 100644
--- a/drivers/leds/leds.h
+++ b/drivers/leds/leds.h
@@ -16,21 +16,6 @@
#include <linux/device.h>
#include <linux/rwsem.h>
#include <linux/leds.h>
-#include <linux/workqueue.h>
-
-#ifdef CONFIG_HAS_EARLYSUSPEND
-
-extern struct workqueue_struct *suspend_work_queue;
-extern int queue_brightness_change(struct led_classdev *led_cdev,
- enum led_brightness value);
-
-struct deferred_brightness_change {
- struct work_struct brightness_change_work;
- struct led_classdev *led_cdev;
- enum led_brightness value;
-};
-
-#endif
static inline void led_set_brightness(struct led_classdev *led_cdev,
enum led_brightness value)
@@ -38,12 +23,8 @@
if (value > led_cdev->max_brightness)
value = led_cdev->max_brightness;
led_cdev->brightness = value;
- if (!(led_cdev->flags & LED_SUSPENDED)) {
-#ifdef CONFIG_HAS_EARLYSUSPEND
- if (queue_brightness_change(led_cdev, value) != 0)
-#endif
- led_cdev->brightness_set(led_cdev, value);
- }
+ if (!(led_cdev->flags & LED_SUSPENDED))
+ led_cdev->brightness_set(led_cdev, value);
}
static inline int led_get_brightness(struct led_classdev *led_cdev)
diff --git a/drivers/media/radio/radio-iris.c b/drivers/media/radio/radio-iris.c
index 2a192db..e8e9770 100644
--- a/drivers/media/radio/radio-iris.c
+++ b/drivers/media/radio/radio-iris.c
@@ -98,6 +98,7 @@
};
static struct video_device *priv_videodev;
+static int iris_do_calibration(struct iris_device *radio);
static struct v4l2_queryctrl iris_v4l2_queryctrl[] = {
{
@@ -392,7 +393,30 @@
.minimum = 0,
.maximum = 2,
},
-
+ {
+ .id = V4L2_CID_PRIVATE_IRIS_READ_DEFAULT,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "Read default",
+ },
+ {
+ .id = V4L2_CID_PRIVATE_IRIS_WRITE_DEFAULT,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "Write default",
+ },
+ {
+ .id = V4L2_CID_PRIVATE_IRIS_SET_CALIBRATION,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "SET Calibration",
+ .minimum = 0,
+ .maximum = 1,
+ },
+ {
+ .id = V4L2_CID_PRIVATE_IRIS_DO_CALIBRATION,
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .name = "SET Calibration",
+ .minimum = 0,
+ .maximum = 1,
+ },
};
static void iris_q_event(struct iris_device *radio,
@@ -860,7 +884,7 @@
struct hci_fm_def_data_rd_req *def_data_rd =
(struct hci_fm_def_data_rd_req *) param;
- opcode = hci_opcode_pack(HCI_OGF_FM_RECV_CTRL_CMD_REQ,
+ opcode = hci_opcode_pack(HCI_OGF_FM_COMMON_CTRL_CMD_REQ,
HCI_OCF_FM_DEFAULT_DATA_READ);
return radio_hci_send_cmd(hdev, opcode, sizeof((*def_data_rd)),
def_data_rd);
@@ -873,7 +897,7 @@
struct hci_fm_def_data_wr_req *def_data_wr =
(struct hci_fm_def_data_wr_req *) param;
- opcode = hci_opcode_pack(HCI_OGF_FM_RECV_CTRL_CMD_REQ,
+ opcode = hci_opcode_pack(HCI_OGF_FM_COMMON_CTRL_CMD_REQ,
HCI_OCF_FM_DEFAULT_DATA_WRITE);
return radio_hci_send_cmd(hdev, opcode, sizeof((*def_data_wr)),
def_data_wr);
@@ -1212,7 +1236,6 @@
{
int ret = 0;
struct hci_fm_def_data_rd_req *def_data_rd = arg;
-
ret = radio_hci_request(hdev, hci_def_data_read_req, (unsigned
long)def_data_rd, RADIO_HCI_TIMEOUT);
@@ -1224,7 +1247,6 @@
{
int ret = 0;
struct hci_fm_def_data_wr_req *def_data_wr = arg;
-
ret = radio_hci_request(hdev, hci_def_data_write_req, (unsigned
long)def_data_wr, RADIO_HCI_TIMEOUT);
@@ -1310,6 +1332,32 @@
return ret;
}
+static int hci_fm_set_cal_req(struct radio_hci_dev *hdev,
+ unsigned long param)
+{
+ u16 opcode = 0;
+ struct hci_fm_set_cal_req *cal_req =
+ (struct hci_fm_set_cal_req *)param;
+
+ opcode = hci_opcode_pack(HCI_OGF_FM_COMMON_CTRL_CMD_REQ,
+ HCI_OCF_FM_SET_CALIBRATION);
+ return radio_hci_send_cmd(hdev, opcode, sizeof((*hci_fm_set_cal_req)),
+ cal_req);
+
+}
+
+static int hci_fm_do_cal_req(struct radio_hci_dev *hdev,
+ unsigned long param)
+{
+ u16 opcode = 0;
+ u8 cal_mode = param;
+
+ opcode = hci_opcode_pack(HCI_OGF_FM_COMMON_CTRL_CMD_REQ,
+ HCI_OCF_FM_DO_CALIBRATION);
+ return radio_hci_send_cmd(hdev, opcode, sizeof(cal_mode),
+ &cal_mode);
+
+}
static int hci_cmd(unsigned int cmd, struct radio_hci_dev *hdev)
{
int ret = 0;
@@ -1596,6 +1644,32 @@
}
+
+static void hci_cc_riva_read_default_rsp(struct radio_hci_dev *hdev,
+ struct sk_buff *skb)
+{
+ struct iris_device *radio = video_get_drvdata(video_get_dev());
+ __u8 status = *((__u8 *) skb->data);
+ __u8 len;
+ char *data;
+
+ if (status)
+ return;
+ len = skb->data[1];
+ data = kmalloc(len+2, GFP_ATOMIC);
+ if (!data) {
+ FMDERR("Memory allocation failed");
+ return;
+ }
+
+ data[0] = status;
+ data[1] = len;
+ memcpy(&data[2], &skb->data[DEFAULT_DATA_OFFSET], len);
+ iris_q_evt_data(radio, data, len+2, IRIS_BUF_RD_DEFAULT);
+ radio_hci_req_complete(hdev, status);
+ kfree(data);
+}
+
static void hci_cc_ssbi_peek_rsp(struct radio_hci_dev *hdev,
struct sk_buff *skb)
{
@@ -1637,6 +1711,29 @@
}
+static void hci_cc_do_calibration_rsp(struct radio_hci_dev *hdev,
+ struct sk_buff *skb)
+{
+ struct iris_device *radio = video_get_drvdata(video_get_dev());
+ static struct hci_cc_do_calibration_rsp rsp ;
+ rsp.status = skb->data[0];
+ rsp.mode = skb->data[CALIB_MODE_OFSET];
+
+ if (rsp.status) {
+ FMDERR("status = %d", rsp.status);
+ return;
+ }
+ if (rsp.mode == PROCS_CALIB_MODE) {
+ memcpy(&rsp.data[0], &skb->data[CALIB_DATA_OFSET],
+ PROCS_CALIB_SIZE);
+ } else if (rsp.mode == DC_CALIB_MODE) {
+ memcpy(&rsp.data[PROCS_CALIB_SIZE],
+ &skb->data[CALIB_DATA_OFSET], DC_CALIB_SIZE);
+ iris_q_evt_data(radio, rsp.data, (PROCS_CALIB_SIZE +
+ DC_CALIB_SIZE), IRIS_BUF_CAL_DATA);
+ }
+ radio_hci_req_complete(hdev, rsp.status);
+}
static inline void hci_cmd_complete_event(struct radio_hci_dev *hdev,
struct sk_buff *skb)
{
@@ -1674,13 +1771,15 @@
case hci_trans_ctrl_cmd_op_pack(HCI_OCF_FM_RDS_RT_REQ):
case hci_trans_ctrl_cmd_op_pack(HCI_OCF_FM_RDS_PS_REQ):
case hci_common_cmd_op_pack(HCI_OCF_FM_DEFAULT_DATA_WRITE):
+ hci_cc_rsp(hdev, skb);
+ break;
case hci_common_cmd_op_pack(HCI_OCF_FM_RESET):
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_SSBI_POKE_REG):
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_POKE_DATA):
case hci_diagnostic_cmd_op_pack(HCI_FM_SET_INTERNAL_TONE_GENRATOR):
+ case hci_common_cmd_op_pack(HCI_OCF_FM_SET_CALIBRATION):
hci_cc_rsp(hdev, skb);
break;
-
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_SSBI_PEEK_REG):
hci_cc_ssbi_peek_rsp(hdev, skb);
break;
@@ -1705,6 +1804,9 @@
break;
case hci_common_cmd_op_pack(HCI_OCF_FM_DEFAULT_DATA_READ):
+ hci_cc_riva_read_default_rsp(hdev, skb);
+ break;
+
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_PEEK_DATA):
hci_cc_riva_peek_rsp(hdev, skb);
break;
@@ -1723,6 +1825,9 @@
case hci_status_param_op_pack(HCI_OCF_FM_READ_GRP_COUNTERS):
hci_cc_rds_grp_cntrs_rsp(hdev, skb);
break;
+ case hci_common_cmd_op_pack(HCI_OCF_FM_DO_CALIBRATION):
+ hci_cc_do_calibration_rsp(hdev, skb);
+ break;
default:
FMDERR("%s opcode 0x%x", hdev->name, opcode);
@@ -2163,6 +2268,37 @@
return retval;
}
+static int iris_do_calibration(struct iris_device *radio)
+{
+ char cal_mode = 0x00;
+ int retval = 0x00;
+
+ cal_mode = PROCS_CALIB_MODE;
+ retval = hci_cmd(HCI_FM_ENABLE_RECV_CMD,
+ radio->fm_hdev);
+ if (retval < 0) {
+ FMDERR("Enable failed before calibration %x", retval);
+ return retval;
+ }
+ retval = radio_hci_request(radio->fm_hdev, hci_fm_do_cal_req,
+ (unsigned long)cal_mode, RADIO_HCI_TIMEOUT);
+ if (retval < 0) {
+ FMDERR("Do Process calibration failed %x", retval);
+ return retval;
+ }
+ cal_mode = DC_CALIB_MODE;
+ retval = radio_hci_request(radio->fm_hdev, hci_fm_do_cal_req,
+ (unsigned long)cal_mode, RADIO_HCI_TIMEOUT);
+ if (retval < 0) {
+ FMDERR("Do DC calibration failed %x", retval);
+ return retval;
+ }
+ retval = hci_cmd(HCI_FM_DISABLE_RECV_CMD,
+ radio->fm_hdev);
+ if (retval < 0)
+ FMDERR("Disable Failed after calibration %d", retval);
+ return retval;
+}
static int iris_vidioc_g_ctrl(struct file *file, void *priv,
struct v4l2_control *ctrl)
{
@@ -2272,6 +2408,9 @@
case V4L2_CID_PRIVATE_IRIS_SOFT_MUTE:
ctrl->value = radio->mute_mode.soft_mute;
break;
+ case V4L2_CID_PRIVATE_IRIS_DO_CALIBRATION:
+ retval = iris_do_calibration(radio);
+ break;
default:
retval = -EINVAL;
}
@@ -2281,6 +2420,30 @@
return retval;
}
+static int iris_vidioc_g_ext_ctrls(struct file *file, void *priv,
+ struct v4l2_ext_controls *ctrl)
+{
+ int retval = 0;
+ char *data = NULL;
+ struct iris_device *radio = video_get_drvdata(video_devdata(file));
+ struct hci_fm_def_data_rd_req default_data_rd;
+
+ switch ((ctrl->controls[0]).id) {
+ case V4L2_CID_PRIVATE_IRIS_READ_DEFAULT:
+ data = (ctrl->controls[0]).string;
+ memset(&default_data_rd, 0, sizeof(default_data_rd));
+ if (copy_from_user(&default_data_rd.mode, data,
+ sizeof(default_data_rd)))
+ return -EFAULT;
+ retval = hci_def_data_read(&default_data_rd, radio->fm_hdev);
+ break;
+ default:
+ retval = -EINVAL;
+ }
+
+ return retval;
+}
+
static int iris_vidioc_s_ext_ctrls(struct file *file, void *priv,
struct v4l2_ext_controls *ctrl)
{
@@ -2288,6 +2451,8 @@
int bytes_to_copy;
struct hci_fm_tx_ps tx_ps;
struct hci_fm_tx_rt tx_rt;
+ struct hci_fm_def_data_wr_req default_data;
+ struct hci_fm_set_cal_req cal_req;
struct iris_device *radio = video_get_drvdata(video_devdata(file));
char *data = NULL;
@@ -2333,6 +2498,35 @@
retval = radio_hci_request(radio->fm_hdev, hci_trans_rt_req,
(unsigned long)&tx_rt, RADIO_HCI_TIMEOUT);
break;
+ case V4L2_CID_PRIVATE_IRIS_WRITE_DEFAULT:
+ data = (ctrl->controls[0]).string;
+ memset(&default_data, 0, sizeof(default_data));
+ if (copy_from_user(&default_data, data, sizeof(default_data)))
+ return -EFAULT;
+ retval = hci_def_data_write(&default_data, radio->fm_hdev);
+ break;
+ case V4L2_CID_PRIVATE_IRIS_SET_CALIBRATION:
+ FMDERR("In Set Calibration");
+ data = (ctrl->controls[0]).string;
+ bytes_to_copy = (ctrl->controls[0]).size;
+ memset(cal_req.data, 0, MAX_CALIB_SIZE);
+ cal_req.mode = PROCS_CALIB_MODE;
+ if (copy_from_user(&cal_req.data[0],
+ data, PROCS_CALIB_SIZE))
+ return -EFAULT;
+ retval = radio_hci_request(radio->fm_hdev, hci_fm_set_cal_req,
+ (unsigned long)&cal_req, RADIO_HCI_TIMEOUT);
+ if (retval < 0)
+ FMDERR("Set Process calibration failed %d", retval);
+ if (copy_from_user(&cal_req.data[PROCS_CALIB_SIZE],
+ data, DC_CALIB_SIZE))
+ return -EFAULT;
+ cal_req.mode = DC_CALIB_MODE;
+ retval = radio_hci_request(radio->fm_hdev, hci_fm_set_cal_req,
+ (unsigned long)&cal_req, RADIO_HCI_TIMEOUT);
+ if (retval < 0)
+ FMDERR("Set DC calibration failed %d", retval);
+ break;
default:
FMDBG("Shouldn't reach here\n");
retval = -1;
@@ -2394,8 +2588,10 @@
retval = hci_set_fm_mute_mode(
&radio->mute_mode,
radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Failed to enable Smute\n");
+ return retval;
+ }
radio->stereo_mode.stereo_mode = CTRL_OFF;
radio->stereo_mode.sig_blend = CTRL_ON;
radio->stereo_mode.intf_blend = CTRL_ON;
@@ -2403,8 +2599,10 @@
retval = hci_set_fm_stereo_mode(
&radio->stereo_mode,
radio->fm_hdev);
- if (retval < 0)
+ if (retval < 0) {
FMDERR("Failed to set stereo mode\n");
+ return retval;
+ }
retval = hci_cmd(HCI_FM_GET_RECV_CONF_CMD,
radio->fm_hdev);
if (retval < 0)
@@ -2850,6 +3048,7 @@
.vidioc_dqbuf = iris_vidioc_dqbuf,
.vidioc_g_fmt_type_private = iris_vidioc_g_fmt_type_private,
.vidioc_s_ext_ctrls = iris_vidioc_s_ext_ctrls,
+ .vidioc_g_ext_ctrls = iris_vidioc_g_ext_ctrls,
};
static const struct v4l2_file_operations iris_fops = {
diff --git a/drivers/media/radio/radio-tavarua.c b/drivers/media/radio/radio-tavarua.c
index 36bad1b..49bc46c 100644
--- a/drivers/media/radio/radio-tavarua.c
+++ b/drivers/media/radio/radio-tavarua.c
@@ -2786,20 +2786,14 @@
FMDBG("turning on ..\n");
retval = tavarua_start(radio, ctrl->value);
if (retval >= 0) {
- FMDBG("Setting audio path ...\n");
- retval = tavarua_set_audio_path(
- TAVARUA_AUDIO_OUT_DIGITAL_ON,
- TAVARUA_AUDIO_OUT_ANALOG_OFF);
- if (retval < 0) {
- FMDERR("Error in tavarua_set_audio_path"
- " %d\n", retval);
- }
- /* Enabling 'SoftMute' and 'SignalBlending' features */
- value = (radio->registers[IOCTRL] |
+ /* Enabling 'SoftMute' & 'SignalBlending' */
+ value = (radio->registers[IOCTRL] |
IOC_SFT_MUTE | IOC_SIG_BLND);
- retval = tavarua_write_register(radio, IOCTRL, value);
- if (retval < 0)
- FMDBG("SMute and SBlending not enabled\n");
+ retval = tavarua_write_register(radio,
+ IOCTRL, value);
+ if (retval < 0)
+ FMDBG("SMute and SBlending"
+ "not enabled\n");
}
}
/* check if off */
@@ -2822,6 +2816,28 @@
}
}
break;
+ case V4L2_CID_PRIVATE_TAVARUA_SET_AUDIO_PATH:
+ FMDBG("Setting audio path ...\n");
+ if (ctrl->value == FM_DIGITAL_PATH) {
+ FMDBG("Digital audio path enabled ...\n");
+ retval = tavarua_set_audio_path(
+ TAVARUA_AUDIO_OUT_DIGITAL_ON,
+ TAVARUA_AUDIO_OUT_ANALOG_OFF);
+ if (retval < 0) {
+ FMDERR("Error in tavarua_set_audio_path"
+ " %d\n", retval);
+ }
+ } else if (ctrl->value == FM_ANALOG_PATH) {
+ FMDBG("Analog audio path enabled ...\n");
+ retval = tavarua_set_audio_path(
+ TAVARUA_AUDIO_OUT_ANALOG_ON,
+ TAVARUA_AUDIO_OUT_DIGITAL_OFF);
+ if (retval < 0) {
+ FMDERR("Error in tavarua_set_audio_path"
+ " %d\n", retval);
+ }
+ }
+ break;
case V4L2_CID_PRIVATE_TAVARUA_REGION:
retval = tavarua_set_region(radio, ctrl->value);
break;
diff --git a/drivers/media/video/msm/Kconfig b/drivers/media/video/msm/Kconfig
index a86460b..9361f5a9 100644
--- a/drivers/media/video/msm/Kconfig
+++ b/drivers/media/video/msm/Kconfig
@@ -37,6 +37,18 @@
default y
---help---
SONY 13.5 MP Bayer Sensor
+config OV5640
+ bool "Sensor OV5640 (YUV 5M)"
+ depends on MSM_CAMERA && !MSM_CAMERA_V4L2
+ default n
+ ---help---
+ Omni 5M YUV Sensor
+config WEBCAM_OV7692_QRD
+ bool "Sensor OV7692 QRD(VGA YUV)"
+ depends on MSM_CAMERA && ARCH_MSM7X27A && !MSM_CAMERA_V4L2
+ default n
+ ---help---
+ Omni Vision VGA YUV Sensor for QRD Devices
config WEBCAM_OV7692
bool "Sensor OV7692 (VGA YUV)"
depends on MSM_CAMERA && ARCH_MSM8X60 && !MSM_CAMERA_V4L2
diff --git a/drivers/media/video/msm/Makefile b/drivers/media/video/msm/Makefile
index bd3fffe..3f41d43 100644
--- a/drivers/media/video/msm/Makefile
+++ b/drivers/media/video/msm/Makefile
@@ -39,6 +39,8 @@
obj-$(CONFIG_IMX072) += imx072.o imx072_reg.o
obj-$(CONFIG_WEBCAM_OV9726) += ov9726.o ov9726_reg.o
obj-$(CONFIG_WEBCAM_OV7692) += ov7692.o
+obj-$(CONFIG_WEBCAM_OV7692_QRD) += ov7692_qrd.o
+obj-$(CONFIG_OV5640) += ov5640.o
obj-$(CONFIG_MT9D112) += mt9d112.o mt9d112_reg.o
obj-$(CONFIG_MT9D113) += mt9d113.o mt9d113_reg.o
diff --git a/drivers/media/video/msm/actuators/imx074_act.c b/drivers/media/video/msm/actuators/imx074_act.c
index 2af21d6..f267f80 100644
--- a/drivers/media/video/msm/actuators/imx074_act.c
+++ b/drivers/media/video/msm/actuators/imx074_act.c
@@ -15,7 +15,7 @@
#include "msm_logging.h"
#include "msm_camera_i2c.h"
-#define IMX074_TOTAL_STEPS_NEAR_TO_FAR 52
+#define IMX074_TOTAL_STEPS_NEAR_TO_FAR 41
DEFINE_MUTEX(imx074_act_mutex);
static struct msm_actuator_ctrl_t imx074_act_t;
@@ -39,7 +39,7 @@
/* MOVE_NEAR Dir */
/* Scene 1 => Damping params */
{
- .damping_step = 2,
+ .damping_step = 0xFF,
.damping_delay = 0,
},
};
@@ -91,6 +91,23 @@
return rc;
}
+static int32_t imx074_set_default_focus(
+ struct msm_actuator_ctrl_t *a_ctrl)
+{
+ int32_t rc = 0;
+
+ if (!a_ctrl->step_position_table)
+ a_ctrl->func_tbl.actuator_init_table(a_ctrl);
+
+ if (a_ctrl->curr_step_pos != 0) {
+ rc = a_ctrl->func_tbl.actuator_i2c_write(a_ctrl, 0x7F, NULL);
+ rc = a_ctrl->func_tbl.actuator_i2c_write(a_ctrl, 0x7F, NULL);
+ a_ctrl->curr_step_pos = 0;
+ } else if (a_ctrl->func_tbl.actuator_init_focus)
+ rc = a_ctrl->func_tbl.actuator_init_focus(a_ctrl);
+ return rc;
+}
+
static int32_t imx074_act_init_focus(struct msm_actuator_ctrl_t *a_ctrl)
{
int32_t rc;
@@ -207,7 +224,7 @@
.actuator_init_table = msm_actuator_init_table,
.actuator_move_focus = msm_actuator_move_focus,
.actuator_write_focus = imx074_act_write_focus,
- .actuator_set_default_focus = msm_actuator_set_default_focus,
+ .actuator_set_default_focus = imx074_set_default_focus,
.actuator_init_focus = imx074_act_init_focus,
.actuator_i2c_write = imx074_wrapper_i2c_write,
},
diff --git a/drivers/media/video/msm/msm.c b/drivers/media/video/msm/msm.c
index 727b751..40a273a 100644
--- a/drivers/media/video/msm/msm.c
+++ b/drivers/media/video/msm/msm.c
@@ -1398,10 +1398,8 @@
}
mutex_lock(&pcam->vid_lock);
for (i = 0; i < MSM_DEV_INST_MAX; i++) {
- if (pcam->dev_inst[i] == NULL) {
- mutex_unlock(&pcam->vid_lock);
+ if (pcam->dev_inst[i] == NULL)
break;
- }
}
/* if no instance is available, return error */
if (i == MSM_DEV_INST_MAX) {
@@ -1576,10 +1574,12 @@
mutex_lock(&pcam->vid_lock);
+ pcam_inst->streamon = 0;
pcam->use_count--;
pcam->dev_inst_map[pcam_inst->image_mode] = NULL;
if (pcam_inst->vbqueue_initialized)
vb2_queue_release(&pcam_inst->vid_bufq);
+ D("%s Closing down instance %p ", __func__, pcam_inst);
pcam->dev_inst[pcam_inst->my_index] = NULL;
if (pcam_inst->my_index == 0) {
v4l2_fh_del(&pcam_inst->eventHandle);
@@ -2358,24 +2358,39 @@
void *act_client = NULL;
struct msm_actuator_ctrl *a_ext_ctrl = NULL;
- if (!actuator_info) {
- actctrl->a_init_table = NULL;
- actctrl->a_power_down = NULL;
- actctrl->a_config = NULL;
- actctrl->a_create_subdevice = NULL;
- return rc;
- }
+ D("%s called\n", __func__);
+
+ if (!actuator_info)
+ goto probe_fail;
adapter = i2c_get_adapter(actuator_info->bus_id);
+ if (!adapter)
+ goto probe_fail;
act_client = i2c_new_device(adapter, actuator_info->board_info);
+ if (!act_client)
+ goto device_fail;
a_ext_ctrl = (struct msm_actuator_ctrl *)i2c_get_clientdata(act_client);
+ if (!a_ext_ctrl)
+ goto client_fail;
*actctrl = *a_ext_ctrl;
a_ext_ctrl->a_create_subdevice((void *)actuator_info->board_info,
(void *)act_sdev);
return rc;
+
+client_fail:
+ i2c_unregister_device(act_client);
+device_fail:
+ i2c_put_adapter(adapter);
+ adapter = NULL;
+probe_fail:
+ actctrl->a_init_table = NULL;
+ actctrl->a_power_down = NULL;
+ actctrl->a_config = NULL;
+ actctrl->a_create_subdevice = NULL;
+ return rc;
}
static int msm_sync_init(struct msm_sync *sync,
@@ -2546,6 +2561,7 @@
implemenation of mutex_init is not consuming resources */
msm_sync_destroy(&pcam->mctl.sync);
pcam->pdev = NULL;
+ kfree(act_sdev);
kfree(sdev);
kzfree(pcam);
return rc;
diff --git a/drivers/media/video/msm/msm_io_8960.c b/drivers/media/video/msm/msm_io_8960.c
index 45871bc..0e4429e 100644
--- a/drivers/media/video/msm/msm_io_8960.c
+++ b/drivers/media/video/msm/msm_io_8960.c
@@ -27,6 +27,7 @@
#define DBG_CSID 0
#define DBG_CSIPHY 0
+#define BUFF_SIZE_128 128
/* MIPI CSI PHY registers */
#define MIPI_CSIPHY_LNn_CFG1_ADDR 0x0
@@ -194,7 +195,7 @@
void msm_io_dump(void __iomem *addr, int size)
{
- char line_str[128], *p_str;
+ char line_str[BUFF_SIZE_128], *p_str;
int i;
u32 *p = (u32 *) addr;
u32 data;
@@ -203,11 +204,11 @@
p_str = line_str;
for (i = 0; i < size/4; i++) {
if (i % 4 == 0) {
- sprintf(p_str, "%08x: ", (u32) p);
+ snprintf(p_str, 12, "%08x: ", (u32) p);
p_str += 10;
}
data = readl_relaxed(p++);
- sprintf(p_str, "%08x ", data);
+ snprintf(p_str, 12, "%08x ", data);
p_str += 9;
if ((i + 1) % 4 == 0) {
CDBG("%s\n", line_str);
diff --git a/drivers/media/video/msm/msm_isp.c b/drivers/media/video/msm/msm_isp.c
index 9204269..56fbc41 100644
--- a/drivers/media/video/msm/msm_isp.c
+++ b/drivers/media/video/msm/msm_isp.c
@@ -81,7 +81,11 @@
struct msm_cam_v4l2_device *pcam = sync->pcam_sync;
int vfe_id = vdata->evt_msg.msg_id;
-
+ if (!pcam) {
+ pr_err("%s pcam is null. return\n", __func__);
+ msm_isp_sync_free(vdata);
+ return rc;
+ }
switch (vdata->type) {
case VFE_MSG_V32_START:
case VFE_MSG_V32_START_RECORDING:
@@ -157,7 +161,7 @@
if (notification == NOTIFY_VFE_BUF_EVT)
return msm_isp_notify_VFE_BUF_EVT(sd, arg);
- isp_event = kzalloc(sizeof(struct msm_isp_event_ctrl), GFP_KERNEL);
+ isp_event = kzalloc(sizeof(struct msm_isp_event_ctrl), GFP_ATOMIC);
if (!isp_event) {
pr_err("%s Insufficient memory. return", __func__);
return -ENOMEM;
diff --git a/drivers/media/video/msm/msm_mctl_buf.c b/drivers/media/video/msm/msm_mctl_buf.c
index a8554ee..1bbb029 100644
--- a/drivers/media/video/msm/msm_mctl_buf.c
+++ b/drivers/media/video/msm/msm_mctl_buf.c
@@ -368,23 +368,28 @@
int msm_mctl_out_type_to_inst_index(struct msm_cam_v4l2_device *pcam,
int out_type)
{
+ int image_mode;
switch (out_type) {
case VFE_MSG_OUTPUT_P:
- return pcam->dev_inst_map
- [MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW]->my_index;
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW;
+ break;
case VFE_MSG_OUTPUT_V:
- return pcam->dev_inst_map
- [MSM_V4L2_EXT_CAPTURE_MODE_VIDEO]->my_index;
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_VIDEO;
+ break;
case VFE_MSG_OUTPUT_S:
- return pcam->dev_inst_map
- [MSM_V4L2_EXT_CAPTURE_MODE_MAIN]->my_index;
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_MAIN;
+ break;
case VFE_MSG_OUTPUT_T:
- return pcam->dev_inst_map
- [MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL]->my_index;
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL;
+ break;
default:
- return 0;
+ image_mode = -1;
+ break;
}
- return 0;
+ if ((image_mode >= 0) && pcam->dev_inst_map[image_mode])
+ return pcam->dev_inst_map[image_mode]->my_index;
+ else
+ return -EINVAL;
}
void msm_mctl_gettimeofday(struct timeval *tv)
@@ -482,6 +487,11 @@
else {
idx = msm_mctl_out_type_to_inst_index(
p_mctl->sync.pcam_sync, msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, dropping buffer\n",
+ __func__);
+ return idx;
+ }
pcam_inst = p_mctl->sync.pcam_sync->dev_inst[idx];
rc = msm_mctl_buf_done_proc(p_mctl, pcam_inst,
msg_type, fbuf,
@@ -508,16 +518,20 @@
int rc = -EINVAL, idx, i;
uint32_t buf_idx, plane_offset = 0;
- if (!free_buf) {
- pr_err("%s: free_buf= null\n", __func__);
+ if (!free_buf || !pmctl) {
+ pr_err("%s: free_buf/pmctl is null\n", __func__);
return rc;
}
memset(free_buf, 0, sizeof(struct msm_free_buf));
idx = msm_mctl_out_type_to_inst_index(pmctl->sync.pcam_sync,
msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, returning\n", __func__);
+ return idx;
+ }
pcam_inst = pmctl->sync.pcam_sync->dev_inst[idx];
if (!pcam_inst || !pcam_inst->streamon) {
- D("%s: stream is turned off\n", __func__);
+ pr_err("%s: stream is turned off\n", __func__);
return rc;
}
spin_lock_irqsave(&pcam_inst->vq_irqlock, flags);
@@ -582,6 +596,10 @@
return rc;
idx = msm_mctl_out_type_to_inst_index(pmctl->sync.pcam_sync, msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, buffer not released\n", __func__);
+ return idx;
+ }
pcam_inst = pmctl->sync.pcam_sync->dev_inst[idx];
spin_lock_irqsave(&pcam_inst->vq_irqlock, flags);
list_for_each_entry(buf, &pcam_inst->free_vq, list) {
@@ -611,6 +629,10 @@
idx = msm_mctl_out_type_to_inst_index(
pmctl->sync.pcam_sync, msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, buffer dropped\n", __func__);
+ return idx;
+ }
pcam_inst = pmctl->sync.pcam_sync->dev_inst[idx];
D("%s:inst=0x%p, paddr=0x%x, dirty=%d",
__func__, pcam_inst, frame->ch_paddr[0], dirty);
@@ -634,6 +656,10 @@
idx = msm_mctl_out_type_to_inst_index(pmctl->sync.pcam_sync,
msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, cant get buffer\n", __func__);
+ return NULL;
+ }
pcam_inst = pmctl->sync.pcam_sync->dev_inst[idx];
if (!pcam_inst->streamon) {
D("%s: stream 0x%p is off\n", __func__, pcam_inst);
@@ -669,6 +695,10 @@
idx = msm_mctl_out_type_to_inst_index(pmctl->sync.pcam_sync,
msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, cant put buffer\n", __func__);
+ return idx;
+ }
pcam_inst = pmctl->sync.pcam_sync->dev_inst[idx];
if (!pcam_inst->streamon) {
D("%s: stream 0x%p is off\n", __func__, pcam_inst);
@@ -700,6 +730,10 @@
idx = msm_mctl_out_type_to_inst_index(pmctl->sync.pcam_sync,
msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance, cant delete buffer\n", __func__);
+ return idx;
+ }
pcam_inst = pmctl->sync.pcam_sync->dev_inst[idx];
D("%s: idx = %d, pinst=0x%p", __func__, idx, pcam_inst);
spin_lock_irqsave(&pcam_inst->vq_irqlock, flags);
diff --git a/drivers/media/video/msm/msm_mctl_pp.c b/drivers/media/video/msm/msm_mctl_pp.c
index 7040c29..2bf95a0 100644
--- a/drivers/media/video/msm/msm_mctl_pp.c
+++ b/drivers/media/video/msm/msm_mctl_pp.c
@@ -43,7 +43,7 @@
struct v4l2_event v4l2_evt;
struct msm_isp_event_ctrl *isp_event;
isp_event = kzalloc(sizeof(struct msm_isp_event_ctrl),
- GFP_KERNEL);
+ GFP_ATOMIC);
if (!isp_event) {
pr_err("%s Insufficient memory. return", __func__);
return -ENOMEM;
@@ -57,9 +57,8 @@
/* Copy the divert frame struct into event ctrl struct. */
isp_event->isp_data.div_frame = *div;
- D("%s inst=%p, img_mode=%d, frame_id=%d,phy=0x%x,len=%d\n",
- __func__, pcam_inst, pcam_inst->image_mode, div->frame_id,
- (uint32_t)div->phy_addr, div->length);
+ D("%s inst=%p, img_mode=%d, frame_id=%d\n", __func__,
+ pcam_inst, pcam_inst->image_mode, div->frame.frame_id);
v4l2_event_queue(
pmctl->config_device->config_stat_event_queue.pvdev,
&v4l2_evt);
@@ -119,7 +118,7 @@
uint32_t frame_id, int pp_type)
{
struct msm_cam_v4l2_dev_inst *pcam_inst;
- int idx, rc = 0;
+ int idx, rc = 0, i, buf_idx;
int del_buf = 0; /* delete from free queue */
struct msm_cam_evt_divert_frame div;
struct msm_frame_buffer *vb = NULL;
@@ -127,64 +126,122 @@
idx = msm_mctl_out_type_to_inst_index(
p_mctl->sync.pcam_sync, msg_type);
+ if (idx < 0) {
+ pr_err("%s Invalid instance. returning\n", __func__);
+ return -EINVAL;
+ }
pcam_inst = p_mctl->sync.pcam_sync->dev_inst[idx];
vb = msm_mctl_buf_find(p_mctl, pcam_inst,
del_buf, msg_type, fbuf);
if (!vb)
return -EINVAL;
+
vb->vidbuf.v4l2_buf.sequence = frame_id;
- mem = vb2_plane_cookie(&vb->vidbuf, 0);
+ buf_idx = vb->vidbuf.v4l2_buf.index;
div.image_mode = pcam_inst->image_mode;
div.op_mode = pcam_inst->pcam->op_mode;
div.inst_idx = pcam_inst->my_index;
div.node_idx = pcam_inst->pcam->vnode_id;
- div.phy_addr =
- videobuf2_to_pmem_contig(&vb->vidbuf, 0);
- div.phy_offset = mem->addr_offset;
- div.y_off = 0;
- div.cbcr_off = mem->offset.sp_off.cbcr_off;
- div.fd = (int)mem->vaddr;
- div.vb = (uint32_t)vb;
p_mctl->pp_info.cur_frame_id[pcam_inst->image_mode]++;
if (p_mctl->pp_info.cur_frame_id[pcam_inst->image_mode] == 0)
p_mctl->pp_info.cur_frame_id[pcam_inst->image_mode]++;
- div.frame_id =
+ div.frame.frame_id =
p_mctl->pp_info.cur_frame_id[pcam_inst->image_mode];
- div.path = mem->path;
- div.length = mem->size;
- msm_mctl_gettimeofday(&div.timestamp);
- vb->vidbuf.v4l2_buf.timestamp = div.timestamp;
+ div.frame.handle = (uint32_t)vb;
+ msm_mctl_gettimeofday(&div.frame.timestamp);
+ vb->vidbuf.v4l2_buf.timestamp = div.frame.timestamp;
div.do_pp = pp_type;
- if (!pp_type) {
- p_mctl->pp_info.div_frame[pcam_inst->image_mode].ch_paddr[0] =
- div.phy_addr;
+ /* Get the cookie for 1st plane and store the path.
+ * Also use this to check the number of planes in
+ * this buffer.*/
+ mem = vb2_plane_cookie(&vb->vidbuf, 0);
+ div.frame.path = mem->path;
+ if (mem->buffer_type == VIDEOBUF2_SINGLE_PLANE) {
+ /* This buffer contains only 1 plane. Use the
+ * single planar structure to store the info.*/
+ div.frame.num_planes = 1;
+ div.frame.sp.phy_addr =
+ videobuf2_to_pmem_contig(&vb->vidbuf, 0);
+ div.frame.sp.addr_offset = mem->addr_offset;
+ div.frame.sp.y_off = 0;
+ div.frame.sp.cbcr_off = mem->offset.sp_off.cbcr_off;
+ div.frame.sp.fd = (int)mem->vaddr;
+ div.frame.sp.length = mem->size;
+ if (!pp_type)
+ p_mctl->pp_info.div_frame[pcam_inst->image_mode].
+ ch_paddr[0] = div.frame.sp.phy_addr;
+ } else {
+ /* This buffer contains multiple planes. Use the mutliplanar
+ * structure to store the info. */
+ div.frame.num_planes = pcam_inst->plane_info.num_planes;
+ /* Now traverse through all the planes of the buffer to
+ * fill out the plane info. */
+ for (i = 0; i < div.frame.num_planes; i++) {
+ mem = vb2_plane_cookie(&vb->vidbuf, i);
+ div.frame.mp[i].phy_addr =
+ videobuf2_to_pmem_contig(&vb->vidbuf, i);
+ div.frame.mp[i].data_offset =
+ pcam_inst->buf_offset[buf_idx][i].data_offset;
+ div.frame.mp[i].addr_offset =
+ mem->addr_offset;
+ div.frame.mp[i].fd = (int)mem->vaddr;
+ div.frame.mp[i].length = mem->size;
+ }
+ if (!pp_type)
+ p_mctl->pp_info.div_frame[pcam_inst->image_mode].
+ ch_paddr[0] = div.frame.mp[0].phy_addr;
}
rc = msm_mctl_pp_buf_divert(p_mctl, pcam_inst, &div);
return rc;
}
static int msm_mctl_pp_get_phy_addr(
+ struct msm_cam_v4l2_dev_inst *pcam_inst,
uint32_t frame_handle,
struct msm_pp_frame *pp_frame)
{
struct msm_frame_buffer *vb = NULL;
struct videobuf2_contig_pmem *mem;
+ int i, buf_idx = 0;
vb = (struct msm_frame_buffer *)frame_handle;
- mem = vb2_plane_cookie(&vb->vidbuf, 0);
+ buf_idx = vb->vidbuf.v4l2_buf.index;
memset(pp_frame, 0, sizeof(struct msm_pp_frame));
pp_frame->handle = (uint32_t)vb;
pp_frame->frame_id = vb->vidbuf.v4l2_buf.sequence;
- pp_frame->image_type = (unsigned short)mem->path;
pp_frame->timestamp = vb->vidbuf.v4l2_buf.timestamp;
- /* hard coded for now. Will need to expand to MP case */
- pp_frame->num_planes = 1;
- pp_frame->sp.addr_offset = mem->addr_offset;
- pp_frame->sp.phy_addr = videobuf2_to_pmem_contig(&vb->vidbuf, 0);
- pp_frame->sp.y_off = 0;
- pp_frame->sp.cbcr_off = mem->offset.sp_off.cbcr_off;
- pp_frame->sp.length = mem->size;
- pp_frame->sp.fd = (int)mem->vaddr;
+ /* Get the cookie for 1st plane and store the path.
+ * Also use this to check the number of planes in
+ * this buffer.*/
+ mem = vb2_plane_cookie(&vb->vidbuf, 0);
+ pp_frame->image_type = (unsigned short)mem->path;
+ if (mem->buffer_type == VIDEOBUF2_SINGLE_PLANE) {
+ pp_frame->num_planes = 1;
+ pp_frame->sp.addr_offset = mem->addr_offset;
+ pp_frame->sp.phy_addr =
+ videobuf2_to_pmem_contig(&vb->vidbuf, 0);
+ pp_frame->sp.y_off = 0;
+ pp_frame->sp.cbcr_off = mem->offset.sp_off.cbcr_off;
+ pp_frame->sp.length = mem->size;
+ pp_frame->sp.fd = (int)mem->vaddr;
+ } else {
+ pp_frame->num_planes = pcam_inst->plane_info.num_planes;
+ for (i = 0; i < pp_frame->num_planes; i++) {
+ mem = vb2_plane_cookie(&vb->vidbuf, i);
+ pp_frame->mp[i].addr_offset = mem->addr_offset;
+ pp_frame->mp[i].phy_addr =
+ videobuf2_to_pmem_contig(&vb->vidbuf, i);
+ pp_frame->mp[i].data_offset =
+ pcam_inst->buf_offset[buf_idx][i].data_offset;
+ pp_frame->mp[i].fd = (int)mem->vaddr;
+ pp_frame->mp[i].length = mem->size;
+ D("%s frame id %d buffer %d plane %d phy addr 0x%x"
+ " fd %d length %d\n", __func__,
+ pp_frame->frame_id, buf_idx, i,
+ (uint32_t)pp_frame->mp[i].phy_addr,
+ pp_frame->mp[i].fd, pp_frame->mp[i].length);
+ }
+ }
return 0;
}
@@ -207,12 +264,38 @@
return 0;
}
+static int msm_mctl_pp_path_to_inst_index(struct msm_cam_v4l2_device *pcam,
+ int out_type)
+{
+ int image_mode;
+ switch (out_type) {
+ case OUTPUT_TYPE_P:
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW;
+ break;
+ case OUTPUT_TYPE_V:
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_VIDEO;
+ break;
+ case OUTPUT_TYPE_S:
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_MAIN;
+ break;
+ default:
+ image_mode = -1;
+ break;
+ }
+ if ((image_mode >= 0) && pcam->dev_inst_map[image_mode])
+ return pcam->dev_inst_map[image_mode]->my_index;
+ else
+ return -EINVAL;
+}
+
int msm_mctl_pp_proc_vpe_cmd(
struct msm_cam_media_controller *p_mctl,
struct msm_mctl_pp_cmd *pp_cmd)
{
- int rc = 0;
+ int rc = 0, idx;
void __user *argp = (void __user *)pp_cmd->value;
+ struct msm_cam_v4l2_dev_inst *pcam_inst;
+
switch (pp_cmd->id) {
case VPE_CMD_INIT:
case VPE_CMD_DEINIT:
@@ -394,15 +477,27 @@
zoom->pp_frame_cmd.cookie,
zoom->pp_frame_cmd.vpe_output_action,
zoom->pp_frame_cmd.path);
-
+ idx = msm_mctl_pp_path_to_inst_index(p_mctl->sync.pcam_sync,
+ zoom->pp_frame_cmd.path);
+ if (idx < 0) {
+ pr_err("%s Invalid path, returning\n", __func__);
+ kfree(zoom);
+ return idx;
+ }
+ pcam_inst = p_mctl->sync.pcam_sync->dev_inst[idx];
+ if (!pcam_inst) {
+ pr_err("%s Invalid instance, returning\n", __func__);
+ kfree(zoom);
+ return -EINVAL;
+ }
zoom->user_cmd = pp_cmd->id;
- rc = msm_mctl_pp_get_phy_addr(
+ rc = msm_mctl_pp_get_phy_addr(pcam_inst,
zoom->pp_frame_cmd.src_buf_handle, &zoom->src_frame);
if (rc) {
kfree(zoom);
break;
}
- rc = msm_mctl_pp_get_phy_addr(
+ rc = msm_mctl_pp_get_phy_addr(pcam_inst,
zoom->pp_frame_cmd.dest_buf_handle, &zoom->dest_frame);
if (rc) {
kfree(zoom);
@@ -581,7 +676,7 @@
struct msm_mctl_pp_event_info *pp_event_info;
struct msm_isp_event_ctrl *isp_event;
isp_event = kzalloc(sizeof(struct msm_isp_event_ctrl),
- GFP_KERNEL);
+ GFP_ATOMIC);
if (!isp_event) {
pr_err("%s Insufficient memory.", __func__);
return -ENOMEM;
@@ -622,7 +717,7 @@
if (copy_from_user(&frame, arg,
sizeof(struct msm_cam_evt_divert_frame)))
return -EFAULT;
- switch (frame.path) {
+ switch (frame.frame.path) {
case OUTPUT_TYPE_P:
msg_type = VFE_MSG_OUTPUT_P;
image_mode = MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW;
@@ -642,8 +737,8 @@
}
rc = msm_mctl_reserve_free_buf(p_mctl, msg_type, &free_buf);
if (rc == 0) {
- frame.phy_addr = free_buf.ch_paddr[0];
- frame.vb = free_buf.vb;
+ frame.frame.sp.phy_addr = free_buf.ch_paddr[0];
+ frame.frame.handle = free_buf.vb;
if (copy_to_user((void *)arg,
&frame,
sizeof(frame))) {
@@ -667,7 +762,7 @@
if (copy_from_user(&frame, arg,
sizeof(struct msm_cam_evt_divert_frame)))
return -EFAULT;
- switch (frame.path) {
+ switch (frame.frame.path) {
case OUTPUT_TYPE_P:
msg_type = VFE_MSG_OUTPUT_P;
image_mode = MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW;
@@ -685,7 +780,7 @@
rc = -EFAULT;
return rc;
}
- free_buf.ch_paddr[0] = frame.phy_addr;
+ free_buf.ch_paddr[0] = frame.frame.sp.phy_addr;
rc = msm_mctl_release_free_buf(p_mctl, msg_type, &free_buf);
D("%s: release free buf, rc = %d, phy = 0x%x",
__func__, rc, free_buf.ch_paddr[0]);
@@ -713,7 +808,7 @@
struct msm_cam_media_controller *p_mctl,
void __user *arg)
{
- struct msm_frame frame;
+ struct msm_pp_frame frame;
int msg_type, image_mode, rc = 0;
int dirty = 0;
struct msm_free_buf buf;
@@ -721,6 +816,7 @@
if (copy_from_user(&frame, arg, sizeof(frame)))
return -EFAULT;
+
spin_lock_irqsave(&p_mctl->pp_info.lock, flags);
switch (frame.path) {
case OUTPUT_TYPE_P:
@@ -751,8 +847,12 @@
/* dirty frame. should not pass to app */
dirty = 1;
}
- } else
- buf.ch_paddr[0] = frame.buffer;
+ } else {
+ if (frame.num_planes > 1)
+ buf.ch_paddr[0] = frame.mp[0].phy_addr;
+ else
+ buf.ch_paddr[0] = frame.sp.phy_addr;
+ }
spin_unlock_irqrestore(&p_mctl->pp_info.lock, flags);
/* here buf.addr is phy_addr */
rc = msm_mctl_buf_done_pp(p_mctl, msg_type, &buf, dirty);
diff --git a/drivers/media/video/msm/msm_vfe32.c b/drivers/media/video/msm/msm_vfe32.c
index 219e504..51b7a90 100644
--- a/drivers/media/video/msm/msm_vfe32.c
+++ b/drivers/media/video/msm/msm_vfe32.c
@@ -678,7 +678,7 @@
msm_io_w(VFE_IMASK_WHILE_STOPPING_1,
vfe32_ctrl->vfebase + VFE_IRQ_MASK_1);
- msm_io_dump(vfe32_ctrl->vfebase, 0x7B4);
+ msm_io_dump(vfe32_ctrl->vfebase, vfe32_ctrl->register_total * 4);
/* Ensure the write order while writing
to the command register using the barrier */
@@ -986,7 +986,6 @@
int i;
uint32_t value, value1, value2;
vfe32_program_dmi_cfg(channel_sel);
- /* for loop for extracting init table. */
for (i = 0 ; i < (VFE32_GAMMA_NUM_ENTRIES/2) ; i++) {
value = *tbl++;
value1 = value & 0x0000FFFF;
@@ -997,6 +996,20 @@
vfe32_program_dmi_cfg(NO_MEM_SELECTED);
}
+static void vfe32_read_gamma_cfg(enum VFE32_DMI_RAM_SEL channel_sel,
+ uint32_t *tbl)
+{
+ int i;
+ vfe32_program_dmi_cfg(channel_sel);
+ CDBG("%s: Gamma table channel: %d\n", __func__, channel_sel);
+ for (i = 0 ; i < VFE32_GAMMA_NUM_ENTRIES ; i++) {
+ *tbl = msm_io_r(vfe32_ctrl->vfebase + VFE_DMI_DATA_LO);
+ CDBG("%s: %08x\n", __func__, *tbl);
+ tbl++;
+ }
+ vfe32_program_dmi_cfg(NO_MEM_SELECTED);
+}
+
static void vfe32_write_la_cfg(enum VFE32_DMI_RAM_SEL channel_sel,
const uint32_t *tbl)
{
@@ -1004,7 +1017,6 @@
uint32_t value, value1, value2;
vfe32_program_dmi_cfg(channel_sel);
- /* for loop for extracting init table. */
for (i = 0 ; i < (VFE32_LA_TABLE_LENGTH/2) ; i++) {
value = *tbl++;
value1 = value & 0x0000FFFF;
@@ -1196,23 +1208,6 @@
}
rc = vfe32_capture(snapshot_cnt);
break;
- case VFE_CMD_GET_HW_VERSION:
- if (cmd->length != V32_GET_HW_VERSION_LEN) {
- rc = -EINVAL;
- goto proc_general_done;
- }
- cmdp = kmalloc(V32_GET_HW_VERSION_LEN, GFP_ATOMIC);
- if (!cmdp) {
- rc = -ENOMEM;
- goto proc_general_done;
- }
- *cmdp = msm_io_r(vfe32_ctrl->vfebase+V32_GET_HW_VERSION_OFF);
- if (copy_to_user((void __user *)(cmd->value), cmdp,
- V32_GET_HW_VERSION_LEN)) {
- rc = -EFAULT;
- goto proc_general_done;
- }
- break;
case VFE_CMD_START_RECORDING:
pr_info("vfe32_proc_general: cmdID = %s\n",
vfe32_general_cmd[cmd->id]);
@@ -1342,12 +1337,6 @@
rc = -EFAULT;
goto proc_general_done;
}
- /*
- old_val = msm_io_r(vfe32_ctrl->vfebase + VFE_MODULE_CFG);
- old_val |= RS_ENABLE_MASK;
- msm_io_w(old_val,
- vfe32_ctrl->vfebase + VFE_MODULE_CFG);
- */
msm_io_memcpy(vfe32_ctrl->vfebase + vfe32_cmd[cmd->id].offset,
cmdp, (vfe32_cmd[cmd->id].length));
}
@@ -1365,12 +1354,6 @@
rc = -EFAULT;
goto proc_general_done;
}
- /*
- old_val = msm_io_r(vfe32_ctrl->vfebase + VFE_MODULE_CFG);
- old_val |= CS_ENABLE_MASK;
- msm_io_w(old_val,
- vfe32_ctrl->vfebase + VFE_MODULE_CFG);
- */
msm_io_memcpy(vfe32_ctrl->vfebase + vfe32_cmd[cmd->id].offset,
cmdp, (vfe32_cmd[cmd->id].length));
}
@@ -1453,6 +1436,44 @@
}
break;
+ case VFE_CMD_GET_MESH_ROLLOFF_TABLE:
+ temp1 = sizeof(uint32_t) * ((V32_MESH_ROLL_OFF_INIT_TABLE_SIZE *
+ 2) + (V32_MESH_ROLL_OFF_DELTA_TABLE_SIZE * 2));
+ if (cmd->length != temp1) {
+ rc = -EINVAL;
+ goto proc_general_done;
+ }
+ cmdp = kzalloc(temp1, GFP_KERNEL);
+ if (!cmdp) {
+ rc = -ENOMEM;
+ goto proc_general_done;
+ }
+ cmdp_local = cmdp;
+ vfe32_program_dmi_cfg(ROLLOFF_RAM0_BANK0);
+ CDBG("%s: Mesh Rolloff init Table\n", __func__);
+ for (i = 0; i < (V32_MESH_ROLL_OFF_INIT_TABLE_SIZE * 2); i++) {
+ *cmdp_local =
+ msm_io_r(vfe32_ctrl->vfebase + VFE_DMI_DATA_LO);
+ CDBG("%s: %08x\n", __func__, *cmdp_local);
+ cmdp_local++;
+ }
+ msm_io_w(V32_MESH_ROLL_OFF_DELTA_TABLE_OFFSET,
+ vfe32_ctrl->vfebase + VFE_DMI_ADDR);
+ CDBG("%s: Mesh Rolloff Delta Table\n", __func__);
+ for (i = 0; i < (V32_MESH_ROLL_OFF_DELTA_TABLE_SIZE * 2); i++) {
+ *cmdp_local =
+ msm_io_r(vfe32_ctrl->vfebase + VFE_DMI_DATA_LO);
+ CDBG("%s: %08x\n", __func__, *cmdp_local);
+ cmdp_local++;
+ }
+ CDBG("done reading delta table\n");
+ vfe32_program_dmi_cfg(NO_MEM_SELECTED);
+ if (copy_to_user((void __user *)(cmd->value), cmdp,
+ temp1)) {
+ rc = -EFAULT;
+ goto proc_general_done;
+ }
+ break;
case VFE_CMD_LA_CFG:
cmdp = kmalloc(cmd->length, GFP_ATOMIC);
if (!cmdp) {
@@ -1500,6 +1521,36 @@
vfe32_ctrl->update_la = true;
break;
+ case VFE_CMD_GET_LA_TABLE:
+ temp1 = sizeof(uint32_t) * VFE32_LA_TABLE_LENGTH / 2;
+ if (cmd->length != temp1) {
+ rc = -EINVAL;
+ goto proc_general_done;
+ }
+ cmdp = kzalloc(temp1, GFP_KERNEL);
+ if (!cmdp) {
+ rc = -ENOMEM;
+ goto proc_general_done;
+ }
+ cmdp_local = cmdp;
+ if (msm_io_r(vfe32_ctrl->vfebase + V32_LA_OFF))
+ vfe32_program_dmi_cfg(LUMA_ADAPT_LUT_RAM_BANK1);
+ else
+ vfe32_program_dmi_cfg(LUMA_ADAPT_LUT_RAM_BANK0);
+ for (i = 0 ; i < (VFE32_LA_TABLE_LENGTH / 2) ; i++) {
+ *cmdp_local =
+ msm_io_r(vfe32_ctrl->vfebase + VFE_DMI_DATA_LO);
+ *cmdp_local |= (msm_io_r(vfe32_ctrl->vfebase +
+ VFE_DMI_DATA_LO)) << 16;
+ cmdp_local++;
+ }
+ vfe32_program_dmi_cfg(NO_MEM_SELECTED);
+ if (copy_to_user((void __user *)(cmd->value), cmdp,
+ temp1)) {
+ rc = -EFAULT;
+ goto proc_general_done;
+ }
+ break;
case VFE_CMD_SK_ENHAN_CFG:
case VFE_CMD_SK_ENHAN_UPDATE:{
cmdp = kmalloc(cmd->length, GFP_ATOMIC);
@@ -1542,7 +1593,7 @@
cmdp_local = cmdp + 17;
vfe32_write_linear_cfg(BLACK_LUT_RAM_BANK0, cmdp_local);
- break;
+ break;
case VFE_CMD_LINEARIZATION_UPDATE:
cmdp = kmalloc(cmd->length, GFP_ATOMIC);
@@ -1572,8 +1623,38 @@
else
vfe32_write_linear_cfg(BLACK_LUT_RAM_BANK1, cmdp_local);
vfe32_ctrl->update_linear = true;
- break;
+ break;
+ case VFE_CMD_GET_LINEARIZATON_TABLE:
+ temp1 = sizeof(uint32_t) * VFE32_LINEARIZATON_TABLE_LENGTH;
+ if (cmd->length != temp1) {
+ rc = -EINVAL;
+ goto proc_general_done;
+ }
+ cmdp = kzalloc(temp1, GFP_KERNEL);
+ if (!cmdp) {
+ rc = -ENOMEM;
+ goto proc_general_done;
+ }
+ cmdp_local = cmdp;
+ if (msm_io_r(vfe32_ctrl->vfebase + V32_LINEARIZATION_OFF1))
+ vfe32_program_dmi_cfg(BLACK_LUT_RAM_BANK1);
+ else
+ vfe32_program_dmi_cfg(BLACK_LUT_RAM_BANK0);
+ CDBG("%s: Linearization Table\n", __func__);
+ for (i = 0 ; i < VFE32_LINEARIZATON_TABLE_LENGTH ; i++) {
+ *cmdp_local =
+ msm_io_r(vfe32_ctrl->vfebase + VFE_DMI_DATA_LO);
+ CDBG("%s: %08x\n", __func__, *cmdp_local);
+ cmdp_local++;
+ }
+ vfe32_program_dmi_cfg(NO_MEM_SELECTED);
+ if (copy_to_user((void __user *)(cmd->value), cmdp,
+ temp1)) {
+ rc = -EFAULT;
+ goto proc_general_done;
+ }
+ break;
case VFE_CMD_DEMOSAICV3:
if (cmd->length !=
V32_DEMOSAICV3_0_LEN+V32_DEMOSAICV3_1_LEN) {
@@ -1755,6 +1836,34 @@
cmdp -= 1;
break;
+ case VFE_CMD_GET_RGB_G_TABLE:
+ temp1 = sizeof(uint32_t) * VFE32_GAMMA_NUM_ENTRIES * 3;
+ if (cmd->length != temp1) {
+ rc = -EINVAL;
+ goto proc_general_done;
+ }
+ cmdp = kzalloc(temp1, GFP_KERNEL);
+ if (!cmdp) {
+ rc = -ENOMEM;
+ goto proc_general_done;
+ }
+ cmdp_local = cmdp;
+
+ old_val = msm_io_r(vfe32_ctrl->vfebase + V32_RGB_G_OFF);
+ temp2 = old_val ? RGBLUT_RAM_CH0_BANK1 :
+ RGBLUT_RAM_CH0_BANK0;
+ for (i = 0; i < 3; i++) {
+ vfe32_read_gamma_cfg(temp2,
+ cmdp_local + (VFE32_GAMMA_NUM_ENTRIES * i));
+ temp2 += 2;
+ }
+ if (copy_to_user((void __user *)(cmd->value), cmdp,
+ temp1)) {
+ rc = -EFAULT;
+ goto proc_general_done;
+ }
+ break;
+
case VFE_CMD_STATS_AWB_STOP: {
old_val = msm_io_r(vfe32_ctrl->vfebase + VFE_MODULE_CFG);
old_val &= ~AWB_ENABLE_MASK;
@@ -1947,9 +2056,9 @@
CDBG("%s: start writing RollOff Ram0 table\n", __func__);
if (temp2)
- vfe32_program_dmi_cfg(ROLLOFF_RAM0_BANK0);
- else
vfe32_program_dmi_cfg(ROLLOFF_RAM0_BANK1);
+ else
+ vfe32_program_dmi_cfg(ROLLOFF_RAM0_BANK0);
msm_io_w(temp1, vfe32_ctrl->vfebase + VFE_DMI_ADDR);
for (i = 0 ; i < V33_PCA_ROLL_OFF_TABLE_SIZE ; i++) {
@@ -1963,9 +2072,9 @@
CDBG("%s: start writing RollOff Ram1 table\n", __func__);
if (temp2)
- vfe32_program_dmi_cfg(ROLLOFF_RAM1_BANK0);
- else
vfe32_program_dmi_cfg(ROLLOFF_RAM1_BANK1);
+ else
+ vfe32_program_dmi_cfg(ROLLOFF_RAM1_BANK0);
msm_io_w(temp1, vfe32_ctrl->vfebase + VFE_DMI_ADDR);
for (i = 0 ; i < V33_PCA_ROLL_OFF_TABLE_SIZE ; i++) {
@@ -1978,7 +2087,88 @@
vfe32_program_dmi_cfg(NO_MEM_SELECTED);
vfe32_ctrl->update_rolloff = true;
break;
+ case VFE_CMD_GET_PCA_ROLLOFF_TABLE:
+ temp1 = sizeof(uint64_t) * V33_PCA_ROLL_OFF_TABLE_SIZE * 2;
+ if (cmd->length != temp1) {
+ rc = -EINVAL;
+ goto proc_general_done;
+ }
+ cmdp = kzalloc(temp1, GFP_KERNEL);
+ if (!cmdp) {
+ rc = -ENOMEM;
+ goto proc_general_done;
+ }
+ cmdp_local = cmdp;
+ old_val = msm_io_r(vfe32_ctrl->vfebase +
+ V33_PCA_ROLL_OFF_CFG_OFF1) &
+ V33_PCA_ROLL_OFF_LUT_BANK_SEL_MASK;
+ if (old_val)
+ vfe32_program_dmi_cfg(ROLLOFF_RAM0_BANK1);
+ else
+ vfe32_program_dmi_cfg(ROLLOFF_RAM0_BANK0);
+
+ CDBG("%s: PCA Rolloff Ram0\n", __func__);
+ for (i = 0 ; i < V33_PCA_ROLL_OFF_TABLE_SIZE * 2; i++) {
+ temp2 = (i == (V33_PCA_ROLL_OFF_TABLE_SIZE - 1));
+ if (old_val && temp2)
+ vfe32_program_dmi_cfg(ROLLOFF_RAM1_BANK1);
+ else if (!old_val && temp2)
+ vfe32_program_dmi_cfg(ROLLOFF_RAM1_BANK0);
+
+ *(cmdp_local + 1) =
+ msm_io_r(vfe32_ctrl->vfebase +
+ VFE33_DMI_DATA_HI);
+ *cmdp_local = msm_io_r(vfe32_ctrl->vfebase +
+ VFE33_DMI_DATA_LO);
+ CDBG("%s: %08x%08x\n", __func__,
+ *(cmdp_local + 1), *cmdp_local);
+ cmdp_local += 2;
+ }
+ vfe32_program_dmi_cfg(NO_MEM_SELECTED);
+ if (copy_to_user((void __user *)(cmd->value), cmdp,
+ temp1)) {
+ rc = -EFAULT;
+ goto proc_general_done;
+ }
+ break;
+ case VFE_CMD_GET_HW_VERSION:
+ if (cmd->length != V32_GET_HW_VERSION_LEN) {
+ rc = -EINVAL;
+ goto proc_general_done;
+ }
+ cmdp = kmalloc(V32_GET_HW_VERSION_LEN, GFP_ATOMIC);
+ if (!cmdp) {
+ rc = -ENOMEM;
+ goto proc_general_done;
+ }
+ *cmdp = msm_io_r(vfe32_ctrl->vfebase+V32_GET_HW_VERSION_OFF);
+ if (copy_to_user((void __user *)(cmd->value), cmdp,
+ V32_GET_HW_VERSION_LEN)) {
+ rc = -EFAULT;
+ goto proc_general_done;
+ }
+ break;
+ case VFE_CMD_GET_REG_DUMP:
+ temp1 = sizeof(uint32_t) * vfe32_ctrl->register_total;
+ if (cmd->length != temp1) {
+ rc = -EINVAL;
+ goto proc_general_done;
+ }
+ cmdp = kmalloc(temp1, GFP_ATOMIC);
+ if (!cmdp) {
+ rc = -ENOMEM;
+ goto proc_general_done;
+ }
+ msm_io_dump(vfe32_ctrl->vfebase, vfe32_ctrl->register_total*4);
+ CDBG("%s: %p %p %d\n", __func__, (void *)cmdp,
+ vfe32_ctrl->vfebase, temp1);
+ memcpy_fromio((void *)cmdp, vfe32_ctrl->vfebase, temp1);
+ if (copy_to_user((void __user *)(cmd->value), cmdp, temp1)) {
+ rc = -EFAULT;
+ goto proc_general_done;
+ }
+ break;
default:
if (cmd->length != vfe32_cmd[cmd->id].length)
return -EINVAL;
@@ -3371,6 +3561,12 @@
msm_camio_set_perf_lvl(S_INIT);
msm_camio_set_perf_lvl(S_PREVIEW);
+ if (msm_io_r(vfe32_ctrl->vfebase + V32_GET_HW_VERSION_OFF) ==
+ VFE32_HW_NUMBER)
+ vfe32_ctrl->register_total = VFE32_REGISTER_TOTAL;
+ else
+ vfe32_ctrl->register_total = VFE33_REGISTER_TOTAL;
+
/* TO DO: Need to release the VFE resources */
rc = request_irq(vfe32_ctrl->vfeirq, vfe32_parse_irq,
IRQF_TRIGGER_RISING, "vfe", 0);
diff --git a/drivers/media/video/msm/msm_vfe32.h b/drivers/media/video/msm/msm_vfe32.h
index d763c2e..30b77d7 100644
--- a/drivers/media/video/msm/msm_vfe32.h
+++ b/drivers/media/video/msm/msm_vfe32.h
@@ -16,6 +16,15 @@
#define TRUE 1
#define FALSE 0
+#define VFE32_HW_NUMBER 0x3030B
+#define VFE33_HW_NUMBER 0x30408
+
+/* This defines total number registers in VFE.
+ * Each register is 4 bytes so to get the range,
+ * multiply this number with 4. */
+#define VFE32_REGISTER_TOTAL 0x000001CD
+#define VFE33_REGISTER_TOTAL 0x000001EE
+
/* at start of camif, bit 1:0 = 0x01:enable
* image data capture at frame boundary. */
#define CAMIF_COMMAND_START 0x00000005
@@ -903,6 +912,7 @@
int vfeirq;
void __iomem *vfebase;
void *syncdata;
+ uint32_t register_total;
struct resource *vfemem;
struct resource *vfeio;
diff --git a/drivers/media/video/msm/msm_vfe7x27a.c b/drivers/media/video/msm/msm_vfe7x27a.c
index c8bfacc..9f7dff7 100644
--- a/drivers/media/video/msm/msm_vfe7x27a.c
+++ b/drivers/media/video/msm/msm_vfe7x27a.c
@@ -287,8 +287,7 @@
kfree(extdata);
extlen = 0;
- /* set back the AXI frequency to default */
- /* TODO msm_camio_set_perf_lvl(S_DEFAULT); */
+ msm_camio_set_perf_lvl(S_EXIT);
}
static int vfe_7x_init(struct msm_vfe_callback *presp,
diff --git a/drivers/media/video/msm/ov5640.c b/drivers/media/video/msm/ov5640.c
new file mode 100644
index 0000000..1380bcf
--- /dev/null
+++ b/drivers/media/video/msm/ov5640.c
@@ -0,0 +1,1477 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* #define DEBUG */
+
+#include <linux/delay.h>
+#include <linux/types.h>
+#include <linux/i2c.h>
+#include <linux/uaccess.h>
+#include <linux/miscdevice.h>
+#include <linux/leds.h>
+#include <linux/slab.h>
+#include <media/msm_camera.h>
+#include <mach/gpio.h>
+#include <mach/camera.h>
+#include "ov5640.h"
+
+#define FALSE 0
+#define TRUE 1
+
+struct ov5640_work {
+ struct work_struct work;
+};
+
+struct __ov5640_ctrl {
+ const struct msm_camera_sensor_info *sensordata;
+ int sensormode;
+ uint fps_divider; /* init to 1 * 0x00000400 */
+ uint pict_fps_divider; /* init to 1 * 0x00000400 */
+ u16 curr_step_pos;
+ u16 curr_lens_pos;
+ u16 init_curr_lens_pos;
+ u16 my_reg_gain;
+ u16 my_reg_line_count;
+ enum msm_s_resolution prev_res;
+ enum msm_s_resolution pict_res;
+ enum msm_s_resolution curr_res;
+ enum msm_s_test_mode set_test;
+};
+
+static DECLARE_WAIT_QUEUE_HEAD(ov5640_wait_queue);
+DEFINE_MUTEX(ov5640_mutex);
+
+static int ov5640_pwdn_gpio;
+static int ov5640_reset_gpio;
+static int ov5640_driver_pwdn_gpio;
+static int OV5640_CSI_CONFIG;
+static struct ov5640_work *ov5640_sensorw;
+static struct i2c_client *ov5640_client;
+static u8 ov5640_i2c_buf[4];
+static u8 ov5640_counter;
+static int16_t ov5640_effect;
+static int is_autoflash;
+static int effect_value;
+unsigned int ov5640_SAT_U = 0x40;
+unsigned int ov5640_SAT_V = 0x40;
+
+static struct __ov5640_ctrl *ov5640_ctrl;
+static int ov5640_afinit = 1;
+
+struct rw_semaphore ov_leds_list_lock;
+struct list_head ov_leds_list;
+
+static int ov5640_i2c_remove(struct i2c_client *client);
+static int ov5640_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+
+static int ov5640_i2c_txdata(u16 saddr, u8 *txdata, int length)
+{
+ struct i2c_msg msg[] = {
+ {
+ .addr = saddr,
+ .flags = 0,
+ .len = length,
+ .buf = txdata,
+ },
+ };
+
+ if (i2c_transfer(ov5640_client->adapter, msg, 1) < 0)
+ return -EIO;
+ else
+ return 0;
+}
+
+static int ov5640_i2c_write(unsigned short saddr, unsigned int waddr,
+ unsigned short bdata, u8 trytimes)
+{
+ int rc = -EIO;
+
+ ov5640_counter = 0;
+ ov5640_i2c_buf[0] = (waddr & 0xFF00) >> 8;
+ ov5640_i2c_buf[1] = (waddr & 0x00FF);
+ ov5640_i2c_buf[2] = (bdata & 0x00FF);
+
+ while ((ov5640_counter < trytimes) && (rc != 0)) {
+ rc = ov5640_i2c_txdata(saddr, ov5640_i2c_buf, 3);
+
+ if (rc < 0) {
+ ov5640_counter++;
+ CDBG("***--CAMERA i2c_write_w failed,i2c addr=0x%x,"
+ "command addr = 0x%x, val = 0x%x,s=%d,"
+ "rc=%d!\n", saddr, waddr, bdata,
+ ov5640_counter, rc);
+ msleep(20);
+ }
+ }
+ return rc;
+}
+
+static int ov5640_i2c_rxdata(unsigned short saddr, unsigned char *rxdata,
+ int length)
+{
+ struct i2c_msg msgs[] = {
+ {
+ .addr = saddr,
+ .flags = 0,
+ .len = 2,
+ .buf = rxdata,
+ },
+ {
+ .addr = saddr,
+ .flags = I2C_M_RD,
+ .len = length,
+ .buf = rxdata,
+ },
+ };
+
+ if (i2c_transfer(ov5640_client->adapter, msgs, 2) < 0) {
+ CDBG("ov5640_i2c_rxdata failed!\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int32_t ov5640_i2c_read_byte(unsigned short saddr,
+ unsigned int raddr, unsigned int *rdata)
+{
+ int rc = 0;
+ unsigned char buf[2];
+
+ memset(buf, 0, sizeof(buf));
+
+ buf[0] = (raddr & 0xFF00)>>8;
+ buf[1] = (raddr & 0x00FF);
+
+ rc = ov5640_i2c_rxdata(saddr, buf, 1);
+ if (rc < 0) {
+ CDBG("ov5640_i2c_read_byte failed!\n");
+ return rc;
+ }
+
+ *rdata = buf[0];
+
+ return rc;
+}
+
+static int32_t ov5640_writepregs(struct ov5640_sensor *ptb, int32_t len)
+{
+ int32_t i, ret = 0;
+ uint32_t regv;
+
+ for (i = 0; i < len; i++) {
+ if (0 == ptb[i].mask) {
+ ov5640_i2c_write(ov5640_client->addr, ptb[i].addr,
+ ptb[i].data, 10);
+ } else {
+ ov5640_i2c_read_byte(ov5640_client->addr, ptb[i].addr,
+ ®v);
+ regv &= ptb[i].mask;
+ regv |= (ptb[i].data & (~ptb[i].mask));
+ ov5640_i2c_write(ov5640_client->addr, ptb[i].addr,
+ regv, 10);
+ }
+ }
+ return ret;
+}
+
+static void camera_sw_power_onoff(int v)
+{
+ if (v == 0) {
+ CDBG("camera_sw_power_onoff: down\n");
+ ov5640_i2c_write(ov5640_client->addr, 0x3008, 0x42, 10);
+ } else {
+ CDBG("camera_sw_power_onoff: on\n");
+ ov5640_i2c_write(ov5640_client->addr, 0x3008, 0x02, 10);
+ }
+}
+
+static void ov5640_power_off(void)
+{
+ CDBG("--CAMERA-- %s ... (Start...)\n", __func__);
+ gpio_set_value(ov5640_pwdn_gpio, 1);
+ CDBG("--CAMERA-- %s ... (End...)\n", __func__);
+}
+
+static void ov5640_power_on(void)
+{
+ CDBG("--CAMERA-- %s ... (Start...)\n", __func__);
+ gpio_set_value(ov5640_pwdn_gpio, 0);
+ CDBG("--CAMERA-- %s ... (End...)\n", __func__);
+}
+
+static void ov5640_power_reset(void)
+{
+ CDBG("--CAMERA-- %s ... (Start...)\n", __func__);
+ gpio_set_value(ov5640_reset_gpio, 1); /* reset camera reset pin */
+ msleep(20);
+ gpio_set_value(ov5640_reset_gpio, 0);
+ msleep(20);
+ gpio_set_value(ov5640_reset_gpio, 1);
+ msleep(20);
+
+ CDBG("--CAMERA-- %s ... (End...)\n", __func__);
+}
+
+static int ov5640_probe_readID(const struct msm_camera_sensor_info *data)
+{
+ int rc = 0;
+ u32 device_id_high = 0;
+ u32 device_id_low = 0;
+
+ CDBG("--CAMERA-- %s (Start...)\n", __func__);
+ CDBG("--CAMERA-- %s sensor poweron,begin to read ID!\n", __func__);
+
+ /* 0x300A ,sensor ID register */
+ rc = ov5640_i2c_read_byte(ov5640_client->addr, 0x300A,
+ &device_id_high);
+
+ if (rc < 0) {
+ CDBG("--CAMERA-- %s ok , readI2C failed, rc = 0x%x\r\n",
+ __func__, rc);
+ return rc;
+ }
+ CDBG("--CAMERA-- %s readID high byte, data = 0x%x\r\n",
+ __func__, device_id_high);
+
+ /* 0x300B ,sensor ID register */
+ rc = ov5640_i2c_read_byte(ov5640_client->addr, 0x300B,
+ &device_id_low);
+ if (rc < 0) {
+ CDBG("--CAMERA-- %s ok , readI2C failed,rc = 0x%x\r\n",
+ __func__, rc);
+ return rc;
+ }
+
+ CDBG("--CAMERA-- %s readID low byte, data = 0x%x\r\n",
+ __func__, device_id_low);
+ CDBG("--CAMERA-- %s return ID :0x%x\n", __func__,
+ (device_id_high << 8) + device_id_low);
+
+ /* 0x5640, ov5640 chip id */
+ if ((device_id_high << 8) + device_id_low != OV5640_SENSOR_ID) {
+ CDBG("--CAMERA-- %s ok , device id error, should be 0x%x\r\n",
+ __func__, OV5640_SENSOR_ID);
+ return -EINVAL;
+ } else {
+ CDBG("--CAMERA-- %s ok , device id=0x%x\n", __func__,
+ OV5640_SENSOR_ID);
+ return 0;
+ }
+}
+
+static int ov5640_af_setting(void)
+{
+ int rc = 0;
+ int lens = sizeof(ov5640_afinit_tbl) / sizeof(ov5640_afinit_tbl[0]);
+
+ CDBG("--CAMERA-- ov5640_af_setting\n");
+
+ ov5640_i2c_write(ov5640_client->addr, 0x3000, 0x20, 10);
+
+ rc = ov5640_i2c_txdata(ov5640_client->addr, ov5640_afinit_tbl, lens);
+ if (rc < 0) {
+ CDBG("--CAMERA-- AF_init failed\n");
+ return rc;
+ }
+
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_MAIN, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_ACK, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_PARA0, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_PARA1, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_PARA2, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_PARA3, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_PARA4, 0x00, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_FW_STATUS, 0x7f, 10);
+ ov5640_i2c_write(ov5640_client->addr, 0x3000, 0x00, 10);
+
+ return rc;
+}
+
+static int ov5640_set_flash_light(enum led_brightness brightness)
+{
+ struct led_classdev *led_cdev;
+
+ CDBG("ov5640_set_flash_light brightness = %d\n", brightness);
+
+ down_read(&ov_leds_list_lock);
+ list_for_each_entry(led_cdev, &ov_leds_list, node) {
+ if (!strncmp(led_cdev->name, "flashlight", 10))
+ break;
+ }
+ up_read(&ov_leds_list_lock);
+
+ if (led_cdev) {
+ led_brightness_set(led_cdev, brightness);
+ } else {
+ CDBG("get flashlight device failed\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int ov5640_video_config(void)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- ov5640_video_config\n");
+ CDBG("--CAMERA-- preview in, is_autoflash - 0x%x\n", is_autoflash);
+
+ /* autoflash setting */
+ if (is_autoflash == 1)
+ ov5640_set_flash_light(LED_OFF);
+
+ /* preview setting */
+ rc = OV5640CORE_WRITEPREG(ov5640_preview_tbl);
+ return rc;
+}
+
+static int ov5640_snapshot_config(void)
+{
+ int rc = 0;
+ unsigned int tmp;
+
+ CDBG("--CAMERA-- SENSOR_SNAPSHOT_MODE\n");
+ CDBG("--CAMERA-- %s, snapshot in, is_autoflash - 0x%x\n", __func__,
+ is_autoflash);
+
+ if (is_autoflash == 1) {
+ ov5640_i2c_read_byte(ov5640_client->addr, 0x350b, &tmp);
+ CDBG("--CAMERA-- GAIN VALUE : %x\n", tmp);
+ if ((tmp & 0x80) == 0)
+ ov5640_set_flash_light(LED_OFF);
+ else
+ ov5640_set_flash_light(LED_FULL);
+ }
+
+ rc = OV5640CORE_WRITEPREG(ov5640_capture_tbl);
+
+ return rc;
+}
+
+static int ov5640_setting(enum msm_s_reg_update rupdate,
+ enum msm_s_setting rt)
+{
+ int rc = -EINVAL, tmp;
+ struct msm_camera_csi_params ov5640_csi_params;
+
+ CDBG("--CAMERA-- %s (Start...), rupdate=%d\n", __func__, rupdate);
+
+ switch (rupdate) {
+ case S_UPDATE_PERIODIC:
+ if (!OV5640_CSI_CONFIG) {
+ camera_sw_power_onoff(0); /* standby */
+ msleep(20);
+
+ ov5640_csi_params.lane_cnt = 2;
+ ov5640_csi_params.data_format = CSI_8BIT;
+ ov5640_csi_params.lane_assign = 0xe4;
+ ov5640_csi_params.dpcm_scheme = 0;
+ ov5640_csi_params.settle_cnt = 0x6;
+
+ CDBG("%s: msm_camio_csi_config\n", __func__);
+
+ rc = msm_camio_csi_config(&ov5640_csi_params);
+ msleep(20);
+ camera_sw_power_onoff(1); /* on */
+ msleep(20);
+
+ OV5640_CSI_CONFIG = 1;
+
+ } else {
+ rc = 0;
+ }
+
+ if (S_RES_PREVIEW == rt)
+ rc = ov5640_video_config();
+ else if (S_RES_CAPTURE == rt)
+ rc = ov5640_snapshot_config();
+
+ break; /* UPDATE_PERIODIC */
+
+ case S_REG_INIT:
+ CDBG("--CAMERA-- S_REG_INIT (Start)\n");
+
+ rc = ov5640_i2c_write(ov5640_client->addr, 0x3103, 0x11, 10);
+ rc = ov5640_i2c_write(ov5640_client->addr, 0x3008, 0x82, 10);
+ msleep(20);
+
+ /* set sensor init setting */
+ CDBG("set sensor init setting\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_init_tbl);
+ if (rc < 0) {
+ CDBG("sensor init setting failed\n");
+ break;
+ }
+
+ /* set image quality setting */
+ rc = OV5640CORE_WRITEPREG(ov5640_init_iq_tbl);
+ rc = ov5640_i2c_read_byte(ov5640_client->addr, 0x4740, &tmp);
+ CDBG("--CAMERA-- init 0x4740 value=0x%x\n", tmp);
+
+ if (tmp != 0x21) {
+ rc = ov5640_i2c_write(ov5640_client->addr, 0x4740,
+ 0x21, 10);
+ msleep(20);
+ rc = ov5640_i2c_read_byte(ov5640_client->addr,
+ 0x4740, &tmp);
+ CDBG("--CAMERA-- WG 0x4740 value=0x%x\n", tmp);
+ }
+
+ CDBG("--CAMERA-- AF_init: ov5640_afinit = %d\n",
+ ov5640_afinit);
+ if (ov5640_afinit == 1) {
+ rc = ov5640_af_setting();
+ if (rc < 0) {
+ CDBG("--CAMERA-- ov5640_af_setting failed\n");
+ break;
+ }
+ ov5640_afinit = 0;
+ }
+
+ /* reset fps_divider */
+ ov5640_ctrl->fps_divider = 1 * 0x0400;
+ CDBG("--CAMERA-- S_REG_INIT (End)\n");
+ break; /* case REG_INIT: */
+
+ default:
+ break;
+ } /* switch (rupdate) */
+
+ CDBG("--CAMERA-- %s (End), rupdate=%d\n", __func__, rupdate);
+
+ return rc;
+}
+
+static int ov5640_sensor_open_init(const struct msm_camera_sensor_info *data)
+{
+ int rc = -ENOMEM;
+
+ CDBG("--CAMERA-- %s\n", __func__);
+ ov5640_ctrl = kzalloc(sizeof(struct __ov5640_ctrl), GFP_KERNEL);
+ if (!ov5640_ctrl) {
+ CDBG("--CAMERA-- kzalloc ov5640_ctrl error !!\n");
+ kfree(ov5640_ctrl);
+ return rc;
+ }
+
+ ov5640_ctrl->fps_divider = 1 * 0x00000400;
+ ov5640_ctrl->pict_fps_divider = 1 * 0x00000400;
+ ov5640_ctrl->set_test = S_TEST_OFF;
+ ov5640_ctrl->prev_res = S_QTR_SIZE;
+ ov5640_ctrl->pict_res = S_FULL_SIZE;
+
+ if (data)
+ ov5640_ctrl->sensordata = data;
+
+ ov5640_power_off();
+
+ CDBG("%s: msm_camio_clk_rate_set\n", __func__);
+
+ msm_camio_clk_rate_set(24000000);
+ msleep(20);
+
+ ov5640_power_on();
+ ov5640_power_reset();
+
+ CDBG("%s: init sequence\n", __func__);
+
+ if (ov5640_ctrl->prev_res == S_QTR_SIZE)
+ rc = ov5640_setting(S_REG_INIT, S_RES_PREVIEW);
+ else
+ rc = ov5640_setting(S_REG_INIT, S_RES_CAPTURE);
+
+ if (rc < 0) {
+ CDBG("--CAMERA-- %s : ov5640_setting failed. rc = %d\n",
+ __func__, rc);
+ kfree(ov5640_ctrl);
+ return rc;
+ }
+
+ OV5640_CSI_CONFIG = 0;
+
+ CDBG("--CAMERA--re_init_sensor ok!!\n");
+ return rc;
+}
+
+static int ov5640_sensor_release(void)
+{
+ CDBG("--CAMERA--ov5640_sensor_release!!\n");
+
+ mutex_lock(&ov5640_mutex);
+
+ ov5640_power_off();
+
+ kfree(ov5640_ctrl);
+ ov5640_ctrl = NULL;
+
+ OV5640_CSI_CONFIG = 0;
+
+ mutex_unlock(&ov5640_mutex);
+ return 0;
+}
+
+static const struct i2c_device_id ov5640_i2c_id[] = {
+ {"ov5640", 0}, {}
+};
+
+static int ov5640_i2c_remove(struct i2c_client *client)
+{
+ return 0;
+}
+
+static int ov5640_init_client(struct i2c_client *client)
+{
+ /* Initialize the MSM_CAMI2C Chip */
+ init_waitqueue_head(&ov5640_wait_queue);
+ return 0;
+}
+
+static long ov5640_set_effect(int mode, int effect)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+
+ switch (mode) {
+ case SENSOR_PREVIEW_MODE:
+ /* Context A Special Effects */
+ CDBG("--CAMERA-- %s ...SENSOR_PREVIEW_MODE\n", __func__);
+ break;
+
+ case SENSOR_SNAPSHOT_MODE:
+ /* Context B Special Effects */
+ CDBG("--CAMERA-- %s ...SENSOR_SNAPSHOT_MODE\n", __func__);
+ break;
+
+ default:
+ break;
+ }
+
+ effect_value = effect;
+
+ switch (effect) {
+ case CAMERA_EFFECT_OFF:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_OFF\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_normal_tbl);
+ /* for recover saturation level when change special effect */
+ ov5640_i2c_write(ov5640_client->addr, 0x5583, ov5640_SAT_U,
+ 10);
+ /* for recover saturation level when change special effect */
+ ov5640_i2c_write(ov5640_client->addr, 0x5584, ov5640_SAT_V,
+ 10);
+ break;
+
+ case CAMERA_EFFECT_MONO:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_MONO\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_mono_tbl);
+ break;
+
+ case CAMERA_EFFECT_BW:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_BW\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_bw_tbl);
+ break;
+
+ case CAMERA_EFFECT_BLUISH:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_BLUISH\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_bluish_tbl);
+ break;
+
+ case CAMERA_EFFECT_SOLARIZE:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_NEGATIVE\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_solarize_tbl);
+ break;
+
+ case CAMERA_EFFECT_SEPIA:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_SEPIA\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_sepia_tbl);
+ break;
+
+ case CAMERA_EFFECT_REDDISH:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_REDDISH\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_reddish_tbl);
+ break;
+
+ case CAMERA_EFFECT_GREENISH:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_GREENISH\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_greenish_tbl);
+ break;
+
+ case CAMERA_EFFECT_NEGATIVE:
+ CDBG("--CAMERA-- %s ...CAMERA_EFFECT_NEGATIVE\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_effect_negative_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA-- %s ...Default(Not Support)\n", __func__);
+ }
+
+ ov5640_effect = effect;
+ /* Refresh Sequencer */
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static int ov5640_set_brightness(int8_t brightness)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+ CDBG("--CAMERA-- %s ...brightness = %d\n", __func__ , brightness);
+
+ switch (brightness) {
+ case CAMERA_BRIGHTNESS_LV0:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV0\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv0_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV1:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV1\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv1_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV2:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV2\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv2_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV3:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV3\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv3_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV4:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV4\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_default_lv4_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV5:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV5\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv5_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV6:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV6\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv6_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV7:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV7\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv7_tbl);
+ break;
+
+ case CAMERA_BRIGHTNESS_LV8:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_LV8\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_brightness_lv8_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA--CAMERA_BRIGHTNESS_ERROR COMMAND\n");
+ break;
+ }
+
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static int ov5640_set_contrast(int contrast)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+ CDBG("--CAMERA-- %s ...contrast = %d\n", __func__ , contrast);
+
+ if (effect_value == CAMERA_EFFECT_OFF) {
+ switch (contrast) {
+ case CAMERA_CONTRAST_LV0:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV0\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv0_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV1:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV1\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv1_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV2:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV2\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv2_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV3:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV3\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv3_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV4:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV4\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_contrast_default_lv4_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV5:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV5\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv5_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV6:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV6\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv6_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV7:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV7\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv7_tbl);
+ break;
+
+ case CAMERA_CONTRAST_LV8:
+ CDBG("--CAMERA--CAMERA_CONTRAST_LV8\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_contrast_lv8_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA--CAMERA_CONTRAST_ERROR COMMAND\n");
+ break;
+ }
+ }
+
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static int ov5640_set_sharpness(int sharpness)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+ CDBG("--CAMERA-- %s ...sharpness = %d\n", __func__ , sharpness);
+
+ if (effect_value == CAMERA_EFFECT_OFF) {
+ switch (sharpness) {
+ case CAMERA_SHARPNESS_LV0:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV0\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv0_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV1:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV1\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv1_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV2:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV2\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_sharpness_default_lv2_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV3:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV3\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv3_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV4:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV4\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv4_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV5:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV5\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv5_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV6:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV6\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv6_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV7:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV7\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv7_tbl);
+ break;
+
+ case CAMERA_SHARPNESS_LV8:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_LV8\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_sharpness_lv8_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA--CAMERA_SHARPNESS_ERROR COMMAND\n");
+ break;
+ }
+ }
+
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static int ov5640_set_saturation(int saturation)
+{
+ long rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+ CDBG("--CAMERA-- %s ...saturation = %d\n", __func__ , saturation);
+
+ if (effect_value == CAMERA_EFFECT_OFF) {
+ switch (saturation) {
+ case CAMERA_SATURATION_LV0:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV0\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv0_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV1:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV1\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv1_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV2:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV2\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv2_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV3:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV3\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv3_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV4:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV4\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_saturation_default_lv4_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV5:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV5\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv5_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV6:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV6\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv6_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV7:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV7\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv7_tbl);
+ break;
+
+ case CAMERA_SATURATION_LV8:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV8\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_saturation_lv8_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA--CAMERA_SATURATION_ERROR COMMAND\n");
+ break;
+ }
+ }
+
+ /* for recover saturation level when change special effect */
+ switch (saturation) {
+ case CAMERA_SATURATION_LV0:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV0\n");
+ ov5640_SAT_U = 0x00;
+ ov5640_SAT_V = 0x00;
+ break;
+ case CAMERA_SATURATION_LV1:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV1\n");
+ ov5640_SAT_U = 0x10;
+ ov5640_SAT_V = 0x10;
+ break;
+ case CAMERA_SATURATION_LV2:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV2\n");
+ ov5640_SAT_U = 0x20;
+ ov5640_SAT_V = 0x20;
+ break;
+ case CAMERA_SATURATION_LV3:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV3\n");
+ ov5640_SAT_U = 0x30;
+ ov5640_SAT_V = 0x30;
+ break;
+ case CAMERA_SATURATION_LV4:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV4\n");
+ ov5640_SAT_U = 0x40;
+ ov5640_SAT_V = 0x40; break;
+ case CAMERA_SATURATION_LV5:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV5\n");
+ ov5640_SAT_U = 0x50;
+ ov5640_SAT_V = 0x50; break;
+ case CAMERA_SATURATION_LV6:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV6\n");
+ ov5640_SAT_U = 0x60;
+ ov5640_SAT_V = 0x60;
+ break;
+ case CAMERA_SATURATION_LV7:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV7\n");
+ ov5640_SAT_U = 0x70;
+ ov5640_SAT_V = 0x70; break;
+ case CAMERA_SATURATION_LV8:
+ CDBG("--CAMERA--CAMERA_SATURATION_LV8\n");
+ ov5640_SAT_U = 0x80;
+ ov5640_SAT_V = 0x80;
+ break;
+ default:
+ CDBG("--CAMERA--CAMERA_SATURATION_ERROR COMMAND\n");
+ break;
+ }
+
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static long ov5640_set_antibanding(int antibanding)
+{
+ long rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+ CDBG("--CAMERA-- %s ...antibanding = %d\n", __func__, antibanding);
+
+ switch (antibanding) {
+ case CAMERA_ANTIBANDING_OFF:
+ CDBG("--CAMERA--CAMERA_ANTIBANDING_OFF\n");
+ break;
+
+ case CAMERA_ANTIBANDING_60HZ:
+ CDBG("--CAMERA--CAMERA_ANTIBANDING_60HZ\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_antibanding_60z_tbl);
+ break;
+
+ case CAMERA_ANTIBANDING_50HZ:
+ CDBG("--CAMERA--CAMERA_ANTIBANDING_50HZ\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_antibanding_50z_tbl);
+ break;
+
+ case CAMERA_ANTIBANDING_AUTO:
+ CDBG("--CAMERA--CAMERA_ANTIBANDING_AUTO\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_antibanding_auto_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA--CAMERA_ANTIBANDING_ERROR COMMAND\n");
+ break;
+ }
+
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static long ov5640_set_exposure_mode(int mode)
+{
+ long rc = 0;
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+ CDBG("--CAMERA-- %s ...mode = %d\n", __func__ , mode);
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+ return rc;
+}
+
+static int32_t ov5640_lens_shading_enable(uint8_t is_enable)
+{
+ int32_t rc = 0;
+ CDBG("--CAMERA--%s: ...(Start). enable = %d\n", __func__, is_enable);
+
+ if (is_enable) {
+ CDBG("%s: enable~!!\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_lens_shading_on_tbl);
+ } else {
+ CDBG("%s: disable~!!\n", __func__);
+ rc = OV5640CORE_WRITEPREG(ov5640_lens_shading_off_tbl);
+ }
+ CDBG("--CAMERA--%s: ...(End). rc = %d\n", __func__, rc);
+ return rc;
+}
+
+static int ov5640_set_sensor_mode(int mode, int res)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- ov5640_set_sensor_mode mode = %d, res = %d\n",
+ mode, res);
+
+ switch (mode) {
+ case SENSOR_PREVIEW_MODE:
+ CDBG("--CAMERA-- SENSOR_PREVIEW_MODE\n");
+ rc = ov5640_setting(S_UPDATE_PERIODIC, S_RES_PREVIEW);
+ break;
+
+ case SENSOR_SNAPSHOT_MODE:
+ CDBG("--CAMERA-- SENSOR_SNAPSHOT_MODE\n");
+ rc = ov5640_setting(S_UPDATE_PERIODIC, S_RES_CAPTURE);
+ break;
+
+ case SENSOR_RAW_SNAPSHOT_MODE:
+ CDBG("--CAMERA-- SENSOR_RAW_SNAPSHOT_MODE\n");
+ rc = ov5640_setting(S_UPDATE_PERIODIC, S_RES_CAPTURE);
+ break;
+
+ default:
+ CDBG("--CAMERA--ov5640_set_sensor_mode no support\n");
+ rc = -EINVAL;
+ break;
+ }
+
+ return rc;
+}
+
+static int ov5640_set_wb_oem(uint8_t param)
+{
+ int rc = 0;
+ unsigned int tmp2;
+
+ CDBG("[kylin] %s \r\n", __func__);
+
+ ov5640_i2c_read_byte(ov5640_client->addr, 0x350b, &tmp2);
+ CDBG("--CAMERA-- GAIN VALUE : %x\n", tmp2);
+
+ switch (param) {
+ case CAMERA_WB_AUTO:
+
+ CDBG("--CAMERA--CAMERA_WB_AUTO\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_wb_def);
+ break;
+
+ case CAMERA_WB_CUSTOM:
+ CDBG("--CAMERA--CAMERA_WB_CUSTOM\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_wb_custom);
+ break;
+ case CAMERA_WB_INCANDESCENT:
+ CDBG("--CAMERA--CAMERA_WB_INCANDESCENT\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_wb_inc);
+ break;
+ case CAMERA_WB_DAYLIGHT:
+ CDBG("--CAMERA--CAMERA_WB_DAYLIGHT\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_wb_daylight);
+ break;
+ case CAMERA_WB_CLOUDY_DAYLIGHT:
+ CDBG("--CAMERA--CAMERA_WB_CLOUDY_DAYLIGHT\n");
+ rc = OV5640CORE_WRITEPREG(ov5640_wb_cloudy);
+ break;
+ default:
+ break;
+ }
+ return rc;
+}
+
+static int ov5640_set_touchaec(uint32_t x, uint32_t y)
+{
+ uint8_t aec_arr[8] = {0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11};
+ int idx = 0;
+ int i;
+
+ CDBG("[kylin] %s x: %d ,y: %d\r\n", __func__ , x, y);
+ idx = x / 2 + y * 2;
+ CDBG("[kylin] idx: %d\r\n", idx);
+
+ if (x % 2 == 0)
+ aec_arr[idx] = 0x10 | 0x0a;
+ else
+ aec_arr[idx] = 0x01 | 0xa0;
+
+ for (i = 0; i < 8; i++) {
+ CDBG("write : %x val : %x ", 0x5688 + i, aec_arr[i]);
+ ov5640_i2c_write(ov5640_client->addr, 0x5688 + i,
+ aec_arr[i], 10);
+ }
+
+ return 1;
+}
+
+static int ov5640_set_exposure_compensation(int compensation)
+{
+ long rc = 0;
+
+ CDBG("--CAMERA-- %s ...(Start)\n", __func__);
+
+ CDBG("--CAMERA-- %s ...exposure_compensation = %d\n", __func__ ,
+ compensation);
+
+ switch (compensation) {
+ case CAMERA_EXPOSURE_COMPENSATION_LV0:
+ CDBG("--CAMERA--CAMERA_EXPOSURE_COMPENSATION_LV0\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_exposure_compensation_lv0_tbl);
+ break;
+
+ case CAMERA_EXPOSURE_COMPENSATION_LV1:
+ CDBG("--CAMERA--CAMERA_EXPOSURE_COMPENSATION_LV1\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_exposure_compensation_lv1_tbl);
+ break;
+
+ case CAMERA_EXPOSURE_COMPENSATION_LV2:
+ CDBG("--CAMERA--CAMERA_EXPOSURE_COMPENSATION_LV2\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_exposure_compensation_lv2_default_tbl);
+ break;
+
+ case CAMERA_EXPOSURE_COMPENSATION_LV3:
+ CDBG("--CAMERA--CAMERA_EXPOSURE_COMPENSATION_LV3\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_exposure_compensation_lv3_tbl);
+ break;
+
+ case CAMERA_EXPOSURE_COMPENSATION_LV4:
+ CDBG("--CAMERA--CAMERA_EXPOSURE_COMPENSATION_LV3\n");
+ rc = OV5640CORE_WRITEPREG(
+ ov5640_exposure_compensation_lv4_tbl);
+ break;
+
+ default:
+ CDBG("--CAMERA--ERROR CAMERA_EXPOSURE_COMPENSATION\n");
+ break;
+ }
+
+ CDBG("--CAMERA-- %s ...(End)\n", __func__);
+
+ return rc;
+}
+
+static int ov5640_sensor_start_af(void)
+{
+ int i;
+ unsigned int af_st = 0;
+ unsigned int af_ack = 0;
+ unsigned int tmp = 0;
+ int rc = 0;
+
+ CDBG("--CAMERA-- %s (Start...)\n", __func__);
+
+ ov5640_i2c_read_byte(ov5640_client->addr,
+ OV5640_CMD_FW_STATUS, &af_st);
+ CDBG("--CAMERA-- %s af_st = %d\n", __func__, af_st);
+
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_ACK, 0x01, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_MAIN, 0x03, 10);
+
+ for (i = 0; i < 50; i++) {
+ ov5640_i2c_read_byte(ov5640_client->addr,
+ OV5640_CMD_ACK, &af_ack);
+ if (af_ack == 0)
+ break;
+ msleep(50);
+ }
+ CDBG("--CAMERA-- %s af_ack = 0x%x\n", __func__, af_ack);
+
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_FW_STATUS,
+ &af_st);
+ CDBG("--CAMERA-- %s af_st = %d\n", __func__, af_st);
+
+ if (af_st == 0x10) {
+ CDBG("--CAMERA-- %s AF ok and release AF setting~!!\n",
+ __func__);
+ } else {
+ CDBG("--CAMERA-- %s AF not ready!!\n", __func__);
+ }
+
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_ACK, 0x01, 10);
+ ov5640_i2c_write(ov5640_client->addr, OV5640_CMD_MAIN, 0x07, 10);
+
+ for (i = 0; i < 70; i++) {
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_ACK,
+ &af_ack);
+ if (af_ack == 0)
+ break;
+ msleep(25);
+ }
+
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_PARA0, &tmp);
+ CDBG("0x3024 = %x\n", tmp);
+ rc = ((tmp == 0) ? 1 : 0);
+
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_PARA1, &tmp);
+ CDBG("0x3025 = %x\n", tmp);
+ rc = ((tmp == 0) ? 1 : 0);
+
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_PARA2, &tmp);
+ CDBG("0x3026 = %x\n", tmp);
+ rc = ((tmp == 0) ? 1 : 0);
+
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_PARA3, &tmp);
+ CDBG("0x3027 = %x\n", tmp);
+ rc = ((tmp == 0) ? 1 : 0) ;
+
+ ov5640_i2c_read_byte(ov5640_client->addr, OV5640_CMD_PARA4, &tmp);
+ CDBG("0x3028 = %x\n", tmp);
+ rc = ((tmp == 0) ? 1 : 0) ;
+
+ CDBG("--CAMERA-- %s rc = %d(End...)\n", __func__, rc);
+ return rc;
+}
+
+static int ov5640_sensor_config(void __user *argp)
+{
+ struct sensor_cfg_data cdata;
+ long rc = 0;
+
+ if (copy_from_user(&cdata, (void *)argp,
+ sizeof(struct sensor_cfg_data)))
+ return -EFAULT;
+
+ CDBG("--CAMERA-- %s %d\n", __func__, cdata.cfgtype);
+
+ mutex_lock(&ov5640_mutex);
+
+ switch (cdata.cfgtype) {
+ case CFG_SET_MODE:
+ rc = ov5640_set_sensor_mode(cdata.mode, cdata.rs);
+ break;
+
+ case CFG_SET_EFFECT:
+ CDBG("--CAMERA-- CFG_SET_EFFECT mode=%d,"
+ "effect = %d !!\n", cdata.mode,
+ cdata.cfg.effect);
+ rc = ov5640_set_effect(cdata.mode, cdata.cfg.effect);
+ break;
+
+ case CFG_START:
+ CDBG("--CAMERA-- CFG_START (Not Support) !!\n");
+ /* Not Support */
+ break;
+
+ case CFG_PWR_UP:
+ CDBG("--CAMERA-- CFG_PWR_UP (Not Support) !!\n");
+ /* Not Support */
+ break;
+
+ case CFG_PWR_DOWN:
+ CDBG("--CAMERA-- CFG_PWR_DOWN (Not Support)\n");
+ ov5640_power_off();
+ break;
+
+ case CFG_SET_DEFAULT_FOCUS:
+ CDBG("--CAMERA-- CFG_SET_DEFAULT_FOCUS (Not Implement) !!\n");
+ break;
+
+ case CFG_MOVE_FOCUS:
+ CDBG("--CAMERA-- CFG_MOVE_FOCUS (Not Implement) !!\n");
+ break;
+
+ case CFG_SET_BRIGHTNESS:
+ CDBG("--CAMERA-- CFG_SET_BRIGHTNESS !!\n");
+ rc = ov5640_set_brightness(cdata.cfg.brightness);
+ break;
+
+ case CFG_SET_CONTRAST:
+ CDBG("--CAMERA-- CFG_SET_CONTRAST !!\n");
+ rc = ov5640_set_contrast(cdata.cfg.contrast);
+ break;
+
+ case CFG_SET_EXPOSURE_MODE:
+ CDBG("--CAMERA-- CFG_SET_EXPOSURE_MODE !!\n");
+ rc = ov5640_set_exposure_mode(cdata.cfg.ae_mode);
+ break;
+
+ case CFG_SET_ANTIBANDING:
+ CDBG("--CAMERA-- CFG_SET_ANTIBANDING antibanding = %d!!\n",
+ cdata.cfg.antibanding);
+ rc = ov5640_set_antibanding(cdata.cfg.antibanding);
+ break;
+
+ case CFG_SET_LENS_SHADING:
+ CDBG("--CAMERA-- CFG_SET_LENS_SHADING !!\n");
+ rc = ov5640_lens_shading_enable(
+ cdata.cfg.lens_shading);
+ break;
+
+ case CFG_SET_SATURATION:
+ CDBG("--CAMERA-- CFG_SET_SATURATION !!\n");
+ rc = ov5640_set_saturation(cdata.cfg.saturation);
+ break;
+
+ case CFG_SET_SHARPNESS:
+ CDBG("--CAMERA-- CFG_SET_SHARPNESS !!\n");
+ rc = ov5640_set_sharpness(cdata.cfg.sharpness);
+ break;
+
+ case CFG_SET_WB:
+ CDBG("--CAMERA-- CFG_SET_WB!!\n");
+ ov5640_set_wb_oem(cdata.cfg.wb_val);
+ rc = 0 ;
+ break;
+
+ case CFG_SET_TOUCHAEC:
+ CDBG("--CAMERA-- CFG_SET_TOUCHAEC!!\n");
+ ov5640_set_touchaec(cdata.cfg.aec_cord.x,
+ cdata.cfg.aec_cord.y);
+ rc = 0 ;
+ break;
+
+ case CFG_SET_AUTO_FOCUS:
+ CDBG("--CAMERA-- CFG_SET_AUTO_FOCUS !\n");
+ rc = ov5640_sensor_start_af();
+ break;
+
+ case CFG_SET_AUTOFLASH:
+ CDBG("--CAMERA-- CFG_SET_AUTOFLASH !\n");
+ is_autoflash = cdata.cfg.is_autoflash;
+ CDBG("[kylin] is autoflash %d\r\n", is_autoflash);
+ rc = 0;
+ break;
+
+ case CFG_SET_EXPOSURE_COMPENSATION:
+ CDBG("--CAMERA-- CFG_SET_EXPOSURE_COMPENSATION !\n");
+ rc = ov5640_set_exposure_compensation(
+ cdata.cfg.exp_compensation);
+ break;
+
+ default:
+ CDBG("%s: Command=%d (Not Implement)!!\n", __func__,
+ cdata.cfgtype);
+ rc = -EINVAL;
+ break;
+ }
+
+ mutex_unlock(&ov5640_mutex);
+ return rc;
+}
+
+static struct i2c_driver ov5640_i2c_driver = {
+ .id_table = ov5640_i2c_id,
+ .probe = ov5640_i2c_probe,
+ .remove = ov5640_i2c_remove,
+ .driver = {
+ .name = "ov5640",
+ },
+};
+
+static int ov5640_probe_init_gpio(const struct msm_camera_sensor_info *data)
+{
+ int rc = 0;
+
+ CDBG("--CAMERA-- %s\n", __func__);
+
+ ov5640_pwdn_gpio = data->sensor_pwd;
+ ov5640_reset_gpio = data->sensor_reset;
+ ov5640_driver_pwdn_gpio = data->vcm_pwd ;
+
+ if (data->vcm_enable)
+ gpio_direction_output(data->vcm_pwd, 1);
+
+ gpio_direction_output(data->sensor_reset, 1);
+ gpio_direction_output(data->sensor_pwd, 1);
+
+ return rc;
+
+}
+
+static void ov5640_probe_free_gpio(const struct msm_camera_sensor_info *data)
+{
+ gpio_free(ov5640_pwdn_gpio);
+ gpio_free(ov5640_reset_gpio);
+
+ if (data->vcm_enable) {
+ gpio_free(ov5640_driver_pwdn_gpio);
+ ov5640_driver_pwdn_gpio = 0xFF ;
+ }
+
+ ov5640_pwdn_gpio = 0xFF;
+ ov5640_reset_gpio = 0xFF;
+}
+
+static int ov5640_sensor_probe(const struct msm_camera_sensor_info *info,
+ struct msm_sensor_ctrl *s)
+{
+ int rc = -ENOTSUPP;
+
+ CDBG("--CAMERA-- %s (Start...)\n", __func__);
+ rc = i2c_add_driver(&ov5640_i2c_driver);
+ CDBG("--CAMERA-- i2c_add_driver ret:0x%x,ov5640_client=0x%x\n",
+ rc, (unsigned int)ov5640_client);
+ if ((rc < 0) || (ov5640_client == NULL)) {
+ CDBG("--CAMERA-- i2c_add_driver FAILS!!\n");
+ return rc;
+ }
+
+ rc = ov5640_probe_init_gpio(info);
+ if (rc < 0)
+ return rc;
+
+ ov5640_power_off();
+
+ /* SENSOR NEED MCLK TO DO I2C COMMUNICTION, OPEN CLK FIRST*/
+ msm_camio_clk_rate_set(24000000);
+
+ msleep(20);
+
+ ov5640_power_on();
+ ov5640_power_reset();
+
+ rc = ov5640_probe_readID(info);
+
+ if (rc < 0) {
+ CDBG("--CAMERA--ov5640_probe_readID Fail !!~~~~!!\n");
+ CDBG("--CAMERA-- %s, unregister\n", __func__);
+ i2c_del_driver(&ov5640_i2c_driver);
+ ov5640_power_off();
+ ov5640_probe_free_gpio(info);
+ return rc;
+ }
+
+ s->s_init = ov5640_sensor_open_init;
+ s->s_release = ov5640_sensor_release;
+ s->s_config = ov5640_sensor_config;
+ s->s_camera_type = BACK_CAMERA_2D;
+ s->s_mount_angle = info->sensor_platform_info->mount_angle;
+
+ ov5640_power_off();
+
+ CDBG("--CAMERA-- %s (End...)\n", __func__);
+ return rc;
+}
+
+static int ov5640_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ CDBG("--CAMERA-- %s ... (Start...)\n", __func__);
+
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ CDBG("--CAMERA--i2c_check_functionality failed\n");
+ return -ENOMEM;
+ }
+
+ ov5640_sensorw = kzalloc(sizeof(struct ov5640_work), GFP_KERNEL);
+ if (!ov5640_sensorw) {
+ CDBG("--CAMERA--kzalloc failed\n");
+ return -ENOMEM;
+ }
+
+ i2c_set_clientdata(client, ov5640_sensorw);
+ ov5640_init_client(client);
+ ov5640_client = client;
+
+ CDBG("--CAMERA-- %s ... (End...)\n", __func__);
+ return 0;
+}
+
+static int __ov5640_probe(struct platform_device *pdev)
+{
+ return msm_camera_drv_start(pdev, ov5640_sensor_probe);
+}
+
+static struct platform_driver msm_camera_driver = {
+ .probe = __ov5640_probe,
+ .driver = {
+ .name = "msm_camera_ov5640",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init ov5640_init(void)
+{
+ ov5640_i2c_buf[0] = 0x5A;
+ return platform_driver_register(&msm_camera_driver);
+}
+
+module_init(ov5640_init);
+
+MODULE_DESCRIPTION("OV5640 YUV MIPI sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/video/msm/ov5640.h b/drivers/media/video/msm/ov5640.h
new file mode 100644
index 0000000..0e65329
--- /dev/null
+++ b/drivers/media/video/msm/ov5640.h
@@ -0,0 +1,2993 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/*
+[SENSOR]
+Sensor Model: OV5640
+Camera Module:
+Lens Model:
+Driver IC:
+PV Size = 640 x 480
+Cap Size = 2592 x 1944
+Output Format = YUYV
+MCLK Speed = 24M
+PV DVP_PCLK = 28M
+Cap DVP_PCLK = 56M
+PV Frame Rate = 30fps
+Cap Frame Rate = 7.5fps
+I2C Slave ID = 0x78
+I2C Mode = 16Addr, 8Data
+*/
+
+#ifndef CAMSENSOR_OV5640
+#define CAMSENSOR_OV5640
+
+#define INVMASK(v) (0xff-v)
+#define OV5640CORE_WRITEPREG(PTBL) ov5640_writepregs(PTBL,\
+ sizeof(PTBL)/sizeof(PTBL[0]))
+
+/* OV SENSOR SCCB */
+struct ov5640_sensor {
+ uint16_t addr;
+ uint8_t data;
+ uint8_t mask;
+};
+
+/* Auto Focus Command */
+#define OV5640_CMD_MAIN 0x3022
+#define OV5640_CMD_ACK 0x3023
+#define OV5640_CMD_PARA0 0x3024
+#define OV5640_CMD_PARA1 0x3025
+#define OV5640_CMD_PARA2 0x3026
+#define OV5640_CMD_PARA3 0x3027
+#define OV5640_CMD_PARA4 0x3028
+#define OV5640_CMD_FW_STATUS 0x3029
+
+/* Sensor ID */
+#define OV5640_SENSOR_ID 0x5640
+
+#define capture_framerate 750 /* 7.5fps capture frame rate */
+#define g_preview_frameRate 3000 /* 30fps preview frame rate */
+
+struct ov5640_sensor ov5640_init_tbl[] = {
+ {0x3008, 0x42},
+ {0x3103, 0x03},
+ {0x3017, 0x00},
+ {0x3018, 0x00},
+ {0x3034, 0x18},
+ {0x3035, 0x14},
+ {0x3036, 0x38},
+ {0x3037, 0x13},
+ {0x3108, 0x01},
+ {0x3630, 0x36},
+ {0x3631, 0x0e},
+ {0x3632, 0xe2},
+ {0x3633, 0x12},
+ {0x3621, 0xe0},
+ {0x3704, 0xa0},
+ {0x3703, 0x5a},
+ {0x3715, 0x78},
+ {0x3717, 0x01},
+ {0x370b, 0x60},
+ {0x3705, 0x1a},
+ {0x3905, 0x02},
+ {0x3906, 0x10},
+ {0x3901, 0x0a},
+ {0x3731, 0x12},
+ {0x3600, 0x08},
+ {0x3601, 0x33},
+ {0x302d, 0x60},
+ {0x3620, 0x52},
+ {0x371b, 0x20},
+ {0x471c, 0x50},
+ {0x3a13, 0x43},
+ {0x3a18, 0x00},
+ {0x3a19, 0xf8},
+ {0x3635, 0x13},
+ {0x3636, 0x03},
+ {0x3634, 0x40},
+ {0x3622, 0x01},
+ {0x3c01, 0x34},
+ {0x3c04, 0x28},
+ {0x3c05, 0x98},
+ {0x3c06, 0x00},
+ {0x3c07, 0x08},
+ {0x3c08, 0x00},
+ {0x3c09, 0x1c},
+ {0x3c0a, 0x9c},
+ {0x3c0b, 0x40},
+ {0x3820, 0x41},
+ {0x3821, 0x07},
+ {0x3814, 0x31},
+ {0x3815, 0x31},
+ {0x3800, 0x00},
+ {0x3801, 0x00},
+ {0x3802, 0x00},
+ {0x3803, 0x04},
+ {0x3804, 0x0a},
+ {0x3805, 0x3f},
+ {0x3806, 0x07},
+ {0x3807, 0x9b},
+ {0x3808, 0x02},
+ {0x3809, 0x80},
+ {0x380a, 0x01},
+ {0x380b, 0xe0},
+ {0x380c, 0x07},
+ {0x380d, 0x68},
+ {0x380e, 0x03},
+ {0x380f, 0xd8},
+ {0x3810, 0x00},
+ {0x3811, 0x10},
+ {0x3812, 0x00},
+ {0x3813, 0x06},
+ {0x3618, 0x00},
+ {0x3612, 0x29},
+ {0x3708, 0x64},
+ {0x3709, 0x52},
+ {0x370c, 0x03},
+ {0x3a02, 0x03},
+ {0x3a03, 0xd8},
+ {0x3a08, 0x01},
+ {0x3a09, 0x27},
+ {0x3a0a, 0x00},
+ {0x3a0b, 0xf6},
+ {0x3a0e, 0x03},
+ {0x3a0d, 0x04},
+ {0x3a14, 0x03},
+ {0x3a15, 0xd8},
+ {0x4001, 0x02},
+ {0x4004, 0x02},
+ {0x3000, 0x00},
+ {0x3002, 0x1c},
+ {0x3004, 0xff},
+ {0x3006, 0xc3},
+ {0x300e, 0x45},
+ {0x302e, 0x08},
+ {0x4300, 0x30},
+ {0x501f, 0x00},
+ {0x4713, 0x03},
+ {0x4407, 0x04},
+ {0x440e, 0x00},
+ {0x460b, 0x35},
+ {0x460c, 0x22},
+ {0x4837, 0x44},
+ {0x3824, 0x02},
+ {0x5000, 0xa7},
+ {0x5001, 0xa3},
+ {0x5180, 0xff},
+ {0x5181, 0xf2},
+ {0x5182, 0x00},
+ {0x5183, 0x14},
+ {0x5184, 0x25},
+ {0x5185, 0x24},
+ {0x5186, 0x09},
+ {0x5187, 0x09},
+ {0x5188, 0x09},
+ {0x5189, 0x75},
+ {0x518a, 0x54},
+ {0x518b, 0xe0},
+ {0x518c, 0xb2},
+ {0x518d, 0x42},
+ {0x518e, 0x3d},
+ {0x518f, 0x56},
+ {0x5190, 0x46},
+ {0x5191, 0xf8},
+ {0x5192, 0x04},
+ {0x5193, 0x70},
+ {0x5194, 0xf0},
+ {0x5195, 0xf0},
+ {0x5196, 0x03},
+ {0x5197, 0x01},
+ {0x5198, 0x04},
+ {0x5199, 0x12},
+ {0x519a, 0x04},
+ {0x519b, 0x00},
+ {0x519c, 0x06},
+ {0x519d, 0x82},
+ {0x519e, 0x38},
+ {0x5381, 0x1e},
+ {0x5382, 0x5b},
+ {0x5383, 0x08},
+ {0x5384, 0x0a},
+ {0x5385, 0x7e},
+ {0x5386, 0x88},
+ {0x5387, 0x7c},
+ {0x5388, 0x6c},
+ {0x5389, 0x10},
+ {0x538a, 0x01},
+ {0x538b, 0x98},
+ {0x5300, 0x08},
+ {0x5301, 0x30},
+ {0x5302, 0x10},
+ {0x5303, 0x00},
+ {0x5304, 0x08},
+ {0x5305, 0x30},
+ {0x5306, 0x08},
+ {0x5307, 0x16},
+ {0x5309, 0x08},
+ {0x530a, 0x30},
+ {0x530b, 0x04},
+ {0x530c, 0x06},
+ {0x5480, 0x01},
+ {0x5481, 0x08},
+ {0x5482, 0x14},
+ {0x5483, 0x28},
+ {0x5484, 0x51},
+ {0x5485, 0x65},
+ {0x5486, 0x71},
+ {0x5487, 0x7d},
+ {0x5488, 0x87},
+ {0x5489, 0x91},
+ {0x548a, 0x9a},
+ {0x548b, 0xaa},
+ {0x548c, 0xb8},
+ {0x548d, 0xcd},
+ {0x548e, 0xdd},
+ {0x548f, 0xea},
+ {0x5490, 0x1d},
+ {0x5580, 0x02},
+ {0x5583, 0x40},
+ {0x5584, 0x10},
+ {0x5589, 0x10},
+ {0x558a, 0x00},
+ {0x558b, 0xf8},
+ {0x5800, 0x23},
+ {0x5801, 0x14},
+ {0x5802, 0x0f},
+ {0x5803, 0x0f},
+ {0x5804, 0x12},
+ {0x5805, 0x26},
+ {0x5806, 0x0c},
+ {0x5807, 0x08},
+ {0x5808, 0x05},
+ {0x5809, 0x05},
+ {0x580a, 0x08},
+ {0x580b, 0x0d},
+ {0x580c, 0x08},
+ {0x580d, 0x03},
+ {0x580e, 0x00},
+ {0x580f, 0x00},
+ {0x5810, 0x03},
+ {0x5811, 0x09},
+ {0x5812, 0x07},
+ {0x5813, 0x03},
+ {0x5814, 0x00},
+ {0x5815, 0x01},
+ {0x5816, 0x03},
+ {0x5817, 0x08},
+ {0x5818, 0x0d},
+ {0x5819, 0x08},
+ {0x581a, 0x05},
+ {0x581b, 0x06},
+ {0x581c, 0x08},
+ {0x581d, 0x0e},
+ {0x581e, 0x29},
+ {0x581f, 0x17},
+ {0x5820, 0x11},
+ {0x5821, 0x11},
+ {0x5822, 0x15},
+ {0x5823, 0x28},
+ {0x5824, 0x46},
+ {0x5825, 0x26},
+ {0x5826, 0x08},
+ {0x5827, 0x26},
+ {0x5828, 0x64},
+ {0x5829, 0x26},
+ {0x582a, 0x24},
+ {0x582b, 0x22},
+ {0x582c, 0x24},
+ {0x582d, 0x24},
+ {0x582e, 0x06},
+ {0x582f, 0x22},
+ {0x5830, 0x40},
+ {0x5831, 0x42},
+ {0x5832, 0x24},
+ {0x5833, 0x26},
+ {0x5834, 0x24},
+ {0x5835, 0x22},
+ {0x5836, 0x22},
+ {0x5837, 0x26},
+ {0x5838, 0x44},
+ {0x5839, 0x24},
+ {0x583a, 0x26},
+ {0x583b, 0x28},
+ {0x583c, 0x42},
+ {0x583d, 0xce},
+ {0x5025, 0x00},
+ {0x3a0f, 0x30},
+ {0x3a10, 0x28},
+ {0x3a1b, 0x30},
+ {0x3a1e, 0x26},
+ {0x3a11, 0x60},
+ {0x3a1f, 0x14},
+ {0x3008, 0x02},
+};
+
+struct ov5640_sensor ov5640_init_iq_tbl[] = {
+/* Lens correction */
+/* OV5640 LENC setting */
+ {0x5800, 0x3f},
+ {0x5801, 0x20},
+ {0x5802, 0x1a},
+ {0x5803, 0x1a},
+ {0x5804, 0x23},
+ {0x5805, 0x3f},
+ {0x5806, 0x11},
+ {0x5807, 0x0c},
+ {0x5808, 0x09},
+ {0x5809, 0x08},
+ {0x580a, 0x0d},
+ {0x580b, 0x12},
+ {0x580c, 0x0d},
+ {0x580d, 0x04},
+ {0x580e, 0x00},
+ {0x580f, 0x00},
+ {0x5810, 0x05},
+ {0x5811, 0x0d},
+ {0x5812, 0x0d},
+ {0x5813, 0x04},
+ {0x5814, 0x00},
+ {0x5815, 0x00},
+ {0x5816, 0x04},
+ {0x5817, 0x0d},
+ {0x5818, 0x13},
+ {0x5819, 0x0d},
+ {0x581a, 0x08},
+ {0x581b, 0x08},
+ {0x581c, 0x0c},
+ {0x581d, 0x13},
+ {0x581e, 0x3f},
+ {0x581f, 0x1f},
+ {0x5820, 0x1b},
+ {0x5821, 0x1c},
+ {0x5822, 0x23},
+ {0x5823, 0x3f},
+ {0x5824, 0x6a},
+ {0x5825, 0x06},
+ {0x5826, 0x08},
+ {0x5827, 0x06},
+ {0x5828, 0x2a},
+ {0x5829, 0x08},
+ {0x582a, 0x24},
+ {0x582b, 0x24},
+ {0x582c, 0x24},
+ {0x582d, 0x08},
+ {0x582e, 0x08},
+ {0x582f, 0x22},
+ {0x5830, 0x40},
+ {0x5831, 0x22},
+ {0x5832, 0x06},
+ {0x5833, 0x08},
+ {0x5834, 0x24},
+ {0x5835, 0x24},
+ {0x5836, 0x04},
+ {0x5837, 0x0a},
+ {0x5838, 0x86},
+ {0x5839, 0x08},
+ {0x583a, 0x28},
+ {0x583b, 0x28},
+ {0x583c, 0x66},
+ {0x583d, 0xce},
+/* AEC */
+ {0x3a0f, 0x38},
+ {0x3a10, 0x30},
+ {0x3a11, 0x61},
+ {0x3a1b, 0x38},
+ {0x3a1e, 0x30},
+ {0x3a1f, 0x10},
+ /* AWB */
+ {0x5180, 0xff},
+ {0x5181, 0xf2},
+ {0x5182, 0x00},
+ {0x5183, 0x14},
+ {0x5184, 0x25},
+ {0x5185, 0x24},
+ {0x5186, 0x09},
+ {0x5187, 0x09},
+ {0x5188, 0x09},
+ {0x5189, 0x88},
+ {0x518a, 0x54},
+ {0x518b, 0xee},
+ {0x518c, 0xb2},
+ {0x518d, 0x50},
+ {0x518e, 0x34},
+ {0x518f, 0x6b},
+ {0x5190, 0x46},
+ {0x5191, 0xf8},
+ {0x5192, 0x04},
+ {0x5193, 0x70},
+ {0x5194, 0xf0},
+ {0x5195, 0xf0},
+ {0x5196, 0x03},
+ {0x5197, 0x01},
+ {0x5198, 0x04},
+ {0x5199, 0x6c},
+ {0x519a, 0x04},
+ {0x519b, 0x00},
+ {0x519c, 0x09},
+ {0x519d, 0x2b},
+ {0x519e, 0x38},
+
+/* UV Adjust Auto Mode */
+ {0x5580, 0x02}, /* 02 ;Sat enable */
+ {0x5588, 0x01}, /*40 ;enable UV adj */
+ {0x5583, 0x40}, /* ;offset high */
+ {0x5584, 0x18}, /* ;offset low */
+ {0x5589, 0x18}, /* ;gth1 */
+ {0x558a, 0x00},
+ {0x358b, 0xf8}, /* ;gth2 */
+};
+
+struct ov5640_sensor ov5640_preview_tbl[] = {
+/* @@ MIPI_2lane_5M to vga(YUV) 30fps 99 640 480 98 0 0 */
+ {0x3503, 0x00}, /* enable AE back from capture to preview */
+ {0x3035, 0x14},
+ {0x3036, 0x38},
+ {0x3820, 0x41},
+ {0x3821, 0x07},
+ {0x3814, 0x31},
+ {0x3815, 0x31},
+ {0x3803, 0x04},
+ {0x3807, 0x9b},
+ {0x3808, 0x02},
+ {0x3809, 0x80},
+ {0x380a, 0x01},
+ {0x380b, 0xe0},
+ {0x380c, 0x07},
+ {0x380d, 0x68},
+ {0x380e, 0x03},
+ {0x380f, 0xd8},
+ {0x3813, 0x06},
+ {0x3618, 0x00},
+ {0x3612, 0x29},
+ {0x3708, 0x64},
+ {0x3709, 0x52},
+ {0x370c, 0x03},
+ {0x5001, 0xa3},
+ {0x4004, 0x02},
+ {0x4005, 0x18},
+ {0x4837, 0x44},
+ {0x4713, 0x03},
+ {0x4407, 0x04},
+ {0x460b, 0x35},
+ {0x460c, 0x22},
+ {0x3824, 0x02},
+};
+
+struct ov5640_sensor ov5640_capture_tbl[] = {
+/* @@ MIPI_2lane_5M(YUV) 7.5/15fps 99 2592 1944 98 0 0 */
+ {0x3035, 0x21}, /* 11 */
+ {0x3036, 0x54},
+ {0x3820, 0x40},
+ {0x3821, 0x06},
+ {0x3814, 0x11},
+ {0x3815, 0x11},
+ {0x3803, 0x00},
+ {0x3807, 0x9f},
+ {0x3808, 0x0a},
+ {0x3809, 0x20},
+ {0x380a, 0x07},
+ {0x380b, 0x98},
+ {0x380c, 0x0b},
+ {0x380d, 0x1c},
+ {0x380e, 0x07},
+ {0x380f, 0xb0},
+ {0x3813, 0x04},
+ {0x3618, 0x04},
+ {0x3612, 0x2b},
+ {0x3708, 0x21},
+ {0x3709, 0x12},
+ {0x370c, 0x00},
+ {0x5001, 0x83},
+ {0x4004, 0x06},
+ {0x4005, 0x1a},
+ {0x4837, 0x15}, /* 0a */
+ {0x4713, 0x02},
+ {0x4407, 0x0c},
+ {0x460b, 0x37},
+ {0x460c, 0x20},
+ {0x3824, 0x01},
+};
+
+/* Contrast */
+
+struct ov5640_sensor ov5640_contrast_lv0_tbl[] = {
+/* Contrast -4 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)}, /* Enable BIT2 for contrast/brightness
+ control*/
+ {0x5586, 0x10}, /* Gain */
+ {0x5585, 0x10}, /* Offset */
+ {0x5588, 0x00, INVMASK(0x04)}, /* Offset sign */
+};
+
+struct ov5640_sensor ov5640_contrast_lv1_tbl[] = {
+/* Contrast -3 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)}, /* Enable BIT2 for contrast/brightness
+ control */
+ {0x5586, 0x14}, /* Gain */
+ {0x5585, 0x14}, /* Offset */
+ {0x5588, 0x00, INVMASK(0x04)}, /* Offset sign */
+};
+
+struct ov5640_sensor ov5640_contrast_lv2_tbl[] = {
+/* Contrast -2 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)}, /* Enable BIT2 for contrast/brightness
+ control */
+ {0x5586, 0x18}, /* Gain */
+ {0x5585, 0x18}, /* Offset */
+ {0x5588, 0x00, INVMASK(0x04)}, /* Offset sign */
+};
+
+struct ov5640_sensor ov5640_contrast_lv3_tbl[] = {
+/* Contrast -1 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5586, 0x1c},
+ {0x5585, 0x1c},
+ {0x5588, 0x00, INVMASK(0x04)},
+};
+
+struct ov5640_sensor ov5640_contrast_default_lv4_tbl[] = {
+/* Contrast (Default) */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5586, 0x20},
+ {0x5585, 0x00},
+ {0x5588, 0x00, INVMASK(0x04)},
+};
+
+struct ov5640_sensor ov5640_contrast_lv5_tbl[] = {
+/* Contrast +1 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5586, 0x24},
+ {0x5585, 0x10},
+ {0x5588, 0x00, INVMASK(0x04)},
+};
+
+struct ov5640_sensor ov5640_contrast_lv6_tbl[] = {
+/* Contrast +2 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5586, 0x28},
+ {0x5585, 0x18},
+ {0x5588, 0x00, INVMASK(0x04)},
+};
+
+struct ov5640_sensor ov5640_contrast_lv7_tbl[] = {
+/* Contrast +3 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5586, 0x2c},
+ {0x5585, 0x1c},
+ {0x5588, 0x00, INVMASK(0x04)},
+};
+
+struct ov5640_sensor ov5640_contrast_lv8_tbl[] = {
+/* Contrast +4 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5586, 0x30},
+ {0x5585, 0x20},
+ {0x5588, 0x00, INVMASK(0x04)},
+};
+
+/* Sharpness */
+
+struct ov5640_sensor ov5640_sharpness_lv0_tbl[] = {
+/* Sharpness 0 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x00},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv1_tbl[] = {
+/* Sharpness 1 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x02},
+};
+
+struct ov5640_sensor ov5640_sharpness_default_lv2_tbl[] = {
+/* Sharpness_Auto (Default) */
+ {0x5308, 0x00, INVMASK(0x40)},
+ {0x5300, 0x08},
+ {0x5301, 0x30},
+ {0x5302, 0x10},
+ {0x5303, 0x00},
+ {0x5309, 0x08},
+ {0x530a, 0x30},
+ {0x530b, 0x04},
+ {0x530c, 0x06},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv3_tbl[] = {
+/* Sharpness 3 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x08},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv4_tbl[] = {
+/* Sharpness 4 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x0c},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv5_tbl[] = {
+/* Sharpness 5 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x10},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv6_tbl[] = {
+/* Sharpness 6 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x14},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv7_tbl[] = {
+/* Sharpness 7 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x18},
+};
+
+struct ov5640_sensor ov5640_sharpness_lv8_tbl[] = {
+/* Sharpness 8 */
+ {0x5308, 0x40, INVMASK(0x40)},
+ {0x5302, 0x20},
+};
+
+/* Saturation */
+
+struct ov5640_sensor ov5640_saturation_lv0_tbl[] = {
+/* Saturation x0.25 */
+ {0x5001, 0x83, INVMASK(0x80)}, /* SDE_En */
+ {0x5583, 0x00}, /* Saturaion gain in U */
+ {0x5584, 0x00}, /* Saturation gain in V */
+ {0x5580, 0x02, INVMASK(0x02)}, /* Saturation enable */
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv1_tbl[] = {
+/* Saturation x0.5 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x10},
+ {0x5584, 0x10},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv2_tbl[] = {
+/* Saturation x0.75 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x20},
+ {0x5584, 0x20},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv3_tbl[] = {
+/* Saturation x0.75 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x30},
+ {0x5584, 0x30},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_default_lv4_tbl[] = {
+/* Saturation x1 (Default) */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x40},
+ {0x5584, 0x40},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv5_tbl[] = {
+/* Saturation x1.25 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x50},
+ {0x5584, 0x50},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv6_tbl[] = {
+/* Saturation x1.5 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x60},
+ {0x5584, 0x60},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv7_tbl[] = {
+/* Saturation x1.25 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x70},
+ {0x5584, 0x70},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+struct ov5640_sensor ov5640_saturation_lv8_tbl[] = {
+/* Saturation x1.5 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5583, 0x80},
+ {0x5584, 0x80},
+ {0x5580, 0x02, INVMASK(0x02)},
+ {0x5588, 0x40, INVMASK(0x40)},
+};
+
+/* Brightness */
+
+struct ov5640_sensor ov5640_brightness_lv0_tbl[] = {
+/* Brightness -4 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x40},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x08, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv1_tbl[] = {
+/* Brightness -3 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x30},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x08, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv2_tbl[] = {
+/* Brightness -2 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x20},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x08, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv3_tbl[] = {
+/* Brightness -1 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x10},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x08, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_default_lv4_tbl[] = {
+/* Brightness 0 (Default) */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x00},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x00, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv5_tbl[] = {
+/* Brightness +1 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x10},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x00, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv6_tbl[] = {
+/* Brightness +2 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x20},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x00, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv7_tbl[] = {
+/* Brightness +3 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x30},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x00, INVMASK(0x08)},
+};
+
+struct ov5640_sensor ov5640_brightness_lv8_tbl[] = {
+/* Brightness +4 */
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5587, 0x40},
+ {0x5580, 0x04, INVMASK(0x04)},
+ {0x5588, 0x00, INVMASK(0x08)},
+};
+
+/* Exposure Compensation */
+struct ov5640_sensor ov5640_exposure_compensation_lv0_tbl[] = {
+ /* @@ +1.7EV */
+ {0x3a0f, 0x60},
+ {0x3a10, 0x58},
+ {0x3a11, 0xa0},
+ {0x3a1b, 0x60},
+ {0x3a1e, 0x58},
+ {0x3a1f, 0x20},
+};
+
+struct ov5640_sensor ov5640_exposure_compensation_lv1_tbl[] = {
+ /* @@ +1.0EV */
+ {0x3a0f, 0x50},
+ {0x3a10, 0x48},
+ {0x3a11, 0x90},
+ {0x3a1b, 0x50},
+ {0x3a1e, 0x48},
+ {0x3a1f, 0x20},
+};
+
+struct ov5640_sensor ov5640_exposure_compensation_lv2_default_tbl[] = {
+ /* @@ default */
+ {0x3a0f, 0x38},
+ {0x3a10, 0x30},
+ {0x3a11, 0x61},
+ {0x3a1b, 0x38},
+ {0x3a1e, 0x30},
+ {0x3a1f, 0x10},
+};
+
+struct ov5640_sensor ov5640_exposure_compensation_lv3_tbl[] = {
+ /* @@ -1.0EV */
+ {0x3a0f, 0x20},
+ {0x3a10, 0x18},
+ {0x3a11, 0x41},
+ {0x3a1b, 0x20},
+ {0x3a1e, 0x18},
+ {0x3a1f, 0x10},
+};
+
+struct ov5640_sensor ov5640_exposure_compensation_lv4_tbl[] = {
+ /* @@ -1.7EV */
+ {0x3a0f, 0x10},
+ {0x3a10, 0x08},
+ {0x3a11, 0x10},
+ {0x3a1b, 0x08},
+ {0x3a1e, 0x20},
+ {0x3a1f, 0x10},
+};
+
+/* Auto Expourse Weight */
+
+struct ov5640_sensor ov5640_ae_average_tbl[] = {
+ /* Whole Image Average */
+ {0x5688, 0x11}, /* Zone 1/Zone 0 weight */
+ {0x5689, 0x11}, /* Zone 3/Zone 2 weight */
+ {0x569a, 0x11}, /* Zone 5/Zone 4 weight */
+ {0x569b, 0x11}, /* Zone 7/Zone 6 weight */
+ {0x569c, 0x11}, /* Zone 9/Zone 8 weight */
+ {0x569d, 0x11}, /* Zone b/Zone a weight */
+ {0x569e, 0x11}, /* Zone d/Zone c weight */
+ {0x569f, 0x11}, /* Zone f/Zone e weight */
+};
+
+struct ov5640_sensor ov5640_ae_centerweight_tbl[] = {
+ /* Whole Image Center More weight */
+ {0x5688, 0x62},
+ {0x5689, 0x26},
+ {0x568a, 0xe6},
+ {0x568b, 0x6e},
+ {0x568c, 0xea},
+ {0x568d, 0xae},
+ {0x568e, 0xa6},
+ {0x568f, 0x6a},
+};
+
+/* Light Mode */
+struct ov5640_sensor ov5640_wb_def[] = {
+ {0x3406, 0x00, INVMASK(0x01)},
+};
+
+struct ov5640_sensor ov5640_wb_custom[] = {
+ {0x3406, 0x01, INVMASK(0x01)},
+ {0x3400, 0x04},
+ {0x3401, 0x58},
+ {0x3402, 0x04},
+ {0x3403, 0x00},
+ {0x3404, 0x08},
+ {0x3405, 0x40},
+};
+
+struct ov5640_sensor ov5640_wb_inc[] = {
+ {0x3406, 0x01, INVMASK(0x01)},
+ {0x3400, 0x04},
+ {0x3401, 0x88},
+ {0x3402, 0x04},
+ {0x3403, 0x00},
+ {0x3404, 0x08},
+ {0x3405, 0xb6},
+};
+
+struct ov5640_sensor ov5640_wb_daylight[] = {
+ {0x3406, 0x01, INVMASK(0x01)},
+ {0x3400, 0x07},
+ {0x3401, 0x02},
+ {0x3402, 0x04},
+ {0x3403, 0x00},
+ {0x3404, 0x05},
+ {0x3405, 0x15},
+};
+
+struct ov5640_sensor ov5640_wb_cloudy[] = {
+ {0x3406, 0x01, INVMASK(0x01)},
+ {0x3400, 0x07},
+ {0x3401, 0x88},
+ {0x3402, 0x04},
+ {0x3403, 0x00},
+ {0x3404, 0x05},
+ {0x3405, 0x00},
+};
+
+/* EFFECT */
+struct ov5640_sensor ov5640_effect_normal_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x00, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0x40},
+ {0x5584, 0x40},
+};
+
+struct ov5640_sensor ov5640_effect_mono_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x20, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0x40},
+ {0x5584, 0x40},
+};
+
+struct ov5640_sensor ov5640_effect_bw_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x18, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0x80},
+ {0x5584, 0x80},
+};
+
+struct ov5640_sensor ov5640_effect_bluish_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x18, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0xa0},
+ {0x5584, 0x40},
+};
+
+struct ov5640_sensor ov5640_effect_solarize_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x00, INVMASK(0x78)},
+ {0x5003, 0x09},
+};
+
+
+struct ov5640_sensor ov5640_effect_sepia_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x18, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0x40},
+ {0x5584, 0xa0},
+};
+
+struct ov5640_sensor ov5640_effect_reddish_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x18, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0x80},
+ {0x5584, 0xc0},
+};
+
+struct ov5640_sensor ov5640_effect_greenish_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x18, INVMASK(0x78)},
+ {0x5003, 0x08},
+ {0x5583, 0x60},
+ {0x5584, 0x60},
+};
+
+struct ov5640_sensor ov5640_effect_negative_tbl[] = {
+ {0x5001, 0x83, INVMASK(0x80)},
+ {0x5580, 0x40, INVMASK(0x78)},
+ {0x5003, 0x08},
+};
+
+/* AntiBanding */
+struct ov5640_sensor ov5640_antibanding_auto_tbl[] = {
+ /* Auto-XCLK24MHz */
+ {0x3622, 0x01}, /* PD-sel */
+ {0x3635, 0x1c}, /* VMREF 3635[2:0] */
+ {0x3634, 0x40}, /* I_5060 3643[2:0] */
+ {0x3c01, 0x34},
+ {0x3c00, 0x00},
+ {0x3c04, 0x28},
+ {0x3c05, 0x98},
+ {0x3c06, 0x00},
+ {0x3c07, 0x08},
+ {0x3c08, 0x00},
+ {0x3c09, 0x1c},
+ {0x300c, 0x22}, /* 50/60div 300c[2:0] */
+ {0x3c0a, 0x9c},
+ {0x3c0b, 0x40},
+};
+
+struct ov5640_sensor ov5640_antibanding_50z_tbl[] = {
+ /* Band 50Hz */
+ {0x3c01, 0x80, INVMASK(0x80)},
+ {0x3c00, 0x04},
+};
+
+struct ov5640_sensor ov5640_antibanding_60z_tbl[] = {
+ /* Band 60Hz */
+ {0x3c01, 0x80, INVMASK(0x80)},
+ {0x3c00, 0x00},
+};
+
+
+/* Lens_shading */
+
+struct ov5640_sensor ov5640_lens_shading_on_tbl[] = {
+ /* @@ Lenc On(C) */
+ {0x5000, 0x80, INVMASK(0x80)},
+};
+
+struct ov5640_sensor ov5640_lens_shading_off_tbl[] = {
+ /* Lenc Off */
+ {0x5000, 0x00, INVMASK(0x80)},
+};
+
+/* Auto Focus Firmware-use 2011-08-24 firmware settings */
+u8 ov5640_afinit_tbl[] = {
+ 0x80, 0x00, 0x02, 0x0b, 0x7b, 0x02, 0x07, 0xbd, 0xc2,
+ 0x01, 0x22, 0x22, 0x00, 0x02, 0x0b, 0x57, 0xe5, 0x1f,
+ 0x70, 0x72, 0xf5, 0x1e, 0xd2, 0x35, 0xff, 0xef, 0x25,
+ 0xe0, 0x24, 0x4b, 0xf8, 0xe4, 0xf6, 0x08, 0xf6, 0x0f,
+ 0xbf, 0x34, 0xf2, 0x90, 0x0e, 0x88, 0xe4, 0x93, 0xff,
+ 0xe5, 0x49, 0xc3, 0x9f, 0x50, 0x04, 0x7f, 0x05, 0x80,
+ 0x02, 0x7f, 0xfb, 0x78, 0xba, 0xa6, 0x07, 0x12, 0x0a,
+ 0xb4, 0x40, 0x04, 0x7f, 0x03, 0x80, 0x02, 0x7f, 0x30,
+ 0x78, 0xb9, 0xa6, 0x07, 0xe6, 0x18, 0xf6, 0x08, 0xe6,
+ 0x78, 0xb6, 0xf6, 0x78, 0xb9, 0xe6, 0x78, 0xb7, 0xf6,
+ 0x78, 0xbc, 0x76, 0x33, 0xe4, 0x08, 0xf6, 0x78, 0xb5,
+ 0x76, 0x01, 0x75, 0x48, 0x02, 0x78, 0xb3, 0xf6, 0x08,
+ 0xf6, 0x74, 0xff, 0x78, 0xbe, 0xf6, 0x08, 0xf6, 0x75,
+ 0x1f, 0x01, 0x78, 0xb9, 0xe6, 0x75, 0xf0, 0x05, 0xa4,
+ 0xf5, 0x49, 0x12, 0x08, 0x5b, 0xc2, 0x37, 0x22, 0x78,
+ 0xb5, 0xe6, 0xd3, 0x94, 0x00, 0x40, 0x02, 0x16, 0x22,
+ 0xe5, 0x1f, 0x64, 0x05, 0x70, 0x28, 0xf5, 0x1f, 0xc2,
+ 0x01, 0x78, 0xb6, 0xe6, 0x25, 0xe0, 0x24, 0x4b, 0xf8,
+ 0xe6, 0xfe, 0x08, 0xe6, 0xff, 0x78, 0x4b, 0xa6, 0x06,
+ 0x08, 0xa6, 0x07, 0xa2, 0x37, 0xe4, 0x33, 0xf5, 0x3c,
+ 0x90, 0x30, 0x28, 0xf0, 0x75, 0x1e, 0x10, 0xd2, 0x35,
+ 0x22, 0xe5, 0x49, 0x75, 0xf0, 0x05, 0x84, 0x78, 0xb9,
+ 0xf6, 0x90, 0x0e, 0x85, 0xe4, 0x93, 0xff, 0x25, 0xe0,
+ 0x24, 0x0a, 0xf8, 0xe6, 0xfc, 0x08, 0xe6, 0xfd, 0x78,
+ 0xb9, 0xe6, 0x25, 0xe0, 0x24, 0x4b, 0xf8, 0xa6, 0x04,
+ 0x08, 0xa6, 0x05, 0xef, 0x12, 0x0a, 0xbb, 0xd3, 0x78,
+ 0xb4, 0x96, 0xee, 0x18, 0x96, 0x40, 0x0d, 0x78, 0xb9,
+ 0xe6, 0x78, 0xb6, 0xf6, 0x78, 0xb3, 0xa6, 0x06, 0x08,
+ 0xa6, 0x07, 0x90, 0x0e, 0x85, 0xe4, 0x93, 0x12, 0x0a,
+ 0xbb, 0xc3, 0x78, 0xbf, 0x96, 0xee, 0x18, 0x96, 0x50,
+ 0x0d, 0x78, 0xb9, 0xe6, 0x78, 0xb7, 0xf6, 0x78, 0xbe,
+ 0xa6, 0x06, 0x08, 0xa6, 0x07, 0x78, 0xb3, 0xe6, 0xfe,
+ 0x08, 0xe6, 0xc3, 0x78, 0xbf, 0x96, 0xff, 0xee, 0x18,
+ 0x96, 0x78, 0xc0, 0xf6, 0x08, 0xa6, 0x07, 0x90, 0x0e,
+ 0x8a, 0xe4, 0x18, 0x12, 0x0a, 0x99, 0xc3, 0x33, 0xce,
+ 0x33, 0xce, 0xd8, 0xf9, 0xff, 0xd3, 0xed, 0x9f, 0xec,
+ 0x9e, 0x40, 0x02, 0xd2, 0x37, 0x78, 0xb9, 0xe6, 0x08,
+ 0x26, 0x08, 0xf6, 0xe5, 0x1f, 0x64, 0x01, 0x70, 0x55,
+ 0xe6, 0xc3, 0x78, 0xbd, 0x12, 0x0a, 0x8f, 0x40, 0x10,
+ 0x12, 0x0a, 0x8a, 0x50, 0x0b, 0x30, 0x37, 0x41, 0x78,
+ 0xb9, 0xe6, 0x78, 0xb6, 0x66, 0x60, 0x39, 0x12, 0x0a,
+ 0xb2, 0x40, 0x04, 0x7f, 0xfe, 0x80, 0x02, 0x7f, 0x02,
+ 0x78, 0xba, 0xa6, 0x07, 0x78, 0xb6, 0xe6, 0x24, 0x03,
+ 0x78, 0xbc, 0xf6, 0x78, 0xb6, 0xe6, 0x24, 0xfd, 0x78,
+ 0xbd, 0xf6, 0x12, 0x0a, 0xb2, 0x40, 0x06, 0x78, 0xbd,
+ 0xe6, 0xff, 0x80, 0x04, 0x78, 0xbc, 0xe6, 0xff, 0x78,
+ 0xbb, 0xa6, 0x07, 0x75, 0x1f, 0x02, 0x78, 0xb5, 0x76,
+ 0x01, 0x02, 0x02, 0x68, 0xe5, 0x1f, 0x64, 0x02, 0x60,
+ 0x03, 0x02, 0x02, 0x48, 0x78, 0xbb, 0xe6, 0xff, 0xc3,
+ 0x78, 0xbd, 0x12, 0x0a, 0x90, 0x40, 0x08, 0x12, 0x0a,
+ 0x8a, 0x50, 0x03, 0x02, 0x02, 0x46, 0x12, 0x0a, 0xb2,
+ 0x40, 0x04, 0x7f, 0xff, 0x80, 0x02, 0x7f, 0x01, 0x78,
+ 0xba, 0xa6, 0x07, 0x78, 0xb6, 0xe6, 0x04, 0x78, 0xbc,
+ 0xf6, 0x78, 0xb6, 0xe6, 0x14, 0x78, 0xbd, 0xf6, 0x18,
+ 0x12, 0x0a, 0xb4, 0x40, 0x04, 0xe6, 0xff, 0x80, 0x02,
+ 0x7f, 0x00, 0x78, 0xbc, 0xa6, 0x07, 0xd3, 0x08, 0xe6,
+ 0x64, 0x80, 0x94, 0x80, 0x40, 0x04, 0xe6, 0xff, 0x80,
+ 0x02, 0x7f, 0x00, 0x78, 0xbd, 0xa6, 0x07, 0xc3, 0x18,
+ 0xe6, 0x64, 0x80, 0x94, 0xb3, 0x50, 0x04, 0xe6, 0xff,
+ 0x80, 0x02, 0x7f, 0x33, 0x78, 0xbc, 0xa6, 0x07, 0xc3,
+ 0x08, 0xe6, 0x64, 0x80, 0x94, 0xb3, 0x50, 0x04, 0xe6,
+ 0xff, 0x80, 0x02, 0x7f, 0x33, 0x78, 0xbd, 0xa6, 0x07,
+ 0x12, 0x0a, 0xb2, 0x40, 0x06, 0x78, 0xbd, 0xe6, 0xff,
+ 0x80, 0x04, 0x78, 0xbc, 0xe6, 0xff, 0x78, 0xbb, 0xa6,
+ 0x07, 0x75, 0x1f, 0x03, 0x78, 0xb5, 0x76, 0x01, 0x80,
+ 0x20, 0xe5, 0x1f, 0x64, 0x03, 0x70, 0x26, 0x78, 0xbb,
+ 0xe6, 0xff, 0xc3, 0x78, 0xbd, 0x12, 0x0a, 0x90, 0x40,
+ 0x05, 0x12, 0x0a, 0x8a, 0x40, 0x09, 0x78, 0xb6, 0xe6,
+ 0x78, 0xbb, 0xf6, 0x75, 0x1f, 0x04, 0x78, 0xbb, 0xe6,
+ 0x75, 0xf0, 0x05, 0xa4, 0xf5, 0x49, 0x02, 0x08, 0x5b,
+ 0xe5, 0x1f, 0xb4, 0x04, 0x1d, 0x90, 0x0e, 0x89, 0xe4,
+ 0x78, 0xc0, 0x12, 0x0a, 0x99, 0xc3, 0x33, 0xce, 0x33,
+ 0xce, 0xd8, 0xf9, 0xff, 0xd3, 0xed, 0x9f, 0xec, 0x9e,
+ 0x40, 0x02, 0xd2, 0x37, 0x75, 0x1f, 0x05, 0x22, 0xef,
+ 0x8d, 0xf0, 0xa4, 0xa8, 0xf0, 0xcf, 0x8c, 0xf0, 0xa4,
+ 0x28, 0xce, 0x8d, 0xf0, 0xa4, 0x2e, 0xfe, 0x22, 0xbc,
+ 0x00, 0x0b, 0xbe, 0x00, 0x29, 0xef, 0x8d, 0xf0, 0x84,
+ 0xff, 0xad, 0xf0, 0x22, 0xe4, 0xcc, 0xf8, 0x75, 0xf0,
+ 0x08, 0xef, 0x2f, 0xff, 0xee, 0x33, 0xfe, 0xec, 0x33,
+ 0xfc, 0xee, 0x9d, 0xec, 0x98, 0x40, 0x05, 0xfc, 0xee,
+ 0x9d, 0xfe, 0x0f, 0xd5, 0xf0, 0xe9, 0xe4, 0xce, 0xfd,
+ 0x22, 0xed, 0xf8, 0xf5, 0xf0, 0xee, 0x84, 0x20, 0xd2,
+ 0x1c, 0xfe, 0xad, 0xf0, 0x75, 0xf0, 0x08, 0xef, 0x2f,
+ 0xff, 0xed, 0x33, 0xfd, 0x40, 0x07, 0x98, 0x50, 0x06,
+ 0xd5, 0xf0, 0xf2, 0x22, 0xc3, 0x98, 0xfd, 0x0f, 0xd5,
+ 0xf0, 0xea, 0x22, 0xe8, 0x8f, 0xf0, 0xa4, 0xcc, 0x8b,
+ 0xf0, 0xa4, 0x2c, 0xfc, 0xe9, 0x8e, 0xf0, 0xa4, 0x2c,
+ 0xfc, 0x8a, 0xf0, 0xed, 0xa4, 0x2c, 0xfc, 0xea, 0x8e,
+ 0xf0, 0xa4, 0xcd, 0xa8, 0xf0, 0x8b, 0xf0, 0xa4, 0x2d,
+ 0xcc, 0x38, 0x25, 0xf0, 0xfd, 0xe9, 0x8f, 0xf0, 0xa4,
+ 0x2c, 0xcd, 0x35, 0xf0, 0xfc, 0xeb, 0x8e, 0xf0, 0xa4,
+ 0xfe, 0xa9, 0xf0, 0xeb, 0x8f, 0xf0, 0xa4, 0xcf, 0xc5,
+ 0xf0, 0x2e, 0xcd, 0x39, 0xfe, 0xe4, 0x3c, 0xfc, 0xea,
+ 0xa4, 0x2d, 0xce, 0x35, 0xf0, 0xfd, 0xe4, 0x3c, 0xfc,
+ 0x22, 0x75, 0xf0, 0x08, 0x75, 0x82, 0x00, 0xef, 0x2f,
+ 0xff, 0xee, 0x33, 0xfe, 0xcd, 0x33, 0xcd, 0xcc, 0x33,
+ 0xcc, 0xc5, 0x82, 0x33, 0xc5, 0x82, 0x9b, 0xed, 0x9a,
+ 0xec, 0x99, 0xe5, 0x82, 0x98, 0x40, 0x0c, 0xf5, 0x82,
+ 0xee, 0x9b, 0xfe, 0xed, 0x9a, 0xfd, 0xec, 0x99, 0xfc,
+ 0x0f, 0xd5, 0xf0, 0xd6, 0xe4, 0xce, 0xfb, 0xe4, 0xcd,
+ 0xfa, 0xe4, 0xcc, 0xf9, 0xa8, 0x82, 0x22, 0xb8, 0x00,
+ 0xc1, 0xb9, 0x00, 0x59, 0xba, 0x00, 0x2d, 0xec, 0x8b,
+ 0xf0, 0x84, 0xcf, 0xce, 0xcd, 0xfc, 0xe5, 0xf0, 0xcb,
+ 0xf9, 0x78, 0x18, 0xef, 0x2f, 0xff, 0xee, 0x33, 0xfe,
+ 0xed, 0x33, 0xfd, 0xec, 0x33, 0xfc, 0xeb, 0x33, 0xfb,
+ 0x10, 0xd7, 0x03, 0x99, 0x40, 0x04, 0xeb, 0x99, 0xfb,
+ 0x0f, 0xd8, 0xe5, 0xe4, 0xf9, 0xfa, 0x22, 0x78, 0x18,
+ 0xef, 0x2f, 0xff, 0xee, 0x33, 0xfe, 0xed, 0x33, 0xfd,
+ 0xec, 0x33, 0xfc, 0xc9, 0x33, 0xc9, 0x10, 0xd7, 0x05,
+ 0x9b, 0xe9, 0x9a, 0x40, 0x07, 0xec, 0x9b, 0xfc, 0xe9,
+ 0x9a, 0xf9, 0x0f, 0xd8, 0xe0, 0xe4, 0xc9, 0xfa, 0xe4,
+ 0xcc, 0xfb, 0x22, 0x75, 0xf0, 0x10, 0xef, 0x2f, 0xff,
+ 0xee, 0x33, 0xfe, 0xed, 0x33, 0xfd, 0xcc, 0x33, 0xcc,
+ 0xc8, 0x33, 0xc8, 0x10, 0xd7, 0x07, 0x9b, 0xec, 0x9a,
+ 0xe8, 0x99, 0x40, 0x0a, 0xed, 0x9b, 0xfd, 0xec, 0x9a,
+ 0xfc, 0xe8, 0x99, 0xf8, 0x0f, 0xd5, 0xf0, 0xda, 0xe4,
+ 0xcd, 0xfb, 0xe4, 0xcc, 0xfa, 0xe4, 0xc8, 0xf9, 0x22,
+ 0xeb, 0x9f, 0xf5, 0xf0, 0xea, 0x9e, 0x42, 0xf0, 0xe9,
+ 0x9d, 0x42, 0xf0, 0xe8, 0x9c, 0x45, 0xf0, 0x22, 0xe8,
+ 0x60, 0x0f, 0xef, 0xc3, 0x33, 0xff, 0xee, 0x33, 0xfe,
+ 0xed, 0x33, 0xfd, 0xec, 0x33, 0xfc, 0xd8, 0xf1, 0x22,
+ 0xe4, 0x93, 0xfc, 0x74, 0x01, 0x93, 0xfd, 0x74, 0x02,
+ 0x93, 0xfe, 0x74, 0x03, 0x93, 0xff, 0x22, 0xe6, 0xfb,
+ 0x08, 0xe6, 0xf9, 0x08, 0xe6, 0xfa, 0x08, 0xe6, 0xcb,
+ 0xf8, 0x22, 0xec, 0xf6, 0x08, 0xed, 0xf6, 0x08, 0xee,
+ 0xf6, 0x08, 0xef, 0xf6, 0x22, 0xa4, 0x25, 0x82, 0xf5,
+ 0x82, 0xe5, 0xf0, 0x35, 0x83, 0xf5, 0x83, 0x22, 0xd0,
+ 0x83, 0xd0, 0x82, 0xf8, 0xe4, 0x93, 0x70, 0x12, 0x74,
+ 0x01, 0x93, 0x70, 0x0d, 0xa3, 0xa3, 0x93, 0xf8, 0x74,
+ 0x01, 0x93, 0xf5, 0x82, 0x88, 0x83, 0xe4, 0x73, 0x74,
+ 0x02, 0x93, 0x68, 0x60, 0xef, 0xa3, 0xa3, 0xa3, 0x80,
+ 0xdf, 0x90, 0x38, 0x04, 0x78, 0x4f, 0x12, 0x09, 0x50,
+ 0x90, 0x38, 0x00, 0xe0, 0xfe, 0xa3, 0xe0, 0xfd, 0xed,
+ 0xff, 0xc3, 0x12, 0x09, 0x09, 0x90, 0x38, 0x10, 0x12,
+ 0x08, 0xfd, 0x90, 0x38, 0x06, 0x78, 0x51, 0x12, 0x09,
+ 0x50, 0x90, 0x38, 0x02, 0xe0, 0xfe, 0xa3, 0xe0, 0xfd,
+ 0xed, 0xff, 0xc3, 0x12, 0x09, 0x09, 0x90, 0x38, 0x12,
+ 0x12, 0x08, 0xfd, 0xa3, 0xe0, 0xb4, 0x31, 0x07, 0x78,
+ 0x4f, 0x79, 0x4f, 0x12, 0x09, 0x66, 0x90, 0x38, 0x14,
+ 0xe0, 0xb4, 0x71, 0x15, 0x78, 0x4f, 0xe6, 0xfe, 0x08,
+ 0xe6, 0x78, 0x02, 0xce, 0xc3, 0x13, 0xce, 0x13, 0xd8,
+ 0xf9, 0x79, 0x50, 0xf7, 0xee, 0x19, 0xf7, 0x90, 0x38,
+ 0x15, 0xe0, 0xb4, 0x31, 0x07, 0x78, 0x51, 0x79, 0x51,
+ 0x12, 0x09, 0x66, 0x90, 0x38, 0x15, 0xe0, 0xb4, 0x71,
+ 0x15, 0x78, 0x51, 0xe6, 0xfe, 0x08, 0xe6, 0x78, 0x02,
+ 0xce, 0xc3, 0x13, 0xce, 0x13, 0xd8, 0xf9, 0x79, 0x52,
+ 0xf7, 0xee, 0x19, 0xf7, 0x79, 0x4f, 0x12, 0x09, 0x38,
+ 0x09, 0x12, 0x09, 0x38, 0xaf, 0x45, 0x12, 0x08, 0xee,
+ 0x7d, 0x50, 0x12, 0x02, 0xa9, 0x78, 0x57, 0xa6, 0x06,
+ 0x08, 0xa6, 0x07, 0xaf, 0x43, 0x12, 0x08, 0xee, 0x7d,
+ 0x50, 0x12, 0x02, 0xa9, 0x78, 0x53, 0xa6, 0x06, 0x08,
+ 0xa6, 0x07, 0xaf, 0x46, 0x78, 0x51, 0x12, 0x08, 0xf0,
+ 0x7d, 0x3c, 0x12, 0x02, 0xa9, 0x78, 0x59, 0xa6, 0x06,
+ 0x08, 0xa6, 0x07, 0xaf, 0x44, 0x7e, 0x00, 0x78, 0x51,
+ 0x12, 0x08, 0xf2, 0x7d, 0x3c, 0x12, 0x02, 0xa9, 0x78,
+ 0x55, 0xa6, 0x06, 0x08, 0xa6, 0x07, 0xc3, 0x78, 0x58,
+ 0xe6, 0x94, 0x08, 0x18, 0xe6, 0x94, 0x00, 0x50, 0x05,
+ 0x76, 0x00, 0x08, 0x76, 0x08, 0xc3, 0x78, 0x5a, 0xe6,
+ 0x94, 0x08, 0x18, 0xe6, 0x94, 0x00, 0x50, 0x05, 0x76,
+ 0x00, 0x08, 0x76, 0x08, 0x78, 0x57, 0x12, 0x09, 0x25,
+ 0xff, 0xd3, 0x78, 0x54, 0xe6, 0x9f, 0x18, 0xe6, 0x9e,
+ 0x40, 0x0e, 0x78, 0x57, 0xe6, 0x13, 0xfe, 0x08, 0xe6,
+ 0x78, 0x54, 0x12, 0x09, 0x5b, 0x80, 0x04, 0x7e, 0x00,
+ 0x7f, 0x00, 0x78, 0x5b, 0x12, 0x09, 0x1d, 0xff, 0xd3,
+ 0x78, 0x56, 0xe6, 0x9f, 0x18, 0xe6, 0x9e, 0x40, 0x0e,
+ 0x78, 0x59, 0xe6, 0x13, 0xfe, 0x08, 0xe6, 0x78, 0x56,
+ 0x12, 0x09, 0x5b, 0x80, 0x04, 0x7e, 0x00, 0x7f, 0x00,
+ 0xe4, 0xfc, 0xfd, 0x78, 0x5f, 0x12, 0x04, 0x5c, 0x78,
+ 0x57, 0x12, 0x09, 0x25, 0x78, 0x54, 0x26, 0xff, 0xee,
+ 0x18, 0x36, 0xfe, 0x78, 0x63, 0x12, 0x09, 0x1d, 0x78,
+ 0x56, 0x26, 0xff, 0xee, 0x18, 0x36, 0xfe, 0xe4, 0xfc,
+ 0xfd, 0x78, 0x67, 0x12, 0x04, 0x5c, 0x12, 0x09, 0x2d,
+ 0x78, 0x63, 0x12, 0x04, 0x4f, 0xd3, 0x12, 0x04, 0x1b,
+ 0x40, 0x08, 0x12, 0x09, 0x2d, 0x78, 0x63, 0x12, 0x04,
+ 0x5c, 0x78, 0x51, 0x12, 0x09, 0x2f, 0x78, 0x67, 0x12,
+ 0x04, 0x4f, 0xd3, 0x12, 0x04, 0x1b, 0x40, 0x0a, 0x78,
+ 0x51, 0x12, 0x09, 0x2f, 0x78, 0x67, 0x12, 0x04, 0x5c,
+ 0xe4, 0xfd, 0x78, 0x5e, 0x12, 0x09, 0x48, 0x24, 0x01,
+ 0x12, 0x09, 0x11, 0x78, 0x62, 0x12, 0x09, 0x48, 0x24,
+ 0x02, 0x12, 0x09, 0x11, 0x78, 0x66, 0x12, 0x09, 0x48,
+ 0x24, 0x03, 0x12, 0x09, 0x11, 0x78, 0x6a, 0x12, 0x09,
+ 0x48, 0x24, 0x04, 0x12, 0x09, 0x11, 0x0d, 0xbd, 0x05,
+ 0xd4, 0xc2, 0x0e, 0xc2, 0x06, 0x22, 0x85, 0x08, 0x41,
+ 0x90, 0x30, 0x24, 0xe0, 0xf5, 0x3d, 0xa3, 0xe0, 0xf5,
+ 0x3e, 0xa3, 0xe0, 0xf5, 0x3f, 0xa3, 0xe0, 0xf5, 0x40,
+ 0xa3, 0xe0, 0xf5, 0x3c, 0xd2, 0x34, 0xe5, 0x41, 0x12,
+ 0x04, 0x74, 0x06, 0xc7, 0x03, 0x06, 0xcb, 0x04, 0x06,
+ 0xd1, 0x07, 0x06, 0xda, 0x08, 0x06, 0xeb, 0x12, 0x07,
+ 0x03, 0x18, 0x07, 0x19, 0x19, 0x06, 0xee, 0x1a, 0x06,
+ 0xfa, 0x1b, 0x07, 0x3e, 0x80, 0x07, 0x43, 0x81, 0x07,
+ 0xa1, 0x8f, 0x07, 0x90, 0x90, 0x07, 0xa1, 0x91, 0x07,
+ 0xa1, 0x92, 0x07, 0xa1, 0x93, 0x07, 0xa1, 0x94, 0x07,
+ 0xa1, 0x98, 0x07, 0x9e, 0x9f, 0x00, 0x00, 0x07, 0xbc,
+ 0x12, 0x0a, 0xf4, 0x22, 0x12, 0x0a, 0xf4, 0xd2, 0x03,
+ 0x22, 0xa2, 0x37, 0xe4, 0x33, 0xf5, 0x3c, 0x02, 0x07,
+ 0xa1, 0xc2, 0x01, 0xc2, 0x02, 0xc2, 0x03, 0x12, 0x09,
+ 0x70, 0x75, 0x1e, 0x70, 0xd2, 0x35, 0x02, 0x07, 0xa1,
+ 0x02, 0x07, 0x8b, 0x85, 0x40, 0x48, 0x85, 0x3c, 0x49,
+ 0x12, 0x08, 0x5b, 0x02, 0x07, 0xa1, 0x85, 0x48, 0x40,
+ 0x85, 0x49, 0x3c, 0x02, 0x07, 0xa1, 0xe4, 0xf5, 0x22,
+ 0xf5, 0x23, 0x85, 0x40, 0x31, 0x85, 0x3f, 0x30, 0x85,
+ 0x3e, 0x2f, 0x85, 0x3d, 0x2e, 0x12, 0x0a, 0xc6, 0x80,
+ 0x1f, 0x75, 0x22, 0x00, 0x75, 0x23, 0x01, 0x74, 0xff,
+ 0xf5, 0x2d, 0xf5, 0x2c, 0xf5, 0x2b, 0xf5, 0x2a, 0x12,
+ 0x0a, 0xc6, 0x85, 0x2d, 0x40, 0x85, 0x2c, 0x3f, 0x85,
+ 0x2b, 0x3e, 0x85, 0x2a, 0x3d, 0xe4, 0xf5, 0x3c, 0x02,
+ 0x07, 0xa1, 0x12, 0x0b, 0x3d, 0x80, 0x5e, 0x85, 0x3d,
+ 0x43, 0x85, 0x3e, 0x44, 0xe5, 0x45, 0xc3, 0x13, 0xff,
+ 0xe5, 0x43, 0xc3, 0x9f, 0x50, 0x02, 0x8f, 0x43, 0xe5,
+ 0x46, 0xc3, 0x13, 0xff, 0xe5, 0x44, 0xc3, 0x9f, 0x50,
+ 0x02, 0x8f, 0x44, 0xe5, 0x45, 0xc3, 0x13, 0xff, 0xfd,
+ 0xe5, 0x43, 0x90, 0x0e, 0x7f, 0x12, 0x0b, 0x10, 0x40,
+ 0x04, 0xee, 0x9f, 0xf5, 0x43, 0xe5, 0x46, 0xc3, 0x13,
+ 0xff, 0xfd, 0xe5, 0x44, 0x90, 0x0e, 0x80, 0x12, 0x0b,
+ 0x10, 0x40, 0x04, 0xee, 0x9f, 0xf5, 0x44, 0x12, 0x04,
+ 0x9a, 0x80, 0x11, 0x85, 0x40, 0x46, 0x85, 0x3f, 0x45,
+ 0x85, 0x3e, 0x44, 0x85, 0x3d, 0x43, 0x80, 0x03, 0x02,
+ 0x04, 0x9a, 0x90, 0x30, 0x24, 0xe5, 0x3d, 0xf0, 0xa3,
+ 0xe5, 0x3e, 0xf0, 0xa3, 0xe5, 0x3f, 0xf0, 0xa3, 0xe5,
+ 0x40, 0xf0, 0xa3, 0xe5, 0x3c, 0xf0, 0x90, 0x30, 0x23,
+ 0xe4, 0xf0, 0x22, 0xc0, 0xe0, 0xc0, 0x83, 0xc0, 0x82,
+ 0xc0, 0xd0, 0x90, 0x3f, 0x0c, 0xe0, 0xf5, 0x32, 0xe5,
+ 0x32, 0x30, 0xe3, 0x4c, 0x30, 0x36, 0x3e, 0x90, 0x60,
+ 0x19,
+ 0xe0,
+ 0xf5,
+ 0x0a,
+ 0xa3,
+ 0xe0,
+ 0xf5,
+ 0x0b,
+ 0x90,
+ 0x60,
+ 0x1d,
+ 0xe0,
+ 0xf5,
+ 0x14,
+ 0xa3,
+ 0xe0,
+ 0xf5,
+ 0x15,
+ 0x30,
+ 0x01,
+ 0x06,
+ 0x30,
+ 0x33,
+ 0x03,
+ 0xd3,
+ 0x80,
+ 0x01,
+ 0xc3,
+ 0x92,
+ 0x09,
+ 0x30,
+ 0x02,
+ 0x06,
+ 0x30,
+ 0x33,
+ 0x03,
+ 0xd3,
+ 0x80,
+ 0x01,
+ 0xc3,
+ 0x92,
+ 0x0a,
+ 0x30,
+ 0x33,
+ 0x0c,
+ 0x30,
+ 0x03,
+ 0x09,
+ 0x20,
+ 0x02,
+ 0x06,
+ 0x20,
+ 0x01,
+ 0x03,
+ 0xd3,
+ 0x80,
+ 0x01,
+ 0xc3,
+ 0x92,
+ 0x0b,
+ 0x90,
+ 0x30,
+ 0x01,
+ 0xe0,
+ 0x44,
+ 0x40,
+ 0xf0,
+ 0xe0,
+ 0x54,
+ 0xbf,
+ 0xf0,
+ 0xe5,
+ 0x32,
+ 0x30,
+ 0xe1,
+ 0x14,
+ 0x30,
+ 0x34,
+ 0x11,
+ 0x90,
+ 0x30,
+ 0x22,
+ 0xe0,
+ 0xf5,
+ 0x08,
+ 0xe4,
+ 0xf0,
+ 0x30,
+ 0x00,
+ 0x03,
+ 0xd3,
+ 0x80,
+ 0x01,
+ 0xc3,
+ 0x92,
+ 0x08,
+ 0xe5,
+ 0x32,
+ 0x30,
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+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x11,
+ 0x07,
+ 0x21,
+ 0x15,
+ 0x29,
+ 0x13,
+ 0x4f,
+ 0x56,
+ 0x54,
+ 0x20,
+ 0x20,
+ 0x20,
+ 0x20,
+ 0x20,
+ 0x20,
+ 0x01,
+ 0x10,
+ 0x00,
+ 0x56,
+ 0x40,
+ 0x1a,
+ 0x30,
+ 0x29,
+ 0x7e,
+ 0x00,
+ 0x30,
+ 0x04,
+ 0x20,
+ 0xdf,
+ 0x30,
+ 0x05,
+ 0x40,
+ 0xbf,
+ 0x50,
+ 0x03,
+ 0x00,
+ 0xfd,
+ 0x50,
+ 0x27,
+ 0x01,
+ 0xfe,
+ 0x60,
+ 0x00,
+ 0x11,
+ 0x00,
+ 0x3f,
+ 0x05,
+ 0x30,
+ 0x00,
+ 0x3f,
+ 0x06,
+ 0x22,
+ 0x00,
+ 0x3f,
+ 0x01,
+ 0x2a,
+ 0x00,
+ 0x3f,
+ 0x02,
+ 0x00,
+ 0x00,
+ 0x36,
+ 0x06,
+ 0x07,
+ 0x00,
+ 0x3f,
+ 0x0b,
+ 0x0f,
+ 0xf0,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x30,
+ 0x01,
+ 0x40,
+ 0xbf,
+ 0x30,
+ 0x01,
+ 0x00,
+ 0xbf,
+ 0x30,
+ 0x29,
+ 0x70,
+ 0x00,
+ 0x3a,
+ 0x00,
+ 0x00,
+ 0xff,
+ 0x3a,
+ 0x00,
+ 0x00,
+ 0xff,
+ 0x36,
+ 0x03,
+ 0x36,
+ 0x02,
+ 0x41,
+ 0x44,
+ 0x58,
+ 0x20,
+ 0x18,
+ 0x10,
+ 0x0a,
+ 0x04,
+ 0x04,
+ 0x00,
+ 0x03,
+ 0xff,
+ 0x64,
+ 0x00,
+ 0x00,
+ 0x80,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x02,
+ 0x04,
+ 0x06,
+ 0x00,
+ 0x03,
+ 0x98,
+ 0x00,
+ 0xcc,
+ 0x50,
+ 0x3c,
+ 0x28,
+ 0x1e,
+ 0x10,
+ 0x10,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x6e,
+ 0x30,
+ 0x28,
+ 0x00,
+ 0xa5,
+ 0x5a,
+ 0x00,
+};
+
+#endif /* CAMSENSOR_OV5640 */
diff --git a/drivers/media/video/msm/ov7692_qrd.c b/drivers/media/video/msm/ov7692_qrd.c
new file mode 100644
index 0000000..e558e57
--- /dev/null
+++ b/drivers/media/video/msm/ov7692_qrd.c
@@ -0,0 +1,679 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* #define DEBUG */
+
+#include <linux/delay.h>
+#include <linux/types.h>
+#include <linux/i2c.h>
+#include <linux/uaccess.h>
+#include <linux/miscdevice.h>
+#include <linux/slab.h>
+#include <media/msm_camera.h>
+#include <mach/camera.h>
+#include <mach/gpio.h>
+#include "ov7692.h"
+
+/*=============================================================
+ SENSOR REGISTER DEFINES
+==============================================================*/
+#define Q8 0x00000100
+
+/* Omnivision8810 product ID register address */
+#define REG_OV7692_MODEL_ID_MSB 0x0A
+#define REG_OV7692_MODEL_ID_LSB 0x0B
+
+#define OV7692_MODEL_ID 0x7692
+/* Omnivision8810 product ID */
+
+/* Time in milisecs for waiting for the sensor to reset */
+#define OV7692_RESET_DELAY_MSECS 66
+#define OV7692_DEFAULT_CLOCK_RATE 24000000
+/* Registers*/
+
+/* Color bar pattern selection */
+#define OV7692_COLOR_BAR_PATTERN_SEL_REG 0x82
+/* Color bar enabling control */
+#define OV7692_COLOR_BAR_ENABLE_REG 0x601
+/* Time in milisecs for waiting for the sensor to reset*/
+#define OV7692_RESET_DELAY_MSECS 66
+
+static int ov7692_pwdn_gpio;
+static int ov7692_reset_gpio;
+
+
+/*============================================================================
+ DATA DECLARATIONS
+ ============================================================================*/
+/* 96MHz PCLK @ 24MHz MCLK */
+struct reg_addr_val_pair_struct ov7692_init_settings_array[] = {
+ {0x12, 0x80},
+ {0x0e, 0x08},
+ {0x69, 0x52},
+ {0x1e, 0xb3},
+ {0x48, 0x42},
+ {0xff, 0x01},
+ {0xae, 0xa0},
+ {0xa8, 0x26},
+ {0xb4, 0xc0},
+ {0xb5, 0x40},
+ {0xff, 0x00},
+ {0x0c, 0x00},
+ {0x62, 0x10},
+ {0x12, 0x00},
+ {0x17, 0x65},
+ {0x18, 0xa4},
+ {0x19, 0x0a},
+ {0x1a, 0xf6},
+ {0x3e, 0x30},
+ {0x64, 0x0a},
+ {0xff, 0x01},
+ {0xb4, 0xc0},
+ {0xff, 0x00},
+ {0x67, 0x20},
+ {0x81, 0x3f},
+ {0xcc, 0x02},
+ {0xcd, 0x80},
+ {0xce, 0x01},
+ {0xcf, 0xe0},
+ {0xc8, 0x02},
+ {0xc9, 0x80},
+ {0xca, 0x01},
+ {0xcb, 0xe0},
+ {0xd0, 0x48},
+ {0x82, 0x03},
+ {0x0e, 0x00},
+ {0x70, 0x00},
+ {0x71, 0x34},
+ {0x74, 0x28},
+ {0x75, 0x98},
+ {0x76, 0x00},
+ {0x77, 0x64},
+ {0x78, 0x01},
+ {0x79, 0xc2},
+ {0x7a, 0x4e},
+ {0x7b, 0x1f},
+ {0x7c, 0x00},
+ {0x11, 0x00},
+ {0x20, 0x00},
+ {0x21, 0x23},
+ {0x50, 0x9a},
+ {0x51, 0x80},
+ {0x4c, 0x7d},
+ {0x0e, 0x00},
+ {0x85, 0x10},
+ {0x86, 0x00},
+ {0x87, 0x00},
+ {0x88, 0x00},
+ {0x89, 0x2a},
+ {0x8a, 0x26},
+ {0x8b, 0x22},
+ {0xbb, 0x7a},
+ {0xbc, 0x69},
+ {0xbd, 0x11},
+ {0xbe, 0x13},
+ {0xbf, 0x81},
+ {0xc0, 0x96},
+ {0xc1, 0x1e},
+ {0xb7, 0x05},
+ {0xb8, 0x09},
+ {0xb9, 0x00},
+ {0xba, 0x18},
+ {0x5a, 0x1f},
+ {0x5b, 0x9f},
+ {0x5c, 0x6a},
+ {0x5d, 0x42},
+ {0x24, 0x78},
+ {0x25, 0x68},
+ {0x26, 0xb3},
+ {0xa3, 0x0b},
+ {0xa4, 0x15},
+ {0xa5, 0x2a},
+ {0xa6, 0x51},
+ {0xa7, 0x63},
+ {0xa8, 0x74},
+ {0xa9, 0x83},
+ {0xaa, 0x91},
+ {0xab, 0x9e},
+ {0xac, 0xaa},
+ {0xad, 0xbe},
+ {0xae, 0xce},
+ {0xaf, 0xe5},
+ {0xb0, 0xf3},
+ {0xb1, 0xfb},
+ {0xb2, 0x06},
+ {0x8c, 0x5c},
+ {0x8d, 0x11},
+ {0x8e, 0x12},
+ {0x8f, 0x19},
+ {0x90, 0x50},
+ {0x91, 0x20},
+ {0x92, 0x96},
+ {0x93, 0x80},
+ {0x94, 0x13},
+ {0x95, 0x1b},
+ {0x96, 0xff},
+ {0x97, 0x00},
+ {0x98, 0x3d},
+ {0x99, 0x36},
+ {0x9a, 0x51},
+ {0x9b, 0x43},
+ {0x9c, 0xf0},
+ {0x9d, 0xf0},
+ {0x9e, 0xf0},
+ {0x9f, 0xff},
+ {0xa0, 0x68},
+ {0xa1, 0x62},
+ {0xa2, 0x0e},
+};
+
+static bool OV7692_CSI_CONFIG;
+/* 816x612, 24MHz MCLK 96MHz PCLK */
+uint32_t OV7692_FULL_SIZE_WIDTH = 640;
+uint32_t OV7692_FULL_SIZE_HEIGHT = 480;
+
+uint32_t OV7692_QTR_SIZE_WIDTH = 640;
+uint32_t OV7692_QTR_SIZE_HEIGHT = 480;
+
+uint32_t OV7692_HRZ_FULL_BLK_PIXELS = 16;
+uint32_t OV7692_VER_FULL_BLK_LINES = 12;
+uint32_t OV7692_HRZ_QTR_BLK_PIXELS = 16;
+uint32_t OV7692_VER_QTR_BLK_LINES = 12;
+
+struct ov7692_work_t {
+ struct work_struct work;
+};
+static struct ov7692_work_t *ov7692_sensorw;
+static struct i2c_client *ov7692_client;
+struct ov7692_ctrl_t {
+ const struct msm_camera_sensor_info *sensordata;
+ uint32_t sensormode;
+ uint32_t fps_divider; /* init to 1 * 0x00000400 */
+ uint32_t pict_fps_divider; /* init to 1 * 0x00000400 */
+ uint32_t fps;
+ int32_t curr_lens_pos;
+ uint32_t curr_step_pos;
+ uint32_t my_reg_gain;
+ uint32_t my_reg_line_count;
+ uint32_t total_lines_per_frame;
+ enum ov7692_resolution_t prev_res;
+ enum ov7692_resolution_t pict_res;
+ enum ov7692_resolution_t curr_res;
+ enum ov7692_test_mode_t set_test;
+ unsigned short imgaddr;
+};
+static struct ov7692_ctrl_t *ov7692_ctrl;
+static DECLARE_WAIT_QUEUE_HEAD(ov7692_wait_queue);
+DEFINE_MUTEX(ov7692_mut);
+
+/*=============================================================*/
+
+static int ov7692_i2c_rxdata(unsigned short saddr,
+ unsigned char *rxdata, int length)
+{
+ struct i2c_msg msgs[] = {
+ {
+ .addr = saddr,
+ .flags = 0,
+ .len = 1,
+ .buf = rxdata,
+ },
+ {
+ .addr = saddr,
+ .flags = I2C_M_RD,
+ .len = 1,
+ .buf = rxdata,
+ },
+ };
+ if (i2c_transfer(ov7692_client->adapter, msgs, 2) < 0) {
+ CDBG("ov7692_i2c_rxdata failed!\n");
+ return -EIO;
+ }
+ return 0;
+}
+static int32_t ov7692_i2c_txdata(unsigned short saddr,
+ unsigned char *txdata, int length)
+{
+ struct i2c_msg msg[] = {
+ {
+ .addr = saddr,
+ .flags = 0,
+ .len = 2,
+ .buf = txdata,
+ },
+ };
+ if (i2c_transfer(ov7692_client->adapter, msg, 1) < 0) {
+ CDBG("ov7692_i2c_txdata faild 0x%x\n", ov7692_client->addr);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int32_t ov7692_i2c_read(uint8_t raddr,
+ uint8_t *rdata, int rlen)
+{
+ int32_t rc = 0;
+ unsigned char buf[1];
+ if (!rdata)
+ return -EIO;
+ memset(buf, 0, sizeof(buf));
+ buf[0] = raddr;
+ rc = ov7692_i2c_rxdata(ov7692_client->addr >> 1, buf, rlen);
+ if (rc < 0) {
+ CDBG("ov7692_i2c_read 0x%x failed!\n", raddr);
+ return rc;
+ }
+ *rdata = buf[0];
+ return rc;
+}
+static int32_t ov7692_i2c_write_b_sensor(uint8_t waddr, uint8_t bdata)
+{
+ int32_t rc = -EFAULT;
+ unsigned char buf[2];
+
+ memset(buf, 0, sizeof(buf));
+ buf[0] = waddr;
+ buf[1] = bdata;
+
+ rc = ov7692_i2c_txdata(ov7692_client->addr >> 1, buf, 2);
+ if (rc < 0)
+ CDBG("i2c_write_b failed, addr = 0x%x, val = 0x%x!\n",
+ waddr, bdata);
+ return rc;
+}
+
+static int32_t ov7692_sensor_setting(int update_type, int rt)
+{
+ int32_t i, array_length;
+ int32_t rc = 0;
+ struct msm_camera_csi_params ov7692_csi_params;
+
+ CDBG("%s: rt = %d\n", __func__, rt);
+
+ switch (update_type) {
+ case REG_INIT:
+ OV7692_CSI_CONFIG = 0;
+ ov7692_i2c_write_b_sensor(0x0e, 0x08);
+ return rc;
+ break;
+ case UPDATE_PERIODIC:
+ if (!OV7692_CSI_CONFIG) {
+ ov7692_csi_params.lane_cnt = 1;
+ ov7692_csi_params.data_format = CSI_8BIT;
+ ov7692_csi_params.lane_assign = 0xe4;
+ ov7692_csi_params.dpcm_scheme = 0;
+ ov7692_csi_params.settle_cnt = 0x14;
+
+ rc = msm_camio_csi_config(&ov7692_csi_params);
+ msleep(20);
+ array_length = sizeof(ov7692_init_settings_array) /
+ sizeof(ov7692_init_settings_array[0]);
+ for (i = 0; i < array_length; i++) {
+ rc = ov7692_i2c_write_b_sensor(
+ ov7692_init_settings_array[i].reg_addr,
+ ov7692_init_settings_array[i].reg_val);
+ if (rc < 0)
+ return rc;
+ }
+ OV7692_CSI_CONFIG = 1;
+ msleep(20);
+ return rc;
+ }
+ break;
+ default:
+ rc = -EINVAL;
+ break;
+ }
+ return rc;
+}
+
+static int32_t ov7692_video_config(int mode)
+{
+ int32_t rc = 0;
+ int rt;
+ /* change sensor resolution if needed */
+ rt = RES_PREVIEW;
+
+ CDBG("%s\n", __func__);
+
+ if (ov7692_sensor_setting(UPDATE_PERIODIC, rt) < 0)
+ return rc;
+ ov7692_ctrl->curr_res = ov7692_ctrl->prev_res;
+ ov7692_ctrl->sensormode = mode;
+ return rc;
+}
+
+static int32_t ov7692_set_sensor_mode(int mode,
+ int res)
+{
+ int32_t rc = 0;
+ switch (mode) {
+ case SENSOR_PREVIEW_MODE:
+ rc = ov7692_video_config(mode);
+ break;
+ case SENSOR_SNAPSHOT_MODE:
+ case SENSOR_RAW_SNAPSHOT_MODE:
+ break;
+ default:
+ rc = -EINVAL;
+ break;
+ }
+ return rc;
+}
+
+static void ov7692_power_on(void)
+{
+ CDBG("%s\n", __func__);
+ gpio_set_value(ov7692_pwdn_gpio, 0);
+}
+
+static void ov7692_power_down(void)
+{
+ CDBG("%s\n", __func__);
+ gpio_set_value(ov7692_pwdn_gpio, 1);
+}
+
+static void ov7692_sw_reset(void)
+{
+ CDBG("%s\n", __func__);
+ ov7692_i2c_write_b_sensor(0x12, 0x80);
+}
+
+static void ov7692_hw_reset(void)
+{
+ CDBG("--CAMERA-- %s ... (Start...)\n", __func__);
+ gpio_set_value(ov7692_reset_gpio, 1); /* reset camera reset pin */
+ msleep(20);
+ gpio_set_value(ov7692_reset_gpio, 0);
+ msleep(20);
+ gpio_set_value(ov7692_reset_gpio, 1);
+ msleep(20);
+
+ CDBG("--CAMERA-- %s ... (End...)\n", __func__);
+}
+
+
+
+static int ov7692_probe_init_sensor(const struct msm_camera_sensor_info *data)
+{
+ uint8_t model_id_msb, model_id_lsb = 0;
+ uint16_t model_id = 0;
+ int32_t rc = 0;
+ /*The reset pin is not physically connected to the sensor.
+ The standby pin will do the reset hence there is no need
+ to request the gpio reset*/
+
+ /* Read sensor Model ID: */
+ rc = ov7692_i2c_read(REG_OV7692_MODEL_ID_MSB, &model_id_msb, 1);
+ if (rc < 0)
+ goto init_probe_fail;
+ rc = ov7692_i2c_read(REG_OV7692_MODEL_ID_LSB, &model_id_lsb, 1);
+ if (rc < 0)
+ goto init_probe_fail;
+ model_id = (model_id_msb << 8) | ((model_id_lsb & 0x00FF)) ;
+ CDBG("ov7692 model_id = 0x%x, 0x%x, 0x%x\n",
+ model_id, model_id_msb, model_id_lsb);
+ /* 4. Compare sensor ID to OV7692 ID: */
+ if (model_id != OV7692_MODEL_ID) {
+ rc = -ENODEV;
+ goto init_probe_fail;
+ }
+ goto init_probe_done;
+init_probe_fail:
+ pr_warning(" ov7692_probe_init_sensor fails\n");
+init_probe_done:
+ CDBG(" ov7692_probe_init_sensor finishes\n");
+ return rc;
+}
+
+int ov7692_sensor_open_init(const struct msm_camera_sensor_info *data)
+{
+ int32_t rc = 0;
+
+ CDBG("%s: %d\n", __func__, __LINE__);
+ CDBG("Calling ov7692_sensor_open_init\n");
+ ov7692_ctrl = kzalloc(sizeof(struct ov7692_ctrl_t), GFP_KERNEL);
+ if (!ov7692_ctrl) {
+ CDBG("ov7692_init failed!\n");
+ rc = -ENOMEM;
+ goto init_done;
+ }
+ ov7692_ctrl->fps_divider = 1 * 0x00000400;
+ ov7692_ctrl->pict_fps_divider = 1 * 0x00000400;
+ ov7692_ctrl->fps = 30 * Q8;
+ ov7692_ctrl->set_test = TEST_OFF;
+ ov7692_ctrl->prev_res = QTR_SIZE;
+ ov7692_ctrl->pict_res = FULL_SIZE;
+ ov7692_ctrl->curr_res = INVALID_SIZE;
+
+ if (data)
+ ov7692_ctrl->sensordata = data;
+
+ /* enable mclk first */
+
+ msm_camio_clk_rate_set(24000000);
+ msleep(20);
+
+ ov7692_power_on();
+ msleep(20);
+
+ rc = ov7692_probe_init_sensor(data);
+ if (rc < 0) {
+ CDBG("Calling ov7692_sensor_open_init fail\n");
+ goto init_fail;
+ }
+
+ rc = ov7692_sensor_setting(REG_INIT, RES_PREVIEW);
+ if (rc < 0)
+ goto init_fail;
+ else
+ goto init_done;
+
+init_fail:
+ CDBG(" ov7692_sensor_open_init fail\n");
+ kfree(ov7692_ctrl);
+init_done:
+ CDBG("ov7692_sensor_open_init done\n");
+ return rc;
+}
+
+static int ov7692_init_client(struct i2c_client *client)
+{
+ /* Initialize the MSM_CAMI2C Chip */
+ init_waitqueue_head(&ov7692_wait_queue);
+ return 0;
+}
+
+static const struct i2c_device_id ov7692_i2c_id[] = {
+ {"ov7692", 0},
+ { }
+};
+
+static int ov7692_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ int rc = 0;
+ CDBG("ov7692_i2c_probe called!\n");
+
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ CDBG("i2c_check_functionality failed\n");
+ goto probe_failure;
+ }
+
+ ov7692_sensorw = kzalloc(sizeof(struct ov7692_work_t), GFP_KERNEL);
+ if (!ov7692_sensorw) {
+ CDBG("kzalloc failed.\n");
+ rc = -ENOMEM;
+ goto probe_failure;
+ }
+
+ i2c_set_clientdata(client, ov7692_sensorw);
+ ov7692_init_client(client);
+ ov7692_client = client;
+
+ CDBG("ov7692_i2c_probe success! rc = %d\n", rc);
+ return 0;
+
+probe_failure:
+ CDBG("ov7692_i2c_probe failed! rc = %d\n", rc);
+ return rc;
+}
+
+static int __exit ov7692_remove(struct i2c_client *client)
+{
+ struct ov7692_work_t_t *sensorw = i2c_get_clientdata(client);
+ free_irq(client->irq, sensorw);
+ ov7692_client = NULL;
+ kfree(sensorw);
+ return 0;
+}
+
+static struct i2c_driver ov7692_i2c_driver = {
+ .id_table = ov7692_i2c_id,
+ .probe = ov7692_i2c_probe,
+ .remove = __exit_p(ov7692_i2c_remove),
+ .driver = {
+ .name = "ov7692",
+ },
+};
+
+int ov7692_sensor_config(void __user *argp)
+{
+ struct sensor_cfg_data cdata;
+ long rc = 0;
+ if (copy_from_user(&cdata,
+ (void *)argp,
+ sizeof(struct sensor_cfg_data)))
+ return -EFAULT;
+ mutex_lock(&ov7692_mut);
+ CDBG("ov7692_sensor_config: cfgtype = %d\n", cdata.cfgtype);
+ switch (cdata.cfgtype) {
+ case CFG_SET_MODE:
+ rc = ov7692_set_sensor_mode(cdata.mode,
+ cdata.rs);
+ break;
+ case CFG_PWR_DOWN:
+ ov7692_power_down();
+ break;
+ default:
+ rc = -EFAULT;
+ break;
+ }
+
+ mutex_unlock(&ov7692_mut);
+
+ return rc;
+}
+static int ov7692_sensor_release(void)
+{
+ int rc = -EBADF;
+ mutex_lock(&ov7692_mut);
+ ov7692_sw_reset();
+ ov7692_power_down();
+ kfree(ov7692_ctrl);
+ ov7692_ctrl = NULL;
+ CDBG("ov7692_release completed\n");
+ mutex_unlock(&ov7692_mut);
+
+ return rc;
+}
+
+static int ov7692_probe_init_gpio(const struct msm_camera_sensor_info *data)
+{
+ int rc = 0;
+
+ ov7692_pwdn_gpio = data->sensor_pwd;
+ ov7692_reset_gpio = data->sensor_reset ;
+
+ if (data->sensor_reset_enable)
+ gpio_direction_output(data->sensor_reset, 1);
+
+ gpio_direction_output(data->sensor_pwd, 1);
+
+ return rc;
+
+}
+
+
+static int ov7692_sensor_probe(const struct msm_camera_sensor_info *info,
+ struct msm_sensor_ctrl *s)
+{
+ int rc = 0;
+ rc = i2c_add_driver(&ov7692_i2c_driver);
+ if (rc < 0 || ov7692_client == NULL) {
+ rc = -ENOTSUPP;
+ goto probe_fail;
+ }
+
+ rc = ov7692_probe_init_gpio(info);
+ if (rc < 0) {
+ CDBG("%s: gpio init failed\n", __func__);
+ goto probe_fail;
+ }
+
+ ov7692_power_down();
+
+ msm_camio_clk_rate_set(24000000);
+ msleep(20);
+
+ ov7692_power_on();
+ msleep(20);
+
+ if (info->sensor_reset_enable)
+ ov7692_hw_reset();
+ else
+ ov7692_sw_reset();
+
+ rc = ov7692_probe_init_sensor(info);
+ if (rc < 0)
+ goto probe_fail;
+
+
+ s->s_init = ov7692_sensor_open_init;
+ s->s_release = ov7692_sensor_release;
+ s->s_config = ov7692_sensor_config;
+ s->s_camera_type = FRONT_CAMERA_2D;
+ s->s_mount_angle = info->sensor_platform_info->mount_angle;
+
+ ov7692_power_down();
+
+ return rc;
+
+probe_fail:
+ CDBG("ov7692_sensor_probe: SENSOR PROBE FAILS!\n");
+ i2c_del_driver(&ov7692_i2c_driver);
+ return rc;
+}
+
+static int __ov7692_probe(struct platform_device *pdev)
+{
+ return msm_camera_drv_start(pdev, ov7692_sensor_probe);
+}
+
+static struct platform_driver msm_camera_driver = {
+ .probe = __ov7692_probe,
+ .driver = {
+ .name = "msm_camera_ov7692",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init ov7692_init(void)
+{
+ return platform_driver_register(&msm_camera_driver);
+}
+
+module_init(ov7692_init);
+
+MODULE_DESCRIPTION("OMNI VGA YUV sensor driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/mfd/pm8018-core.c b/drivers/mfd/pm8018-core.c
index 1567c5b..528f232 100644
--- a/drivers/mfd/pm8018-core.c
+++ b/drivers/mfd/pm8018-core.c
@@ -21,6 +21,7 @@
#include <linux/mfd/core.h>
#include <linux/mfd/pm8xxx/pm8018.h>
#include <linux/mfd/pm8xxx/core.h>
+#include <linux/leds-pm8xxx.h>
/* PMIC PM8018 SSBI Addresses */
@@ -215,6 +216,16 @@
.pdata_size = sizeof("pm8018-dbg"),
};
+static struct mfd_cell pwm_cell __devinitdata = {
+ .name = PM8XXX_PWM_DEV_NAME,
+ .id = -1,
+};
+
+static struct mfd_cell leds_cell __devinitdata = {
+ .name = PM8XXX_LEDS_DEV_NAME,
+ .id = -1,
+};
+
static int __devinit
pm8018_add_subdevices(const struct pm8018_platform_data *pdata,
struct pm8018 *pmic)
@@ -303,6 +314,15 @@
irq_base);
if (ret) {
pr_err("Failed to add adc subdevice ret=%d\n", ret);
+ }
+ }
+
+ if (pdata->leds_pdata) {
+ leds_cell.platform_data = pdata->leds_pdata;
+ leds_cell.pdata_size = sizeof(struct pm8xxx_led_platform_data);
+ ret = mfd_add_devices(pmic->dev, 0, &leds_cell, 1, NULL, 0);
+ if (ret) {
+ pr_err("Failed to add leds subdevice ret=%d\n", ret);
goto bail;
}
}
@@ -313,6 +333,12 @@
goto bail;
}
+ ret = mfd_add_devices(pmic->dev, 0, &pwm_cell, 1, NULL, 0);
+ if (ret) {
+ pr_err("Failed to add pwm subdevice ret=%d\n", ret);
+ goto bail;
+ }
+
/* Add one device for each regulator used by the board. */
if (pdata->num_regulators > 0 && pdata->regulator_pdatas) {
mfd_regulators = kzalloc(sizeof(struct mfd_cell)
diff --git a/drivers/mfd/pm8xxx-misc.c b/drivers/mfd/pm8xxx-misc.c
index 00ac2ab..7367e66 100644
--- a/drivers/mfd/pm8xxx-misc.c
+++ b/drivers/mfd/pm8xxx-misc.c
@@ -53,6 +53,12 @@
#define PM8901_REGULATOR_PMR_STATE_MASK 0x60
#define PM8901_REGULATOR_PMR_STATE_OFF 0x20
+/* GPIO UART MUX CTRL registers */
+#define REG_PM8XXX_GPIO_MUX_CTRL 0x1CC
+
+#define UART_PATH_SEL_MASK 0x60
+#define UART_PATH_SEL_SHIFT 0x5
+
struct pm8xxx_misc_chip {
struct list_head link;
struct pm8xxx_misc_platform_data pdata;
@@ -260,6 +266,47 @@
}
EXPORT_SYMBOL_GPL(pm8xxx_reset_pwr_off);
+/**
+ * pm8xxx_uart_gpio_mux_ctrl - Mux configuration to select the UART
+ *
+ * @uart_path_sel: Input argument to select either UART1/2/3
+ *
+ * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
+ */
+int pm8xxx_uart_gpio_mux_ctrl(enum pm8xxx_uart_path_sel uart_path_sel)
+{
+ struct pm8xxx_misc_chip *chip;
+ unsigned long flags;
+ int rc = 0;
+
+ spin_lock_irqsave(&pm8xxx_misc_chips_lock, flags);
+
+ /* Loop over all attached PMICs and call specific functions for them. */
+ list_for_each_entry(chip, &pm8xxx_misc_chips, link) {
+ switch (chip->version) {
+ case PM8XXX_VERSION_8018:
+ case PM8XXX_VERSION_8058:
+ case PM8XXX_VERSION_8921:
+ rc = pm8xxx_misc_masked_write(chip,
+ REG_PM8XXX_GPIO_MUX_CTRL, UART_PATH_SEL_MASK,
+ uart_path_sel << UART_PATH_SEL_SHIFT);
+ break;
+ default:
+ /* Functionality not supported */
+ break;
+ }
+ if (rc) {
+ pr_err("uart_gpio_mux_ctrl failed, rc=%d\n", rc);
+ break;
+ }
+ }
+
+ spin_unlock_irqrestore(&pm8xxx_misc_chips_lock, flags);
+
+ return rc;
+}
+EXPORT_SYMBOL(pm8xxx_uart_gpio_mux_ctrl);
+
static int __devinit pm8xxx_misc_probe(struct platform_device *pdev)
{
const struct pm8xxx_misc_platform_data *pdata = pdev->dev.platform_data;
diff --git a/drivers/mfd/pm8xxx-pwm.c b/drivers/mfd/pm8xxx-pwm.c
index ca9eebb..fa4b130 100644
--- a/drivers/mfd/pm8xxx-pwm.c
+++ b/drivers/mfd/pm8xxx-pwm.c
@@ -25,12 +25,33 @@
#include <linux/mfd/pm8xxx/core.h>
#include <linux/mfd/pm8xxx/pwm.h>
-#define PM8XXX_LPG_BANKS 8
-#define PM8XXX_PWM_CHANNELS PM8XXX_LPG_BANKS
+#define PM8XXX_PWM_CHANNELS 3
+#define PM8XXX_LPG_BANKS 8
+#define PM8XXX_LPG_PWM_CHANNELS PM8XXX_LPG_BANKS
#define PM8XXX_LPG_CTL_REGS 7
/* PM8XXX PWM */
+#define SSBI_REG_ADDR_PWM1_CTRL1 0x88
+#define SSBI_REG_ADDR_PWM1_CTRL2 0x89
+#define SSBI_REG_ADDR_PWM_CTL(id, base) (id == 0 ? base : (base + (id << 1)))
+#define SSBI_REG_ADDR_PWM_CTL1(id) SSBI_REG_ADDR_PWM_CTL(id, \
+ SSBI_REG_ADDR_PWM1_CTRL1)
+#define SSBI_REG_ADDR_PWM_CTL2(id) SSBI_REG_ADDR_PWM_CTL(id, \
+ SSBI_REG_ADDR_PWM1_CTRL2)
+
+#define PM8XXX_PWM_CLK_SEL_SHIFT 6
+#define PM8XXX_PWM_CLK_SEL_MASK 0xC0
+#define PM8XXX_PWM_PREDIVIDE_SHIFT 5
+#define PM8XXX_PWM_PREDIVIDE_MASK 0x20
+#define PM8XXX_PWM_M_SHIFT 2
+#define PM8XXX_PWM_M_MASK 0x1C
+#define PM8XXX_PWM_SIZE_SHIFT 1
+#define PM8XXX_PWM_SIZE_MASK 0x02
+#define PM8XXX_PWM_VALUE_BIT0 0x01
+#define PM8XXX_PWM_DISABLE 0x3F
+
+/* PM8XXX LPG PWM */
#define SSBI_REG_ADDR_LPG_CTL_BASE 0x13C
#define SSBI_REG_ADDR_LPG_CTL(n) (SSBI_REG_ADDR_LPG_CTL_BASE + (n))
#define SSBI_REG_ADDR_LPG_BANK_SEL 0x143
@@ -38,7 +59,7 @@
#define SSBI_REG_ADDR_LPG_LUT_CFG0 0x145
#define SSBI_REG_ADDR_LPG_LUT_CFG1 0x146
-/* Control 0 */
+/* LPG Control 0 */
#define PM8XXX_PWM_1KHZ_COUNT_MASK 0xF0
#define PM8XXX_PWM_1KHZ_COUNT_SHIFT 4
@@ -54,51 +75,51 @@
#define PM8XXX_PWM_RAMP_GEN_START (PM8XXX_PWM_RAMP_GEN_EN \
| PM8XXX_PWM_RAMP_START)
-/* Control 1 */
+/* LPG Control 1 */
#define PM8XXX_PWM_REVERSE_EN 0x80
#define PM8XXX_PWM_BYPASS_LUT 0x40
#define PM8XXX_PWM_HIGH_INDEX_MASK 0x3F
-/* Control 2 */
+/* LPG Control 2 */
#define PM8XXX_PWM_LOOP_EN 0x80
#define PM8XXX_PWM_RAMP_UP 0x40
#define PM8XXX_PWM_LOW_INDEX_MASK 0x3F
-/* Control 3 */
+/* LPG Control 3 */
#define PM8XXX_PWM_VALUE_BIT7_0 0xFF
#define PM8XXX_PWM_VALUE_BIT5_0 0x3F
-/* Control 4 */
+/* LPG Control 4 */
#define PM8XXX_PWM_VALUE_BIT8 0x80
-#define PM8XXX_PWM_CLK_SEL_MASK 0x60
-#define PM8XXX_PWM_CLK_SEL_SHIFT 5
+#define PM8XXX_LPG_PWM_CLK_SEL_MASK 0x60
+#define PM8XXX_LPG_PWM_CLK_SEL_SHIFT 5
#define PM8XXX_PWM_CLK_SEL_NO 0
#define PM8XXX_PWM_CLK_SEL_1KHZ 1
#define PM8XXX_PWM_CLK_SEL_32KHZ 2
#define PM8XXX_PWM_CLK_SEL_19P2MHZ 3
-#define PM8XXX_PWM_PREDIVIDE_MASK 0x18
-#define PM8XXX_PWM_PREDIVIDE_SHIFT 3
+#define PM8XXX_LPG_PWM_PREDIVIDE_MASK 0x18
+#define PM8XXX_LPG_PWM_PREDIVIDE_SHIFT 3
#define PM8XXX_PWM_PREDIVIDE_2 0
#define PM8XXX_PWM_PREDIVIDE_3 1
#define PM8XXX_PWM_PREDIVIDE_5 2
#define PM8XXX_PWM_PREDIVIDE_6 3
-#define PM8XXX_PWM_M_MASK 0x07
+#define PM8XXX_LPG_PWM_M_MASK 0x07
#define PM8XXX_PWM_M_MIN 0
#define PM8XXX_PWM_M_MAX 7
-/* Control 5 */
+/* LPG Control 5 */
#define PM8XXX_PWM_PAUSE_COUNT_HI_MASK 0xFC
#define PM8XXX_PWM_PAUSE_COUNT_HI_SHIFT 2
#define PM8XXX_PWM_PAUSE_ENABLE_HIGH 0x02
#define PM8XXX_PWM_SIZE_9_BIT 0x01
-/* Control 6 */
+/* LPG Control 6 */
#define PM8XXX_PWM_PAUSE_COUNT_LO_MASK 0xFC
#define PM8XXX_PWM_PAUSE_COUNT_LO_SHIFT 2
@@ -107,11 +128,10 @@
#define PM8XXX_PWM_PAUSE_COUNT_MAX 56 /* < 2^6 = 64 */
-/* LUT_CFG1 */
+/* LPG LUT_CFG1 */
#define PM8XXX_PWM_LUT_READ 0x40
-
/*
* PWM Frequency = Clock Frequency / (N * T)
* or
@@ -132,7 +152,8 @@
#define CLK_PERIOD_MIN NSEC_19P2MHZ
#define CLK_PERIOD_MAX NSEC_1000HZ
-#define NUM_PRE_DIVIDE 3 /* No default support for pre-divide = 6 */
+#define NUM_LPG_PRE_DIVIDE 3 /* No default support for pre-divide = 6 */
+#define NUM_PWM_PRE_DIVIDE 2
#define PRE_DIVIDE_0 2
#define PRE_DIVIDE_1 3
@@ -141,7 +162,7 @@
#define PRE_DIVIDE_MIN PRE_DIVIDE_0
#define PRE_DIVIDE_MAX PRE_DIVIDE_2
-static unsigned int pt_t[NUM_PRE_DIVIDE][NUM_CLOCKS] = {
+static unsigned int pt_t[NUM_LPG_PRE_DIVIDE][NUM_CLOCKS] = {
{ PRE_DIVIDE_0 * NSEC_1000HZ,
PRE_DIVIDE_0 * NSEC_32768HZ,
PRE_DIVIDE_0 * NSEC_19P2MHZ,
@@ -170,17 +191,22 @@
int pwm_value;
int pwm_period;
int pwm_duty;
- u8 pwm_ctl[PM8XXX_LPG_CTL_REGS];
+ u8 pwm_lpg_ctl[PM8XXX_LPG_CTL_REGS];
+ u8 pwm_ctl1;
+ u8 pwm_ctl2;
int irq;
struct pm8xxx_pwm_chip *chip;
int bypass_lut;
};
struct pm8xxx_pwm_chip {
- struct pwm_device pwm_dev[PM8XXX_PWM_CHANNELS];
+ struct pwm_device *pwm_dev;
+ u8 pwm_channels;
+ u8 pwm_total_pre_divs;
u8 bank_mask;
struct mutex pwm_mutex;
struct device *dev;
+ bool is_lpg_supported;
};
static struct pm8xxx_pwm_chip *pwm_chip;
@@ -255,13 +281,13 @@
u8 reg;
if (start) {
- reg = pwm->pwm_ctl[0] | PM8XXX_PWM_PWM_START;
+ reg = pwm->pwm_lpg_ctl[0] | PM8XXX_PWM_PWM_START;
if (ramp_start)
reg |= PM8XXX_PWM_RAMP_GEN_START;
else
reg &= ~PM8XXX_PWM_RAMP_GEN_START;
} else {
- reg = pwm->pwm_ctl[0] & ~PM8XXX_PWM_PWM_START;
+ reg = pwm->pwm_lpg_ctl[0] & ~PM8XXX_PWM_PWM_START;
reg &= ~PM8XXX_PWM_RAMP_GEN_START;
}
@@ -270,7 +296,40 @@
if (rc)
pr_err("pm8xxx_writeb(): rc=%d (Enable PWM Ctl 0)\n", rc);
else
- pwm->pwm_ctl[0] = reg;
+ pwm->pwm_lpg_ctl[0] = reg;
+ return rc;
+}
+
+static int pm8xxx_pwm_disable(struct pwm_device *pwm)
+{
+ int rc;
+ u8 reg;
+
+ reg = pwm->pwm_ctl1 & PM8XXX_PWM_DISABLE;
+
+ rc = pm8xxx_writeb(pwm->chip->dev->parent,
+ SSBI_REG_ADDR_PWM_CTL1(pwm->pwm_id), reg);
+
+ if (rc)
+ pr_err("pm8xxx_writeb(): rc=%d (Disable PWM Ctl %d)\n", rc,
+ pwm->pwm_id);
+ return rc;
+}
+
+static int pm8xxx_pwm_enable(struct pwm_device *pwm)
+{
+ /**
+ * A kind of best Effort: Just write the clock information that
+ * we have in the register.
+ */
+ int rc;
+
+ rc = pm8xxx_writeb(pwm->chip->dev->parent,
+ SSBI_REG_ADDR_PWM_CTL1(pwm->pwm_id), pwm->pwm_ctl1);
+
+ if (rc)
+ pr_err("pm8xxx_writeb(): rc=%d (Enable PWM Ctl %d)\n", rc,
+ pwm->pwm_id);
return rc;
}
@@ -304,7 +363,7 @@
best_clk = 0;
best_div = 0;
for (clk = 0; clk < NUM_CLOCKS; clk++) {
- for (div = 0; div < NUM_PRE_DIVIDE; div++) {
+ for (div = 0; div < pwm_chip->pwm_total_pre_divs; div++) {
tmp_p = period_n;
last_p = tmp_p;
for (m = 0; m <= PM8XXX_PWM_M_MAX; m++) {
@@ -384,7 +443,7 @@
int i, pwm_size;
int rc = 0;
- pwm_size = (pwm->pwm_ctl[5] & PM8XXX_PWM_SIZE_9_BIT) ? 9 : 6;
+ pwm_size = (pwm->pwm_lpg_ctl[5] & PM8XXX_PWM_SIZE_9_BIT) ? 9 : 6;
max_pwm_value = (1 << pwm_size) - 1;
for (i = 0; i < len; i++) {
if (raw_value)
@@ -414,44 +473,65 @@
static void pm8xxx_pwm_save_index(struct pwm_device *pwm,
int low_idx, int high_idx, int flags)
{
- pwm->pwm_ctl[1] = high_idx & PM8XXX_PWM_HIGH_INDEX_MASK;
- pwm->pwm_ctl[2] = low_idx & PM8XXX_PWM_LOW_INDEX_MASK;
+ pwm->pwm_lpg_ctl[1] = high_idx & PM8XXX_PWM_HIGH_INDEX_MASK;
+ pwm->pwm_lpg_ctl[2] = low_idx & PM8XXX_PWM_LOW_INDEX_MASK;
if (flags & PM_PWM_LUT_REVERSE)
- pwm->pwm_ctl[1] |= PM8XXX_PWM_REVERSE_EN;
+ pwm->pwm_lpg_ctl[1] |= PM8XXX_PWM_REVERSE_EN;
if (flags & PM_PWM_LUT_RAMP_UP)
- pwm->pwm_ctl[2] |= PM8XXX_PWM_RAMP_UP;
+ pwm->pwm_lpg_ctl[2] |= PM8XXX_PWM_RAMP_UP;
if (flags & PM_PWM_LUT_LOOP)
- pwm->pwm_ctl[2] |= PM8XXX_PWM_LOOP_EN;
+ pwm->pwm_lpg_ctl[2] |= PM8XXX_PWM_LOOP_EN;
}
static void pm8xxx_pwm_save_period(struct pwm_device *pwm)
{
u8 mask, val;
- val = ((pwm->period.clk + 1) << PM8XXX_PWM_CLK_SEL_SHIFT)
- & PM8XXX_PWM_CLK_SEL_MASK;
- val |= (pwm->period.pre_div << PM8XXX_PWM_PREDIVIDE_SHIFT)
- & PM8XXX_PWM_PREDIVIDE_MASK;
- val |= pwm->period.pre_div_exp & PM8XXX_PWM_M_MASK;
- mask = PM8XXX_PWM_CLK_SEL_MASK | PM8XXX_PWM_PREDIVIDE_MASK |
- PM8XXX_PWM_M_MASK;
- pm8xxx_pwm_save(&pwm->pwm_ctl[4], mask, val);
+ if (pwm_chip->is_lpg_supported) {
+ val = ((pwm->period.clk + 1) << PM8XXX_LPG_PWM_CLK_SEL_SHIFT)
+ & PM8XXX_LPG_PWM_CLK_SEL_MASK;
+ val |= (pwm->period.pre_div << PM8XXX_LPG_PWM_PREDIVIDE_SHIFT)
+ & PM8XXX_LPG_PWM_PREDIVIDE_MASK;
+ val |= pwm->period.pre_div_exp & PM8XXX_LPG_PWM_M_MASK;
+ mask = PM8XXX_LPG_PWM_CLK_SEL_MASK |
+ PM8XXX_LPG_PWM_PREDIVIDE_MASK | PM8XXX_LPG_PWM_M_MASK;
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[4], mask, val);
- val = (pwm->period.pwm_size > 6) ? PM8XXX_PWM_SIZE_9_BIT : 0;
- mask = PM8XXX_PWM_SIZE_9_BIT;
- pm8xxx_pwm_save(&pwm->pwm_ctl[5], mask, val);
+ val = (pwm->period.pwm_size > 6) ? PM8XXX_PWM_SIZE_9_BIT : 0;
+ mask = PM8XXX_PWM_SIZE_9_BIT;
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[5], mask, val);
+ } else {
+ val = ((pwm->period.clk + 1) << PM8XXX_PWM_CLK_SEL_SHIFT)
+ & PM8XXX_PWM_CLK_SEL_MASK;
+ val |= (pwm->period.pre_div << PM8XXX_PWM_PREDIVIDE_SHIFT)
+ & PM8XXX_PWM_PREDIVIDE_MASK;
+ val |= (pwm->period.pre_div_exp << PM8XXX_PWM_M_SHIFT)
+ & PM8XXX_PWM_M_MASK;
+ val |= (((pwm->period.pwm_size > 6) ? PM8XXX_PWM_SIZE_9_BIT : 0)
+ << PM8XXX_PWM_SIZE_SHIFT) & PM8XXX_PWM_SIZE_MASK;
+
+ mask = PM8XXX_PWM_CLK_SEL_MASK | PM8XXX_PWM_PREDIVIDE_MASK |
+ PM8XXX_PWM_M_MASK | PM8XXX_PWM_SIZE_MASK;
+ pm8xxx_pwm_save(&pwm->pwm_ctl1, mask, val);
+ }
}
static void pm8xxx_pwm_save_pwm_value(struct pwm_device *pwm)
{
u8 mask, val;
- pwm->pwm_ctl[3] = pwm->pwm_value;
-
- val = (pwm->period.pwm_size > 6) ? (pwm->pwm_value >> 1) : 0;
- mask = PM8XXX_PWM_VALUE_BIT8;
- pm8xxx_pwm_save(&pwm->pwm_ctl[4], mask, val);
+ if (pwm_chip->is_lpg_supported) {
+ val = (pwm->period.pwm_size > 6) ? (pwm->pwm_value >> 1) : 0;
+ pwm->pwm_lpg_ctl[3] = pwm->pwm_value;
+ mask = PM8XXX_PWM_VALUE_BIT8;
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[4], mask, val);
+ } else {
+ val = (pwm->period.pwm_size > 6) ? (pwm->pwm_value >> 8) : 0;
+ pwm->pwm_ctl2 = pwm->pwm_value;
+ mask = PM8XXX_PWM_VALUE_BIT0;
+ pm8xxx_pwm_save(&pwm->pwm_ctl1, mask, val);
+ }
}
static void pm8xxx_pwm_save_duty_time(struct pwm_device *pwm,
@@ -468,7 +548,7 @@
val = i << PM8XXX_PWM_1KHZ_COUNT_SHIFT;
mask = PM8XXX_PWM_1KHZ_COUNT_MASK;
- pm8xxx_pwm_save(&pwm->pwm_ctl[0], mask, val);
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[0], mask, val);
}
static void pm8xxx_pwm_save_pause(struct pwm_device *pwm,
@@ -477,7 +557,7 @@
int i, pause_cnt, time_cnt;
u8 mask, val;
- time_cnt = (pwm->pwm_ctl[0] & PM8XXX_PWM_1KHZ_COUNT_MASK)
+ time_cnt = (pwm->pwm_lpg_ctl[0] & PM8XXX_PWM_1KHZ_COUNT_MASK)
>> PM8XXX_PWM_1KHZ_COUNT_SHIFT;
if (lut->flags & PM_PWM_LUT_PAUSE_HI_EN) {
pause_cnt = (lut->lut_pause_hi + duty_msec[time_cnt] / 2)
@@ -495,7 +575,7 @@
}
mask = PM8XXX_PWM_PAUSE_COUNT_HI_MASK | PM8XXX_PWM_PAUSE_ENABLE_HIGH;
- pm8xxx_pwm_save(&pwm->pwm_ctl[5], mask, val);
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[5], mask, val);
if (lut->flags & PM_PWM_LUT_PAUSE_LO_EN) {
/* Linear search for pause time */
@@ -513,10 +593,35 @@
}
mask = PM8XXX_PWM_PAUSE_COUNT_LO_MASK | PM8XXX_PWM_PAUSE_ENABLE_LOW;
- pm8xxx_pwm_save(&pwm->pwm_ctl[6], mask, val);
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[6], mask, val);
}
-static int pm8xxx_pwm_write(struct pwm_device *pwm, int start, int end)
+static int pm8xxx_pwm_write(struct pwm_device *pwm)
+{
+ int rc = 0;
+
+ rc = pm8xxx_writeb(pwm->chip->dev->parent,
+ SSBI_REG_ADDR_PWM_CTL1(pwm->pwm_id),
+ pwm->pwm_ctl1);
+ if (rc) {
+ pr_err("pm8xxx_writeb() failed: rc=%d (PWM Ctl1[%d])\n",
+ rc, pwm->pwm_id);
+ return rc;
+ }
+
+ rc = pm8xxx_writeb(pwm->chip->dev->parent,
+ SSBI_REG_ADDR_PWM_CTL2(pwm->pwm_id),
+ pwm->pwm_ctl2);
+ if (rc) {
+ pr_err("pm8xxx_writeb() failed: rc=%d (PWM Ctl2[%d])\n",
+ rc, pwm->pwm_id);
+ return rc;
+ }
+
+ return rc;
+}
+
+static int pm8xxx_lpg_pwm_write(struct pwm_device *pwm, int start, int end)
{
int i, rc;
@@ -524,7 +629,7 @@
for (i = end - 1; i >= start; i--) {
rc = pm8xxx_writeb(pwm->chip->dev->parent,
SSBI_REG_ADDR_LPG_CTL(i),
- pwm->pwm_ctl[i]);
+ pwm->pwm_lpg_ctl[i]);
if (rc) {
pr_err("pm8xxx_writeb(): rc=%d (PWM Ctl[%d])\n", rc, i);
return rc;
@@ -543,10 +648,10 @@
lut->lut_hi_index, lut->flags);
pm8xxx_pwm_save_duty_time(pwm, lut);
pm8xxx_pwm_save_pause(pwm, lut);
- pm8xxx_pwm_save(&pwm->pwm_ctl[1], PM8XXX_PWM_BYPASS_LUT, 0);
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[1], PM8XXX_PWM_BYPASS_LUT, 0);
pm8xxx_pwm_bank_sel(pwm);
- rc = pm8xxx_pwm_write(pwm, 0, 7);
+ rc = pm8xxx_lpg_pwm_write(pwm, 0, 7);
return rc;
}
@@ -561,16 +666,17 @@
{
struct pwm_device *pwm;
- if (pwm_id > PM8XXX_PWM_CHANNELS || pwm_id < 0) {
- pr_err("Invalid pwm_id: %d with %s\n",
- pwm_id, label ? label : ".");
- return ERR_PTR(-EINVAL);
- }
if (pwm_chip == NULL) {
pr_err("No pwm_chip\n");
return ERR_PTR(-ENODEV);
}
+ if (pwm_id >= pwm_chip->pwm_channels || pwm_id < 0) {
+ pr_err("Invalid pwm_id: %d with %s\n",
+ pwm_id, label ? label : ".");
+ return ERR_PTR(-EINVAL);
+ }
+
mutex_lock(&pwm_chip->pwm_mutex);
pwm = &pwm_chip->pwm_dev[pwm_id];
if (!pwm->in_use) {
@@ -598,13 +704,17 @@
mutex_lock(&pwm->chip->pwm_mutex);
if (pwm->in_use) {
- pm8xxx_pwm_bank_sel(pwm);
- pm8xxx_pwm_start(pwm, 0, 0);
-
+ if (pwm_chip->is_lpg_supported) {
+ pm8xxx_pwm_bank_sel(pwm);
+ pm8xxx_pwm_start(pwm, 0, 0);
+ } else {
+ pm8xxx_pwm_disable(pwm);
+ }
pwm->in_use = 0;
pwm->label = NULL;
}
- pm8xxx_pwm_bank_enable(pwm, 0);
+ if (pwm_chip->is_lpg_supported)
+ pm8xxx_pwm_bank_enable(pwm, 0);
mutex_unlock(&pwm->chip->pwm_mutex);
}
EXPORT_SYMBOL_GPL(pwm_free);
@@ -618,7 +728,7 @@
int pwm_config(struct pwm_device *pwm, int duty_us, int period_us)
{
struct pm8xxx_pwm_period *period;
- int rc;
+ int rc = 0;
if (pwm == NULL || IS_ERR(pwm) ||
duty_us > period_us ||
@@ -649,11 +759,16 @@
pm8xxx_pwm_calc_pwm_value(pwm, period_us, duty_us);
pm8xxx_pwm_save_pwm_value(pwm);
- pm8xxx_pwm_save(&pwm->pwm_ctl[1],
- PM8XXX_PWM_BYPASS_LUT, PM8XXX_PWM_BYPASS_LUT);
- pm8xxx_pwm_bank_sel(pwm);
- rc = pm8xxx_pwm_write(pwm, 1, 6);
+ if (pwm_chip->is_lpg_supported) {
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[1],
+ PM8XXX_PWM_BYPASS_LUT, PM8XXX_PWM_BYPASS_LUT);
+
+ pm8xxx_pwm_bank_sel(pwm);
+ rc = pm8xxx_lpg_pwm_write(pwm, 1, 6);
+ } else {
+ rc = pm8xxx_pwm_write(pwm);
+ }
pr_debug("duty/period=%u/%u usec: pwm_value=%d (of %d)\n",
(unsigned)duty_us, (unsigned)period_us,
@@ -671,7 +786,7 @@
*/
int pwm_enable(struct pwm_device *pwm)
{
- int rc;
+ int rc = 0;
if (pwm == NULL || IS_ERR(pwm)) {
pr_err("Invalid pwm handle\n");
@@ -687,10 +802,13 @@
pr_err("pwm_id: %d: stale handle?\n", pwm->pwm_id);
rc = -EINVAL;
} else {
- rc = pm8xxx_pwm_bank_enable(pwm, 1);
-
- pm8xxx_pwm_bank_sel(pwm);
- pm8xxx_pwm_start(pwm, 1, 0);
+ if (pwm_chip->is_lpg_supported) {
+ rc = pm8xxx_pwm_bank_enable(pwm, 1);
+ pm8xxx_pwm_bank_sel(pwm);
+ pm8xxx_pwm_start(pwm, 1, 0);
+ } else {
+ pm8xxx_pwm_enable(pwm);
+ }
}
mutex_unlock(&pwm->chip->pwm_mutex);
return rc;
@@ -710,10 +828,13 @@
mutex_lock(&pwm->chip->pwm_mutex);
if (pwm->in_use) {
- pm8xxx_pwm_bank_sel(pwm);
- pm8xxx_pwm_start(pwm, 0, 0);
-
- pm8xxx_pwm_bank_enable(pwm, 0);
+ if (pwm_chip->is_lpg_supported) {
+ pm8xxx_pwm_bank_sel(pwm);
+ pm8xxx_pwm_start(pwm, 0, 0);
+ pm8xxx_pwm_bank_enable(pwm, 0);
+ } else {
+ pm8xxx_pwm_disable(pwm);
+ }
}
mutex_unlock(&pwm->chip->pwm_mutex);
}
@@ -748,8 +869,14 @@
pwm->period.pre_div_exp = period->pre_div_exp;
pm8xxx_pwm_save_period(pwm);
- pm8xxx_pwm_bank_sel(pwm);
- rc = pm8xxx_pwm_write(pwm, 4, 6);
+
+ if (pwm_chip->is_lpg_supported) {
+ pm8xxx_pwm_bank_sel(pwm);
+ rc = pm8xxx_lpg_pwm_write(pwm, 4, 6);
+ } else {
+ rc = pm8xxx_pwm_write(pwm);
+ }
+
out_unlock:
mutex_unlock(&pwm->chip->pwm_mutex);
@@ -784,11 +911,15 @@
pwm->pwm_value = pwm_value;
pm8xxx_pwm_save_pwm_value(pwm);
- pm8xxx_pwm_save(&pwm->pwm_ctl[1],
- PM8XXX_PWM_BYPASS_LUT, PM8XXX_PWM_BYPASS_LUT);
- pm8xxx_pwm_bank_sel(pwm);
- rc = pm8xxx_pwm_write(pwm, 1, 6);
+ if (pwm_chip->is_lpg_supported) {
+ pm8xxx_pwm_save(&pwm->pwm_lpg_ctl[1],
+ PM8XXX_PWM_BYPASS_LUT, PM8XXX_PWM_BYPASS_LUT);
+ pm8xxx_pwm_bank_sel(pwm);
+ rc = pm8xxx_lpg_pwm_write(pwm, 1, 6);
+ } else {
+ rc = pm8xxx_pwm_write(pwm);
+ }
if (rc)
pr_err("[%d]: pm8xxx_pwm_write: rc=%d\n", pwm->pwm_id, rc);
@@ -832,6 +963,12 @@
pr_err("No pwm_chip\n");
return -ENODEV;
}
+
+ if (pwm->chip->is_lpg_supported == 0) {
+ pr_err("LPG module isn't supported\n");
+ return -EINVAL;
+ }
+
if (idx_len >= PM_PWM_LUT_SIZE && start_idx) {
pr_err("Wrong LUT size or index\n");
return -EINVAL;
@@ -904,6 +1041,10 @@
pr_err("No pwm_chip\n");
return -ENODEV;
}
+ if (pwm->chip->is_lpg_supported == 0) {
+ pr_err("LPG module isn't supported\n");
+ return -EINVAL;
+ }
mutex_lock(&pwm->chip->pwm_mutex);
if (start) {
@@ -940,7 +1081,7 @@
struct device *dev;
struct dentry *dent;
- struct pm8xxx_pwm_user user[PM8XXX_PWM_CHANNELS];
+ struct pm8xxx_pwm_user *user;
};
static struct pm8xxx_pwm_dbg_device *pmic_dbg_device;
@@ -1101,6 +1242,14 @@
return -ENOMEM;
}
+ dbgdev->user = kcalloc(pwm_chip->pwm_channels,
+ sizeof(struct pm8xxx_pwm_user), GFP_KERNEL);
+ if (dbgdev->user == NULL) {
+ pr_err("kcalloc() failed.\n");
+ kfree(dbgdev);
+ return -ENOMEM;
+ }
+
mutex_init(&dbgdev->dbg_mutex);
dbgdev->dev = dev;
@@ -1113,7 +1262,7 @@
dbgdev->dent = dent;
- for (i = 0; i < PM8XXX_PWM_CHANNELS; i++) {
+ for (i = 0; i < pwm_chip->pwm_channels; i++) {
char pwm_ch[] = "0";
pwm_ch[0] = '0' + i;
@@ -1160,6 +1309,7 @@
static int __devexit pm8xxx_pwm_dbg_remove(void)
{
if (pmic_dbg_device) {
+ kfree(pmic_dbg_device->user);
debugfs_remove_recursive(pmic_dbg_device->dent);
kfree(pmic_dbg_device);
}
@@ -1184,6 +1334,7 @@
{
struct pm8xxx_pwm_chip *chip;
int i;
+ enum pm8xxx_version version;
chip = kzalloc(sizeof *chip, GFP_KERNEL);
if (chip == NULL) {
@@ -1191,15 +1342,39 @@
return -ENOMEM;
}
- for (i = 0; i < PM8XXX_PWM_CHANNELS; i++) {
- chip->pwm_dev[i].pwm_id = i;
- chip->pwm_dev[i].chip = chip;
- }
-
mutex_init(&chip->pwm_mutex);
chip->dev = &pdev->dev;
pwm_chip = chip;
+
+ version = pm8xxx_get_version(chip->dev->parent);
+
+ if (version == PM8XXX_VERSION_8921 ||
+ version == PM8XXX_VERSION_8058) {
+ chip->is_lpg_supported = 1;
+ }
+ if (chip->is_lpg_supported) {
+ chip->pwm_channels = PM8XXX_LPG_PWM_CHANNELS;
+ chip->pwm_total_pre_divs = NUM_LPG_PRE_DIVIDE;
+ } else {
+ chip->pwm_channels = PM8XXX_PWM_CHANNELS;
+ chip->pwm_total_pre_divs = NUM_PWM_PRE_DIVIDE;
+ }
+
+ chip->pwm_dev = kcalloc(chip->pwm_channels, sizeof(struct pwm_device),
+ GFP_KERNEL);
+ if (chip->pwm_dev == NULL) {
+ pr_err("kcalloc() failed.\n");
+ mutex_destroy(&chip->pwm_mutex);
+ kfree(chip);
+ return -ENOMEM;
+ }
+
+ for (i = 0; i < chip->pwm_channels; i++) {
+ chip->pwm_dev[i].pwm_id = i;
+ chip->pwm_dev[i].chip = chip;
+ }
+
platform_set_drvdata(pdev, chip);
if (pm8xxx_pwm_dbg_probe(&pdev->dev) < 0)
@@ -1214,6 +1389,7 @@
struct pm8xxx_pwm_chip *chip = dev_get_drvdata(pdev->dev.parent);
pm8xxx_pwm_dbg_remove();
+ kfree(chip->pwm_dev);
mutex_destroy(&chip->pwm_mutex);
platform_set_drvdata(pdev, NULL);
kfree(chip);
diff --git a/drivers/mfd/timpani-codec.c b/drivers/mfd/timpani-codec.c
index 364670e..b9ae84e 100644
--- a/drivers/mfd/timpani-codec.c
+++ b/drivers/mfd/timpani-codec.c
@@ -48,6 +48,7 @@
IGNORE = 2,
};
#define TIMPANI_ARRAY_SIZE (TIMPANI_A_CDC_COMP_HALT + 1)
+#define MAX_SHADOW_RIGISTERS TIMPANI_A_CDC_COMP_HALT
static u8 timpani_shadow[TIMPANI_ARRAY_SIZE];
@@ -2765,6 +2766,19 @@
int rc = 0;
u8 new_val;
+ if (reg > MAX_SHADOW_RIGISTERS) {
+ pr_debug("register number is out of bound for shadow"
+ " registers reg = %d\n", reg);
+ new_val = (val & mask);
+ rc = marimba_write_bit_mask(adie_codec.pdrv_ptr, reg, &new_val,
+ 1, 0xFF);
+ if (IS_ERR_VALUE(rc)) {
+ pr_err("%s: fail to write reg %x\n", __func__, reg);
+ rc = -EIO;
+ goto error;
+ }
+ return rc;
+ }
new_val = (val & mask) | (timpani_shadow[reg] & ~mask);
if (!(timpani_register_is_cacheable(reg) &&
(new_val == timpani_shadow[reg]))) {
diff --git a/drivers/misc/eeprom/eeprom_93cx6.c b/drivers/misc/eeprom/eeprom_93cx6.c
index 7b33de9..6ffe9e7 100644
--- a/drivers/misc/eeprom/eeprom_93cx6.c
+++ b/drivers/misc/eeprom/eeprom_93cx6.c
@@ -63,6 +63,7 @@
eeprom->reg_data_out = 0;
eeprom->reg_data_clock = 0;
eeprom->reg_chip_select = 1;
+ eeprom->drive_data = 1;
eeprom->register_write(eeprom);
/*
@@ -101,6 +102,7 @@
*/
eeprom->reg_data_in = 0;
eeprom->reg_data_out = 0;
+ eeprom->drive_data = 1;
/*
* Start writing all bits.
@@ -140,6 +142,7 @@
*/
eeprom->reg_data_in = 0;
eeprom->reg_data_out = 0;
+ eeprom->drive_data = 0;
/*
* Start reading all bits.
@@ -231,3 +234,89 @@
}
EXPORT_SYMBOL_GPL(eeprom_93cx6_multiread);
+
+/**
+ * eeprom_93cx6_wren - set the write enable state
+ * @eeprom: Pointer to eeprom structure
+ * @enable: true to enable writes, otherwise disable writes
+ *
+ * Set the EEPROM write enable state to either allow or deny
+ * writes depending on the @enable value.
+ */
+void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom, bool enable)
+{
+ u16 command;
+
+ /* start the command */
+ eeprom_93cx6_startup(eeprom);
+
+ /* create command to enable/disable */
+
+ command = enable ? PCI_EEPROM_EWEN_OPCODE : PCI_EEPROM_EWDS_OPCODE;
+ command <<= (eeprom->width - 2);
+
+ eeprom_93cx6_write_bits(eeprom, command,
+ PCI_EEPROM_WIDTH_OPCODE + eeprom->width);
+
+ eeprom_93cx6_cleanup(eeprom);
+}
+EXPORT_SYMBOL_GPL(eeprom_93cx6_wren);
+
+/**
+ * eeprom_93cx6_write - write data to the EEPROM
+ * @eeprom: Pointer to eeprom structure
+ * @addr: Address to write data to.
+ * @data: The data to write to address @addr.
+ *
+ * Write the @data to the specified @addr in the EEPROM and
+ * waiting for the device to finish writing.
+ *
+ * Note, since we do not expect large number of write operations
+ * we delay in between parts of the operation to avoid using excessive
+ * amounts of CPU time busy waiting.
+ */
+void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom, u8 addr, u16 data)
+{
+ int timeout = 100;
+ u16 command;
+
+ /* start the command */
+ eeprom_93cx6_startup(eeprom);
+
+ command = PCI_EEPROM_WRITE_OPCODE << eeprom->width;
+ command |= addr;
+
+ /* send write command */
+ eeprom_93cx6_write_bits(eeprom, command,
+ PCI_EEPROM_WIDTH_OPCODE + eeprom->width);
+
+ /* send data */
+ eeprom_93cx6_write_bits(eeprom, data, 16);
+
+ /* get ready to check for busy */
+ eeprom->drive_data = 0;
+ eeprom->reg_chip_select = 1;
+ eeprom->register_write(eeprom);
+
+ /* wait at-least 250ns to get DO to be the busy signal */
+ usleep_range(1000, 2000);
+
+ /* wait for DO to go high to signify finish */
+
+ while (true) {
+ eeprom->register_read(eeprom);
+
+ if (eeprom->reg_data_out)
+ break;
+
+ usleep_range(1000, 2000);
+
+ if (--timeout <= 0) {
+ printk(KERN_ERR "%s: timeout\n", __func__);
+ break;
+ }
+ }
+
+ eeprom_93cx6_cleanup(eeprom);
+}
+EXPORT_SYMBOL_GPL(eeprom_93cx6_write);
diff --git a/drivers/misc/pmic8058-xoadc.c b/drivers/misc/pmic8058-xoadc.c
index f21668a..b63800c 100644
--- a/drivers/misc/pmic8058-xoadc.c
+++ b/drivers/misc/pmic8058-xoadc.c
@@ -223,7 +223,7 @@
data_arb_rsv = 0x20;
slot->chan_properties.gain_numerator = 1;
slot->chan_properties.gain_denominator = 1;
- slot->chan_properties.adc_graph = &adc_pmic->adc_graph[0];
+ slot->chan_properties.adc_graph = &adc_pmic->adc_graph[1];
break;
case CHAN_PATH_TYPE7:
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 008f881..93e1ec6 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -153,7 +153,7 @@
if (mrq->done)
mrq->done(mrq);
- mmc_host_clk_gate(host);
+ mmc_host_clk_release(host);
}
}
@@ -215,7 +215,7 @@
host->perf.start = ktime_get();
#endif
}
- mmc_host_clk_ungate(host);
+ mmc_host_clk_hold(host);
led_trigger_event(host->led, LED_FULL);
host->ops->request(host, mrq);
}
@@ -669,15 +669,17 @@
*/
void mmc_set_chip_select(struct mmc_host *host, int mode)
{
+ mmc_host_clk_hold(host);
host->ios.chip_select = mode;
mmc_set_ios(host);
+ mmc_host_clk_release(host);
}
/*
* Sets the host clock to the highest possible frequency that
* is below "hz".
*/
-void mmc_set_clock(struct mmc_host *host, unsigned int hz)
+static void __mmc_set_clock(struct mmc_host *host, unsigned int hz)
{
WARN_ON(hz < host->f_min);
@@ -688,6 +690,13 @@
mmc_set_ios(host);
}
+void mmc_set_clock(struct mmc_host *host, unsigned int hz)
+{
+ mmc_host_clk_hold(host);
+ __mmc_set_clock(host, hz);
+ mmc_host_clk_release(host);
+}
+
#ifdef CONFIG_MMC_CLKGATE
/*
* This gates the clock by setting it to 0 Hz.
@@ -720,7 +729,7 @@
if (host->clk_old) {
BUG_ON(host->ios.clock);
/* This call will also set host->clk_gated to false */
- mmc_set_clock(host, host->clk_old);
+ __mmc_set_clock(host, host->clk_old);
}
}
@@ -748,8 +757,10 @@
*/
void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode)
{
+ mmc_host_clk_hold(host);
host->ios.bus_mode = mode;
mmc_set_ios(host);
+ mmc_host_clk_release(host);
}
/*
@@ -757,8 +768,10 @@
*/
void mmc_set_bus_width(struct mmc_host *host, unsigned int width)
{
+ mmc_host_clk_hold(host);
host->ios.bus_width = width;
mmc_set_ios(host);
+ mmc_host_clk_release(host);
}
/**
@@ -956,8 +969,10 @@
ocr &= 3 << bit;
+ mmc_host_clk_hold(host);
host->ios.vdd = bit;
mmc_set_ios(host);
+ mmc_host_clk_release(host);
} else {
pr_warning("%s: host doesn't support card's voltages\n",
mmc_hostname(host));
@@ -1004,8 +1019,10 @@
*/
void mmc_set_timing(struct mmc_host *host, unsigned int timing)
{
+ mmc_host_clk_hold(host);
host->ios.timing = timing;
mmc_set_ios(host);
+ mmc_host_clk_release(host);
}
/*
@@ -1013,8 +1030,10 @@
*/
void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type)
{
+ mmc_host_clk_hold(host);
host->ios.drv_type = drv_type;
mmc_set_ios(host);
+ mmc_host_clk_release(host);
}
/*
@@ -1032,6 +1051,8 @@
{
int bit;
+ mmc_host_clk_hold(host);
+
/* If ocr is set, we use it */
if (host->ocr)
bit = ffs(host->ocr) - 1;
@@ -1067,10 +1088,14 @@
* time required to reach a stable voltage.
*/
mmc_delay(10);
+
+ mmc_host_clk_release(host);
}
static void mmc_power_off(struct mmc_host *host)
{
+ mmc_host_clk_hold(host);
+
host->ios.clock = 0;
host->ios.vdd = 0;
@@ -1088,6 +1113,8 @@
host->ios.bus_width = MMC_BUS_WIDTH_1;
host->ios.timing = MMC_TIMING_LEGACY;
mmc_set_ios(host);
+
+ mmc_host_clk_release(host);
}
/*
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
index 3dead90..8703a52 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -94,7 +94,7 @@
spin_unlock_irqrestore(&host->clk_lock, flags);
return;
}
- mmc_claim_host(host);
+ mutex_lock(&host->clk_gate_mutex);
spin_lock_irqsave(&host->clk_lock, flags);
if (!host->clk_requests) {
spin_unlock_irqrestore(&host->clk_lock, flags);
@@ -104,7 +104,7 @@
pr_debug("%s: gated MCI clock\n", mmc_hostname(host));
}
spin_unlock_irqrestore(&host->clk_lock, flags);
- mmc_release_host(host);
+ mutex_unlock(&host->clk_gate_mutex);
}
/*
@@ -119,18 +119,18 @@
}
/**
- * mmc_host_clk_ungate - ungate hardware MCI clocks
+ * mmc_host_clk_hold - ungate hardware MCI clocks
* @host: host to ungate.
*
* Makes sure the host ios.clock is restored to a non-zero value
* past this call. Increase clock reference count and ungate clock
* if we're the first user.
*/
-void mmc_host_clk_ungate(struct mmc_host *host)
+void mmc_host_clk_hold(struct mmc_host *host)
{
unsigned long flags;
- mmc_claim_host(host);
+ mutex_lock(&host->clk_gate_mutex);
spin_lock_irqsave(&host->clk_lock, flags);
if (host->clk_gated) {
spin_unlock_irqrestore(&host->clk_lock, flags);
@@ -140,7 +140,7 @@
}
host->clk_requests++;
spin_unlock_irqrestore(&host->clk_lock, flags);
- mmc_release_host(host);
+ mutex_unlock(&host->clk_gate_mutex);
}
/**
@@ -164,14 +164,14 @@
}
/**
- * mmc_host_clk_gate - gate off hardware MCI clocks
+ * mmc_host_clk_release - gate off hardware MCI clocks
* @host: host to gate.
*
* Calls the host driver with ios.clock set to zero as often as possible
* in order to gate off hardware MCI clocks. Decrease clock reference
* count and schedule disabling of clock.
*/
-void mmc_host_clk_gate(struct mmc_host *host)
+void mmc_host_clk_release(struct mmc_host *host)
{
unsigned long flags;
@@ -179,7 +179,7 @@
host->clk_requests--;
if (mmc_host_may_gate_card(host->card) &&
!host->clk_requests)
- schedule_work(&host->clk_gate_work);
+ queue_work(system_nrt_wq, &host->clk_gate_work);
spin_unlock_irqrestore(&host->clk_lock, flags);
}
@@ -215,6 +215,7 @@
host->clk_gated = false;
INIT_WORK(&host->clk_gate_work, mmc_host_clk_gate_work);
spin_lock_init(&host->clk_lock);
+ mutex_init(&host->clk_gate_mutex);
}
/**
@@ -230,7 +231,7 @@
if (cancel_work_sync(&host->clk_gate_work))
mmc_host_clk_gate_delayed(host);
if (host->clk_gated)
- mmc_host_clk_ungate(host);
+ mmc_host_clk_hold(host);
/* There should be only one user now */
WARN_ON(host->clk_requests > 1);
}
diff --git a/drivers/mmc/core/host.h b/drivers/mmc/core/host.h
index de199f9..fb8a5cd 100644
--- a/drivers/mmc/core/host.h
+++ b/drivers/mmc/core/host.h
@@ -16,16 +16,16 @@
void mmc_unregister_host_class(void);
#ifdef CONFIG_MMC_CLKGATE
-void mmc_host_clk_ungate(struct mmc_host *host);
-void mmc_host_clk_gate(struct mmc_host *host);
+void mmc_host_clk_hold(struct mmc_host *host);
+void mmc_host_clk_release(struct mmc_host *host);
unsigned int mmc_host_clk_rate(struct mmc_host *host);
#else
-static inline void mmc_host_clk_ungate(struct mmc_host *host)
+static inline void mmc_host_clk_hold(struct mmc_host *host)
{
}
-static inline void mmc_host_clk_gate(struct mmc_host *host)
+static inline void mmc_host_clk_release(struct mmc_host *host)
{
}
diff --git a/drivers/mmc/core/sdio_cis.c b/drivers/mmc/core/sdio_cis.c
index dc94222..ebd4132 100644
--- a/drivers/mmc/core/sdio_cis.c
+++ b/drivers/mmc/core/sdio_cis.c
@@ -55,7 +55,7 @@
for (i = 0; i < nr_strings; i++) {
buffer[i] = string;
- strcpy(string, buf);
+ strlcpy(string, buf, sizeof(string));
string += strlen(string) + 1;
buf += strlen(buf) + 1;
}
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index b5a08d2..102b27d 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -1013,6 +1013,8 @@
if (data->flags & MMC_DATA_READ)
datactrl |= (MCI_DPSM_DIRECTION | MCI_RX_DATA_PEND);
+ else if (data->flags & MMC_DATA_WRITE)
+ datactrl |= MCI_DATA_PEND;
clks = (unsigned long long)data->timeout_ns * host->clk_rate;
do_div(clks, 1000000000UL);
@@ -1351,9 +1353,6 @@
msmsdcc_start_command(host, host->curr.mrq->cmd, 0);
else
msmsdcc_request_start(host, host->curr.mrq);
- } else if (cmd->data) {
- if (!(cmd->data->flags & MMC_DATA_READ))
- msmsdcc_start_data(host, cmd->data, NULL, 0);
}
}
@@ -1560,9 +1559,9 @@
static void
msmsdcc_request_start(struct msmsdcc_host *host, struct mmc_request *mrq)
{
- if (mrq->data && mrq->data->flags & MMC_DATA_READ) {
+ if (mrq->data) {
/* Queue/read data, daisy-chain command when data starts */
- if (mrq->sbc)
+ if (mrq->sbc && (mrq->data->flags & MMC_DATA_READ))
msmsdcc_start_data(host, mrq->data, mrq->sbc, 0);
else
msmsdcc_start_data(host, mrq->data, mrq->cmd, 0);
@@ -1634,7 +1633,7 @@
}
}
- if (mrq->sbc) {
+ if (mrq->data && mrq->sbc) {
mrq->sbc->mrq = mrq;
mrq->sbc->data = mrq->data;
if (mrq->data->flags & MMC_DATA_WRITE) {
@@ -3000,6 +2999,12 @@
&sps_config->desc.phys_base,
GFP_KERNEL);
+ if (!sps_config->desc.base) {
+ rc = -ENOMEM;
+ pr_err("%s: dma_alloc_coherent() failed!!! Can't allocate buffer\n"
+ , mmc_hostname(host->mmc));
+ goto get_config_err;
+ }
memset(sps_config->desc.base, 0x00, sps_config->desc.size);
/* Establish connection between peripheral and memory endpoint */
@@ -3482,7 +3487,7 @@
struct resource *bam_memres = NULL;
struct resource *dmares = NULL;
struct resource *dma_crci_res = NULL;
- int ret;
+ int ret = 0;
int i;
/* must have platform data */
diff --git a/drivers/mmc/host/msm_sdcc.h b/drivers/mmc/host/msm_sdcc.h
index 31ece6e..78c1a54 100644
--- a/drivers/mmc/host/msm_sdcc.h
+++ b/drivers/mmc/host/msm_sdcc.h
@@ -77,6 +77,7 @@
#define MCI_DPSM_DIRECTION (1 << 1)
#define MCI_DPSM_MODE (1 << 2)
#define MCI_DPSM_DMAENABLE (1 << 3)
+#define MCI_DATA_PEND (1 << 17)
#define MCI_AUTO_PROG_DONE (1 << 19)
#define MCI_RX_DATA_PEND (1 << 20)
@@ -208,7 +209,7 @@
#define NR_SG 32
-#define MSM_MMC_IDLE_TIMEOUT 10000 /* msecs */
+#define MSM_MMC_IDLE_TIMEOUT 5000 /* msecs */
/*
* Set the request timeout to 10secs to allow
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index f6c44c6..8aab269 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1795,6 +1795,8 @@
depends on SPI
select MII
select CRC32
+ select MISC_DEVICES
+ select EEPROM_93CX6
help
SPI driver for Micrel KS8851 SPI attached network chip.
diff --git a/drivers/net/ks8851.c b/drivers/net/ks8851.c
index e338aed..0bf972a 100644
--- a/drivers/net/ks8851.c
+++ b/drivers/net/ks8851.c
@@ -22,6 +22,8 @@
#include <linux/crc32.h>
#include <linux/mii.h>
#include <linux/regulator/consumer.h>
+#include <linux/eeprom_93cx6.h>
+
#include <linux/spi/spi.h>
#include <linux/ks8851.h>
#include <linux/gpio.h>
@@ -83,6 +85,7 @@
* @rc_ccr: Cached copy of KS_CCR.
* @rc_rxqcr: Cached copy of KS_RXQCR.
* @eeprom_size: Companion eeprom size in Bytes, 0 if no eeprom
+ * @eeprom: 93CX6 EEPROM state for accessing on-board EEPROM.
*
* The @lock ensures that the chip is protected when certain operations are
* in progress. When the read or write packet transfer is in progress, most
@@ -131,6 +134,8 @@
struct spi_transfer spi_xfer2[2];
struct regulator *vdd_io;
struct regulator *vdd_phy;
+
+ struct eeprom_93cx6 eeprom;
};
static int msg_enable;
@@ -346,6 +351,26 @@
}
/**
+ * ks8851_set_powermode - set power mode of the device
+ * @ks: The device state
+ * @pwrmode: The power mode value to write to KS_PMECR.
+ *
+ * Change the power mode of the chip.
+ */
+static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode)
+{
+ unsigned pmecr;
+
+ netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode);
+
+ pmecr = ks8851_rdreg16(ks, KS_PMECR);
+ pmecr &= ~PMECR_PM_MASK;
+ pmecr |= pwrmode;
+
+ ks8851_wrreg16(ks, KS_PMECR, pmecr);
+}
+
+/**
* ks8851_write_mac_addr - write mac address to device registers
* @dev: The network device
*
@@ -361,8 +386,15 @@
mutex_lock(&ks->lock);
+ /*
+ * Wake up chip in case it was powered off when stopped; otherwise,
+ * the first write to the MAC address does not take effect.
+ */
+ ks8851_set_powermode(ks, PMECR_PM_NORMAL);
for (i = 0; i < ETH_ALEN; i++)
ks8851_wrreg8(ks, KS_MAR(i), dev->dev_addr[i]);
+ if (!netif_running(dev))
+ ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN);
mutex_unlock(&ks->lock);
@@ -370,17 +402,14 @@
}
/**
- * ks8851_init_mac - initialise the mac address
- * @ks: The device structure
+ * ks8851_read_mac_addr - read mac address from device registers
+ * @dev: The network device
*
- * Get or create the initial mac address for the device and then set that
- * into the station address register. The device will try to read a MAC address
- * from the EEPROM and program it into the MARs. We use random_ether_addr()
- * if the EEPROM is not present or if the address in the MARs appears invalid.
- */
-static void ks8851_init_mac(struct ks8851_net *ks)
+ * Update our copy of the KS8851 MAC address from the registers of @dev.
+*/
+static void ks8851_read_mac_addr(struct net_device *dev)
{
- struct net_device *dev = ks->netdev;
+ struct ks8851_net *ks = netdev_priv(dev);
int i;
mutex_lock(&ks->lock);
@@ -389,11 +418,33 @@
dev->dev_addr[i] = ks8851_rdreg8(ks, KS_MAR(i));
mutex_unlock(&ks->lock);
+}
- if (!(ks->rc_ccr & CCR_EEPROM) || !is_valid_ether_addr(dev->dev_addr)) {
- random_ether_addr(dev->dev_addr);
- ks8851_write_mac_addr(dev);
+/**
+ * ks8851_init_mac - initialise the mac address
+ * @ks: The device structure
+ *
+ * Get or create the initial mac address for the device and then set that
+ * into the station address register. If there is an EEPROM present, then
+ * we try that. If no valid mac address is found we use random_ether_addr()
+ * to create a new one.
+ */
+static void ks8851_init_mac(struct ks8851_net *ks)
+{
+ struct net_device *dev = ks->netdev;
+
+ /* first, try reading what we've got already */
+ if (ks->rc_ccr & CCR_EEPROM) {
+ ks8851_read_mac_addr(dev);
+ if (is_valid_ether_addr(dev->dev_addr))
+ return;
+
+ netdev_err(ks->netdev, "invalid mac address read %pM\n",
+ dev->dev_addr);
}
+
+ random_ether_addr(dev->dev_addr);
+ ks8851_write_mac_addr(dev);
}
/**
@@ -749,26 +800,6 @@
}
/**
- * ks8851_set_powermode - set power mode of the device
- * @ks: The device state
- * @pwrmode: The power mode value to write to KS_PMECR.
- *
- * Change the power mode of the chip.
- */
-static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode)
-{
- unsigned pmecr;
-
- netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode);
-
- pmecr = ks8851_rdreg16(ks, KS_PMECR);
- pmecr &= ~PMECR_PM_MASK;
- pmecr |= pwrmode;
-
- ks8851_wrreg16(ks, KS_PMECR, pmecr);
-}
-
-/**
* ks8851_net_open - open network device
* @dev: The network device being opened.
*
@@ -1048,234 +1079,6 @@
.ndo_validate_addr = eth_validate_addr,
};
-/* Companion eeprom access */
-
-enum { /* EEPROM programming states */
- EEPROM_CONTROL,
- EEPROM_ADDRESS,
- EEPROM_DATA,
- EEPROM_COMPLETE
-};
-
-/**
- * ks8851_eeprom_read - read a 16bits word in ks8851 companion EEPROM
- * @dev: The network device the PHY is on.
- * @addr: EEPROM address to read
- *
- * eeprom_size: used to define the data coding length. Can be changed
- * through debug-fs.
- *
- * Programs a read on the EEPROM using ks8851 EEPROM SW access feature.
- * Warning: The READ feature is not supported on ks8851 revision 0.
- *
- * Rough programming model:
- * - on period start: set clock high and read value on bus
- * - on period / 2: set clock low and program value on bus
- * - start on period / 2
- */
-unsigned int ks8851_eeprom_read(struct net_device *dev, unsigned int addr)
-{
- struct ks8851_net *ks = netdev_priv(dev);
- int eepcr;
- int ctrl = EEPROM_OP_READ;
- int state = EEPROM_CONTROL;
- int bit_count = EEPROM_OP_LEN - 1;
- unsigned int data = 0;
- int dummy;
- unsigned int addr_len;
-
- addr_len = (ks->eeprom_size == 128) ? 6 : 8;
-
- /* start transaction: chip select high, authorize write */
- mutex_lock(&ks->lock);
- eepcr = EEPCR_EESA | EEPCR_EESRWA;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- eepcr |= EEPCR_EECS;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- while (state != EEPROM_COMPLETE) {
- /* falling clock period starts... */
- /* set EED_IO pin for control and address */
- eepcr &= ~EEPCR_EEDO;
- switch (state) {
- case EEPROM_CONTROL:
- eepcr |= ((ctrl >> bit_count) & 1) << 2;
- if (bit_count-- <= 0) {
- bit_count = addr_len - 1;
- state = EEPROM_ADDRESS;
- }
- break;
- case EEPROM_ADDRESS:
- eepcr |= ((addr >> bit_count) & 1) << 2;
- bit_count--;
- break;
- case EEPROM_DATA:
- /* Change to receive mode */
- eepcr &= ~EEPCR_EESRWA;
- break;
- }
-
- /* lower clock */
- eepcr &= ~EEPCR_EESCK;
-
- mutex_lock(&ks->lock);
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- /* waitread period / 2 */
- udelay(EEPROM_SK_PERIOD / 2);
-
- /* rising clock period starts... */
-
- /* raise clock */
- mutex_lock(&ks->lock);
- eepcr |= EEPCR_EESCK;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- /* Manage read */
- switch (state) {
- case EEPROM_ADDRESS:
- if (bit_count < 0) {
- bit_count = EEPROM_DATA_LEN - 1;
- state = EEPROM_DATA;
- }
- break;
- case EEPROM_DATA:
- mutex_lock(&ks->lock);
- dummy = ks8851_rdreg16(ks, KS_EEPCR);
- mutex_unlock(&ks->lock);
- data |= ((dummy >> EEPCR_EESB_OFFSET) & 1) << bit_count;
- if (bit_count-- <= 0)
- state = EEPROM_COMPLETE;
- break;
- }
-
- /* wait period / 2 */
- udelay(EEPROM_SK_PERIOD / 2);
- }
-
- /* close transaction */
- mutex_lock(&ks->lock);
- eepcr &= ~EEPCR_EECS;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- eepcr = 0;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- return data;
-}
-
-/**
- * ks8851_eeprom_write - write a 16bits word in ks8851 companion EEPROM
- * @dev: The network device the PHY is on.
- * @op: operand (can be WRITE, EWEN, EWDS)
- * @addr: EEPROM address to write
- * @data: data to write
- *
- * eeprom_size: used to define the data coding length. Can be changed
- * through debug-fs.
- *
- * Programs a write on the EEPROM using ks8851 EEPROM SW access feature.
- *
- * Note that a write enable is required before writing data.
- *
- * Rough programming model:
- * - on period start: set clock high
- * - on period / 2: set clock low and program value on bus
- * - start on period / 2
- */
-void ks8851_eeprom_write(struct net_device *dev, unsigned int op,
- unsigned int addr, unsigned int data)
-{
- struct ks8851_net *ks = netdev_priv(dev);
- int eepcr;
- int state = EEPROM_CONTROL;
- int bit_count = EEPROM_OP_LEN - 1;
- unsigned int addr_len;
-
- addr_len = (ks->eeprom_size == 128) ? 6 : 8;
-
- switch (op) {
- case EEPROM_OP_EWEN:
- addr = 0x30;
- break;
- case EEPROM_OP_EWDS:
- addr = 0;
- break;
- }
-
- /* start transaction: chip select high, authorize write */
- mutex_lock(&ks->lock);
- eepcr = EEPCR_EESA | EEPCR_EESRWA;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- eepcr |= EEPCR_EECS;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- while (state != EEPROM_COMPLETE) {
- /* falling clock period starts... */
- /* set EED_IO pin for control and address */
- eepcr &= ~EEPCR_EEDO;
- switch (state) {
- case EEPROM_CONTROL:
- eepcr |= ((op >> bit_count) & 1) << 2;
- if (bit_count-- <= 0) {
- bit_count = addr_len - 1;
- state = EEPROM_ADDRESS;
- }
- break;
- case EEPROM_ADDRESS:
- eepcr |= ((addr >> bit_count) & 1) << 2;
- if (bit_count-- <= 0) {
- if (op == EEPROM_OP_WRITE) {
- bit_count = EEPROM_DATA_LEN - 1;
- state = EEPROM_DATA;
- } else {
- state = EEPROM_COMPLETE;
- }
- }
- break;
- case EEPROM_DATA:
- eepcr |= ((data >> bit_count) & 1) << 2;
- if (bit_count-- <= 0)
- state = EEPROM_COMPLETE;
- break;
- }
-
- /* lower clock */
- eepcr &= ~EEPCR_EESCK;
-
- mutex_lock(&ks->lock);
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- /* wait period / 2 */
- udelay(EEPROM_SK_PERIOD / 2);
-
- /* rising clock period starts... */
-
- /* raise clock */
- eepcr |= EEPCR_EESCK;
- mutex_lock(&ks->lock);
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- /* wait period / 2 */
- udelay(EEPROM_SK_PERIOD / 2);
- }
-
- /* close transaction */
- mutex_lock(&ks->lock);
- eepcr &= ~EEPCR_EECS;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- eepcr = 0;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
-}
-
/* ethtool support */
static void ks8851_get_drvinfo(struct net_device *dev,
@@ -1322,115 +1125,141 @@
return mii_nway_restart(&ks->mii);
}
-static int ks8851_get_eeprom_len(struct net_device *dev)
+/* EEPROM support */
+
+static void ks8851_eeprom_regread(struct eeprom_93cx6 *ee)
+{
+ struct ks8851_net *ks = ee->data;
+ unsigned val;
+
+ val = ks8851_rdreg16(ks, KS_EEPCR);
+
+ ee->reg_data_out = (val & EEPCR_EESB) ? 1 : 0;
+ ee->reg_data_clock = (val & EEPCR_EESCK) ? 1 : 0;
+ ee->reg_chip_select = (val & EEPCR_EECS) ? 1 : 0;
+}
+
+static void ks8851_eeprom_regwrite(struct eeprom_93cx6 *ee)
+{
+ struct ks8851_net *ks = ee->data;
+ unsigned val = EEPCR_EESA; /* default - eeprom access on */
+
+ if (ee->drive_data)
+ val |= EEPCR_EESRWA;
+ if (ee->reg_data_in)
+ val |= EEPCR_EEDO;
+ if (ee->reg_data_clock)
+ val |= EEPCR_EESCK;
+ if (ee->reg_chip_select)
+ val |= EEPCR_EECS;
+
+ ks8851_wrreg16(ks, KS_EEPCR, val);
+}
+
+/**
+ * ks8851_eeprom_claim - claim device EEPROM and activate the interface
+ * @ks: The network deice state.
+ *
+ * Check for the presence of an EEPROM, and then activate software access
+ * to the device.
+ */
+static int ks8851_eeprom_claim(struct ks8851_net *ks)
+{
+ if (!(ks->rc_ccr & CCR_EEPROM))
+ return -ENOENT;
+
+ mutex_lock(&ks->lock);
+
+ /* start with clock low, cs high */
+ ks8851_wrreg16(ks, KS_EEPCR, EEPCR_EESA | EEPCR_EECS);
+ return 0;
+}
+
+/**
+ * ks8851_eeprom_release - release the EEPROM interface
+ * @ks: The device state
+ *
+ * Release the software access to the device EEPROM
+ */
+static void ks8851_eeprom_release(struct ks8851_net *ks)
+{
+ unsigned val = ks8851_rdreg16(ks, KS_EEPCR);
+
+ ks8851_wrreg16(ks, KS_EEPCR, val & ~EEPCR_EESA);
+ mutex_unlock(&ks->lock);
+}
+
+#define KS_EEPROM_MAGIC (0x00008851)
+
+static int ks8851_set_eeprom(struct net_device *dev,
+ struct ethtool_eeprom *ee, u8 *data)
{
struct ks8851_net *ks = netdev_priv(dev);
- return ks->eeprom_size;
+ int offset = ee->offset;
+ int len = ee->len;
+ u16 tmp;
+
+ /* currently only support byte writing */
+ if (len != 1)
+ return -EINVAL;
+
+ if (ee->magic != KS_EEPROM_MAGIC)
+ return -EINVAL;
+
+ if (ks8851_eeprom_claim(ks))
+ return -ENOENT;
+
+ eeprom_93cx6_wren(&ks->eeprom, true);
+
+ /* ethtool currently only supports writing bytes, which means
+ * we have to read/modify/write our 16bit EEPROMs */
+
+ eeprom_93cx6_read(&ks->eeprom, offset/2, &tmp);
+
+ if (offset & 1) {
+ tmp &= 0xff;
+ tmp |= *data << 8;
+ } else {
+ tmp &= 0xff00;
+ tmp |= *data;
+ }
+
+ eeprom_93cx6_write(&ks->eeprom, offset/2, tmp);
+ eeprom_93cx6_wren(&ks->eeprom, false);
+
+ ks8851_eeprom_release(ks);
+
+ return 0;
}
static int ks8851_get_eeprom(struct net_device *dev,
- struct ethtool_eeprom *eeprom, u8 *bytes)
+ struct ethtool_eeprom *ee, u8 *data)
{
struct ks8851_net *ks = netdev_priv(dev);
- u16 *eeprom_buff;
- int first_word;
- int last_word;
- int ret_val = 0;
- u16 i;
+ int offset = ee->offset;
+ int len = ee->len;
- if (eeprom->len == 0)
+ /* must be 2 byte aligned */
+ if (len & 1 || offset & 1)
return -EINVAL;
- if (eeprom->len > ks->eeprom_size)
- return -EINVAL;
+ if (ks8851_eeprom_claim(ks))
+ return -ENOENT;
- eeprom->magic = ks8851_rdreg16(ks, KS_CIDER);
+ ee->magic = KS_EEPROM_MAGIC;
- first_word = eeprom->offset >> 1;
- last_word = (eeprom->offset + eeprom->len - 1) >> 1;
+ eeprom_93cx6_multiread(&ks->eeprom, offset/2, (__le16 *)data, len/2);
+ ks8851_eeprom_release(ks);
- eeprom_buff = kmalloc(sizeof(u16) *
- (last_word - first_word + 1), GFP_KERNEL);
- if (!eeprom_buff)
- return -ENOMEM;
-
- for (i = 0; i < last_word - first_word + 1; i++)
- eeprom_buff[i] = ks8851_eeprom_read(dev, first_word + 1);
-
- /* Device's eeprom is little-endian, word addressable */
- for (i = 0; i < last_word - first_word + 1; i++)
- le16_to_cpus(&eeprom_buff[i]);
-
- memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
- kfree(eeprom_buff);
-
- return ret_val;
+ return 0;
}
-static int ks8851_set_eeprom(struct net_device *dev,
- struct ethtool_eeprom *eeprom, u8 *bytes)
+static int ks8851_get_eeprom_len(struct net_device *dev)
{
struct ks8851_net *ks = netdev_priv(dev);
- u16 *eeprom_buff;
- void *ptr;
- int max_len;
- int first_word;
- int last_word;
- int ret_val = 0;
- u16 i;
- if (eeprom->len == 0)
- return -EOPNOTSUPP;
-
- if (eeprom->len > ks->eeprom_size)
- return -EINVAL;
-
- if (eeprom->magic != ks8851_rdreg16(ks, KS_CIDER))
- return -EFAULT;
-
- first_word = eeprom->offset >> 1;
- last_word = (eeprom->offset + eeprom->len - 1) >> 1;
- max_len = (last_word - first_word + 1) * 2;
- eeprom_buff = kmalloc(max_len, GFP_KERNEL);
- if (!eeprom_buff)
- return -ENOMEM;
-
- ptr = (void *)eeprom_buff;
-
- if (eeprom->offset & 1) {
- /* need read/modify/write of first changed EEPROM word */
- /* only the second byte of the word is being modified */
- eeprom_buff[0] = ks8851_eeprom_read(dev, first_word);
- ptr++;
- }
- if ((eeprom->offset + eeprom->len) & 1)
- /* need read/modify/write of last changed EEPROM word */
- /* only the first byte of the word is being modified */
- eeprom_buff[last_word - first_word] =
- ks8851_eeprom_read(dev, last_word);
-
-
- /* Device's eeprom is little-endian, word addressable */
- le16_to_cpus(&eeprom_buff[0]);
- le16_to_cpus(&eeprom_buff[last_word - first_word]);
-
- memcpy(ptr, bytes, eeprom->len);
-
- for (i = 0; i < last_word - first_word + 1; i++)
- eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
-
- ks8851_eeprom_write(dev, EEPROM_OP_EWEN, 0, 0);
-
- for (i = 0; i < last_word - first_word + 1; i++) {
- ks8851_eeprom_write(dev, EEPROM_OP_WRITE, first_word + i,
- eeprom_buff[i]);
- mdelay(EEPROM_WRITE_TIME);
- }
-
- ks8851_eeprom_write(dev, EEPROM_OP_EWDS, 0, 0);
-
- kfree(eeprom_buff);
- return ret_val;
+ /* currently, we assume it is an 93C46 attached, so return 128 */
+ return ks->rc_ccr & CCR_EEPROM ? 128 : 0;
}
static const struct ethtool_ops ks8851_ethtool_ops = {
@@ -1650,6 +1479,13 @@
spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2);
spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2);
+ /* setup EEPROM state */
+
+ ks->eeprom.data = ks;
+ ks->eeprom.width = PCI_EEPROM_WIDTH_93C46;
+ ks->eeprom.register_read = ks8851_eeprom_regread;
+ ks->eeprom.register_write = ks8851_eeprom_regwrite;
+
/* setup mii state */
ks->mii.dev = ndev;
ks->mii.phy_id = 1,
@@ -1711,9 +1547,10 @@
goto err_netdev;
}
- netdev_info(ndev, "revision %d, MAC %pM, IRQ %d\n",
+ netdev_info(ndev, "revision %d, MAC %pM, IRQ %d, %s EEPROM\n",
CIDER_REV_GET(ks8851_rdreg16(ks, KS_CIDER)),
- ndev->dev_addr, ndev->irq);
+ ndev->dev_addr, ndev->irq,
+ ks->rc_ccr & CCR_EEPROM ? "has" : "no");
return 0;
diff --git a/drivers/net/ks8851.h b/drivers/net/ks8851.h
index 537fb06e..b2703a1 100644
--- a/drivers/net/ks8851.h
+++ b/drivers/net/ks8851.h
@@ -16,7 +16,7 @@
#define CCR_32PIN (1 << 0)
/* MAC address registers */
-#define KS_MAR(_m) 0x15 - (_m)
+#define KS_MAR(_m) (0x15 - (_m))
#define KS_MARL 0x10
#define KS_MARM 0x12
#define KS_MARH 0x14
diff --git a/drivers/net/msm_rmnet_bam.c b/drivers/net/msm_rmnet_bam.c
index 5397cbf..aeb85dc 100644
--- a/drivers/net/msm_rmnet_bam.c
+++ b/drivers/net/msm_rmnet_bam.c
@@ -28,6 +28,7 @@
#include <linux/wakelock.h>
#include <linux/if_arp.h>
#include <linux/msm_rmnet.h>
+#include <linux/platform_device.h>
#ifdef CONFIG_HAS_EARLYSUSPEND
#include <linux/earlysuspend.h>
@@ -81,8 +82,12 @@
struct tasklet_struct tsklt;
u32 operation_mode; /* IOCTL specified mode (protocol, QoS header) */
uint8_t device_up;
+ uint8_t waiting_for_ul;
+ uint8_t in_reset;
};
+static uint8_t ul_is_connected;
+
#ifdef CONFIG_MSM_RMNET_DEBUG
static unsigned long timeout_us;
@@ -337,6 +342,8 @@
static void bam_notify(void *dev, int event, unsigned long data)
{
+ struct rmnet_private *p = netdev_priv(dev);
+
switch (event) {
case BAM_DMUX_RECEIVE:
bam_recv_notify(dev, (struct sk_buff *)(data));
@@ -344,6 +351,16 @@
case BAM_DMUX_WRITE_DONE:
bam_write_done(dev, (struct sk_buff *)(data));
break;
+ case BAM_DMUX_UL_CONNECTED:
+ ul_is_connected = 1;
+ if (p->waiting_for_ul) {
+ netif_wake_queue(dev);
+ p->waiting_for_ul = 0;
+ }
+ break;
+ case BAM_DMUX_UL_DISCONNECTED:
+ ul_is_connected = 0;
+ break;
}
}
@@ -419,6 +436,8 @@
static int rmnet_xmit(struct sk_buff *skb, struct net_device *dev)
{
+ struct rmnet_private *p = netdev_priv(dev);
+
if (netif_queue_stopped(dev)) {
pr_err("[%s]fatal: rmnet_xmit called when "
"netif_queue is stopped", dev->name);
@@ -426,6 +445,11 @@
}
netif_stop_queue(dev);
+ if (!ul_is_connected) {
+ p->waiting_for_ul = 1;
+ msm_bam_dmux_kickoff_ul_wakeup();
+ return NETDEV_TX_BUSY;
+ }
_rmnet_xmit(skb, dev);
return 0;
@@ -596,6 +620,51 @@
dev->watchdog_timeo = 1000; /* 10 seconds? */
}
+static struct net_device *netdevs[RMNET_DEVICE_COUNT];
+static struct platform_driver bam_rmnet_drivers[RMNET_DEVICE_COUNT];
+
+static int bam_rmnet_probe(struct platform_device *pdev)
+{
+ int i;
+ char name[BAM_DMUX_CH_NAME_MAX_LEN];
+ struct rmnet_private *p;
+
+ for (i = 0; i < RMNET_DEVICE_COUNT; ++i) {
+ scnprintf(name, BAM_DMUX_CH_NAME_MAX_LEN, "bam_dmux_ch_%d", i);
+ if (!strncmp(pdev->name, name, BAM_DMUX_CH_NAME_MAX_LEN))
+ break;
+ }
+
+ p = netdev_priv(netdevs[i]);
+ if (p->in_reset) {
+ p->in_reset = 0;
+ msm_bam_dmux_open(p->ch_id, netdevs[i], bam_notify);
+ netif_carrier_on(netdevs[i]);
+ netif_start_queue(netdevs[i]);
+ }
+
+ return 0;
+}
+
+static int bam_rmnet_remove(struct platform_device *pdev)
+{
+ int i;
+ char name[BAM_DMUX_CH_NAME_MAX_LEN];
+ struct rmnet_private *p;
+
+ for (i = 0; i < RMNET_DEVICE_COUNT; ++i) {
+ scnprintf(name, BAM_DMUX_CH_NAME_MAX_LEN, "bam_dmux_ch_%d", i);
+ if (!strncmp(pdev->name, name, BAM_DMUX_CH_NAME_MAX_LEN))
+ break;
+ }
+
+ p = netdev_priv(netdevs[i]);
+ p->in_reset = 1;
+ msm_bam_dmux_close(p->ch_id);
+ netif_carrier_off(netdevs[i]);
+ netif_stop_queue(netdevs[i]);
+ return 0;
+}
static int __init rmnet_init(void)
{
@@ -604,6 +673,7 @@
struct net_device *dev;
struct rmnet_private *p;
unsigned n;
+ char *tempname;
pr_info("%s: BAM devices[%d]\n", __func__, RMNET_DEVICE_COUNT);
@@ -621,11 +691,14 @@
if (!dev)
return -ENOMEM;
+ netdevs[n] = dev;
d = &(dev->dev);
p = netdev_priv(dev);
/* Initial config uses Ethernet */
p->operation_mode = RMNET_MODE_LLP_ETH;
p->ch_id = n;
+ p->waiting_for_ul = 0;
+ p->in_reset = 0;
spin_lock_init(&p->lock);
#ifdef CONFIG_MSM_RMNET_DEBUG
p->timeout_us = timeout_us;
@@ -654,6 +727,18 @@
rmnet0 = d;
#endif
#endif
+ bam_rmnet_drivers[n].probe = bam_rmnet_probe;
+ bam_rmnet_drivers[n].remove = bam_rmnet_remove;
+ tempname = kmalloc(BAM_DMUX_CH_NAME_MAX_LEN, GFP_KERNEL);
+ if (tempname == NULL)
+ return -ENOMEM;
+ scnprintf(tempname, BAM_DMUX_CH_NAME_MAX_LEN, "bam_dmux_ch_%d",
+ n);
+ bam_rmnet_drivers[n].driver.name = tempname;
+ bam_rmnet_drivers[n].driver.owner = THIS_MODULE;
+ ret = platform_driver_register(&bam_rmnet_drivers[n]);
+ if (!ret)
+ return ret;
}
return 0;
}
diff --git a/drivers/net/wireless/libra/qcomwlan7x27a_pwrif.c b/drivers/net/wireless/libra/qcomwlan7x27a_pwrif.c
index 5da7a42..82625b5 100644
--- a/drivers/net/wireless/libra/qcomwlan7x27a_pwrif.c
+++ b/drivers/net/wireless/libra/qcomwlan7x27a_pwrif.c
@@ -32,7 +32,8 @@
struct wlan_vreg_info {
const char *vreg_id;
- unsigned int vreg_level;
+ unsigned int level_min;
+ unsigned int level_max;
unsigned int pmapp_id;
unsigned int is_vreg_pin_controlled;
struct regulator *reg;
@@ -40,12 +41,12 @@
static struct wlan_vreg_info vreg_info[] = {
- {"bt", 3050000, 21, 1, NULL},
- {"msme1", 1800000, 2, 0, NULL},
- {"wlan_tcx0", 1800000, 53, 0, NULL},
- {"wlan4", 1200000, 23, 0, NULL},
- {"wlan2", 1350000, 9, 1, NULL},
- {"wlan3", 1200000, 10, 1, NULL},
+ {"bt", 3050000, 3050000, 21, 1, NULL},
+ {"msme1", 1800000, 1800000, 2, 0, NULL},
+ {"wlan_tcx0", 1800000, 1800000, 53, 0, NULL},
+ {"wlan4", 1200000, 1200000, 23, 0, NULL},
+ {"wlan2", 1350000, 1350000, 9, 1, NULL},
+ {"wlan3", 1200000, 1200000, 10, 1, NULL},
};
static int qrf6285_init_regs(void)
@@ -55,8 +56,8 @@
for (i = 0; i < ARRAY_SIZE(regs); i++) {
regs[i].supply = vreg_info[i].vreg_id;
- regs[i].min_uV = vreg_info[i].vreg_level;
- regs[i].max_uV = vreg_info[i].vreg_level;
+ regs[i].min_uV = vreg_info[i].level_min;
+ regs[i].max_uV = vreg_info[i].level_max;
}
rc = regulator_bulk_get(NULL, ARRAY_SIZE(regs), regs);
@@ -128,8 +129,8 @@
if (on) {
rc = regulator_set_voltage(vreg_info[index].reg,
- vreg_info[index].vreg_level,
- vreg_info[index].vreg_level);
+ vreg_info[index].level_min,
+ vreg_info[index].level_max);
if (rc) {
pr_err("%s:%s set voltage failed %d\n",
__func__, vreg_info[index].vreg_id, rc);
diff --git a/drivers/net/wireless/libra/qcomwlan_pwrif.c b/drivers/net/wireless/libra/qcomwlan_pwrif.c
index de8b918..6dd603c 100644
--- a/drivers/net/wireless/libra/qcomwlan_pwrif.c
+++ b/drivers/net/wireless/libra/qcomwlan_pwrif.c
@@ -14,7 +14,7 @@
#include <linux/qcomwlan_pwrif.h>
#define GPIO_WLAN_DEEP_SLEEP_N 230
-#define GPIO_WLAN_DEEP_SLEEP_N_DRAGON 108
+#define GPIO_WLAN_DEEP_SLEEP_N_DRAGON 82
#define WLAN_RESET_OUT 1
#define WLAN_RESET 0
@@ -212,7 +212,7 @@
}
}
if (on) {
- gpio_set_value_cansleep(GPIO_WLAN_DEEP_SLEEP_N, WLAN_RESET_OUT);
+ gpio_set_value_cansleep(wlan_gpio_deep_sleep, WLAN_RESET_OUT);
wlan_on = true;
}
else
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 179a4ac..cca1035 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -261,7 +261,8 @@
config ISL9519_CHARGER
tristate "isl9519 charger"
- depends on BATTERY_MSM8X60
+ depends on (BATTERY_MSM8X60 || PM8921_CHARGER)
+ depends on I2C
default n
help
The isl9519q charger chip from intersil is connected to an external
diff --git a/drivers/power/isl9519q.c b/drivers/power/isl9519q.c
index a45d286..733de45 100644
--- a/drivers/power/isl9519q.c
+++ b/drivers/power/isl9519q.c
@@ -20,9 +20,11 @@
#include <linux/workqueue.h>
#include <linux/interrupt.h>
#include <linux/msm-charger.h>
+#include <linux/mfd/pm8xxx/pm8921-charger.h>
#include <linux/slab.h>
#include <linux/i2c/isl9519.h>
#include <linux/msm_adc.h>
+#include <linux/spinlock.h>
#define CHG_CURRENT_REG 0x14
#define MAX_SYS_VOLTAGE_REG 0x15
@@ -34,7 +36,7 @@
#define TRCKL_CHG_STATUS_BIT 0x80
-#define ISL9519_CHG_PERIOD ((HZ) * 150)
+#define ISL9519_CHG_PERIOD_SEC 150
struct isl9519q_struct {
struct i2c_client *client;
@@ -52,6 +54,10 @@
struct msm_hardware_charger adapter_hw_chg;
int suspended;
int charge_at_resume;
+ struct ext_chg_pm8921 ext_chg;
+ spinlock_t lock;
+ bool notify_by_pmic;
+ bool trickle;
};
static int isl9519q_read_reg(struct i2c_client *client, int reg,
@@ -70,6 +76,8 @@
} else
*val = ret;
+ pr_debug("%s.reg=0x%x.val=0x%x.\n", __func__, reg, *val);
+
return 0;
}
@@ -79,6 +87,8 @@
int ret;
struct isl9519q_struct *isl_chg;
+ pr_debug("%s.reg=0x%x.val=0x%x.\n", __func__, reg, val);
+
isl_chg = i2c_get_clientdata(client);
ret = i2c_smbus_write_word_data(isl_chg->client, reg, val);
@@ -91,6 +101,14 @@
return 0;
}
+/**
+ * Read charge-current via ADC.
+ *
+ * The ISL CCMON (charge-current-monitor) pin is connected to
+ * the PMIC MPP#X pin.
+ * This not required when notify_by_pmic is used where the PMIC
+ * uses BMS to notify the ISL on charging-done / charge-resume.
+ */
static int isl_read_adc(int channel, int *mv_reading)
{
int ret;
@@ -136,98 +154,129 @@
out:
*mv_reading = 0;
pr_debug("%s: done with error for %d\n", __func__, channel);
- return -EINVAL;
+ return -EINVAL;
}
-static void isl9519q_charge(struct work_struct *isl9519_work)
+static bool is_trickle_charging(struct isl9519q_struct *isl_chg)
{
- u16 temp;
+ u16 ctrl = 0;
int ret;
+
+ ret = isl9519q_read_reg(isl_chg->client, CONTROL_REG, &ctrl);
+
+ if (!ret) {
+ pr_debug("%s.control_reg=0x%x.\n", __func__, ctrl);
+ } else {
+ dev_err(&isl_chg->client->dev,
+ "%s couldnt read cntrl reg\n", __func__);
+ }
+
+ if (ctrl & TRCKL_CHG_STATUS_BIT)
+ return true;
+
+ return false;
+}
+
+static void isl_adapter_check_ichg(struct isl9519q_struct *isl_chg)
+{
+ int ichg; /* isl charger current */
+ int mv_reading = 0;
+
+ ichg = isl_read_adc(CHANNEL_ADC_BATT_AMON, &mv_reading);
+
+ dev_dbg(&isl_chg->client->dev, "%s mv_reading=%d\n",
+ __func__, mv_reading);
+ dev_dbg(&isl_chg->client->dev, "%s isl_charger_current=%d\n",
+ __func__, ichg);
+
+ if (ichg >= 0 && ichg <= isl_chg->term_current)
+ msm_charger_notify_event(&isl_chg->adapter_hw_chg,
+ CHG_DONE_EVENT);
+
+ isl_chg->trickle = is_trickle_charging(isl_chg);
+ if (isl_chg->trickle)
+ msm_charger_notify_event(&isl_chg->adapter_hw_chg,
+ CHG_BATT_BEGIN_FAST_CHARGING);
+}
+
+/**
+ * isl9519q_worker
+ *
+ * Periodic task required to kick the ISL HW watchdog to keep
+ * charging.
+ *
+ * @isl9519_work: work context.
+ */
+static void isl9519q_worker(struct work_struct *isl9519_work)
+{
struct isl9519q_struct *isl_chg;
- int isl_charger_current;
- int mv_reading;
isl_chg = container_of(isl9519_work, struct isl9519q_struct,
charge_work.work);
dev_dbg(&isl_chg->client->dev, "%s\n", __func__);
- if (isl_chg->charging) {
- isl_charger_current = isl_read_adc(CHANNEL_ADC_BATT_AMON,
- &mv_reading);
- dev_dbg(&isl_chg->client->dev, "%s mv_reading=%d\n",
- __func__, mv_reading);
- dev_dbg(&isl_chg->client->dev, "%s isl_charger_current=%d\n",
- __func__, isl_charger_current);
- if (isl_charger_current >= 0
- && isl_charger_current <= isl_chg->term_current) {
- msm_charger_notify_event(
- &isl_chg->adapter_hw_chg,
- CHG_DONE_EVENT);
- }
- isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG,
- isl_chg->chgcurrent);
- ret = isl9519q_read_reg(isl_chg->client, CONTROL_REG, &temp);
- if (!ret) {
- if (!(temp & TRCKL_CHG_STATUS_BIT))
- msm_charger_notify_event(
- &isl_chg->adapter_hw_chg,
- CHG_BATT_BEGIN_FAST_CHARGING);
- } else {
- dev_err(&isl_chg->client->dev,
- "%s couldnt read cntrl reg\n", __func__);
- }
- schedule_delayed_work(&isl_chg->charge_work,
- ISL9519_CHG_PERIOD);
+ if (!isl_chg->charging) {
+ pr_info("%s.stop charging.\n", __func__);
+ isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG, 0);
+ return; /* Stop periodic worker */
}
+
+ /* Kick the dog by writting to CHG_CURRENT_REG */
+ isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG,
+ isl_chg->chgcurrent);
+
+ if (isl_chg->notify_by_pmic)
+ isl_chg->trickle = is_trickle_charging(isl_chg);
+ else
+ isl_adapter_check_ichg(isl_chg);
+
+ schedule_delayed_work(&isl_chg->charge_work,
+ (ISL9519_CHG_PERIOD_SEC * HZ));
}
-static int isl9519q_start_charging(struct msm_hardware_charger *hw_chg,
- int chg_voltage, int chg_current)
+static int isl9519q_start_charging(struct isl9519q_struct *isl_chg,
+ int chg_voltage, int chg_current)
{
- struct isl9519q_struct *isl_chg;
int ret = 0;
- isl_chg = container_of(hw_chg, struct isl9519q_struct, adapter_hw_chg);
- if (isl_chg->charging)
- /* we are already charging */
+ pr_info("%s.\n", __func__);
+
+ if (isl_chg->charging) {
+ pr_warn("%s.already charging.\n", __func__);
return 0;
+ }
if (isl_chg->suspended) {
+ pr_warn("%s.suspended - can't start charging.\n", __func__);
isl_chg->charge_at_resume = 1;
return 0;
}
- dev_dbg(&isl_chg->client->dev, "%s\n", __func__);
+ dev_dbg(&isl_chg->client->dev,
+ "%s starting timed work.period=%d seconds.\n",
+ __func__, (int) ISL9519_CHG_PERIOD_SEC);
- ret = isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG,
- isl_chg->chgcurrent);
- if (ret) {
- dev_err(&isl_chg->client->dev,
- "%s coulnt write to current_reg\n", __func__);
- goto out;
- }
+ /*
+ * The ISL will start charging from the worker context.
+ * This API might be called from interrupt context.
+ */
+ schedule_delayed_work(&isl_chg->charge_work, 1);
- dev_dbg(&isl_chg->client->dev, "%s starting timed work\n",
- __func__);
- schedule_delayed_work(&isl_chg->charge_work,
- ISL9519_CHG_PERIOD);
isl_chg->charging = true;
-out:
return ret;
}
-static int isl9519q_stop_charging(struct msm_hardware_charger *hw_chg)
+static int isl9519q_stop_charging(struct isl9519q_struct *isl_chg)
{
- struct isl9519q_struct *isl_chg;
- int ret = 0;
+ pr_info("%s.\n", __func__);
- isl_chg = container_of(hw_chg, struct isl9519q_struct, adapter_hw_chg);
- if (!(isl_chg->charging))
- /* we arent charging */
+ if (!(isl_chg->charging)) {
+ pr_warn("%s.already not charging.\n", __func__);
return 0;
+ }
if (isl_chg->suspended) {
isl_chg->charge_at_resume = 0;
@@ -236,17 +285,71 @@
dev_dbg(&isl_chg->client->dev, "%s\n", __func__);
- ret = isl9519q_write_reg(isl_chg->client, CHG_CURRENT_REG, 0);
- if (ret) {
- dev_err(&isl_chg->client->dev,
- "%s coulnt write to current_reg\n", __func__);
- goto out;
- }
-
isl_chg->charging = false;
- cancel_delayed_work(&isl_chg->charge_work);
-out:
- return ret;
+ isl_chg->trickle = false;
+ /*
+ * The ISL will stop charging from the worker context.
+ * This API might be called from interrupt context.
+ */
+ schedule_delayed_work(&isl_chg->charge_work, 1);
+
+ return 0;
+}
+
+static int isl_ext_start_charging(void *ctx)
+{
+ int rc;
+ struct isl9519q_struct *isl_chg = ctx;
+ unsigned long flags;
+
+ spin_lock_irqsave(&isl_chg->lock, flags);
+ rc = isl9519q_start_charging(isl_chg, 0, isl_chg->chgcurrent);
+ spin_unlock_irqrestore(&isl_chg->lock, flags);
+
+ return rc;
+}
+
+static int isl_ext_stop_charging(void *ctx)
+{
+ int rc;
+ struct isl9519q_struct *isl_chg = ctx;
+ unsigned long flags;
+
+ spin_lock_irqsave(&isl_chg->lock, flags);
+ rc = isl9519q_stop_charging(isl_chg);
+ spin_unlock_irqrestore(&isl_chg->lock, flags);
+
+ return rc;
+}
+
+static bool isl_ext_is_trickle(void *ctx)
+{
+ struct isl9519q_struct *isl_chg = ctx;
+
+ return isl_chg->trickle;
+}
+
+static int isl_adapter_start_charging(struct msm_hardware_charger *hw_chg,
+ int chg_voltage, int chg_current)
+{
+ int rc;
+ struct isl9519q_struct *isl_chg;
+
+ isl_chg = container_of(hw_chg, struct isl9519q_struct, adapter_hw_chg);
+ rc = isl9519q_start_charging(isl_chg, chg_voltage, chg_current);
+
+ return rc;
+}
+
+static int isl_adapter_stop_charging(struct msm_hardware_charger *hw_chg)
+{
+ int rc;
+ struct isl9519q_struct *isl_chg;
+
+ isl_chg = container_of(hw_chg, struct isl9519q_struct, adapter_hw_chg);
+ rc = isl9519q_stop_charging(isl_chg);
+
+ return rc;
}
static int isl9519q_charging_switched(struct msm_hardware_charger *hw_chg)
@@ -296,6 +399,93 @@
#define DEFAULT_MAX_VOLTAGE_REG_VALUE 0x1070
#define DEFAULT_MIN_VOLTAGE_REG_VALUE 0x0D00
+static int __devinit isl9519q_init_adapter(struct isl9519q_struct *isl_chg)
+{
+ int ret;
+ struct isl_platform_data *pdata = isl_chg->client->dev.platform_data;
+ struct i2c_client *client = isl_chg->client;
+
+ isl_chg->adapter_hw_chg.type = CHG_TYPE_AC;
+ isl_chg->adapter_hw_chg.rating = 2;
+ isl_chg->adapter_hw_chg.name = "isl-adapter";
+ isl_chg->adapter_hw_chg.start_charging = isl_adapter_start_charging;
+ isl_chg->adapter_hw_chg.stop_charging = isl_adapter_stop_charging;
+ isl_chg->adapter_hw_chg.charging_switched = isl9519q_charging_switched;
+
+ ret = gpio_request(pdata->valid_n_gpio, "isl_charger_valid");
+ if (ret) {
+ dev_err(&client->dev, "%s gpio_request failed "
+ "for %d ret=%d\n",
+ __func__, pdata->valid_n_gpio, ret);
+ goto out;
+ }
+
+ ret = msm_charger_register(&isl_chg->adapter_hw_chg);
+ if (ret) {
+ dev_err(&client->dev,
+ "%s msm_charger_register failed for ret =%d\n",
+ __func__, ret);
+ goto free_gpio;
+ }
+
+ ret = request_threaded_irq(client->irq, NULL,
+ isl_valid_handler,
+ IRQF_TRIGGER_FALLING |
+ IRQF_TRIGGER_RISING,
+ "isl_charger_valid", client);
+ if (ret) {
+ dev_err(&client->dev,
+ "%s request_threaded_irq failed "
+ "for %d ret =%d\n",
+ __func__, client->irq, ret);
+ goto unregister;
+ }
+ irq_set_irq_wake(client->irq, 1);
+
+ ret = gpio_get_value_cansleep(isl_chg->valid_n_gpio);
+ if (ret < 0) {
+ dev_err(&client->dev,
+ "%s gpio_get_value failed for %d ret=%d\n",
+ __func__, pdata->valid_n_gpio, ret);
+ /* assume absent */
+ ret = 1;
+ }
+ if (!ret) {
+ msm_charger_notify_event(&isl_chg->adapter_hw_chg,
+ CHG_INSERTED_EVENT);
+ isl_chg->present = 1;
+ }
+
+ return 0;
+
+unregister:
+ msm_charger_unregister(&isl_chg->adapter_hw_chg);
+free_gpio:
+ gpio_free(pdata->valid_n_gpio);
+out:
+ return ret;
+
+}
+
+static int __devinit isl9519q_init_ext_chg(struct isl9519q_struct *isl_chg)
+{
+ int ret;
+
+ isl_chg->ext_chg.name = "isl9519q";
+ isl_chg->ext_chg.ctx = isl_chg;
+ isl_chg->ext_chg.start_charging = isl_ext_start_charging;
+ isl_chg->ext_chg.stop_charging = isl_ext_stop_charging;
+ isl_chg->ext_chg.is_trickle = isl_ext_is_trickle;
+ ret = register_external_dc_charger(&isl_chg->ext_chg);
+ if (ret) {
+ pr_err("%s.failed to register external dc charger.ret=%d.\n",
+ __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
static int __devinit isl9519q_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
@@ -306,6 +496,8 @@
ret = 0;
pdata = client->dev.platform_data;
+ pr_info("%s.\n", __func__);
+
if (pdata == NULL) {
dev_err(&client->dev, "%s no platform data\n", __func__);
ret = -EINVAL;
@@ -324,7 +516,9 @@
goto out;
}
- INIT_DELAYED_WORK(&isl_chg->charge_work, isl9519q_charge);
+ spin_lock_init(&isl_chg->lock);
+
+ INIT_DELAYED_WORK(&isl_chg->charge_work, isl9519q_worker);
isl_chg->client = client;
isl_chg->chgcurrent = pdata->chgcurrent;
isl_chg->term_current = pdata->term_current;
@@ -337,12 +531,14 @@
isl_chg->chgcurrent &= ~0x7F;
isl_chg->input_current &= ~0x7F;
- isl_chg->adapter_hw_chg.type = CHG_TYPE_AC;
- isl_chg->adapter_hw_chg.rating = 2;
- isl_chg->adapter_hw_chg.name = "isl-adapter";
- isl_chg->adapter_hw_chg.start_charging = isl9519q_start_charging;
- isl_chg->adapter_hw_chg.stop_charging = isl9519q_stop_charging;
- isl_chg->adapter_hw_chg.charging_switched = isl9519q_charging_switched;
+ /**
+ * ISL is Notified by PMIC to start/stop charging, rather than
+ * handling interrupt from ISL for End-Of-Chargring, and
+ * monitoring the charge-current periodically. The valid_n_gpio
+ * is also not used, dc-present is detected by PMIC.
+ */
+ isl_chg->notify_by_pmic = (client->irq == 0);
+ i2c_set_clientdata(client, isl_chg);
if (pdata->chg_detection_config) {
ret = pdata->chg_detection_config();
@@ -353,35 +549,6 @@
}
}
- ret = gpio_request(pdata->valid_n_gpio, "isl_charger_valid");
- if (ret) {
- dev_err(&client->dev, "%s gpio_request failed for %d ret=%d\n",
- __func__, pdata->valid_n_gpio, ret);
- goto free_isl_chg;
- }
-
- i2c_set_clientdata(client, isl_chg);
-
- ret = msm_charger_register(&isl_chg->adapter_hw_chg);
- if (ret) {
- dev_err(&client->dev,
- "%s msm_charger_register failed for ret =%d\n",
- __func__, ret);
- goto free_gpio;
- }
-
- ret = request_threaded_irq(client->irq, NULL,
- isl_valid_handler,
- IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
- "isl_charger_valid", client);
- if (ret) {
- dev_err(&client->dev,
- "%s request_threaded_irq failed for %d ret =%d\n",
- __func__, client->irq, ret);
- goto unregister;
- }
- irq_set_irq_wake(client->irq, 1);
-
isl_chg->max_system_voltage &= MAX_VOLTAGE_REG_MASK;
isl_chg->min_system_voltage &= MIN_VOLTAGE_REG_MASK;
if (isl_chg->max_system_voltage == 0)
@@ -391,57 +558,34 @@
ret = isl9519q_write_reg(isl_chg->client, MAX_SYS_VOLTAGE_REG,
isl_chg->max_system_voltage);
- if (ret) {
- dev_err(&client->dev,
- "%s couldnt write to MAX_SYS_VOLTAGE_REG ret=%d\n",
- __func__, ret);
- goto free_irq;
- }
+ if (ret)
+ goto free_isl_chg;
ret = isl9519q_write_reg(isl_chg->client, MIN_SYS_VOLTAGE_REG,
isl_chg->min_system_voltage);
- if (ret) {
- dev_err(&client->dev,
- "%s couldnt write to MIN_SYS_VOLTAGE_REG ret=%d\n",
- __func__, ret);
- goto free_irq;
- }
+ if (ret)
+ goto free_isl_chg;
if (isl_chg->input_current) {
ret = isl9519q_write_reg(isl_chg->client,
INPUT_CURRENT_REG,
isl_chg->input_current);
- if (ret) {
- dev_err(&client->dev,
- "%s couldnt write INPUT_CURRENT_REG ret=%d\n",
- __func__, ret);
- goto free_irq;
- }
+ if (ret)
+ goto free_isl_chg;
}
- ret = gpio_get_value_cansleep(isl_chg->valid_n_gpio);
- if (ret < 0) {
- dev_err(&client->dev,
- "%s gpio_get_value failed for %d ret=%d\n", __func__,
- pdata->valid_n_gpio, ret);
- /* assume absent */
- ret = 1;
- }
- if (!ret) {
- msm_charger_notify_event(&isl_chg->adapter_hw_chg,
- CHG_INSERTED_EVENT);
- isl_chg->present = 1;
- }
+ if (isl_chg->notify_by_pmic)
+ ret = isl9519q_init_ext_chg(isl_chg);
+ else
+ ret = isl9519q_init_adapter(isl_chg);
- pr_debug("%s OK chg_present=%d\n", __func__, isl_chg->present);
+ if (ret)
+ goto free_isl_chg;
+
+ pr_info("%s OK.\n", __func__);
+
return 0;
-free_irq:
- free_irq(client->irq, NULL);
-unregister:
- msm_charger_unregister(&isl_chg->adapter_hw_chg);
-free_gpio:
- gpio_free(pdata->valid_n_gpio);
free_isl_chg:
kfree(isl_chg);
out:
@@ -493,7 +637,7 @@
isl_chg->suspended = 0;
if (isl_chg->charge_at_resume) {
isl_chg->charge_at_resume = 0;
- isl9519q_start_charging(&isl_chg->adapter_hw_chg, 0, 0);
+ isl9519q_start_charging(isl_chg, 0, 0);
}
return 0;
}
@@ -519,10 +663,12 @@
static int __init isl9519q_init(void)
{
+ pr_info("%s. isl9519q SW rev 1.01\n", __func__);
+
return i2c_add_driver(&isl9519q_driver);
}
-module_init(isl9519q_init);
+late_initcall_sync(isl9519q_init);
static void __exit isl9519q_exit(void)
{
diff --git a/drivers/power/pm8921-bms.c b/drivers/power/pm8921-bms.c
index e666bfc..751c6fc 100644
--- a/drivers/power/pm8921-bms.c
+++ b/drivers/power/pm8921-bms.c
@@ -23,6 +23,7 @@
#include <linux/bitops.h>
#include <linux/debugfs.h>
#include <linux/slab.h>
+#include <linux/delay.h>
#define BMS_CONTROL 0x224
#define BMS_OUTPUT0 0x230
@@ -35,14 +36,19 @@
#define CCADC_DATA1 0x245
#define CCADC_OFFSET_TRIM1 0x34A
#define CCADC_OFFSET_TRIM0 0x34B
+#define CCADC_FULLSCALE_TRIM1 0x34C
+#define CCADC_FULLSCALE_TRIM0 0x34D
#define ADC_ARB_SECP_CNTRL 0x190
#define ADC_ARB_SECP_AMUX_CNTRL 0x191
#define ADC_ARB_SECP_ANA_PARAM 0x192
+#define ADC_ARB_SECP_DIG_PARAM 0x193
#define ADC_ARB_SECP_RSV 0x194
#define ADC_ARB_SECP_DATA1 0x195
#define ADC_ARB_SECP_DATA0 0x196
+#define ADC_ARB_BMS_CNTRL 0x18D
+
enum pmic_bms_interrupts {
PM8921_BMS_SBI_WRITE_OK,
PM8921_BMS_CC_THR,
@@ -54,16 +60,6 @@
PM_BMS_MAX_INTS,
};
-/**
- * struct pm8921_bms_chip -device information
- * @dev: device pointer to access the parent
- * @dent: debugfs directory
- * @r_sense: batt sense resistance value
- * @i_test: peak current
- * @v_failure: battery dead voltage
- * @fcc: battery capacity
- *
- */
struct pm8921_bms_chip {
struct device *dev;
struct dentry *dent;
@@ -76,7 +72,9 @@
struct pc_temp_ocv_lut *pc_temp_ocv_lut;
struct pc_sf_lut *pc_sf_lut;
struct work_struct calib_hkadc_work;
+ struct delayed_work calib_ccadc_work;
unsigned int calib_delay_ms;
+ int ccadc_gain_uv;
unsigned int revision;
unsigned int xoadc_v0625;
unsigned int xoadc_v125;
@@ -88,30 +86,122 @@
unsigned int pmic_bms_irq[PM_BMS_MAX_INTS];
DECLARE_BITMAP(enabled_irqs, PM_BMS_MAX_INTS);
spinlock_t bms_output_lock;
+ struct single_row_lut *adjusted_fcc_temp_lut;
};
static struct pm8921_bms_chip *the_chip;
#define DEFAULT_RBATT_MOHMS 128
-#define DEFAULT_UNUSABLE_CHARGE_MAH 10
#define DEFAULT_OCV_MICROVOLTS 3900000
-#define DEFAULT_REMAINING_CHARGE_MAH 990
-#define DEFAULT_COULUMB_COUNTER 0
#define DEFAULT_CHARGE_CYCLES 0
+static int last_chargecycles = DEFAULT_CHARGE_CYCLES;
+static int last_charge_increase;
+module_param(last_chargecycles, int, 0644);
+module_param(last_charge_increase, int, 0644);
+
static int last_rbatt = -EINVAL;
static int last_ocv_uv = -EINVAL;
static int last_soc = -EINVAL;
static int last_real_fcc = -EINVAL;
+static int last_real_fcc_batt_temp = -EINVAL;
-static int last_chargecycles = DEFAULT_CHARGE_CYCLES;
-static int last_charge_increase;
+static int bms_ops_set(const char *val, const struct kernel_param *kp)
+{
+ if (*(int *)kp->arg == -EINVAL)
+ return param_set_int(val, kp);
+ else
+ return 0;
+}
-module_param(last_rbatt, int, 0644);
-module_param(last_ocv_uv, int, 0644);
-module_param(last_chargecycles, int, 0644);
-module_param(last_charge_increase, int, 0644);
-module_param(last_real_fcc, int, 0644);
+static struct kernel_param_ops bms_param_ops = {
+ .set = bms_ops_set,
+ .get = param_get_int,
+};
+
+module_param_cb(last_rbatt, &bms_param_ops, &last_rbatt, 0644);
+module_param_cb(last_ocv_uv, &bms_param_ops, &last_ocv_uv, 0644);
+module_param_cb(last_soc, &bms_param_ops, &last_soc, 0644);
+
+static int interpolate_fcc(struct pm8921_bms_chip *chip, int batt_temp);
+static void readjust_fcc_table(void)
+{
+ struct single_row_lut *temp, *old;
+ int i, fcc, ratio;
+
+ if (!the_chip->fcc_temp_lut) {
+ pr_err("The static fcc lut table is NULL\n");
+ return;
+ }
+
+ temp = kzalloc(sizeof(struct single_row_lut), GFP_KERNEL);
+ if (!temp) {
+ pr_err("Cannot allocate memory for adjusted fcc table\n");
+ return;
+ }
+
+ fcc = interpolate_fcc(the_chip, last_real_fcc_batt_temp);
+
+ temp->cols = the_chip->fcc_temp_lut->cols;
+ for (i = 0; i < the_chip->fcc_temp_lut->cols; i++) {
+ temp->x[i] = the_chip->fcc_temp_lut->x[i];
+ ratio = div_u64(the_chip->fcc_temp_lut->y[i] * 1000, fcc);
+ temp->y[i] = (ratio * last_real_fcc);
+ temp->y[i] /= 1000;
+ pr_debug("temp=%d, staticfcc=%d, adjfcc=%d, ratio=%d\n",
+ temp->x[i], the_chip->fcc_temp_lut->y[i],
+ temp->y[i], ratio);
+ }
+
+ old = the_chip->adjusted_fcc_temp_lut;
+ the_chip->adjusted_fcc_temp_lut = temp;
+ kfree(old);
+}
+
+static int bms_last_real_fcc_set(const char *val,
+ const struct kernel_param *kp)
+{
+ int rc = 0;
+
+ if (last_real_fcc == -EINVAL)
+ rc = param_set_int(val, kp);
+ if (rc) {
+ pr_err("Failed to set last_real_fcc rc=%d\n", rc);
+ return rc;
+ }
+ if (last_real_fcc_batt_temp != -EINVAL)
+ readjust_fcc_table();
+ return rc;
+}
+static struct kernel_param_ops bms_last_real_fcc_param_ops = {
+ .set = bms_last_real_fcc_set,
+ .get = param_get_int,
+};
+module_param_cb(last_real_fcc, &bms_last_real_fcc_param_ops,
+ &last_real_fcc, 0644);
+
+static int bms_last_real_fcc_batt_temp_set(const char *val,
+ const struct kernel_param *kp)
+{
+ int rc = 0;
+
+ if (last_real_fcc_batt_temp == -EINVAL)
+ rc = param_set_int(val, kp);
+ if (rc) {
+ pr_err("Failed to set last_real_fcc_batt_temp rc=%d\n", rc);
+ return rc;
+ }
+ if (last_real_fcc != -EINVAL)
+ readjust_fcc_table();
+ return rc;
+}
+
+static struct kernel_param_ops bms_last_real_fcc_batt_temp_param_ops = {
+ .set = bms_last_real_fcc_batt_temp_set,
+ .get = param_get_int,
+};
+module_param_cb(last_real_fcc_batt_temp, &bms_last_real_fcc_batt_temp_param_ops,
+ &last_real_fcc_batt_temp, 0644);
static int pm_bms_get_rt_status(struct pm8921_bms_chip *chip, int irq_id)
{
@@ -247,25 +337,34 @@
return 0;
}
-#define V_PER_BIT_MUL_FACTOR 293
-#define INTRINSIC_OFFSET 0x6000
-static int vbatt_to_microvolt(unsigned int a)
+#define V_PER_BIT_MUL_FACTOR 97656
+#define V_PER_BIT_DIV_FACTOR 1000
+#define XOADC_INTRINSIC_OFFSET 0x6000
+static int xoadc_reading_to_microvolt(unsigned int a)
{
- if (a <= INTRINSIC_OFFSET)
+ if (a <= XOADC_INTRINSIC_OFFSET)
return 0;
- return (a - INTRINSIC_OFFSET) * V_PER_BIT_MUL_FACTOR;
+ return (a - XOADC_INTRINSIC_OFFSET)
+ * V_PER_BIT_MUL_FACTOR / V_PER_BIT_DIV_FACTOR;
}
#define XOADC_CALIB_UV 625000
-static int adjust_xo_reading(struct pm8921_bms_chip *chip, unsigned int uv)
+#define VBATT_MUL_FACTOR 3
+static int adjust_xo_vbatt_reading(struct pm8921_bms_chip *chip,
+ unsigned int uv)
{
- u64 numerator = ((u64)uv - chip->xoadc_v0625) * XOADC_CALIB_UV;
- u64 denominator = chip->xoadc_v125 - chip->xoadc_v0625;
+ u64 numerator, denominator;
+ if (uv == 0)
+ return 0;
+
+ numerator = ((u64)uv - chip->xoadc_v0625) * XOADC_CALIB_UV;
+ denominator = chip->xoadc_v125 - chip->xoadc_v0625;
if (denominator == 0)
- return uv;
- return XOADC_CALIB_UV + div_u64(numerator, denominator);
+ return uv * VBATT_MUL_FACTOR;
+ return (XOADC_CALIB_UV + div_u64(numerator, denominator))
+ * VBATT_MUL_FACTOR;
}
#define CC_RESOLUTION_N_V1 1085069
@@ -288,11 +387,61 @@
* resolution (the value of a single bit) was changed after revision 2.0
* for more accurate readings
*/
- return (chip->revision < PM8XXX_REVISION_8901_2p0) ?
+ return (chip->revision < PM8XXX_REVISION_8921_2p0) ?
cc_to_microvolt_v1((s64)cc) :
cc_to_microvolt_v2((s64)cc);
}
+#define CCADC_READING_RESOLUTION_N_V1 1085069
+#define CCADC_READING_RESOLUTION_D_V1 100000
+#define CCADC_READING_RESOLUTION_N_V2 542535
+#define CCADC_READING_RESOLUTION_D_V2 100000
+static s64 ccadc_reading_to_microvolt_v1(s64 cc)
+{
+ return div_s64(cc * CCADC_READING_RESOLUTION_N_V1,
+ CCADC_READING_RESOLUTION_D_V1);
+}
+
+static s64 ccadc_reading_to_microvolt_v2(s64 cc)
+{
+ return div_s64(cc * CCADC_READING_RESOLUTION_N_V2,
+ CCADC_READING_RESOLUTION_D_V2);
+}
+
+static s64 ccadc_reading_to_microvolt(struct pm8921_bms_chip *chip, s64 cc)
+{
+ /*
+ * resolution (the value of a single bit) was changed after revision 2.0
+ * for more accurate readings
+ */
+ return (chip->revision < PM8XXX_REVISION_8921_2p0) ?
+ ccadc_reading_to_microvolt_v1((s64)cc) :
+ ccadc_reading_to_microvolt_v2((s64)cc);
+}
+
+static s64 microvolt_to_ccadc_reading_v1(s64 uv)
+{
+ return div_s64(uv * CCADC_READING_RESOLUTION_D_V1,
+ CCADC_READING_RESOLUTION_N_V1);
+}
+
+static s64 microvolt_to_ccadc_reading_v2(s64 uv)
+{
+ return div_s64(uv * CCADC_READING_RESOLUTION_D_V2,
+ CCADC_READING_RESOLUTION_N_V2);
+}
+
+static s64 microvolt_to_ccadc_reading(struct pm8921_bms_chip *chip, s64 cc)
+{
+ /*
+ * resolution (the value of a single bit) was changed after revision 2.0
+ * for more accurate readings
+ */
+ return (chip->revision < PM8XXX_REVISION_8921_2p0) ?
+ microvolt_to_ccadc_reading_v1((s64)cc) :
+ microvolt_to_ccadc_reading_v2((s64)cc);
+}
+
#define CC_READING_TICKS 55
#define SLEEP_CLK_HZ 32768
#define SECONDS_PER_HOUR 3600
@@ -302,6 +451,19 @@
SLEEP_CLK_HZ * SECONDS_PER_HOUR);
}
+#define GAIN_REFERENCE_UV 25000
+/*
+ * gain compensation for ccadc readings - common for vsense based and
+ * couloumb counter based readings
+ */
+static s64 cc_adjust_for_gain(struct pm8921_bms_chip *chip, s64 cc)
+{
+ if (chip->ccadc_gain_uv == 0)
+ return cc;
+
+ return div_s64(cc * GAIN_REFERENCE_UV, chip->ccadc_gain_uv);
+}
+
/* returns the signed value read from the hardware */
static int read_cc(struct pm8921_bms_chip *chip, int *result)
{
@@ -333,8 +495,12 @@
pr_err("fail to read LAST_GOOD_OCV_VALUE rc = %d\n", rc);
return rc;
}
- *result = vbatt_to_microvolt(reading);
- pr_debug("raw = %04x ocv_microV = %u\n", reading, *result);
+ *result = xoadc_reading_to_microvolt(reading);
+ pr_debug("raw = %04x ocv_uV = %u\n", reading, *result);
+ *result = adjust_xo_vbatt_reading(chip, *result);
+ pr_debug("after adj ocv_uV = %u\n", *result);
+ if (*result != 0)
+ last_ocv_uv = *result;
return 0;
}
@@ -348,8 +514,10 @@
pr_err("fail to read VBATT_FOR_RBATT rc = %d\n", rc);
return rc;
}
- *result = vbatt_to_microvolt(reading);
+ *result = xoadc_reading_to_microvolt(reading);
pr_debug("raw = %04x vbatt_for_r_microV = %u\n", reading, *result);
+ *result = adjust_xo_vbatt_reading(chip, *result);
+ pr_debug("after adj vbatt_for_r_uV = %u\n", *result);
return 0;
}
@@ -363,8 +531,10 @@
pr_err("fail to read VSENSE_FOR_RBATT rc = %d\n", rc);
return rc;
}
- *result = cc_to_microvolt(chip, reading);
- pr_debug("raw = %04x vsense_for_r_microV = %u\n", reading, *result);
+ *result = ccadc_reading_to_microvolt(chip, reading);
+ pr_debug("raw = %04x vsense_for_r_uV = %u\n", reading, *result);
+ *result = cc_adjust_for_gain(chip, *result);
+ pr_debug("after adj vsense_for_r_uV = %u\n", *result);
return 0;
}
@@ -378,8 +548,10 @@
pr_err("fail to read OCV_FOR_RBATT rc = %d\n", rc);
return rc;
}
- *result = vbatt_to_microvolt(reading);
- pr_debug("read = %04x ocv_for_r_microV = %u\n", reading, *result);
+ *result = xoadc_reading_to_microvolt(reading);
+ pr_debug("raw = %04x ocv_for_r_uV = %u\n", reading, *result);
+ *result = adjust_xo_vbatt_reading(chip, *result);
+ pr_debug("after adj ocv_for_r_uV = %u\n", *result);
return 0;
}
@@ -393,8 +565,10 @@
pr_err("fail to read VSENSE_AVG rc = %d\n", rc);
return rc;
}
- *result = cc_to_microvolt(chip, reading);
- pr_debug("read = %04x vsense = %d\n", reading, *result);
+ *result = ccadc_reading_to_microvolt(chip, reading);
+ pr_debug("raw = %04x vsense = %d\n", reading, *result);
+ *result = cc_adjust_for_gain(the_chip, (s64)*result);
+ pr_debug("after adj vsense = %d\n", *result);
return 0;
}
@@ -444,6 +618,11 @@
return interpolate_single_lut(chip->fcc_temp_lut, batt_temp);
}
+static int interpolate_fcc_adjusted(struct pm8921_bms_chip *chip, int batt_temp)
+{
+ return interpolate_single_lut(chip->adjusted_fcc_temp_lut, batt_temp);
+}
+
static int interpolate_scalingfactor_fcc(struct pm8921_bms_chip *chip,
int cycles)
{
@@ -642,14 +821,12 @@
pr_err("fail to read ocv_for_rbatt rc = %d\n", rc);
ocv = 0;
}
- ocv = adjust_xo_reading(chip, ocv);
rc = read_vbatt_for_rbatt(chip, &vbatt);
if (rc) {
pr_err("fail to read vbatt_for_rbatt rc = %d\n", rc);
ocv = 0;
}
- vbatt = adjust_xo_reading(chip, vbatt);
rc = read_vsense_for_rbatt(chip, &vsense);
if (rc) {
@@ -665,6 +842,7 @@
return -EINVAL;
}
r_batt = ((ocv - vbatt) * chip->r_sense) / vsense;
+ last_rbatt = r_batt;
pr_debug("r_batt = %umilliOhms", r_batt);
return r_batt;
}
@@ -674,16 +852,18 @@
{
int initfcc, result, scalefactor = 0;
- initfcc = interpolate_fcc(chip, batt_temp);
- pr_debug("intfcc = %umAh batt_temp = %d\n", initfcc, batt_temp);
+ if (chip->adjusted_fcc_temp_lut == NULL) {
+ initfcc = interpolate_fcc(chip, batt_temp);
- scalefactor = interpolate_scalingfactor_fcc(chip, chargecycles);
- pr_debug("scalefactor = %d batt_temp = %d\n", scalefactor, batt_temp);
+ scalefactor = interpolate_scalingfactor_fcc(chip, chargecycles);
- /* Multiply the initial FCC value by the scale factor. */
- result = (initfcc * scalefactor) / 100;
- pr_debug("fcc mAh = %d\n", result);
- return result;
+ /* Multiply the initial FCC value by the scale factor. */
+ result = (initfcc * scalefactor) / 100;
+ pr_debug("fcc mAh = %d\n", result);
+ return result;
+ } else {
+ return interpolate_fcc_adjusted(chip, batt_temp);
+ }
}
static int get_battery_uvolts(struct pm8921_bms_chip *chip, int *uvolts)
@@ -711,20 +891,18 @@
rc = get_battery_uvolts(chip, &vbatt);
if (rc) {
pr_err("failed to read vbatt from adc rc = %d\n", rc);
- last_ocv_uv = DEFAULT_OCV_MICROVOLTS;
return rc;
}
rc = pm8921_bms_get_battery_current(&ibatt);
if (rc) {
pr_err("failed to read batt current rc = %d\n", rc);
- last_ocv_uv = DEFAULT_OCV_MICROVOLTS;
return rc;
}
rbatt = calculate_rbatt(the_chip);
if (rbatt < 0)
- rbatt = DEFAULT_RBATT_MOHMS;
+ rbatt = (last_rbatt < 0) ? DEFAULT_RBATT_MOHMS : last_rbatt;
*ocv = vbatt + ibatt * rbatt;
return 0;
}
@@ -755,6 +933,7 @@
rc = read_cc(the_chip, coulumb_counter);
cc_voltage_uv = (int64_t)*coulumb_counter;
cc_voltage_uv = cc_to_microvolt(chip, cc_voltage_uv);
+ cc_voltage_uv = cc_adjust_for_gain(chip, cc_voltage_uv);
pr_debug("cc_voltage_uv = %lld microvolts\n", cc_voltage_uv);
cc_uvh = ccmicrovolt_to_uvh(cc_voltage_uv);
pr_debug("cc_uvh = %lld micro_volt_hour\n", cc_uvh);
@@ -771,8 +950,6 @@
if (rbatt < 0) {
rbatt = (last_rbatt < 0) ? DEFAULT_RBATT_MOHMS : last_rbatt;
pr_debug("rbatt unavailable assuming %d\n", rbatt);
- } else {
- last_rbatt = rbatt;
}
/* calculate unusable charge */
@@ -800,9 +977,6 @@
if (ocv == 0) {
ocv = last_ocv_uv;
pr_debug("ocv not available using last_ocv_uv=%d\n", ocv);
- } else {
- /* update the usespace param since a good ocv is available */
- last_ocv_uv = ocv;
}
pc = calculate_pc(chip, ocv, batt_temp, chargecycles);
@@ -941,7 +1115,8 @@
#define HKADC_V_PER_BIT_DIV_FACTOR 10
static int calib_hkadc_convert_microvolt(unsigned int phy)
{
- return phy * HKADC_V_PER_BIT_MUL_FACTOR / HKADC_V_PER_BIT_DIV_FACTOR;
+ return (phy - 0x6000) *
+ HKADC_V_PER_BIT_MUL_FACTOR / HKADC_V_PER_BIT_DIV_FACTOR;
}
static void calib_hkadc(struct pm8921_bms_chip *chip)
@@ -954,10 +1129,10 @@
pr_err("ADC failed for 1.25volts rc = %d\n", rc);
return;
}
- voltage = calib_hkadc_convert_microvolt(result.physical);
+ voltage = calib_hkadc_convert_microvolt(result.adc_code);
- pr_debug("result 1.25v = 0x%llx, voltage = %dmV adc_meas = %lld\n",
- result.physical, voltage, result.measurement);
+ pr_debug("result 1.25v = 0x%x, voltage = %duV adc_meas = %lld\n",
+ result.adc_code, voltage, result.measurement);
/* check for valid range */
if (voltage > XOADC_MAX_1P25V)
@@ -971,9 +1146,9 @@
pr_err("ADC failed for 1.25volts rc = %d\n", rc);
return;
}
- voltage = calib_hkadc_convert_microvolt(result.physical);
- pr_debug("result 0.625V = 0x%llx, voltage = %dmV adc_mead = %lld\n",
- result.physical, voltage, result.measurement);
+ voltage = calib_hkadc_convert_microvolt(result.adc_code);
+ pr_debug("result 0.625V = 0x%x, voltage = %duV adc_mead = %lld\n",
+ result.adc_code, voltage, result.measurement);
/* check for valid range */
if (voltage > XOADC_MAX_0P625V)
voltage = XOADC_MAX_0P625V;
@@ -991,6 +1166,385 @@
calib_hkadc(chip);
}
+#define START_CONV_BIT BIT(7)
+#define EOC_CONV_BIT BIT(6)
+#define SEL_CCADC_BIT BIT(1)
+#define EN_ARB_BIT BIT(0)
+
+#define CCADC_CALIB_DIG_PARAM 0xE3
+#define CCADC_CALIB_RSV_GND 0x40
+#define CCADC_CALIB_RSV_25MV 0x80
+#define CCADC_CALIB_ANA_PARAM 0x1B
+#define SAMPLE_COUNT 16
+#define ADC_WAIT_COUNT 10
+
+#define CCADC_MAX_25MV 30000
+#define CCADC_MIN_25MV 20000
+#define CCADC_MAX_0UV -4000
+#define CCADC_MIN_0UV -7000
+
+#define CCADC_INTRINSIC_OFFSET 0xC000
+
+#define REG_SBI_CONFIG 0x04F
+#define PAGE3_ENABLE_MASK 0x6
+
+static int calib_ccadc_enable_trim_access(struct pm8921_bms_chip *chip,
+ u8 *sbi_config)
+{
+ u8 reg;
+ int rc;
+
+ rc = pm8xxx_readb(chip->dev->parent, REG_SBI_CONFIG, sbi_config);
+ if (rc) {
+ pr_err("error = %d reading sbi config reg\n", rc);
+ return rc;
+ }
+
+ reg = *sbi_config | PAGE3_ENABLE_MASK;
+ return pm8xxx_writeb(chip->dev->parent, REG_SBI_CONFIG, reg);
+}
+
+static int calib_ccadc_restore_trim_access(struct pm8921_bms_chip *chip,
+ u8 sbi_config)
+{
+ return pm8xxx_writeb(chip->dev->parent, REG_SBI_CONFIG, sbi_config);
+}
+
+static int calib_ccadc_enable_arbiter(struct pm8921_bms_chip *chip)
+{
+ int rc;
+
+ /* enable Arbiter, must be sent twice */
+ rc = pm_bms_masked_write(chip, ADC_ARB_SECP_CNTRL,
+ SEL_CCADC_BIT | EN_ARB_BIT, SEL_CCADC_BIT | EN_ARB_BIT);
+ if (rc < 0) {
+ pr_err("error = %d enabling arbiter for offset\n", rc);
+ return rc;
+ }
+ rc = pm_bms_masked_write(chip, ADC_ARB_SECP_CNTRL,
+ SEL_CCADC_BIT | EN_ARB_BIT, SEL_CCADC_BIT | EN_ARB_BIT);
+ if (rc < 0) {
+ pr_err("error = %d writing ADC_ARB_SECP_CNTRL\n", rc);
+ return rc;
+ }
+ return 0;
+}
+
+static int calib_start_conv(struct pm8921_bms_chip *chip,
+ u16 *result)
+{
+ int rc, i;
+ u8 data_msb, data_lsb, reg;
+
+ /* Start conversion */
+ rc = pm_bms_masked_write(chip, ADC_ARB_SECP_CNTRL,
+ START_CONV_BIT, START_CONV_BIT);
+ if (rc < 0) {
+ pr_err("error = %d starting offset meas\n", rc);
+ return rc;
+ }
+
+ /* Wait for End of conversion */
+ for (i = 0; i < ADC_WAIT_COUNT; i++) {
+ rc = pm8xxx_readb(chip->dev->parent,
+ ADC_ARB_SECP_CNTRL, ®);
+ if (rc < 0) {
+ pr_err("error = %d read eoc for offset\n", rc);
+ return rc;
+ }
+ if ((reg & (START_CONV_BIT | EOC_CONV_BIT)) != EOC_CONV_BIT)
+ msleep(60);
+ else
+ break;
+ }
+ if (i == ADC_WAIT_COUNT) {
+ pr_err("waited too long for offset eoc\n");
+ return rc;
+ }
+
+ rc = pm8xxx_readb(chip->dev->parent, ADC_ARB_SECP_DATA0, &data_lsb);
+ if (rc < 0) {
+ pr_err("error = %d reading offset lsb\n", rc);
+ return rc;
+ }
+
+ rc = pm8xxx_readb(chip->dev->parent, ADC_ARB_SECP_DATA1, &data_msb);
+ if (rc < 0) {
+ pr_err("error = %d reading offset msb\n", rc);
+ return rc;
+ }
+
+ *result = (data_msb << 8) | data_lsb;
+ return 0;
+}
+
+static int calib_ccadc_read_trim(struct pm8921_bms_chip *chip,
+ int addr, u8 *data_msb, u8 *data_lsb)
+{
+ int rc;
+ u8 sbi_config;
+
+ calib_ccadc_enable_trim_access(chip, &sbi_config);
+ rc = pm8xxx_readb(chip->dev->parent, addr, data_msb);
+ if (rc < 0) {
+ pr_err("error = %d read msb\n", rc);
+ return rc;
+ }
+ rc = pm8xxx_readb(chip->dev->parent, addr + 1, data_lsb);
+ if (rc < 0) {
+ pr_err("error = %d read lsb\n", rc);
+ return rc;
+ }
+ calib_ccadc_restore_trim_access(chip, sbi_config);
+ return 0;
+}
+
+static int calib_ccadc_read_gain_uv(struct pm8921_bms_chip *chip)
+{
+ s8 data_msb;
+ u8 data_lsb;
+ int rc, gain, offset;
+
+ rc = calib_ccadc_read_trim(chip, CCADC_FULLSCALE_TRIM1,
+ &data_msb, &data_lsb);
+ gain = (data_msb << 8) | data_lsb;
+
+ rc = calib_ccadc_read_trim(chip, CCADC_OFFSET_TRIM1,
+ &data_msb, &data_lsb);
+ offset = (data_msb << 8) | data_lsb;
+
+ pr_debug("raw gain trim = 0x%x offset trim =0x%x\n", gain, offset);
+ gain = ccadc_reading_to_microvolt(chip, (s64)gain - offset);
+ return gain;
+}
+
+#define CCADC_PROGRAM_TRIM_COUNT 10
+#define ADC_ARB_BMS_CNTRL_CCADC_SHIFT 4
+#define ADC_ARB_BMS_CNTRL_CONV_MASK 0x03
+#define BMS_CONV_IN_PROGRESS 0x2
+
+static int calib_ccadc_program_trim(struct pm8921_bms_chip *chip,
+ int addr, u8 data_msb, u8 data_lsb)
+{
+ int rc, i;
+ u8 cntrl, sbi_config;
+ bool in_progress;
+
+ calib_ccadc_enable_trim_access(chip, &sbi_config);
+
+ for (i = 0; i < CCADC_PROGRAM_TRIM_COUNT; i++) {
+ rc = pm8xxx_readb(chip->dev->parent, ADC_ARB_BMS_CNTRL, &cntrl);
+ if (rc < 0) {
+ pr_err("error = %d reading ADC_ARB_BMS_CNTRL\n", rc);
+ return rc;
+ }
+
+ /* break if a ccadc conversion is not happening */
+ in_progress = (((cntrl >> ADC_ARB_BMS_CNTRL_CCADC_SHIFT)
+ & ADC_ARB_BMS_CNTRL_CONV_MASK) == BMS_CONV_IN_PROGRESS);
+
+ if (!in_progress)
+ break;
+ }
+
+ if (in_progress) {
+ pr_err("conv in progress cannot write trim,returing EBUSY\n");
+ return -EBUSY;
+ }
+
+ rc = pm8xxx_writeb(chip->dev->parent, addr, data_msb);
+ if (rc < 0) {
+ pr_err("error = %d write msb = 0x%x\n", rc, data_msb);
+ return rc;
+ }
+ rc = pm8xxx_writeb(chip->dev->parent, addr + 1, data_lsb);
+ if (rc < 0) {
+ pr_err("error = %d write lsb = 0x%x\n", rc, data_lsb);
+ return rc;
+ }
+ calib_ccadc_restore_trim_access(chip, sbi_config);
+ return 0;
+}
+
+static void calib_ccadc(struct pm8921_bms_chip *chip)
+{
+ u8 data_msb, data_lsb, sec_cntrl;
+ int result_offset, voltage_offset, result_gain;
+ u16 result;
+ int i, rc;
+
+ rc = pm8xxx_readb(chip->dev->parent, ADC_ARB_SECP_CNTRL, &sec_cntrl);
+ if (rc < 0) {
+ pr_err("error = %d reading ADC_ARB_SECP_CNTRL\n", rc);
+ return;
+ }
+
+ rc = calib_ccadc_enable_arbiter(chip);
+ if (rc < 0) {
+ pr_err("error = %d enabling arbiter for offset\n", rc);
+ goto bail;
+ }
+
+ /*
+ * Set decimation ratio to 4k, lower ratio may be used in order to speed
+ * up, pending verification through bench
+ */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_DIG_PARAM,
+ CCADC_CALIB_DIG_PARAM);
+ if (rc < 0) {
+ pr_err("error = %d writing ADC_ARB_SECP_DIG_PARAM\n", rc);
+ goto bail;
+ }
+
+ result_offset = 0;
+ for (i = 0; i < SAMPLE_COUNT; i++) {
+ /* Short analog inputs to CCADC internally to ground */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_RSV,
+ CCADC_CALIB_RSV_GND);
+ if (rc < 0) {
+ pr_err("error = %d selecting gnd voltage\n", rc);
+ goto bail;
+ }
+
+ /* Enable CCADC */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_ANA_PARAM,
+ CCADC_CALIB_ANA_PARAM);
+ if (rc < 0) {
+ pr_err("error = %d enabling ccadc\n", rc);
+ goto bail;
+ }
+
+ rc = calib_start_conv(chip, &result);
+ if (rc < 0) {
+ pr_err("error = %d for zero volt measurement\n", rc);
+ goto bail;
+ }
+
+ result_offset += result;
+ }
+
+ result_offset = result_offset / SAMPLE_COUNT;
+
+ voltage_offset = ccadc_reading_to_microvolt(chip,
+ ((s64)result_offset - CCADC_INTRINSIC_OFFSET));
+
+ pr_err("offset result_offset = 0x%x, voltage = %d microVolts\n",
+ result_offset, voltage_offset);
+
+ /* Sanity Check */
+ if (voltage_offset > CCADC_MAX_0UV) {
+ pr_err("offset voltage = %d is huge limiting to %d\n",
+ voltage_offset, CCADC_MAX_0UV);
+ result_offset = CCADC_INTRINSIC_OFFSET
+ + microvolt_to_ccadc_reading(chip, (s64)CCADC_MAX_0UV);
+ } else if (voltage_offset < CCADC_MIN_0UV) {
+ pr_err("offset voltage = %d is too low limiting to %d\n",
+ voltage_offset, CCADC_MIN_0UV);
+ result_offset = CCADC_INTRINSIC_OFFSET
+ + microvolt_to_ccadc_reading(chip, (s64)CCADC_MIN_0UV);
+ }
+
+ data_msb = result_offset >> 8;
+ data_lsb = result_offset;
+
+ rc = calib_ccadc_program_trim(chip, CCADC_OFFSET_TRIM1,
+ data_msb, data_lsb);
+ if (rc) {
+ pr_err("error = %d programming offset trim\n", rc);
+ goto bail;
+ }
+
+ rc = calib_ccadc_enable_arbiter(chip);
+ if (rc < 0) {
+ pr_err("error = %d enabling arbiter for gain\n", rc);
+ goto bail;
+ }
+
+ /*
+ * Set decimation ratio to 4k, lower ratio may be used in order to speed
+ * up, pending verification through bench
+ */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_DIG_PARAM,
+ CCADC_CALIB_DIG_PARAM);
+ if (rc < 0) {
+ pr_err("error = %d enabling decimation ration for gain\n", rc);
+ goto bail;
+ }
+
+ result_gain = 0;
+ for (i = 0; i < SAMPLE_COUNT; i++) {
+ rc = pm8xxx_writeb(chip->dev->parent,
+ ADC_ARB_SECP_RSV, CCADC_CALIB_RSV_25MV);
+ if (rc < 0) {
+ pr_err("error = %d selecting 25mV for gain\n", rc);
+ goto bail;
+ }
+
+ /* Enable CCADC */
+ rc = pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_ANA_PARAM,
+ CCADC_CALIB_ANA_PARAM);
+ if (rc < 0) {
+ pr_err("error = %d enabling ccadc\n", rc);
+ goto bail;
+ }
+
+ rc = calib_start_conv(chip, &result);
+ if (rc < 0) {
+ pr_err("error = %d for adc reading 25mV\n", rc);
+ goto bail;
+ }
+
+ result_gain += result;
+ }
+ result_gain = result_gain / SAMPLE_COUNT;
+
+ /*
+ * result_offset includes INTRINSIC OFFSET
+ * chip->ccadc_gain_uv will be the actual voltage
+ * measured for 25000UV
+ */
+ chip->ccadc_gain_uv = ccadc_reading_to_microvolt(chip,
+ ((s64)result_gain - result_offset));
+
+ pr_debug("gain result_gain = 0x%x, voltage = %d microVolts\n",
+ result_gain,
+ chip->ccadc_gain_uv);
+ /* Sanity Check */
+ if (chip->ccadc_gain_uv > CCADC_MAX_25MV) {
+ pr_err("gain voltage = %d is huge limiting to %d\n",
+ chip->ccadc_gain_uv, CCADC_MAX_25MV);
+ chip->ccadc_gain_uv = CCADC_MAX_25MV;
+ result_gain = result_offset +
+ microvolt_to_ccadc_reading(chip, CCADC_MAX_25MV);
+ } else if (chip->ccadc_gain_uv < CCADC_MIN_25MV) {
+ pr_err("gain voltage = %d is too low limiting to %d\n",
+ chip->ccadc_gain_uv, CCADC_MIN_25MV);
+ chip->ccadc_gain_uv = CCADC_MIN_25MV;
+ result_gain = result_offset +
+ microvolt_to_ccadc_reading(chip, CCADC_MIN_25MV);
+ }
+
+ data_msb = result_gain >> 8;
+ data_lsb = result_gain;
+ rc = calib_ccadc_program_trim(chip, CCADC_FULLSCALE_TRIM1,
+ data_msb, data_lsb);
+ if (rc)
+ pr_err("error = %d programming gain trim\n", rc);
+bail:
+ pm8xxx_writeb(chip->dev->parent, ADC_ARB_SECP_CNTRL, sec_cntrl);
+}
+
+static void calibrate_ccadc_work(struct work_struct *work)
+{
+ struct pm8921_bms_chip *chip = container_of(work,
+ struct pm8921_bms_chip, calib_ccadc_work.work);
+
+ calib_ccadc(chip);
+ schedule_delayed_work(&chip->calib_ccadc_work,
+ round_jiffies_relative(msecs_to_jiffies
+ (chip->calib_delay_ms)));
+}
+
int pm8921_bms_get_vsense_avg(int *result)
{
int rc = -EINVAL;
@@ -1012,6 +1566,7 @@
int pm8921_bms_get_battery_current(int *result)
{
unsigned long flags;
+ int vsense;
if (!the_chip) {
pr_err("called before initialization\n");
@@ -1024,12 +1579,13 @@
spin_lock_irqsave(&the_chip->bms_output_lock, flags);
pm_bms_lock_output_data(the_chip);
- read_vsense_avg(the_chip, result);
+ read_vsense_avg(the_chip, &vsense);
pm_bms_unlock_output_data(the_chip);
spin_unlock_irqrestore(&the_chip->bms_output_lock, flags);
- pr_debug("vsense=%d\n", *result);
+ pr_debug("vsense=%d\n", vsense);
/* cast for signed division */
- *result = *result / (int)the_chip->r_sense;
+ *result = vsense / (int)the_chip->r_sense;
+
return 0;
}
EXPORT_SYMBOL(pm8921_bms_get_battery_current);
@@ -1107,6 +1663,8 @@
batt_temp = (int)result.physical;
last_real_fcc = calculate_real_fcc(the_chip,
batt_temp, last_chargecycles);
+ last_real_fcc_batt_temp = batt_temp;
+ readjust_fcc_table();
}
charge_cycle_calculation:
@@ -1272,13 +1830,19 @@
int ocv, rc;
/*
- * Check if a last_good_ocv is available,
- * if not compute it here at boot time.
+ * Check if a ocv is available in bms hw,
+ * if not compute it here at boot time and save it
+ * in the last_ocv_uv.
*/
+ ocv = 0;
rc = read_last_good_ocv(chip, &ocv);
if (rc || ocv == 0) {
- rc = adc_based_ocv(chip, &last_ocv_uv);
- pr_err("failed to read ocv from adc and bms rc = %d\n", rc);
+ rc = adc_based_ocv(chip, &ocv);
+ if (rc) {
+ pr_err("failed to read adc based ocv rc = %d\n", rc);
+ ocv = DEFAULT_OCV_MICROVOLTS;
+ }
+ last_ocv_uv = ocv;
}
pr_debug("ocv = %d last_ocv_uv = %d\n", ocv, last_ocv_uv);
}
@@ -1336,6 +1900,7 @@
CALC_PC,
CALC_SOC,
CALIB_HKADC,
+ CALIB_CCADC,
};
static int test_batt_temp = 5;
@@ -1411,6 +1976,11 @@
*val = 0;
calib_hkadc(the_chip);
break;
+ case CALIB_CCADC:
+ /* reading this will trigger calibration */
+ *val = 0;
+ calib_ccadc(the_chip);
+ break;
default:
ret = -EINVAL;
}
@@ -1562,6 +2132,8 @@
(void *)CALC_SOC, &calc_fops);
debugfs_create_file("calib_hkadc", 0644, chip->dent,
(void *)CALIB_HKADC, &calc_fops);
+ debugfs_create_file("calib_ccadc", 0644, chip->dent,
+ (void *)CALIB_CCADC, &calc_fops);
for (i = 0; i < ARRAY_SIZE(bms_irq_data); i++) {
if (chip->pmic_bms_irq[bms_irq_data[i].irq_id])
@@ -1575,9 +2147,11 @@
static int __devinit pm8921_bms_probe(struct platform_device *pdev)
{
int rc = 0;
+ int vbatt;
struct pm8921_bms_chip *chip;
const struct pm8921_bms_platform_data *pdata
= pdev->dev.platform_data;
+
if (!pdata) {
pr_err("missing platform data\n");
return -EINVAL;
@@ -1608,32 +2182,44 @@
chip->revision = pm8xxx_get_revision(chip->dev->parent);
INIT_WORK(&chip->calib_hkadc_work, calibrate_hkadc_work);
- rc = pm8921_bms_hw_init(chip);
- if (rc) {
- pr_err("couldn't init hardware rc = %d\n", rc);
- goto free_chip;
- }
-
rc = request_irqs(chip, pdev);
if (rc) {
pr_err("couldn't register interrupts rc = %d\n", rc);
goto free_chip;
}
+ rc = pm8921_bms_hw_init(chip);
+ if (rc) {
+ pr_err("couldn't init hardware rc = %d\n", rc);
+ goto free_irqs;
+ }
+
platform_set_drvdata(pdev, chip);
the_chip = chip;
create_debugfs_entries(chip);
check_initial_ocv(chip);
+ chip->ccadc_gain_uv = calib_ccadc_read_gain_uv(chip);
+ INIT_DELAYED_WORK(&chip->calib_ccadc_work, calibrate_ccadc_work);
+ /* begin calibration only on chips > 2.0 */
+ if (chip->revision >= PM8XXX_REVISION_8921_2p0)
+ calibrate_ccadc_work(&(chip->calib_ccadc_work.work));
+
+ /* initial hkadc calibration */
+ schedule_work(&chip->calib_hkadc_work);
/* enable the vbatt reading interrupts for scheduling hkadc calib */
pm8921_bms_enable_irq(chip, PM8921_BMS_GOOD_OCV);
pm8921_bms_enable_irq(chip, PM8921_BMS_OCV_FOR_R);
- pr_info("OK battery_capacity_at_boot=%d\n",
- pm8921_bms_get_percent_charge());
+ get_battery_uvolts(chip, &vbatt);
+ pr_info("OK battery_capacity_at_boot=%d volt = %d ocv = %d\n",
+ pm8921_bms_get_percent_charge(),
+ vbatt, last_ocv_uv);
return 0;
+free_irqs:
+ free_irqs(chip);
free_chip:
kfree(chip);
return rc;
@@ -1644,6 +2230,7 @@
struct pm8921_bms_chip *chip = platform_get_drvdata(pdev);
free_irqs(chip);
+ kfree(chip->adjusted_fcc_temp_lut);
platform_set_drvdata(pdev, NULL);
the_chip = NULL;
kfree(chip);
diff --git a/drivers/power/pm8921-charger.c b/drivers/power/pm8921-charger.c
index 109ad4a..82582c4 100644
--- a/drivers/power/pm8921-charger.c
+++ b/drivers/power/pm8921-charger.c
@@ -202,6 +202,9 @@
struct power_supply batt_psy;
struct dentry *dent;
struct bms_notify bms_notify;
+ struct ext_chg_pm8921 *ext;
+ bool ext_charging;
+ bool ext_charge_done;
DECLARE_BITMAP(enabled_irqs, PM_CHG_MAX_INTS);
struct work_struct battery_id_valid_work;
int64_t batt_id_min;
@@ -748,29 +751,42 @@
/* Treat OverVoltage/UnderVoltage as source missing */
static int is_usb_chg_plugged_in(struct pm8921_chg_chip *chip)
{
- int pres, ov, uv;
-
- pres = pm_chg_get_rt_status(chip, USBIN_VALID_IRQ);
- ov = pm_chg_get_rt_status(chip, USBIN_OV_IRQ);
- uv = pm_chg_get_rt_status(chip, USBIN_UV_IRQ);
-
- return pres && !ov && !uv;
+ return pm_chg_get_rt_status(chip, USBIN_VALID_IRQ);
}
/* Treat OverVoltage/UnderVoltage as source missing */
static int is_dc_chg_plugged_in(struct pm8921_chg_chip *chip)
{
- int pres, ov, uv;
+ return pm_chg_get_rt_status(chip, DCIN_VALID_IRQ);
+}
- pres = pm_chg_get_rt_status(chip, DCIN_VALID_IRQ);
- ov = pm_chg_get_rt_status(chip, DCIN_OV_IRQ);
- uv = pm_chg_get_rt_status(chip, DCIN_UV_IRQ);
+static bool is_ext_charging(struct pm8921_chg_chip *chip)
+{
+ if (chip->ext == NULL)
+ return false;
- return pres && !ov && !uv;
+ if (chip->ext_charging)
+ return true;
+
+ return false;
+}
+
+static bool is_ext_trickle_charging(struct pm8921_chg_chip *chip)
+{
+ if (chip->ext == NULL)
+ return false;
+
+ if (chip->ext->is_trickle(chip->ext->ctx))
+ return true;
+
+ return false;
}
static int is_battery_charging(int fsm_state)
{
+ if (is_ext_charging(the_chip))
+ return 1;
+
switch (fsm_state) {
case FSM_STATE_ATC_2A:
case FSM_STATE_ATC_2B:
@@ -930,6 +946,15 @@
{
int temp;
+ if (!get_prop_batt_present(chip))
+ return POWER_SUPPLY_CHARGE_TYPE_NONE;
+
+ if (is_ext_trickle_charging(chip))
+ return POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
+
+ if (is_ext_charging(chip))
+ return POWER_SUPPLY_CHARGE_TYPE_FAST;
+
temp = pm_chg_get_rt_status(chip, TRKLCHG_IRQ);
if (temp)
return POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
@@ -945,6 +970,17 @@
{
int temp = 0;
+ if (!get_prop_batt_present(chip))
+ return POWER_SUPPLY_STATUS_UNKNOWN;
+
+ if (chip->ext) {
+ if (chip->ext_charge_done)
+ return POWER_SUPPLY_STATUS_FULL;
+
+ if (chip->ext_charging)
+ return POWER_SUPPLY_STATUS_CHARGING;
+ }
+
/* TODO reading the FSM state is more reliable */
temp = pm_chg_get_rt_status(chip, TRKLCHG_IRQ);
@@ -1271,6 +1307,77 @@
bms_notify_check(chip);
}
+static void handle_stop_ext_chg(struct pm8921_chg_chip *chip)
+{
+ if (chip->ext == NULL) {
+ pr_debug("external charger not registered.\n");
+ return;
+ }
+
+ if (!chip->ext_charging) {
+ pr_debug("already not charging.\n");
+ return;
+ }
+
+ chip->ext->stop_charging(chip->ext->ctx);
+ chip->ext_charging = false;
+}
+
+static void handle_start_ext_chg(struct pm8921_chg_chip *chip)
+{
+ int dc_present;
+ int batt_present;
+ int batt_temp_ok;
+ int vbat_ov;
+ int batfet;
+ unsigned long delay =
+ round_jiffies_relative(msecs_to_jiffies(EOC_CHECK_PERIOD_MS));
+
+ if (chip->ext == NULL) {
+ pr_debug("external charger not registered.\n");
+ return;
+ }
+
+ if (chip->ext_charging) {
+ pr_debug("already charging.\n");
+ return;
+ }
+
+ dc_present = is_dc_chg_plugged_in(chip);
+ batt_present = pm_chg_get_rt_status(chip, BATT_INSERTED_IRQ);
+ batt_temp_ok = pm_chg_get_rt_status(chip, BAT_TEMP_OK_IRQ);
+ vbat_ov = pm_chg_get_rt_status(chip, VBAT_OV_IRQ);
+ batfet = pm_chg_get_rt_status(chip, BATFET_IRQ);
+
+ if (!dc_present) {
+ pr_warn("%s. dc not present.\n", __func__);
+ return;
+ }
+ if (!batt_present) {
+ pr_warn("%s. battery not present.\n", __func__);
+ return;
+ }
+ if (!batt_temp_ok) {
+ pr_warn("%s. battery temperature not ok.\n", __func__);
+ return;
+ }
+ if (vbat_ov) {
+ pr_warn("%s. battery over voltage.\n", __func__);
+ return;
+ }
+ if (!batfet) {
+ pr_warn("%s. battery FET not closed.\n", __func__);
+ return;
+ }
+
+ chip->ext->start_charging(chip->ext->ctx);
+ chip->ext_charging = true;
+ chip->ext_charge_done = false;
+ /* Start BMS */
+ schedule_delayed_work(&chip->eoc_work, delay);
+ wake_lock(&chip->eoc_wake_lock);
+}
+
static void handle_dc_removal_insertion(struct pm8921_chg_chip *chip)
{
int dc_present;
@@ -1292,7 +1399,6 @@
static irqreturn_t usbin_ov_irq_handler(int irq, void *data)
{
pr_err("USB OverVoltage\n");
- handle_usb_insertion_removal(data);
return IRQ_HANDLED;
}
@@ -1303,11 +1409,21 @@
status = pm_chg_get_rt_status(chip, BATT_INSERTED_IRQ);
schedule_work(&chip->battery_id_valid_work);
+ handle_start_ext_chg(chip);
pr_debug("battery present=%d", status);
power_supply_changed(&chip->batt_psy);
return IRQ_HANDLED;
}
-/* this interrupt used to restart charging a battery */
+
+/*
+ * this interrupt used to restart charging a battery.
+ *
+ * Note: When DC-inserted the VBAT can't go low.
+ * VPH_PWR is provided by the ext-charger.
+ * After End-Of-Charging from DC, charging can be resumed only
+ * if DC is removed and then inserted after the battery was in use.
+ * Therefore the handle_start_ext_chg() is not called.
+ */
static irqreturn_t vbatdet_low_irq_handler(int irq, void *data)
{
struct pm8921_chg_chip *chip = data;
@@ -1329,7 +1445,6 @@
static irqreturn_t usbin_uv_irq_handler(int irq, void *data)
{
pr_err("USB UnderVoltage\n");
- handle_usb_insertion_removal(data);
return IRQ_HANDLED;
}
@@ -1369,6 +1484,9 @@
struct pm8921_chg_chip *chip = data;
pr_debug("state_changed_to=%d\n", pm_chg_get_fsm_state(data));
+
+ handle_stop_ext_chg(chip);
+
power_supply_changed(&chip->batt_psy);
power_supply_changed(&chip->usb_psy);
power_supply_changed(&chip->dc_psy);
@@ -1446,6 +1564,7 @@
status = pm_chg_get_rt_status(chip, BATT_REMOVED_IRQ);
pr_debug("battery present=%d state=%d", !status,
pm_chg_get_fsm_state(data));
+ handle_stop_ext_chg(chip);
power_supply_changed(&chip->batt_psy);
return IRQ_HANDLED;
}
@@ -1454,6 +1573,7 @@
{
struct pm8921_chg_chip *chip = data;
+ handle_stop_ext_chg(chip);
power_supply_changed(&chip->batt_psy);
return IRQ_HANDLED;
}
@@ -1474,6 +1594,8 @@
struct pm8921_chg_chip *chip = data;
pr_debug("Batt cold fsm_state=%d\n", pm_chg_get_fsm_state(data));
+ handle_stop_ext_chg(chip);
+
power_supply_changed(&chip->batt_psy);
power_supply_changed(&chip->usb_psy);
power_supply_changed(&chip->dc_psy);
@@ -1496,6 +1618,8 @@
struct pm8921_chg_chip *chip = data;
pr_debug("batt temp ok fsm_state=%d\n", pm_chg_get_fsm_state(data));
+ handle_start_ext_chg(chip);
+
power_supply_changed(&chip->batt_psy);
power_supply_changed(&chip->usb_psy);
power_supply_changed(&chip->dc_psy);
@@ -1538,19 +1662,33 @@
static irqreturn_t dcin_valid_irq_handler(int irq, void *data)
{
- handle_dc_removal_insertion(data);
+ struct pm8921_chg_chip *chip = data;
+
+ pm8921_disable_source_current(true); /* Force BATFET=ON */
+
+ handle_dc_removal_insertion(chip);
+ handle_start_ext_chg(chip);
return IRQ_HANDLED;
}
static irqreturn_t dcin_ov_irq_handler(int irq, void *data)
{
- handle_dc_removal_insertion(data);
+ struct pm8921_chg_chip *chip = data;
+
+ pm8921_disable_source_current(false); /* release BATFET */
+
+ handle_dc_removal_insertion(chip);
+ handle_stop_ext_chg(chip);
return IRQ_HANDLED;
}
static irqreturn_t dcin_uv_irq_handler(int irq, void *data)
{
- handle_dc_removal_insertion(data);
+ struct pm8921_chg_chip *chip = data;
+
+ pm8921_disable_source_current(false); /* release BATFET */
+ handle_stop_ext_chg(chip);
+
return IRQ_HANDLED;
}
@@ -1572,7 +1710,7 @@
}
/**
- * eoc_work - internal function to check if battery EOC
+ * eoc_worker - internal function to check if battery EOC
* has happened
*
* If all conditions favouring, if the charge current is
@@ -1585,7 +1723,7 @@
#define CONSECUTIVE_COUNT 3
#define VBAT_TOLERANCE_MV 70
#define CHG_DISABLE_MSLEEP 100
-static void eoc_work(struct work_struct *work)
+static void eoc_worker(struct work_struct *work)
{
struct delayed_work *dwork = to_delayed_work(work);
struct pm8921_chg_chip *chip = container_of(dwork,
@@ -1596,41 +1734,44 @@
int rc;
static int count;
- /* return if the battery is not being fastcharged */
- fast_chg = pm_chg_get_rt_status(chip, FASTCHG_IRQ);
- pr_debug("fast_chg = %d\n", fast_chg);
- if (fast_chg == 0) {
- /* enable fastchg irq */
- pm8921_chg_enable_irq(chip, FASTCHG_IRQ);
- count = 0;
- wake_unlock(&chip->eoc_wake_lock);
- return;
- }
+ if (!is_ext_charging(chip)) {
+ /* return if the battery is not being fastcharged */
+ fast_chg = pm_chg_get_rt_status(chip, FASTCHG_IRQ);
+ pr_debug("fast_chg = %d\n", fast_chg);
+ if (fast_chg == 0) {
+ /* enable fastchg irq */
+ pm8921_chg_enable_irq(chip, FASTCHG_IRQ);
+ count = 0;
+ wake_unlock(&chip->eoc_wake_lock);
+ return;
+ }
- vcp = pm_chg_get_rt_status(chip, VCP_IRQ);
- pr_debug("vcp = %d\n", vcp);
- if (vcp == 1)
- goto reset_and_reschedule;
+ vcp = pm_chg_get_rt_status(chip, VCP_IRQ);
+ pr_debug("vcp = %d\n", vcp);
+ if (vcp == 1)
+ goto reset_and_reschedule;
- /* reset count if battery is hot/cold */
- rc = pm_chg_get_rt_status(chip, BAT_TEMP_OK_IRQ);
- pr_debug("batt_temp_ok = %d\n", rc);
- if (rc == 0)
- goto reset_and_reschedule;
+ /* reset count if battery is hot/cold */
+ rc = pm_chg_get_rt_status(chip, BAT_TEMP_OK_IRQ);
+ pr_debug("batt_temp_ok = %d\n", rc);
+ if (rc == 0)
+ goto reset_and_reschedule;
- /* reset count if battery voltage is less than vddmax */
- vbat_meas = get_prop_battery_mvolts(chip);
- if (vbat_meas < 0)
- goto reset_and_reschedule;
+ /* reset count if battery voltage is less than vddmax */
+ vbat_meas = get_prop_battery_mvolts(chip);
+ if (vbat_meas < 0)
+ goto reset_and_reschedule;
- rc = pm_chg_vddmax_get(chip, &vbat_programmed);
- if (rc) {
- pr_err("couldnt read vddmax rc = %d\n", rc);
- goto reset_and_reschedule;
- }
- pr_debug("vddmax = %d vbat_meas=%d\n", vbat_programmed, vbat_meas);
- if (vbat_meas < vbat_programmed - VBAT_TOLERANCE_MV)
- goto reset_and_reschedule;
+ rc = pm_chg_vddmax_get(chip, &vbat_programmed);
+ if (rc) {
+ pr_err("couldnt read vddmax rc = %d\n", rc);
+ goto reset_and_reschedule;
+ }
+ pr_debug("vddmax = %d vbat_meas=%d\n",
+ vbat_programmed, vbat_meas);
+ if (vbat_meas < vbat_programmed - VBAT_TOLERANCE_MV)
+ goto reset_and_reschedule;
+ } /* !is_ext_charging */
/* reset count if battery chg current is more than iterm */
rc = pm_chg_iterm_get(chip, &iterm_programmed);
@@ -1652,20 +1793,22 @@
if (ichg_meas * -1 > iterm_programmed)
goto reset_and_reschedule;
- /*
- * TODO if charging from an external charger check SOC instead of
- * regulation loop
- */
- regulation_loop = pm_chg_get_regulation_loop(chip);
- if (regulation_loop < 0) {
- pr_err("couldnt read the regulation loop err=%d\n",
- regulation_loop);
- goto reset_and_reschedule;
- }
- pr_debug("regulation_loop=%d\n", regulation_loop);
+ if (!is_ext_charging(chip)) {
+ /*
+ * TODO if charging from an external charger
+ * check SOC instead of regulation loop
+ */
+ regulation_loop = pm_chg_get_regulation_loop(chip);
+ if (regulation_loop < 0) {
+ pr_err("couldnt read the regulation loop err=%d\n",
+ regulation_loop);
+ goto reset_and_reschedule;
+ }
+ pr_debug("regulation_loop=%d\n", regulation_loop);
- if (regulation_loop != 0 && regulation_loop != VDD_LOOP)
- goto reset_and_reschedule;
+ if (regulation_loop != 0 && regulation_loop != VDD_LOOP)
+ goto reset_and_reschedule;
+ } /* !is_ext_charging */
count++;
if (count == CONSECUTIVE_COUNT) {
@@ -1674,6 +1817,9 @@
pm_chg_auto_enable(chip, 0);
+ if (is_ext_charging(chip))
+ chip->ext_charge_done = true;
+
/* declare end of charging by invoking chgdone interrupt */
chgdone_irq_handler(chip->pmic_chg_irq[CHGDONE_IRQ], chip);
wake_unlock(&chip->eoc_wake_lock);
@@ -1754,6 +1900,36 @@
return rc;
}
+int register_external_dc_charger(struct ext_chg_pm8921 *ext)
+{
+ if (the_chip == NULL) {
+ pr_err("called too early\n");
+ return -EINVAL;
+ }
+ /* TODO check function pointers */
+ the_chip->ext = ext;
+ the_chip->ext_charging = false;
+
+ if (is_dc_chg_plugged_in(the_chip))
+ pm8921_disable_source_current(true); /* Force BATFET=ON */
+
+ handle_start_ext_chg(the_chip);
+
+ return 0;
+}
+EXPORT_SYMBOL(register_external_dc_charger);
+
+void unregister_external_dc_charger(struct ext_chg_pm8921 *ext)
+{
+ if (the_chip == NULL) {
+ pr_err("called too early\n");
+ return;
+ }
+ handle_stop_ext_chg(the_chip);
+ the_chip->ext = NULL;
+}
+EXPORT_SYMBOL(unregister_external_dc_charger);
+
/**
* set_disable_status_param -
*
@@ -1894,8 +2070,7 @@
struct pm_chg_irq_init_data chg_irq_data[] = {
CHG_IRQ(USBIN_VALID_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
usbin_valid_irq_handler),
- CHG_IRQ(USBIN_OV_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
- usbin_ov_irq_handler),
+ CHG_IRQ(USBIN_OV_IRQ, IRQF_TRIGGER_RISING, usbin_ov_irq_handler),
CHG_IRQ(BATT_INSERTED_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
batt_inserted_irq_handler),
CHG_IRQ(VBATDET_LOW_IRQ, IRQF_TRIGGER_HIGH, vbatdet_low_irq_handler),
@@ -1933,8 +2108,7 @@
dcin_valid_irq_handler),
CHG_IRQ(DCIN_OV_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
dcin_ov_irq_handler),
- CHG_IRQ(DCIN_UV_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
- dcin_uv_irq_handler),
+ CHG_IRQ(DCIN_UV_IRQ, IRQF_TRIGGER_RISING, dcin_uv_irq_handler),
};
static int __devinit request_irqs(struct pm8921_chg_chip *chip,
@@ -2415,7 +2589,7 @@
the_chip = chip;
wake_lock_init(&chip->eoc_wake_lock, WAKE_LOCK_SUSPEND, "pm8921_eoc");
- INIT_DELAYED_WORK(&chip->eoc_work, eoc_work);
+ INIT_DELAYED_WORK(&chip->eoc_work, eoc_worker);
rc = request_irqs(chip, pdev);
if (rc) {
diff --git a/drivers/slimbus/slim-msm-ctrl.c b/drivers/slimbus/slim-msm-ctrl.c
index 1e4302b..4a2ad3f 100644
--- a/drivers/slimbus/slim-msm-ctrl.c
+++ b/drivers/slimbus/slim-msm-ctrl.c
@@ -21,6 +21,7 @@
#include <linux/delay.h>
#include <linux/kthread.h>
#include <linux/clk.h>
+#include <linux/pm_runtime.h>
#include <mach/sps.h>
/* Per spec.max 40 bytes per received message */
@@ -44,6 +45,7 @@
#define MSM_SLIM_PERF_SUMM_THRESHOLD 0x8000
#define MSM_SLIM_NCHANS 32
#define MSM_SLIM_NPORTS 24
+#define MSM_SLIM_AUTOSUSPEND MSEC_PER_SEC
/*
* Need enough descriptors to receive present messages from slaves
@@ -80,6 +82,7 @@
#define QC_DEVID_SAT1 0x3
#define QC_DEVID_SAT2 0x4
#define QC_DEVID_PGD 0x5
+#define QC_MSM_DEVS 5
/* Component registers */
enum comp_reg {
@@ -184,6 +187,12 @@
REF_CLK_GEAR = 15,
};
+enum msm_ctrl_state {
+ MSM_CTRL_AWAKE,
+ MSM_CTRL_SLEEPING,
+ MSM_CTRL_ASLEEP,
+};
+
struct msm_slim_sps_bam {
u32 hdl;
void __iomem *base;
@@ -226,10 +235,12 @@
struct mutex tx_lock;
u8 pgdla;
bool use_rx_msgqs;
- int suspended;
int pipe_b;
struct completion reconf;
bool reconf_busy;
+ bool chan_active;
+ enum msm_ctrl_state state;
+ int numdevs;
};
struct msm_slim_sat {
@@ -450,6 +461,11 @@
* before exiting ISR
*/
mb();
+ if (dev->ctrl.sched.usedslots == 0 &&
+ dev->state != MSM_CTRL_SLEEPING) {
+ dev->chan_active = false;
+ pm_runtime_put(dev->dev);
+ }
complete(&dev->reconf);
}
pstat = readl_relaxed(dev->base + PGD_PORT_INT_ST_EEn + (16 * dev->ee));
@@ -649,17 +665,37 @@
u8 *puc;
int timeout;
u8 la = txn->la;
+ /*
+ * Voting for runtime PM: Slimbus has 2 possible use cases:
+ * 1. messaging
+ * 2. Data channels
+ * Messaging case goes through messaging slots and data channels
+ * use their own slots
+ * This "get" votes for messaging bandwidth
+ */
+ if (txn->mc < SLIM_MSG_MC_BEGIN_RECONFIGURATION ||
+ txn->mc > SLIM_MSG_MC_RECONFIGURE_NOW ||
+ dev->state != MSM_CTRL_SLEEPING)
+ pm_runtime_get_sync(dev->dev);
mutex_lock(&dev->tx_lock);
+ if (dev->state == MSM_CTRL_ASLEEP) {
+ dev_err(dev->dev, "runtime or system PM suspended state");
+ mutex_unlock(&dev->tx_lock);
+ pm_runtime_put(dev->dev);
+ return -EBUSY;
+ }
if (txn->mt == SLIM_MSG_MT_CORE &&
- txn->mc == SLIM_MSG_MC_BEGIN_RECONFIGURATION &&
- dev->reconf_busy) {
+ txn->mc == SLIM_MSG_MC_BEGIN_RECONFIGURATION) {
+ if (dev->reconf_busy) {
wait_for_completion(&dev->reconf);
dev->reconf_busy = false;
- }
- if (dev->suspended) {
- dev_err(dev->dev, "No transaction in suspended state");
- mutex_unlock(&dev->tx_lock);
- return -EBUSY;
+ }
+ /* This "get" votes for data channels */
+ if (dev->ctrl.sched.usedslots != 0 &&
+ !dev->chan_active) {
+ dev->chan_active = true;
+ pm_runtime_get(dev->dev);
+ }
}
txn->rl--;
pbuf = msm_get_msg_buf(ctrl, txn->rl);
@@ -668,6 +704,10 @@
if (txn->dt == SLIM_MSG_DEST_ENUMADDR) {
mutex_unlock(&dev->tx_lock);
+ if (txn->mc < SLIM_MSG_MC_BEGIN_RECONFIGURATION ||
+ txn->mc > SLIM_MSG_MC_RECONFIGURE_NOW ||
+ dev->state != MSM_CTRL_SLEEPING)
+ pm_runtime_put(dev->dev);
return -EPROTONOSUPPORT;
}
if (txn->mt == SLIM_MSG_MT_CORE && txn->la == 0xFF &&
@@ -715,11 +755,15 @@
*/
dev->pipes[*puc].connected = false;
mutex_unlock(&dev->tx_lock);
+ if (dev->state != MSM_CTRL_SLEEPING)
+ pm_runtime_put(dev->dev);
return 0;
}
if (dev->err) {
dev_err(dev->dev, "pipe-port connect err:%d", dev->err);
mutex_unlock(&dev->tx_lock);
+ if (dev->state != MSM_CTRL_SLEEPING)
+ pm_runtime_put(dev->dev);
return dev->err;
}
*(puc) = *(puc) + dev->pipe_b;
@@ -730,10 +774,37 @@
dev->wr_comp = &done;
msm_send_msg_buf(ctrl, pbuf, txn->rl);
timeout = wait_for_completion_timeout(&done, HZ);
+
+ if (dev->state == MSM_CTRL_SLEEPING &&
+ txn->mc == SLIM_MSG_MC_RECONFIGURE_NOW &&
+ txn->mt == SLIM_MSG_MT_CORE && timeout) {
+ timeout = wait_for_completion_timeout(&dev->reconf, HZ);
+ dev->reconf_busy = false;
+ if (timeout) {
+ clk_disable(dev->rclk);
+ disable_irq(dev->irq);
+ dev->state = MSM_CTRL_ASLEEP;
+ }
+ }
+ if (!timeout && dev->state == MSM_CTRL_SLEEPING &&
+ txn->mc >= SLIM_MSG_MC_BEGIN_RECONFIGURATION &&
+ txn->mc <= SLIM_MSG_MC_RECONFIGURE_NOW &&
+ txn->mt == SLIM_MSG_MT_CORE) {
+ dev->reconf_busy = false;
+ dev->state = MSM_CTRL_AWAKE;
+ dev_err(dev->dev, "clock pause failed");
+ mutex_unlock(&dev->tx_lock);
+ return -ETIMEDOUT;
+ }
+
+ mutex_unlock(&dev->tx_lock);
+ if (!txn->rbuf && dev->state == MSM_CTRL_AWAKE)
+ pm_runtime_put(dev->dev);
+
if (!timeout)
dev_err(dev->dev, "TX timed out:MC:0x%x,mt:0x%x", txn->mc,
txn->mt);
- mutex_unlock(&dev->tx_lock);
+
return timeout ? dev->err : -ETIMEDOUT;
}
@@ -763,6 +834,7 @@
static int msm_clk_pause_wakeup(struct slim_controller *ctrl)
{
struct msm_slim_ctrl *dev = slim_get_ctrldata(ctrl);
+ enable_irq(dev->irq);
clk_enable(dev->rclk);
writel_relaxed(1, dev->base + FRM_WAKEUP);
/* Make sure framer wakeup write goes through before exiting function */
@@ -777,6 +849,7 @@
* we get the message
*/
usleep_range(5000, 5000);
+ dev->state = MSM_CTRL_AWAKE;
return 0;
}
@@ -921,6 +994,9 @@
e_addr[1] == QC_DEVID_PGD &&
e_addr[2] != QC_CHIPID_SL)
dev->pgdla = laddr;
+ dev->numdevs++;
+ if (!ret && dev->numdevs == QC_MSM_DEVS)
+ pm_runtime_enable(dev->dev);
} else if (mc == SLIM_MSG_MC_REPLY_INFORMATION ||
mc == SLIM_MSG_MC_REPLY_VALUE) {
@@ -928,6 +1004,7 @@
dev_dbg(dev->dev, "tid:%d, len:%d\n", tid, len - 4);
slim_msg_response(&dev->ctrl, &buf[4], tid,
len - 4);
+ pm_runtime_put(dev->dev);
} else if (mc == SLIM_MSG_MC_REPORT_INFORMATION) {
u8 l_addr = buf[2];
u16 ele = (u16)buf[4] << 4;
@@ -980,11 +1057,19 @@
for (i = 0; i < 6; i++)
e_addr[i] = buf[7-i];
+ pm_runtime_get_sync(dev->dev);
slim_assign_laddr(&dev->ctrl, e_addr, 6, &laddr);
sat->satcl.laddr = laddr;
- }
+ } else if (mt != SLIM_MSG_MT_CORE &&
+ mc != SLIM_MSG_MC_REPORT_PRESENT)
+ pm_runtime_get_sync(dev->dev);
switch (mc) {
case SLIM_MSG_MC_REPORT_PRESENT:
+ /* Remove runtime_pm vote once satellite acks */
+ if (mt != SLIM_MSG_MT_CORE) {
+ pm_runtime_put(dev->dev);
+ continue;
+ }
/* send a Manager capability msg */
if (sat->sent_capability)
continue;
@@ -1085,8 +1170,11 @@
default:
break;
}
- if (!gen_ack)
+ if (!gen_ack) {
+ if (mc != SLIM_MSG_MC_REPORT_PRESENT)
+ pm_runtime_put(dev->dev);
continue;
+ }
wbuf[0] = tid;
if (!ret)
wbuf[1] = MSM_SAT_SUCCSS;
@@ -1099,6 +1187,7 @@
txn.wbuf = wbuf;
txn.mt = SLIM_MSG_MT_SRC_REFERRED_USER;
msm_xfer_msg(&dev->ctrl, &txn);
+ pm_runtime_put(dev->dev);
}
}
@@ -1702,6 +1791,9 @@
* function
*/
mb();
+ pm_runtime_use_autosuspend(&pdev->dev);
+ pm_runtime_set_autosuspend_delay(&pdev->dev, MSM_SLIM_AUTOSUSPEND);
+ pm_runtime_set_active(&pdev->dev);
dev_dbg(dev->dev, "MSM SB controller is up!\n");
return 0;
@@ -1735,12 +1827,13 @@
struct resource *slew_mem = dev->slew_mem;
struct msm_slim_sat *sat = dev->satd;
slim_remove_device(&sat->satcl);
+ pm_runtime_disable(&pdev->dev);
+ pm_runtime_set_suspended(&pdev->dev);
kfree(sat->satch);
destroy_workqueue(sat->wq);
kfree(sat);
free_irq(dev->irq, dev);
slim_del_controller(&dev->ctrl);
- clk_disable(dev->rclk);
clk_put(dev->rclk);
msm_slim_sps_exit(dev);
kthread_stop(dev->rx_msgq_thread);
@@ -1760,79 +1853,78 @@
return 0;
}
-#ifdef CONFIG_PM
-static int msm_slim_suspend(struct device *device)
+#ifdef CONFIG_PM_RUNTIME
+static int msm_slim_runtime_idle(struct device *device)
{
struct platform_device *pdev = to_platform_device(device);
struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
- int ret = slim_ctrl_clk_pause(&dev->ctrl, false, SLIM_CLK_UNSPECIFIED);
- /* Make sure clock pause goes through */
- mutex_lock(&dev->tx_lock);
- if (!ret && dev->reconf_busy) {
- wait_for_completion(&dev->reconf);
- dev->reconf_busy = false;
- }
- mutex_unlock(&dev->tx_lock);
- if (!ret) {
- clk_disable(dev->rclk);
- disable_irq(dev->irq);
- dev->suspended = 1;
- } else if (ret == -EBUSY) {
- /*
- * If the clock pause failed due to active channels, there is
- * a possibility that some audio stream is active during suspend
- * We dont want to return suspend failure in that case so that
- * display and relevant components can still go to suspend.
- * If there is some other error, then it should be passed-on
- * to system level suspend
- */
- ret = 0;
- }
- return ret;
+ dev_dbg(device, "pm_runtime: idle...\n");
+ pm_runtime_mark_last_busy(dev->dev);
+ pm_request_autosuspend(device);
+ return -EAGAIN;
+}
+#endif
+
+/*
+ * If PM_RUNTIME is not defined, these 2 functions become helper
+ * functions to be called from system suspend/resume. So they are not
+ * inside ifdef CONFIG_PM_RUNTIME
+ */
+static int msm_slim_runtime_suspend(struct device *device)
+{
+ struct platform_device *pdev = to_platform_device(device);
+ struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
+ dev_dbg(device, "pm_runtime: suspending...\n");
+ dev->state = MSM_CTRL_SLEEPING;
+ return slim_ctrl_clk_pause(&dev->ctrl, false, SLIM_CLK_UNSPECIFIED);
}
-static int msm_slim_resume(struct device *device)
+static int msm_slim_runtime_resume(struct device *device)
{
struct platform_device *pdev = to_platform_device(device);
struct msm_slim_ctrl *dev = platform_get_drvdata(pdev);
+ dev_dbg(device, "pm_runtime: resuming...\n");
mutex_lock(&dev->tx_lock);
- if (dev->suspended) {
- dev->suspended = 0;
+ if (dev->state == MSM_CTRL_ASLEEP) {
mutex_unlock(&dev->tx_lock);
- enable_irq(dev->irq);
return slim_ctrl_clk_pause(&dev->ctrl, true, 0);
}
mutex_unlock(&dev->tx_lock);
return 0;
}
-#else
-#define msm_slim_suspend NULL
-#define msm_slim_resume NULL
-#endif /* CONFIG_PM */
-#ifdef CONFIG_PM_RUNTIME
-static int msm_slim_runtime_idle(struct device *dev)
+#ifdef CONFIG_PM_SLEEP
+static int msm_slim_suspend(struct device *dev)
{
- dev_dbg(dev, "pm_runtime: idle...\n");
- return 0;
+ int ret = 0;
+ if (!pm_runtime_enabled(dev) || !pm_runtime_suspended(dev)) {
+ dev_dbg(dev, "system suspend");
+ ret = msm_slim_runtime_suspend(dev);
+ }
+ if (ret == -EBUSY) {
+ /*
+ * If the clock pause failed due to active channels, there is
+ * a possibility that some audio stream is active during suspend
+ * We dont want to return suspend failure in that case so that
+ * display and relevant components can still go to suspend.
+ * If there is some other error, then it should be passed-on
+ * to system level suspend
+ */
+ ret = 0;
+ }
+ return ret;
}
-static int msm_slim_runtime_suspend(struct device *dev)
+static int msm_slim_resume(struct device *dev)
{
- dev_dbg(dev, "pm_runtime: suspending...\n");
+ /* If runtime_pm is enabled, this resume shouldn't do anything */
+ if (!pm_runtime_enabled(dev) || !pm_runtime_suspended(dev)) {
+ dev_dbg(dev, "system resume");
+ return msm_slim_runtime_resume(dev);
+ }
return 0;
}
-
-static int msm_slim_runtime_resume(struct device *dev)
-{
- dev_dbg(dev, "pm_runtime: resuming...\n");
- return 0;
-}
-#else
-#define msm_slim_runtime_idle NULL
-#define msm_slim_runtime_suspend NULL
-#define msm_slim_runtime_resume NULL
-#endif
+#endif /* CONFIG_PM_SLEEP */
static const struct dev_pm_ops msm_slim_dev_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(
diff --git a/drivers/slimbus/slimbus.c b/drivers/slimbus/slimbus.c
index 3b79129..bb30570 100644
--- a/drivers/slimbus/slimbus.c
+++ b/drivers/slimbus/slimbus.c
@@ -892,10 +892,6 @@
cur = slim_slicecodefromsize(sl);
ec = ((sl | (1 << 3)) | ((msg->start_offset & 0xFFF) << 4));
- ret = slim_ctrl_clk_pause(ctrl, true, 0);
- if (ret)
- return ret;
-
if (wbuf)
mlen += len;
if (rbuf) {
@@ -1127,10 +1123,6 @@
u8 chan = (u8)(chanh & 0xFF);
struct slim_ich *slc = &ctrl->chans[chan];
- ret = slim_ctrl_clk_pause(ctrl, true, 0);
- if (ret)
- return ret;
-
mutex_lock(&ctrl->m_ctrl);
/* Make sure the channel is not already pending reconf. or active */
if (slc->state >= SLIM_CH_PENDING_ACTIVE) {
@@ -1193,11 +1185,8 @@
int slim_disconnect_ports(struct slim_device *sb, u32 *ph, int nph)
{
struct slim_controller *ctrl = sb->ctrl;
- int i, ret;
+ int i;
- ret = slim_ctrl_clk_pause(ctrl, true, 0);
- if (ret)
- return ret;
mutex_lock(&ctrl->m_ctrl);
for (i = 0; i < nph; i++)
@@ -2389,10 +2378,6 @@
u32 segdist;
struct slim_pending_ch *pch;
- ret = slim_ctrl_clk_pause(ctrl, true, 0);
- if (ret)
- return ret;
-
mutex_lock(&ctrl->sched.m_reconf);
mutex_lock(&ctrl->m_ctrl);
ctrl->sched.pending_msgsl += sb->pending_msgsl - sb->cur_msgsl;
diff --git a/drivers/thermal/msm8960_tsens.c b/drivers/thermal/msm8960_tsens.c
index 12b3a42e..742bae5 100644
--- a/drivers/thermal/msm8960_tsens.c
+++ b/drivers/thermal/msm8960_tsens.c
@@ -722,7 +722,7 @@
static int tsens_calib_sensors(void)
{
- int rc;
+ int rc = -ENODEV;
if (tmdev->hw_type == MSM_8660)
rc = tsens_calib_sensors8660();
diff --git a/drivers/thermal/msm_tsens.c b/drivers/thermal/msm_tsens.c
index f4e094e..d9a6efc 100644
--- a/drivers/thermal/msm_tsens.c
+++ b/drivers/thermal/msm_tsens.c
@@ -24,6 +24,7 @@
#include <linux/io.h>
#include <mach/msm_iomap.h>
+#include <linux/pm.h>
/* Trips: from very hot to very cold */
enum tsens_trip_type {
@@ -88,6 +89,7 @@
bool prev_reading_avail;
int offset;
struct work_struct work;
+ uint32_t pm_tsens_thr_data;
};
struct tsens_tm_device *tmdev;
@@ -471,9 +473,6 @@
if (lower_th_x)
mask |= TSENS_LOWER_STATUS_CLR;
if (upper_th_x || lower_th_x) {
- thermal_zone_device_update(
- tm->sensor[i].tz_dev);
-
/* Notify user space */
schedule_work(&tm->work);
adc_code = readl(TSENS_S0_STATUS_ADDR
@@ -490,6 +489,53 @@
return IRQ_HANDLED;
}
+#ifdef CONFIG_PM
+static int tsens_suspend(struct device *dev)
+{
+ unsigned int reg;
+
+ tmdev->pm_tsens_thr_data = readl_relaxed(TSENS_THRESHOLD_ADDR);
+ reg = readl_relaxed(TSENS_CNTL_ADDR);
+ writel_relaxed(reg & ~(TSENS_SLP_CLK_ENA | TSENS_EN), TSENS_CNTL_ADDR);
+ tmdev->prev_reading_avail = 0;
+
+ disable_irq_nosync(TSENS_UPPER_LOWER_INT);
+ mb();
+ return 0;
+}
+
+static int tsens_resume(struct device *dev)
+{
+ unsigned int reg;
+
+ reg = readl_relaxed(TSENS_CNTL_ADDR);
+ writel_relaxed(reg | TSENS_SW_RST, TSENS_CNTL_ADDR);
+ reg |= TSENS_SLP_CLK_ENA | TSENS_EN | (TSENS_MEASURE_PERIOD << 16) |
+ TSENS_LOWER_STATUS_CLR | TSENS_UPPER_STATUS_CLR |
+ TSENS_MIN_STATUS_MASK | TSENS_MAX_STATUS_MASK |
+ (((1 << TSENS_NUM_SENSORS) - 1) << 3);
+
+ reg = (reg & ~TSENS_CONFIG_MASK) | (TSENS_CONFIG << TSENS_CONFIG_SHIFT);
+ writel_relaxed(reg, TSENS_CNTL_ADDR);
+
+ if (tmdev->sensor->mode == THERMAL_DEVICE_DISABLED) {
+ writel_relaxed(reg & ~((((1 << TSENS_NUM_SENSORS) - 1) << 3)
+ | TSENS_SLP_CLK_ENA | TSENS_EN), TSENS_CNTL_ADDR);
+ }
+
+ writel_relaxed(tmdev->pm_tsens_thr_data, TSENS_THRESHOLD_ADDR);
+
+ enable_irq(TSENS_UPPER_LOWER_INT);
+ mb();
+ return 0;
+}
+
+static const struct dev_pm_ops tsens_pm_ops = {
+ .suspend = tsens_suspend,
+ .resume = tsens_resume,
+};
+#endif
+
static int __devinit tsens_tm_probe(struct platform_device *pdev)
{
unsigned int reg, i, calib_data, calib_data_backup;
@@ -555,7 +601,6 @@
return -ENODEV;
}
tmdev->sensor[i].sensor_num = i;
- thermal_zone_device_update(tmdev->sensor[i].tz_dev);
tmdev->sensor[i].mode = THERMAL_DEVICE_DISABLED;
}
@@ -596,6 +641,9 @@
.driver = {
.name = "tsens-tm",
.owner = THIS_MODULE,
+#ifdef CONFIG_PM
+ .pm = &tsens_pm_ops,
+#endif
},
};
diff --git a/drivers/usb/gadget/android.c b/drivers/usb/gadget/android.c
index a86e049..8d58833 100644
--- a/drivers/usb/gadget/android.c
+++ b/drivers/usb/gadget/android.c
@@ -320,7 +320,7 @@
struct device *device, struct device_attribute *attr,
const char *buff, size_t size)
{
- strncpy(diag_clients, buff, sizeof(diag_clients));
+ strlcpy(diag_clients, buff, sizeof(diag_clients));
return size;
}
@@ -348,7 +348,7 @@
int once = 0, err = -1;
int (*notify)(uint32_t, const char *) = NULL;
- strncpy(buf, diag_clients, sizeof(buf));
+ strlcpy(buf, diag_clients, sizeof(buf));
b = strim(buf);
while (b) {
@@ -381,7 +381,7 @@
struct device *device, struct device_attribute *attr,
const char *buff, size_t size)
{
- strncpy(serial_transports, buff, sizeof(serial_transports));
+ strlcpy(serial_transports, buff, sizeof(serial_transports));
return size;
}
@@ -407,7 +407,7 @@
goto bind_config;
serial_initialized = 1;
- strncpy(buf, serial_transports, sizeof(buf));
+ strlcpy(buf, serial_transports, sizeof(buf));
b = strim(buf);
while (b) {
@@ -673,7 +673,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct rndis_function_config *config = f->config;
- return sprintf(buf, "%s\n", config->manufacturer);
+ return snprintf(buf, PAGE_SIZE, "%s\n", config->manufacturer);
}
static ssize_t rndis_manufacturer_store(struct device *dev,
@@ -684,7 +684,7 @@
if (size >= sizeof(config->manufacturer))
return -EINVAL;
- if (sscanf(buf, "%s", config->manufacturer) == 1)
+ if (sscanf(buf, "%255s", config->manufacturer) == 1)
return size;
return -1;
}
@@ -697,7 +697,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct rndis_function_config *config = f->config;
- return sprintf(buf, "%d\n", config->wceis);
+ return snprintf(buf, PAGE_SIZE, "%d\n", config->wceis);
}
static ssize_t rndis_wceis_store(struct device *dev,
@@ -722,7 +722,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct rndis_function_config *rndis = f->config;
- return sprintf(buf, "%02x:%02x:%02x:%02x:%02x:%02x\n",
+ return snprintf(buf, PAGE_SIZE, "%02x:%02x:%02x:%02x:%02x:%02x\n",
rndis->ethaddr[0], rndis->ethaddr[1], rndis->ethaddr[2],
rndis->ethaddr[3], rndis->ethaddr[4], rndis->ethaddr[5]);
}
@@ -749,7 +749,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct rndis_function_config *config = f->config;
- return sprintf(buf, "%04x\n", config->vendorID);
+ return snprintf(buf, PAGE_SIZE, "%04x\n", config->vendorID);
}
static ssize_t rndis_vendorID_store(struct device *dev,
@@ -844,7 +844,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct mass_storage_function_config *config = f->config;
- return sprintf(buf, "%s\n", config->common->inquiry_string);
+ return snprintf(buf, PAGE_SIZE, "%s\n", config->common->inquiry_string);
}
static ssize_t mass_storage_inquiry_store(struct device *dev,
@@ -854,7 +854,7 @@
struct mass_storage_function_config *config = f->config;
if (size >= sizeof(config->common->inquiry_string))
return -EINVAL;
- if (sscanf(buf, "%s", config->common->inquiry_string) != 1)
+ if (sscanf(buf, "%28s", config->common->inquiry_string) != 1)
return -EINVAL;
return size;
}
@@ -935,7 +935,7 @@
struct android_usb_function *f;
struct device_attribute **attrs;
struct device_attribute *attr;
- int err;
+ int err = 0;
int index = 0;
for (; (f = *functions++); index++) {
@@ -1048,7 +1048,7 @@
char *buff = buf;
list_for_each_entry(f, &dev->enabled_functions, enabled_list)
- buff += sprintf(buff, "%s,", f->name);
+ buff += snprintf(buff, PAGE_SIZE, "%s,", f->name);
if (buff != buf)
*(buff-1) = '\n';
return buff - buf;
@@ -1065,7 +1065,7 @@
INIT_LIST_HEAD(&dev->enabled_functions);
- strncpy(buf, buff, sizeof(buf));
+ strlcpy(buf, buff, sizeof(buf));
b = strim(buf);
while (b) {
@@ -1084,7 +1084,7 @@
char *buf)
{
struct android_dev *dev = dev_get_drvdata(pdev);
- return sprintf(buf, "%d\n", dev->enabled);
+ return snprintf(buf, PAGE_SIZE, "%d\n", dev->enabled);
}
static ssize_t enable_store(struct device *pdev, struct device_attribute *attr,
@@ -1138,7 +1138,7 @@
state = "CONNECTED";
spin_unlock_irqrestore(&cdev->lock, flags);
out:
- return sprintf(buf, "%s\n", state);
+ return snprintf(buf, PAGE_SIZE, "%s\n", state);
}
#define DESCRIPTOR_ATTR(field, format_string) \
@@ -1146,7 +1146,8 @@
field ## _show(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
- return sprintf(buf, format_string, device_desc.field); \
+ return snprintf(buf, PAGE_SIZE, \
+ format_string, device_desc.field); \
} \
static ssize_t \
field ## _store(struct device *dev, struct device_attribute *attr, \
@@ -1166,14 +1167,14 @@
field ## _show(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
- return sprintf(buf, "%s", buffer); \
+ return snprintf(buf, PAGE_SIZE, "%s", buffer); \
} \
static ssize_t \
field ## _store(struct device *dev, struct device_attribute *attr, \
const char *buf, size_t size) \
{ \
if (size >= sizeof(buffer)) return -EINVAL; \
- if (sscanf(buf, "%s", buffer) == 1) { \
+ if (sscanf(buf, "%255s", buffer) == 1) { \
return size; \
} \
return -1; \
@@ -1261,9 +1262,10 @@
device_desc.iProduct = id;
/* Default strings - should be updated by userspace */
- strncpy(manufacturer_string, "Android", sizeof(manufacturer_string) - 1);
- strncpy(product_string, "Android", sizeof(product_string) - 1);
- strncpy(serial_string, "0123456789ABCDEF", sizeof(serial_string) - 1);
+ strlcpy(manufacturer_string, "Android",
+ sizeof(manufacturer_string) - 1);
+ strlcpy(product_string, "Android", sizeof(product_string) - 1);
+ strlcpy(serial_string, "0123456789ABCDEF", sizeof(serial_string) - 1);
id = usb_string_id(cdev);
if (id < 0)
diff --git a/drivers/usb/gadget/ci13xxx_udc.c b/drivers/usb/gadget/ci13xxx_udc.c
index 9d268d1..11bfe9f 100644
--- a/drivers/usb/gadget/ci13xxx_udc.c
+++ b/drivers/usb/gadget/ci13xxx_udc.c
@@ -1405,8 +1405,15 @@
mEp = &udc->ci13xxx_ep[ep_num];
n = hw_ep_bit(mEp->num, mEp->dir);
+ pr_info("%s: prime:%08x stat:%08x ep#%d dir:%s"
+ "dTD_update_fail_count: %lu"
+ "mEp->dTD_update_fail_count: %lu\n", __func__,
+ hw_cread(CAP_ENDPTPRIME, ~0),
+ hw_cread(CAP_ENDPTSTAT, ~0),
+ mEp->num, mEp->dir ? "IN" : "OUT",
+ udc->dTD_update_fail_count,
+ mEp->dTD_update_fail_count);
- pr_info("ep#%d dir:%s\n", mEp->num, mEp->dir ? "IN" : "OUT");
pr_info("QH: cap:%08x cur:%08x next:%08x token:%08x\n",
mEp->qh.ptr->cap, mEp->qh.ptr->curr,
mEp->qh.ptr->td.next, mEp->qh.ptr->td.token);
@@ -1850,6 +1857,11 @@
dbg_event(0xFF, "BUS RST", 0);
spin_unlock(udc->lock);
+
+ /*stop charging upon reset */
+ if (udc->transceiver)
+ otg_set_power(udc->transceiver, 0);
+
retval = _gadget_stop_activity(&udc->gadget);
if (retval)
goto done;
@@ -2017,17 +2029,35 @@
struct ci13xxx_req *mReq, *mReqTemp;
struct ci13xxx_ep *mEpTemp = mEp;
int uninitialized_var(retval);
+ int req_dequeue = 1;
+ struct ci13xxx *udc = _udc;
trace("%p", mEp);
if (list_empty(&mEp->qh.queue))
- return -EINVAL;
+ return 0;
list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
queue) {
+dequeue:
retval = _hardware_dequeue(mEp, mReq);
- if (retval < 0)
+ if (retval < 0) {
+ /*
+ * FIXME: don't know exact delay
+ * required for HW to update dTD status
+ * bits. This is a temporary workaround till
+ * HW designers come back on this.
+ */
+ if (retval == -EBUSY && req_dequeue && mEp->dir == 0) {
+ req_dequeue = 0;
+ udc->dTD_update_fail_count++;
+ mEp->dTD_update_fail_count++;
+ udelay(10);
+ goto dequeue;
+ }
break;
+ }
+ req_dequeue = 0;
list_del_init(&mReq->queue);
dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
if (mReq->req.complete != NULL) {
diff --git a/drivers/usb/gadget/ci13xxx_udc.h b/drivers/usb/gadget/ci13xxx_udc.h
index c37a717..b917fe9 100644
--- a/drivers/usb/gadget/ci13xxx_udc.h
+++ b/drivers/usb/gadget/ci13xxx_udc.h
@@ -98,6 +98,7 @@
spinlock_t *lock;
struct device *device;
struct dma_pool *td_pool;
+ unsigned long dTD_update_fail_count;
};
struct ci13xxx;
@@ -139,6 +140,7 @@
int vbus_active; /* is VBUS active */
int softconnect; /* is pull-up enable allowed */
struct otg_transceiver *transceiver; /* Transceiver struct */
+ unsigned long dTD_update_fail_count;
};
/******************************************************************************
diff --git a/drivers/usb/gadget/f_rmnet.c b/drivers/usb/gadget/f_rmnet.c
index ebbd1d8..6f0fb07 100644
--- a/drivers/usb/gadget/f_rmnet.c
+++ b/drivers/usb/gadget/f_rmnet.c
@@ -444,7 +444,7 @@
event->wIndex = cpu_to_le16(dev->ifc_id);
event->wLength = cpu_to_le16(0);
- status = usb_ep_queue(dev->notify, dev->notify_req, GFP_KERNEL);
+ status = usb_ep_queue(dev->notify, dev->notify_req, GFP_ATOMIC);
if (status < 0) {
if (!atomic_read(&dev->online))
return;
@@ -701,6 +701,9 @@
f->descriptors = usb_copy_descriptors(rmnet_fs_function);
+ if (!f->descriptors)
+ goto fail;
+
dev->fs.in = usb_find_endpoint(rmnet_fs_function,
f->descriptors,
&rmnet_fs_in_desc);
@@ -722,6 +725,9 @@
/* copy descriptors, and track endpoint copies */
f->hs_descriptors = usb_copy_descriptors(rmnet_hs_function);
+ if (!f->hs_descriptors)
+ goto fail;
+
dev->hs.in = usb_find_endpoint(rmnet_hs_function,
f->hs_descriptors, &rmnet_hs_in_desc);
dev->hs.out = usb_find_endpoint(rmnet_hs_function,
@@ -737,6 +743,9 @@
return 0;
+fail:
+ if (f->descriptors)
+ usb_free_descriptors(f->descriptors);
ep_notify_alloc_fail:
dev->notify->driver_data = NULL;
dev->notify = NULL;
@@ -780,8 +789,12 @@
spin_lock_irqsave(&dev->lock, flags);
dev->cdev = c->cdev;
f = &dev->port.func;
- f->name = kasprintf(GFP_KERNEL, "rmnet%d", portno);
+ f->name = kasprintf(GFP_ATOMIC, "rmnet%d", portno);
spin_unlock_irqrestore(&dev->lock, flags);
+ if (!f->name) {
+ pr_err("%s: cannot allocate memory for name\n", __func__);
+ return -ENOMEM;
+ }
f->strings = rmnet_strings;
f->bind = frmnet_bind;
diff --git a/drivers/usb/misc/Kconfig b/drivers/usb/misc/Kconfig
index 1135806..98e57d5 100644
--- a/drivers/usb/misc/Kconfig
+++ b/drivers/usb/misc/Kconfig
@@ -283,7 +283,7 @@
config USB_QCOM_DUN_BRIDGE
tristate "USB Qualcomm modem DUN bridge driver"
- depends on USB && !USB_SERIAL_QUALCOMM
+ depends on USB
help
Say Y here if you have a Qualcomm modem device connected via USB that
will be bridged in kernel space. This driver will enable bridging
diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c
index 54a9dab..9788db4 100644
--- a/drivers/usb/serial/qcserial.c
+++ b/drivers/usb/serial/qcserial.c
@@ -39,7 +39,6 @@
{USB_DEVICE(0x19d2, 0xfff3)}, /* ONDA Gobi Modem device */
{USB_DEVICE(0x19d2, 0xfff2)}, /* ONDA Gobi QDL device */
{USB_DEVICE(0x1557, 0x0a80)}, /* OQO Gobi QDL device */
- {USB_DEVICE(0x05c6, 0x9001)}, /* Generic Gobi Modem device */
{USB_DEVICE(0x05c6, 0x9002)}, /* Generic Gobi Modem device */
{USB_DEVICE(0x05c6, 0x9202)}, /* Generic Gobi Modem device */
{USB_DEVICE(0x05c6, 0x9203)}, /* Generic Gobi Modem device */
diff --git a/drivers/video/msm/hdmi_msm.c b/drivers/video/msm/hdmi_msm.c
index 63c2147..9805b6c 100644
--- a/drivers/video/msm/hdmi_msm.c
+++ b/drivers/video/msm/hdmi_msm.c
@@ -1231,8 +1231,12 @@
* Configure the Threshold */
HDMI_OUTP_ND(0x0220, (10 << 16) | (2 << 0));
- /* 0x0224 HDMI_DDC_SETUP */
- HDMI_OUTP_ND(0x0224, 0);
+ /*
+ * 0x0224 HDMI_DDC_SETUP
+ * Setting 31:24 bits : Time units to wait before timeout
+ * when clock is being stalled by external sink device
+ */
+ HDMI_OUTP_ND(0x0224, 0xff000000);
/* 0x027C HDMI_DDC_REF
[6] REFTIMER_ENABLE Enable the timer
diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c
index c522b0f..ca3c079 100644
--- a/drivers/video/msm/mdp.c
+++ b/drivers/video/msm/mdp.c
@@ -1442,6 +1442,10 @@
}
#endif
+ if (mdp_rev >= MDP_REV_40)
+ mfd->cursor_update = mdp_hw_cursor_sync_update;
+ else
+ mfd->cursor_update = mdp_hw_cursor_update;
break;
case MIPI_CMD_PANEL:
@@ -1632,6 +1636,9 @@
static void mdp_early_suspend(struct early_suspend *h)
{
mdp_suspend_sub();
+#ifdef CONFIG_FB_MSM_DTV
+ mdp4_dtv_set_black_screen();
+#endif
if (footswitch && mdp_rev > MDP_REV_42)
regulator_disable(footswitch);
}
diff --git a/drivers/video/msm/mdp.h b/drivers/video/msm/mdp.h
index d2a2cf8..590fd13 100644
--- a/drivers/video/msm/mdp.h
+++ b/drivers/video/msm/mdp.h
@@ -680,7 +680,16 @@
#endif
int mdp_hw_cursor_update(struct fb_info *info, struct fb_cursor *cursor);
+#if defined(CONFIG_FB_MSM_OVERLAY) && defined(CONFIG_FB_MSM_MDP40)
int mdp_hw_cursor_sync_update(struct fb_info *info, struct fb_cursor *cursor);
+#else
+static inline int mdp_hw_cursor_sync_update(struct fb_info *info,
+ struct fb_cursor *cursor)
+{
+ return 0;
+}
+#endif
+
void mdp_enable_irq(uint32 term);
void mdp_disable_irq(uint32 term);
void mdp_disable_irq_nosync(uint32 term);
diff --git a/drivers/video/msm/mdp4.h b/drivers/video/msm/mdp4.h
index fd2f13e..f60cb78 100644
--- a/drivers/video/msm/mdp4.h
+++ b/drivers/video/msm/mdp4.h
@@ -389,6 +389,16 @@
/* empty */
}
#endif
+
+#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
+void mdp4_dtv_set_black_screen(void);
+#else
+static inline void mdp4_dtv_set_black_screen(void)
+{
+ /* empty */
+}
+#endif
+
void mdp4_dtv_overlay(struct msm_fb_data_type *mfd);
int mdp4_dtv_on(struct platform_device *pdev);
int mdp4_dtv_off(struct platform_device *pdev);
@@ -417,6 +427,10 @@
int mdp4_overlay_get(struct fb_info *info, struct mdp_overlay *req);
int mdp4_overlay_set(struct fb_info *info, struct mdp_overlay *req);
int mdp4_overlay_unset(struct fb_info *info, int ndx);
+void mdp4_overlay_dtv_wait_for_ov(struct msm_fb_data_type *mfd,
+ struct mdp4_overlay_pipe *pipe);
+int mdp4_overlay_play_wait(struct fb_info *info,
+ struct msmfb_overlay_data *req);
int mdp4_overlay_play(struct fb_info *info, struct msmfb_overlay_data *req,
struct file **pp_src_file, struct file **pp_src_plane1_file,
struct file **pp_src_plane2_file);
diff --git a/drivers/video/msm/mdp4_overlay.c b/drivers/video/msm/mdp4_overlay.c
index 1b2dec4..f865edf 100644
--- a/drivers/video/msm/mdp4_overlay.c
+++ b/drivers/video/msm/mdp4_overlay.c
@@ -2262,6 +2262,29 @@
return ((row_num_w * row_num_h * tile_w * tile_h) + 8191) & ~8191;
}
+int mdp4_overlay_play_wait(struct fb_info *info, struct msmfb_overlay_data *req)
+{
+ struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
+ struct mdp4_overlay_pipe *pipe;
+
+ if (mfd == NULL)
+ return -ENODEV;
+
+ if (!mfd->panel_power_on) /* suspended */
+ return -EPERM;
+
+ pipe = mdp4_overlay_ndx2pipe(req->id);
+
+ if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
+ return -EINTR;
+
+ mdp4_overlay_dtv_wait_for_ov(mfd, pipe);
+
+ mutex_unlock(&mfd->dma->ov_mutex);
+
+ return 0;
+}
+
int mdp4_overlay_play(struct fb_info *info, struct msmfb_overlay_data *req,
struct file **pp_src_file, struct file **pp_src_plane1_file,
struct file **pp_src_plane2_file)
diff --git a/drivers/video/msm/mdp4_overlay_dtv.c b/drivers/video/msm/mdp4_overlay_dtv.c
index 82bce01..a9b32ab 100644
--- a/drivers/video/msm/mdp4_overlay_dtv.c
+++ b/drivers/video/msm/mdp4_overlay_dtv.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -334,7 +334,7 @@
mdp4_set_perf_level();
}
-static void mdp4_overlay_dtv_wait4_ov_done(struct msm_fb_data_type *mfd)
+static void mdp4_overlay_dtv_ov_start(struct msm_fb_data_type *mfd)
{
unsigned long flag;
@@ -347,6 +347,18 @@
mdp_intr_mask |= INTR_OVERLAY1_DONE;
outp32(MDP_INTR_ENABLE, mdp_intr_mask);
spin_unlock_irqrestore(&mdp_spin_lock, flag);
+ mfd->ov_start = true;
+}
+
+static void mdp4_overlay_dtv_wait4_ov_done(struct msm_fb_data_type *mfd,
+ struct mdp4_overlay_pipe *pipe)
+{
+ u32 data = inpdw(MDP_BASE + DTV_BASE);
+
+ mfd->ov_start = false;
+
+ if (!(data & 0x1) || (pipe == NULL))
+ return;
wait_for_completion_killable(&dtv_pipe->comp);
mdp_disable_irq(MDP_OVERLAY1_TERM);
}
@@ -356,15 +368,28 @@
{
mdp4_overlay_reg_flush(pipe, 1);
+ mdp4_overlay_dtv_ov_start(mfd);
+
if (pipe->flags & MDP_OV_PLAY_NOWAIT)
return;
- mdp4_overlay_dtv_wait4_ov_done(mfd);
+ mdp4_overlay_dtv_wait4_ov_done(mfd, pipe);
/* change mdp clk while mdp is idle` */
mdp4_set_perf_level();
}
+void mdp4_overlay_dtv_wait_for_ov(struct msm_fb_data_type *mfd,
+ struct mdp4_overlay_pipe *pipe)
+{
+ if (mfd->ov_end) {
+ mfd->ov_end = false;
+ return;
+ }
+ mdp4_overlay_dtv_wait4_ov_done(mfd, pipe);
+ mdp4_set_perf_level();
+}
+
void mdp4_external_vsync_dtv()
{
complete(&dtv_pipe->comp);
@@ -378,12 +403,41 @@
complete(&dtv_pipe->comp);
}
+#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
+void mdp4_dtv_set_black_screen(void)
+{
+ char *rgb_base;
+ /*Black color*/
+ uint32 color = 0x00000000;
+ uint32 temp_src_format;
+
+ if (!dtv_pipe) {
+ pr_err("dtv_pipe is not configured yet\n");
+ return;
+ }
+ rgb_base = MDP_BASE + MDP4_RGB_BASE;
+ rgb_base += (MDP4_RGB_OFF * dtv_pipe->pipe_num);
+
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ /*
+ * RGB Constant Color
+ */
+ MDP_OUTP(rgb_base + 0x1008, color);
+ /*
+ * MDP_RGB_SRC_FORMAT
+ */
+ temp_src_format = inpdw(rgb_base + 0x0050);
+ MDP_OUTP(rgb_base + 0x0050, temp_src_format | BIT(22));
+ mdp4_overlay_reg_flush(dtv_pipe, 1);
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+}
+#endif
+
void mdp4_dtv_overlay(struct msm_fb_data_type *mfd)
{
struct fb_info *fbi = mfd->fbi;
uint8 *buf;
int bpp;
- unsigned long flag;
struct mdp4_overlay_pipe *pipe;
if (!mfd->panel_power_on)
@@ -400,19 +454,12 @@
pipe = dtv_pipe;
pipe->srcp0_addr = (uint32) buf;
mdp4_overlay_rgb_setup(pipe);
- mdp4_overlay_reg_flush(pipe, 1); /* rgb2 and mixer1 */
- /* enable irq */
- spin_lock_irqsave(&mdp_spin_lock, flag);
- mdp_enable_irq(MDP_OVERLAY1_TERM);
- INIT_COMPLETION(dtv_pipe->comp);
- mfd->dma->waiting = TRUE;
- outp32(MDP_INTR_CLEAR, INTR_OVERLAY1_DONE);
- mdp_intr_mask |= INTR_OVERLAY1_DONE;
- outp32(MDP_INTR_ENABLE, mdp_intr_mask);
- spin_unlock_irqrestore(&mdp_spin_lock, flag);
- wait_for_completion_killable(&dtv_pipe->comp);
- mdp_disable_irq(MDP_OVERLAY1_TERM);
+ if (mfd->ov_start) {
+ mdp4_overlay_dtv_wait4_ov_done(mfd, pipe);
+ mfd->ov_end = true;
+ }
+ mdp4_overlay_dtv_ov_done_push(mfd, pipe);
mdp4_stat.kickoff_dtv++;
mutex_unlock(&mfd->dma->ov_mutex);
diff --git a/drivers/video/msm/mipi_chimei_wxga_pt.c b/drivers/video/msm/mipi_chimei_wxga_pt.c
index fe7035a..4729d83 100644
--- a/drivers/video/msm/mipi_chimei_wxga_pt.c
+++ b/drivers/video/msm/mipi_chimei_wxga_pt.c
@@ -168,7 +168,12 @@
pinfo->mipi.stream = false; /* dma_p */
pinfo->mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE;
pinfo->mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
- pinfo->mipi.fixed_packet_size = 4;
+ /*
+ * toshiba d2l chip does not need max_pkt_szie dcs cmd
+ * client reply len is directly configure through
+ * RDPKTLN register (0x0404)
+ */
+ pinfo->mipi.no_max_pkt_size = 1;
pinfo->mipi.force_clk_lane_hs = 1;
ret = mipi_tc358764_dsi2lvds_register(pinfo, MIPI_DSI_PRIM,
diff --git a/drivers/video/msm/mipi_dsi_host.c b/drivers/video/msm/mipi_dsi_host.c
index 9caa154..8d07e56 100644
--- a/drivers/video/msm/mipi_dsi_host.c
+++ b/drivers/video/msm/mipi_dsi_host.c
@@ -1163,16 +1163,17 @@
unsigned long flag;
char cmd;
+ if (mfd->panel_info.mipi.no_max_pkt_size) {
+ /* Only support rlen = 4*n */
+ rlen += 3;
+ rlen &= 0x03;
+ }
+
len = rlen;
diff = 0;
if (len <= 2)
cnt = 4; /* short read */
- else if (mfd->panel_info.mipi.fixed_packet_size) {
- len = mfd->panel_info.mipi.fixed_packet_size;
- pkt_size = len; /* Avoid command to the device */
- cnt = (len + 6 + 3) & ~0x03; /* Add padding for align */
- }
else {
if (len > MIPI_DSI_LEN)
len = MIPI_DSI_LEN; /* 8 bytes at most */
@@ -1204,12 +1205,14 @@
dsi_mdp_busy = TRUE;
spin_unlock_irqrestore(&dsi_mdp_lock, flag);
- /* packet size need to be set at every read */
- pkt_size = len;
- max_pktsize[0] = pkt_size;
- mipi_dsi_buf_init(tp);
- mipi_dsi_cmd_dma_add(tp, pkt_size_cmd);
- mipi_dsi_cmd_dma_tx(tp);
+ if (!mfd->panel_info.mipi.no_max_pkt_size) {
+ /* packet size need to be set at every read */
+ pkt_size = len;
+ max_pktsize[0] = pkt_size;
+ mipi_dsi_buf_init(tp);
+ mipi_dsi_cmd_dma_add(tp, pkt_size_cmd);
+ mipi_dsi_cmd_dma_tx(tp);
+ }
mipi_dsi_buf_init(tp);
mipi_dsi_cmd_dma_add(tp, cmds);
@@ -1222,6 +1225,14 @@
* at RDBK_DATA register already
*/
mipi_dsi_buf_init(rp);
+ if (mfd->panel_info.mipi.no_max_pkt_size) {
+ /*
+ * expect rlen = n * 4
+ * short alignement for start addr
+ */
+ rp->data += 2;
+ }
+
mipi_dsi_cmd_dma_rx(rp, cnt);
spin_lock_irqsave(&dsi_mdp_lock, flag);
@@ -1230,6 +1241,17 @@
complete(&dsi_mdp_comp);
spin_unlock_irqrestore(&dsi_mdp_lock, flag);
+ if (mfd->panel_info.mipi.no_max_pkt_size) {
+ /*
+ * remove extra 2 bytes from previous
+ * rx transaction at shift register
+ * which was inserted during copy
+ * shift registers to rx buffer
+ * rx payload start from long alignment addr
+ */
+ rp->data += 2;
+ }
+
cmd = rp->data[0];
switch (cmd) {
case DTYPE_ACK_ERR_RESP:
diff --git a/drivers/video/msm/mipi_tc358764_dsi2lvds.c b/drivers/video/msm/mipi_tc358764_dsi2lvds.c
index b1cdf78..2594c1d 100644
--- a/drivers/video/msm/mipi_tc358764_dsi2lvds.c
+++ b/drivers/video/msm/mipi_tc358764_dsi2lvds.c
@@ -186,7 +186,7 @@
#define DEBUG01 0x05A4 /* LVDS Data */
/* PWM */
-#define PWM_FREQ_HZ 210
+#define PWM_FREQ_HZ (66*1000) /* 66 KHZ */
#define PWM_LEVEL 15
#define PWM_PERIOD_USEC (USEC_PER_SEC / PWM_FREQ_HZ)
#define PWM_DUTY_LEVEL (PWM_PERIOD_USEC / PWM_LEVEL)
diff --git a/drivers/video/msm/msm_fb.c b/drivers/video/msm/msm_fb.c
index 94c38ff..d21910b 100644
--- a/drivers/video/msm/msm_fb.c
+++ b/drivers/video/msm/msm_fb.c
@@ -2501,6 +2501,26 @@
return mdp4_overlay_unset(info, ndx);
}
+static int msmfb_overlay_play_wait(struct fb_info *info, unsigned long *argp)
+{
+ int ret;
+ struct msmfb_overlay_data req;
+ struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
+
+ if (mfd->overlay_play_enable == 0) /* nothing to do */
+ return 0;
+
+ ret = copy_from_user(&req, argp, sizeof(req));
+ if (ret) {
+ pr_err("%s:msmfb_overlay_wait ioctl failed", __func__);
+ return ret;
+ }
+
+ ret = mdp4_overlay_play_wait(info, &req);
+
+ return ret;
+}
+
static int msmfb_overlay_play(struct fb_info *info, unsigned long *argp)
{
int ret;
@@ -2764,6 +2784,11 @@
ret = msmfb_overlay_play_enable(info, argp);
up(&msm_fb_ioctl_ppp_sem);
break;
+ case MSMFB_OVERLAY_PLAY_WAIT:
+ down(&msm_fb_ioctl_ppp_sem);
+ ret = msmfb_overlay_play_wait(info, argp);
+ up(&msm_fb_ioctl_ppp_sem);
+ break;
case MSMFB_OVERLAY_BLT:
down(&msm_fb_ioctl_ppp_sem);
ret = msmfb_overlay_blt(info, argp);
@@ -2911,6 +2936,9 @@
break;
case MSMFB_HISTOGRAM:
+ if (!mfd->panel_power_on)
+ return -EPERM;
+
if (!mfd->do_histogram)
return -ENODEV;
diff --git a/drivers/video/msm/msm_fb.h b/drivers/video/msm/msm_fb.h
index bdf32eb..43802a2 100644
--- a/drivers/video/msm/msm_fb.h
+++ b/drivers/video/msm/msm_fb.h
@@ -150,6 +150,7 @@
struct timer_list msmfb_no_update_notify_timer;
struct completion msmfb_update_notify;
struct completion msmfb_no_update_notify;
+ u32 ov_start, ov_end;
};
struct dentry *msm_fb_get_debugfs_root(void);
diff --git a/drivers/video/msm/msm_fb_panel.h b/drivers/video/msm/msm_fb_panel.h
index 4c415b6..16979b1 100644
--- a/drivers/video/msm/msm_fb_panel.h
+++ b/drivers/video/msm/msm_fb_panel.h
@@ -122,7 +122,7 @@
char dma_trigger;
uint32 dsi_pclk_rate;
/* The packet-size should not bet changed */
- char fixed_packet_size;
+ char no_max_pkt_size;
/* Clock required during LP commands */
char force_clk_lane_hs;
/* Pad width */
diff --git a/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker.c b/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker.c
index 54d48b8..7ac32b7 100644
--- a/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker.c
+++ b/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker.c
@@ -407,7 +407,7 @@
{
VCDRES_MSG_MED("\n res_trk_power_up():: "
"Calling AXI add requirement\n");
- ebi1_clk = clk_get(NULL, "mem_clk");
+ ebi1_clk = clk_get(resource_context.device, "mem_clk");
if (IS_ERR(ebi1_clk)) {
VCDRES_MSG_ERROR("Request AXI bus QOS fails.");
return false;
diff --git a/include/linux/eeprom_93cx6.h b/include/linux/eeprom_93cx6.h
index c4627cb..e50f98b 100644
--- a/include/linux/eeprom_93cx6.h
+++ b/include/linux/eeprom_93cx6.h
@@ -33,6 +33,7 @@
#define PCI_EEPROM_WIDTH_93C86 8
#define PCI_EEPROM_WIDTH_OPCODE 3
#define PCI_EEPROM_WRITE_OPCODE 0x05
+#define PCI_EEPROM_ERASE_OPCODE 0x07
#define PCI_EEPROM_READ_OPCODE 0x06
#define PCI_EEPROM_EWDS_OPCODE 0x10
#define PCI_EEPROM_EWEN_OPCODE 0x13
@@ -46,6 +47,7 @@
* @register_write(struct eeprom_93cx6 *eeprom): handler to
* write to the eeprom register by using all reg_* fields.
* @width: eeprom width, should be one of the PCI_EEPROM_WIDTH_* defines
+ * @drive_data: Set if we're driving the data line.
* @reg_data_in: register field to indicate data input
* @reg_data_out: register field to indicate data output
* @reg_data_clock: register field to set the data clock
@@ -62,6 +64,7 @@
int width;
+ char drive_data;
char reg_data_in;
char reg_data_out;
char reg_data_clock;
@@ -72,3 +75,8 @@
const u8 word, u16 *data);
extern void eeprom_93cx6_multiread(struct eeprom_93cx6 *eeprom,
const u8 word, __le16 *data, const u16 words);
+
+extern void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom, bool enable);
+
+extern void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom,
+ u8 addr, u16 data);
diff --git a/include/linux/i2c/atmel_mxt_ts.h b/include/linux/i2c/atmel_mxt_ts.h
index 6a1c918..c425343 100644
--- a/include/linux/i2c/atmel_mxt_ts.h
+++ b/include/linux/i2c/atmel_mxt_ts.h
@@ -3,6 +3,7 @@
*
* Copyright (C) 2010 Samsung Electronics Co.Ltd
* Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -30,18 +31,12 @@
const u8 *config;
size_t config_length;
- unsigned int x_line;
- unsigned int y_line;
unsigned int x_size;
unsigned int y_size;
- unsigned int blen;
- unsigned int threshold;
- unsigned int voltage;
- unsigned char orient;
unsigned long irqflags;
bool i2c_pull_up;
- u8(*read_chg) (void);
+ u8(*read_chg) (void);
int (*init_hw) (bool);
int (*power_on) (bool);
};
diff --git a/include/linux/input/rmi_i2c.h b/include/linux/input/rmi_i2c.h
new file mode 100644
index 0000000..65ebbfb
--- /dev/null
+++ b/include/linux/input/rmi_i2c.h
@@ -0,0 +1,58 @@
+/**
+ *
+ * Synaptics RMI over I2C Physical Layer Driver Header File.
+ * Copyright (c) 2007 - 2011, Synaptics Incorporated
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *#############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *#############################################################################
+ */
+
+#ifndef _RMI_I2C_H
+#define _RMI_I2C_H
+
+#include <linux/input/rmi_platformdata.h>
+
+/* Sensor-specific configuration data, to be included as the platform data
+ * for the relevant i2c_board_info entry.
+ *
+ * This describes a single RMI4 sensor on an I2C bus, including:
+ * its I2C address, IRQ (if any), the type of IRQ (if applicable), and an
+ * optional list of any non-default settings (on a per function basis)
+ * to be applied at start up.
+ */
+struct rmi_i2c_platformdata {
+ /* The seven-bit i2c address of the sensor. */
+ int i2c_address;
+ /* The number of the irq. Set to zero if polling is required. */
+ int irq;
+ /* The type of the irq (e.g., IRQF_TRIGGER_FALLING).
+ * Only valid if irq != 0 */
+ int irq_type;
+
+ /* If >0, the driver will delay this many milliseconds before attempting
+ * I2C communications. This is necessary because some horribly broken
+ * development systems don't bring their I2C up very fast after system
+ * power on or reboot. In most cases, you can safely ignore this.
+ */
+ int delay_ms;
+
+ /* Use this to specify platformdata that is not I2C specific. */
+ struct rmi_sensordata *sensordata;
+};
+
+#endif
diff --git a/include/linux/input/rmi_platformdata.h b/include/linux/input/rmi_platformdata.h
new file mode 100644
index 0000000..8c44d4c
--- /dev/null
+++ b/include/linux/input/rmi_platformdata.h
@@ -0,0 +1,125 @@
+/**
+ *
+ * Synaptics RMI platform data definitions for use in board files.
+ * Copyright (c) 2007 - 2011, Synaptics Incorporated
+ *
+ */
+/*
+ * This file is licensed under the GPL2 license.
+ *
+ *############################################################################
+ * GPL
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ *############################################################################
+ */
+
+#if !defined(_RMI_PLATFORMDATA_H)
+#define _RMI_PLATFORMDATA_H
+
+#define RMI_F01_INDEX 0x01
+#define RMI_F11_INDEX 0x11
+#define RMI_F19_INDEX 0x19
+#define RMI_F34_INDEX 0x34
+
+
+/* A couple of structs that are useful for frequently occuring constructs,such
+ * as coordinate origin offsets or coordinate clipping values.
+ */
+struct rmi_XY_pair {
+ int x;
+ int y;
+};
+
+struct rmi_range {
+ int min;
+ int max;
+};
+
+/* This contains sensor specific data that is not specialized to I2C or SPI.
+ */
+struct rmi_sensordata {
+ /* This will be called from rmi_register_sensor(). You can use it
+ * to set up gpios, IRQs, and other platform specific infrastructure.
+ */
+ int (*rmi_sensor_setup)(void);
+
+ /* This will be called when the sensor is unloaded. Use this to
+ * release gpios, IRQs, and other platform specific infrastructure.
+ */
+ void (*rmi_sensor_teardown)(void);
+
+ /* Use this to specify non-default settings on a per function basis.
+ */
+ struct rmi_functiondata_list *perfunctiondata;
+};
+
+/* This contains the per-function customization for a given function.We store
+ * the data this way in order to avoid allocating a large sparse array
+ * typically
+ * only a few functions are present on a sensor, and even fewer will be have
+ * custom settings. There is a very small penalty paid for doing a linear
+ * search through the list to find a given function's data, but since the list
+ * is typically very short and is searched only at system boot time, this is
+ * considered acceptable.
+ *
+ * When adding new fields to a functiondata struct, please follow these rules:
+ * - Where possible, use 0 to indicate that the value should be defaulted.
+ * This works pretty well for bools, ints, and chars.
+ * - Where this is not practical (for example, in coordinate offsets or
+ * range clipping), use a pointer. Set that pointer to null to indicate
+ * that the value should be defaulted.
+ */
+struct rmi_functiondata {
+ unsigned char function_index;
+ void *data;
+};
+
+/* This can be included in the platformdata for SPI or I2C RMI4 devices to
+ * customize the settings of the functions on a given sensor.
+ */
+struct rmi_functiondata_list {
+ unsigned char count; /* Number of elements in the array */
+ struct rmi_functiondata *functiondata;
+};
+
+struct rmi_f01_functiondata {
+ /* What this does is product specific. For most, but not all, RMI4
+ * devices, you can set this to true in order to request the device
+ * report data at half the usual rate. This can be useful on slow
+ * CPUs that don't have the resources to process data at the usual
+ * rate. However, the meaning of this field is product specific, and
+ * you should consult the product spec for your sensor to find out
+ * what this will do.
+ */
+ bool nonstandard_report_rate;
+};
+
+struct rmi_f11_functiondata {
+ bool swap_axes;
+ bool flipX;
+ bool flipY;
+ int button_height;
+ struct rmi_XY_pair *offset;
+ struct rmi_range *clipX;
+ struct rmi_range *clipY;
+};
+
+struct rmi_button_map {
+ unsigned char nbuttons;
+ unsigned char *map;
+};
+
+struct rmi_f19_functiondata {
+ struct rmi_button_map *button_map;
+};
+
+#endif
diff --git a/include/linux/ion.h b/include/linux/ion.h
index ece819d..9f220f8 100644
--- a/include/linux/ion.h
+++ b/include/linux/ion.h
@@ -57,11 +57,14 @@
ION_HEAP_SYSTEM_CONTIG_ID,
ION_HEAP_EBI_ID,
ION_HEAP_SMI_ID,
+ ION_HEAP_ADSP_ID,
+ ION_HEAP_AUDIO_ID,
};
#define ION_KMALLOC_HEAP_NAME "kmalloc"
#define ION_VMALLOC_HEAP_NAME "vmalloc"
#define ION_EBI1_HEAP_NAME "EBI1"
+#define ION_ADSP_HEAP_NAME "adsp"
#define CACHED 1
#define UNCACHED 0
@@ -73,6 +76,7 @@
#define ION_IS_CACHED(__flags) ((__flags) & (1 << ION_CACHE_SHIFT))
#ifdef __KERNEL__
+#include <linux/err.h>
#include <mach/ion.h>
struct ion_device;
struct ion_heap;
@@ -118,6 +122,8 @@
struct ion_platform_heap heaps[];
};
+#ifdef CONFIG_ION
+
/**
* ion_client_create() - allocate a client and returns it
* @dev: the global ion device
@@ -269,6 +275,93 @@
* the handle to use to refer to it further.
*/
struct ion_handle *ion_import_fd(struct ion_client *client, int fd);
+
+/**
+ * ion_handle_get_flags - get the flags for a given handle
+ *
+ * @client - client who allocated the handle
+ * @handle - handle to get the flags
+ * @flags - pointer to store the flags
+ *
+ * Gets the current flags for a handle. These flags indicate various options
+ * of the buffer (caching, security, etc.)
+ */
+int ion_handle_get_flags(struct ion_client *client, struct ion_handle *handle,
+ unsigned long *flags);
+
+#else
+static inline struct ion_client *ion_client_create(struct ion_device *dev,
+ unsigned int heap_mask, const char *name)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline struct ion_client *msm_ion_client_create(unsigned int heap_mask,
+ const char *name)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline void ion_client_destroy(struct ion_client *client) { }
+
+static inline struct ion_handle *ion_alloc(struct ion_client *client,
+ size_t len, size_t align, unsigned int flags)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline void ion_free(struct ion_client *client,
+ struct ion_handle *handle) { }
+
+
+static inline int ion_phys(struct ion_client *client,
+ struct ion_handle *handle, ion_phys_addr_t *addr, size_t *len)
+{
+ return -ENODEV;
+}
+
+static inline void *ion_map_kernel(struct ion_client *client,
+ struct ion_handle *handle, unsigned long flags)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline void ion_unmap_kernel(struct ion_client *client,
+ struct ion_handle *handle) { }
+
+static inline struct scatterlist *ion_map_dma(struct ion_client *client,
+ struct ion_handle *handle, unsigned long flags)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline void ion_unmap_dma(struct ion_client *client,
+ struct ion_handle *handle) { }
+
+static inline struct ion_buffer *ion_share(struct ion_client *client,
+ struct ion_handle *handle)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline struct ion_handle *ion_import(struct ion_client *client,
+ struct ion_buffer *buffer)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline struct ion_handle *ion_import_fd(struct ion_client *client,
+ int fd)
+{
+ return ERR_PTR(-ENODEV);
+}
+
+static inline int ion_handle_get_flags(struct ion_client *client,
+ struct ion_handle *handle, unsigned long *flags)
+{
+ return -ENODEV;
+}
+#endif /* CONFIG_ION */
#endif /* __KERNEL__ */
/**
@@ -350,6 +443,20 @@
unsigned int offset;
unsigned int length;
};
+
+/* struct ion_flag_data - information about flags for this buffer
+ *
+ * @handle: handle to get flags from
+ * @flags: flags of this handle
+ *
+ * Takes handle as an input and outputs the flags from the handle
+ * in the flag field.
+ */
+struct ion_flag_data {
+ struct ion_handle *handle;
+ unsigned long flags;
+};
+
#define ION_IOC_MAGIC 'I'
/**
@@ -428,4 +535,13 @@
*/
#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MAGIC, 9, \
struct ion_flush_data)
+
+/**
+ * DOC: ION_IOC_GET_FLAGS - get the flags of the handle
+ *
+ * Gets the flags of the current handle which indicate cachability,
+ * secure state etc.
+ */
+#define ION_IOC_GET_FLAGS _IOWR(ION_IOC_MAGIC, 10, \
+ struct ion_flag_data)
#endif /* _LINUX_ION_H */
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 243d8e9..d03bc09 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -113,14 +113,18 @@
};
struct msi_desc;
+struct irq_domain;
/**
* struct irq_data - per irq and irq chip data passed down to chip functions
* @irq: interrupt number
+ * @hwirq: hardware interrupt number, local to the interrupt domain
* @node: node index useful for balancing
* @state_use_accessors: status information for irq chip functions.
* Use accessor functions to deal with it
* @chip: low level interrupt hardware access
+ * @domain: Interrupt translation domain; responsible for mapping
+ * between hwirq number and linux irq number.
* @handler_data: per-IRQ data for the irq_chip methods
* @chip_data: platform-specific per-chip private data for the chip
* methods, to allow shared chip implementations
@@ -133,9 +137,11 @@
*/
struct irq_data {
unsigned int irq;
+ unsigned long hwirq;
unsigned int node;
unsigned int state_use_accessors;
struct irq_chip *chip;
+ struct irq_domain *domain;
void *handler_data;
void *chip_data;
struct msi_desc *msi_desc;
diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
new file mode 100644
index 0000000..e807ad6
--- /dev/null
+++ b/include/linux/irqdomain.h
@@ -0,0 +1,91 @@
+/*
+ * irq_domain - IRQ translation domains
+ *
+ * Translation infrastructure between hw and linux irq numbers. This is
+ * helpful for interrupt controllers to implement mapping between hardware
+ * irq numbers and the Linux irq number space.
+ *
+ * irq_domains also have a hook for translating device tree interrupt
+ * representation into a hardware irq number that can be mapped back to a
+ * Linux irq number without any extra platform support code.
+ *
+ * irq_domain is expected to be embedded in an interrupt controller's private
+ * data structure.
+ */
+#ifndef _LINUX_IRQDOMAIN_H
+#define _LINUX_IRQDOMAIN_H
+
+#include <linux/irq.h>
+#include <linux/mod_devicetable.h>
+
+#ifdef CONFIG_IRQ_DOMAIN
+struct device_node;
+struct irq_domain;
+
+/**
+ * struct irq_domain_ops - Methods for irq_domain objects
+ * @to_irq: (optional) given a local hardware irq number, return the linux
+ * irq number. If to_irq is not implemented, then the irq_domain
+ * will use this translation: irq = (domain->irq_base + hwirq)
+ * @dt_translate: Given a device tree node and interrupt specifier, decode
+ * the hardware irq number and linux irq type value.
+ */
+struct irq_domain_ops {
+ unsigned int (*to_irq)(struct irq_domain *d, unsigned long hwirq);
+
+#ifdef CONFIG_OF
+ int (*dt_translate)(struct irq_domain *d, struct device_node *node,
+ const u32 *intspec, unsigned int intsize,
+ unsigned long *out_hwirq, unsigned int *out_type);
+#endif /* CONFIG_OF */
+};
+
+/**
+ * struct irq_domain - Hardware interrupt number translation object
+ * @list: Element in global irq_domain list.
+ * @irq_base: Start of irq_desc range assigned to the irq_domain. The creator
+ * of the irq_domain is responsible for allocating the array of
+ * irq_desc structures.
+ * @nr_irq: Number of irqs managed by the irq domain
+ * @ops: pointer to irq_domain methods
+ * @priv: private data pointer for use by owner. Not touched by irq_domain
+ * core code.
+ * @of_node: (optional) Pointer to device tree nodes associated with the
+ * irq_domain. Used when decoding device tree interrupt specifiers.
+ */
+struct irq_domain {
+ struct list_head list;
+ unsigned int irq_base;
+ unsigned int nr_irq;
+ const struct irq_domain_ops *ops;
+ void *priv;
+ struct device_node *of_node;
+};
+
+/**
+ * irq_domain_to_irq() - Translate from a hardware irq to a linux irq number
+ *
+ * Returns the linux irq number associated with a hardware irq. By default,
+ * the mapping is irq == domain->irq_base + hwirq, but this mapping can
+ * be overridden if the irq_domain implements a .to_irq() hook.
+ */
+static inline unsigned int irq_domain_to_irq(struct irq_domain *d,
+ unsigned long hwirq)
+{
+ return d->ops->to_irq ? d->ops->to_irq(d, hwirq) : d->irq_base + hwirq;
+}
+
+extern void irq_domain_add(struct irq_domain *domain);
+extern void irq_domain_del(struct irq_domain *domain);
+#endif /* CONFIG_IRQ_DOMAIN */
+
+#if defined(CONFIG_IRQ_DOMAIN) && defined(CONFIG_OF_IRQ)
+extern void irq_domain_add_simple(struct device_node *controller, int irq_base);
+extern void irq_domain_generate_simple(const struct of_device_id *match,
+ u64 phys_base, unsigned int irq_start);
+#else /* CONFIG_IRQ_DOMAIN && CONFIG_OF_IRQ */
+static inline void irq_domain_generate_simple(const struct of_device_id *match,
+ u64 phys_base, unsigned int irq_start) { }
+#endif /* CONFIG_IRQ_DOMAIN && CONFIG_OF_IRQ */
+
+#endif /* _LINUX_IRQDOMAIN_H */
diff --git a/include/linux/leds-pm8xxx.h b/include/linux/leds-pm8xxx.h
index edd3c28..3f31498 100644
--- a/include/linux/leds-pm8xxx.h
+++ b/include/linux/leds-pm8xxx.h
@@ -14,6 +14,7 @@
#define __LEDS_PM8XXX_H__
#include <linux/kernel.h>
+#include <linux/mfd/pm8xxx/pwm.h>
#define PM8XXX_LEDS_DEV_NAME "pm8xxx-led"
@@ -51,24 +52,30 @@
/**
* pm8xxx_led_config - led configuration parameters
- * id - LED id
- * mode - LED mode
- * max_current - maximum current that LED can sustain
+ * @id - LED id
+ * @mode - LED mode
+ * @max_current - maximum current that LED can sustain
+ * @pwm_channel - PWM channel ID the LED is driven to
+ * @pwm_period_us - PWM period value in micro seconds
+ * @pwm_duty_cycles - PWM duty cycle information
*/
struct pm8xxx_led_config {
u8 id;
u8 mode;
u16 max_current;
+ int pwm_channel;
+ u32 pwm_period_us;
+ struct pm8xxx_pwm_duty_cycles *pwm_duty_cycles;
};
/**
* pm8xxx_led_platform_data - platform data for LED
- * led_core - array of LEDs. Each datum in array contains
+ * @led_core - array of LEDs. Each datum in array contains
* core data for the LED
- * configs - array of platform configuration parameters
+ * @configs - array of platform configuration parameters
* for each LED. It maps one-to-one with
* array of LEDs
- * num_configs - count of members of configs array
+ * @num_configs - count of members of configs array
*/
struct pm8xxx_led_platform_data {
struct led_platform_data *led_core;
diff --git a/include/linux/mfd/pm8xxx/misc.h b/include/linux/mfd/pm8xxx/misc.h
index 17ec31b..2374d11 100644
--- a/include/linux/mfd/pm8xxx/misc.h
+++ b/include/linux/mfd/pm8xxx/misc.h
@@ -28,6 +28,13 @@
int priority;
};
+enum pm8xxx_uart_path_sel {
+ UART_NONE,
+ UART_TX1_RX1,
+ UART_TX2_RX2,
+ UART_TX3_RX3,
+};
+
#if defined(CONFIG_MFD_PM8XXX_MISC) || defined(CONFIG_MFD_PM8XXX_MISC_MODULE)
/**
@@ -39,6 +46,8 @@
*/
int pm8xxx_reset_pwr_off(int reset);
+int pm8xxx_uart_gpio_mux_ctrl(enum pm8xxx_uart_path_sel uart_path_sel);
+
#else
static inline int pm8xxx_reset_pwr_off(int reset)
@@ -46,6 +55,12 @@
return -ENODEV;
}
+static inline int
+pm8xxx_uart_gpio_mux_ctrl(enum pm8xxx_uart_path_sel uart_path_sel)
+{
+ return -ENODEV;
+}
+
#endif
#endif
diff --git a/include/linux/mfd/pm8xxx/pm8018.h b/include/linux/mfd/pm8xxx/pm8018.h
index 69e781c..1093409 100644
--- a/include/linux/mfd/pm8xxx/pm8018.h
+++ b/include/linux/mfd/pm8xxx/pm8018.h
@@ -27,6 +27,8 @@
#include <linux/mfd/pm8xxx/misc.h>
#include <linux/regulator/pm8018-regulator.h>
#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
+#include <linux/mfd/pm8xxx/pwm.h>
+#include <linux/leds-pm8xxx.h>
#define PM8018_CORE_DEV_NAME "pm8018-core"
@@ -65,6 +67,7 @@
struct pm8018_regulator_platform_data *regulator_pdatas;
struct pm8xxx_adc_platform_data *adc_pdata;
int num_regulators;
+ struct pm8xxx_led_platform_data *leds_pdata;
};
#endif
diff --git a/include/linux/mfd/pm8xxx/pm8921-charger.h b/include/linux/mfd/pm8xxx/pm8921-charger.h
index 9f98656..aeb88b2 100644
--- a/include/linux/mfd/pm8xxx/pm8921-charger.h
+++ b/include/linux/mfd/pm8xxx/pm8921-charger.h
@@ -119,6 +119,26 @@
PM8921_CHG_SRC_DC,
};
+/**
+ * struct ext_chg_pm8921 -
+ * @name: name of the external charger
+ * @ctx: client context.
+ * @start_charging: callback to start charging. Can be called from an
+ * interrupt context
+ * @stop_charging: callback to stop charging. Can be called from an
+ * interrupt context
+ * @is_trickle: callback to check if trickle charging.
+ * Can be called from an interrupt context
+ *
+ */
+struct ext_chg_pm8921 {
+ const char *name;
+ void *ctx;
+ int (*start_charging) (void *ctx);
+ int (*stop_charging) (void *ctx);
+ bool (*is_trickle) (void *ctx);
+};
+
#if defined(CONFIG_PM8921_CHARGER) || defined(CONFIG_PM8921_CHARGER_MODULE)
void pm8921_charger_vbus_draw(unsigned int mA);
int pm8921_charger_register_vbus_sn(void (*callback)(int));
@@ -190,6 +210,28 @@
*
*/
int pm8921_batt_temperature(void);
+/**
+ * register_external_dc_charger -
+ * @ext: The structure representing an external charger
+ *
+ * RETURNS: Negative error code is there was a problem. Zero for sucess
+ *
+ * The charger callbacks might be called even before this function
+ * completes. The external charger driver should be ready to handle
+ * it.
+ */
+int register_external_dc_charger(struct ext_chg_pm8921 *ext);
+
+/**
+ * unregister_external_dc_charger -
+ * @ext: The structure representing an external charger
+ *
+ * The charger callbacks might be called even before this function
+ * completes. The external charger driver should be ready to handle
+ * it.
+ */
+void unregister_external_dc_charger(struct ext_chg_pm8921 *ext);
+
#else
static inline void pm8921_charger_vbus_draw(unsigned int mA)
{
@@ -238,6 +280,15 @@
{
return -ENXIO;
}
+static inline int register_external_dc_charger(struct ext_chg_pm8921 *ext)
+{
+ pr_err("%s.not implemented.\n", __func__);
+ return -ENODEV;
+}
+static inline void unregister_external_dc_charger(struct ext_chg_pm8921 *ext)
+{
+ pr_err("%s.not implemented.\n", __func__);
+}
#endif
#endif
diff --git a/include/linux/mfd/pm8xxx/pwm.h b/include/linux/mfd/pm8xxx/pwm.h
index b15645d..be3ec65 100644
--- a/include/linux/mfd/pm8xxx/pwm.h
+++ b/include/linux/mfd/pm8xxx/pwm.h
@@ -78,6 +78,20 @@
};
/**
+ * struct pm8xxx_pwm_duty_cycles - PWM duty cycle info
+ * duty_pcts - pointer to an array of duty percentage for a pwm period
+ * num_duty_pcts - total entries in duty_pcts array
+ * duty_ms - duty cycle time in ms
+ * start_idx - index in the LUT
+ */
+struct pm8xxx_pwm_duty_cycles {
+ int *duty_pcts;
+ int num_duty_pcts;
+ int duty_ms;
+ int start_idx;
+};
+
+/**
* pm8xxx_pwm_config_period - change PWM period
*
* @pwm: the PWM device
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index fd62a22..de90088 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -221,6 +221,7 @@
struct work_struct clk_gate_work; /* delayed clock gate */
unsigned int clk_old; /* old clock value cache */
spinlock_t clk_lock; /* lock for clk fields */
+ struct mutex clk_gate_mutex; /* mutex for clock gating */
#endif
/* host specific block data */
diff --git a/include/linux/msm_mdp.h b/include/linux/msm_mdp.h
index a739761..ac18939 100644
--- a/include/linux/msm_mdp.h
+++ b/include/linux/msm_mdp.h
@@ -52,7 +52,8 @@
#define MSMFB_MIXER_INFO _IOWR(MSMFB_IOCTL_MAGIC, 148, \
struct msmfb_mixer_info_req)
-
+#define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, \
+ struct msmfb_overlay_data)
#define FB_TYPE_3D_PANEL 0x10101010
#define MDP_IMGTYPE2_START 0x10000
diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h
index e6955f5..cd2e61c 100644
--- a/include/linux/of_irq.h
+++ b/include/linux/of_irq.h
@@ -63,6 +63,9 @@
extern unsigned int irq_create_of_mapping(struct device_node *controller,
const u32 *intspec,
unsigned int intsize);
+#ifdef CONFIG_IRQ_DOMAIN
+extern void irq_dispose_mapping(unsigned int irq);
+#endif
extern int of_irq_to_resource(struct device_node *dev, int index,
struct resource *r);
extern int of_irq_count(struct device_node *dev);
@@ -70,6 +73,7 @@
struct resource *res, int nr_irqs);
extern struct device_node *of_irq_find_parent(struct device_node *child);
+
#endif /* CONFIG_OF_IRQ */
#endif /* CONFIG_OF */
#endif /* __OF_IRQ_H */
diff --git a/include/linux/rq_stats.h b/include/linux/rq_stats.h
new file mode 100644
index 0000000..e04063f
--- /dev/null
+++ b/include/linux/rq_stats.h
@@ -0,0 +1,31 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+struct rq_data {
+ unsigned int rq_avg;
+ unsigned long rq_poll_jiffies;
+ unsigned long def_timer_jiffies;
+ unsigned long rq_poll_last_jiffy;
+ unsigned long rq_poll_total_jiffies;
+ unsigned long def_timer_last_jiffy;
+ unsigned int def_interval;
+ int64_t def_start_time;
+ struct attribute_group *attr_group;
+ struct kobject *kobj;
+ struct work_struct def_timer_work;
+ int init;
+};
+
+extern spinlock_t rq_lock;
+extern struct rq_data rq_info;
+extern struct workqueue_struct *rq_wq;
diff --git a/include/linux/tcp.h b/include/linux/tcp.h
index e64f4c6..3cd86ea 100644
--- a/include/linux/tcp.h
+++ b/include/linux/tcp.h
@@ -68,18 +68,18 @@
#define tcp_flag_word(tp) ( ((union tcp_word_hdr *)(tp))->words [3])
-enum {
- TCP_FLAG_CWR = __cpu_to_be32(0x00800000),
- TCP_FLAG_ECE = __cpu_to_be32(0x00400000),
- TCP_FLAG_URG = __cpu_to_be32(0x00200000),
- TCP_FLAG_ACK = __cpu_to_be32(0x00100000),
- TCP_FLAG_PSH = __cpu_to_be32(0x00080000),
- TCP_FLAG_RST = __cpu_to_be32(0x00040000),
- TCP_FLAG_SYN = __cpu_to_be32(0x00020000),
- TCP_FLAG_FIN = __cpu_to_be32(0x00010000),
- TCP_RESERVED_BITS = __cpu_to_be32(0x0F000000),
- TCP_DATA_OFFSET = __cpu_to_be32(0xF0000000)
-};
+enum {
+ TCP_FLAG_CWR = __constant_htonl(0x00800000),
+ TCP_FLAG_ECE = __constant_htonl(0x00400000),
+ TCP_FLAG_URG = __constant_htonl(0x00200000),
+ TCP_FLAG_ACK = __constant_htonl(0x00100000),
+ TCP_FLAG_PSH = __constant_htonl(0x00080000),
+ TCP_FLAG_RST = __constant_htonl(0x00040000),
+ TCP_FLAG_SYN = __constant_htonl(0x00020000),
+ TCP_FLAG_FIN = __constant_htonl(0x00010000),
+ TCP_RESERVED_BITS = __constant_htonl(0x0F000000),
+ TCP_DATA_OFFSET = __constant_htonl(0xF0000000)
+};
/*
* TCP general constants
@@ -134,6 +134,7 @@
__u8 tcpi_backoff;
__u8 tcpi_options;
__u8 tcpi_snd_wscale : 4, tcpi_rcv_wscale : 4;
+ __u8 tcpi_count;
__u32 tcpi_rto;
__u32 tcpi_ato;
diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h
index 0097136..b43a097 100644
--- a/include/linux/usb/hcd.h
+++ b/include/linux/usb/hcd.h
@@ -379,9 +379,18 @@
extern struct usb_hcd *usb_get_hcd(struct usb_hcd *hcd);
extern void usb_put_hcd(struct usb_hcd *hcd);
extern int usb_hcd_is_primary_hcd(struct usb_hcd *hcd);
+#ifdef CONFIG_USB
extern int usb_add_hcd(struct usb_hcd *hcd,
unsigned int irqnum, unsigned long irqflags);
extern void usb_remove_hcd(struct usb_hcd *hcd);
+#else
+static inline int
+usb_add_hcd(struct usb_hcd *hcd, unsigned int irqnum, unsigned long irqflags)
+{
+ return 0;
+}
+static inline void usb_remove_hcd(struct usb_hcd *hcd) {}
+#endif
struct platform_device;
extern void usb_hcd_platform_shutdown(struct platform_device *dev);
diff --git a/include/media/msm_camera.h b/include/media/msm_camera.h
index befd768..327aee4 100644
--- a/include/media/msm_camera.h
+++ b/include/media/msm_camera.h
@@ -221,22 +221,52 @@
void *data;
};
+struct msm_pp_frame_sp {
+ /* phy addr of the buffer */
+ unsigned long phy_addr;
+ uint32_t y_off;
+ uint32_t cbcr_off;
+ /* buffer length */
+ uint32_t length;
+ int32_t fd;
+ uint32_t addr_offset;
+ /* mapped addr */
+ unsigned long vaddr;
+};
+
+struct msm_pp_frame_mp {
+ /* phy addr of the plane */
+ unsigned long phy_addr;
+ /* offset of plane data */
+ uint32_t data_offset;
+ /* plane length */
+ uint32_t length;
+ int32_t fd;
+ uint32_t addr_offset;
+ /* mapped addr */
+ unsigned long vaddr;
+};
+
+struct msm_pp_frame {
+ uint32_t handle; /* stores vb cookie */
+ uint32_t frame_id;
+ int path;
+ unsigned short image_type;
+ unsigned short num_planes; /* 1 for sp */
+ struct timeval timestamp;
+ union {
+ struct msm_pp_frame_sp sp;
+ struct msm_pp_frame_mp mp[MAX_PLANES];
+ };
+};
+
struct msm_cam_evt_divert_frame {
unsigned short image_mode;
unsigned short op_mode;
unsigned short inst_idx;
unsigned short node_idx;
- unsigned long phy_addr;
- uint32_t phy_offset;
- uint32_t y_off;
- uint32_t cbcr_off;
- int32_t fd;
- uint32_t frame_id;
- int path;
- uint32_t length;
- struct timeval timestamp;
+ struct msm_pp_frame frame;
int do_pp;
- uint32_t vb;
};
struct msm_mctl_pp_cmd_ack_event {
@@ -471,25 +501,6 @@
#define MSM_PLANE_Y 0
#define MSM_PLANE_UV 1
-struct msm_buffer_plane {
- int type;
- uint32_t offset;
- uint32_t length;
- uint32_t error;
- unsigned long buffer;
- unsigned long addr;
- uint32_t addr_offset;
- int fd;
-};
-struct msm_buffer {
- struct timeval timestamp;
- int memory_type;
- uint32_t frame_id;
- int path;
- int num;
- struct msm_buffer_plane planes[MSM_PLANE_MAX];
-};
-
struct msm_frame {
struct timespec ts;
int path;
@@ -715,6 +726,89 @@
#define CAMERA_EFFECT_NEON 11
#define CAMERA_EFFECT_MAX 12
+/* QRD */
+#define CAMERA_EFFECT_BW 10
+#define CAMERA_EFFECT_BLUISH 12
+#define CAMERA_EFFECT_REDDISH 13
+#define CAMERA_EFFECT_GREENISH 14
+
+/* QRD */
+#define CAMERA_ANTIBANDING_OFF 0
+#define CAMERA_ANTIBANDING_50HZ 2
+#define CAMERA_ANTIBANDING_60HZ 1
+#define CAMERA_ANTIBANDING_AUTO 3
+
+#define CAMERA_CONTRAST_LV0 0
+#define CAMERA_CONTRAST_LV1 1
+#define CAMERA_CONTRAST_LV2 2
+#define CAMERA_CONTRAST_LV3 3
+#define CAMERA_CONTRAST_LV4 4
+#define CAMERA_CONTRAST_LV5 5
+#define CAMERA_CONTRAST_LV6 6
+#define CAMERA_CONTRAST_LV7 7
+#define CAMERA_CONTRAST_LV8 8
+#define CAMERA_CONTRAST_LV9 9
+
+#define CAMERA_BRIGHTNESS_LV0 0
+#define CAMERA_BRIGHTNESS_LV1 1
+#define CAMERA_BRIGHTNESS_LV2 2
+#define CAMERA_BRIGHTNESS_LV3 3
+#define CAMERA_BRIGHTNESS_LV4 4
+#define CAMERA_BRIGHTNESS_LV5 5
+#define CAMERA_BRIGHTNESS_LV6 6
+#define CAMERA_BRIGHTNESS_LV7 7
+#define CAMERA_BRIGHTNESS_LV8 8
+
+
+#define CAMERA_SATURATION_LV0 0
+#define CAMERA_SATURATION_LV1 1
+#define CAMERA_SATURATION_LV2 2
+#define CAMERA_SATURATION_LV3 3
+#define CAMERA_SATURATION_LV4 4
+#define CAMERA_SATURATION_LV5 5
+#define CAMERA_SATURATION_LV6 6
+#define CAMERA_SATURATION_LV7 7
+#define CAMERA_SATURATION_LV8 8
+
+#define CAMERA_SHARPNESS_LV0 0
+#define CAMERA_SHARPNESS_LV1 3
+#define CAMERA_SHARPNESS_LV2 6
+#define CAMERA_SHARPNESS_LV3 9
+#define CAMERA_SHARPNESS_LV4 12
+#define CAMERA_SHARPNESS_LV5 15
+#define CAMERA_SHARPNESS_LV6 18
+#define CAMERA_SHARPNESS_LV7 21
+#define CAMERA_SHARPNESS_LV8 24
+#define CAMERA_SHARPNESS_LV9 27
+#define CAMERA_SHARPNESS_LV10 30
+
+#define CAMERA_SETAE_AVERAGE 0
+#define CAMERA_SETAE_CENWEIGHT 1
+
+#define CFG_SET_SATURATION 30
+#define CFG_SET_SHARPNESS 31
+#define CFG_SET_TOUCHAEC 32
+#define CFG_SET_AUTO_FOCUS 33
+#define CFG_SET_AUTOFLASH 34
+/* QRD */
+#define CFG_SET_EXPOSURE_COMPENSATION 35
+
+#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
+#define CAMERA_WB_CUSTOM 2
+#define CAMERA_WB_INCANDESCENT 3
+#define CAMERA_WB_FLUORESCENT 4
+#define CAMERA_WB_DAYLIGHT 5
+#define CAMERA_WB_CLOUDY_DAYLIGHT 6
+#define CAMERA_WB_TWILIGHT 7
+#define CAMERA_WB_SHADE 8
+
+#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
+#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
+#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
+#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
+#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
+
+
struct sensor_pict_fps {
uint16_t prevfps;
uint16_t pictfps;
@@ -825,6 +919,16 @@
uint16_t index;
};
+struct mirror_flip {
+ int32_t x_mirror;
+ int32_t y_flip;
+};
+
+struct cord {
+ uint32_t x;
+ uint32_t y;
+};
+
struct sensor_cfg_data {
int cfgtype;
int mode;
@@ -850,6 +954,18 @@
struct sensor_calib_data calib_info;
struct sensor_output_info_t output_info;
struct sensor_eeprom_data_t eeprom_data;
+ /* QRD */
+ uint16_t antibanding;
+ uint8_t contrast;
+ uint8_t saturation;
+ uint8_t sharpness;
+ int8_t brightness;
+ int ae_mode;
+ uint8_t wb_val;
+ int8_t exp_compensation;
+ struct cord aec_cord;
+ int is_autoflash;
+ struct mirror_flip mirror_flip;
} cfg;
};
diff --git a/include/media/msm_isp.h b/include/media/msm_isp.h
index f6668ef..d4fe4ca 100644
--- a/include/media/msm_isp.h
+++ b/include/media/msm_isp.h
@@ -165,6 +165,12 @@
#define VFE_CMD_CLF_CHROMA_UPDATE 119
#define VFE_CMD_PCA_ROLL_OFF_CFG 120
#define VFE_CMD_PCA_ROLL_OFF_UPDATE 121
+#define VFE_CMD_GET_REG_DUMP 122
+#define VFE_CMD_GET_LINEARIZATON_TABLE 123
+#define VFE_CMD_GET_MESH_ROLLOFF_TABLE 124
+#define VFE_CMD_GET_PCA_ROLLOFF_TABLE 125
+#define VFE_CMD_GET_RGB_G_TABLE 126
+#define VFE_CMD_GET_LA_TABLE 127
struct msm_isp_cmd {
int32_t id;
@@ -273,33 +279,5 @@
/* TBD: 3D related */
};
-struct msm_pp_frame_sp {
- unsigned long phy_addr;
- uint32_t y_off;
- uint32_t cbcr_off;
- uint32_t length;
- int32_t fd;
- uint32_t addr_offset;
-};
-
-struct msm_pp_frame_mp {
- unsigned long phy_addr;
- uint32_t data_offset;
- uint32_t length;
- int32_t fd;
- uint32_t addr_offset;
-};
-
-struct msm_pp_frame {
- uint32_t handle;
- uint32_t frame_id;
- unsigned short image_type;
- unsigned short num_planes; /* 1 for sp */
- struct timeval timestamp;
- union {
- struct msm_pp_frame_sp sp;
- };
-};
-
#endif /*__MSM_ISP_H__*/
diff --git a/include/media/radio-iris.h b/include/media/radio-iris.h
index 37ec48a..e96d513 100644
--- a/include/media/radio-iris.h
+++ b/include/media/radio-iris.h
@@ -41,6 +41,9 @@
#define RADIO_HCI_EVENT_PKT 0x14
/*HCI reponce packets*/
#define MAX_RIVA_PEEK_RSP_SIZE 251
+/* default data access */
+#define DEFAULT_DATA_OFFSET 2
+#define DEFAULT_DATA_SIZE 249
/* HCI timeouts */
#define RADIO_HCI_TIMEOUT (10000) /* 10 seconds */
@@ -142,6 +145,7 @@
#define HCI_OCF_FM_RESET 0x0004
#define HCI_OCF_FM_GET_FEATURE_LIST 0x0005
#define HCI_OCF_FM_DO_CALIBRATION 0x0006
+#define HCI_OCF_FM_SET_CALIBRATION 0x0007
/*HCI Status parameters commands*/
#define HCI_OCF_FM_READ_GRP_COUNTERS 0x0001
@@ -292,11 +296,14 @@
struct hci_fm_def_data_rd_req {
__u8 mode;
__u8 length;
+ __u8 param_len;
+ __u8 param;
} __packed;
struct hci_fm_def_data_wr_req {
- struct hci_fm_def_data_rd_req data_rd;
- __u8 data[256];
+ __u8 mode;
+ __u8 length;
+ __u8 data[DEFAULT_DATA_SIZE];
} __packed;
struct hci_fm_riva_data {
@@ -447,7 +454,7 @@
struct hci_fm_data_rd_rsp {
__u8 status;
__u8 ret_data_len;
- __u8 data[256];
+ __u8 data[DEFAULT_DATA_SIZE];
} __packed;
struct hci_fm_feature_list_rsp {
@@ -540,6 +547,12 @@
V4L2_CID_PRIVATE_IRIS_TX_TONE,
V4L2_CID_PRIVATE_IRIS_RDS_GRP_COUNTERS,
V4L2_CID_PRIVATE_IRIS_SET_NOTCH_FILTER,/*0x8000028*/
+ /*0x8000029 is used for tavarua specific ioctl*/
+ V4L2_CID_PRIVATE_IRIS_DO_CALIBRATION = 0x800002a,
+ V4L2_CID_PRIVATE_IRIS_READ_DEFAULT = 0x00980928,/*using private CIDs
+ under userclass*/
+ V4L2_CID_PRIVATE_IRIS_WRITE_DEFAULT,
+ V4L2_CID_PRIVATE_IRIS_SET_CALIBRATION,
};
@@ -606,6 +619,8 @@
IRIS_BUF_PEEK,
IRIS_BUF_SSBI_PEEK,
IRIS_BUF_RDS_CNTRS,
+ IRIS_BUF_RD_DEFAULT,
+ IRIS_BUF_CAL_DATA,
IRIS_BUF_MAX
};
@@ -702,6 +717,27 @@
#define RIVA_PEEK_PARAM 0x6
#define RIVA_PEEK_LEN_OFSET 0x6
#define SSBI_PEEK_LEN 0x01
+/*Calibration data*/
+#define PROCS_CALIB_MODE 1
+#define PROCS_CALIB_SIZE 23
+#define DC_CALIB_MODE 2
+#define DC_CALIB_SIZE 48
+#define RSB_CALIB_MODE 3
+#define RSB_CALIB_SIZE 4
+#define CALIB_DATA_OFSET 2
+#define CALIB_MODE_OFSET 1
+
+#define MAX_CALIB_SIZE 75
+struct hci_fm_set_cal_req {
+ __u8 mode;
+ /*Max calibration data size*/
+ __u8 data[MAX_CALIB_SIZE];
+} __packed;
+struct hci_cc_do_calibration_rsp {
+ __u8 status;
+ __u8 mode;
+ __u8 data[MAX_CALIB_SIZE];
+} __packed;
int hci_def_data_read(struct hci_fm_def_data_rd_req *arg,
struct radio_hci_dev *hdev);
int hci_def_data_write(struct hci_fm_def_data_wr_req *arg,
diff --git a/include/media/tavarua.h b/include/media/tavarua.h
index ad9eafb..aafa5d0 100644
--- a/include/media/tavarua.h
+++ b/include/media/tavarua.h
@@ -145,7 +145,9 @@
* Here We have IOCTl's that are specifici to IRIS
* (V4L2_CID_PRIVATE_BASE+0x1D--V4L2_CID_PRIVATE_BASE+0x27)
*/
- V4L2_CID_PRIVATE_TAVARUA_SET_NOTCH_FILTER = V4L2_CID_PRIVATE_BASE + 0x28
+ V4L2_CID_PRIVATE_TAVARUA_SET_NOTCH_FILTER =
+ V4L2_CID_PRIVATE_BASE + 0x28,
+ V4L2_CID_PRIVATE_TAVARUA_SET_AUDIO_PATH
};
enum tavarua_buf_t {
@@ -305,6 +307,10 @@
RDS_AF_JUMP,
};
+enum audio_path {
+ FM_DIGITAL_PATH,
+ FM_ANALOG_PATH
+};
#define SRCH_MODE 0x07
#define SRCH_DIR 0x08 /* 0-up 1-down */
#define SCAN_DWELL 0x70
diff --git a/include/net/bluetooth/amp.h b/include/net/bluetooth/amp.h
index 4b08079..53fea37 100644
--- a/include/net/bluetooth/amp.h
+++ b/include/net/bluetooth/amp.h
@@ -16,7 +16,7 @@
/* AMP defaults */
-#define A2MP_RSP_TIMEOUT (20000) /* 20 seconds */
+#define A2MP_RSP_TIMEOUT (8000) /* 8 seconds */
/* A2MP Protocol */
diff --git a/include/net/bluetooth/bluetooth.h b/include/net/bluetooth/bluetooth.h
index 643a497..155c6fd 100644
--- a/include/net/bluetooth/bluetooth.h
+++ b/include/net/bluetooth/bluetooth.h
@@ -66,12 +66,12 @@
#define BT_DEFER_SETUP 7
-#define BT_POWER 8
+#define BT_POWER 9
struct bt_power {
__u8 force_active;
};
-#define BT_AMP_POLICY 9
+#define BT_AMP_POLICY 10
/* Require BR/EDR (default policy)
* AMP controllers cannot be used
@@ -80,6 +80,13 @@
*/
#define BT_AMP_POLICY_REQUIRE_BR_EDR 0
+/* Prefer BR/EDR
+ * Allow use of AMP controllers
+ * If the L2CAP channel is currently on AMP, move it to BR/EDR
+ * Channel move requests from the remote device are allowed
+ */
+#define BT_AMP_POLICY_PREFER_BR_EDR 1
+
/* Prefer AMP
* Allow use of AMP controllers
* If the L2CAP channel is currently on BR/EDR and AMP controller
@@ -89,14 +96,7 @@
* and configure the channel directly on an AMP controller rather
* than BR/EDR
*/
-#define BT_AMP_POLICY_PREFER_AMP 1
-
-/* Prefer BR/EDR
- * Allow use of AMP controllers
- * If the L2CAP channel is currently on AMP, move it to BR/EDR
- * Channel move requests from the remote device are allowed
- */
-#define BT_AMP_POLICY_PREFER_BR_EDR 2
+#define BT_AMP_POLICY_PREFER_AMP 2
#define BT_INFO(fmt, arg...) printk(KERN_INFO "Bluetooth: " fmt "\n" , ## arg)
#define BT_ERR(fmt, arg...) printk(KERN_ERR "%s: " fmt "\n" , __func__ , ## arg)
diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h
index d0da174..74e14fb 100644
--- a/include/net/bluetooth/hci_core.h
+++ b/include/net/bluetooth/hci_core.h
@@ -91,7 +91,8 @@
struct link_key_data {
bdaddr_t bdaddr;
- u8 type;
+ u8 addr_type;
+ u8 key_type;
u8 val[16];
u8 pin_len;
u8 auth;
@@ -102,7 +103,8 @@
struct link_key {
struct list_head list;
bdaddr_t bdaddr;
- u8 type;
+ u8 addr_type;
+ u8 key_type;
u8 val[16];
u8 pin_len;
u8 auth;
@@ -689,7 +691,7 @@
struct link_key *hci_find_ltk(struct hci_dev *hdev, __le16 ediv, u8 rand[8]);
struct link_key *hci_find_link_key_type(struct hci_dev *hdev,
bdaddr_t *bdaddr, u8 type);
-int hci_add_ltk(struct hci_dev *hdev, int new_key, bdaddr_t *bdaddr,
+int hci_add_ltk(struct hci_dev *hdev, int new_key, bdaddr_t *bdaddr, u8 type,
u8 auth, u8 key_size, __le16 ediv, u8 rand[8], u8 ltk[16]);
int hci_remove_link_key(struct hci_dev *hdev, bdaddr_t *bdaddr);
diff --git a/include/net/bluetooth/mgmt.h b/include/net/bluetooth/mgmt.h
index 208c157..127c7ca 100644
--- a/include/net/bluetooth/mgmt.h
+++ b/include/net/bluetooth/mgmt.h
@@ -100,7 +100,8 @@
struct mgmt_key_info {
bdaddr_t bdaddr;
- u8 type;
+ u8 addr_type;
+ u8 key_type;
u8 val[16];
u8 pin_len;
u8 auth;
diff --git a/include/sound/apr_audio.h b/include/sound/apr_audio.h
index 0c109ae..d2a7dba 100644
--- a/include/sound/apr_audio.h
+++ b/include/sound/apr_audio.h
@@ -847,7 +847,7 @@
#define ADPCM 0x00010BE7
#define YADPCM 0x00010BE8
#define MP3 0x00010BE9
-#define MPEG4_AAC 0x00010D86
+#define MPEG4_AAC 0x00010BEA
#define AMRNB_FS 0x00010BEB
#define V13K_FS 0x00010BED
#define EVRC_FS 0x00010BEE
@@ -862,6 +862,7 @@
#define G711_ALAW_FS 0x00010BF7
#define G711_MLAW_FS 0x00010BF8
#define G711_PCM_FS 0x00010BF9
+#define MPEG4_MULTI_AAC 0x00010D86
#define ASM_ENCDEC_SBCRATE 0x00010C13
#define ASM_ENCDEC_IMMDIATE_DECODE 0x00010C14
diff --git a/include/sound/q6asm.h b/include/sound/q6asm.h
index bad9be7..fc7e521 100644
--- a/include/sound/q6asm.h
+++ b/include/sound/q6asm.h
@@ -38,6 +38,7 @@
#define FORMAT_WMA_V10PRO 0x000e
#define FORMAT_WMA_V9 0x000f
#define FORMAT_AMR_WB_PLUS 0x0010
+#define FORMAT_MPEG4_MULTI_AAC 0x0011
#define ENCDEC_SBCBITRATE 0x0001
#define ENCDEC_IMMEDIATE_DECODE 0x0002
@@ -241,6 +242,9 @@
int q6asm_media_format_block_aac(struct audio_client *ac,
struct asm_aac_cfg *cfg);
+int q6asm_media_format_block_multi_aac(struct audio_client *ac,
+ struct asm_aac_cfg *cfg);
+
int q6asm_media_format_block_wma(struct audio_client *ac,
void *cfg);
diff --git a/kernel/irq/Kconfig b/kernel/irq/Kconfig
index d1d051b3..5a38bf4 100644
--- a/kernel/irq/Kconfig
+++ b/kernel/irq/Kconfig
@@ -52,6 +52,10 @@
config GENERIC_IRQ_CHIP
bool
+# Generic irq_domain hw <--> linux irq number translation
+config IRQ_DOMAIN
+ bool
+
# Support forced irq threading
config IRQ_FORCED_THREADING
bool
diff --git a/kernel/irq/Makefile b/kernel/irq/Makefile
index 7329005..fff1738 100644
--- a/kernel/irq/Makefile
+++ b/kernel/irq/Makefile
@@ -2,6 +2,7 @@
obj-y := irqdesc.o handle.o manage.o spurious.o resend.o chip.o dummychip.o devres.o
obj-$(CONFIG_GENERIC_IRQ_CHIP) += generic-chip.o
obj-$(CONFIG_GENERIC_IRQ_PROBE) += autoprobe.o
+obj-$(CONFIG_IRQ_DOMAIN) += irqdomain.o
obj-$(CONFIG_PROC_FS) += proc.o
obj-$(CONFIG_GENERIC_PENDING_IRQ) += migration.o
obj-$(CONFIG_PM_SLEEP) += pm.o
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index dc154f2..45e149c 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -396,7 +396,8 @@
* then mask it and get out of here:
*/
if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
- desc->istate |= IRQS_PENDING;
+ if (!irq_settings_is_level(desc))
+ desc->istate |= IRQS_PENDING;
mask_irq(desc);
goto out;
}
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
new file mode 100644
index 0000000..d5828da
--- /dev/null
+++ b/kernel/irq/irqdomain.c
@@ -0,0 +1,180 @@
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+
+static LIST_HEAD(irq_domain_list);
+static DEFINE_MUTEX(irq_domain_mutex);
+
+/**
+ * irq_domain_add() - Register an irq_domain
+ * @domain: ptr to initialized irq_domain structure
+ *
+ * Registers an irq_domain structure. The irq_domain must at a minimum be
+ * initialized with an ops structure pointer, and either a ->to_irq hook or
+ * a valid irq_base value. Everything else is optional.
+ */
+void irq_domain_add(struct irq_domain *domain)
+{
+ struct irq_data *d;
+ int hwirq;
+
+ /*
+ * This assumes that the irq_domain owner has already allocated
+ * the irq_descs. This block will be removed when support for dynamic
+ * allocation of irq_descs is added to irq_domain.
+ */
+ for (hwirq = 0; hwirq < domain->nr_irq; hwirq++) {
+ d = irq_get_irq_data(irq_domain_to_irq(domain, hwirq));
+ if (d || d->domain) {
+ /* things are broken; just report, don't clean up */
+ WARN(1, "error: irq_desc already assigned to a domain");
+ return;
+ }
+ d->domain = domain;
+ d->hwirq = hwirq;
+ }
+
+ mutex_lock(&irq_domain_mutex);
+ list_add(&domain->list, &irq_domain_list);
+ mutex_unlock(&irq_domain_mutex);
+}
+
+/**
+ * irq_domain_del() - Unregister an irq_domain
+ * @domain: ptr to registered irq_domain.
+ */
+void irq_domain_del(struct irq_domain *domain)
+{
+ struct irq_data *d;
+ int hwirq;
+
+ mutex_lock(&irq_domain_mutex);
+ list_del(&domain->list);
+ mutex_unlock(&irq_domain_mutex);
+
+ /* Clear the irq_domain assignments */
+ for (hwirq = 0; hwirq < domain->nr_irq; hwirq++) {
+ d = irq_get_irq_data(irq_domain_to_irq(domain, hwirq));
+ d->domain = NULL;
+ }
+}
+
+#if defined(CONFIG_OF_IRQ)
+/**
+ * irq_create_of_mapping() - Map a linux irq number from a DT interrupt spec
+ *
+ * Used by the device tree interrupt mapping code to translate a device tree
+ * interrupt specifier to a valid linux irq number. Returns either a valid
+ * linux IRQ number or 0.
+ *
+ * When the caller no longer need the irq number returned by this function it
+ * should arrange to call irq_dispose_mapping().
+ */
+unsigned int irq_create_of_mapping(struct device_node *controller,
+ const u32 *intspec, unsigned int intsize)
+{
+ struct irq_domain *domain;
+ unsigned long hwirq;
+ unsigned int irq, type;
+ int rc = -EINVAL;
+
+ /* Find a domain which can translate the irq spec */
+ mutex_lock(&irq_domain_mutex);
+ list_for_each_entry(domain, &irq_domain_list, list) {
+ if (!domain->ops->dt_translate)
+ continue;
+ rc = domain->ops->dt_translate(domain, controller,
+ intspec, intsize, &hwirq, &type);
+ if (rc == 0)
+ break;
+ }
+ mutex_unlock(&irq_domain_mutex);
+
+ if (rc != 0)
+ return 0;
+
+ irq = irq_domain_to_irq(domain, hwirq);
+ if (type != IRQ_TYPE_NONE)
+ irq_set_irq_type(irq, type);
+ pr_debug("%s: mapped hwirq=%i to irq=%i, flags=%x\n",
+ controller->full_name, (int)hwirq, irq, type);
+ return irq;
+}
+EXPORT_SYMBOL_GPL(irq_create_of_mapping);
+
+/**
+ * irq_dispose_mapping() - Discard a mapping created by irq_create_of_mapping()
+ * @irq: linux irq number to be discarded
+ *
+ * Calling this function indicates the caller no longer needs a reference to
+ * the linux irq number returned by a prior call to irq_create_of_mapping().
+ */
+void irq_dispose_mapping(unsigned int irq)
+{
+ /*
+ * nothing yet; will be filled when support for dynamic allocation of
+ * irq_descs is added to irq_domain
+ */
+}
+EXPORT_SYMBOL_GPL(irq_dispose_mapping);
+
+int irq_domain_simple_dt_translate(struct irq_domain *d,
+ struct device_node *controller,
+ const u32 *intspec, unsigned int intsize,
+ unsigned long *out_hwirq, unsigned int *out_type)
+{
+ if (d->of_node != controller)
+ return -EINVAL;
+ if (intsize < 1)
+ return -EINVAL;
+
+ *out_hwirq = intspec[0];
+ *out_type = IRQ_TYPE_NONE;
+ if (intsize > 1)
+ *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
+ return 0;
+}
+
+struct irq_domain_ops irq_domain_simple_ops = {
+ .dt_translate = irq_domain_simple_dt_translate,
+};
+EXPORT_SYMBOL_GPL(irq_domain_simple_ops);
+
+/**
+ * irq_domain_create_simple() - Set up a 'simple' translation range
+ */
+void irq_domain_add_simple(struct device_node *controller, int irq_base)
+{
+ struct irq_domain *domain;
+
+ domain = kzalloc(sizeof(*domain), GFP_KERNEL);
+ if (!domain) {
+ WARN_ON(1);
+ return;
+ }
+
+ domain->irq_base = irq_base;
+ domain->of_node = of_node_get(controller);
+ domain->ops = &irq_domain_simple_ops;
+ irq_domain_add(domain);
+}
+EXPORT_SYMBOL_GPL(irq_domain_add_simple);
+
+void irq_domain_generate_simple(const struct of_device_id *match,
+ u64 phys_base, unsigned int irq_start)
+{
+ struct device_node *node;
+ pr_info("looking for phys_base=%llx, irq_start=%i\n",
+ (unsigned long long) phys_base, (int) irq_start);
+ node = of_find_matching_node_by_address(NULL, match, phys_base);
+ if (node)
+ irq_domain_add_simple(node, irq_start);
+ else
+ pr_info("no node found\n");
+}
+EXPORT_SYMBOL_GPL(irq_domain_generate_simple);
+#endif /* CONFIG_OF_IRQ */
diff --git a/kernel/power/wakelock.c b/kernel/power/wakelock.c
index e9f49b5..b257424 100644
--- a/kernel/power/wakelock.c
+++ b/kernel/power/wakelock.c
@@ -19,6 +19,7 @@
#include <linux/suspend.h>
#include <linux/syscalls.h> /* sys_sync */
#include <linux/wakelock.h>
+#include <linux/syscore_ops.h>
#ifdef CONFIG_WAKELOCK_STAT
#include <linux/proc_fs.h>
#endif
@@ -391,15 +392,8 @@
return ret;
}
-static int power_resume_early(struct device *dev)
-{
- msm_suspend_check_done = 0;
- return 0;
-}
-
static struct dev_pm_ops power_driver_pm_ops = {
.suspend_noirq = power_suspend_late,
- .resume_noirq = power_resume_early,
};
static struct platform_driver power_driver = {
@@ -410,6 +404,14 @@
.name = "power",
};
+static void power_resume_early(void)
+{
+ msm_suspend_check_done = 0;
+}
+static struct syscore_ops wakelock_syscore_ops = {
+ .resume = power_resume_early,
+};
+
void wake_lock_init(struct wake_lock *lock, int type, const char *name)
{
unsigned long irqflags = 0;
@@ -661,6 +663,7 @@
proc_create("wakelocks", S_IRUGO, NULL, &wakelock_stats_fops);
#endif
+ register_syscore_ops(&wakelock_syscore_ops);
return 0;
err_suspend_work_queue:
diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c
index d5097c4..2480d18 100644
--- a/kernel/time/tick-sched.c
+++ b/kernel/time/tick-sched.c
@@ -20,11 +20,17 @@
#include <linux/profile.h>
#include <linux/sched.h>
#include <linux/module.h>
+#include <linux/rq_stats.h>
#include <asm/irq_regs.h>
#include "tick-internal.h"
+
+struct rq_data rq_info;
+struct workqueue_struct *rq_wq;
+spinlock_t rq_lock;
+
/*
* Per cpu nohz control structure
*/
@@ -711,6 +717,50 @@
* High resolution timer specific code
*/
#ifdef CONFIG_HIGH_RES_TIMERS
+static void update_rq_stats(void)
+{
+ unsigned long jiffy_gap = 0;
+ unsigned int rq_avg = 0;
+ unsigned long flags = 0;
+
+ jiffy_gap = jiffies - rq_info.rq_poll_last_jiffy;
+
+ if (jiffy_gap >= rq_info.rq_poll_jiffies) {
+
+ spin_lock_irqsave(&rq_lock, flags);
+
+ if (!rq_info.rq_avg)
+ rq_info.rq_poll_total_jiffies = 0;
+
+ rq_avg = nr_running() * 10;
+
+ if (rq_info.rq_poll_total_jiffies) {
+ rq_avg = (rq_avg * jiffy_gap) +
+ (rq_info.rq_avg *
+ rq_info.rq_poll_total_jiffies);
+ do_div(rq_avg,
+ rq_info.rq_poll_total_jiffies + jiffy_gap);
+ }
+
+ rq_info.rq_avg = rq_avg;
+ rq_info.rq_poll_total_jiffies += jiffy_gap;
+ rq_info.rq_poll_last_jiffy = jiffies;
+
+ spin_unlock_irqrestore(&rq_lock, flags);
+ }
+}
+
+static void wakeup_user(void)
+{
+ unsigned long jiffy_gap;
+
+ jiffy_gap = jiffies - rq_info.def_timer_last_jiffy;
+
+ if (jiffy_gap >= rq_info.def_timer_jiffies) {
+ rq_info.def_timer_last_jiffy = jiffies;
+ queue_work(rq_wq, &rq_info.def_timer_work);
+ }
+}
/*
* We rearm the timer until we get disabled by the idle code.
* Called with interrupts disabled and timer->base->cpu_base->lock held.
@@ -758,6 +808,20 @@
}
update_process_times(user_mode(regs));
profile_tick(CPU_PROFILING);
+
+
+ if ((rq_info.init == 1) && (cpu == 0)) {
+
+ /*
+ * update run queue statistics
+ */
+ update_rq_stats();
+
+ /*
+ * wakeup user if needed
+ */
+ wakeup_user();
+ }
}
hrtimer_forward(timer, now, tick_period);
diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
index 4a73744..8487c49 100644
--- a/mm/memory_hotplug.c
+++ b/mm/memory_hotplug.c
@@ -617,9 +617,9 @@
BUG_ON(!res);
ret = arch_physical_remove_memory(start, size);
- if (ret) {
+ if (!ret) {
kfree(res);
- return ret;
+ return 0;
}
res->name = "System RAM";
@@ -628,8 +628,11 @@
res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
res_old = locate_resource(&iomem_resource, res);
- if (res_old)
- release_memory_resource(res_old);
+ if (res_old) {
+ release_resource(res_old);
+ if (PageSlab(virt_to_head_page(res_old)))
+ kfree(res_old);
+ }
kfree(res);
return ret;
diff --git a/mm/slub.c b/mm/slub.c
index 35f351f..adf609e 100644
--- a/mm/slub.c
+++ b/mm/slub.c
@@ -557,10 +557,10 @@
memset(p + s->objsize, val, s->inuse - s->objsize);
}
-static u8 *check_bytes(u8 *start, unsigned int value, unsigned int bytes)
+static u8 *check_bytes8(u8 *start, u8 value, unsigned int bytes)
{
while (bytes) {
- if (*start != (u8)value)
+ if (*start != value)
return start;
start++;
bytes--;
@@ -568,6 +568,38 @@
return NULL;
}
+static u8 *check_bytes(u8 *start, u8 value, unsigned int bytes)
+{
+ u64 value64;
+ unsigned int words, prefix;
+
+ if (bytes <= 16)
+ return check_bytes8(start, value, bytes);
+
+ value64 = value | value << 8 | value << 16 | value << 24;
+ value64 = (value64 & 0xffffffff) | value64 << 32;
+ prefix = 8 - ((unsigned long)start) % 8;
+
+ if (prefix) {
+ u8 *r = check_bytes8(start, value, prefix);
+ if (r)
+ return r;
+ start += prefix;
+ bytes -= prefix;
+ }
+
+ words = bytes / 8;
+
+ while (words) {
+ if (*(u64 *)start != value64)
+ return check_bytes8(start, value, 8);
+ start += 8;
+ words--;
+ }
+
+ return check_bytes8(start, value, bytes % 8);
+}
+
static void restore_bytes(struct kmem_cache *s, char *message, u8 data,
void *from, void *to)
{
diff --git a/net/bluetooth/hci_conn.c b/net/bluetooth/hci_conn.c
index 733e9d2..5e67829 100644
--- a/net/bluetooth/hci_conn.c
+++ b/net/bluetooth/hci_conn.c
@@ -631,6 +631,7 @@
if (type == LE_LINK) {
struct adv_entry *entry;
+ struct link_key *key;
le = hci_conn_hash_lookup_ba(hdev, LE_LINK, dst);
if (le) {
@@ -638,11 +639,17 @@
return le;
}
- entry = hci_find_adv_entry(hdev, dst);
- if (!entry)
- le = hci_le_conn_add(hdev, dst, 0);
- else
- le = hci_le_conn_add(hdev, dst, entry->bdaddr_type);
+ key = hci_find_link_key_type(hdev, dst, KEY_TYPE_LTK);
+ if (!key) {
+ entry = hci_find_adv_entry(hdev, dst);
+ if (entry)
+ le = hci_le_conn_add(hdev, dst,
+ entry->bdaddr_type);
+ else
+ le = hci_le_conn_add(hdev, dst, 0);
+ } else {
+ le = hci_le_conn_add(hdev, dst, key->addr_type);
+ }
if (!le)
return ERR_PTR(-ENOMEM);
diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c
index 699284a..0fa1262 100644
--- a/net/bluetooth/hci_core.c
+++ b/net/bluetooth/hci_core.c
@@ -1065,7 +1065,7 @@
k = list_entry(p, struct link_key, list);
- if (k->type != KEY_TYPE_LTK)
+ if (k->key_type != KEY_TYPE_LTK)
continue;
if (k->dlen != sizeof(*id))
@@ -1091,7 +1091,7 @@
k = list_entry(p, struct link_key, list);
- if ((k->type == type) && (bacmp(bdaddr, &k->bdaddr) == 0))
+ if ((k->key_type == type) && (bacmp(bdaddr, &k->bdaddr) == 0))
return k;
}
@@ -1109,7 +1109,7 @@
old_key = hci_find_link_key(hdev, bdaddr);
if (old_key) {
- old_key_type = old_key->type;
+ old_key_type = old_key->key_type;
key = old_key;
} else {
old_key_type = 0xff;
@@ -1124,7 +1124,7 @@
bacpy(&key->bdaddr, bdaddr);
memcpy(key->val, val, 16);
key->auth = 0x01;
- key->type = type;
+ key->key_type = type;
key->pin_len = pin_len;
conn = hci_conn_hash_lookup_ba(hdev, ACL_LINK, bdaddr);
@@ -1142,8 +1142,8 @@
if (conn) {
if ((conn->remote_auth > 0x01) ||
(conn->auth_initiator && conn->auth_type > 0x01) ||
- (key->type < 0x03) ||
- (key->type == 0x06 && old_key_type != 0xff))
+ (key->key_type < 0x03) ||
+ (key->key_type == 0x06 && old_key_type != 0xff))
bonded = 1;
}
@@ -1151,19 +1151,20 @@
mgmt_new_key(hdev->id, key, bonded);
if (type == 0x06)
- key->type = old_key_type;
+ key->key_type = old_key_type;
return 0;
}
int hci_add_ltk(struct hci_dev *hdev, int new_key, bdaddr_t *bdaddr,
- u8 key_size, u8 auth, __le16 ediv, u8 rand[8],
- u8 ltk[16])
+ u8 addr_type, u8 key_size, u8 auth,
+ __le16 ediv, u8 rand[8], u8 ltk[16])
{
struct link_key *key, *old_key;
struct key_master_id *id;
- BT_DBG("%s Auth: %2.2X addr %s", hdev->name, auth, batostr(bdaddr));
+ BT_DBG("%s Auth: %2.2X addr %s type: %d", hdev->name, auth,
+ batostr(bdaddr), addr_type);
old_key = hci_find_link_key_type(hdev, bdaddr, KEY_TYPE_LTK);
if (old_key) {
@@ -1178,8 +1179,9 @@
key->dlen = sizeof(*id);
bacpy(&key->bdaddr, bdaddr);
+ key->addr_type = addr_type;
memcpy(key->val, ltk, sizeof(key->val));
- key->type = KEY_TYPE_LTK;
+ key->key_type = KEY_TYPE_LTK;
key->pin_len = key_size;
key->auth = auth;
diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c
index da8b780..a6e3485 100644
--- a/net/bluetooth/hci_event.c
+++ b/net/bluetooth/hci_event.c
@@ -224,13 +224,11 @@
if (!sent)
return;
+ if (!status)
+ memcpy(hdev->dev_name, sent, HCI_MAX_NAME_LENGTH);
+
if (test_bit(HCI_MGMT, &hdev->flags))
mgmt_set_local_name_complete(hdev->id, sent, status);
-
- if (status)
- return;
-
- memcpy(hdev->dev_name, sent, HCI_MAX_NAME_LENGTH);
}
static void hci_cc_read_local_name(struct hci_dev *hdev, struct sk_buff *skb)
@@ -2486,10 +2484,10 @@
goto not_found;
}
- BT_DBG("%s found key type %u for %s", hdev->name, key->type,
+ BT_DBG("%s found key type %u for %s", hdev->name, key->key_type,
batostr(&ev->bdaddr));
- if (!test_bit(HCI_DEBUG_KEYS, &hdev->flags) && key->type == 0x03) {
+ if (!test_bit(HCI_DEBUG_KEYS, &hdev->flags) && key->key_type == 0x03) {
BT_DBG("%s ignoring debug key", hdev->name);
goto not_found;
}
@@ -2507,7 +2505,7 @@
goto not_found;
}
- if (key->type == 0x04 && conn && conn->auth_type != 0xff &&
+ if (key->key_type == 0x04 && conn && conn->auth_type != 0xff &&
(conn->auth_type & 0x01)) {
BT_DBG("%s ignoring unauthenticated key", hdev->name);
goto not_found;
diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c
index c21eb88..abc3ef7 100644
--- a/net/bluetooth/l2cap_core.c
+++ b/net/bluetooth/l2cap_core.c
@@ -738,8 +738,10 @@
if (l2cap_check_security(sk) && __l2cap_no_conn_pending(sk)) {
l2cap_pi(sk)->conf_state |= L2CAP_CONF_CONNECT_PEND;
- if (l2cap_pi(sk)->amp_pref == BT_AMP_POLICY_PREFER_AMP)
- amp_create_physical(l2cap_pi(sk)->conn, sk);
+ if (l2cap_pi(sk)->amp_pref ==
+ BT_AMP_POLICY_PREFER_AMP &&
+ conn->fc_mask & L2CAP_FC_A2MP)
+ amp_create_physical(conn, sk);
else
l2cap_send_conn_req(sk);
}
@@ -843,8 +845,10 @@
l2cap_pi(sk)->conf_state |= L2CAP_CONF_CONNECT_PEND;
- if (l2cap_pi(sk)->amp_pref == BT_AMP_POLICY_PREFER_AMP)
- amp_create_physical(l2cap_pi(sk)->conn, sk);
+ if (l2cap_pi(sk)->amp_pref ==
+ BT_AMP_POLICY_PREFER_AMP &&
+ conn->fc_mask & L2CAP_FC_A2MP)
+ amp_create_physical(conn, sk);
else
l2cap_send_conn_req(sk);
@@ -1341,16 +1345,21 @@
lock_sock(sk);
l2cap_ertm_send(sk);
release_sock(sk);
+ sock_put(sk);
}
static void l2cap_skb_destructor(struct sk_buff *skb)
{
struct sock *sk = skb->sk;
int queued;
+ int keep_sk = 0;
queued = atomic_sub_return(1, &l2cap_pi(sk)->ertm_queued);
if (queued < L2CAP_MIN_ERTM_QUEUED)
- queue_work(_l2cap_wq, &l2cap_pi(sk)->tx_work);
+ keep_sk = queue_work(_l2cap_wq, &l2cap_pi(sk)->tx_work);
+
+ if (!keep_sk)
+ sock_put(sk);
}
void l2cap_do_send(struct sock *sk, struct sk_buff *skb)
@@ -1436,6 +1445,7 @@
*/
tx_skb = skb_clone(skb, GFP_ATOMIC);
+ sock_hold(sk);
tx_skb->sk = sk;
tx_skb->destructor = l2cap_skb_destructor;
atomic_inc(&pi->ertm_queued);
@@ -2600,6 +2610,7 @@
if (l2cap_pi(sk)->amp_move_state != L2CAP_AMP_STATE_RESEGMENT) {
release_sock(sk);
+ sock_put(sk);
return;
}
@@ -2618,6 +2629,7 @@
l2cap_ertm_send(sk);
release_sock(sk);
+ sock_put(sk);
}
static int l2cap_setup_resegment(struct sock *sk)
@@ -2634,10 +2646,12 @@
return -ENOMEM;
INIT_WORK(&seg_work->work, l2cap_resegment_worker);
+ sock_hold(sk);
seg_work->sk = sk;
if (!queue_work(_l2cap_wq, &seg_work->work)) {
kfree(seg_work);
+ sock_put(sk);
return -ENOMEM;
}
@@ -5811,6 +5825,7 @@
if (pi->fcs == L2CAP_FCS_CRC16)
apply_fcs(tx_skb);
+ sock_hold(sk);
tx_skb->sk = sk;
tx_skb->destructor = l2cap_skb_destructor;
atomic_inc(&pi->ertm_queued);
diff --git a/net/bluetooth/l2cap_sock.c b/net/bluetooth/l2cap_sock.c
index 7694764..9beea74 100644
--- a/net/bluetooth/l2cap_sock.c
+++ b/net/bluetooth/l2cap_sock.c
@@ -750,7 +750,7 @@
break;
}
- if ((opt > BT_AMP_POLICY_PREFER_BR_EDR) ||
+ if ((opt > BT_AMP_POLICY_PREFER_AMP) ||
((l2cap_pi(sk)->mode != L2CAP_MODE_ERTM) &&
(l2cap_pi(sk)->mode != L2CAP_MODE_STREAMING))) {
err = -EINVAL;
@@ -761,8 +761,7 @@
BT_DBG("BT_AMP_POLICY now %d", opt);
if ((sk->sk_state == BT_CONNECTED) &&
- (l2cap_pi(sk)->amp_move_role == L2CAP_AMP_MOVE_NONE) &&
- (l2cap_pi(sk)->conn->fc_mask & L2CAP_FC_A2MP))
+ (l2cap_pi(sk)->amp_move_role == L2CAP_AMP_MOVE_NONE))
l2cap_amp_move_init(sk);
break;
diff --git a/net/bluetooth/mgmt.c b/net/bluetooth/mgmt.c
index ea72708..77845f2 100644
--- a/net/bluetooth/mgmt.c
+++ b/net/bluetooth/mgmt.c
@@ -1099,19 +1099,20 @@
i += sizeof(*key);
- if (key->type == KEY_TYPE_LTK) {
+ if (key->key_type == KEY_TYPE_LTK) {
struct key_master_id *id = (void *) key->data;
if (key->dlen != sizeof(struct key_master_id))
continue;
- hci_add_ltk(hdev, 0, &key->bdaddr, key->pin_len,
- key->auth, id->ediv, id->rand, key->val);
+ hci_add_ltk(hdev, 0, &key->bdaddr, key->addr_type,
+ key->pin_len, key->auth, id->ediv,
+ id->rand, key->val);
continue;
}
- hci_add_link_key(hdev, 0, &key->bdaddr, key->val, key->type,
+ hci_add_link_key(hdev, 0, &key->bdaddr, key->val, key->key_type,
key->pin_len);
}
@@ -2393,7 +2394,8 @@
return -ENOMEM;
bacpy(&ev->key.bdaddr, &key->bdaddr);
- ev->key.type = key->type;
+ ev->key.addr_type = key->addr_type;
+ ev->key.key_type = key->key_type;
memcpy(ev->key.val, key->val, 16);
ev->key.pin_len = key->pin_len;
ev->key.auth = key->auth;
diff --git a/net/bluetooth/smp.c b/net/bluetooth/smp.c
index 94d0f06..e725148 100644
--- a/net/bluetooth/smp.c
+++ b/net/bluetooth/smp.c
@@ -637,13 +637,35 @@
memset(stk + hcon->smp_key_size, 0,
SMP_MAX_ENC_KEY_SIZE - hcon->smp_key_size);
- hci_add_ltk(conn->hcon->hdev, 0, conn->dst, hcon->smp_key_size,
- hcon->auth, ediv, rand, stk);
+ hci_add_ltk(conn->hcon->hdev, 0, conn->dst, hcon->dst_type,
+ hcon->smp_key_size, hcon->auth, ediv, rand, stk);
}
return 0;
}
+static int smp_encrypt_link(struct hci_conn *hcon, struct link_key *key)
+{
+ struct key_master_id *master;
+ u8 zerobuf[8];
+
+ if (!hcon || !key || !key->data)
+ return -EINVAL;
+
+ memset(zerobuf, 0, sizeof(zerobuf));
+
+ master = (void *) key->data;
+
+ if (!master->ediv && !memcmp(master->rand, zerobuf, sizeof(zerobuf)))
+ return -EINVAL;
+
+ hcon->enc_key_size = key->pin_len;
+ hcon->sec_req = TRUE;
+ hci_le_start_enc(hcon, master->ediv, master->rand, key->val);
+
+ return 0;
+}
+
static u8 smp_cmd_security_req(struct l2cap_conn *conn, struct sk_buff *skb)
{
struct hci_conn *hcon = conn->hcon;
@@ -659,18 +681,19 @@
key = hci_find_link_key_type(hcon->hdev, conn->dst, KEY_TYPE_LTK);
if (key && ((key->auth & SMP_AUTH_MITM) ||
!(rp->auth_req & SMP_AUTH_MITM))) {
- struct key_master_id *master = (void *) key->data;
- hci_le_start_enc(hcon, master->ediv, master->rand,
- key->val);
- hcon->enc_key_size = key->pin_len;
+ if (smp_encrypt_link(hcon, key) < 0)
+ goto invalid_key;
- hcon->sec_req = TRUE;
- hcon->sec_level = authreq_to_seclevel(rp->auth_req);
+ hcon->sec_level = authreq_to_seclevel(key->auth);
+
+ if (!(hcon->link_mode & HCI_LM_ENCRYPT))
+ hci_conn_hold(hcon);
return 0;
}
+invalid_key:
hcon->sec_req = FALSE;
skb_pull(skb, sizeof(*rp));
@@ -730,17 +753,9 @@
key = hci_find_link_key_type(hcon->hdev, conn->dst,
KEY_TYPE_LTK);
- if (key) {
- struct key_master_id *master = (void *) key->data;
- hci_le_start_enc(hcon, master->ediv, master->rand,
- key->val);
- hcon->enc_key_size = key->pin_len;
-
- hcon->sec_req = TRUE;
-
+ if (smp_encrypt_link(hcon, key) == 0)
goto done;
- }
}
hcon->sec_req = FALSE;
@@ -782,8 +797,8 @@
memset(rand, 0, sizeof(rand));
- err = hci_add_ltk(hcon->hdev, 0, conn->dst, 0, 0, 0,
- rand, rp->ltk);
+ err = hci_add_ltk(hcon->hdev, 0, conn->dst, hcon->dst_type,
+ 0, 0, 0, rand, rp->ltk);
if (err)
return SMP_UNSPECIFIED;
@@ -811,8 +826,9 @@
BT_DBG("keydist 0x%x", *keydist);
- hci_add_ltk(hcon->hdev, 1, conn->dst, hcon->smp_key_size,
- hcon->auth, rp->ediv, rp->rand, key->val);
+ hci_add_ltk(hcon->hdev, 1, conn->dst, hcon->dst_type,
+ hcon->smp_key_size, hcon->auth, rp->ediv,
+ rp->rand, key->val);
*keydist &= ~SMP_DIST_ENC_KEY;
if (hcon->out) {
@@ -949,8 +965,9 @@
smp_send_cmd(conn, SMP_CMD_ENCRYPT_INFO, sizeof(enc), &enc);
- hci_add_ltk(hcon->hdev, 1, conn->dst, hcon->smp_key_size,
- hcon->auth, ediv, ident.rand, enc.ltk);
+ hci_add_ltk(hcon->hdev, 1, conn->dst, hcon->dst_type,
+ hcon->smp_key_size, hcon->auth, ediv,
+ ident.rand, enc.ltk);
ident.ediv = cpu_to_le16(ediv);
diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index f2d9813..e5f1113 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -2504,6 +2504,15 @@
info->tcpi_rcv_space = tp->rcvq_space.space;
info->tcpi_total_retrans = tp->total_retrans;
+
+ /*
+ * Expose reference count for socket.
+ */
+ if (NULL != sk->sk_socket) {
+ struct file *filep = sk->sk_socket->file;
+ if (NULL != filep)
+ info->tcpi_count = atomic_read(&filep->f_count);
+ }
}
EXPORT_SYMBOL_GPL(tcp_get_info);
diff --git a/sound/soc/codecs/wcd9310.c b/sound/soc/codecs/wcd9310.c
index 0000869..620822c 100644
--- a/sound/soc/codecs/wcd9310.c
+++ b/sound/soc/codecs/wcd9310.c
@@ -191,6 +191,62 @@
SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
};
+/*cut of frequency for high pass filter*/
+static const char *cf_text[] = {
+ "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
+};
+
+static const struct soc_enum cf_dec1_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec2_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec3_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec4_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec5_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec6_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec7_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec8_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec9_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec10_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_rxmix1_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix2_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix3_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix4_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix5_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
+;
+static const struct soc_enum cf_rxmix6_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix7_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
+
static const struct snd_kcontrol_new tabla_snd_controls[] = {
SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
@@ -273,6 +329,43 @@
SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
tabla_put_anc_slot),
+ SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
+ SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
+ SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
+ SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
+ SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
+ SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
+ SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
+ SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
+ SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
+ SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
+
+ SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
+
+ SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
+
+ SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
+ SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
+ SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
+ SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
+ SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
+ SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
+ SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
};
static const char *rx_mix1_text[] = {
@@ -1671,28 +1764,40 @@
{"RX1 MIX1 INP2", "IIR1", "IIR1"},
{"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
{"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
+ {"RX2 MIX1 INP1", "IIR1", "IIR1"},
{"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
{"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
+ {"RX2 MIX1 INP2", "IIR1", "IIR1"},
{"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
{"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
+ {"RX3 MIX1 INP1", "IIR1", "IIR1"},
{"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
{"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
+ {"RX3 MIX1 INP2", "IIR1", "IIR1"},
{"RX4 MIX1 INP1", "RX1", "SLIM RX1"},
{"RX4 MIX1 INP1", "RX2", "SLIM RX2"},
+ {"RX4 MIX1 INP1", "IIR1", "IIR1"},
{"RX4 MIX1 INP2", "RX1", "SLIM RX1"},
{"RX4 MIX1 INP2", "RX2", "SLIM RX2"},
+ {"RX4 MIX1 INP2", "IIR1", "IIR1"},
{"RX5 MIX1 INP1", "RX1", "SLIM RX1"},
{"RX5 MIX1 INP1", "RX2", "SLIM RX2"},
+ {"RX5 MIX1 INP1", "IIR1", "IIR1"},
{"RX5 MIX1 INP2", "RX1", "SLIM RX1"},
{"RX5 MIX1 INP2", "RX2", "SLIM RX2"},
+ {"RX5 MIX1 INP2", "IIR1", "IIR1"},
{"RX6 MIX1 INP1", "RX1", "SLIM RX1"},
{"RX6 MIX1 INP1", "RX2", "SLIM RX2"},
+ {"RX6 MIX1 INP1", "IIR1", "IIR1"},
{"RX6 MIX1 INP2", "RX1", "SLIM RX1"},
{"RX6 MIX1 INP2", "RX2", "SLIM RX2"},
+ {"RX6 MIX1 INP2", "IIR1", "IIR1"},
{"RX7 MIX1 INP1", "RX1", "SLIM RX1"},
{"RX7 MIX1 INP1", "RX2", "SLIM RX2"},
+ {"RX7 MIX1 INP1", "IIR1", "IIR1"},
{"RX7 MIX1 INP2", "RX1", "SLIM RX1"},
{"RX7 MIX1 INP2", "RX2", "SLIM RX2"},
+ {"RX7 MIX1 INP2", "IIR1", "IIR1"},
/* Decimator Inputs */
{"DEC1 MUX", "DMIC1", "DMIC1"},
@@ -1732,7 +1837,16 @@
{"ADC6", NULL, "AMIC6"},
{"IIR1", NULL, "IIR1 INP1 MUX"},
+ {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
+ {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
+ {"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
+ {"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
+ {"IIR1 INP1 MUX", "DEC5", "DEC5 MUX"},
{"IIR1 INP1 MUX", "DEC6", "DEC6 MUX"},
+ {"IIR1 INP1 MUX", "DEC7", "DEC7 MUX"},
+ {"IIR1 INP1 MUX", "DEC8", "DEC8 MUX"},
+ {"IIR1 INP1 MUX", "DEC9", "DEC9 MUX"},
+ {"IIR1 INP1 MUX", "DEC10", "DEC10 MUX"},
{"MIC BIAS1 Internal1", NULL, "LDO_H"},
{"MIC BIAS1 Internal2", NULL, "LDO_H"},
diff --git a/sound/soc/msm/msm-dai-fe.c b/sound/soc/msm/msm-dai-fe.c
index 8970400..2ad7f3e 100644
--- a/sound/soc/msm/msm-dai-fe.c
+++ b/sound/soc/msm/msm-dai-fe.c
@@ -21,6 +21,31 @@
static struct snd_soc_dai_ops msm_fe_dai_ops = {};
+/* Conventional and unconventional sample rate supported */
+static unsigned int supported_sample_rates[] = {
+ 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000
+};
+
+static struct snd_pcm_hw_constraint_list constraints_sample_rates = {
+ .count = ARRAY_SIZE(supported_sample_rates),
+ .list = supported_sample_rates,
+ .mask = 0,
+};
+
+static int multimedia_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *dai)
+{
+ snd_pcm_hw_constraint_list(substream->runtime, 0,
+ SNDRV_PCM_HW_PARAM_RATE,
+ &constraints_sample_rates);
+
+ return 0;
+}
+
+static struct snd_soc_dai_ops msm_fe_Multimedia_dai_ops = {
+ .startup = multimedia_startup,
+};
+
static struct snd_soc_dai_driver msm_fe_dais[] = {
{
.playback = {
@@ -113,14 +138,15 @@
{
.playback = {
.stream_name = "MultiMedia3 Playback",
- .rates = SNDRV_PCM_RATE_8000_48000,
+ .rates = (SNDRV_PCM_RATE_8000_48000 |
+ SNDRV_PCM_RATE_KNOT),
.formats = SNDRV_PCM_FMTBIT_S16_LE,
.channels_min = 1,
.channels_max = 2,
.rate_min = 8000,
.rate_max = 48000,
},
- .ops = &msm_fe_dai_ops,
+ .ops = &msm_fe_Multimedia_dai_ops,
.name = "MultiMedia3",
},
/* FE DAIs created for hostless operation purpose */
diff --git a/sound/soc/msm/msm-pcm-lpa.c b/sound/soc/msm/msm-pcm-lpa.c
index 2719d22..a3c311c 100644
--- a/sound/soc/msm/msm-pcm-lpa.c
+++ b/sound/soc/msm/msm-pcm-lpa.c
@@ -46,7 +46,7 @@
SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
.formats = SNDRV_PCM_FMTBIT_S16_LE,
- .rates = SNDRV_PCM_RATE_8000_48000,
+ .rates = SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_KNOT,
.rate_min = 8000,
.rate_max = 48000,
.channels_min = 1,
@@ -78,7 +78,7 @@
struct snd_pcm_substream *substream = prtd->substream;
struct snd_pcm_runtime *runtime = substream->runtime;
struct audio_aio_write_param param;
- struct audio_buffer *buf = prtd->audio_client->port[IN].buf;
+ struct audio_buffer *buf = NULL;
unsigned long flag = 0;
int i = 0;
@@ -102,6 +102,7 @@
pr_debug("%s:writing %d bytes of buffer to dsp 2\n",
__func__, prtd->pcm_count);
+ buf = prtd->audio_client->port[IN].buf;
param.paddr = (unsigned long)buf[0].phys
+ (prtd->out_head * prtd->pcm_count);
param.len = prtd->pcm_count;
@@ -135,6 +136,7 @@
pr_debug("%s:writing %d bytes"
" of buffer to dsp\n",
__func__, prtd->pcm_count);
+ buf = prtd->audio_client->port[IN].buf;
param.paddr = (unsigned long)buf[prtd->out_head].phys;
param.len = prtd->pcm_count;
param.msw_ts = 0;
@@ -341,6 +343,7 @@
dir = IN;
lpa_audio.prtd = NULL;
+ q6asm_cmd(prtd->audio_client, CMD_CLOSE);
q6asm_audio_client_buf_free_contiguous(dir,
prtd->audio_client);
@@ -348,7 +351,6 @@
msm_pcm_routing_dereg_phy_stream(soc_prtd->dai_link->be_id,
SNDRV_PCM_STREAM_PLAYBACK);
pr_debug("%s\n", __func__);
- q6asm_cmd(prtd->audio_client, CMD_CLOSE);
q6asm_audio_client_free(prtd->audio_client);
kfree(prtd);
diff --git a/sound/soc/msm/msm-pcm-routing.c b/sound/soc/msm/msm-pcm-routing.c
index 3eb9a42..3c92514 100644
--- a/sound/soc/msm/msm-pcm-routing.c
+++ b/sound/soc/msm/msm-pcm-routing.c
@@ -360,7 +360,8 @@
static int msm_routing_put_switch_mixer(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
- struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol);
+ struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
+ struct snd_soc_dapm_widget *widget = wlist->widgets[0];
pr_debug("%s: FM Switch enable %ld\n", __func__,
ucontrol->value.integer.value[0]);
@@ -710,7 +711,7 @@
SND_SOC_DAPM_AIF_OUT("AUX_PCM_RX", "AUX PCM Playback", 0, 0, 0, 0),
SND_SOC_DAPM_AIF_IN("AUX_PCM_TX", "AUX PCM Capture", 0, 0, 0, 0),
/* Switch Definitions */
- SND_SOC_DAPM_SWITCH("SBUS_0_RX", SND_SOC_NOPM, 0, 0,
+ SND_SOC_DAPM_SWITCH("SLIMBUS_DL_HL", SND_SOC_NOPM, 0, 0,
&fm_switch_mixer_controls),
/* Mixer definitions */
SND_SOC_DAPM_MIXER("PRI_RX Audio Mixer", SND_SOC_NOPM, 0, 0,
@@ -843,7 +844,8 @@
{"Voip_Tx Mixer", "AUX_PCM_TX_Voip", "AUX_PCM_TX"},
{"VOIP_UL", NULL, "Voip_Tx Mixer"},
- {"SLIMBUS_0_RX", "Switch", "SLIM0_DL_HL"},
+ {"SLIMBUS_DL_HL", "Switch", "SLIM0_DL_HL"},
+ {"SLIMBUS_0_RX", NULL, "SLIMBUS_DL_HL"},
{"SLIM0_UL_HL", NULL, "SLIMBUS_0_TX"},
{"INT_FM_RX", NULL, "INTFM_DL_HL"},
{"INTFM_UL_HL", NULL, "INT_FM_TX"},
diff --git a/sound/soc/msm/msm8960.c b/sound/soc/msm/msm8960.c
index bbb0789..0f08682 100644
--- a/sound/soc/msm/msm8960.c
+++ b/sound/soc/msm/msm8960.c
@@ -25,7 +25,7 @@
#include <sound/jack.h>
#include <asm/mach-types.h>
#include "msm-pcm-routing.h"
-#include <../codecs/wcd9310.h>
+#include "../codecs/wcd9310.h"
/* 8960 machine driver */
@@ -229,10 +229,17 @@
struct snd_soc_dapm_context *dapm = &codec->dapm;
pr_debug("%s: msm8960_spk_control = %d", __func__, msm8960_spk_control);
- if (msm8960_spk_control == MSM8960_SPK_ON)
- snd_soc_dapm_enable_pin(dapm, "Ext Spk");
- else
- snd_soc_dapm_disable_pin(dapm, "Ext Spk");
+ if (msm8960_spk_control == MSM8960_SPK_ON) {
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Neg");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Neg");
+ } else {
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Bottom Pos");
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Bottom Neg");
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Top Pos");
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Top Neg");
+ }
snd_soc_dapm_sync(dapm);
}
@@ -581,7 +588,10 @@
snd_soc_dapm_add_routes(dapm, common_audio_map,
ARRAY_SIZE(common_audio_map));
- snd_soc_dapm_enable_pin(dapm, "Ext Spk");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Neg");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Neg");
snd_soc_dapm_sync(dapm);
diff --git a/sound/soc/msm/qdsp6/q6adm.c b/sound/soc/msm/qdsp6/q6adm.c
index 51be337..ee6116a 100644
--- a/sound/soc/msm/qdsp6/q6adm.c
+++ b/sound/soc/msm/qdsp6/q6adm.c
@@ -609,6 +609,8 @@
ret = -EINVAL;
goto fail_cmd;
}
+
+ rtac_remove_adm_device(port_id);
}
fail_cmd:
diff --git a/sound/soc/msm/qdsp6/q6asm.c b/sound/soc/msm/qdsp6/q6asm.c
index 052286b..9fcee70 100644
--- a/sound/soc/msm/qdsp6/q6asm.c
+++ b/sound/soc/msm/qdsp6/q6asm.c
@@ -205,6 +205,7 @@
static void q6asm_session_free(struct audio_client *ac)
{
pr_debug("%s: sessionid[%d]\n", __func__, ac->session);
+ rtac_remove_popp_from_adm_devices(ac->session);
mutex_lock(&session_lock);
session[ac->session] = 0;
mutex_unlock(&session_lock);
@@ -1133,6 +1134,9 @@
case FORMAT_MPEG4_AAC:
open.format = MPEG4_AAC;
break;
+ case FORMAT_MPEG4_MULTI_AAC:
+ open.format = MPEG4_MULTI_AAC;
+ break;
case FORMAT_WMA_V9:
open.format = WMA_V9;
break;
@@ -1192,6 +1196,9 @@
case FORMAT_MPEG4_AAC:
open.write_format = MPEG4_AAC;
break;
+ case FORMAT_MPEG4_MULTI_AAC:
+ open.write_format = MPEG4_MULTI_AAC;
+ break;
case FORMAT_WMA_V9:
open.write_format = WMA_V9;
break;
@@ -1675,6 +1682,56 @@
return -EINVAL;
}
+
+int q6asm_media_format_block_multi_aac(struct audio_client *ac,
+ struct asm_aac_cfg *cfg)
+{
+ struct asm_stream_media_format_update fmt;
+ int rc = 0;
+
+ pr_debug("%s:session[%d]rate[%d]ch[%d]\n", __func__, ac->session,
+ cfg->sample_rate, cfg->ch_cfg);
+
+ q6asm_add_hdr(ac, &fmt.hdr, sizeof(fmt), TRUE);
+
+ fmt.hdr.opcode = ASM_DATA_CMD_MEDIA_FORMAT_UPDATE;
+
+ fmt.format = MPEG4_MULTI_AAC;
+ fmt.cfg_size = sizeof(struct asm_aac_cfg);
+ fmt.write_cfg.aac_cfg.format = cfg->format;
+ fmt.write_cfg.aac_cfg.aot = cfg->aot;
+ fmt.write_cfg.aac_cfg.ep_config = cfg->ep_config;
+ fmt.write_cfg.aac_cfg.section_data_resilience =
+ cfg->section_data_resilience;
+ fmt.write_cfg.aac_cfg.scalefactor_data_resilience =
+ cfg->scalefactor_data_resilience;
+ fmt.write_cfg.aac_cfg.spectral_data_resilience =
+ cfg->spectral_data_resilience;
+ fmt.write_cfg.aac_cfg.ch_cfg = cfg->ch_cfg;
+ fmt.write_cfg.aac_cfg.sample_rate = cfg->sample_rate;
+ pr_info("%s:format=%x cfg_size=%d aac-cfg=%x aot=%d ch=%d sr=%d\n",
+ __func__, fmt.format, fmt.cfg_size,
+ fmt.write_cfg.aac_cfg.format,
+ fmt.write_cfg.aac_cfg.aot,
+ fmt.write_cfg.aac_cfg.ch_cfg,
+ fmt.write_cfg.aac_cfg.sample_rate);
+ rc = apr_send_pkt(ac->apr, (uint32_t *) &fmt);
+ if (rc < 0) {
+ pr_err("%s:Comamnd open failed\n", __func__);
+ goto fail_cmd;
+ }
+ rc = wait_event_timeout(ac->cmd_wait,
+ (atomic_read(&ac->cmd_state) == 0), 5*HZ);
+ if (!rc) {
+ pr_err("%s:timeout. waited for FORMAT_UPDATE\n", __func__);
+ goto fail_cmd;
+ }
+ return 0;
+fail_cmd:
+ return -EINVAL;
+}
+
+
int q6asm_media_format_block_wma(struct audio_client *ac,
void *cfg)
{
diff --git a/sound/soc/msm/qdsp6/q6voice.c b/sound/soc/msm/qdsp6/q6voice.c
index ecfef5b..965211d 100644
--- a/sound/soc/msm/qdsp6/q6voice.c
+++ b/sound/soc/msm/qdsp6/q6voice.c
@@ -287,8 +287,9 @@
mvm_session_cmd.hdr.token = 0;
mvm_session_cmd.hdr.opcode =
VSS_IMVM_CMD_CREATE_PASSIVE_CONTROL_SESSION;
- strncpy(mvm_session_cmd.mvm_session.name,
- "default modem voice", SESSION_NAME_LEN);
+ strlcpy(mvm_session_cmd.mvm_session.name,
+ "default modem voice",
+ sizeof(mvm_session_cmd.mvm_session.name));
v->mvm_state = CMD_STATUS_FAIL;
@@ -320,8 +321,9 @@
mvm_session_cmd.hdr.token = 0;
mvm_session_cmd.hdr.opcode =
VSS_IMVM_CMD_CREATE_FULL_CONTROL_SESSION;
- strncpy(mvm_session_cmd.mvm_session.name,
- "default voip", SESSION_NAME_LEN);
+ strlcpy(mvm_session_cmd.mvm_session.name,
+ "default voip",
+ sizeof(mvm_session_cmd.mvm_session.name));
v->mvm_state = CMD_STATUS_FAIL;
@@ -361,8 +363,9 @@
cvs_session_cmd.hdr.token = 0;
cvs_session_cmd.hdr.opcode =
VSS_ISTREAM_CMD_CREATE_PASSIVE_CONTROL_SESSION;
- strncpy(cvs_session_cmd.cvs_session.name,
- "default modem voice", SESSION_NAME_LEN);
+ strlcpy(cvs_session_cmd.cvs_session.name,
+ "default modem voice",
+ sizeof(cvs_session_cmd.cvs_session.name));
v->cvs_state = CMD_STATUS_FAIL;
@@ -407,8 +410,9 @@
common.mvs_info.media_type;
cvs_full_ctl_cmd.cvs_session.network_id =
common.mvs_info.network_type;
- strncpy(cvs_full_ctl_cmd.cvs_session.name,
- "default q6 voice", 16);
+ strlcpy(cvs_full_ctl_cmd.cvs_session.name,
+ "default q6 voice",
+ sizeof(cvs_full_ctl_cmd.cvs_session.name));
v->cvs_state = CMD_STATUS_FAIL;