spi/bfin_spi: reset ctl_reg bits when setup is run again on a device
During runtime, the spi setup function may be called multiple times on the
same device in order to reconfigure some settings on the fly. When this
happens, we need to reset the ctl_reg bits so that changing the mode works
as expected.
Reported-by: Andy Getzendanner <james.getzendanner@students.olin.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c
index 830c705..376f2f0 100644
--- a/drivers/spi/spi_bfin5xx.c
+++ b/drivers/spi/spi_bfin5xx.c
@@ -972,6 +972,7 @@
struct bfin5xx_spi_chip *chip_info;
struct slave_data *chip = NULL;
struct master_data *drv_data = spi_master_get_devdata(spi->master);
+ u16 bfin_ctl_reg;
int ret = -EINVAL;
/* Only alloc (or use chip_info) on first setup */
@@ -989,6 +990,10 @@
chip_info = spi->controller_data;
}
+ /* Let people set non-standard bits directly */
+ bfin_ctl_reg = BIT_CTL_OPENDRAIN | BIT_CTL_EMISO |
+ BIT_CTL_PSSE | BIT_CTL_GM | BIT_CTL_SZ;
+
/* chip_info isn't always needed */
if (chip_info) {
/* Make sure people stop trying to set fields via ctl_reg
@@ -997,13 +1002,11 @@
* Not sure if a user actually needs/uses any of these,
* but let's assume (for now) they do.
*/
- if (chip_info->ctl_reg & ~(BIT_CTL_OPENDRAIN | BIT_CTL_EMISO | \
- BIT_CTL_PSSE | BIT_CTL_GM | BIT_CTL_SZ)) {
+ if (chip_info->ctl_reg & ~bfin_ctl_reg) {
dev_err(&spi->dev, "do not set bits in ctl_reg "
"that the SPI framework manages\n");
goto error;
}
-
chip->enable_dma = chip_info->enable_dma != 0
&& drv_data->master_info->enable_dma;
chip->ctl_reg = chip_info->ctl_reg;
@@ -1011,6 +1014,9 @@
chip->idle_tx_val = chip_info->idle_tx_val;
chip->pio_interrupt = chip_info->pio_interrupt;
spi->bits_per_word = chip_info->bits_per_word;
+ } else {
+ /* force a default base state */
+ chip->ctl_reg &= bfin_ctl_reg;
}
if (spi->bits_per_word != 8 && spi->bits_per_word != 16) {