| commit | 62e5b92b342ffce7a1cac5340050211162cc1bdf | [log] [tgz] |
|---|---|---|
| author | Chandan Uddaraju <chandanu@codeaurora.org> | Fri Sep 14 20:50:18 2012 -0700 |
| committer | Chandan Uddaraju <chandanu@codeaurora.org> | Mon Sep 17 12:34:27 2012 -0700 |
| tree | 16cb6cba02459907ef3c04ee55145e12be1dea07 | |
| parent | ccba0d6aca312f3351d095bb6de48a8c76bbf360 [diff] |
msm:clock-8974: Add suspend/resume support for DSI PLL The resume routine never calls set_rate for the same clock rate. Since DSI PHY register values will be reset during suspend/resume, add support to re-initialize the DSI PHY PLL during resume sequence. Change-Id: I0106b4910d6081de5697f64ea07fd5eab718f5e2 Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>