commit 64f495323c9a902b3e59fe0a588585102bb3b13e
author Kyle McMartin <kyle@parisc-linux.org> Sat Apr 22 00:48:22 2006 -0600
committer Kyle McMartin <kyle@hera.kernel.org> Tue Jun 27 23:28:32 2006 +0000
tree 202d6c0105b0348aadfa8761e7c3cf27a5e98db9
parent f36f44de721db44b4c2944133c3c5c2e06f633f0

[PARISC] Ensure all ldcw uses are ldcw,co on pa2.0

ldcw,co should always be used on pa2.0, otherwise the strict cache
width alignment requirement is not relaxed.

Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>

include/asm-parisc/assembly.h

diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h
index 3ce3440..1a7bfe6 100644
--- a/include/asm-parisc/assembly.h
+++ b/include/asm-parisc/assembly.h
@@ -48,6 +48,7 @@
 #define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE)
 
 #ifdef CONFIG_PA20
+#define LDCW		ldcw,co
 #define BL		b,l
 # ifdef CONFIG_64BIT
 #  define LEVEL		2.0w
@@ -55,6 +56,7 @@
 #  define LEVEL		2.0
 # endif
 #else
+#define LDCW		ldcw
 #define BL		bl
 #define LEVEL		1.1
 #endif