msm: rpm: Refactor Low Power Mgmt drivers to support single binary
Move enumeration into uint arrays that can be chosen based on
the device file configuration.
rpm.h will have a superset of all enumeration for all targets.
The device file configuration will map the enumeration defined
in rpm.h to the target specific enumeration defined in rpm-XXXX.h.
Device drivers that need to communicate with RPM will continue to
use the enumeration defined in rpm.h and the RPM driver will translate
the generic enumeration to a device specific enumeration before sending
the RPM message to the RPM processor.
Also refactor SPM and MPM data for the supported targets.
Add RPM, SPM, LPM and MPM driver support for APQ8064 and MSM8930 targets.
Supported targets: 8660, 8960, 9615, 8930, 8064
Change-Id: I0d4ed7634cb221c124bc59a946932f7ac557ef58
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index 9c77f3d..f3ef2ce 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -25,9 +25,13 @@
#include <sound/msm-dai-q6.h>
#include <sound/apr_audio.h>
#include <mach/msm_bus_board.h>
+#include <mach/rpm.h>
#include "clock.h"
#include "devices.h"
#include "msm_watchdog.h"
+#include "rpm_stats.h"
+#include "rpm_log.h"
+#include "mpm.h"
/* Address of GSBI blocks */
#define MSM_GSBI1_PHYS 0x12440000
@@ -942,3 +946,386 @@
.table = msm_clocks_8064_dummy,
.size = ARRAY_SIZE(msm_clocks_8064_dummy),
};
+
+struct msm_rpm_platform_data apq8064_rpm_data __initdata = {
+ .reg_base_addrs = {
+ [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
+ [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
+ [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
+ [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
+ },
+ .irq_ack = RPM_APCC_CPU0_GP_HIGH_IRQ,
+ .ipc_rpm_reg = MSM_APCS_GCC_BASE + 0x008,
+ .ipc_rpm_val = 4,
+ .target_id = {
+ MSM_RPM_MAP(8064, NOTIFICATION_CONFIGURED_0, NOTIFICATION, 4),
+ MSM_RPM_MAP(8064, NOTIFICATION_REGISTERED_0, NOTIFICATION, 4),
+ MSM_RPM_MAP(8064, INVALIDATE_0, INVALIDATE, 8),
+ MSM_RPM_MAP(8064, TRIGGER_TIMED_TO, TRIGGER_TIMED, 1),
+ MSM_RPM_MAP(8064, TRIGGER_TIMED_SCLK_COUNT, TRIGGER_TIMED, 1),
+ MSM_RPM_MAP(8064, RPM_CTL, RPM_CTL, 1),
+ MSM_RPM_MAP(8064, CXO_CLK, CXO_CLK, 1),
+ MSM_RPM_MAP(8064, PXO_CLK, PXO_CLK, 1),
+ MSM_RPM_MAP(8064, APPS_FABRIC_CLK, APPS_FABRIC_CLK, 1),
+ MSM_RPM_MAP(8064, SYSTEM_FABRIC_CLK, SYSTEM_FABRIC_CLK, 1),
+ MSM_RPM_MAP(8064, MM_FABRIC_CLK, MM_FABRIC_CLK, 1),
+ MSM_RPM_MAP(8064, DAYTONA_FABRIC_CLK, DAYTONA_FABRIC_CLK, 1),
+ MSM_RPM_MAP(8064, SFPB_CLK, SFPB_CLK, 1),
+ MSM_RPM_MAP(8064, CFPB_CLK, CFPB_CLK, 1),
+ MSM_RPM_MAP(8064, MMFPB_CLK, MMFPB_CLK, 1),
+ MSM_RPM_MAP(8064, EBI1_CLK, EBI1_CLK, 1),
+ MSM_RPM_MAP(8064, APPS_FABRIC_CFG_HALT_0,
+ APPS_FABRIC_CFG_HALT, 2),
+ MSM_RPM_MAP(8064, APPS_FABRIC_CFG_CLKMOD_0,
+ APPS_FABRIC_CFG_CLKMOD, 3),
+ MSM_RPM_MAP(8064, APPS_FABRIC_CFG_IOCTL,
+ APPS_FABRIC_CFG_IOCTL, 1),
+ MSM_RPM_MAP(8064, APPS_FABRIC_ARB_0, APPS_FABRIC_ARB, 12),
+ MSM_RPM_MAP(8064, SYS_FABRIC_CFG_HALT_0,
+ SYS_FABRIC_CFG_HALT, 2),
+ MSM_RPM_MAP(8064, SYS_FABRIC_CFG_CLKMOD_0,
+ SYS_FABRIC_CFG_CLKMOD, 3),
+ MSM_RPM_MAP(8064, SYS_FABRIC_CFG_IOCTL,
+ SYS_FABRIC_CFG_IOCTL, 1),
+ MSM_RPM_MAP(8064, SYSTEM_FABRIC_ARB_0, SYSTEM_FABRIC_ARB, 30),
+ MSM_RPM_MAP(8064, MMSS_FABRIC_CFG_HALT_0,
+ MMSS_FABRIC_CFG_HALT, 2),
+ MSM_RPM_MAP(8064, MMSS_FABRIC_CFG_CLKMOD_0,
+ MMSS_FABRIC_CFG_CLKMOD, 3),
+ MSM_RPM_MAP(8064, MMSS_FABRIC_CFG_IOCTL,
+ MMSS_FABRIC_CFG_IOCTL, 1),
+ MSM_RPM_MAP(8064, MM_FABRIC_ARB_0, MM_FABRIC_ARB, 21),
+ MSM_RPM_MAP(8064, PM8921_S1_0, PM8921_S1, 2),
+ MSM_RPM_MAP(8064, PM8921_S2_0, PM8921_S2, 2),
+ MSM_RPM_MAP(8064, PM8921_S3_0, PM8921_S3, 2),
+ MSM_RPM_MAP(8064, PM8921_S4_0, PM8921_S4, 2),
+ MSM_RPM_MAP(8064, PM8921_S5_0, PM8921_S5, 2),
+ MSM_RPM_MAP(8064, PM8921_S6_0, PM8921_S6, 2),
+ MSM_RPM_MAP(8064, PM8921_S7_0, PM8921_S7, 2),
+ MSM_RPM_MAP(8064, PM8921_S8_0, PM8921_S8, 2),
+ MSM_RPM_MAP(8064, PM8921_L1_0, PM8921_L1, 2),
+ MSM_RPM_MAP(8064, PM8921_L2_0, PM8921_L2, 2),
+ MSM_RPM_MAP(8064, PM8921_L3_0, PM8921_L3, 2),
+ MSM_RPM_MAP(8064, PM8921_L4_0, PM8921_L4, 2),
+ MSM_RPM_MAP(8064, PM8921_L5_0, PM8921_L5, 2),
+ MSM_RPM_MAP(8064, PM8921_L6_0, PM8921_L6, 2),
+ MSM_RPM_MAP(8064, PM8921_L7_0, PM8921_L7, 2),
+ MSM_RPM_MAP(8064, PM8921_L8_0, PM8921_L8, 2),
+ MSM_RPM_MAP(8064, PM8921_L9_0, PM8921_L9, 2),
+ MSM_RPM_MAP(8064, PM8921_L10_0, PM8921_L10, 2),
+ MSM_RPM_MAP(8064, PM8921_L11_0, PM8921_L11, 2),
+ MSM_RPM_MAP(8064, PM8921_L12_0, PM8921_L12, 2),
+ MSM_RPM_MAP(8064, PM8921_L13_0, PM8921_L13, 2),
+ MSM_RPM_MAP(8064, PM8921_L14_0, PM8921_L14, 2),
+ MSM_RPM_MAP(8064, PM8921_L15_0, PM8921_L15, 2),
+ MSM_RPM_MAP(8064, PM8921_L16_0, PM8921_L16, 2),
+ MSM_RPM_MAP(8064, PM8921_L17_0, PM8921_L17, 2),
+ MSM_RPM_MAP(8064, PM8921_L18_0, PM8921_L18, 2),
+ MSM_RPM_MAP(8064, PM8921_L19_0, PM8921_L19, 2),
+ MSM_RPM_MAP(8064, PM8921_L20_0, PM8921_L20, 2),
+ MSM_RPM_MAP(8064, PM8921_L21_0, PM8921_L21, 2),
+ MSM_RPM_MAP(8064, PM8921_L22_0, PM8921_L22, 2),
+ MSM_RPM_MAP(8064, PM8921_L23_0, PM8921_L23, 2),
+ MSM_RPM_MAP(8064, PM8921_L24_0, PM8921_L24, 2),
+ MSM_RPM_MAP(8064, PM8921_L25_0, PM8921_L25, 2),
+ MSM_RPM_MAP(8064, PM8921_L26_0, PM8921_L26, 2),
+ MSM_RPM_MAP(8064, PM8921_L27_0, PM8921_L27, 2),
+ MSM_RPM_MAP(8064, PM8921_L28_0, PM8921_L28, 2),
+ MSM_RPM_MAP(8064, PM8921_L29_0, PM8921_L29, 2),
+ MSM_RPM_MAP(8064, PM8921_CLK1_0, PM8921_CLK1, 2),
+ MSM_RPM_MAP(8064, PM8921_CLK2_0, PM8921_CLK2, 2),
+ MSM_RPM_MAP(8064, PM8921_LVS1, PM8921_LVS1, 1),
+ MSM_RPM_MAP(8064, PM8921_LVS2, PM8921_LVS2, 1),
+ MSM_RPM_MAP(8064, PM8921_LVS3, PM8921_LVS3, 1),
+ MSM_RPM_MAP(8064, PM8921_LVS4, PM8921_LVS4, 1),
+ MSM_RPM_MAP(8064, PM8921_LVS5, PM8921_LVS5, 1),
+ MSM_RPM_MAP(8064, PM8921_LVS6, PM8921_LVS6, 1),
+ MSM_RPM_MAP(8064, PM8921_LVS7, PM8921_LVS7, 1),
+ MSM_RPM_MAP(8064, PM8821_S1_0, PM8821_S1, 2),
+ MSM_RPM_MAP(8064, PM8821_S2_0, PM8821_S2, 2),
+ MSM_RPM_MAP(8064, PM8821_L1_0, PM8821_L1, 2),
+ MSM_RPM_MAP(8064, NCP_0, NCP, 2),
+ MSM_RPM_MAP(8064, CXO_BUFFERS, CXO_BUFFERS, 1),
+ MSM_RPM_MAP(8064, USB_OTG_SWITCH, USB_OTG_SWITCH, 1),
+ MSM_RPM_MAP(8064, HDMI_SWITCH, HDMI_SWITCH, 1),
+ MSM_RPM_MAP(8064, DDR_DMM_0, DDR_DMM, 2),
+ MSM_RPM_MAP(8064, QDSS_CLK, QDSS_CLK, 1),
+ },
+ .target_status = {
+ MSM_RPM_STATUS_ID_MAP(8064, VERSION_MAJOR),
+ MSM_RPM_STATUS_ID_MAP(8064, VERSION_MINOR),
+ MSM_RPM_STATUS_ID_MAP(8064, VERSION_BUILD),
+ MSM_RPM_STATUS_ID_MAP(8064, SUPPORTED_RESOURCES_0),
+ MSM_RPM_STATUS_ID_MAP(8064, SUPPORTED_RESOURCES_1),
+ MSM_RPM_STATUS_ID_MAP(8064, SUPPORTED_RESOURCES_2),
+ MSM_RPM_STATUS_ID_MAP(8064, RESERVED_SUPPORTED_RESOURCES_0),
+ MSM_RPM_STATUS_ID_MAP(8064, SEQUENCE),
+ MSM_RPM_STATUS_ID_MAP(8064, RPM_CTL),
+ MSM_RPM_STATUS_ID_MAP(8064, CXO_CLK),
+ MSM_RPM_STATUS_ID_MAP(8064, PXO_CLK),
+ MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_CLK),
+ MSM_RPM_STATUS_ID_MAP(8064, SYSTEM_FABRIC_CLK),
+ MSM_RPM_STATUS_ID_MAP(8064, MM_FABRIC_CLK),
+ MSM_RPM_STATUS_ID_MAP(8064, DAYTONA_FABRIC_CLK),
+ MSM_RPM_STATUS_ID_MAP(8064, SFPB_CLK),
+ MSM_RPM_STATUS_ID_MAP(8064, CFPB_CLK),
+ MSM_RPM_STATUS_ID_MAP(8064, MMFPB_CLK),
+ MSM_RPM_STATUS_ID_MAP(8064, EBI1_CLK),
+ MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_CFG_HALT),
+ MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_CFG_CLKMOD),
+ MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_CFG_IOCTL),
+ MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_ARB),
+ MSM_RPM_STATUS_ID_MAP(8064, SYS_FABRIC_CFG_HALT),
+ MSM_RPM_STATUS_ID_MAP(8064, SYS_FABRIC_CFG_CLKMOD),
+ MSM_RPM_STATUS_ID_MAP(8064, SYS_FABRIC_CFG_IOCTL),
+ MSM_RPM_STATUS_ID_MAP(8064, SYSTEM_FABRIC_ARB),
+ MSM_RPM_STATUS_ID_MAP(8064, MMSS_FABRIC_CFG_HALT),
+ MSM_RPM_STATUS_ID_MAP(8064, MMSS_FABRIC_CFG_CLKMOD),
+ MSM_RPM_STATUS_ID_MAP(8064, MMSS_FABRIC_CFG_IOCTL),
+ MSM_RPM_STATUS_ID_MAP(8064, MM_FABRIC_ARB),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S1_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S1_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S2_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S2_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S3_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S3_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S4_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S4_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S5_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S5_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S6_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S6_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S7_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S7_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S8_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_S8_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L1_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L1_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L2_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L2_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L3_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L3_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L4_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L4_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L5_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L5_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L6_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L6_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L7_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L7_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L8_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L8_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L9_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L9_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L10_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L10_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L11_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L11_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L12_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L12_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L13_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L13_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L14_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L14_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L15_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L15_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L16_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L16_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L17_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L17_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L18_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L18_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L19_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L19_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L20_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L20_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L21_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L21_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L22_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L22_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L23_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L23_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L24_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L24_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L25_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L25_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L26_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L26_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L27_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L27_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L28_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L28_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L29_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_L29_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_CLK1_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_CLK1_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_CLK2_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_CLK2_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS2),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS3),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS4),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS5),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS6),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS7),
+ MSM_RPM_STATUS_ID_MAP(8064, NCP_0),
+ MSM_RPM_STATUS_ID_MAP(8064, NCP_1),
+ MSM_RPM_STATUS_ID_MAP(8064, CXO_BUFFERS),
+ MSM_RPM_STATUS_ID_MAP(8064, USB_OTG_SWITCH),
+ MSM_RPM_STATUS_ID_MAP(8064, HDMI_SWITCH),
+ MSM_RPM_STATUS_ID_MAP(8064, DDR_DMM_0),
+ MSM_RPM_STATUS_ID_MAP(8064, DDR_DMM_1),
+ MSM_RPM_STATUS_ID_MAP(8064, EBI1_CH0_RANGE),
+ MSM_RPM_STATUS_ID_MAP(8064, EBI1_CH1_RANGE),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8821_S1_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8821_S1_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8821_S2_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8821_S2_1),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8821_L1_0),
+ MSM_RPM_STATUS_ID_MAP(8064, PM8821_L1_1),
+ },
+ .target_ctrl_id = {
+ MSM_RPM_CTRL_MAP(8064, VERSION_MAJOR),
+ MSM_RPM_CTRL_MAP(8064, VERSION_MINOR),
+ MSM_RPM_CTRL_MAP(8064, VERSION_BUILD),
+ MSM_RPM_CTRL_MAP(8064, REQ_CTX_0),
+ MSM_RPM_CTRL_MAP(8064, REQ_SEL_0),
+ MSM_RPM_CTRL_MAP(8064, ACK_CTX_0),
+ MSM_RPM_CTRL_MAP(8064, ACK_SEL_0),
+ },
+ .sel_invalidate = MSM_RPM_8064_SEL_INVALIDATE,
+ .sel_notification = MSM_RPM_8064_SEL_NOTIFICATION,
+ .sel_last = MSM_RPM_8064_SEL_LAST,
+ .ver = {3, 0, 0},
+};
+
+struct platform_device apq8064_rpm_device = {
+ .name = "msm_rpm",
+ .id = -1,
+};
+
+static struct msm_rpmstats_platform_data msm_rpm_stat_pdata = {
+ .phys_addr_base = 0x0010D204,
+ .phys_size = SZ_8K,
+};
+
+struct platform_device apq8064_rpm_stat_device = {
+ .name = "msm_rpm_stat",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_rpm_stat_pdata,
+ },
+};
+
+static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
+ .phys_addr_base = 0x0010C000,
+ .reg_offsets = {
+ [MSM_RPM_LOG_PAGE_INDICES] = 0x00000080,
+ [MSM_RPM_LOG_PAGE_BUFFER] = 0x000000A0,
+ },
+ .phys_size = SZ_8K,
+ .log_len = 4096, /* log's buffer length in bytes */
+ .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
+};
+
+struct platform_device apq8064_rpm_log_device = {
+ .name = "msm_rpm_log",
+ .id = -1,
+ .dev = {
+ .platform_data = &msm_rpm_log_pdata,
+ },
+};
+
+#ifdef CONFIG_MSM_MPM
+static uint16_t msm_mpm_irqs_m2a[MSM_MPM_NR_MPM_IRQS] __initdata = {
+ [1] = MSM_GPIO_TO_INT(26),
+ [2] = MSM_GPIO_TO_INT(88),
+ [4] = MSM_GPIO_TO_INT(73),
+ [5] = MSM_GPIO_TO_INT(74),
+ [6] = MSM_GPIO_TO_INT(75),
+ [7] = MSM_GPIO_TO_INT(76),
+ [8] = MSM_GPIO_TO_INT(77),
+ [9] = MSM_GPIO_TO_INT(36),
+ [10] = MSM_GPIO_TO_INT(84),
+ [11] = MSM_GPIO_TO_INT(7),
+ [12] = MSM_GPIO_TO_INT(11),
+ [13] = MSM_GPIO_TO_INT(52),
+ [14] = MSM_GPIO_TO_INT(15),
+ [15] = MSM_GPIO_TO_INT(83),
+ [16] = USB3_HS_IRQ,
+ [19] = MSM_GPIO_TO_INT(61),
+ [20] = MSM_GPIO_TO_INT(58),
+ [23] = MSM_GPIO_TO_INT(65),
+ [24] = MSM_GPIO_TO_INT(63),
+ [25] = USB1_HS_IRQ,
+ [27] = HDMI_IRQ,
+ [29] = MSM_GPIO_TO_INT(22),
+ [30] = MSM_GPIO_TO_INT(72),
+ [31] = USB4_HS_IRQ,
+ [33] = MSM_GPIO_TO_INT(44),
+ [34] = MSM_GPIO_TO_INT(39),
+ [35] = MSM_GPIO_TO_INT(19),
+ [36] = MSM_GPIO_TO_INT(23),
+ [37] = MSM_GPIO_TO_INT(41),
+ [38] = MSM_GPIO_TO_INT(30),
+ [41] = MSM_GPIO_TO_INT(42),
+ [42] = MSM_GPIO_TO_INT(56),
+ [43] = MSM_GPIO_TO_INT(55),
+ [44] = MSM_GPIO_TO_INT(50),
+ [45] = MSM_GPIO_TO_INT(49),
+ [46] = MSM_GPIO_TO_INT(47),
+ [47] = MSM_GPIO_TO_INT(45),
+ [48] = MSM_GPIO_TO_INT(38),
+ [49] = MSM_GPIO_TO_INT(34),
+ [50] = MSM_GPIO_TO_INT(32),
+ [51] = MSM_GPIO_TO_INT(29),
+ [52] = MSM_GPIO_TO_INT(18),
+ [53] = MSM_GPIO_TO_INT(10),
+ [54] = MSM_GPIO_TO_INT(81),
+ [55] = MSM_GPIO_TO_INT(6),
+};
+
+static uint16_t msm_mpm_bypassed_apps_irqs[] __initdata = {
+ TLMM_MSM_SUMMARY_IRQ,
+ RPM_APCC_CPU0_GP_HIGH_IRQ,
+ RPM_APCC_CPU0_GP_MEDIUM_IRQ,
+ RPM_APCC_CPU0_GP_LOW_IRQ,
+ RPM_APCC_CPU0_WAKE_UP_IRQ,
+ RPM_APCC_CPU1_GP_HIGH_IRQ,
+ RPM_APCC_CPU1_GP_MEDIUM_IRQ,
+ RPM_APCC_CPU1_GP_LOW_IRQ,
+ RPM_APCC_CPU1_WAKE_UP_IRQ,
+ MSS_TO_APPS_IRQ_0,
+ MSS_TO_APPS_IRQ_1,
+ MSS_TO_APPS_IRQ_2,
+ MSS_TO_APPS_IRQ_3,
+ MSS_TO_APPS_IRQ_4,
+ MSS_TO_APPS_IRQ_5,
+ MSS_TO_APPS_IRQ_6,
+ MSS_TO_APPS_IRQ_7,
+ MSS_TO_APPS_IRQ_8,
+ MSS_TO_APPS_IRQ_9,
+ LPASS_SCSS_GP_LOW_IRQ,
+ LPASS_SCSS_GP_MEDIUM_IRQ,
+ LPASS_SCSS_GP_HIGH_IRQ,
+ SPS_MTI_30,
+ SPS_MTI_31,
+ RIVA_APSS_SPARE_IRQ,
+ RIVA_APPS_WLAN_SMSM_IRQ,
+ RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ,
+ RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ,
+};
+
+struct msm_mpm_device_data apq8064_mpm_dev_data __initdata = {
+ .irqs_m2a = msm_mpm_irqs_m2a,
+ .irqs_m2a_size = ARRAY_SIZE(msm_mpm_irqs_m2a),
+ .bypassed_apps_irqs = msm_mpm_bypassed_apps_irqs,
+ .bypassed_apps_irqs_size = ARRAY_SIZE(msm_mpm_bypassed_apps_irqs),
+ .mpm_request_reg_base = MSM_RPM_BASE + 0x9d8,
+ .mpm_status_reg_base = MSM_RPM_BASE + 0xdf8,
+ .mpm_apps_ipc_reg = MSM_APCS_GCC_BASE + 0x008,
+ .mpm_apps_ipc_val = BIT(1),
+ .mpm_ipc_irq = RPM_APCC_CPU0_GP_MEDIUM_IRQ,
+
+};
+#endif