mmc: msm_sdcc: Set CPU_DMA latency for acceptable QOS
To prevent speed degradation in high throughput
scenarios, specify CPU_DMA latency which gives
acceptable QOS. This should be derived without
knowledge of specific low power mode latencies.
For MMC/SD cards, reads tend to be the fastest
transactions, and suffer most from latency. To
ensure acceptable QOS, the average chunk size read
is used with typical best-in-class read speeds
seen across targets and cards.
With an average chunk size of 128KiB transferred
at 30MB/s, a 5% degradation in speed allows for
an additional 200us latency. This default can
be overridden by newer targets with more stringent
latency requirements.
Change-Id: I77d320d2b5e34e3b72ba41ed25454ece042eeddb
Signed-off-by: Oluwafemi Adeyemi <aadeyemi@codeaurora.org>
diff --git a/arch/arm/include/asm/mach/mmc.h b/arch/arm/include/asm/mach/mmc.h
index 7a5b21a..dabd390 100644
--- a/arch/arm/include/asm/mach/mmc.h
+++ b/arch/arm/include/asm/mach/mmc.h
@@ -152,7 +152,7 @@
bool disable_bam;
bool disable_runtime_pm;
bool disable_cmd23;
- u32 swfi_latency;
+ u32 cpu_dma_latency;
};
#endif