| commit | 6da35d33d512b4dcb92ec68cf1df728da33e3381 | [log] [tgz] |
|---|---|---|
| author | Vikram Mulukutla <markivx@codeaurora.org> | Wed Jul 18 13:55:31 2012 -0700 |
| committer | Vikram Mulukutla <markivx@codeaurora.org> | Fri Sep 14 17:59:42 2012 -0700 |
| tree | 03e2d782a5122c830445f691641ee2b79d86a5d2 | |
| parent | c972e9ac92d2c77870fef3cabe729846f5d20b0c [diff] |
msm: clock-pll: Update PLL enable sequences for new processes The PLL enable sequences across certain chipsets are different due to differing manufacturing processes. Update the PLL enabling sequences to reflect these differences. Change-Id: Iba1e515b20f49d1629c512ffce2919e4ce0874c3 Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>