hwmon: qpnp-adc: Fix register read/writes
Fix reading/writing to the correct ADC peripheral offset
address during SPMI read/writes. While adding multiple
channels an incorrect channel index initialization causes
the ADC reads to occur only on one channel. Fix it by
initializing the channel index only once at init.
The configure api has few register read/writes done
without using the bit mask field. Fix it by reading
the register and updating only the concerned bits.
Also add more comments to the configure api to list
out the steps for each register configuration and
fix using the correct print statements on error.
Change-Id: I0ce67163c5f27021f5fb0905fe601f4b1e0ee8b8
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
diff --git a/drivers/hwmon/qpnp-adc-current.c b/drivers/hwmon/qpnp-adc-current.c
index 95da3b9..b689255 100644
--- a/drivers/hwmon/qpnp-adc-current.c
+++ b/drivers/hwmon/qpnp-adc-current.c
@@ -142,7 +142,7 @@
int rc;
rc = spmi_ext_register_readl(iadc->adc->spmi->ctrl, iadc->adc->slave,
- reg, data, 1);
+ (iadc->adc->offset + reg), data, 1);
if (rc < 0) {
pr_err("qpnp iadc read reg %d failed with %d\n", reg, rc);
return rc;
@@ -159,7 +159,7 @@
buf = &data;
rc = spmi_ext_register_writel(iadc->adc->spmi->ctrl, iadc->adc->slave,
- reg, buf, 1);
+ (iadc->adc->offset + reg), buf, 1);
if (rc < 0) {
pr_err("qpnp iadc write reg %d failed with %d\n", reg, rc);
return rc;