Merge "camera: Mercury hardware JPEG decoder driver support." into msm-3.0
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index 79af1a7..bd6ec86 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -2559,6 +2559,9 @@
#ifdef CONFIG_MSM_GEMINI
&msm8960_gemini_device,
#endif
+#ifdef CONFIG_MSM_MERCURY
+ &msm8960_mercury_device,
+#endif
};
static struct platform_device *cdp_devices[] __initdata = {
@@ -2596,6 +2599,9 @@
#ifdef CONFIG_MSM_GEMINI
&msm8960_gemini_device,
#endif
+#ifdef CONFIG_MSM_MERCURY
+ &msm8960_mercury_device,
+#endif
&msm_voice,
&msm_voip,
&msm_lpa_pcm,
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 79fb69f..c4ada1e 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -5527,7 +5527,8 @@
CLK_LOOKUP("mem_clk", imem_axi_clk.c, "msm_gemini.0"),
CLK_LOOKUP("core_clk", ijpeg_clk.c, "msm_gemini.0"),
CLK_LOOKUP("core_clk", ijpeg_clk.c, "footswitch-8x60.3"),
- CLK_LOOKUP("core_clk", jpegd_clk.c, ""),
+ CLK_LOOKUP("core_clk", jpegd_clk.c, "msm_mercury.0"),
+ CLK_LOOKUP("iface_clk", jpegd_p_clk.c, "msm_mercury.0"),
CLK_LOOKUP("core_clk", mdp_clk.c, "mdp.0"),
CLK_LOOKUP("core_clk", mdp_clk.c, "footswitch-8x60.4"),
CLK_LOOKUP("vsync_clk", mdp_vsync_clk.c, "mdp.0"),
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index 9394404..28ecdcf 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -2999,6 +2999,27 @@
};
#endif
+#ifdef CONFIG_MSM_MERCURY
+static struct resource msm_mercury_resources[] = {
+ {
+ .start = 0x05000000,
+ .end = 0x05000000 + SZ_1M - 1,
+ .name = "mercury_resource_base",
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = JPEGD_IRQ,
+ .end = JPEGD_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+struct platform_device msm8960_mercury_device = {
+ .name = "msm_mercury",
+ .resource = msm_mercury_resources,
+ .num_resources = ARRAY_SIZE(msm_mercury_resources),
+};
+#endif
+
struct msm_rpm_platform_data msm8960_rpm_data __initdata = {
.reg_base_addrs = {
[MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index 71b695f..31ba179 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -65,6 +65,7 @@
extern struct platform_device msm8960_device_qup_i2c_gsbi12;
extern struct platform_device msm8960_device_qup_spi_gsbi1;
extern struct platform_device msm8960_gemini_device;
+extern struct platform_device msm8960_mercury_device;
extern struct platform_device msm8960_device_i2c_mux_gsbi4;
extern struct platform_device msm8960_device_csiphy0;
extern struct platform_device msm8960_device_csiphy1;
diff --git a/drivers/media/video/msm/Kconfig b/drivers/media/video/msm/Kconfig
index ab4a6f2..44d9e5d 100644
--- a/drivers/media/video/msm/Kconfig
+++ b/drivers/media/video/msm/Kconfig
@@ -239,6 +239,12 @@
---help---
Enable support for Gemini Jpeg Engine
+config MSM_MERCURY
+ tristate "Qualcomm MSM Mercury Jpeg Decoder Engine support"
+ depends on MSM_CAMERA && ARCH_MSM8960
+ ---help---
+ Enable support for Mercury Jpeg Engine
+
config MSM_VPE
tristate "Qualcomm MSM Video Pre-processing Engine support"
depends on MSM_CAMERA && (ARCH_MSM7X30 || ARCH_MSM8X60)
diff --git a/drivers/media/video/msm/Makefile b/drivers/media/video/msm/Makefile
index e4d4081..67da5ea 100644
--- a/drivers/media/video/msm/Makefile
+++ b/drivers/media/video/msm/Makefile
@@ -18,7 +18,7 @@
else
obj-$(CONFIG_MSM_CAMERA) += msm_camera.o
endif
-obj-$(CONFIG_MSM_CAMERA) += msm_axi_qos.o gemini/
+obj-$(CONFIG_MSM_CAMERA) += msm_axi_qos.o gemini/ mercury/
obj-$(CONFIG_MSM_CAMERA_FLASH) += flash.o
obj-$(CONFIG_ARCH_MSM_ARM11) += msm_vfe7x.o
ifeq ($(CONFIG_MSM_CAMERA_V4L2),y)
diff --git a/drivers/media/video/msm/mercury/Makefile b/drivers/media/video/msm/mercury/Makefile
new file mode 100644
index 0000000..ce4c86d
--- /dev/null
+++ b/drivers/media/video/msm/mercury/Makefile
@@ -0,0 +1,3 @@
+GCC_VERSION := $(shell $(CONFIG_SHELL) $(PWD)/scripts/gcc-version.sh $(CROSS_COMPILE)gcc)
+EXTRA_CFLAGS += -Idrivers/media/video/msm
+obj-$(CONFIG_MSM_MERCURY) += msm_mercury_dev.o msm_mercury_core.o msm_mercury_hw.o msm_mercury_platform.o msm_mercury_sync.o
diff --git a/drivers/media/video/msm/mercury/msm_mercury_common.h b/drivers/media/video/msm/mercury/msm_mercury_common.h
new file mode 100644
index 0000000..f5939c1
--- /dev/null
+++ b/drivers/media/video/msm/mercury/msm_mercury_common.h
@@ -0,0 +1,24 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef MSM_MERCURY_COMMON_H
+#define MSM_MERCURY_COMMON_H
+
+#define MSM_MERCURY_DEBUG
+#ifdef MSM_MERCURY_DEBUG
+#define MCR_DBG(fmt, args...) pr_debug(fmt, ##args)
+#else
+#define MCR_DBG(fmt, args...) do { } while (0)
+#endif
+
+#define MCR_PR_ERR pr_err
+#endif /* MSM_MERCURY_COMMON_H */
diff --git a/drivers/media/video/msm/mercury/msm_mercury_core.c b/drivers/media/video/msm/mercury/msm_mercury_core.c
new file mode 100644
index 0000000..a91c257
--- /dev/null
+++ b/drivers/media/video/msm/mercury/msm_mercury_core.c
@@ -0,0 +1,136 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <mach/clk.h>
+#include <mach/msm_bus.h>
+#include <mach/msm_bus_board.h>
+#include "msm_mercury_hw.h"
+#include "msm_mercury_core.h"
+#include "msm_mercury_platform.h"
+#include "msm_mercury_common.h"
+
+static int reset_done_ack;
+static spinlock_t reset_lock;
+static wait_queue_head_t reset_wait;
+
+int mercury_core_reset(void)
+{
+ struct clk *clk = NULL;
+
+ /*Resettting MMSS Fabric*/
+
+ clk = clk_get(NULL, "jpegd_clk");
+
+ if (!IS_ERR(clk))
+ clk_enable(clk);
+
+ msm_bus_axi_porthalt(MSM_BUS_MASTER_JPEG_DEC);
+ clk_reset(clk, CLK_RESET_ASSERT);
+
+ /*need to have some delay here, there is no
+ other way to know if hardware reset is complete*/
+ usleep_range(1000, 1200);
+
+ msm_bus_axi_portunhalt(MSM_BUS_MASTER_JPEG_DEC);
+ clk_reset(clk, CLK_RESET_DEASSERT);
+
+ return 0;
+}
+
+int msm_mercury_core_reset(void)
+{
+ unsigned long flags;
+ int rc = 0;
+ int tm = 500;/*500ms*/
+ MCR_DBG("\n%s\n(%d)%s()\n", __FILE__, __LINE__, __func__);
+
+ spin_lock_irqsave(&reset_lock, flags);
+ reset_done_ack = 0;
+ spin_unlock_irqrestore(&reset_lock, flags);
+
+ msm_mercury_hw_reset();
+ rc = wait_event_interruptible_timeout(reset_wait,
+ reset_done_ack,
+ msecs_to_jiffies(tm));
+
+ if (!reset_done_ack) {
+ MCR_DBG("%s: reset ACK failed %d", __func__, rc);
+ return -EBUSY;
+ }
+
+ MCR_DBG("(%d)%s() reset_done_ack rc %d\n\n", __LINE__, __func__, rc);
+ spin_lock_irqsave(&reset_lock, flags);
+ reset_done_ack = 0;
+ spin_unlock_irqrestore(&reset_lock, flags);
+
+ return 0;
+}
+
+void msm_mercury_core_init(void)
+{
+ init_waitqueue_head(&reset_wait);
+ spin_lock_init(&reset_lock);
+}
+
+static int (*msm_mercury_irq_handler) (int, void *, void *);
+
+irqreturn_t msm_mercury_core_irq(int irq_num, void *context)
+{
+ void *data = NULL;
+ unsigned long flags;
+ uint16_t mcr_rd_irq;
+ uint16_t mcr_wr_irq;
+ uint32_t jpeg_status;
+
+ MCR_DBG("\n(%d)%s() irq_number = %d", __LINE__, __func__, irq_num);
+
+ spin_lock_irqsave(&reset_lock, flags);
+ reset_done_ack = 1;
+ spin_unlock_irqrestore(&reset_lock, flags);
+
+ msm_mercury_hw_irq_get_status(&mcr_rd_irq, &mcr_wr_irq);
+ msm_mercury_hw_get_jpeg_status(&jpeg_status);
+ MCR_DBG("mercury_rd_irq = 0x%08X\n", mcr_rd_irq);
+ MCR_DBG("mercury_wr_irq = 0x%08X\n", mcr_wr_irq);
+ MCR_DBG("jpeg_status = 0x%08X\n", jpeg_status);
+ if (mcr_wr_irq & MSM_MERCURY_HW_IRQ_SW_RESET_ACK) {
+ MCR_DBG("*** SW Reset IRQ received ***\n");
+ wake_up(&reset_wait);
+ msm_mercury_hw_wr_irq_clear(MSM_MERCURY_HW_IRQ_SW_RESET_ACK);
+ }
+ if (mcr_wr_irq & MSM_MERCURY_HW_IRQ_WR_ERR_ACK) {
+ MCR_DBG(" *** Error IRQ received ***\n");
+ msm_mercury_irq_handler(MSM_MERCURY_HW_IRQ_WR_ERR_ACK,
+ context, data);
+ }
+ if (mcr_wr_irq & MSM_MERCURY_HW_IRQ_WR_EOI_ACK) {
+ MCR_DBG(" *** WE_EOI IRQ received ***\n");
+ msm_mercury_irq_handler(MSM_MERCURY_HW_IRQ_WR_EOI_ACK,
+ context, data);
+ }
+ return IRQ_HANDLED;
+}
+
+void msm_mercury_core_irq_install(int (*irq_handler) (int, void *, void *))
+{
+ msm_mercury_irq_handler = irq_handler;
+}
+
+void msm_mercury_core_irq_remove(void)
+{
+ msm_mercury_irq_handler = NULL;
+}
diff --git a/drivers/media/video/msm/mercury/msm_mercury_core.h b/drivers/media/video/msm/mercury/msm_mercury_core.h
new file mode 100644
index 0000000..e374cee
--- /dev/null
+++ b/drivers/media/video/msm/mercury/msm_mercury_core.h
@@ -0,0 +1,29 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef MSM_MERCURY_CORE_H
+#define MSM_MERCURY_CORE_H
+
+#include <linux/interrupt.h>
+#include "msm_mercury_hw.h"
+
+#define msm_mercury_core_buf msm_mercury_hw_buf
+
+irqreturn_t msm_mercury_core_irq(int irq_num, void *context);
+
+void msm_mercury_core_irq_install(int (*irq_handler) (int, void *, void *));
+void msm_mercury_core_irq_remove(void);
+
+int msm_mercury_core_reset(void);
+void msm_mercury_core_init(void);
+
+#endif /* MSM_MERCURY_CORE_H */
diff --git a/drivers/media/video/msm/mercury/msm_mercury_dev.c b/drivers/media/video/msm/mercury/msm_mercury_dev.c
new file mode 100644
index 0000000..df32b26
--- /dev/null
+++ b/drivers/media/video/msm/mercury/msm_mercury_dev.c
@@ -0,0 +1,256 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/fs.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/uaccess.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-subdev.h>
+#include <media/msm_mercury.h>
+#include <mach/board.h>
+#include "msm_mercury_sync.h"
+#include "msm_mercury_common.h"
+#include "msm.h"
+
+#define MSM_MERCURY_NAME "mercury"
+
+static int msm_mercury_open(struct inode *inode, struct file *filp)
+{
+ int rc;
+
+ struct msm_mercury_device *pmercury_dev = container_of(inode->i_cdev,
+ struct msm_mercury_device, cdev);
+ filp->private_data = pmercury_dev;
+
+ MCR_DBG("\n---(%d)%s()\n", __LINE__, __func__);
+
+ rc = __msm_mercury_open(pmercury_dev);
+
+ MCR_DBG("%s:%d] %s open_count = %d\n", __func__, __LINE__,
+ filp->f_path.dentry->d_name.name, pmercury_dev->open_count);
+
+ return rc;
+}
+
+static int msm_mercury_release(struct inode *inode, struct file *filp)
+{
+ int rc;
+
+ struct msm_mercury_device *pmercury_dev = filp->private_data;
+
+ MCR_DBG("\n---(%d)%s()\n", __LINE__, __func__);
+
+ rc = __msm_mercury_release(pmercury_dev);
+
+ MCR_DBG("%s:%d] %s open_count = %d\n", __func__, __LINE__,
+ filp->f_path.dentry->d_name.name, pmercury_dev->open_count);
+ return rc;
+}
+
+static long msm_mercury_ioctl(struct file *filp, unsigned int cmd,
+ unsigned long arg) {
+ int rc;
+ struct msm_mercury_device *pmercury_dev = filp->private_data;
+ rc = __msm_mercury_ioctl(pmercury_dev, cmd, arg);
+ return rc;
+}
+
+static const struct file_operations msm_mercury_fops = {
+ .owner = THIS_MODULE,
+ .open = msm_mercury_open,
+ .release = msm_mercury_release,
+ .unlocked_ioctl = msm_mercury_ioctl,
+};
+
+static struct class *msm_mercury_class;
+static dev_t msm_mercury_devno;
+static struct msm_mercury_device *msm_mercury_device_p;
+
+int msm_mercury_subdev_init(struct v4l2_subdev *mercury_sd)
+{
+ int rc;
+ struct msm_mercury_device *pgmn_dev =
+ (struct msm_mercury_device *)mercury_sd->host_priv;
+
+ MCR_DBG("%s:%d: mercury_sd=0x%x pgmn_dev=0x%x\n",
+ __func__, __LINE__, (uint32_t)mercury_sd, (uint32_t)pgmn_dev);
+ rc = __msm_mercury_open(pgmn_dev);
+ MCR_DBG("%s:%d: rc=%d\n",
+ __func__, __LINE__, rc);
+ return rc;
+}
+
+static long msm_mercury_subdev_ioctl(struct v4l2_subdev *sd,
+ unsigned int cmd, void *arg)
+{
+ long rc;
+ struct msm_mercury_device *pgmn_dev =
+ (struct msm_mercury_device *)sd->host_priv;
+
+ MCR_DBG("%s: cmd=%d\n", __func__, cmd);
+
+ MCR_DBG("%s: pgmn_dev 0x%x", __func__, (uint32_t)pgmn_dev);
+
+ MCR_DBG("%s: Calling __msm_mercury_ioctl\n", __func__);
+
+ rc = __msm_mercury_ioctl(pgmn_dev, cmd, (unsigned long)arg);
+ pr_debug("%s: X\n", __func__);
+ return rc;
+}
+
+void msm_mercury_subdev_release(struct v4l2_subdev *mercury_sd)
+{
+ int rc;
+ struct msm_mercury_device *pgmn_dev =
+ (struct msm_mercury_device *)mercury_sd->host_priv;
+ MCR_DBG("%s:pgmn_dev=0x%x", __func__, (uint32_t)pgmn_dev);
+ rc = __msm_mercury_release(pgmn_dev);
+ MCR_DBG("%s:rc=%d", __func__, rc);
+}
+
+static const struct v4l2_subdev_core_ops msm_mercury_subdev_core_ops = {
+ .ioctl = msm_mercury_subdev_ioctl,
+};
+
+static const struct v4l2_subdev_ops msm_mercury_subdev_ops = {
+ .core = &msm_mercury_subdev_core_ops,
+};
+
+static int msm_mercury_init(struct platform_device *pdev)
+{
+ int rc = -1;
+ struct device *dev;
+
+ MCR_DBG("%s:\n", __func__);
+ msm_mercury_device_p = __msm_mercury_init(pdev);
+ if (msm_mercury_device_p == NULL) {
+ MCR_PR_ERR("%s: initialization failed\n", __func__);
+ goto fail;
+ }
+
+ v4l2_subdev_init(&msm_mercury_device_p->subdev,
+ &msm_mercury_subdev_ops);
+ v4l2_set_subdev_hostdata(&msm_mercury_device_p->subdev,
+ msm_mercury_device_p);
+ pr_debug("%s: msm_mercury_device_p 0x%x", __func__,
+ (uint32_t)msm_mercury_device_p);
+ MCR_DBG("%s:mercury: platform_set_drvdata\n", __func__);
+ platform_set_drvdata(pdev, &msm_mercury_device_p->subdev);
+
+ rc = alloc_chrdev_region(&msm_mercury_devno, 0, 1, MSM_MERCURY_NAME);
+ if (rc < 0) {
+ MCR_PR_ERR("%s: failed to allocate chrdev\n", __func__);
+ goto fail_1;
+ }
+
+ if (!msm_mercury_class) {
+ msm_mercury_class = class_create(THIS_MODULE, MSM_MERCURY_NAME);
+ if (IS_ERR(msm_mercury_class)) {
+ rc = PTR_ERR(msm_mercury_class);
+ MCR_PR_ERR("%s: create device class failed\n",
+ __func__);
+ goto fail_2;
+ }
+ }
+
+ dev = device_create(msm_mercury_class, NULL,
+ MKDEV(MAJOR(msm_mercury_devno), MINOR(msm_mercury_devno)), NULL,
+ "%s%d", MSM_MERCURY_NAME, 0);
+
+ if (IS_ERR(dev)) {
+ MCR_PR_ERR("%s: error creating device\n", __func__);
+ rc = -ENODEV;
+ goto fail_3;
+ }
+
+ cdev_init(&msm_mercury_device_p->cdev, &msm_mercury_fops);
+ msm_mercury_device_p->cdev.owner = THIS_MODULE;
+ msm_mercury_device_p->cdev.ops =
+ (const struct file_operations *) &msm_mercury_fops;
+ rc = cdev_add(&msm_mercury_device_p->cdev, msm_mercury_devno, 1);
+ if (rc < 0) {
+ MCR_PR_ERR("%s: error adding cdev\n", __func__);
+ rc = -ENODEV;
+ goto fail_4;
+ }
+
+ MCR_DBG("%s %s: success\n", __func__, MSM_MERCURY_NAME);
+
+ return rc;
+
+fail_4:
+ device_destroy(msm_mercury_class, msm_mercury_devno);
+
+fail_3:
+ class_destroy(msm_mercury_class);
+
+fail_2:
+ unregister_chrdev_region(msm_mercury_devno, 1);
+
+fail_1:
+ __msm_mercury_exit(msm_mercury_device_p);
+
+fail:
+ return rc;
+}
+
+static void msm_mercury_exit(void)
+{
+ cdev_del(&msm_mercury_device_p->cdev);
+ device_destroy(msm_mercury_class, msm_mercury_devno);
+ class_destroy(msm_mercury_class);
+ unregister_chrdev_region(msm_mercury_devno, 1);
+
+ __msm_mercury_exit(msm_mercury_device_p);
+}
+
+static int __msm_mercury_probe(struct platform_device *pdev)
+{
+ return msm_mercury_init(pdev);
+}
+
+static int __msm_mercury_remove(struct platform_device *pdev)
+{
+ msm_mercury_exit();
+ return 0;
+}
+
+static struct platform_driver msm_mercury_driver = {
+ .probe = __msm_mercury_probe,
+ .remove = __msm_mercury_remove,
+ .driver = {
+ .name = MSM_MERCURY_DRV_NAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init msm_mercury_driver_init(void)
+{
+ int rc;
+ rc = platform_driver_register(&msm_mercury_driver);
+ return rc;
+}
+
+static void __exit msm_mercury_driver_exit(void)
+{
+ platform_driver_unregister(&msm_mercury_driver);
+}
+
+MODULE_DESCRIPTION("msm mercury jpeg driver");
+
+module_init(msm_mercury_driver_init);
+module_exit(msm_mercury_driver_exit);
diff --git a/drivers/media/video/msm/mercury/msm_mercury_hw.c b/drivers/media/video/msm/mercury/msm_mercury_hw.c
new file mode 100644
index 0000000..7bc4abe
--- /dev/null
+++ b/drivers/media/video/msm/mercury/msm_mercury_hw.c
@@ -0,0 +1,361 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include "msm_mercury_hw.h"
+#include "msm_mercury_common.h"
+#include "msm_mercury_hw_reg.h"
+#include "msm_mercury_macros.h"
+
+static void *mercury_region_base;
+static uint32_t mercury_region_size;
+
+
+void msm_mercury_hw_write(struct msm_mercury_hw_cmd *hw_cmd_p)
+{
+ uint32_t *paddr;
+ uint32_t old_data, new_data;
+
+ paddr = mercury_region_base + hw_cmd_p->offset;
+
+ if (hw_cmd_p->mask == 0xffffffff) {
+ old_data = 0;
+ } else {
+ old_data = readl_relaxed(paddr);
+ old_data &= ~hw_cmd_p->mask;
+ }
+
+ new_data = hw_cmd_p->data & hw_cmd_p->mask;
+ new_data |= old_data;
+ writel_relaxed(new_data, paddr);
+}
+
+uint32_t msm_mercury_hw_read(struct msm_mercury_hw_cmd *hw_cmd_p)
+{
+ uint32_t *paddr;
+ uint32_t data;
+
+ paddr = mercury_region_base + hw_cmd_p->offset;
+
+ data = readl_relaxed(paddr);
+ data &= hw_cmd_p->mask;
+
+ MCR_DBG("MERCURY_READ: offset=0x%04X data=0x%08X\n",
+ hw_cmd_p->offset, data);
+
+ return data;
+}
+
+void msm_mercury_hw_start_decode(void)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+
+ mercury_kread(JPEG_STATUS);
+ mercury_kread(RTDMA_JPEG_RD_STA_ACK);
+ mercury_kread(RTDMA_JPEG_WR_STA_ACK);
+ mercury_kread(RTDMA_JPEG_RD_BUF_Y_PNTR);
+ mercury_kread(RTDMA_JPEG_WR_BUF_Y_PNTR);
+ mercury_kread(RTDMA_JPEG_WR_BUF_U_PNTR);
+ mercury_kwrite(RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO, (7<<2));
+ return;
+}
+
+void msm_mercury_hw_bitstream_buf_cfg(uint32_t bitstream_buf_addr)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+
+ mercury_kwrite(RTDMA_JPEG_RD_BUF_Y_PNTR, bitstream_buf_addr);
+ return;
+}
+
+
+void msm_mercury_hw_output_y_buf_cfg(uint32_t y_buf_addr)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+
+ mercury_kwrite(RTDMA_JPEG_WR_BUF_Y_PNTR, y_buf_addr);
+ return;
+}
+
+void msm_mercury_hw_output_u_buf_cfg(uint32_t u_buf_addr)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+
+ mercury_kwrite(RTDMA_JPEG_WR_BUF_U_PNTR, u_buf_addr);
+ return;
+}
+
+void msm_mercury_hw_output_v_buf_cfg(uint32_t v_buf_addr)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+
+ mercury_kwrite(RTDMA_JPEG_WR_BUF_V_PNTR, v_buf_addr);
+ return;
+}
+
+int msm_mercury_hw_wait(struct msm_mercury_hw_cmd *hw_cmd_p, int m_us)
+{
+ int tm = hw_cmd_p->n;
+ uint32_t data;
+ uint32_t wait_data = hw_cmd_p->data & hw_cmd_p->mask;
+
+ data = msm_mercury_hw_read(hw_cmd_p);
+ if (data != wait_data) {
+ while (tm) {
+ udelay(m_us);
+ data = msm_mercury_hw_read(hw_cmd_p);
+ if (data == wait_data)
+ break;
+ tm--;
+ }
+ }
+ hw_cmd_p->data = data;
+ return tm;
+}
+
+void msm_mercury_hw_irq_get_status(uint16_t *rd_irq, uint16_t *wr_irq)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+ rmb();
+ mercury_kread(RTDMA_JPEG_RD_STA_ACK);
+ *rd_irq = hw_cmd.data;
+
+ mercury_kread(RTDMA_JPEG_WR_STA_ACK);
+ *wr_irq = hw_cmd.data;
+ rmb();
+}
+
+void msm_mercury_hw_get_jpeg_status(uint32_t *jpeg_status)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+
+ rmb();
+ mercury_kread(JPEG_STATUS);
+ *jpeg_status = hw_cmd.data;
+ rmb();
+}
+
+uint32_t msm_mercury_get_restartInterval(void)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+
+ rmb();
+ mercury_kread(JPEG_DRI);
+ rmb();
+ return hw_cmd.data;
+
+}
+
+void msm_mercury_hw_rd_irq_clear(uint32_t val)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+ mercury_kwrite(RTDMA_JPEG_RD_STA_ACK, val);
+}
+
+void msm_mercury_hw_wr_irq_clear(uint32_t val)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+
+ mercury_kwrite(RTDMA_JPEG_WR_STA_ACK, val);
+}
+
+void msm_mercury_hw_set_rd_irq_mask(uint32_t val)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+
+ mercury_kwrite(RTDMA_JPEG_RD_INT_EN, val);
+}
+
+void msm_mercury_hw_set_wr_irq_mask(uint32_t val)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+
+ mercury_kwrite(RTDMA_JPEG_WR_INT_EN, val);
+}
+
+void msm_mercury_set_jpeg_ctl_common(uint32_t val)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+
+ mercury_kwrite(JPEG_CTRL_COMMON, val);
+}
+
+void msm_mercury_hw_reset(void)
+{
+ uint32_t val;
+ struct msm_mercury_hw_cmd hw_cmd;
+
+ wmb();
+ /* disable all interrupts*/
+ mercury_kwrite(RTDMA_JPEG_RD_INT_EN, 0);
+
+ mercury_kwrite(RTDMA_JPEG_WR_INT_EN, 0);
+
+ /* clear pending interrupts*/
+ val = 0;
+ MEM_OUTF2(&val, RTDMA_JPEG_WR_STA_ACK,
+ SW_RESET_ABORT_RDY_ACK,
+ ERR_ACK, 1, 1);
+ MEM_OUTF2(&val, RTDMA_JPEG_WR_STA_ACK, EOF_ACK, SOF_ACK, 1, 1);
+ mercury_kwrite(RTDMA_JPEG_WR_STA_ACK, val);
+
+ val = 0;
+ MEM_OUTF2(&val, RTDMA_JPEG_RD_STA_ACK, EOF_ACK, SOF_ACK, 1, 1);
+ mercury_kwrite(RTDMA_JPEG_RD_STA_ACK, val);
+
+ /* enable SWResetAbortRdyInt for core reset*/
+ val = 0;
+ MEM_OUTF(&val, RTDMA_JPEG_WR_INT_EN, SW_RESET_ABORT_RDY_EN, 1);
+ mercury_kwrite(RTDMA_JPEG_WR_INT_EN, val);
+
+ /* Reset Core from MMSS Fabric*/
+ mercury_core_reset();
+
+ /* disable all interrupts*/
+ mercury_kwrite(RTDMA_JPEG_WR_INT_EN, 0);
+
+ /* clear pending interrupts*/
+ val = 0;
+ MEM_OUTF2(&val, RTDMA_JPEG_WR_STA_ACK,
+ SW_RESET_ABORT_RDY_ACK,
+ ERR_ACK, 1, 1);
+ MEM_OUTF2(&val, RTDMA_JPEG_WR_STA_ACK, EOF_ACK, SOF_ACK, 1, 1);
+ mercury_kwrite(RTDMA_JPEG_WR_STA_ACK, val);
+
+ val = 0;
+ MEM_OUTF2(&val, RTDMA_JPEG_RD_STA_ACK, EOF_ACK, SOF_ACK, 1, 1);
+ mercury_kwrite(RTDMA_JPEG_RD_STA_ACK, val);
+
+ /* enable neccessary interrupt source*/
+ val = 0;
+ MEM_OUTF2(&val, RTDMA_JPEG_WR_INT_EN, EOF_EN, ERR_EN, 1, 1);
+ MEM_OUTF(&val, RTDMA_JPEG_WR_INT_EN, SW_RESET_ABORT_RDY_EN, 1);
+ mercury_kwrite(RTDMA_JPEG_WR_INT_EN, val);
+
+ wmb();
+
+}
+
+void msm_mercury_hw_init(void *base, int size)
+{
+ mercury_region_base = base;
+ mercury_region_size = size;
+}
+
+
+void msm_mercury_hw_delay(struct msm_mercury_hw_cmd *hw_cmd_p, int m_us)
+{
+ int tm = hw_cmd_p->n;
+ while (tm) {
+ udelay(m_us);
+ tm--;
+ }
+}
+
+int msm_mercury_hw_exec_cmds(struct msm_mercury_hw_cmd *hw_cmd_p, int m_cmds)
+{
+ int is_copy_to_user = -1;
+ uint32_t data;
+ if (m_cmds > 1)
+ MCR_DBG("m_cmds = %d\n", m_cmds);
+
+ while (m_cmds--) {
+ if (hw_cmd_p->offset > mercury_region_size) {
+ MCR_PR_ERR("%s:%d] %d exceed hw region %d\n",
+ __func__, __LINE__, hw_cmd_p->offset,
+ mercury_region_size);
+ return -EFAULT;
+ }
+
+ switch (hw_cmd_p->type) {
+ case MSM_MERCURY_HW_CMD_TYPE_READ:
+ hw_cmd_p->data = msm_mercury_hw_read(hw_cmd_p);
+ is_copy_to_user = 1;
+ break;
+
+ case MSM_MERCURY_HW_CMD_TYPE_WRITE:
+ msm_mercury_hw_write(hw_cmd_p);
+ break;
+
+ case MSM_MERCURY_HW_CMD_TYPE_WRITE_OR:
+ data = msm_mercury_hw_read(hw_cmd_p);
+ hw_cmd_p->data = (hw_cmd_p->data & hw_cmd_p->mask) |
+ data;
+ msm_mercury_hw_write(hw_cmd_p);
+ break;
+
+ case MSM_MERCURY_HW_CMD_TYPE_UWAIT:
+ msm_mercury_hw_wait(hw_cmd_p, 1);
+ break;
+
+ case MSM_MERCURY_HW_CMD_TYPE_MWAIT:
+ msm_mercury_hw_wait(hw_cmd_p, 1000);
+ break;
+
+ case MSM_MERCURY_HW_CMD_TYPE_UDELAY:
+ msm_mercury_hw_delay(hw_cmd_p, 1);
+ break;
+
+ case MSM_MERCURY_HW_CMD_TYPE_MDELAY:
+ msm_mercury_hw_delay(hw_cmd_p, 1000);
+ break;
+
+ default:
+ MCR_DBG("wrong hw command type\n");
+ break;
+ }
+
+ hw_cmd_p++;
+ }
+ return is_copy_to_user;
+}
+
+void msm_mercury_hw_region_dump(int size)
+{
+ uint32_t *p;
+ uint8_t *p8;
+
+ MCR_DBG("(%d)%s()\n", __LINE__, __func__);
+ if (size > mercury_region_size)
+ MCR_DBG("%s:%d] wrong region dump size\n",
+ __func__, __LINE__);
+
+ p = (uint32_t *) mercury_region_base;
+ while (size >= 16) {
+ MCR_DBG("0x%08X] %08X %08X %08X %08X\n",
+ mercury_region_size - size,
+ readl_relaxed(p), readl_relaxed(p+1),
+ readl_relaxed(p+2), readl_relaxed(p+3));
+ p += 4;
+ size -= 16;
+ }
+
+ if (size > 0) {
+ uint32_t d;
+ MCR_DBG("0x%08X] ", mercury_region_size - size);
+ while (size >= 4) {
+ MCR_DBG("%08X ", readl_relaxed(p++));
+ size -= 4;
+ }
+
+ d = readl_relaxed(p);
+ p8 = (uint8_t *) &d;
+ while (size) {
+ MCR_DBG("%02X", *p8++);
+ size--;
+ }
+
+ MCR_DBG("\n");
+ }
+}
diff --git a/drivers/media/video/msm/mercury/msm_mercury_hw.h b/drivers/media/video/msm/mercury/msm_mercury_hw.h
new file mode 100644
index 0000000..f6e3e49
--- /dev/null
+++ b/drivers/media/video/msm/mercury/msm_mercury_hw.h
@@ -0,0 +1,70 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef MSM_MERCURY_HW_H
+#define MSM_MERCURY_HW_H
+
+#include <media/msm_mercury.h>
+
+/*number of pel per block (horiz/vert)*/
+#define JPEGDEC_BLOCK_SIZE (8)
+/* Hardware alignment*/
+#define JPEGDEC_HW_ALIGN (8)
+#define JPEGDEC_HW_SAMPLING_RATIO_MAX (4)
+
+#define MSM_MERCURY_HW_IRQ_SW_RESET_ACK (1<<3)
+#define MSM_MERCURY_HW_IRQ_WR_ERR_ACK (1<<2)
+#define MSM_MERCURY_HW_IRQ_WR_EOI_ACK (1<<1)
+#define MSM_MERCURY_HW_IRQ_WR_SOF_ACK (1<<0)
+
+#define MSM_MERCURY_HW_IRQ_RD_EOF_ACK (1<<1)
+#define MSM_MERCURY_HW_IRQ_RD_SOF_ACK (1<<0)
+
+extern int mercury_core_reset(void);
+
+struct msm_mercury_hw_buf {
+ struct msm_mercury_buf vbuf;
+ struct file *file;
+ uint32_t framedone_len;
+ uint32_t y_buffer_addr;
+ uint32_t y_len;
+ uint32_t cbcr_buffer_addr;
+ uint32_t cbcr_len;
+ uint32_t num_of_mcu_rows;
+ struct msm_mapped_buffer *msm_buffer;
+ int *subsystem_id;
+ struct ion_handle *handle;
+};
+
+
+void msm_mercury_hw_reset(void);
+void msm_mercury_hw_init(void *base, int size);
+void msm_mercury_hw_rd_irq_clear(uint32_t val);
+void msm_mercury_hw_wr_irq_clear(uint32_t val);
+
+uint32_t msm_mercury_hw_read(struct msm_mercury_hw_cmd *hw_cmd_p);
+void msm_mercury_hw_write(struct msm_mercury_hw_cmd *hw_cmd_p);
+int msm_mercury_hw_wait(struct msm_mercury_hw_cmd *hw_cmd_p, int m_us);
+void msm_mercury_hw_delay(struct msm_mercury_hw_cmd *hw_cmd_p, int m_us);
+int msm_mercury_hw_exec_cmds(struct msm_mercury_hw_cmd *hw_cmd_p, int m_cmds);
+void msm_mercury_hw_region_dump(int size);
+
+
+void msm_mercury_hw_irq_get_status(uint16_t *rd_irq, uint16_t *wr_irq);
+void msm_mercury_hw_start_decode(void);
+void msm_mercury_hw_get_jpeg_status(uint32_t *jpeg_status);
+void msm_mercury_hw_output_y_buf_cfg(uint32_t y_buf_addr);
+void msm_mercury_hw_output_u_buf_cfg(uint32_t u_buf_addr);
+void msm_mercury_hw_output_v_buf_cfg(uint32_t v_buf_addr);
+void msm_mercury_hw_bitstream_buf_cfg(uint32_t bitstream_buf_addr);
+
+#endif /* MSM_MERCURY_HW_H */
diff --git a/drivers/media/video/msm/mercury/msm_mercury_hw_reg.h b/drivers/media/video/msm/mercury/msm_mercury_hw_reg.h
new file mode 100644
index 0000000..671bc66
--- /dev/null
+++ b/drivers/media/video/msm/mercury/msm_mercury_hw_reg.h
@@ -0,0 +1,715 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef MSM_MERCURY_HW_REG_H
+#define MSM_MERCURY_HW_REG_H
+
+
+#define JPEGD_BASE 0x00000000
+
+/* Register ADDR, RMSK, and SHFT*/
+/* RW */
+#define JPEG_CTRL_COMMON JPEG_CTRL_COMMON
+#define HWIO_JPEG_CTRL_COMMON_ADDR (JPEGD_BASE+0x00000000)
+#define HWIO_JPEG_CTRL_COMMON__POR 0x00000000
+#define HWIO_JPEG_CTRL_COMMON__RMSK 0x0000001F
+#define HWIO_JPEG_CTRL_COMMON__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_CTRL_COMMON__JPEG_CTRL_COMMON_ZZ_OVERRIDE_EN__BMSK 0x00000010
+#define HWIO_JPEG_CTRL_COMMON__JPEG_CTRL_COMMON_ZZ_OVERRIDE_EN__SHFT 4
+#define HWIO_JPEG_CTRL_COMMON__JPEG_CTRL_COMMON_MODE__BMSK 0x0000000F
+#define HWIO_JPEG_CTRL_COMMON__JPEG_CTRL_COMMON_MODE__SHFT 0
+
+/* Register Field FMSK and SHFT*/
+/* RW */
+#define JPEG_CTRL_ENCODE JPEG_CTRL_ENCODE
+#define HWIO_JPEG_CTRL_ENCODE_ADDR (JPEGD_BASE+0x00000008)
+#define HWIO_JPEG_CTRL_ENCODE__POR 0x00000000
+#define HWIO_JPEG_CTRL_ENCODE__RMSK 0x00000010
+#define HWIO_JPEG_CTRL_ENCODE__SHFT 4
+/* Register Element MIN and MAX*/
+#define HWIO_JPEG_CTRL_ENCODE___S 4
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_CTRL_ENCODE__JPEG_CTRL_ENCODE_EOI_MARKER_EN__BMSK 0x00000010
+#define HWIO_JPEG_CTRL_ENCODE__JPEG_CTRL_ENCODE_EOI_MARKER_EN__SHFT 4
+
+/* Register Field FMSK and SHFT*/
+#define JPEG_STATUS JPEG_STATUS
+#define HWIO_JPEG_STATUS_ADDR (JPEGD_BASE+0x00000010)
+#define HWIO_JPEG_STATUS__POR 0x00000000
+#define HWIO_JPEG_STATUS__RMSK 0x00003FF0
+#define HWIO_JPEG_STATUS__SHFT 4
+/* Register Element MIN and MAX*/
+#define HWIO_JPEG_STATUS___S 4
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_STATUS__JPEG_STATUS_REGISTER_TIMEOUT__BMSK 0x00002000
+#define HWIO_JPEG_STATUS__JPEG_STATUS_REGISTER_TIMEOUT__SHFT 13
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_EOI__BMSK 0x00001000
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_EOI__SHFT 12
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_UNESCAPED_FF__BMSK 0x00000800
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_UNESCAPED_FF__SHFT 11
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_INV_HUFFCODE__BMSK 0x00000400
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_INV_HUFFCODE__SHFT 10
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_INV_MARKER__BMSK 0x00000200
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_INV_MARKER__SHFT 9
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_RSTRT_SEQ__BMSK 0x00000100
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_RSTRT_SEQ__SHFT 8
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_RSTRT_OVRFLW__BMSK 0x00000080
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_RSTRT_OVRFLW__SHFT 7
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_RSTRT_UNDFLW__BMSK 0x00000040
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_RSTRT_UNDFLW__SHFT 6
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_SCAN_OVRFLW__BMSK 0x00000020
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_SCAN_OVRFLW__SHFT 5
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_SCAN_UNDFLW__BMSK 0x00000010
+#define HWIO_JPEG_STATUS__JPEG_STATUS_DHDQ_ERR_SCAN_UNDFLW__SHFT 4
+
+/* Register ADDR, RMSK, and SHFT*/
+/* R */
+#define JPEG_SOF_REG_0 JPEG_SOF_REG_0
+#define HWIO_JPEG_SOF_REG_0_ADDR /* RW */ (JPEGD_BASE+0x00000014)
+#define HWIO_JPEG_SOF_REG_0__POR 0x00000000
+#define HWIO_JPEG_SOF_REG_0__RMSK 0x000000FF
+#define HWIO_JPEG_SOF_REG_0__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_SOF_REG_0__JPEG_SOF_REG_0_NF__BMSK 0x000000FF
+#define HWIO_JPEG_SOF_REG_0__JPEG_SOF_REG_0_NF__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_SOF_REG_1 JPEG_SOF_REG_1
+#define HWIO_JPEG_SOF_REG_1_ADDR /* RW */ (JPEGD_BASE+0x00000018)
+#define HWIO_JPEG_SOF_REG_1__POR 0x00000000
+#define HWIO_JPEG_SOF_REG_1__RMSK 0x00FFFFFF
+#define HWIO_JPEG_SOF_REG_1__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_SOF_REG_1__JPEG_SOF_REG_1_C__BMSK 0x00FF0000
+#define HWIO_JPEG_SOF_REG_1__JPEG_SOF_REG_1_C__SHFT 16
+#define HWIO_JPEG_SOF_REG_1__JPEG_SOF_REG_1_H__BMSK 0x0000F000
+#define HWIO_JPEG_SOF_REG_1__JPEG_SOF_REG_1_H__SHFT 12
+#define HWIO_JPEG_SOF_REG_1__JPEG_SOF_REG_1_V__BMSK 0x00000F00
+#define HWIO_JPEG_SOF_REG_1__JPEG_SOF_REG_1_V__SHFT 8
+#define HWIO_JPEG_SOF_REG_1__JPEG_SOF_REG_1_TQ__BMSK 0x000000FF
+#define HWIO_JPEG_SOF_REG_1__JPEG_SOF_REG_1_TQ__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_SOF_REG_2 JPEG_SOF_REG_2
+#define HWIO_JPEG_SOF_REG_2_ADDR /* RW */ (JPEGD_BASE+0x0000001C)
+#define HWIO_JPEG_SOF_REG_2__POR 0x00000000
+#define HWIO_JPEG_SOF_REG_2__RMSK 0xFFFFFFFF
+#define HWIO_JPEG_SOF_REG_2__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_SOF_REG_2__JPEG_SOF_REG_2_Y__BMSK 0xFFFF0000
+#define HWIO_JPEG_SOF_REG_2__JPEG_SOF_REG_2_Y__SHFT 16
+#define HWIO_JPEG_SOF_REG_2__JPEG_SOF_REG_2_X__BMSK 0x0000FFFF
+#define HWIO_JPEG_SOF_REG_2__JPEG_SOF_REG_2_X__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_SOS_REG_0 JPEG_SOS_REG_0
+#define HWIO_JPEG_SOS_REG_0_ADDR /* RW */ (JPEGD_BASE+0x00000020)
+#define HWIO_JPEG_SOS_REG_0__POR 0x00000000
+#define HWIO_JPEG_SOS_REG_0__RMSK 0xFF000000
+#define HWIO_JPEG_SOS_REG_0__SHFT 24
+/*Register Element MIN and MAX*/
+#define HWIO_JPEG_SOS_REG_0___S 24
+#define HWIO_JPEG_SOS_REG_0___S 24
+#define HWIO_JPEG_SOS_REG_0___S 24
+#define HWIO_JPEG_SOS_REG_0___S 24
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_SOS_REG_0__JPEG_SOS_REG_0_NS__BMSK 0xFF000000
+#define HWIO_JPEG_SOS_REG_0__JPEG_SOS_REG_0_NS__SHFT 24
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_SOS_REG_1 JPEG_SOS_REG_1
+#define HWIO_JPEG_SOS_REG_1_ADDR /* RW */ (JPEGD_BASE+0x00000024)
+#define HWIO_JPEG_SOS_REG_1__POR 0x00000000
+#define HWIO_JPEG_SOS_REG_1__RMSK 0x0000FFFF
+#define HWIO_JPEG_SOS_REG_1__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_SOS_REG_1__JPEG_SOS_REG_1_CS__BMSK 0x0000FF00
+#define HWIO_JPEG_SOS_REG_1__JPEG_SOS_REG_1_CS__SHFT 8
+#define HWIO_JPEG_SOS_REG_1__JPEG_SOS_REG_1_TD__BMSK 0x000000F0
+#define HWIO_JPEG_SOS_REG_1__JPEG_SOS_REG_1_TD__SHFT 4
+#define HWIO_JPEG_SOS_REG_1__JPEG_SOS_REG_1_TA__BMSK 0x0000000F
+#define HWIO_JPEG_SOS_REG_1__JPEG_SOS_REG_1_TA__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_QT_IDX JPEG_QT_IDX
+#define HWIO_JPEG_QT_IDX_ADDR (JPEGD_BASE+0x00000030)
+#define HWIO_JPEG_QT_IDX__POR 0x00000000
+#define HWIO_JPEG_QT_IDX__RMSK 0x0000FFFF
+#define HWIO_JPEG_QT_IDX__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_QT_IDX__JPEG_QT_IDX_TABLE_1__BMSK 0x0000FF00
+#define HWIO_JPEG_QT_IDX__JPEG_QT_IDX_TABLE_1__SHFT 8
+#define HWIO_JPEG_QT_IDX__JPEG_QT_IDX_TABLE_0__BMSK 0x000000FF
+#define HWIO_JPEG_QT_IDX__JPEG_QT_IDX_TABLE_0__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_DQT JPEG_DQT
+#define HWIO_JPEG_DQT_ADDR /* RW */ (JPEGD_BASE+0x00000034)
+#define HWIO_JPEG_DQT__POR 0x00000000
+#define HWIO_JPEG_DQT__RMSK 0x0F00FFFF
+#define HWIO_JPEG_DQT__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_DQT__JPEG_DQT_TQ__BMSK 0x0F000000
+#define HWIO_JPEG_DQT__JPEG_DQT_TQ__SHFT 24
+#define HWIO_JPEG_DQT__JPEG_DQT_QK__BMSK 0x0000FFFF
+#define HWIO_JPEG_DQT__JPEG_DQT_QK__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_DRI JPEG_DRI
+#define HWIO_JPEG_DRI_ADDR /* RW */ (JPEGD_BASE+0x00000040)
+#define HWIO_JPEG_DRI__POR 0x00000000
+#define HWIO_JPEG_DRI__RMSK 0x0000FFFF
+#define HWIO_JPEG_DRI__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_DRI__JPEG_DRI_RI__BMSK 0x0000FFFF
+#define HWIO_JPEG_DRI__JPEG_DRI_RI__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_DHT_REG_0 JPEG_DHT_REG_0
+#define HWIO_JPEG_DHT_REG_0_ADDR /* RW */ (JPEGD_BASE+0x00000050)
+#define HWIO_JPEG_DHT_REG_0__POR 0x00000000
+#define HWIO_JPEG_DHT_REG_0__RMSK 0x000000FF
+#define HWIO_JPEG_DHT_REG_0__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_DHT_REG_0__JPEG_DHT_REG_0_TH__BMSK 0x000000F0
+#define HWIO_JPEG_DHT_REG_0__JPEG_DHT_REG_0_TH__SHFT 4
+#define HWIO_JPEG_DHT_REG_0__JPEG_DHT_REG_0_TC__BMSK 0x0000000F
+#define HWIO_JPEG_DHT_REG_0__JPEG_DHT_REG_0_TC__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_DHT_IDX JPEG_DHT_IDX
+#define HWIO_JPEG_DHT_IDX_ADDR /* RW */ (JPEGD_BASE+0x00000054)
+#define HWIO_JPEG_DHT_IDX__POR 0x00000000
+#define HWIO_JPEG_DHT_IDX__RMSK 0x00000FFF
+#define HWIO_JPEG_DHT_IDX__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_DHT_IDX__JPEG_DHT_IDX_CCC_MAX__BMSK 0x00000F00
+#define HWIO_JPEG_DHT_IDX__JPEG_DHT_IDX_CCC_MAX__SHFT 8
+#define HWIO_JPEG_DHT_IDX__JPEG_DHT_IDX_VIJ__BMSK 0x000000FF
+#define HWIO_JPEG_DHT_IDX__JPEG_DHT_IDX_VIJ__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_DHT_REG_1 JPEG_DHT_REG_1
+#define HWIO_JPEG_DHT_REG_1_ADDR /* RW */ (JPEGD_BASE+0x00000058)
+#define HWIO_JPEG_DHT_REG_1__POR 0x00000000
+#define HWIO_JPEG_DHT_REG_1__RMSK 0xFFFFFFFF
+#define HWIO_JPEG_DHT_REG_1__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_DHT_REG_1__JPEG_DHT_REG_1_VIJ_0__BMSK 0xFF000000
+#define HWIO_JPEG_DHT_REG_1__JPEG_DHT_REG_1_VIJ_0__SHFT 24
+#define HWIO_JPEG_DHT_REG_1__JPEG_DHT_REG_1_VIJ_1__BMSK 0x00FF0000
+#define HWIO_JPEG_DHT_REG_1__JPEG_DHT_REG_1_VIJ_1__SHFT 16
+#define HWIO_JPEG_DHT_REG_1__JPEG_DHT_REG_1_VIJ_2__BMSK 0x0000FF00
+#define HWIO_JPEG_DHT_REG_1__JPEG_DHT_REG_1_VIJ_2__SHFT 8
+#define HWIO_JPEG_DHT_REG_1__JPEG_DHT_REG_1_VIJ_3__BMSK 0x000000FF
+#define HWIO_JPEG_DHT_REG_1__JPEG_DHT_REG_1_VIJ_3__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_DHT_CCC_MAX JPEG_DHT_CCC_MAX
+#define HWIO_JPEG_DHT_CCC_MAX_ADDR /* RW */ (JPEGD_BASE+0x0000005C)
+#define HWIO_JPEG_DHT_CCC_MAX__POR 0x00000000
+#define HWIO_JPEG_DHT_CCC_MAX__RMSK 0xFFFFFFFF
+#define HWIO_JPEG_DHT_CCC_MAX__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_DHT_CCC_MAX__JPEG_DHT_CCC_MAX_MAX__BMSK 0xFFFF0000
+#define HWIO_JPEG_DHT_CCC_MAX__JPEG_DHT_CCC_MAX_MAX__SHFT 16
+#define HWIO_JPEG_DHT_CCC_MAX__JPEG_DHT_CCC_MAX_CCC__BMSK 0x0000FFFF
+#define HWIO_JPEG_DHT_CCC_MAX__JPEG_DHT_CCC_MAX_CCC__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_DHT_CCC_MAX__JPEG_DHT_CCC_MAX_MAX__BMSK 0xFFFF0000
+#define HWIO_JPEG_DHT_CCC_MAX__JPEG_DHT_CCC_MAX_MAX__SHFT 16
+#define HWIO_JPEG_DHT_CCC_MAX__JPEG_DHT_CCC_MAX_CCC__BMSK 0x0000FFFF
+#define HWIO_JPEG_DHT_CCC_MAX__JPEG_DHT_CCC_MAX_CCC__SHFT 0
+#define HWIO_JPEG_DHT_CCC_MAX__JPEG_DHT_LI__BMSK 0x000000FF
+#define HWIO_JPEG_DHT_CCC_MAX__JPEG_DHT_LI__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_DEC_SCALE JPEG_DEC_SCALE
+#define HWIO_JPEG_DEC_SCALE_ADDR /* RW */ (JPEGD_BASE+0x00000060)
+#define HWIO_JPEG_DEC_SCALE__POR 0x00000000
+#define HWIO_JPEG_DEC_SCALE__RMSK 0x00000003
+#define HWIO_JPEG_DEC_SCALE__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_DEC_SCALE__JPEG_DEC_SCALE_RATIO__BMSK 0x00000003
+#define HWIO_JPEG_DEC_SCALE__JPEG_DEC_SCALE_RATIO__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_CONVERT JPEG_CONVERT
+#define HWIO_JPEG_CONVERT_ADDR /* RW */ (JPEGD_BASE+0x00000064)
+#define HWIO_JPEG_CONVERT__POR 0x00000000
+#define HWIO_JPEG_CONVERT__RMSK 0xFFFF13FF
+#define HWIO_JPEG_CONVERT__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_MONO_CB_VALUE__BMSK 0xFF000000
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_MONO_CB_VALUE__SHFT 24
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_MONO_CR_VALUE__BMSK 0x00FF0000
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_MONO_CR_VALUE__SHFT 16
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_CLAMP_EN__BMSK 0x00001000
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_CLAMP_EN__SHFT 12
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_CBCR_SWITCH__BMSK 0x00000200
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_CBCR_SWITCH__SHFT 9
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_MONOCHROME_EN__BMSK 0x00000100
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_MONOCHROME_EN__SHFT 8
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_MEM_ORG__BMSK 0x000000C0
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_MEM_ORG__SHFT 6
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_422_MCU_TYPE__BMSK 0x00000030
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_422_MCU_TYPE__SHFT 4
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_OUTPUT_FORMAT__BMSK 0x0000000C
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_OUTPUT_FORMAT__SHFT 2
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_INPUT_FORMAT__BMSK 0x00000003
+#define HWIO_JPEG_CONVERT__JPEG_CONVERT_INPUT_FORMAT__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_ENC_BYTE_CNT JPEG_ENC_BYTE_CNT
+#define HWIO_JPEG_ENC_BYTE_CNT_ADDR /* RW */ (JPEGD_BASE+0x00000070)
+#define HWIO_JPEG_ENC_BYTE_CNT__POR 0x00000000
+#define HWIO_JPEG_ENC_BYTE_CNT__RMSK 0xFFFFFFFF
+#define HWIO_JPEG_ENC_BYTE_CNT__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_ENC_BYTE_CNT__JPEG_ENC_BYTE_CNT_TOT__BMSK 0xFFFFFFFF
+#define HWIO_JPEG_ENC_BYTE_CNT__JPEG_ENC_BYTE_CNT_TOT__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_DEBUG JPEG_DEBUG
+#define HWIO_JPEG_DEBUG_ADDR /* RW */ (JPEGD_BASE+0x00000080)
+#define HWIO_JPEG_DEBUG__POR 0x4A504547
+#define HWIO_JPEG_DEBUG__RMSK 0xFFFFFFFF
+#define HWIO_JPEG_DEBUG__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_DEBUG__JPEG_DEBUG__BMSK 0xFFFFFFFF
+#define HWIO_JPEG_DEBUG__JPEG_DEBUG__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_SPARE JPEG_SPARE
+#define HWIO_JPEG_SPARE_ADDR /* RW */ (JPEGD_BASE+0x00000084)
+#define HWIO_JPEG_SPARE__POR 0x00000000
+#define HWIO_JPEG_SPARE__RMSK 0xFFFFFFFF
+#define HWIO_JPEG_SPARE__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_SPARE__JPEG_SPARE_00__BMSK 0xFFFFFFFF
+#define HWIO_JPEG_SPARE__JPEG_SPARE_00__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEG_REGISTER_TIMEOUT JPEG_REGISTER_TIMEOUT
+#define HWIO_JPEG_REGISTER_TIMEOUT_ADDR (JPEGD_BASE+0x00000088)
+#define HWIO_JPEG_REGISTER_TIMEOUT__POR 0x0000FFFF
+#define HWIO_JPEG_REGISTER_TIMEOUT__RMSK 0x0000FFFF
+#define HWIO_JPEG_REGISTER_TIMEOUT__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEG_REGISTER_TIMEOUT__JPEG_TIMEOUT_VALUE__BMSK 0x0000FFFF
+#define HWIO_JPEG_REGISTER_TIMEOUT__JPEG_TIMEOUT_VALUE__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEGD_STATUS_BUS_DATA JPEGD_STATUS_BUS_DATA
+#define HWIO_JPEGD_STATUS_BUS_DATA_ADDR /* RW */ (JPEGD_BASE+0x00000258)
+#define HWIO_JPEGD_STATUS_BUS_DATA__POR 0x00000000
+#define HWIO_JPEGD_STATUS_BUS_DATA__RMSK 0xFFFFFFFF
+#define HWIO_JPEGD_STATUS_BUS_DATA__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEGD_STATUS_BUS_DATA__STATUS_BUS_DATA__BMSK 0xFFFFFFFF
+#define HWIO_JPEGD_STATUS_BUS_DATA__STATUS_BUS_DATA__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEGD_STATUS_BUS_CONFIG JPEGD_STATUS_BUS_CONFIG
+#define HWIO_JPEGD_STATUS_BUS_CONFIG_ADDR /* RW */ (JPEGD_BASE+0x0000025C)
+#define HWIO_JPEGD_STATUS_BUS_CONFIG__POR 0x00000000
+#define HWIO_JPEGD_STATUS_BUS_CONFIG__RMSK 0x0000001F
+#define HWIO_JPEGD_STATUS_BUS_CONFIG__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEGD_STATUS_BUS_CONFIG__STATUS_BUS_SEL__BMSK 0x0000001F
+#define HWIO_JPEGD_STATUS_BUS_CONFIG__STATUS_BUS_SEL__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_AXI_CONFIG RTDMA_JPEG_AXI_CONFIG
+#define HWIO_RTDMA_JPEG_AXI_CONFIG_ADDR /* RW */ (JPEGD_BASE+0x00000260)
+#define HWIO_RTDMA_JPEG_AXI_CONFIG__POR 0x00000024
+#define HWIO_RTDMA_JPEG_AXI_CONFIG__RMSK 0x00000FFF
+#define HWIO_RTDMA_JPEG_AXI_CONFIG__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_AXI_CONFIG__OUT_OF_ORDER_WR__BMSK 0x00000800
+#define HWIO_RTDMA_JPEG_AXI_CONFIG__OUT_OF_ORDER_WR__SHFT 11
+#define HWIO_RTDMA_JPEG_AXI_CONFIG__OUT_OF_ORDER_RD__BMSK 0x00000400
+#define HWIO_RTDMA_JPEG_AXI_CONFIG__OUT_OF_ORDER_RD__SHFT 10
+#define HWIO_RTDMA_JPEG_AXI_CONFIG__BOUND_LIMIT__BMSK 0x00000300
+#define HWIO_RTDMA_JPEG_AXI_CONFIG__BOUND_LIMIT__SHFT 8
+#define HWIO_RTDMA_JPEG_AXI_CONFIG__PACK_TIMEOUT__BMSK 0x000000F0
+#define HWIO_RTDMA_JPEG_AXI_CONFIG__PACK_TIMEOUT__SHFT 4
+#define HWIO_RTDMA_JPEG_AXI_CONFIG__PACK_MAX_BLEN__BMSK 0x0000000F
+#define HWIO_RTDMA_JPEG_AXI_CONFIG__PACK_MAX_BLEN__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define JPEGD_CLK_CONTROL JPEGD_CLK_CONTROL
+#define HWIO_JPEGD_CLK_CONTROL_ADDR /* RW */ (JPEGD_BASE+0x00000264)
+#define HWIO_JPEGD_CLK_CONTROL__POR 0x00000005
+#define HWIO_JPEGD_CLK_CONTROL__RMSK 0x0000000F
+#define HWIO_JPEGD_CLK_CONTROL__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_JPEGD_CLK_CONTROL__JPEG_CLKIDLE__BMSK 0x00000008
+#define HWIO_JPEGD_CLK_CONTROL__JPEG_CLKIDLE__SHFT 3
+#define HWIO_JPEGD_CLK_CONTROL__JPEG_CLKON__BMSK 0x00000004
+#define HWIO_JPEGD_CLK_CONTROL__JPEG_CLKON__SHFT 2
+#define HWIO_JPEGD_CLK_CONTROL__AXI_CLKIDLE__BMSK 0x00000002
+#define HWIO_JPEGD_CLK_CONTROL__AXI_CLKIDLE__SHFT 1
+#define HWIO_JPEGD_CLK_CONTROL__AXI_CLKON__BMSK 0x00000001
+#define HWIO_JPEGD_CLK_CONTROL__AXI_CLKON__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_WR_BUF_CONFIG RTDMA_JPEG_WR_BUF_CONFIG
+#define HWIO_RTDMA_JPEG_WR_BUF_CONFIG_ADDR /* RW */ (JPEGD_BASE+0x00000200)
+#define HWIO_RTDMA_JPEG_WR_BUF_CONFIG__POR 0x00000000
+#define HWIO_RTDMA_JPEG_WR_BUF_CONFIG__RMSK 0x0000001F
+#define HWIO_RTDMA_JPEG_WR_BUF_CONFIG__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_WR_BUF_CONFIG__BUF_FORMAT__BMSK 0x0000001C
+#define HWIO_RTDMA_JPEG_WR_BUF_CONFIG__BUF_FORMAT__SHFT 2
+#define HWIO_RTDMA_JPEG_WR_BUF_CONFIG__NUM_OF_PLANES__BMSK 0x00000003
+#define HWIO_RTDMA_JPEG_WR_BUF_CONFIG__NUM_OF_PLANES__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_WR_OP RTDMA_JPEG_WR_OP
+#define HWIO_RTDMA_JPEG_WR_OP_ADDR /* RW */ (JPEGD_BASE+0x00000204)
+#define HWIO_RTDMA_JPEG_WR_OP__POR 0x00000000
+#define HWIO_RTDMA_JPEG_WR_OP__RMSK 0x00000013
+#define HWIO_RTDMA_JPEG_WR_OP__SHFT 0
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_WR_OP__ALIGN__BMSK 0x00000010
+#define HWIO_RTDMA_JPEG_WR_OP__ALIGN__SHFT 4
+#define HWIO_RTDMA_JPEG_WR_OP__FLIP__BMSK 0x00000002
+#define HWIO_RTDMA_JPEG_WR_OP__FLIP__SHFT 1
+#define HWIO_RTDMA_JPEG_WR_OP__MIRROR__BMSK 0x00000001
+#define HWIO_RTDMA_JPEG_WR_OP__MIRROR__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_WR_BUF_Y_PNTR RTDMA_JPEG_WR_BUF_Y_PNTR
+#define HWIO_RTDMA_JPEG_WR_BUF_Y_PNTR_ADDR (JPEGD_BASE+0x00000208)
+#define HWIO_RTDMA_JPEG_WR_BUF_Y_PNTR__POR 0x00000000
+#define HWIO_RTDMA_JPEG_WR_BUF_Y_PNTR__RMSK 0xFFFFFFF8
+#define HWIO_RTDMA_JPEG_WR_BUF_Y_PNTR__SHFT 3
+/* Register Element MIN and MAX*/
+#define HWIO_RTDMA_JPEG_WR_BUF_Y_PNTR___S 3
+#define HWIO_RTDMA_JPEG_WR_BUF_Y_PNTR___S 3
+#define HWIO_RTDMA_JPEG_WR_BUF_Y_PNTR___S 3
+#define HWIO_RTDMA_JPEG_WR_BUF_Y_PNTR___S 3
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_WR_BUF_Y_PNTR__PNTR__BMSK 0xFFFFFFF8
+#define HWIO_RTDMA_JPEG_WR_BUF_Y_PNTR__PNTR__SHFT 3
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_WR_BUF_U_PNTR RTDMA_JPEG_WR_BUF_U_PNTR
+#define HWIO_RTDMA_JPEG_WR_BUF_U_PNTR_ADDR /* RW */ (JPEGD_BASE+0x0000020C)
+#define HWIO_RTDMA_JPEG_WR_BUF_U_PNTR__POR 0x00000000
+#define HWIO_RTDMA_JPEG_WR_BUF_U_PNTR__RMSK 0xFFFFFFF8
+#define HWIO_RTDMA_JPEG_WR_BUF_U_PNTR__SHFT 3
+
+/* Register Element MIN and MAX*/
+#define HWIO_RTDMA_JPEG_WR_BUF_U_PNTR___S 3
+#define HWIO_RTDMA_JPEG_WR_BUF_U_PNTR___S 3
+#define HWIO_RTDMA_JPEG_WR_BUF_U_PNTR___S 3
+#define HWIO_RTDMA_JPEG_WR_BUF_U_PNTR___S 3
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_WR_BUF_U_PNTR__PNTR__BMSK 0xFFFFFFF8
+#define HWIO_RTDMA_JPEG_WR_BUF_U_PNTR__PNTR__SHFT 3
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_WR_BUF_V_PNTR RTDMA_JPEG_WR_BUF_V_PNTR
+#define HWIO_RTDMA_JPEG_WR_BUF_V_PNTR_ADDR (JPEGD_BASE+0x00000210)
+#define HWIO_RTDMA_JPEG_WR_BUF_V_PNTR__POR 0x00000000
+#define HWIO_RTDMA_JPEG_WR_BUF_V_PNTR__RMSK 0xFFFFFFF8
+#define HWIO_RTDMA_JPEG_WR_BUF_V_PNTR__SHFT 3
+
+/* Register Element MIN and MAX*/
+#define HWIO_RTDMA_JPEG_WR_BUF_V_PNTR___S 3
+#define HWIO_RTDMA_JPEG_WR_BUF_V_PNTR___S 3
+#define HWIO_RTDMA_JPEG_WR_BUF_V_PNTR___S 3
+#define HWIO_RTDMA_JPEG_WR_BUF_V_PNTR___S 3
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_WR_BUF_V_PNTR__PNTR__BMSK 0xFFFFFFF8
+#define HWIO_RTDMA_JPEG_WR_BUF_V_PNTR__PNTR__SHFT 3
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_WR_BUF_PITCH RTDMA_JPEG_WR_BUF_PITCH
+#define HWIO_RTDMA_JPEG_WR_BUF_PITCH_ADDR /* RW */ (JPEGD_BASE+0x00000214)
+#define HWIO_RTDMA_JPEG_WR_BUF_PITCH__POR 0x00000000
+#define HWIO_RTDMA_JPEG_WR_BUF_PITCH__RMSK 0x00003FF8
+#define HWIO_RTDMA_JPEG_WR_BUF_PITCH__SHFT 3
+
+/* Register Element MIN and MAX*/
+#define HWIO_RTDMA_JPEG_WR_BUF_PITCH___S 3
+#define HWIO_RTDMA_JPEG_WR_BUF_PITCH___S 3
+#define HWIO_RTDMA_JPEG_WR_BUF_PITCH___S 3
+#define HWIO_RTDMA_JPEG_WR_BUF_PITCH___S 3
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_WR_BUF_PITCH__PITCH__BMSK 0x00003FF8
+#define HWIO_RTDMA_JPEG_WR_BUF_PITCH__PITCH__SHFT 3
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_WR_PLANE_SIZE RTDMA_JPEG_WR_PLANE_SIZE
+#define HWIO_RTDMA_JPEG_WR_PLANE_SIZE_ADDR /* RW */ (JPEGD_BASE+0x00000218)
+#define HWIO_RTDMA_JPEG_WR_PLANE_SIZE__POR 0x00000000
+#define HWIO_RTDMA_JPEG_WR_PLANE_SIZE__RMSK 0x1FFF1FFF
+#define HWIO_RTDMA_JPEG_WR_PLANE_SIZE__SHFT 0
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_WR_PLANE_SIZE__PLANE_VSIZE__BMSK 0x1FFF0000
+#define HWIO_RTDMA_JPEG_WR_PLANE_SIZE__PLANE_VSIZE__SHFT 16
+#define HWIO_RTDMA_JPEG_WR_PLANE_SIZE__PLANE_HSIZE__BMSK 0x00001FFF
+#define HWIO_RTDMA_JPEG_WR_PLANE_SIZE__PLANE_HSIZE__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_WR_BLOCK_SIZE RTDMA_JPEG_WR_BLOCK_SIZE
+#define HWIO_RTDMA_JPEG_WR_BLOCK_SIZE_ADDR /* RW */ (JPEGD_BASE+0x0000021C)
+#define HWIO_RTDMA_JPEG_WR_BLOCK_SIZE__POR 0x00000000
+#define HWIO_RTDMA_JPEG_WR_BLOCK_SIZE__RMSK 0x00000FFF
+#define HWIO_RTDMA_JPEG_WR_BLOCK_SIZE__SHFT 0
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_WR_BLOCK_SIZE__BLOCK_VSIZE__BMSK 0x00000FC0
+#define HWIO_RTDMA_JPEG_WR_BLOCK_SIZE__BLOCK_VSIZE__SHFT 6
+#define HWIO_RTDMA_JPEG_WR_BLOCK_SIZE__BLOCK_HSIZE__BMSK 0x0000003F
+#define HWIO_RTDMA_JPEG_WR_BLOCK_SIZE__BLOCK_HSIZE__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_WR_BUFFER_SIZE RTDMA_JPEG_WR_BUFFER_SIZE
+#define HWIO_RTDMA_JPEG_WR_BUFFER_SIZE_ADDR /* RW */ (JPEGD_BASE+0x00000220)
+#define HWIO_RTDMA_JPEG_WR_BUFFER_SIZE__POR 0x00000000
+#define HWIO_RTDMA_JPEG_WR_BUFFER_SIZE__RMSK 0x00001FFF
+#define HWIO_RTDMA_JPEG_WR_BUFFER_SIZE__SHFT 0
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_WR_BUFFER_SIZE__BUFFER_VSIZE__BMSK 0x00001FFF
+#define HWIO_RTDMA_JPEG_WR_BUFFER_SIZE__BUFFER_VSIZE__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_WR_STA_ACK RTDMA_JPEG_WR_STA_ACK
+#define HWIO_RTDMA_JPEG_WR_STA_ACK_ADDR /* RW */ (JPEGD_BASE+0x00000224)
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__POR 0x00000000
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__RMSK 0x0000000F
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__SHFT 3
+
+/* Register Element MIN and MAX*/
+#define HWIO_RTDMA_JPEG_WR_STA_ACK___S 3
+#define HWIO_RTDMA_JPEG_WR_STA_ACK___S 3
+#define HWIO_RTDMA_JPEG_WR_STA_ACK___S 3
+#define HWIO_RTDMA_JPEG_WR_STA_ACK___S 3
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__SW_RESET_ABORT_RDY_STA__BMSK 0x00000008
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__SW_RESET_ABORT_RDY_STA__SHFT 3
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__SW_RESET_ABORT_RDY_ACK__BMSK 0x00000008
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__SW_RESET_ABORT_RDY_ACK__SHFT 3
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__ERR_STA__BMSK 0x00000004
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__ERR_STA__SHFT 2
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__ERR_ACK__BMSK 0x00000004
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__ERR_ACK__SHFT 2
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__EOF_STA__BMSK 0x00000002
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__EOF_STA__SHFT 1
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__EOF_ACK__BMSK 0x00000002
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__EOF_ACK__SHFT 1
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__SOF_STA__BMSK 0x00000001
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__SOF_STA__SHFT 0
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__SOF_ACK__BMSK 0x00000001
+#define HWIO_RTDMA_JPEG_WR_STA_ACK__SOF_ACK__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_WR_INT_EN RTDMA_JPEG_WR_INT_EN
+#define HWIO_RTDMA_JPEG_WR_INT_EN_ADDR /* W */ (JPEGD_BASE+0x00000228)
+#define HWIO_RTDMA_JPEG_WR_INT_EN__POR 0x00000000
+#define HWIO_RTDMA_JPEG_WR_INT_EN__RMSK 0x0000000F
+#define HWIO_RTDMA_JPEG_WR_INT_EN__SHFT 0
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_WR_INT_EN__SW_RESET_ABORT_RDY_EN__BMSK 0x00000008
+#define HWIO_RTDMA_JPEG_WR_INT_EN__SW_RESET_ABORT_RDY_EN__SHFT 3
+#define HWIO_RTDMA_JPEG_WR_INT_EN__ERR_EN__BMSK 0x00000004
+#define HWIO_RTDMA_JPEG_WR_INT_EN__ERR_EN__SHFT 2
+#define HWIO_RTDMA_JPEG_WR_INT_EN__EOF_EN__BMSK 0x00000002
+#define HWIO_RTDMA_JPEG_WR_INT_EN__EOF_EN__SHFT 1
+#define HWIO_RTDMA_JPEG_WR_INT_EN__SOF_EN__BMSK 0x00000001
+#define HWIO_RTDMA_JPEG_WR_INT_EN__SOF_EN__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_RD_BUF_CONFIG RTDMA_JPEG_RD_BUF_CONFIG
+#define HWIO_RTDMA_JPEG_RD_BUF_CONFIG_ADDR /* RW */ (JPEGD_BASE+0x00000100)
+#define HWIO_RTDMA_JPEG_RD_BUF_CONFIG__POR 0x00000000
+#define HWIO_RTDMA_JPEG_RD_BUF_CONFIG__RMSK 0x0000001F
+#define HWIO_RTDMA_JPEG_RD_BUF_CONFIG__SHFT 0
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_RD_BUF_CONFIG__BUF_FORMAT__BMSK 0x0000001C
+#define HWIO_RTDMA_JPEG_RD_BUF_CONFIG__BUF_FORMAT__SHFT 2
+#define HWIO_RTDMA_JPEG_RD_BUF_CONFIG__NUM_OF_PLANES__BMSK 0x00000003
+#define HWIO_RTDMA_JPEG_RD_BUF_CONFIG__NUM_OF_PLANES__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT, W */
+#define RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO_ADDR (JPEGD_BASE+0x00000104)
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO__POR 0x00000000
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO__RMSK 0x0000001C
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO__SHFT 2
+
+/* Register Element MIN and MAX*/
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO___S 2
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO___S 2
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO___S 2
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO___S 2
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO__BUF_APPLY__BMSK 0x00000010
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO__BUF_APPLY__SHFT 4
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO__BUF_EOF__BMSK 0x00000008
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO__BUF_EOF__SHFT 3
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO__BUF_SOF__BMSK 0x00000004
+#define HWIO_RTDMA_JPEG_RD_BUF_MNGR_BUF_ID_FIFO__BUF_SOF__SHFT 2
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_RD_BUF_Y_PNTR RTDMA_JPEG_RD_BUF_Y_PNTR
+#define HWIO_RTDMA_JPEG_RD_BUF_Y_PNTR_ADDR /* RW */ (JPEGD_BASE+0x0000010C)
+#define HWIO_RTDMA_JPEG_RD_BUF_Y_PNTR__POR 0x00000000
+#define HWIO_RTDMA_JPEG_RD_BUF_Y_PNTR__RMSK 0xFFFFFFF8
+#define HWIO_RTDMA_JPEG_RD_BUF_Y_PNTR__SHFT 3
+
+/* Register Element MIN and MAX*/
+#define HWIO_RTDMA_JPEG_RD_BUF_Y_PNTR___S 3
+#define HWIO_RTDMA_JPEG_RD_BUF_Y_PNTR___S 3
+#define HWIO_RTDMA_JPEG_RD_BUF_Y_PNTR___S 3
+#define HWIO_RTDMA_JPEG_RD_BUF_Y_PNTR___S 3
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_RD_BUF_Y_PNTR__PNTR__BMSK 0xFFFFFFF8
+#define HWIO_RTDMA_JPEG_RD_BUF_Y_PNTR__PNTR__SHFT 3
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_RD_BUF_U_PNTR RTDMA_JPEG_RD_BUF_U_PNTR
+#define HWIO_RTDMA_JPEG_RD_BUF_U_PNTR_ADDR /* RW */ (JPEGD_BASE+0x00000110)
+#define HWIO_RTDMA_JPEG_RD_BUF_U_PNTR__POR 0x00000000
+#define HWIO_RTDMA_JPEG_RD_BUF_U_PNTR__RMSK 0xFFFFFFF8
+#define HWIO_RTDMA_JPEG_RD_BUF_U_PNTR__SHFT 3
+
+/* Register Element MIN and MAX*/
+#define HWIO_RTDMA_JPEG_RD_BUF_U_PNTR___S 3
+#define HWIO_RTDMA_JPEG_RD_BUF_U_PNTR___S 3
+#define HWIO_RTDMA_JPEG_RD_BUF_U_PNTR___S 3
+#define HWIO_RTDMA_JPEG_RD_BUF_U_PNTR___S 3
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_RD_BUF_U_PNTR__PNTR__BMSK 0xFFFFFFF8
+#define HWIO_RTDMA_JPEG_RD_BUF_U_PNTR__PNTR__SHFT 3
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_RD_BUF_V_PNTR RTDMA_JPEG_RD_BUF_V_PNTR
+#define HWIO_RTDMA_JPEG_RD_BUF_V_PNTR_ADDR /* RW */ (JPEGD_BASE+0x00000114)
+#define HWIO_RTDMA_JPEG_RD_BUF_V_PNTR__POR 0x00000000
+#define HWIO_RTDMA_JPEG_RD_BUF_V_PNTR__RMSK 0xFFFFFFF8
+#define HWIO_RTDMA_JPEG_RD_BUF_V_PNTR__SHFT 3
+
+/* Register Element MIN and MAX*/
+#define HWIO_RTDMA_JPEG_RD_BUF_V_PNTR___S 3
+#define HWIO_RTDMA_JPEG_RD_BUF_V_PNTR___S 3
+#define HWIO_RTDMA_JPEG_RD_BUF_V_PNTR___S 3
+#define HWIO_RTDMA_JPEG_RD_BUF_V_PNTR___S 3
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_RD_BUF_V_PNTR__PNTR__BMSK 0xFFFFFFF8
+#define HWIO_RTDMA_JPEG_RD_BUF_V_PNTR__PNTR__SHFT 3
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_RD_BUF_PITCH RTDMA_JPEG_RD_BUF_PITCH
+#define HWIO_RTDMA_JPEG_RD_BUF_PITCH_ADDR /* RW */ (JPEGD_BASE+0x00000118)
+#define HWIO_RTDMA_JPEG_RD_BUF_PITCH__POR 0x00000000
+#define HWIO_RTDMA_JPEG_RD_BUF_PITCH__RMSK 0x00003FF8
+#define HWIO_RTDMA_JPEG_RD_BUF_PITCH__SHFT 3
+
+/* Register Element MIN and MAX*/
+#define HWIO_RTDMA_JPEG_RD_BUF_PITCH___S 3
+#define HWIO_RTDMA_JPEG_RD_BUF_PITCH___S 3
+#define HWIO_RTDMA_JPEG_RD_BUF_PITCH___S 3
+#define HWIO_RTDMA_JPEG_RD_BUF_PITCH___S 3
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_RD_BUF_PITCH__PITCH__BMSK 0x00003FF8
+#define HWIO_RTDMA_JPEG_RD_BUF_PITCH__PITCH__SHFT 3
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_RD_PLANE_SIZE RTDMA_JPEG_RD_PLANE_SIZE
+#define HWIO_RTDMA_JPEG_RD_PLANE_SIZE_ADDR /* RW */ (JPEGD_BASE+0x0000011C)
+#define HWIO_RTDMA_JPEG_RD_PLANE_SIZE__POR 0x00000000
+#define HWIO_RTDMA_JPEG_RD_PLANE_SIZE__RMSK 0x1FFF1FFF
+#define HWIO_RTDMA_JPEG_RD_PLANE_SIZE__SHFT 0
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_RD_PLANE_SIZE__PLANE_VSIZE__BMSK 0x1FFF0000
+#define HWIO_RTDMA_JPEG_RD_PLANE_SIZE__PLANE_VSIZE__SHFT 16
+#define HWIO_RTDMA_JPEG_RD_PLANE_SIZE__PLANE_HSIZE__BMSK 0x00001FFF
+#define HWIO_RTDMA_JPEG_RD_PLANE_SIZE__PLANE_HSIZE__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_RD_BLOCK_SIZE RTDMA_JPEG_RD_BLOCK_SIZE
+#define HWIO_RTDMA_JPEG_RD_BLOCK_SIZE_ADDR /* RW */ (JPEGD_BASE+0x00000120)
+#define HWIO_RTDMA_JPEG_RD_BLOCK_SIZE__POR 0x000003CF
+#define HWIO_RTDMA_JPEG_RD_BLOCK_SIZE__RMSK 0x00000FFF
+#define HWIO_RTDMA_JPEG_RD_BLOCK_SIZE__SHFT 0
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_RD_BLOCK_SIZE__BLOCK_VSIZE__BMSK 0x00000FC0
+#define HWIO_RTDMA_JPEG_RD_BLOCK_SIZE__BLOCK_VSIZE__SHFT 6
+#define HWIO_RTDMA_JPEG_RD_BLOCK_SIZE__BLOCK_HSIZE__BMSK 0x0000003F
+#define HWIO_RTDMA_JPEG_RD_BLOCK_SIZE__BLOCK_HSIZE__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_RD_BUFFER_SIZE RTDMA_JPEG_RD_BUFFER_SIZE
+#define HWIO_RTDMA_JPEG_RD_BUFFER_SIZE_ADDR (JPEGD_BASE+0x00000124)
+#define HWIO_RTDMA_JPEG_RD_BUFFER_SIZE__POR 0x00000000
+#define HWIO_RTDMA_JPEG_RD_BUFFER_SIZE__RMSK 0x00001FFF
+#define HWIO_RTDMA_JPEG_RD_BUFFER_SIZE__SHFT 0
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_RD_BUFFER_SIZE__BUFFER_VSIZE__BMSK 0x00001FFF
+#define HWIO_RTDMA_JPEG_RD_BUFFER_SIZE__BUFFER_VSIZE__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_RD_STA_ACK RTDMA_JPEG_RD_STA_ACK
+#define HWIO_RTDMA_JPEG_RD_STA_ACK_ADDR (JPEGD_BASE+0x00000128)
+#define HWIO_RTDMA_JPEG_RD_STA_ACK__POR 0x00000000
+#define HWIO_RTDMA_JPEG_RD_STA_ACK__RMSK 0x00000003
+#define HWIO_RTDMA_JPEG_RD_STA_ACK__SHFT 0
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_RD_STA_ACK__EOF_STA__BMSK 0x00000002
+#define HWIO_RTDMA_JPEG_RD_STA_ACK__EOF_STA__SHFT 1
+#define HWIO_RTDMA_JPEG_RD_STA_ACK__SOF_STA__BMSK 0x00000001
+#define HWIO_RTDMA_JPEG_RD_STA_ACK__SOF_STA__SHFT 0
+#define HWIO_RTDMA_JPEG_RD_STA_ACK__EOF_ACK__BMSK 0x00000002
+#define HWIO_RTDMA_JPEG_RD_STA_ACK__EOF_ACK__SHFT 1
+#define HWIO_RTDMA_JPEG_RD_STA_ACK__SOF_ACK__BMSK 0x00000001
+#define HWIO_RTDMA_JPEG_RD_STA_ACK__SOF_ACK__SHFT 0
+
+/* Register ADDR, RMSK, and SHFT*/
+#define RTDMA_JPEG_RD_INT_EN RTDMA_JPEG_RD_INT_EN
+#define HWIO_RTDMA_JPEG_RD_INT_EN_ADDR /* W */ (JPEGD_BASE+0x0000012C)
+#define HWIO_RTDMA_JPEG_RD_INT_EN__POR 0x00000000
+#define HWIO_RTDMA_JPEG_RD_INT_EN__RMSK 0x00000003
+#define HWIO_RTDMA_JPEG_RD_INT_EN__SHFT 0
+
+/* Register Field FMSK and SHFT*/
+#define HWIO_RTDMA_JPEG_RD_INT_EN__EOF_EN__BMSK 0x00000002
+#define HWIO_RTDMA_JPEG_RD_INT_EN__EOF_EN__SHFT 1
+#define HWIO_RTDMA_JPEG_RD_INT_EN__SOF_EN__BMSK 0x00000001
+#define HWIO_RTDMA_JPEG_RD_INT_EN__SOF_EN__SHFT 0
+
+#endif /* MSM_MERCURY_HW_REG_H */
diff --git a/drivers/media/video/msm/mercury/msm_mercury_macros.h b/drivers/media/video/msm/mercury/msm_mercury_macros.h
new file mode 100644
index 0000000..33c4f9a
--- /dev/null
+++ b/drivers/media/video/msm/mercury/msm_mercury_macros.h
@@ -0,0 +1,118 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef MSM_MERCURY_MACROS_H
+#define MSM_MERCURY_MACROS_H
+
+#include <media/msm_mercury.h>
+
+#define mercury_kread(reg) \
+ hw_cmd.type = MSM_MERCURY_HW_CMD_TYPE_READ; \
+ hw_cmd.n = 1; \
+ hw_cmd.offset = HWIO_##reg##_ADDR; \
+ hw_cmd.mask = HWIO_##reg##__RMSK; \
+ hw_cmd.data = 0x0; \
+ msm_mercury_hw_exec_cmds(&hw_cmd, 1);
+
+#define mercury_kwrite(reg, val) \
+ hw_cmd.offset = HWIO_##reg##_ADDR; \
+ hw_cmd.mask = HWIO_##reg##__RMSK; \
+ hw_cmd.type = MSM_MERCURY_HW_CMD_TYPE_WRITE; \
+ hw_cmd.n = 1; \
+ hw_cmd.data = val; \
+ msm_mercury_hw_exec_cmds(&hw_cmd, 1);
+
+#define GET_FVAL(val, reg, field) ((val & HWIO_FMSK(reg, field)) >> \
+ HWIO_SHFT(reg, field))
+
+#define byte unsigned char
+#define word unsigned short
+#define dword unsigned long
+
+#define inp(port) (*((dword *) (port)))
+#define inpb(port) (*((byte *) (port)))
+#define inpw(port) (*((word *) (port)))
+#define inpdw(port) (*((dword *)(port)))
+
+#define outp(port, val) (*((dword *) (port)) = ((dword) (val)))
+#define outpb(port, val) (*((byte *) (port)) = ((byte) (val)))
+#define outpw(port, val) (*((word *) (port)) = ((word) (val)))
+#define outpdw(port, val) (*((dword *) (port)) = ((dword) (val)))
+
+
+#define in_byte(addr) (inp(addr))
+#define in_byte_masked(addr, mask) (inp(addr) & (byte)mask)
+#define out_byte(addr, val) outp(addr, val)
+#define in_word(addr) (inpw(addr))
+#define in_word_masked(addr, mask) (inpw(addr) & (word)mask)
+#define out_word(addr, val) outpw(addr, val)
+#define in_dword(addr) (inpdw(addr))
+#define in_dword_masked(addr, mask) (inpdw(addr) & mask)
+#define out_dword(addr, val) outpdw(addr, val)
+
+/* shadowed, masked output for write-only registers */
+#define out_byte_masked(io, mask, val, shadow) \
+ do { \
+ shadow = (shadow & (word)(~(mask))) | \
+ ((word)((val) & (mask))); \
+ (void) out_byte(io, shadow);\
+ } while (0);
+
+#define out_word_masked(io, mask, val, shadow) \
+ do { \
+ shadow = (shadow & (word)(~(mask))) | \
+ ((word)((val) & (mask))); \
+ (void) out_word(io, shadow); \
+ } while (0);
+
+#define out_dword_masked(io, mask, val, shadow) \
+ do { \
+ shadow = (shadow & (dword)(~(mask))) | \
+ ((dword)((val) & (mask))); \
+ (void) out_dword(io, shadow);\
+ } while (0);
+
+#define out_byte_masked_ns(io, mask, val, current_reg_content) \
+ (void) out_byte(io, ((current_reg_content & \
+ (word)(~(mask))) | ((word)((val) & (mask)))))
+
+#define out_word_masked_ns(io, mask, val, current_reg_content) \
+ (void) out_word(io, ((current_reg_content & \
+ (word)(~(mask))) | ((word)((val) & (mask)))))
+
+#define out_dword_masked_ns(io, mask, val, current_reg_content) \
+ (void) out_dword(io, ((current_reg_content & \
+ (dword)(~(mask))) | ((dword)((val) & (mask)))))
+
+#define MEM_INF(val, reg, field) ((val & HWIO_FMSK(reg, field)) >> \
+ HWIO_SHFT(reg, field))
+
+#define MEM_OUTF(mem, reg, field, val)\
+ out_dword_masked_ns(mem, HWIO_FMSK(reg, field), \
+ (unsigned int)val<<HWIO_SHFT(reg, field), in_dword(mem))
+
+#define MEM_OUTF2(mem, reg, field2, field1, val2, val1) \
+ out_dword_masked_ns(mem, (HWIO_FMSK(reg, field2)| \
+ HWIO_FMSK(reg, field1)), \
+ (((unsigned int)val2<<HWIO_SHFT(reg, field2))| \
+ ((unsigned int)val1<<HWIO_SHFT(reg, field1))), in_dword(mem))
+
+#define MEM_OUTF3(mem, reg, fld3, fld2, fld1, val3, val2, val1) \
+ out_dword_masked_ns(mem, (HWIO_FMSK(reg, fld3)| \
+ HWIO_FMSK(reg, fld2)|HWIO_FMSK(reg, fld1)), \
+ (((unsigned int)val3<<HWIO_SHFT(reg, fld3))| \
+ ((unsigned int)val2<<HWIO_SHFT(reg, fld2))| \
+ ((unsigned int)val1<<HWIO_SHFT(reg, fld1))), in_dword(mem))
+
+#define HWIO_FMSK(reg, field) HWIO_##reg##__##field##__BMSK
+#define HWIO_SHFT(reg, field) HWIO_##reg##__##field##__SHFT
+#endif
diff --git a/drivers/media/video/msm/mercury/msm_mercury_platform.c b/drivers/media/video/msm/mercury/msm_mercury_platform.c
new file mode 100644
index 0000000..9366ef3
--- /dev/null
+++ b/drivers/media/video/msm/mercury/msm_mercury_platform.c
@@ -0,0 +1,194 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/pm_qos_params.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/android_pmem.h>
+#include <mach/clk.h>
+#include <mach/camera.h>
+#include <mach/msm_subsystem_map.h>
+
+#include "msm_mercury_platform.h"
+#include "msm_mercury_sync.h"
+#include "msm_mercury_common.h"
+#include "msm_mercury_hw.h"
+
+
+struct ion_client *mercury_client;
+
+static struct msm_cam_clk_info mercury_jpegd_clk_info[] = {
+ {"core_clk", 200000000},
+ {"iface_clk", -1}
+};
+
+void msm_mercury_platform_p2v(struct file *file,
+ struct ion_handle **ionhandle)
+{
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ ion_unmap_iommu(mercury_client, *ionhandle, CAMERA_DOMAIN,
+ GEN_POOL);
+ ion_free(mercury_client, *ionhandle);
+ *ionhandle = NULL;
+#elif CONFIG_ANDROID_PMEM
+ put_pmem_file(file);
+#endif
+}
+
+uint32_t msm_mercury_platform_v2p(int fd, uint32_t len,
+ struct file **file_p,
+ struct ion_handle **ionhandle)
+{
+ unsigned long paddr;
+ unsigned long size;
+ int rc;
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ *ionhandle = ion_import_fd(mercury_client, fd);
+ if (IS_ERR_OR_NULL(*ionhandle))
+ return 0;
+
+ rc = ion_map_iommu(mercury_client, *ionhandle, CAMERA_DOMAIN,
+ GEN_POOL, SZ_4K, 0, &paddr,
+ (unsigned long *)&size, UNCACHED, 0);
+#elif CONFIG_ANDROID_PMEM
+ unsigned long kvstart;
+ rc = get_pmem_file(fd, &paddr, &kvstart, &size, file_p);
+#else
+ rc = 0;
+ paddr = 0;
+ size = 0;
+#endif
+ if (rc < 0) {
+ MCR_PR_ERR("%s: get_pmem_file fd %d error %d\n", __func__, fd,
+ rc);
+ goto error1;
+ }
+
+ /* validate user input */
+ if (len > size) {
+ MCR_PR_ERR("%s: invalid offset + len\n", __func__);
+ goto error1;
+ }
+
+ return paddr;
+error1:
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ ion_free(mercury_client, *ionhandle);
+#endif
+ return 0;
+}
+
+int msm_mercury_platform_init(struct platform_device *pdev,
+ struct resource **mem,
+ void **base,
+ int *irq,
+ irqreturn_t (*handler) (int, void *),
+ void *context)
+{
+ int rc = 0;
+ int mercury_irq;
+ struct resource *mercury_mem, *mercury_io, *mercury_irq_res;
+ void *mercury_base;
+ struct msm_mercury_device *pmercury_dev =
+ (struct msm_mercury_device *) context;
+
+ MCR_DBG("%s:%d]\n", __func__, __LINE__);
+
+ mercury_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mercury_mem) {
+ MCR_PR_ERR("%s: no mem resource?\n", __func__);
+ return -ENODEV;
+ }
+
+ mercury_irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (!mercury_irq_res) {
+ MCR_PR_ERR("no irq resource?\n");
+ return -ENODEV;
+ }
+ mercury_irq = mercury_irq_res->start;
+
+ mercury_io = request_mem_region(mercury_mem->start,
+ resource_size(mercury_mem), pdev->name);
+ if (!mercury_io) {
+ MCR_PR_ERR("%s: region already claimed\n", __func__);
+ return -EBUSY;
+ }
+ MCR_DBG("%s:%d]\n", __func__, __LINE__);
+ mercury_base = ioremap(mercury_mem->start,
+ resource_size(mercury_mem));
+ if (!mercury_base) {
+ rc = -ENOMEM;
+ MCR_PR_ERR("%s: ioremap failed\n", __func__);
+ goto fail1;
+ }
+ MCR_DBG("%s:%d]\n", __func__, __LINE__);
+
+ rc = msm_cam_clk_enable(&pmercury_dev->pdev->dev,
+ mercury_jpegd_clk_info, pmercury_dev->mercury_clk,
+ ARRAY_SIZE(mercury_jpegd_clk_info), 1);
+ if (rc < 0)
+ MCR_PR_ERR("%s:%d] rc = %d\n", __func__, __LINE__, rc);
+
+ MCR_DBG("%s:%d]\n", __func__, __LINE__);
+ msm_mercury_hw_init(mercury_base, resource_size(mercury_mem));
+ rc = request_irq(mercury_irq, handler, IRQF_TRIGGER_RISING,
+ "mercury", context);
+ if (rc) {
+ MCR_PR_ERR("%s: request_irq failed, %d\n", __func__,
+ mercury_irq);
+ goto fail3;
+ }
+ MCR_DBG("%s:%d]\n", __func__, __LINE__);
+ *mem = mercury_mem;
+ *base = mercury_base;
+ *irq = mercury_irq;
+ MCR_DBG("%s:%d]\n", __func__, __LINE__);
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ mercury_client = msm_ion_client_create(-1, "camera/mercury");
+#endif
+ MCR_PR_ERR("%s:%d] success\n", __func__, __LINE__);
+ return rc;
+fail3:
+ MCR_DBG("%s:%d]\n", __func__, __LINE__);
+ msm_cam_clk_enable(&pmercury_dev->pdev->dev, mercury_jpegd_clk_info,
+ pmercury_dev->mercury_clk,
+ ARRAY_SIZE(mercury_jpegd_clk_info), 0);
+ MCR_DBG("%s:%d]\n", __func__, __LINE__);
+ iounmap(mercury_base);
+fail1:
+ MCR_DBG("%s:%d]\n", __func__, __LINE__);
+ release_mem_region(mercury_mem->start, resource_size(mercury_mem));
+ MCR_DBG("%s:%d]\n", __func__, __LINE__);
+ return rc;
+}
+
+int msm_mercury_platform_release(struct resource *mem, void *base,
+ int irq, void *context)
+{
+ int result = 0;
+ struct msm_mercury_device *pmercury_dev =
+ (struct msm_mercury_device *) context;
+
+ free_irq(irq, context);
+ msm_cam_clk_enable(&pmercury_dev->pdev->dev, mercury_jpegd_clk_info,
+ pmercury_dev->mercury_clk, ARRAY_SIZE(mercury_jpegd_clk_info),
+ 0);
+ iounmap(base);
+ release_mem_region(mem->start, resource_size(mem));
+#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
+ ion_client_destroy(mercury_client);
+#endif
+ MCR_DBG("%s:%d] success\n", __func__, __LINE__);
+ return result;
+}
+
diff --git a/drivers/media/video/msm/mercury/msm_mercury_platform.h b/drivers/media/video/msm/mercury/msm_mercury_platform.h
new file mode 100644
index 0000000..8f4a7e3
--- /dev/null
+++ b/drivers/media/video/msm/mercury/msm_mercury_platform.h
@@ -0,0 +1,39 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef MSM_MERCURY_PLATFORM_H
+#define MSM_MERCURY_PLATFORM_H
+
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/ion.h>
+
+int msm_mercury_platform_clk_enable(void);
+int msm_mercury_platform_clk_disable(void);
+
+void msm_mercury_platform_p2v(struct file *file,
+ struct ion_handle **ionhandle);
+
+uint32_t msm_mercury_platform_v2p(int fd, uint32_t len, struct file **file,
+ struct ion_handle **ionhandle);
+
+int msm_mercury_platform_init(struct platform_device *pdev,
+ struct resource **mem,
+ void **base,
+ int *irq,
+ irqreturn_t (*handler) (int, void *),
+ void *context);
+
+int msm_mercury_platform_release(struct resource *mem, void *base, int irq,
+ void *context);
+
+#endif /* MSM_MERCURY_PLATFORM_H */
diff --git a/drivers/media/video/msm/mercury/msm_mercury_sync.c b/drivers/media/video/msm/mercury/msm_mercury_sync.c
new file mode 100644
index 0000000..31fb8b4
--- /dev/null
+++ b/drivers/media/video/msm/mercury/msm_mercury_sync.c
@@ -0,0 +1,614 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/list.h>
+#include <linux/uaccess.h>
+#include <linux/slab.h>
+#include <media/msm_mercury.h>
+
+#include "msm_mercury_sync.h"
+#include "msm_mercury_core.h"
+#include "msm_mercury_platform.h"
+#include "msm_mercury_common.h"
+#include "msm_mercury_macros.h"
+#include "msm_mercury_hw_reg.h"
+
+static struct msm_mercury_core_buf out_buf_local;
+static struct msm_mercury_core_buf in_buf_local;
+
+/*************** queue helper ****************/
+inline void msm_mercury_q_init(char const *name, struct msm_mercury_q *q_p)
+{
+ MCR_DBG("%s:%d] %s\n", __func__, __LINE__, name);
+ q_p->name = name;
+ spin_lock_init(&q_p->lck);
+ INIT_LIST_HEAD(&q_p->q);
+ init_waitqueue_head(&q_p->wait);
+ q_p->unblck = 0;
+}
+
+inline void *msm_mercury_q_out(struct msm_mercury_q *q_p)
+{
+ unsigned long flags;
+ struct msm_mercury_q_entry *q_entry_p = NULL;
+ void *data = NULL;
+
+ MCR_DBG("(%d)%s() %s\n", __LINE__, __func__, q_p->name);
+ spin_lock_irqsave(&q_p->lck, flags);
+ if (!list_empty(&q_p->q)) {
+ q_entry_p = list_first_entry(&q_p->q,
+ struct msm_mercury_q_entry,
+ list);
+ list_del_init(&q_entry_p->list);
+ }
+ spin_unlock_irqrestore(&q_p->lck, flags);
+
+ if (q_entry_p) {
+ data = q_entry_p->data;
+ kfree(q_entry_p);
+ } else {
+ MCR_DBG("%s:%d] %s no entry\n", __func__, __LINE__, q_p->name);
+ }
+
+ return data;
+}
+
+inline int msm_mercury_q_in(struct msm_mercury_q *q_p, void *data)
+{
+ unsigned long flags;
+
+ struct msm_mercury_q_entry *q_entry_p;
+
+ MCR_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
+
+ q_entry_p = kmalloc(sizeof(struct msm_mercury_q_entry), GFP_ATOMIC);
+ if (!q_entry_p) {
+ MCR_PR_ERR("%s: no mem\n", __func__);
+ return -EFAULT;
+ }
+ q_entry_p->data = data;
+
+ spin_lock_irqsave(&q_p->lck, flags);
+ list_add_tail(&q_entry_p->list, &q_p->q);
+ spin_unlock_irqrestore(&q_p->lck, flags);
+
+ return 0;
+}
+
+inline int msm_mercury_q_in_buf(struct msm_mercury_q *q_p,
+ struct msm_mercury_core_buf *buf)
+{
+ struct msm_mercury_core_buf *buf_p;
+
+ MCR_DBG("%s:%d]\n", __func__, __LINE__);
+ buf_p = kmalloc(sizeof(struct msm_mercury_core_buf), GFP_ATOMIC);
+ if (!buf_p) {
+ MCR_PR_ERR("%s: no mem\n", __func__);
+ return -EFAULT;
+ }
+
+ memcpy(buf_p, buf, sizeof(struct msm_mercury_core_buf));
+
+ msm_mercury_q_in(q_p, buf_p);
+ return 0;
+}
+
+inline int msm_mercury_q_wait(struct msm_mercury_q *q_p)
+{
+ int tm = MAX_SCHEDULE_TIMEOUT; /* 500ms */
+ int rc;
+
+ MCR_DBG("%s:%d %s wait\n", __func__, __LINE__, q_p->name);
+ rc = wait_event_interruptible_timeout(q_p->wait,
+ (!list_empty_careful(&q_p->q) || q_p->unblck),
+ msecs_to_jiffies(tm));
+
+ MCR_DBG("%s:%d %s wait done (rc=%d)\n", __func__,
+ __LINE__, q_p->name, rc);
+ if (list_empty_careful(&q_p->q)) {
+ if (rc == 0) {
+ rc = -ETIMEDOUT;
+ MCR_PR_ERR("%s:%d] %s timeout\n", __func__,
+ __LINE__, q_p->name);
+ } else if (q_p->unblck) {
+ MCR_DBG("%s:%d %s unblock is true", __func__,
+ __LINE__, q_p->name);
+ rc = q_p->unblck;
+ q_p->unblck = 0;
+ } else if (rc < 0) {
+ MCR_PR_ERR("%s:%d %s rc %d\n", __func__, __LINE__,
+ q_p->name, rc);
+ }
+ }
+ return rc;
+}
+
+inline int msm_mercury_q_wakeup(struct msm_mercury_q *q_p)
+{
+ MCR_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
+ wake_up(&q_p->wait);
+ return 0;
+}
+
+inline int msm_mercury_q_wr_eoi(struct msm_mercury_q *q_p)
+{
+ MCR_DBG("%s:%d] Wake up %s\n", __func__, __LINE__, q_p->name);
+ q_p->unblck = MSM_MERCURY_EVT_FRAMEDONE;
+ wake_up(&q_p->wait);
+ return 0;
+}
+
+inline int msm_mercury_q_wr_err(struct msm_mercury_q *q_p)
+{
+ MCR_DBG("%s:%d] Wake up %s\n", __func__, __LINE__, q_p->name);
+ q_p->unblck = MSM_MERCURY_EVT_ERR;
+ wake_up(&q_p->wait);
+ return 0;
+}
+
+inline int msm_mercury_q_unblock(struct msm_mercury_q *q_p)
+{
+ MCR_DBG("%s:%d] Wake up %s\n", __func__, __LINE__, q_p->name);
+ q_p->unblck = MSM_MERCURY_EVT_UNBLOCK;
+ wake_up(&q_p->wait);
+ return 0;
+}
+
+inline void msm_mercury_q_cleanup(struct msm_mercury_q *q_p)
+{
+ void *data;
+ MCR_DBG("\n%s:%d] %s\n", __func__, __LINE__, q_p->name);
+ do {
+ data = msm_mercury_q_out(q_p);
+ if (data) {
+ MCR_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
+ kfree(data);
+ }
+ } while (data);
+ q_p->unblck = 0;
+}
+
+/*************** event queue ****************/
+int msm_mercury_framedone_irq(struct msm_mercury_device *pmercury_dev)
+{
+ MCR_DBG("%s:%d] Enter\n", __func__, __LINE__);
+ msm_mercury_q_unblock(&pmercury_dev->evt_q);
+
+ MCR_DBG("%s:%d] Exit\n", __func__, __LINE__);
+ return 0;
+}
+
+int msm_mercury_evt_get(struct msm_mercury_device *pmercury_dev,
+ void __user *arg)
+{
+ struct msm_mercury_ctrl_cmd ctrl_cmd;
+ int rc = 0;
+
+ MCR_DBG("(%d)%s() Enter\n", __LINE__, __func__);
+ ctrl_cmd.type = (uint32_t)msm_mercury_q_wait(&pmercury_dev->evt_q);
+
+ rc = copy_to_user(arg, &ctrl_cmd, sizeof(ctrl_cmd));
+
+ if (rc) {
+ MCR_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
+ return -EFAULT;
+ }
+
+ return 0;
+}
+
+int msm_mercury_evt_get_unblock(struct msm_mercury_device *pmercury_dev)
+{
+ MCR_DBG("--(%d)%s() Enter\n", __LINE__, __func__);
+ msm_mercury_q_unblock(&pmercury_dev->evt_q);
+ return 0;
+}
+
+int msm_mercury_output_buf_cfg(struct msm_mercury_device *pmercury_dev,
+ void __user *arg)
+{
+ struct msm_mercury_buf buf_cmd;
+
+
+ MCR_DBG("%s:%d] Enter\n", __func__, __LINE__);
+ if (copy_from_user(&buf_cmd, arg, sizeof(struct msm_mercury_buf))) {
+ MCR_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
+ return -EFAULT;
+ }
+
+ out_buf_local.y_buffer_addr = msm_mercury_platform_v2p(buf_cmd.fd,
+ buf_cmd.y_len, &out_buf_local.file, &out_buf_local.handle);
+ out_buf_local.cbcr_buffer_addr = out_buf_local.y_buffer_addr +
+ buf_cmd.y_len;
+
+ if (!out_buf_local.y_buffer_addr) {
+ MCR_PR_ERR("%s:%d] v2p wrong\n", __func__, __LINE__);
+ return -EFAULT;
+ }
+
+ msm_mercury_hw_output_y_buf_cfg(out_buf_local.y_buffer_addr);
+ msm_mercury_hw_output_u_buf_cfg(out_buf_local.cbcr_buffer_addr);
+
+ MCR_DBG("(%d)%s()\n y_buf=0x%08X, y_len=0x%08X, vaddr=0x%08X\n"
+ " u_buf=0x%08X, u_len=0x%08X\n\n", __LINE__, __func__,
+ out_buf_local.y_buffer_addr, buf_cmd.y_len, (int) buf_cmd.vaddr,
+ out_buf_local.cbcr_buffer_addr, buf_cmd.cbcr_len);
+
+ return 0;
+}
+
+int msm_mercury_input_buf_cfg(struct msm_mercury_device *pmercury_dev,
+ void __user *arg)
+{
+ struct msm_mercury_buf buf_cmd;
+
+
+ MCR_DBG("%s:%d] Enter\n", __func__, __LINE__);
+ if (copy_from_user(&buf_cmd, arg, sizeof(struct msm_mercury_buf))) {
+ MCR_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
+ return -EFAULT;
+ }
+
+ in_buf_local.y_buffer_addr = msm_mercury_platform_v2p(buf_cmd.fd,
+ buf_cmd.y_len, &in_buf_local.file, &in_buf_local.handle);
+
+ if (!in_buf_local.y_buffer_addr) {
+ MCR_PR_ERR("%s:%d] v2p wrong\n", __func__, __LINE__);
+ return -EFAULT;
+ }
+
+ msm_mercury_hw_bitstream_buf_cfg(in_buf_local.y_buffer_addr);
+
+ MCR_DBG("(%d)%s()\n bitstream_buf=0x%08X, len=0x%08X, vaddr=0x%08X\n",
+ __LINE__, __func__, in_buf_local.y_buffer_addr, buf_cmd.y_len,
+ (int) buf_cmd.vaddr);
+
+ return 0;
+}
+
+int msm_mercury_output_get(struct msm_mercury_device *pmercury_dev,
+ void __user *to)
+{
+ MCR_DBG("%s:%d] Enter\n", __func__, __LINE__);
+ msm_mercury_platform_p2v(out_buf_local.file, &out_buf_local.handle);
+ return 0;
+}
+
+int msm_mercury_input_get(struct msm_mercury_device *pmercury_dev,
+ void __user *to)
+{
+
+
+ MCR_DBG("%s:%d] Enter\n", __func__, __LINE__);
+ msm_mercury_platform_p2v(in_buf_local.file, &in_buf_local.handle);
+ return 0;
+}
+
+int msm_mercury_ioctl_dump_regs(void)
+{
+ uint32_t mercury_regs[] = {
+ 0x0000, 0x0008, 0x0010, 0x0014, 0x0018, 0x001C, 0x0020, 0x0024,
+ 0x0030, 0x0034, 0x0040, 0x0050, 0x0054, 0x0058, 0x005C, 0x0060,
+ 0x0064, 0x0070, 0x0080, 0x0084, 0x0088, 0x0258, 0x025C, 0x0260,
+ 0x0264, 0x0200, 0x0204, 0x0208, 0x020C, 0x0210, 0x0214, 0x0218,
+ 0x021C, 0x0220, 0x0224, 0x0228, 0x0100, 0x0104, 0x010C, 0x0110,
+ 0x0114, 0x0118, 0x011C, 0x0120, 0x0124, 0x0128, 0x012C};
+
+ struct msm_mercury_hw_cmd hw_cmd;
+ int len = sizeof(mercury_regs)/4;
+ int i;
+
+ MCR_DBG("\n%s\n (%d)%s()\n", __FILE__, __LINE__, __func__);
+
+ hw_cmd.mask = 0xFFFFFFFF;
+ hw_cmd.type = MSM_MERCURY_HW_CMD_TYPE_READ;
+ hw_cmd.n = 1;
+
+ for (i = 0; i < len; i++) {
+ hw_cmd.offset = mercury_regs[i];
+ msm_mercury_hw_exec_cmds(&hw_cmd, 1);
+ }
+
+ return 0;
+}
+
+int msm_mercury_ioctl_magic_code(struct msm_mercury_device *pmercury_dev,
+ void * __user arg)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+ int rc = 0;
+
+ rc = copy_from_user(&hw_cmd, arg, sizeof(struct msm_mercury_hw_cmd));
+ if (rc) {
+ printk(KERN_ERR "%s:%d] failed\n", __func__, __LINE__);
+ return -EFAULT;
+ }
+
+ hw_cmd.data = 0x600D600D;
+ rc = copy_to_user(arg, &hw_cmd, sizeof(hw_cmd));
+
+ if (rc) {
+ printk(KERN_ERR "%s:%d] failed\n", __func__, __LINE__);
+ return -EFAULT;
+ }
+
+ return 0;
+}
+
+int msm_mercury_irq(int event, void *context, void *data)
+{
+ struct msm_mercury_device *pmercury_dev =
+ (struct msm_mercury_device *) context;
+
+ switch (event) {
+ case MSM_MERCURY_HW_IRQ_SW_RESET_ACK:
+ /* wake up evt_q*/
+ MCR_DBG("(%d)%s Wake up event q from Reset IRQ\n", __LINE__,
+ __func__);
+ msm_mercury_q_wakeup(&pmercury_dev->evt_q);
+ break;
+ case MSM_MERCURY_HW_IRQ_WR_EOI_ACK:
+ /*wake up evt_q*/
+ MCR_DBG("%d%s Wake up eventq from WR_EOI IRQ\n", __LINE__,
+ __func__);
+ msm_mercury_q_wr_eoi(&pmercury_dev->evt_q);
+ break;
+ case MSM_MERCURY_HW_IRQ_WR_ERR_ACK:
+ MCR_DBG("(%d)%s Wake up eventq from WR_ERR IRQ\n",
+ __LINE__, __func__);
+ msm_mercury_q_wr_err(&pmercury_dev->evt_q);
+ break;
+ default:
+ MCR_DBG("(%d)%s (default) Wake up event q from WR_ERR IRQ\n",
+ __LINE__, __func__);
+ msm_mercury_q_wr_err(&pmercury_dev->evt_q);
+ }
+ return 0;
+}
+
+int __msm_mercury_open(struct msm_mercury_device *pmercury_dev)
+{
+ int rc = 0;
+
+ mutex_lock(&pmercury_dev->lock);
+ if (pmercury_dev->open_count) {
+ /* only open once */
+ MCR_PR_ERR("%s:%d] busy\n", __func__, __LINE__);
+ mutex_unlock(&pmercury_dev->lock);
+ return -EBUSY;
+ }
+ pmercury_dev->open_count++;
+ mutex_unlock(&pmercury_dev->lock);
+
+ msm_mercury_core_irq_install(msm_mercury_irq);
+
+ rc = msm_mercury_platform_init(pmercury_dev->pdev,
+ &pmercury_dev->mem, &pmercury_dev->base,
+ &pmercury_dev->irq, msm_mercury_core_irq, pmercury_dev);
+ if (rc) {
+ MCR_PR_ERR("%s:%d] platform_init fail %d\n", __func__,
+ __LINE__, rc);
+ return rc;
+ }
+
+ MCR_DBG("\n%s:%d] platform resources - mem 0x%p, base 0x%p, irq %d\n",
+ __func__, __LINE__, pmercury_dev->mem, pmercury_dev->base,
+ pmercury_dev->irq);
+
+ msm_mercury_q_cleanup(&pmercury_dev->evt_q);
+ msm_mercury_core_init();
+
+ MCR_DBG("\n%s:%d] success\n", __func__, __LINE__);
+ return rc;
+}
+
+int __msm_mercury_release(struct msm_mercury_device *pmercury_dev)
+{
+ MCR_DBG("%s:%d] Enter\n", __func__, __LINE__);
+ mutex_lock(&pmercury_dev->lock);
+ if (!pmercury_dev->open_count) {
+ MCR_PR_ERR(KERN_ERR "%s: not opened\n", __func__);
+ mutex_unlock(&pmercury_dev->lock);
+ return -EINVAL;
+ }
+ pmercury_dev->open_count--;
+ mutex_unlock(&pmercury_dev->lock);
+
+ msm_mercury_q_cleanup(&pmercury_dev->evt_q);
+
+ if (pmercury_dev->open_count)
+ MCR_PR_ERR(KERN_ERR "%s: multiple opens\n", __func__);
+
+ if (pmercury_dev->open_count)
+ MCR_PR_ERR(KERN_ERR "%s: multiple opens\n", __func__);
+
+
+ msm_mercury_platform_release(pmercury_dev->mem, pmercury_dev->base,
+ pmercury_dev->irq, pmercury_dev);
+
+ return 0;
+}
+
+int msm_mercury_ioctl_hw_cmd(struct msm_mercury_device *pmercury_dev,
+ void * __user arg)
+{
+ struct msm_mercury_hw_cmd hw_cmd;
+ int is_copy_to_user;
+ int rc = 0;
+
+ rc = copy_from_user(&hw_cmd, arg, sizeof(struct msm_mercury_hw_cmd));
+ if (rc) {
+ MCR_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
+ return -EFAULT;
+ }
+
+ is_copy_to_user = msm_mercury_hw_exec_cmds(&hw_cmd, 1);
+ if (is_copy_to_user >= 0) {
+ rc = copy_to_user(arg, &hw_cmd, sizeof(hw_cmd));
+
+ if (rc) {
+ MCR_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
+ return -EFAULT;
+ }
+ }
+
+ return 0;
+}
+
+int msm_mercury_ioctl_hw_cmds(struct msm_mercury_device *pmercury_dev,
+ void * __user arg)
+{
+ int is_copy_to_user;
+ int len;
+ uint32_t m;
+ struct msm_mercury_hw_cmds *hw_cmds_p;
+ struct msm_mercury_hw_cmd *hw_cmd_p;
+
+ if (copy_from_user(&m, arg, sizeof(m))) {
+ MCR_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
+ return -EFAULT;
+ }
+
+ len = sizeof(struct msm_mercury_hw_cmds) +
+ sizeof(struct msm_mercury_hw_cmd) * (m - 1);
+ hw_cmds_p = kmalloc(len, GFP_KERNEL);
+ if (!hw_cmds_p) {
+ MCR_PR_ERR("[%d]%s() no mem %d\n", __LINE__, __func__, len);
+ return -EFAULT;
+ }
+
+ if (copy_from_user(hw_cmds_p, arg, len)) {
+ MCR_PR_ERR("[%d]%s Fail to copy hw_cmds of len %d from user\n",
+ __LINE__, __func__, len);
+ kfree(hw_cmds_p);
+ return -EFAULT;
+ }
+
+ hw_cmd_p = (struct msm_mercury_hw_cmd *) &(hw_cmds_p->hw_cmd);
+
+ is_copy_to_user = msm_mercury_hw_exec_cmds(hw_cmd_p, m);
+
+ if (is_copy_to_user >= 0) {
+ if (copy_to_user(arg, hw_cmds_p, len)) {
+ MCR_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
+ kfree(hw_cmds_p);
+ return -EFAULT;
+ }
+ }
+ kfree(hw_cmds_p);
+ return 0;
+}
+
+int msm_mercury_ioctl_reset(struct msm_mercury_device *pmercury_dev,
+ void * __user arg)
+{
+ int rc = 0;
+
+ MCR_DBG("(%d)%s() Enter\n", __LINE__, __func__);
+ rc = msm_mercury_core_reset();
+
+ return rc;
+}
+
+long __msm_mercury_ioctl(struct msm_mercury_device *pmercury_dev,
+ unsigned int cmd, unsigned long arg)
+{
+ int rc = 0;
+
+ switch (cmd) {
+ case MSM_MCR_IOCTL_GET_HW_VERSION:
+ rc = msm_mercury_ioctl_magic_code(pmercury_dev,
+ (void __user *) arg);
+ break;
+
+ case MSM_MCR_IOCTL_RESET:
+ rc = msm_mercury_ioctl_reset(pmercury_dev, (void __user *) arg);
+ break;
+
+ case MSM_MCR_IOCTL_EVT_GET:
+ rc = msm_mercury_evt_get(pmercury_dev, (void __user *) arg);
+ break;
+
+ case MSM_MCR_IOCTL_EVT_GET_UNBLOCK:
+ rc = msm_mercury_evt_get_unblock(pmercury_dev);
+ break;
+
+ case MSM_MCR_IOCTL_HW_CMD:
+ rc = msm_mercury_ioctl_hw_cmd(pmercury_dev,
+ (void __user *) arg);
+ break;
+
+ case MSM_MCR_IOCTL_HW_CMDS:
+ rc = msm_mercury_ioctl_hw_cmds(pmercury_dev,
+ (void __user *) arg);
+ break;
+
+ case MSM_MCR_IOCTL_INPUT_BUF_CFG:
+ rc = msm_mercury_input_buf_cfg(pmercury_dev,
+ (void __user *) arg);
+ break;
+
+ case MSM_MCR_IOCTL_OUTPUT_BUF_CFG:
+ rc = msm_mercury_output_buf_cfg(pmercury_dev,
+ (void __user *) arg);
+ break;
+
+ case MSM_MCR_IOCTL_OUTPUT_GET:
+ rc = msm_mercury_output_get(pmercury_dev,
+ (void __user *) arg);
+ break;
+
+ case MSM_MCR_IOCTL_INPUT_GET:
+ rc = msm_mercury_input_get(pmercury_dev,
+ (void __user *) arg);
+ break;
+
+ case MSM_MCR_IOCTL_TEST_DUMP_REGION:
+ rc = msm_mercury_ioctl_dump_regs();
+ break;
+
+ default:
+ printk(KERN_ERR "(%d)%s() cmd = %d not supported\n",
+ __LINE__, __func__, _IOC_NR(cmd));
+ rc = -EINVAL;
+ break;
+ }
+ return rc;
+}
+
+struct msm_mercury_device *__msm_mercury_init(struct platform_device *pdev)
+{
+ struct msm_mercury_device *pmercury_dev;
+ pmercury_dev = kzalloc(sizeof(struct msm_mercury_device), GFP_ATOMIC);
+ if (!pmercury_dev) {
+ printk(KERN_ERR "%s:%d]no mem\n", __func__, __LINE__);
+ return NULL;
+ }
+
+ mutex_init(&pmercury_dev->lock);
+
+ pmercury_dev->pdev = pdev;
+
+ msm_mercury_q_init("evt_q", &pmercury_dev->evt_q);
+
+ return pmercury_dev;
+}
+
+int __msm_mercury_exit(struct msm_mercury_device *pmercury_dev)
+{
+ mutex_destroy(&pmercury_dev->lock);
+ kfree(pmercury_dev);
+ return 0;
+}
+
diff --git a/drivers/media/video/msm/mercury/msm_mercury_sync.h b/drivers/media/video/msm/mercury/msm_mercury_sync.h
new file mode 100644
index 0000000..f392907
--- /dev/null
+++ b/drivers/media/video/msm/mercury/msm_mercury_sync.h
@@ -0,0 +1,67 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef MSM_MERCURY_SYNC_H
+#define MSM_MERCURY_SYNC_H
+
+#include <linux/fs.h>
+#include <linux/list.h>
+#include <linux/cdev.h>
+#include <linux/platform_device.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-subdev.h>
+#include "msm_mercury_core.h"
+
+struct msm_mercury_q {
+ char const *name;
+ struct list_head q;
+ spinlock_t lck;
+ wait_queue_head_t wait;
+ int unblck;
+};
+
+struct msm_mercury_q_entry {
+ struct list_head list;
+ void *data;
+};
+
+struct msm_mercury_device {
+ struct platform_device *pdev;
+ struct resource *mem;
+ int irq;
+ void *base;
+ struct clk *mercury_clk[2];
+ struct device *device;
+ struct cdev cdev;
+ struct mutex lock;
+ char open_count;
+ uint8_t op_mode;
+
+ /* event queue including frame done & err indications*/
+ struct msm_mercury_q evt_q;
+ struct v4l2_subdev subdev;
+
+};
+
+int __msm_mercury_open(struct msm_mercury_device *pmcry_dev);
+int __msm_mercury_release(struct msm_mercury_device *pmcry_dev);
+
+long __msm_mercury_ioctl(struct msm_mercury_device *pmcry_dev,
+ unsigned int cmd, unsigned long arg);
+
+struct msm_mercury_device *__msm_mercury_init(struct platform_device *pdev);
+int __msm_mercury_exit(struct msm_mercury_device *pmcry_dev);
+int msm_mercury_ioctl_hw_cmds(struct msm_mercury_device *pmcry_dev,
+ void * __user arg);
+int msm_mercury_ioctl_hw_cmds_wo(struct msm_mercury_device *pmcry_dev,
+ void * __user arg);
+#endif /* MSM_MERCURY_SYNC_H */
diff --git a/drivers/media/video/msm/msm.h b/drivers/media/video/msm/msm.h
index 9c3b548..9e770db 100644
--- a/drivers/media/video/msm/msm.h
+++ b/drivers/media/video/msm/msm.h
@@ -50,6 +50,7 @@
#define MSM_VFE_DRV_NAME "msm_vfe"
#define MSM_VPE_DRV_NAME "msm_vpe"
#define MSM_GEMINI_DRV_NAME "msm_gemini"
+#define MSM_MERCURY_DRV_NAME "msm_mercury"
#define MSM_I2C_MUX_DRV_NAME "msm_cam_i2c_mux"
#define MAX_NUM_CSIPHY_DEV 3
diff --git a/include/media/Kbuild b/include/media/Kbuild
index 03951ce..2a21336 100644
--- a/include/media/Kbuild
+++ b/include/media/Kbuild
@@ -5,3 +5,4 @@
header-y += msm_isp.h
header-y += msm_gemini.h
header-y += msm_gestures.h
+header-y += msm_mercury.h
diff --git a/include/media/msm_mercury.h b/include/media/msm_mercury.h
new file mode 100644
index 0000000..1d14724
--- /dev/null
+++ b/include/media/msm_mercury.h
@@ -0,0 +1,119 @@
+#ifndef __LINUX_MSM_MERCURY_H
+#define __LINUX_MSM_MERCURY_H
+
+#include <linux/types.h>
+#include <linux/ioctl.h>
+
+#define MSM_MERCURY_HW_VERSION_REG 0x0004/* this offset does not exist in HW*/
+
+#define OUTPUT_H2V1 0
+#define OUTPUT_H2V2 1
+#define OUTPUT_BYTE 6
+
+#define MSM_MERCURY_MODE_REALTIME_ENCODE 0
+#define MSM_MERCURY_MODE_OFFLINE_ENCODE 1
+#define MSM_MERCURY_MODE_REALTIME_ROTATION 2
+#define MSM_MERCURY_MODE_OFFLINE_ROTATION 3
+
+#define MSM_MERCURY_EVT_RESET 1
+#define MSM_MERCURY_EVT_FRAMEDONE 2
+#define MSM_MERCURY_EVT_ERR 3
+#define MSM_MERCURY_EVT_UNBLOCK 4
+
+#define MSM_MERCURY_HW_CMD_TYPE_READ 0
+#define MSM_MERCURY_HW_CMD_TYPE_WRITE 1
+#define MSM_MERCURY_HW_CMD_TYPE_WRITE_OR 2
+#define MSM_MERCURY_HW_CMD_TYPE_UWAIT 3
+#define MSM_MERCURY_HW_CMD_TYPE_MWAIT 4
+#define MSM_MERCURY_HW_CMD_TYPE_MDELAY 5
+#define MSM_MERCURY_HW_CMD_TYPE_UDELAY 6
+
+#define MSM_MCR_IOCTL_MAGIC 'g'
+
+#define MSM_MCR_IOCTL_GET_HW_VERSION \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 1, struct msm_mercury_hw_cmd *)
+
+#define MSM_MCR_IOCTL_RESET \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 2, struct msm_mercury_ctrl_cmd *)
+
+#define MSM_MCR_IOCTL_STOP \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 3, struct msm_mercury_hw_cmds *)
+
+#define MSM_MCR_IOCTL_START \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 4, struct msm_mercury_hw_cmds *)
+
+#define MSM_MCR_IOCTL_INPUT_BUF_CFG \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 5, struct msm_mercury_buf *)
+
+#define MSM_MCR_IOCTL_INPUT_GET \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 6, struct msm_mercury_buf *)
+
+#define MSM_MCR_IOCTL_INPUT_GET_UNBLOCK \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 7, int)
+
+#define MSM_MCR_IOCTL_OUTPUT_BUF_CFG \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 8, struct msm_mercury_buf *)
+
+#define MSM_MCR_IOCTL_OUTPUT_GET \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 9, struct msm_mercury_buf *)
+
+#define MSM_MCR_IOCTL_OUTPUT_GET_UNBLOCK \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 10, int)
+
+#define MSM_MCR_IOCTL_EVT_GET \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 11, struct msm_mercury_ctrl_cmd *)
+
+#define MSM_MCR_IOCTL_EVT_GET_UNBLOCK \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 12, int)
+
+#define MSM_MCR_IOCTL_HW_CMD \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 13, struct msm_mercury_hw_cmd *)
+
+#define MSM_MCR_IOCTL_HW_CMDS \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 14, struct msm_mercury_hw_cmds *)
+
+#define MSM_MCR_IOCTL_TEST_DUMP_REGION \
+ _IOW(MSM_MCR_IOCTL_MAGIC, 15, unsigned long)
+
+struct msm_mercury_ctrl_cmd {
+ uint32_t type;
+ uint32_t len;
+ void *value;
+};
+
+struct msm_mercury_buf {
+ uint32_t type;
+ int fd;
+ void *vaddr;
+ uint32_t y_off;
+ uint32_t y_len;
+ uint32_t framedone_len;
+ uint32_t cbcr_off;
+ uint32_t cbcr_len;
+ uint32_t num_of_mcu_rows;
+ uint32_t offset;
+};
+
+struct msm_mercury_hw_cmd {
+
+ uint32_t type:4;
+ /* n microseconds of timeout for WAIT */
+ /* n microseconds of time for DELAY */
+ /* repeat n times for READ/WRITE */
+ /* max is 0xFFF, 4095 */
+ uint32_t n:12;
+ uint32_t offset:16;
+ uint32_t mask;
+ union {
+ /* for single READ/WRITE/WAIT, n = 1 */
+ uint32_t data;
+ uint32_t *pdata;/* for multiple READ/WRITE/WAIT, n > 1 */
+ };
+};
+
+struct msm_mercury_hw_cmds {
+ uint32_t m; /* number of elements in the hw_cmd array */
+ struct msm_mercury_hw_cmd hw_cmd[1];
+};
+
+#endif /* __LINUX_MSM_MERCURY_H */