msm: spm: Add API to turn cpu rail on.
Bootloaders will not turn on secondary cores and enable only the primary
core. The kernel would be needed to turn on all secondary cores through
SPM. The API will abstract turning on a core rail from boot_secondary().
CRs-fixed: 329019
Change-Id: I294ad8a441c3721e39f7c719fa9559fa196f4083
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
diff --git a/arch/arm/mach-msm/spm_devices.c b/arch/arm/mach-msm/spm_devices.c
index 6ea9327..326faef 100644
--- a/arch/arm/mach-msm/spm_devices.c
+++ b/arch/arm/mach-msm/spm_devices.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -162,6 +162,40 @@
return ret;
}
+int msm_spm_turn_on_cpu_rail(unsigned int cpu)
+{
+ uint32_t val = 0;
+ uint32_t timeout = 0;
+ void *reg = NULL;
+
+ if (cpu >= num_possible_cpus())
+ return -EINVAL;
+
+ switch (cpu) {
+ case 1:
+ reg = MSM_SAW1_BASE;
+ break;
+ case 0:
+ default:
+ return -EFAULT;
+ }
+
+ if (cpu_is_msm8960() || cpu_is_msm8930()) {
+ val = 0xB0;
+ reg += 0x14;
+ timeout = 512;
+ } else {
+ return -ENOSYS;
+ }
+
+ writel_relaxed(val, reg);
+ mb();
+ udelay(timeout);
+
+ return 0;
+}
+EXPORT_SYMBOL(msm_spm_turn_on_cpu_rail);
+
#if defined(CONFIG_MSM_L2_SPM)
static struct msm_spm_device msm_spm_l2_device;