commit | ce203ea3cacf4bd1b211dd238ba8b9ddbfd61008 | [log] [tgz] |
---|---|---|
author | Matt Wagantall <mattw@codeaurora.org> | Mon Feb 13 12:02:01 2012 -0800 |
committer | Matt Wagantall <mattw@codeaurora.org> | Thu Feb 16 12:25:43 2012 -0800 |
tree | ca406a27813eed492a4b1022df2e1555bb3a3d7e | |
parent | 9621cd122c591042b7263bdfefa46d9f5c257449 [diff] |
msm: pil-q6v4: Remove 8960v1.0 hardware workaround The first version of 8960 silicon required auto-gating for Q6SS_AXIS_ACLK to be disabled as part of the PIL reset sequence. Since this HW issue was resolved in later silicon versions, and the version with the issue was never productized, remove the unnecessary code. Change-Id: I27a9d48335d499c0763a2c5cb4640f9e559681b2 Signed-off-by: Matt Wagantall <mattw@codeaurora.org>