spi_qsd: Add BAM mode support to SPI driver
The new SPI QUP-core version-2, adds support to a new DMA
engine, adds a new register, and introduces some changes to
existing registers. The new BAM DMA engine supersedes the
older Data-Mover DMA engine. The new register, the hardware-
version register, is used by the patch to query the hardware
about its precise version. Using the precise version the driver
may verify HW support for the BAM mode.
This patch keeps backward compatibility with older
Qualcomm SPI-controllers exisiting in and QUP-core-ver-1 and
pre-QUP cores. The new QUP-core-ver-2 features three transfer
modes each optimized for a different transfer size: FIFO-mode for
small transfers, Block-mode for mid-size transfers, and BAM mode
for large size transfers. The current SPI driver supports only FIFO
mode. This mode is utilized for transfers of all sized. This patch
enables BAM-mode for mid to large size transfers. Using of the
BAM engine for large transfers, reliefs the CPU of slow IO
operations.
The patch relies on new platform-specific-data entries to read
values for BAM configuration.
Change-Id: I8baa89e6e33197c6265ab7f38965e7c3e10e80f8
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
3 files changed