msm: acpuclock-8930: Use level values for the max vdd of vdd_dig regulator
The voltage of vdd_dig is specified using the corner level values. Fix
the use of the max vdd to be the level values instead of the concrete
voltage number.
Change-Id: I10fa63c70af1d6510f9378ec7529ad00930e4cfa
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
diff --git a/arch/arm/mach-msm/acpuclock-8930.c b/arch/arm/mach-msm/acpuclock-8930.c
index 6915343..e29d6fe 100644
--- a/arch/arm/mach-msm/acpuclock-8930.c
+++ b/arch/arm/mach-msm/acpuclock-8930.c
@@ -54,7 +54,7 @@
.l2cpmr_iaddr = 0x4501,
.vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
- .vreg[VREG_DIG] = { "krait0_dig", 1150000 },
+ .vreg[VREG_DIG] = { "krait0_dig", LVL_HIGH},
.vreg[VREG_HFPLL_A] = { "krait0_s8", 2050000 },
.vreg[VREG_HFPLL_B] = { "krait0_l23", 1800000 },
},
@@ -66,7 +66,7 @@
.l2cpmr_iaddr = 0x5501,
.vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
- .vreg[VREG_DIG] = { "krait1_dig", 1150000 },
+ .vreg[VREG_DIG] = { "krait1_dig", LVL_HIGH},
.vreg[VREG_HFPLL_A] = { "krait1_s8", 2050000 },
.vreg[VREG_HFPLL_B] = { "krait1_l23", 1800000 },
},
@@ -90,7 +90,7 @@
.l2cpmr_iaddr = 0x4501,
.vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
- .vreg[VREG_DIG] = { "krait0_dig", 1150000 },
+ .vreg[VREG_DIG] = { "krait0_dig", LVL_HIGH},
.vreg[VREG_HFPLL_A] = { "krait0_hfpll", 1800000 },
},
[CPU1] = {
@@ -101,7 +101,7 @@
.l2cpmr_iaddr = 0x5501,
.vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
- .vreg[VREG_DIG] = { "krait1_dig", 1150000 },
+ .vreg[VREG_DIG] = { "krait1_dig", LVL_HIGH},
.vreg[VREG_HFPLL_A] = { "krait1_hfpll", 1800000 },
},
[L2] = {
diff --git a/arch/arm/mach-msm/acpuclock-8930aa.c b/arch/arm/mach-msm/acpuclock-8930aa.c
index 9aebac9..c824323 100644
--- a/arch/arm/mach-msm/acpuclock-8930aa.c
+++ b/arch/arm/mach-msm/acpuclock-8930aa.c
@@ -54,7 +54,7 @@
.l2cpmr_iaddr = 0x4501,
.vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
- .vreg[VREG_DIG] = { "krait0_dig", 1150000 },
+ .vreg[VREG_DIG] = { "krait0_dig", LVL_HIGH},
.vreg[VREG_HFPLL_A] = { "krait0_hfpll", 1800000 },
},
[CPU1] = {
@@ -65,7 +65,7 @@
.l2cpmr_iaddr = 0x5501,
.vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
- .vreg[VREG_DIG] = { "krait1_dig", 1150000 },
+ .vreg[VREG_DIG] = { "krait1_dig", LVL_HIGH},
.vreg[VREG_HFPLL_A] = { "krait1_hfpll", 1800000 },
},
[L2] = {
diff --git a/arch/arm/mach-msm/acpuclock-8930ab.c b/arch/arm/mach-msm/acpuclock-8930ab.c
index 215f213..bcf2451 100644
--- a/arch/arm/mach-msm/acpuclock-8930ab.c
+++ b/arch/arm/mach-msm/acpuclock-8930ab.c
@@ -54,7 +54,7 @@
.l2cpmr_iaddr = 0x4501,
.vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
- .vreg[VREG_DIG] = { "krait0_dig", 1150000 },
+ .vreg[VREG_DIG] = { "krait0_dig", LVL_HIGH},
.vreg[VREG_HFPLL_A] = { "krait0_s8", 2050000 },
.vreg[VREG_HFPLL_B] = { "krait0_l23", 1800000 },
},
@@ -66,7 +66,7 @@
.l2cpmr_iaddr = 0x5501,
.vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
- .vreg[VREG_DIG] = { "krait1_dig", 1150000 },
+ .vreg[VREG_DIG] = { "krait1_dig", LVL_HIGH},
.vreg[VREG_HFPLL_A] = { "krait1_s8", 2050000 },
.vreg[VREG_HFPLL_B] = { "krait1_l23", 1800000 },
},
@@ -90,7 +90,7 @@
.l2cpmr_iaddr = 0x4501,
.vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
- .vreg[VREG_DIG] = { "krait0_dig", 1150000 },
+ .vreg[VREG_DIG] = { "krait0_dig", LVL_HIGH},
.vreg[VREG_HFPLL_A] = { "krait0_hfpll", 1800000 },
},
[CPU1] = {
@@ -101,7 +101,7 @@
.l2cpmr_iaddr = 0x5501,
.vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
- .vreg[VREG_DIG] = { "krait1_dig", 1150000 },
+ .vreg[VREG_DIG] = { "krait1_dig", LVL_HIGH},
.vreg[VREG_HFPLL_A] = { "krait1_hfpll", 1800000 },
},
[L2] = {