Merge "msm: dcvs: rearrange platform data"
diff --git a/AndroidKernel.mk b/AndroidKernel.mk
index 3ee63c0..3684a3f 100644
--- a/AndroidKernel.mk
+++ b/AndroidKernel.mk
@@ -11,11 +11,10 @@
KERNEL_MODULES_OUT := $(TARGET_OUT)/lib/modules
KERNEL_IMG=$(KERNEL_OUT)/arch/arm/boot/Image
-MSM_ARCH ?= $(shell $(PERL) -e 'while (<>) {$$a = $$1 if /CONFIG_ARCH_((?:MSM|QSD)[a-zA-Z0-9]+)=y/; $$r = $$1 if /CONFIG_MSM_SOC_REV_(?!NONE)(\w+)=y/;} print lc("$$a$$r\n");' $(KERNEL_CONFIG))
+DTS_NAMES ?= $(shell $(PERL) -e 'while (<>) {$$a = $$1 if /CONFIG_ARCH_((?:MSM|QSD|MPQ)[a-zA-Z0-9]+)=y/; $$r = $$1 if /CONFIG_MSM_SOC_REV_(?!NONE)(\w+)=y/; $$arch = $$arch.lc("$$a$$r ") if /CONFIG_ARCH_((?:MSM|QSD|MPQ)[a-zA-Z0-9]+)=y/} print $$arch;' $(KERNEL_CONFIG))
KERNEL_USE_OF ?= $(shell $(PERL) -e '$$of = "n"; while (<>) { if (/CONFIG_USE_OF=y/) { $$of = "y"; break; } } print $$of;' kernel/arch/arm/configs/$(KERNEL_DEFCONFIG))
ifeq "$(KERNEL_USE_OF)" "y"
-DTS_NAME ?= $(MSM_ARCH)
DTS_FILES = $(wildcard $(TOP)/kernel/arch/arm/boot/dts/$(DTS_NAME)*.dts)
DTS_FILE = $(lastword $(subst /, ,$(1)))
DTB_FILE = $(addprefix $(KERNEL_OUT)/arch/arm/boot/,$(patsubst %.dts,%.dtb,$(call DTS_FILE,$(1))))
@@ -25,9 +24,10 @@
define append-dtb
mkdir -p $(KERNEL_OUT)/arch/arm/boot;\
-$(foreach d, $(DTS_FILES), \
- $(DTC) -p 1024 -O dtb -o $(call DTB_FILE,$(d)) $(d); \
- cat $(KERNEL_ZIMG) $(call DTB_FILE,$(d)) > $(call ZIMG_FILE,$(d));)
+$(foreach DTS_NAME, $(DTS_NAMES), \
+ $(foreach d, $(DTS_FILES), \
+ $(DTC) -p 1024 -O dtb -o $(call DTB_FILE,$(d)) $(d); \
+ cat $(KERNEL_ZIMG) $(call DTB_FILE,$(d)) > $(call ZIMG_FILE,$(d));))
endef
else
@@ -70,7 +70,7 @@
$(TARGET_PREBUILT_INT_KERNEL): $(KERNEL_OUT) $(KERNEL_CONFIG) $(KERNEL_HEADERS_INSTALL)
$(MAKE) -C kernel O=../$(KERNEL_OUT) ARCH=arm CROSS_COMPILE=arm-eabi-
$(MAKE) -C kernel O=../$(KERNEL_OUT) ARCH=arm CROSS_COMPILE=arm-eabi- modules
- $(MAKE) -C kernel O=../$(KERNEL_OUT) INSTALL_MOD_PATH=../../$(KERNEL_MODULES_INSTALL) ARCH=arm CROSS_COMPILE=arm-eabi- modules_install
+ $(MAKE) -C kernel O=../$(KERNEL_OUT) INSTALL_MOD_PATH=../../$(KERNEL_MODULES_INSTALL) INSTALL_MOD_STRIP=1 ARCH=arm CROSS_COMPILE=arm-eabi- modules_install
$(mv-modules)
$(clean-module-folder)
$(append-dtb)
diff --git a/Documentation/arm/msm/adsprpc-drv.txt b/Documentation/arm/msm/adsprpc-drv.txt
new file mode 100644
index 0000000..f468ddb
--- /dev/null
+++ b/Documentation/arm/msm/adsprpc-drv.txt
@@ -0,0 +1,198 @@
+Introduction
+============
+
+The MSM ADSPRPC driver implements an IPC (Inter-Processor Communication)
+mechanism that allows for clients to transparently make remote method
+invocations across processor boundaries.
+
+The below diagram depicts invocation of a single method where the client
+and objects reside on different processors. An object could expose
+multiple methods which can be grouped together and referred to as an
+interface.
+
+: ,--------, ,------, ,-----------, ,------, ,--------,
+: | | method | | | | | | method | |
+: | Client |------->| Stub |->| Transport |->| Skel |------->| Object |
+: | | | | | | | | | |
+: `--------` `------` `-----------` `------` `--------`
+
+Client: Linux user mode process that initiates the remote invocation
+Stub: Auto generated code linked in with the user mode process that
+ takes care of marshaling parameters
+Transport: Involved in carrying an invocation from a client to an
+ object. This involves two portions: 1) MSM ADSPRPC Linux
+ kernel driver that receives the remote invocation, queues
+ them up and then waits for the response after signaling the
+ remote side. 2) Service running on the remote side that
+ dequeues the messages from the queue and dispatches them for
+ processing.
+Skel: Auto generated code that takes care of un-marshaling
+ parameters
+Object: Method implementation
+
+Hardware description
+====================
+
+The driver interfaces with the components in the DSP subsystem and does
+not drive or manage any hardware resources.
+
+Software description
+====================
+
+The MSM ADSPRPC driver uses SMD (Shared Memory Driver) to send and
+receive messages with the remote processor. The SMD channel used for
+communication is opened during initialization of the driver and is
+closed when the driver module is unloaded. The driver does not expose
+HLOS memory to the remote processor but rather communication of
+invocation parameters happen over ION allocated buffers.
+
+The driver receives remote call invocations via an ioctl call. When a
+remote call invocation is received, the driver does the following:
+- Retrieves the invocation parameters
+- Copies input buffers in HLOS memory to ION allocated buffers
+- Allocates ION buffers for output buffers in HLOS memory as required
+- Scatter-gathers list of pages for ION allocated input and output
+ buffers
+- Coalesces information about the contiguous page buffers
+- Builds up a message with the received information
+- Sends the message to a remote processor through an SMD channel
+- Waits for a response from the remote processor through the SMD channel
+- Reads the message available from the shared memory SMD channel
+- Copies back from ION buffers to HLOS memory for output buffers
+- Returns the response of the remote invocation
+
+Design
+======
+
+The design goals of this transport mechanism are:
+- Fast and efficient ways to transfer huge buffers across
+ inter-processor boundaries
+- Zero copy of ION allocated buffers passed during invocations
+
+To achieve the zero copy approach of ION allocated user space buffers,
+the driver scatter-gathers the list of pages of the buffers being passed
+in. This information is then sent over to the remote processor for it
+to map into its address space.
+
+The invocation requests sent over the SMD channel carry context
+information as to whom the request is originating from. The responses
+received over the SMD channel have context information in the message
+which is then used to wake the thread waiting for a response.
+
+If the remote processor goes down and gets restarted, the SMD channel
+is re-initialized when the remote processor comes back up. An
+error code would be returned to the client for all invocations that
+happen before the SMD channel could get completely re-initialized.
+
+Power Management
+================
+
+None
+
+SMP/multi-core
+==============
+
+The driver uses semaphores to wake up clients waiting for a remote
+invocation response.
+
+Security
+========
+
+Use of the zero copy approach results in a page-size granularity of
+all buffers being passed to the remote processor. The objects that will
+be manipulating these buffers on the remote processor will be signed
+and trusted entities, thereby alleviating any fear of intentional
+scribbling of these buffers.
+
+Performance
+===========
+
+In order to minimize latencies across remote invocations:
+- messages exchanged between the remote processors are kept short
+- zero copy approach for ION allocated user space buffers
+
+Interface
+=========
+
+The driver exposes a user space interface through /dev/adsprpc-smd and
+the user space clients send commands to the driver by using the
+following ioctl command:
+
+- FASTRPC_IOCTL_INVOKE: Parameters passed in includes the buffers and
+ data related to remote invocation.
+
+ /*
+ * Information about the input/output buffer or an handle to the
+ * object being passed in the remote invocation
+ *
+ * @pv: Pointer to input/output buffer
+ * @len: Length of the input/output buffer
+ * @handle: Handle to the remote object
+ */
+ typedef union {
+ struct remote_buf {
+ void *pv;
+ int len;
+ } buf;
+ unsigned int handle;
+ } remote_arg;
+
+ /*
+ * Invocation parameters passed via ioctl call by the client
+ *
+ * @handle: Handle to the object on which the method is to be
+ * invoked
+ * @sc: Scalars detailing the parameters being passed in
+ * bits 0-3: Number of output handles
+ * bits 4-7: Number of input handles
+ * bits 8-15: Number of output buffers
+ * bits 16-23: Number of input buffers
+ * bits 24-28: Method to be invoked
+ * bits 29-31: Method attributes
+ * @pra: Remote arguments to be passed for method invocation
+ */
+ struct fastrpc_ioctl_invoke {
+ unsigned int handle;
+ unsigned int sc;
+ remote_arg *pra;
+ };
+
+Driver parameters
+=================
+
+None
+
+Config options
+==============
+
+None
+
+Dependencies
+============
+
+The ADSPRPC driver requires that the ADSP RPC SMD channel be created and
+the SMD subsystem be initialized. During initialization, the driver
+opens an existing SMD edge channel between ADSP and Apps processor. On
+success, the driver waits for the "channel opened" event from SMD,
+acknowledging the channel availability from the remote SMD driver for
+communication to begin.
+
+User space utilities
+====================
+
+None
+
+Other
+=====
+
+None
+
+Known issues
+============
+
+None
+
+To do
+=====
+
+None
diff --git a/Documentation/block/row-iosched.txt b/Documentation/block/row-iosched.txt
new file mode 100644
index 0000000..987bd88
--- /dev/null
+++ b/Documentation/block/row-iosched.txt
@@ -0,0 +1,117 @@
+Introduction
+============
+
+The ROW scheduling algorithm will be used in mobile devices as default
+block layer IO scheduling algorithm. ROW stands for "READ Over WRITE"
+which is the main requests dispatch policy of this algorithm.
+
+The ROW IO scheduler was developed with the mobile devices needs in
+mind. In mobile devices we favor user experience upon everything else,
+thus we want to give READ IO requests as much priority as possible.
+The main idea of the ROW scheduling policy is:
+If there are READ requests in pipe - dispatch them but don't starve
+the WRITE requests too much.
+
+Software description
+====================
+The requests are kept in queues according to their priority. The
+dispatching of requests is done in a Round Robin manner with a
+different slice for each queue. The dispatch quantum for a specific
+queue is defined according to the queues priority. READ queues are
+given bigger dispatch quantum than the WRITE queues, within a dispatch
+cycle.
+
+At the moment there are 6 types of queues the requests are
+distributed to:
+- High priority READ queue
+- High priority Synchronous WRITE queue
+- Regular priority READ queue
+- Regular priority Synchronous WRITE queue
+- Regular priority WRITE queue
+- Low priority READ queue
+
+If in a certain dispatch cycle one of the queues was empty and didn't
+use its quantum that queue will be marked as "un-served". If we're in a
+middle of a dispatch cycle dispatching from queue Y and a request
+arrives for queue X that was un-served in the previous cycle, if X's
+priority is higher than Y's, queue X will be preempted in the favor of
+queue Y. This won't mean that cycle is restarted. The "dispatched"
+counter of queue X will remain unchanged. Once queue Y uses up it's quantum
+(or there will be no more requests left on it) we'll switch back to queue X
+and allow it to finish it's quantum.
+
+For READ requests queues we allow idling in within a dispatch quantum in
+order to give the application a chance to insert more requests. Idling
+means adding some extra time for serving a certain queue even if the
+queue is empty. The idling is enabled if we identify the application is
+inserting requests in a high frequency.
+
+For idling on READ queues we use timer mechanism. When the timer expires,
+if there are requests in the scheduler we will signal the underlying driver
+(for example the MMC driver) to fetch another request for dispatch.
+
+The ROW algorithm takes the scheduling policy one step further, making
+it a bit more "user-needs oriented", by allowing the application to
+hint on the urgency of its requests. For example: even among the READ
+requests several requests may be more urgent for completion then others.
+The former will go to the High priority READ queue, that is given the
+bigger dispatch quantum than any other queue.
+
+ROW scheduler will support special services for block devices that
+supports High Priority Requests. That is, the scheduler may inform the
+device upon urgent requests using new callback make_urgent_request.
+In addition it will support rescheduling of requests that were
+interrupted. For example, if the device issues a long write request and
+a sudden high priority read interrupt pops in, the scheduler will
+inform the device about the urgent request, so the device can stop the
+current write request and serve the high priority read request. In such
+a case the device may also send back to the scheduler the reminder of
+the interrupted write request, such that the scheduler may continue
+sending high priority requests without the need to interrupt the
+ongoing write again and again. The write remainder will be sent later on
+according to the scheduler policy.
+
+Design
+======
+Existing algorithms (cfq, deadline) sort the io requests according LBA.
+When deciding on the next request to dispatch they choose the closest
+request to the current disk head position (from handling last
+dispatched request). This is done in order to reduce the disk head
+movement to a minimum.
+We feel that this functionality isn't really needed in mobile devices.
+Usually applications that write/read large chunks of data insert the
+requests in already sorted LBA order. Thus dealing with sort trees adds
+unnecessary complexity.
+
+We're planing to try this enhancement in the future to check if the
+performance is influenced by it.
+
+SMP/multi-core
+==============
+At the moment the code is acceded from 2 contexts:
+- Application context (from block/elevator layer): adding the requests.
+- Underlying driver context (for example the mmc driver thread): dispatching
+ the requests and notifying on completion.
+
+One lock is used to synchronize between the two. This lock is provided
+by the underlying driver along with the dispatch queue.
+
+Config options
+==============
+1. hp_read_quantum: dispatch quantum for the high priority READ queue
+2. rp_read_quantum: dispatch quantum for the regular priority READ queue
+3. hp_swrite_quantum: dispatch quantum for the high priority Synchronous
+ WRITE queue
+4. rp_swrite_quantum: dispatch quantum for the regular priority
+ Synchronous WRITE queue
+5. rp_write_quantum: dispatch quantum for the regular priority WRITE
+ queue
+6. lp_read_quantum: dispatch quantum for the low priority READ queue
+7. lp_swrite_quantum: dispatch quantum for the low priority Synchronous
+ WRITE queue
+8. read_idle: how long to idle on read queue in Msec (in case idling
+ is enabled on that queue).
+9. read_idle_freq: frequency of inserting READ requests that will
+ trigger idling. This is the time in Msec between inserting two READ
+ requests
+
diff --git a/Documentation/devicetree/bindings/arm/msm/qcom-wdog-debug.txt b/Documentation/devicetree/bindings/arm/msm/qcom-wdog-debug.txt
new file mode 100644
index 0000000..e5fd1b2
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/qcom-wdog-debug.txt
@@ -0,0 +1,16 @@
+* Qualcomm's Watchdog Debug Image Controller
+
+The Qualcomm's Watchdog debug image controller is used for enabling/disabling of
+watchdog debug image feature.
+
+Required properties:
+- compatible : should be "qcom,msm-wdog-debug"
+- reg : base page aligned physical base address of the controller and length of
+ memory mapped region.
+
+Example:
+
+ qcom,msm-wdog-debug@fc401000 {
+ compatible = "qcom,msm-wdogi-debug";
+ reg = <0xfc401000 0x1000>;
+ };
diff --git a/Documentation/devicetree/bindings/cache/msm_cache_dump.txt b/Documentation/devicetree/bindings/cache/msm_cache_dump.txt
new file mode 100644
index 0000000..b7a68b5
--- /dev/null
+++ b/Documentation/devicetree/bindings/cache/msm_cache_dump.txt
@@ -0,0 +1,24 @@
+* Qualcomm Krait L1 / L2 cache dumping device
+This is a virtual device that dumps the contents of L1 and L2 caches in the
+event of a kernel panic or a watchdog trigger.
+
+Required properties:
+- compatible: Should be "qcom,cache_dump"
+- qcom,l1-dump-size: Amount of memory needed for L1 dump(s), in bytes
+- qcom,l2-dump-size: Amount of memory needed for L2 dump, in bytes
+- qcom,memory-reservation-size: Combined reserved memory for the dump buffers
+- qcom,memory-reservation-type: Type of memory to be reserved
+
+Optional properties:
+- qcom,use-imem-dump-offset: If specified, store cache dump buffer addresses
+ in IMEM rather than using the memory dump reservation table.
+
+Example:
+ qcom,cache_dump {
+ compatible = "qcom,cache_dump";
+ qcom,l1-dump-size = <0x100000>;
+ qcom,l2-dump-size = <0x400000>;
+ qcom,memory-reservation-type = "EBI1";
+ qcom,memory-reservation-size = <0x500000>;
+ };
+
diff --git a/Documentation/devicetree/bindings/coresight/coresight.txt b/Documentation/devicetree/bindings/coresight/coresight.txt
index c584073..f860618 100644
--- a/Documentation/devicetree/bindings/coresight/coresight.txt
+++ b/Documentation/devicetree/bindings/coresight/coresight.txt
@@ -31,6 +31,7 @@
component
- coresight-child-ports : list of input port numbers of the children
- coresight-default-sink : represents the default compile time CoreSight sink
+- qcom,pc-save : program counter save implemented
Examples:
@@ -103,4 +104,5 @@
coresight-outports = <0>;
coresight-child-list = <&funnel_kpss>;
coresight-child-ports = <0>;
+ qcom,pc-save;
};
diff --git a/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt b/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
index 82e76fc..26bddd9 100644
--- a/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
+++ b/Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt
@@ -14,7 +14,7 @@
- qcom,mdss-pan-bpp: Specifies the panel bits per pixel. Default value is 24(rgb888).
18 = for rgb666
16 = for rgb565
-- qcom,panel-phy-regulatorSettings: An array of length 8 that specifies the PHY
+- qcom,panel-phy-regulatorSettings: An array of length 7 that specifies the PHY
regulator settings for the panel.
- qcom,panel-phy-timingSettings: An array of length 12 that specifies the PHY
timing settings for the panel.
diff --git a/Documentation/devicetree/bindings/hwmon/epm_adc.txt b/Documentation/devicetree/bindings/hwmon/epm_adc.txt
new file mode 100644
index 0000000..89edc16
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/epm_adc.txt
@@ -0,0 +1,25 @@
+Embedded Power Measurement(EPM) using Cypress Progammable System on a chip (PSOC)
+
+The EPM using the PSoC5 is used by clients to measure on target power
+measurement on supported channels. The PSoC5 is a microcontroller
+that is communicated over the SPI from the MSM. Primary configuration
+supports upto 31 channels and the scope of the driver is to support
+userspace clients.
+
+EPM node
+
+Required properties:
+- compatible : should be "qcom,epm-adc" for EPM using PSoC5.
+- reg : chip select for the device.
+- interrupt-parent : should be phandle of the interrupt controller
+ servicing the interrupt for this device.
+- spi-max-frequency : existing support is set for 960kHz.
+- qcom,channels : The number of voltage and current channels that
+ are supported.
+- qcom,gain : The gain for each of the supported channels.
+- qcom,rsense : The rsense value for each channel. The current channels
+ rsense values units are in milliohms. The voltage channels
+ rsense value is 1.
+- qcom,channel-type : Bitmak of channels to set as voltage and current.
+ These are platform dependent and the appropriate scaling
+ functions are used for returning voltage and current.
diff --git a/Documentation/devicetree/bindings/input/touchscreen/atmel-mxt-ts.txt b/Documentation/devicetree/bindings/input/touchscreen/atmel-mxt-ts.txt
index a6c83d0..88fca69 100644
--- a/Documentation/devicetree/bindings/input/touchscreen/atmel-mxt-ts.txt
+++ b/Documentation/devicetree/bindings/input/touchscreen/atmel-mxt-ts.txt
@@ -27,6 +27,8 @@
- vcc_i2c-supply : Power source required to pull up i2c bus
- atmel,dig-reg-support : specify to indicate digital regulator is
needed
+ - atmel,need-calibration : specify to indicate whether calibration is
+ needed during wakeup.
Example:
i2c@f9966000 {
diff --git a/Documentation/devicetree/bindings/iommu/msm_iommu.txt b/Documentation/devicetree/bindings/iommu/msm_iommu.txt
index f5a2590..7a90cc0 100644
--- a/Documentation/devicetree/bindings/iommu/msm_iommu.txt
+++ b/Documentation/devicetree/bindings/iommu/msm_iommu.txt
@@ -19,6 +19,19 @@
Optional properties:
- qcom,needs-alt-core-clk : boolean to enable the secondary core clock for
access to the IOMMU configuration registers
+- qcom,iommu-bfb-regs : An array of unsigned 32-bit integers corresponding to
+ BFB register addresses that need to be configured for performance tuning
+ purposes. If this property is present, the qcom,iommu-bfb-data must also be
+ present. Register addresses are specified as an offset from the base of the
+ IOMMU hardware block. This property may be omitted if no BFB register
+ configuration needs to be done for a particular IOMMU hardware instance. The
+ registers specified by this property shall fall within the IOMMU
+ implementation-defined register region.
+- qcom,iommu-bfb-data : An array of unsigned 32-bit integers representing the
+ values to be programmed into the corresponding registers given by the
+ qcom,iommu-bfb-regs property. If this property is present, the
+ qcom,iommu-bfb-regs property shall also be present, and the lengths of both
+ properties shall be the same.
Example:
@@ -26,6 +39,8 @@
compatible = "qcom,msm-smmu-v2";
reg = <0xfda64000 0x10000>;
vdd-supply = <&gdsc_iommu>;
+ qcom,iommu-bfb-regs = <0x204c 0x2050>;
+ qcom,iommu-bfb-data = <0xffff 0xffce>;
qcom,iommu-ctx@fda6c000 {
reg = <0xfda6c000 0x1000>;
diff --git a/Documentation/devicetree/bindings/media/video/msm-wfd.txt b/Documentation/devicetree/bindings/media/video/msm-wfd.txt
new file mode 100644
index 0000000..0cd8c9d
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/video/msm-wfd.txt
@@ -0,0 +1,11 @@
+* Qualcomm MSM Wifi Display (WFD)
+
+Required properties:
+- compatible :
+ - "qcom,msm-wfd"
+
+Example:
+
+ qcom,wfd {
+ compatible = "qcom,msm-wfd";
+ };
diff --git a/Documentation/devicetree/bindings/pil/pil-mba.txt b/Documentation/devicetree/bindings/pil/pil-mba.txt
index 7aafd219..9692059 100644
--- a/Documentation/devicetree/bindings/pil/pil-mba.txt
+++ b/Documentation/devicetree/bindings/pil/pil-mba.txt
@@ -10,6 +10,8 @@
first corresponds to the Relay Message Buffer (RMB)
register base. The second specifies the address at which
the primary modem image metadata should be stored.
+- reg-names: Names for the above base addresses. "rmb_base" and
+ "metadata_base" are expected.
- qcom,firmware-name: Base name of the firmware image. Ex. "modem"
Optional properties:
@@ -21,6 +23,7 @@
compatible = "qcom,pil-mba";
reg = <0xfc820000 0x0020>,
<0x0d1f0000 0x4000>;
+ reg-names = "rmb_base", "metadata_base";
qcom,firmware-name = "modem";
qcom,depends-on = "mba";
diff --git a/Documentation/devicetree/bindings/pil/pil-pronto.txt b/Documentation/devicetree/bindings/pil/pil-pronto.txt
index 6193b68..e123bdb 100644
--- a/Documentation/devicetree/bindings/pil/pil-pronto.txt
+++ b/Documentation/devicetree/bindings/pil/pil-pronto.txt
@@ -7,9 +7,9 @@
Required properties:
- compatible: "pil-pronto"
-- reg: offset and length of the register set for the device. The first pair
- corresponds to PRONTO_PMU, the second pair corresponds to CLK_CTL_WCNSS
- the third pair corresponds to WCNSS_HALTREQ.
+- reg: offset and length of the register set for the device.
+- reg-names: names of the bases for the above registers. "pmu_base", "clk_base",
+ and "halt_base" are expected.
- vdd_pronto_pll-supply: regulator to supply pronto pll.
- qcom,firmware-name: Base name of the firmware image. Ex. "wcnss"
@@ -19,6 +19,7 @@
reg = <0xfb21b000 0x3000>,
<0xfc401700 0x4>,
<0xfd485300 0xc>;
+ reg-names = "pmu_base", "clk_base", "halt_base";
vdd_pronto_pll-supply = <&pm8941_l12>;
qcom,firmware-name = "wcnss";
diff --git a/Documentation/devicetree/bindings/pil/pil-q6v5-lpass.txt b/Documentation/devicetree/bindings/pil/pil-q6v5-lpass.txt
index 308f992..d39c98c 100644
--- a/Documentation/devicetree/bindings/pil/pil-q6v5-lpass.txt
+++ b/Documentation/devicetree/bindings/pil/pil-q6v5-lpass.txt
@@ -7,9 +7,10 @@
Required properties:
- compatible: Must be "qcom,pil-q6v5-lpass"
-- reg: Two pairs of physical base addresses and region sizes
- of memory mapped registers. The first region corresponds
- to QDSP6SS_PUB, and the second to LPASS_HALTREQ.
+- reg: Pairs of physical base addresses and region sizes of
+ memory mapped registers.
+- reg-names: Names of the bases for the above registers. "qdsp6_base"
+ and "halt_base" are expected.
- qcom,firmware-name: Base name of the firmware image. Ex. "lpass"
Example:
@@ -17,6 +18,7 @@
compatible = "qcom,pil-q6v5-lpass";
reg = <0xfe200000 0x00100>,
<0xfd485100 0x00010>;
+ reg-names = "qdsp6_base", "halt_base";
qcom,firmware-name = "lpass";
};
diff --git a/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt b/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
index 32c9c35..41ffd8a 100644
--- a/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
+++ b/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
@@ -7,12 +7,11 @@
Required properties:
- compatible: Must be "qcom,pil-q6v5-mss"
-- reg: Five pairs of physical base addresses and region sizes of
- memory mapped registers. The first region corresponds to
- QDSP6SS_PUB, the second to the bus port halt register
- base, the third to the MSS_RELAY_MSG_BUFFER base, the
- fourth to the MSS_RESTART register, and the fifth to the
- MSS_CLAMP_IO register.
+- reg: Pairs of physical base addresses and region sizes of
+ memory mapped registers.
+- reg-names: Names of the bases for the above registers. "qdsp6_base",
+ "halt_base", "rmb_base", "restart_reg" and "clamp_reg"
+ are expected.
- vdd_mss-supply: Reference to the regulator that supplies the processor.
- qcom,firmware-name: Base name of the firmware image. Ex. "mdsp"
- qcom,pil-self-auth: <0> if the hardware does not require self-authenticating
@@ -27,6 +26,8 @@
<0xfc820000 0x020>,
<0xfc401680 0x004>,
<0xfc980008 0x004>;
+ reg-names = "qdsp6_base", "halt_base", "rmb_base",
+ "restart_reg", "clamp_reg";
vdd_mss-supply = <&pm8841_s3>;
qcom,firmware-name = "mba";
diff --git a/Documentation/devicetree/bindings/pil/pil-venus.txt b/Documentation/devicetree/bindings/pil/pil-venus.txt
index 93cba32..4b87f17 100644
--- a/Documentation/devicetree/bindings/pil/pil-venus.txt
+++ b/Documentation/devicetree/bindings/pil/pil-venus.txt
@@ -7,8 +7,9 @@
Required properties:
- compatible: "pil-venus"
-- reg: offset and length of the register set for the device. The first pair
- corresponds to VENUS_WRAPPER, the second pair corresponds to VENUS_VBIF.
+- reg: offset and length of the register set for the device.
+- reg-names: names of the bases for the above registers. "wrapper_base" and
+ "vbif_base" are expected.
- vdd-supply: regulator to supply venus.
- qcom,firmware-name: Base name of the firmware image. Ex. "venus"
- qcom,firmware-min-paddr: The lowest addr boundary for firmware image in DDR
@@ -19,6 +20,7 @@
compatible = "qcom,pil-venus";
reg = <0xfdce0000 0x4000>,
<0xfdc80208 0x8>;
+ reg-names = "wrapper_base", "vbif_base";
vdd-supply = <&gdsc_venus>;
qcom,firmware-name = "venus";
diff --git a/Documentation/devicetree/bindings/platform/msm/qpnp-power-on.txt b/Documentation/devicetree/bindings/platform/msm/qpnp-power-on.txt
index 46b39ec..21d376a 100644
--- a/Documentation/devicetree/bindings/platform/msm/qpnp-power-on.txt
+++ b/Documentation/devicetree/bindings/platform/msm/qpnp-power-on.txt
@@ -13,7 +13,7 @@
- interrupts: Specifies the interrupt associated with PON.
Optional properties:
-- qcom,pon-dbc-delay: The debouce delay for the power-key interrupt
+- qcom,pon-dbc-delay The debouce delay for the power-key interrupt
specifed in us. The value ranges from 2 seconds
to 1/64 of a second. Possible values are -
- 2, 1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64
@@ -24,11 +24,15 @@
reset source. All the child nodes are optional,
if none of them are specified the driver fails
to register.
+- qcom,system-reset Specifies that this PON peripheral can be used
+ to reset the system. This property can only be
+ used by one device on the system. It is an error
+ to include it more than once.
All the below properties are in the sub-node section (properties of the child
node).
-- qcom,pull-up: The initial state of the reset pin under
+- qcom,pull-up The initial state of the reset pin under
consideration.
0 = No pull-up
1 = pull-up enabled
diff --git a/Documentation/devicetree/bindings/power/qpnp-bms.txt b/Documentation/devicetree/bindings/power/qpnp-bms.txt
new file mode 100644
index 0000000..1d3c2db
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/qpnp-bms.txt
@@ -0,0 +1,80 @@
+Qualcomm's QPNP PMIC Battery Management System driver
+
+QPNP PMIC BMS provides interface to clients to read properties related
+to the battery. It's main function is to calculate the State of Charge (SOC),
+a 0-100 percentage representing the amount of charge left in the battery.
+
+BMS node
+
+Required properties:
+- compatible : should be "qcom,qpnp-bms" for the BM driver.
+- reg : offset and length of the PMIC BMS register map.
+- interrupts : the interrupt mappings for bms.
+ The format should be
+ <slave-id peripheral-id interrupt-number>.
+- interrupt-names : names for the mapped bms interrupt
+ The following interrupts are required:
+ 0 : vsense_for_r
+ 1 : vsense_avg
+ 2 : sw_cc_thr
+ 3 : ocv_thr
+ 4 : charge_begin
+ 5 : good_ocv
+ 6 : ocv_for_r
+ 7 : cc_thr
+- qcom,bms-r-sense-mohm : sensor resistance in in milli-ohms.
+- qcom,bms-v-cutoff-uv : cutoff voltage where the battery is considered dead in
+ micro-volts.
+- qcom,bms-max-voltage-uv : maximum voltage for the battery in micro-volts.
+- qcom,bms-r-conn-mohm : connector resistance in milli-ohms.
+- qcom,bms-shutdown-soc-valid-limit : If the ocv upon restart is within this
+ distance of the shutdown ocv, the BMS will try to force
+ the new SoC to the old one to provide charge continuity.
+ That is to say,
+ if (abs(shutdown-soc - current-soc) < limit)
+ then use old SoC.
+- qcom,bms-adjust-soc-low-threshold : The low threshold for the "flat portion"
+ of the charging curve. The BMS will not adjust SoC
+ based on voltage during this time.
+- qcom,bms-adjust-soc-high-threshold : The high threshold for the "flat
+ portion" of the charging curve. The BMS will not
+ adjust SoC based on voltage during this time.
+- qcom,bms-chg-term-ua : current in micro-amps when charging is considered done.
+ As soon as current passes this point, charging is
+ stopped.
+
+Example:
+ bms@4000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ compatible = "qcom,qpnp-bms";
+ reg = <0x4000 0x100>;
+
+ interrupts = <0x0 0x40 0x0>,
+ <0x0 0x40 0x1>,
+ <0x0 0x40 0x2>,
+ <0x0 0x40 0x3>,
+ <0x0 0x40 0x4>,
+ <0x0 0x40 0x5>,
+ <0x0 0x40 0x6>,
+ <0x0 0x40 0x7>;
+
+ interrupt-names = "vsense_for_r",
+ "vsense_avg",
+ "sw_cc_thr",
+ "ocv_thr",
+ "charge_begin",
+ "good_ocv",
+ "ocv_for_r",
+ "cc_thr";
+
+ qcom,bms-r-sense-mohm = <10>;
+ qcom,bms-v-cutoff-uv = <3400000>;
+ qcom,bms-max-voltage-uv = <4200000>;
+ qcom,bms-r-conn-mohm = <18>;
+ qcom,bms-shutdown-soc-valid-limit = <20>;
+ qcom,bms-adjust-soc-low-threshold = <25>;
+ qcom,bms-adjust-soc-high-threshold = <45>;
+ qcom,bms-chg-term-ua = <100000>;
+ };
diff --git a/Documentation/devicetree/bindings/power/qpnp-charger.txt b/Documentation/devicetree/bindings/power/qpnp-charger.txt
new file mode 100644
index 0000000..244e622
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/qpnp-charger.txt
@@ -0,0 +1,209 @@
+Qualcomm QPNP Charger
+
+The charger supports the switch mode battery charger and boost (SMBB)
+peripherals on Qualcomm PMIC chips.
+
+There are seven different peripherals adding the following functionality.
+Each of these peripherals are implemented as subnodes in the example at the
+end of this file.
+
+- qcom,chg-chgr: Supports charging control and status
+ reporting.
+- qcom,chg-bat-if: Battery status reporting such as presence,
+ temperature reporting and voltage collapse
+ protection.
+- qcom,chg-buck: Charger buck configuration and status
+ reporting with regards to several regulation
+ loops such as vdd, ibat etc.
+- qcom,usb-chgpth: USB charge path detection and input current
+ limiting configuration.
+- qcom,dc-chgpth: DC charge path detection and input current
+ limiting configuration.
+- qcom,chg-misc: Miscellaneous features such as buck frequency
+ settings, comparator override features etc.
+
+Parent node required properties:
+- qcom,chg-vddmax-mv: Target voltage of battery in mV
+- qcom,chg-vddsafe-mv: Maximum Vdd voltage in mV
+- qcom,chg-vinmin-mv: Minimum input voltage in mV
+- qcom,chg-ibatmax-ma: Maximum battery charge current in mA
+- qcom,chg-ibatterm-ma: Current at which charging is terminated in mA.
+
+Sub node required structure:
+- A qcom,chg node must be a child of an SPMI node that has specified
+ the spmi-dev-container property. Each subnode reflects
+ a hardware peripheral which adds a unique set of features
+ to the collective charging device. For example USB detection
+ and the battery interface are each seperate peripherals and
+ each should be their own subnode.
+
+Sub node required properties:
+- compatible: Must be "qcom,charger".
+- reg: Specifies the SPMI address and size for this peripheral.
+- interrupts: Specifies the interrupt associated with the peripheral.
+- interrupt-names: Specifies the interrupt names for the peripheral. Every
+ available interrupt needs to have an associated name
+ with it to indentify its purpose.
+
+ The following lists each subnode and their corresponding
+ required interrupt names:
+
+ qcom,usb-chgpth:
+ - usbin-valid
+ qcom,chg-chgr:
+ - chg-done
+ - chg-failed
+
+ The following interrupts are available:
+
+ qcom,chg-chgr:
+ - chg-done: Triggers on charge completion.
+ - chg-failed: Notifies of charge failures.
+ - fast-chg-on: Notifies of fast charging state.
+ - trkl-chg-on: Indicates trickle charging.
+ - state-change: Notifies of a state change in
+ the charger state machine.
+ - chgwdog: Charger watchdog interrupt.
+ - vbat-det-hi: Triggers on vbat-det-hi voltage
+ setting,can be used as
+ battery alarm.
+ - vbat-det-hi: Triggers on vbat-det-low voltage
+ setting, can be used as
+ battery alarm.
+
+ qcom,chg-buck:
+ - vdd-loop: VDD loop change interrupt.
+ - ibat-loop: Ibat loop change interrupt.
+ - ichg-loop: Charge current loop change.
+ - vchg-loop: Charge voltage loop change.
+ - overtemp: Overtemperature interrupt.
+ - vref-ov: Reference overvoltage interrupt.
+ - vbat-ov: Battery overvoltage interrupt.
+
+ qcom,chg-bat-if:
+ - psi: PMIC serial interface interrupt.
+ - vcp-on: Voltage collapse protection
+ status interrupt.
+ - bat-fet-on: BATFET status interrupt.
+ - bat-temp-ok: Battery temperature status
+ interrupt.
+ - batt-pres: Battery presence status
+ interrupt.
+
+ qcom,usb-chgpth:
+ - usbin-valid: Indicates valid USB connection.
+ - coarse-det-usb: Coarse detect interrupt triggers
+ at low voltage on USB_IN.
+ - chg-gone: Triggers on VCHG line.
+
+ qcom,dc-chgpth:
+ - dcin-valid: Indicates a valid DC charger
+ connection.
+ - coarse-det-dc: Coarse detect interrupt triggers
+ at low voltage on DC_IN.
+
+ qcom,boost:
+ - limit-error: Limiting error on SMBB boost.
+ - boost-pwr-ok: Status of boost power.
+
+Example:
+ pm8941-chg {
+ spmi-dev-container;
+ compatible = "qcom,charger";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ qcom,chg-vddmax-mv = <4200>;
+ qcom,chg-vddsafe-mv = <4200>;
+ qcom,chg-vinmin-mv = <4200>;
+ qcom,chg-ibatmax-mv = <1500>;
+ qcom,chg-ibatterm-mv = <200>;
+
+ qcom,chg-chgr@1000 {
+ reg = <0x1000 0x100>;
+ interrupts = <0x0 0x10 0x0>,
+ <0x0 0x10 0x1>,
+ <0x0 0x10 0x2>,
+ <0x0 0x10 0x3>,
+ <0x0 0x10 0x4>,
+ <0x0 0x10 0x5>,
+ <0x0 0x10 0x6>,
+ <0x0 0x10 0x7>;
+
+ interrupt-names = "chg-done",
+ "chg-failed",
+ "fast-chg-on",
+ "trkl-chg-on",
+ "state-change",
+ "chgwdog",
+ "vbat-det-hi",
+ "vbat-det-lo";
+ };
+
+ qcom,chg-buck@1100 {
+ reg = <0x1100 0x100>;
+ interrupts = <0x0 0x11 0x0>,
+ <0x0 0x11 0x1>,
+ <0x0 0x11 0x2>,
+ <0x0 0x11 0x3>,
+ <0x0 0x11 0x4>,
+ <0x0 0x11 0x5>,
+ <0x0 0x11 0x6>;
+
+ interrupt-names = "vdd-loop",
+ "ibat-loop",
+ "ichg-loop",
+ "vchg-loop",
+ "overtemp",
+ "vref-ov",
+ "vbat-ov";
+ };
+
+ qcom,chg-bat-if@1200 {
+ reg = <0x1200 0x100>;
+ interrupts = <0x0 0x12 0x0>,
+ <0x0 0x12 0x1>,
+ <0x0 0x12 0x2>,
+ <0x0 0x12 0x3>,
+ <0x0 0x12 0x4>;
+
+ interrupt-names = "psi",
+ "vcp-on",
+ "bat-fet-on",
+ "bat-temp-ok",
+ "batt-pres";
+ };
+
+ qcom,chg-usb-chgpth@1300 {
+ reg = <0x1300 0x100>;
+ interrupts = <0 0x13 0x0>,
+ <0 0x13 0x1>,
+ <0x0 0x13 0x2>;
+
+ interrupt-names = "usbin-valid",
+ "coarse-det-usb",
+ "chg-gone";
+ };
+
+ qcom,chg-dc-chgpth@1400 {
+ reg = <0x1400 0x100>;
+ interrupts = <0x0 0x14 0x0>,
+ <0x0 0x14 0x1>;
+
+ interrupt-names = "dcin-valid",
+ "coarse-det-dc";
+ };
+
+ qcom,chg-boost@1500 {
+ reg = <0x1500 0x100>;
+ interrupts = <0x0 0x15 0x0>,
+ <0x0 0x15 0x1>;
+
+ interrupt-names = "limit-error",
+ "boost-pwr-ok";
+ };
+
+ qcom,chg-misc@1600 {
+ reg = <0x1600 0x100>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt b/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt
index 0eb186e..2864fd1 100644
--- a/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt
+++ b/Documentation/devicetree/bindings/sound/qcom-audio-dev.txt
@@ -48,6 +48,12 @@
- compatible : "qcom,msm-dai-fe"
+* msm-pcm-afe
+
+Required properties:
+
+ - compatible : "qcom,msm-pcm-afe"
+
* msm-dai-q6
[First Level Nodes]
@@ -63,6 +69,8 @@
- compatible : "qcom,msm-dai-q6-dev"
- qcom,msm-dai-q6-dev-id : The slimbus multi channel port ID
Value is from 16384 to 16393
+ BT SCO port ID value from 12288 to 12289
+ RT Proxy port ID values from 224 to 225 and 240 to 241
* msm-auxpcm
@@ -166,6 +174,36 @@
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <16385>;
};
+
+ qcom,msm-dai-q6-bt-sco-rx {
+ compatible = "qcom,msm-dai-q6-dev";
+ qcom,msm-dai-q6-dev-id = <12288>;
+ };
+
+ qcom,msm-dai-q6-bt-sco-tx {
+ compatible = "qcom,msm-dai-q6-dev";
+ qcom,msm-dai-q6-dev-id = <12289>;
+ };
+
+ qcom,msm-dai-q6-be-afe-pcm-rx {
+ compatible = "qcom,msm-dai-q6-dev";
+ qcom,msm-dai-q6-dev-id = <224>;
+ };
+
+ qcom,msm-dai-q6-be-afe-pcm-tx {
+ compatible = "qcom,msm-dai-q6-dev";
+ qcom,msm-dai-q6-dev-id = <225>;
+ };
+
+ qcom,msm-dai-q6-afe-proxy-rx {
+ compatible = "qcom,msm-dai-q6-dev";
+ qcom,msm-dai-q6-dev-id = <241>;
+ };
+
+ qcom,msm-dai-q6-afe-proxy-tx {
+ compatible = "qcom,msm-dai-q6-dev";
+ qcom,msm-dai-q6-dev-id = <240>;
+ };
};
qcom,msm-auxpcm {
diff --git a/Documentation/devicetree/bindings/spmi/spmi-pmic-arb.txt b/Documentation/devicetree/bindings/spmi/spmi-pmic-arb.txt
index b5ca08e..63c1e87 100644
--- a/Documentation/devicetree/bindings/spmi/spmi-pmic-arb.txt
+++ b/Documentation/devicetree/bindings/spmi/spmi-pmic-arb.txt
@@ -10,6 +10,10 @@
- qcom,pmic-arb-channel : the assigned channel number for channel registers.
- qcom,pmic-arb-ppid-map : an array used to map a 12-bit PPID to 8-bit APID.
+Optional properties:
+- qcom,not-wakeup : boolean property which indicates that SPMI PMIC interrupts
+ should not be treated as wakeup sources
+
Peripherals on the SPMI bus are identified with a 12-bit identifier (PPID)
which is composed of a 4-bit slave address and an 8-bit peripheral identifier.
The PMIC Arbiter hardware uses an 8-bit APID (Arbiter Peripheral Identifier)
diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
index 9c2ce6c..12fbfec 100644
--- a/Documentation/devicetree/bindings/usb/msm-hsusb.txt
+++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
@@ -6,6 +6,8 @@
- compatible : should be "qcom,hsusb-otg"
- regs : offset and length of the register set in the memory map
- interrupts: IRQ line
+- interrupt-names: OTG interrupt name(s) referenced in interrupts above
+ HSUSB OTG expects "core_irq" and optionally "async_irq".
- qcom,hsusb-otg-phy-type: PHY type can be one of
1 - Chipidea 45nm PHY
2 - Synopsis 28nm PHY
@@ -48,6 +50,7 @@
compatible = "qcom,hsusb-otg";
reg = <0xf9690000 0x400>;
interrupts = <134>;
+ interrupt-names = "core_irq";
qcom,hsusb-otg-phy-type = <2>;
qcom,hsusb-otg-mode = <1>;
diff --git a/Documentation/mmc/mmc-dev-attrs.txt b/Documentation/mmc/mmc-dev-attrs.txt
index 08f7312..22ae844 100644
--- a/Documentation/mmc/mmc-dev-attrs.txt
+++ b/Documentation/mmc/mmc-dev-attrs.txt
@@ -8,23 +8,6 @@
force_ro Enforce read-only access even if write protect switch is off.
- num_wr_reqs_to_start_packing This attribute is used to determine
- the trigger for activating the write packing, in case the write
- packing control feature is enabled.
-
- When the MMC manages to reach a point where num_wr_reqs_to_start_packing
- write requests could be packed, it enables the write packing feature.
- This allows us to start the write packing only when it is beneficial
- and has minimum affect on the read latency.
-
- The number of potential packed requests that will trigger the packing
- can be configured via sysfs by writing the required value to:
- /sys/block/<block_dev_name>/num_wr_reqs_to_start_packing.
-
- The default value of num_wr_reqs_to_start_packing was determined by
- running parallel lmdd write and lmdd read operations and calculating
- the max number of packed writes requests.
-
SD and MMC Device Attributes
============================
diff --git a/arch/Kconfig b/arch/Kconfig
index 0d88760..0a3ffe4 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -169,13 +169,6 @@
bool
depends on PERF_EVENTS
-config HAVE_HW_BRKPT_RESERVED_RW_ACCESS
- bool
- depends on HAVE_HW_BREAKPOINT
- help
- Some of the hardware might not have r/w access beyond a certain number
- of breakpoint register access.
-
config HAVE_MIXED_BREAKPOINTS_REGS
bool
depends on HAVE_HW_BREAKPOINT
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d7ebcfe..5d5f9de 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -29,7 +29,7 @@
select HAVE_PERF_EVENTS
select PERF_USE_VMALLOC
select HAVE_REGS_AND_STACK_ACCESS_API
- #select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
+ select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
select HAVE_C_RECORDMCOUNT
select HAVE_GENERIC_HARDIRQS
select GENERIC_IRQ_SHOW
diff --git a/arch/arm/boot/dts/dsi-panel-toshiba-720p-video.dtsi b/arch/arm/boot/dts/dsi-panel-toshiba-720p-video.dtsi
index 1f7e488..7731b33 100644
--- a/arch/arm/boot/dts/dsi-panel-toshiba-720p-video.dtsi
+++ b/arch/arm/boot/dts/dsi-panel-toshiba-720p-video.dtsi
@@ -39,17 +39,17 @@
qcom,mdss-pan-dsi-dma-tr = <0x04>;
qcom,mdss-pan-frame-rate = <60>;
qcom,panel-phy-regulatorSettings = [03 01 01 00 /* Regualotor settings */
- 20 00 01 00];
+ 20 00 01];
qcom,panel-phy-timingSettings = [69 29 1f 00 55 55
19 2a 2a 03 04 00];
qcom,panel-phy-strengthCtrl = [77 06];
- qcom,panel-phy-bistCtrl = [00 00 01 ff /* BIST Ctrl settings */
+ qcom,panel-phy-bistCtrl = [00 00 b1 ff /* BIST Ctrl settings */
00 00];
- qcom,panel-phy-laneConfig = [05 c2 00 00 00 00 00 01 75 /* lane0 config */
- 05 c2 00 00 00 00 00 01 75 /* lane1 config */
- 05 c2 00 00 00 00 00 01 75 /* lane2 config */
- 05 c2 00 00 00 00 00 01 75 /* lane3 config */
- 00 c2 00 00 00 00 00 01 97]; /* Clk ln config */
+ qcom,panel-phy-laneConfig = [00 c2 45 00 00 00 00 01 75 /* lane0 config */
+ 00 c2 45 00 00 00 00 01 75 /* lane1 config */
+ 00 c2 45 00 00 00 00 01 75 /* lane2 config */
+ 00 c2 45 00 00 00 00 01 75 /* lane3 config */
+ 00 02 45 00 00 00 00 01 97]; /* Clk ln config */
qcom,panel-on-cmds = [23 01 00 00 0a 02 b0 00
23 01 00 00 0a 02 b2 00
diff --git a/arch/arm/boot/dts/mpq8092-iommu.dtsi b/arch/arm/boot/dts/mpq8092-iommu.dtsi
new file mode 100644
index 0000000..6a88992
--- /dev/null
+++ b/arch/arm/boot/dts/mpq8092-iommu.dtsi
@@ -0,0 +1,33 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/include/ "msm-iommu.dtsi"
+
+&jpeg_iommu {
+ status = "ok";
+};
+
+&mdp_iommu {
+ status = "ok";
+};
+
+&venus_iommu {
+ status = "ok";
+};
+
+&kgsl_iommu {
+ status = "ok";
+};
+
+&vfe_iommu {
+ status = "ok";
+};
diff --git a/arch/arm/boot/dts/mpq8092-sim.dts b/arch/arm/boot/dts/mpq8092-sim.dts
index f73abe7..ac984a1 100644
--- a/arch/arm/boot/dts/mpq8092-sim.dts
+++ b/arch/arm/boot/dts/mpq8092-sim.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,37 +12,19 @@
/dts-v1/;
-/include/ "skeleton.dtsi"
+/include/ "mpq8092.dtsi"
/ {
model = "Qualcomm MPQ8092 Simulator";
compatible = "qcom,mpq8092-sim", "qcom,mpq8092";
- interrupt-parent = <&intc>;
-
- intc: interrupt-controller@f9000000 {
- compatible = "qcom,msm-qgic2";
- interrupt-controller;
- #interrupt-cells = <3>;
- reg = <0xf9000000 0x1000>,
- <0xf9002000 0x1000>;
- };
-
- timer {
- compatible = "qcom,msm-qtimer", "arm,armv7-timer";
- interrupts = <1 2 0>, <1 3 0>;
- clock-frequency = <19200000>;
- };
+ qcom,msm-id = <126 16 0>;
serial@f991f000 {
- compatible = "qcom,msm-lsuart-v14";
- reg = <0xf991f000 0x1000>;
- interrupts = <0 109 0>;
+ status = "ok";
};
serial@f995e000 {
- compatible = "qcom,msm-lsuart-v14";
- reg = <0xf995e000 0x1000>;
- interrupts = <0 114 0>;
+ status = "ok";
};
};
diff --git a/arch/arm/boot/dts/mpq8092.dtsi b/arch/arm/boot/dts/mpq8092.dtsi
new file mode 100644
index 0000000..9b51ceb
--- /dev/null
+++ b/arch/arm/boot/dts/mpq8092.dtsi
@@ -0,0 +1,58 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/include/ "skeleton.dtsi"
+/include/ "mpq8092-iommu.dtsi"
+/include/ "msm-gdsc.dtsi"
+
+/ {
+ model = "Qualcomm MPQ8092";
+ compatible = "qcom,mpq8092";
+ interrupt-parent = <&intc>;
+
+ intc: interrupt-controller@f9000000 {
+ compatible = "qcom,msm-qgic2";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = <0xf9000000 0x1000>,
+ <0xf9002000 0x1000>;
+ };
+
+ msmgpio: gpio@fd510000 {
+ compatible = "qcom,msm-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0xfd510000 0x4000>;
+ };
+
+ timer {
+ compatible = "qcom,msm-qtimer", "arm,armv7-timer";
+ interrupts = <1 2 0>, <1 3 0>;
+ clock-frequency = <19200000>;
+ };
+
+ serial@f991f000 {
+ compatible = "qcom,msm-lsuart-v14";
+ reg = <0xf991f000 0x1000>;
+ interrupts = <0 109 0>;
+ status = "disabled";
+ };
+
+ serial@f995e000 {
+ compatible = "qcom,msm-lsuart-v14";
+ reg = <0xf995e000 0x1000>;
+ interrupts = <0 114 0>;
+ status = "disabled";
+ };
+};
diff --git a/arch/arm/boot/dts/msm-pm8019-rpm-regulator.dtsi b/arch/arm/boot/dts/msm-pm8019-rpm-regulator.dtsi
new file mode 100644
index 0000000..c48f67d
--- /dev/null
+++ b/arch/arm/boot/dts/msm-pm8019-rpm-regulator.dtsi
@@ -0,0 +1,301 @@
+/* Copyright (c) 2012, Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&rpm_bus {
+ rpm-regulator-smpa1 {
+ qcom,resource-name = "smpa";
+ qcom,resource-id = <1>;
+ qcom,regulator-type = <1>;
+ qcom,hpm-min-load = <100000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-s1 {
+ regulator-name = "8019_s1";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-smpa2 {
+ qcom,resource-name = "smpa";
+ qcom,resource-id = <2>;
+ qcom,regulator-type = <1>;
+ qcom,hpm-min-load = <100000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-s2 {
+ regulator-name = "8019_s2";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-smpa3 {
+ qcom,resource-name = "smpa";
+ qcom,resource-id = <3>;
+ qcom,regulator-type = <1>;
+ qcom,hpm-min-load = <100000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-s3 {
+ regulator-name = "8019_s3";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-smpa4 {
+ qcom,resource-name = "smpa";
+ qcom,resource-id = <4>;
+ qcom,regulator-type = <1>;
+ qcom,hpm-min-load = <100000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-s4 {
+ regulator-name = "8019_s4";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa1 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <1>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l1 {
+ regulator-name = "8019_l1";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa2 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <2>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <5000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l2 {
+ regulator-name = "8019_l2";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa3 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <3>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l3 {
+ regulator-name = "8019_l3";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa4 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <4>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <5000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l4 {
+ regulator-name = "8019_l4";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa5 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <5>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l5 {
+ regulator-name = "8019_l5";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa6 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <6>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l6 {
+ regulator-name = "8019_l6";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa7 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <7>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l7 {
+ regulator-name = "8019_l7";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa8 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <8>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l8 {
+ regulator-name = "8019_l8";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa9 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <9>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l9 {
+ regulator-name = "8019_l9";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa10 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <10>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l10 {
+ regulator-name = "8019_l10";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa11 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <11>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l11 {
+ regulator-name = "8019_l11";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa12 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <12>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l12 {
+ regulator-name = "8019_l12";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa13 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <13>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <5000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l13 {
+ regulator-name = "8019_l13";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+
+ rpm-regulator-ldoa14 {
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <14>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <5000>;
+ compatible = "qcom,rpm-regulator-smd-resource";
+ status = "disabled";
+
+ regulator-l14 {
+ regulator-name = "8019_l14";
+ qcom,set = <3>;
+ status = "disabled";
+ compatible = "qcom,rpm-regulator-smd";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/msm-pm8019.dtsi b/arch/arm/boot/dts/msm-pm8019.dtsi
new file mode 100755
index 0000000..3b06450
--- /dev/null
+++ b/arch/arm/boot/dts/msm-pm8019.dtsi
@@ -0,0 +1,340 @@
+/* Copyright (c) 2012, Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&spmi_bus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+
+ qcom,pm8019@0 {
+ spmi-slave-container;
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ clkdiv@5b00 {
+ reg = <0x5b00 0x100>;
+ compatible = "qcom,qpnp-clkdiv";
+ qcom,cxo-freq = <19200000>;
+ };
+
+ clkdiv@5c00 {
+ reg = <0x5c00 0x100>;
+ compatible = "qcom,qpnp-clkdiv";
+ qcom,cxo-freq = <19200000>;
+ };
+
+ clkdiv@5d00 {
+ reg = <0x5d00 0x100>;
+ compatible = "qcom,qpnp-clkdiv";
+ qcom,cxo-freq = <19200000>;
+ };
+
+ rtc {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-rtc";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ qcom,qpnp-rtc-write = <0>;
+ qcom,qpnp-rtc-alarm-pwrup = <0>;
+
+ qcom,pm8019_rtc_rw@6000 {
+ reg = <0x6000 0x100>;
+ };
+
+ qcom,pm8019_rtc_alarm@6100 {
+ reg = <0x6100 0x100>;
+ interrupts = <0x0 0x61 0x1>;
+ };
+ };
+
+ pm8019_gpios: gpios {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-pin";
+ gpio-controller;
+ #gpio-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ label = "pm8019-gpio";
+
+ gpio@c000 {
+ reg = <0xc000 0x100>;
+ qcom,pin-num = <1>;
+ };
+
+ gpio@c100 {
+ reg = <0xc100 0x100>;
+ qcom,pin-num = <2>;
+ };
+
+ gpio@c200 {
+ reg = <0xc200 0x100>;
+ qcom,pin-num = <3>;
+ };
+
+ gpio@c300 {
+ reg = <0xc300 0x100>;
+ qcom,pin-num = <4>;
+ };
+
+ gpio@c400 {
+ reg = <0xc400 0x100>;
+ qcom,pin-num = <5>;
+ };
+
+ gpio@c500 {
+ reg = <0xc500 0x100>;
+ qcom,pin-num = <6>;
+ };
+ };
+
+ pm8019_mpps: mpps {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-pin";
+ gpio-controller;
+ #gpio-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ label = "pm8019-mpp";
+
+ mpp@a000 {
+ reg = <0xa000 0x100>;
+ qcom,pin-num = <1>;
+ };
+
+ mpp@a100 {
+ reg = <0xa100 0x100>;
+ qcom,pin-num = <2>;
+ };
+
+ mpp@a200 {
+ reg = <0xa200 0x100>;
+ qcom,pin-num = <3>;
+ };
+
+ mpp@a300 {
+ reg = <0xa300 0x100>;
+ qcom,pin-num = <4>;
+ };
+
+ mpp@a400 {
+ reg = <0xa400 0x100>;
+ qcom,pin-num = <5>;
+ };
+
+ mpp@a500 {
+ reg = <0xa500 0x100>;
+ qcom,pin-num = <6>;
+ };
+ };
+ };
+
+ qcom,pm8019@1 {
+ spmi-slave-container;
+ reg = <0x1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ regulator@1400 {
+ regulator-name = "8019_s1";
+ spmi-dev-container;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,qpnp-regulator";
+ reg = <0x1400 0x300>;
+ status = "disabled";
+
+ qcom,ctl@1400 {
+ reg = <0x1400 0x100>;
+ };
+ qcom,ps@1500 {
+ reg = <0x1500 0x100>;
+ };
+ qcom,freq@1600 {
+ reg = <0x1600 0x100>;
+ };
+ };
+
+ regulator@1700 {
+ regulator-name = "8019_s2";
+ spmi-dev-container;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,qpnp-regulator";
+ reg = <0x1700 0x300>;
+ status = "disabled";
+
+ qcom,ctl@1700 {
+ reg = <0x1700 0x100>;
+ };
+ qcom,ps@1800 {
+ reg = <0x1800 0x100>;
+ };
+ qcom,freq@1900 {
+ reg = <0x1900 0x100>;
+ };
+ };
+
+ regulator@1a00 {
+ regulator-name = "8019_s3";
+ spmi-dev-container;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,qpnp-regulator";
+ reg = <0x1a00 0x300>;
+ status = "disabled";
+
+ qcom,ctl@1a00 {
+ reg = <0x1a00 0x100>;
+ };
+ qcom,ps@1b00 {
+ reg = <0x1b00 0x100>;
+ };
+ qcom,freq@1c00 {
+ reg = <0x1c00 0x100>;
+ };
+ };
+
+ regulator@1d00 {
+ regulator-name = "8019_s4";
+ spmi-dev-container;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,qpnp-regulator";
+ reg = <0x1d00 0x300>;
+ status = "disabled";
+
+ qcom,ctl@1d00 {
+ reg = <0x1d00 0x100>;
+ };
+ qcom,ps@1e00 {
+ reg = <0x1e00 0x100>;
+ };
+ qcom,freq@1f00 {
+ reg = <0x1f00 0x100>;
+ };
+ };
+
+ regulator@4000 {
+ regulator-name = "8019_l1";
+ reg = <0x4000 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4100 {
+ regulator-name = "8019_l2";
+ reg = <0x4100 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4200 {
+ regulator-name = "8019_l3";
+ reg = <0x4200 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4300 {
+ regulator-name = "8019_l4";
+ reg = <0x4300 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4400 {
+ regulator-name = "8019_l5";
+ reg = <0x4400 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4500 {
+ regulator-name = "8019_l6";
+ reg = <0x4500 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4600 {
+ regulator-name = "8019_l7";
+ reg = <0x4600 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4700 {
+ regulator-name = "8019_l8";
+ reg = <0x4700 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4800 {
+ regulator-name = "8019_l9";
+ reg = <0x4800 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4900 {
+ regulator-name = "8019_l10";
+ reg = <0x4900 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4a00 {
+ regulator-name = "8019_l11";
+ reg = <0x4a00 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4b00 {
+ regulator-name = "8019_l12";
+ reg = <0x4b00 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4c00 {
+ regulator-name = "8019_l13";
+ reg = <0x4c00 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4d00 {
+ regulator-name = "8019_l14";
+ reg = <0x4d00 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4e00 {
+ regulator-name = "8019_ldo_xo";
+ reg = <0x4e00 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+
+ regulator@4f00 {
+ regulator-name = "8019_ldo_rfclk";
+ reg = <0x4f00 0x100>;
+ compatible = "qcom,qpnp-regulator";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/msm-pm8841.dtsi b/arch/arm/boot/dts/msm-pm8841.dtsi
index 967d5ec..ea83231 100644
--- a/arch/arm/boot/dts/msm-pm8841.dtsi
+++ b/arch/arm/boot/dts/msm-pm8841.dtsi
@@ -22,7 +22,7 @@
#address-cells = <1>;
#size-cells = <1>;
- pm8841_mpps {
+ pm8841_mpps: mpps {
spmi-dev-container;
compatible = "qcom,qpnp-pin";
gpio-controller;
@@ -34,25 +34,21 @@
mpp@a000 {
reg = <0xa000 0x100>;
qcom,pin-num = <1>;
- status = "disabled";
};
mpp@a100 {
reg = <0xa100 0x100>;
qcom,pin-num = <2>;
- status = "disabled";
};
mpp@a200 {
reg = <0xa200 0x100>;
qcom,pin-num = <3>;
- status = "disabled";
};
mpp@a300 {
reg = <0xa300 0x100>;
qcom,pin-num = <4>;
- status = "disabled";
};
};
};
diff --git a/arch/arm/boot/dts/msm-pm8941.dtsi b/arch/arm/boot/dts/msm-pm8941.dtsi
index 0f5fd1c..f1e18cf 100644
--- a/arch/arm/boot/dts/msm-pm8941.dtsi
+++ b/arch/arm/boot/dts/msm-pm8941.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -30,6 +30,7 @@
<0x0 0x8 0x4>;
interrupt-names = "kpdpwr", "resin", "resin-bark";
qcom,pon-dbc-delay = <15625>;
+ qcom,system-reset;
qcom,pon_1 {
qcom,pon-type = <0>;
@@ -48,6 +49,41 @@
};
};
+ bms@4000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ compatible = "qcom,qpnp-bms";
+ reg = <0x4000 0x100>;
+
+ interrupts = <0x0 0x40 0x0>,
+ <0x0 0x40 0x1>,
+ <0x0 0x40 0x2>,
+ <0x0 0x40 0x3>,
+ <0x0 0x40 0x4>,
+ <0x0 0x40 0x5>,
+ <0x0 0x40 0x6>,
+ <0x0 0x40 0x7>;
+
+ interrupt-names = "vsense_for_r",
+ "vsense_avg",
+ "sw_cc_thr",
+ "ocv_thr",
+ "charge_begin",
+ "good_ocv",
+ "ocv_for_r",
+ "cc_thr";
+
+ qcom,bms-r-sense-mohm = <10>;
+ qcom,bms-v-cutoff-uv = <3400000>;
+ qcom,bms-max-voltage-uv = <4200000>;
+ qcom,bms-r-conn-mohm = <18>;
+ qcom,bms-shutdown-soc-valid-limit = <20>;
+ qcom,bms-adjust-soc-low-threshold = <25>;
+ qcom,bms-adjust-soc-high-threshold = <45>;
+ qcom,bms-chg-term-ua = <100000>;
+ };
+
clkdiv@5b00 {
reg = <0x5b00 0x100>;
compatible = "qcom,qpnp-clkdiv";
@@ -66,7 +102,108 @@
qcom,cxo-freq = <19200000>;
};
- pm8941_gpios {
+ pm8941-chg {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-charger";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ qcom,chg-vddmax-mv = <4200>;
+ qcom,chg-vddsafe-mv = <4200>;
+ qcom,chg-vinmin-mv = <4200>;
+ qcom,chg-ibatmax-ma = <1500>;
+ qcom,chg-ibatterm-ma = <200>;
+
+ qcom,chg-chgr@1000 {
+ reg = <0x1000 0x100>;
+ interrupts = <0x0 0x10 0x0>,
+ <0x0 0x10 0x1>,
+ <0x0 0x10 0x2>,
+ <0x0 0x10 0x3>,
+ <0x0 0x10 0x4>,
+ <0x0 0x10 0x5>,
+ <0x0 0x10 0x6>,
+ <0x0 0x10 0x7>;
+
+ interrupt-names = "chg-done",
+ "chg-failed",
+ "fast-chg-on",
+ "trkl-chg-on",
+ "state-change",
+ "chgwdog",
+ "vbat-det-hi",
+ "vbat-det-lo";
+ };
+
+ qcom,chg-buck@1100 {
+ reg = <0x1100 0x100>;
+ interrupts = <0x0 0x11 0x0>,
+ <0x0 0x11 0x1>,
+ <0x0 0x11 0x2>,
+ <0x0 0x11 0x3>,
+ <0x0 0x11 0x4>,
+ <0x0 0x11 0x5>,
+ <0x0 0x11 0x6>;
+
+ interrupt-names = "vdd-loop",
+ "ibat-loop",
+ "ichg-loop",
+ "vchg-loop",
+ "overtemp",
+ "vref-ov",
+ "vbat-ov";
+ };
+
+ qcom,chg-bat-if@1200 {
+ reg = <0x1200 0x100>;
+ interrupts = <0x0 0x12 0x0>,
+ <0x0 0x12 0x1>,
+ <0x0 0x12 0x2>,
+ <0x0 0x12 0x3>,
+ <0x0 0x12 0x4>;
+
+ interrupt-names = "psi",
+ "vcp-on",
+ "bat-fet-on",
+ "bat-temp-ok",
+ "batt-pres";
+ };
+
+ qcom,chg-usb-chgpth@1300 {
+ reg = <0x1300 0x100>;
+ interrupts = <0 0x13 0x0>,
+ <0 0x13 0x1>,
+ <0x0 0x13 0x2>;
+
+ interrupt-names = "usbin-valid",
+ "coarse-det-usb",
+ "chg-gone";
+ };
+
+ qcom,chg-dc-chgpth@1400 {
+ reg = <0x1400 0x100>;
+ interrupts = <0x0 0x14 0x0>,
+ <0x0 0x14 0x1>;
+
+ interrupt-names = "dcin-valid",
+ "coarse-det-dc";
+ };
+
+ qcom,chg-boost@1500 {
+ reg = <0x1500 0x100>;
+ interrupts = <0x0 0x15 0x0>,
+ <0x0 0x15 0x1>;
+
+ interrupt-names = "limit-error",
+ "boost-pwr-ok";
+ };
+
+ qcom,chg-misc@1600 {
+ reg = <0x1600 0x100>;
+ };
+ };
+
+ pm8941_gpios: gpios {
spmi-dev-container;
compatible = "qcom,qpnp-pin";
gpio-controller;
@@ -78,221 +215,185 @@
gpio@c000 {
reg = <0xc000 0x100>;
qcom,pin-num = <1>;
- status = "disabled";
};
gpio@c100 {
reg = <0xc100 0x100>;
qcom,pin-num = <2>;
- status = "disabled";
};
gpio@c200 {
reg = <0xc200 0x100>;
qcom,pin-num = <3>;
- status = "disabled";
};
gpio@c300 {
reg = <0xc300 0x100>;
qcom,pin-num = <4>;
- status = "disabled";
};
gpio@c400 {
reg = <0xc400 0x100>;
qcom,pin-num = <5>;
- status = "disabled";
};
gpio@c500 {
reg = <0xc500 0x100>;
qcom,pin-num = <6>;
- status = "disabled";
};
gpio@c600 {
reg = <0xc600 0x100>;
qcom,pin-num = <7>;
- status = "disabled";
};
gpio@c700 {
reg = <0xc700 0x100>;
qcom,pin-num = <8>;
- status = "disabled";
};
gpio@c800 {
reg = <0xc800 0x100>;
qcom,pin-num = <9>;
- status = "disabled";
};
gpio@c900 {
reg = <0xc900 0x100>;
qcom,pin-num = <10>;
- status = "disabled";
};
gpio@ca00 {
reg = <0xca00 0x100>;
qcom,pin-num = <11>;
- status = "disabled";
};
gpio@cb00 {
reg = <0xcb00 0x100>;
qcom,pin-num = <12>;
- status = "disabled";
};
gpio@cc00 {
reg = <0xcc00 0x100>;
qcom,pin-num = <13>;
- status = "disabled";
};
gpio@cd00 {
reg = <0xcd00 0x100>;
qcom,pin-num = <14>;
- status = "disabled";
};
gpio@ce00 {
reg = <0xce00 0x100>;
qcom,pin-num = <15>;
- status = "disabled";
};
gpio@cf00 {
reg = <0xcf00 0x100>;
qcom,pin-num = <16>;
- status = "disabled";
};
gpio@d000 {
reg = <0xd000 0x100>;
qcom,pin-num = <17>;
- status = "disabled";
};
gpio@d100 {
reg = <0xd100 0x100>;
qcom,pin-num = <18>;
- status = "disabled";
};
gpio@d200 {
reg = <0xd200 0x100>;
qcom,pin-num = <19>;
- status = "disabled";
};
gpio@d300 {
reg = <0xd300 0x100>;
qcom,pin-num = <20>;
- status = "disabled";
};
gpio@d400 {
reg = <0xd400 0x100>;
qcom,pin-num = <21>;
- status = "disabled";
};
gpio@d500 {
reg = <0xd500 0x100>;
qcom,pin-num = <22>;
- status = "disabled";
};
gpio@d600 {
reg = <0xd600 0x100>;
qcom,pin-num = <23>;
- status = "disabled";
};
gpio@d700 {
reg = <0xd700 0x100>;
qcom,pin-num = <24>;
- status = "disabled";
};
gpio@d800 {
reg = <0xd800 0x100>;
qcom,pin-num = <25>;
- status = "disabled";
};
gpio@d900 {
reg = <0xd900 0x100>;
qcom,pin-num = <26>;
- status = "disabled";
};
gpio@da00 {
reg = <0xda00 0x100>;
qcom,pin-num = <27>;
- status = "disabled";
};
gpio@db00 {
reg = <0xdb00 0x100>;
qcom,pin-num = <28>;
- status = "disabled";
};
gpio@dc00 {
reg = <0xdc00 0x100>;
qcom,pin-num = <29>;
- status = "disabled";
};
gpio@dd00 {
reg = <0xdd00 0x100>;
qcom,pin-num = <30>;
- status = "disabled";
};
gpio@de00 {
reg = <0xde00 0x100>;
qcom,pin-num = <31>;
- status = "disabled";
};
gpio@df00 {
reg = <0xdf00 0x100>;
qcom,pin-num = <32>;
- status = "disabled";
};
gpio@e000 {
reg = <0xe000 0x100>;
qcom,pin-num = <33>;
- status = "disabled";
};
gpio@e100 {
reg = <0xe100 0x100>;
qcom,pin-num = <34>;
- status = "disabled";
};
gpio@e200 {
reg = <0xe200 0x100>;
qcom,pin-num = <35>;
- status = "disabled";
};
gpio@e300 {
reg = <0xe300 0x100>;
qcom,pin-num = <36>;
- status = "disabled";
};
};
- pm8941_mpps {
+ pm8941_mpps: mpps {
spmi-dev-container;
compatible = "qcom,qpnp-pin";
gpio-controller;
@@ -304,49 +405,41 @@
mpp@a000 {
reg = <0xa000 0x100>;
qcom,pin-num = <1>;
- status = "disabled";
};
mpp@a100 {
reg = <0xa100 0x100>;
qcom,pin-num = <2>;
- status = "disabled";
};
mpp@a200 {
reg = <0xa200 0x100>;
qcom,pin-num = <3>;
- status = "disabled";
};
mpp@a300 {
reg = <0xa300 0x100>;
qcom,pin-num = <4>;
- status = "disabled";
};
mpp@a400 {
reg = <0xa400 0x100>;
qcom,pin-num = <5>;
- status = "disabled";
};
mpp@a500 {
reg = <0xa500 0x100>;
qcom,pin-num = <6>;
- status = "disabled";
};
mpp@a600 {
reg = <0xa600 0x100>;
qcom,pin-num = <7>;
- status = "disabled";
};
mpp@a700 {
reg = <0xa700 0x100>;
qcom,pin-num = <8>;
- status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/msm8974-camera.dtsi b/arch/arm/boot/dts/msm8974-camera.dtsi
index c92188a..fd652a0 100644
--- a/arch/arm/boot/dts/msm8974-camera.dtsi
+++ b/arch/arm/boot/dts/msm8974-camera.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -181,7 +181,6 @@
reg = <0x6e 0x0>;
qcom,csi-if = <1>;
qcom,csid-core = <0>;
- qcom,is-vpe = <1>;
qcom,flash-type = <0>;
qcom,mount-angle = <90>;
qcom,sensor-name = "s5k3l1yx";
@@ -222,8 +221,7 @@
compatible = "qcom,ov2720";
reg = <0x6c 0x0>;
qcom,csi-if = <1>;
- qcom,csid-core = <1>;
- qcom,is-vpe = <1>;
+ qcom,csid-core = <0>;
qcom,flash-type = <0>;
qcom,mount-angle = <0>;
qcom,sensor-name = "ov2720";
@@ -257,5 +255,40 @@
qcom,camera-type = <1>;
qcom,sensor-type = <0>;
};
+
+ qcom,camera@90 {
+ compatible = "qcom,mt9m114";
+ reg = <0x90 0x0>;
+ qcom,csi-if = <1>;
+ qcom,csid-core = <0>;
+ qcom,flash-type = <0>;
+ qcom,mount-angle = <0>;
+ qcom,sensor-name = "mt9m114";
+ cam_vdig-supply = <&pm8941_l3>;
+ cam_vana-supply = <&pm8941_l17>;
+ cam_vio-supply = <&pm8941_lvs3>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio";
+ qcom,cam-vreg-type = <0 0 1>;
+ qcom,cam-vreg-min-voltage = <1225000 2850000 0>;
+ qcom,cam-vreg-max-voltage = <1225000 2850000 0>;
+ qcom,cam-vreg-op-mode = <105000 80000 0>;
+ qcom,gpio-no-mux = <0>;
+ gpios = <&msmgpio 16 0>,
+ <&msmgpio 92 0>;
+ qcom,gpio-common-tbl-num = <0>;
+ qcom,gpio-common-tbl-flags = <1>;
+ qcom,gpio-common-tbl-label = "CAMIF_MCLK";
+ qcom,gpio-req-tbl-num = <1>;
+ qcom,gpio-req-tbl-flags = <0>;
+ qcom,gpio-req-tbl-label = "CAM_RESET1";
+ qcom,gpio-set-tbl-num = <1 1>;
+ qcom,gpio-set-tbl-flags = <0 2>;
+ qcom,gpio-set-tbl-delay = <1000 4000>;
+ qcom,csi-lane-assign = <0x4320>;
+ qcom,csi-lane-mask = <0x3>;
+ qcom,csi-phy-sel = <1>;
+ qcom,camera-type = <1>;
+ qcom,sensor-type = <1>;
+ };
};
};
diff --git a/arch/arm/boot/dts/msm8974-cdp.dts b/arch/arm/boot/dts/msm8974-cdp.dts
index 7aeb33c..aff0adc 100644
--- a/arch/arm/boot/dts/msm8974-cdp.dts
+++ b/arch/arm/boot/dts/msm8974-cdp.dts
@@ -168,3 +168,196 @@
cd-gpios = <&msmgpio 62 0x1>;
wp-gpios = <&pm8941_gpios 29 0x1>;
};
+
+&pm8941_gpios {
+ gpio@c000 { /* GPIO 1 */
+ };
+
+ gpio@c100 { /* GPIO 2 */
+ };
+
+ gpio@c200 { /* GPIO 3 */
+ qcom,mode = <0>;
+ qcom,pull = <0>;
+ qcom,vin-sel = <2>;
+ qcom,select = <0>;
+ };
+
+ gpio@c300 { /* GPIO 4 */
+ qcom,mode = <0>;
+ qcom,pull = <0>;
+ qcom,vin-sel = <2>;
+ qcom,select = <0>;
+ };
+
+ gpio@c400 { /* GPIO 5 */
+ qcom,mode = <0>;
+ qcom,pull = <0>;
+ qcom,vin-sel = <2>;
+ qcom,select = <0>;
+ };
+
+ gpio@c500 { /* GPIO 6 */
+ };
+
+ gpio@c600 { /* GPIO 7 */
+ };
+
+ gpio@c700 { /* GPIO 8 */
+ };
+
+ gpio@c800 { /* GPIO 9 */
+ };
+
+ gpio@c900 { /* GPIO 10 */
+ };
+
+ gpio@ca00 { /* GPIO 11 */
+ };
+
+ gpio@cb00 { /* GPIO 12 */
+ };
+
+ gpio@cc00 { /* GPIO 13 */
+ };
+
+ gpio@cd00 { /* GPIO 14 */
+ };
+
+ gpio@ce00 { /* GPIO 15 */
+ qcom,mode = <1>;
+ qcom,output-type = <0>;
+ qcom,pull = <5>;
+ qcom,vin-sel = <2>;
+ qcom,out-strength = <3>;
+ qcom,src-select = <2>;
+ qcom,master-en = <1>;
+ };
+
+ gpio@cf00 { /* GPIO 16 */
+ };
+
+ gpio@d000 { /* GPIO 17 */
+ };
+
+ gpio@d100 { /* GPIO 18 */
+ };
+
+ gpio@d200 { /* GPIO 19 */
+ qcom,mode = <1>; /* QPNP_PIN_MODE_DIG_OUT */
+ qcom,output-type = <0>; /* QPNP_PIN_OUT_BUF_CMOS */
+ qcom,pull = <5>; /* QPNP_PIN_PULL_NO */
+ qcom,vin-sel = <2>; /* QPNP_PIN_VIN2 */
+ qcom,out-strength = <2>; /* QPNP_PIN_OUT_STRENGTH_MED */
+ qcom,src-select = <0>; /* QPNP_PIN_SEL_FUNC_CONSTANT */
+ qcom,master-en = <1>;
+ };
+
+ gpio@d300 { /* GPIO 20 */
+ };
+
+ gpio@d400 { /* GPIO 21 */
+ };
+
+ gpio@d500 { /* GPIO 22 */
+ };
+
+ gpio@d600 { /* GPIO 23 */
+ };
+
+ gpio@d700 { /* GPIO 24 */
+ };
+
+ gpio@d800 { /* GPIO 25 */
+ };
+
+ gpio@d900 { /* GPIO 26 */
+ };
+
+ gpio@da00 { /* GPIO 27 */
+ };
+
+ gpio@db00 { /* GPIO 28 */
+ };
+
+ gpio@dc00 { /* GPIO 29 */
+ qcom,pull = <0>; /* set to default pull */
+ qcom,master-en = <1>;
+ qcom,vin-sel = <2>; /* select 1.8 V source */
+ };
+
+ gpio@dd00 { /* GPIO 30 */
+ };
+
+ gpio@de00 { /* GPIO 31 */
+ };
+
+ gpio@df00 { /* GPIO 32 */
+ };
+
+ gpio@e000 { /* GPIO 33 */
+ };
+
+ gpio@e100 { /* GPIO 34 */
+ };
+
+ gpio@e200 { /* GPIO 35 */
+ };
+
+ gpio@e300 { /* GPIO 36 */
+ };
+};
+
+&pm8941_mpps {
+
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ };
+
+ mpp@a200 { /* MPP 3 */
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+
+ mpp@a400 { /* MPP 5 */
+ /* SPI_ETH config */
+ qcom,mode = <1>; /* DIG_OUT */
+ qcom,output-type = <0>; /* CMOS */
+ qcom,vin-sel = <2>; /* PM8941_S3 1.8V > 1.6V */
+ qcom,src-select = <0>; /* CONSTANT */
+ qcom,master-en = <1>; /* ENABLE MPP */
+ };
+
+ mpp@a500 { /* MPP 6 */
+ /* SPI_ETH_RST config */
+ qcom,mode = <1>; /* DIG_OUT */
+ qcom,output-type = <0>; /* CMOS */
+ qcom,vin-sel = <2>; /* PM8941_S3 1.8V > 1.6V */
+ qcom,src-select = <0>; /* CONSTANT */
+ qcom,master-en = <1>; /* ENABLE MPP */
+ };
+
+ mpp@a600 { /* MPP 7 */
+ };
+
+ mpp@a700 { /* MPP 8 */
+ };
+};
+
+&pm8841_mpps {
+
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ };
+
+ mpp@a200 { /* MPP 3 */
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+};
diff --git a/arch/arm/boot/dts/msm8974-coresight.dtsi b/arch/arm/boot/dts/msm8974-coresight.dtsi
index 0b09bc8..ee3df10 100644
--- a/arch/arm/boot/dts/msm8974-coresight.dtsi
+++ b/arch/arm/boot/dts/msm8974-coresight.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -141,6 +141,7 @@
coresight-outports = <0>;
coresight-child-list = <&funnel_kpss>;
coresight-child-ports = <0>;
+ qcom,pc-save;
};
etm1: etm@fc33d000 {
@@ -153,6 +154,7 @@
coresight-outports = <0>;
coresight-child-list = <&funnel_kpss>;
coresight-child-ports = <1>;
+ qcom,pc-save;
};
etm2: etm@fc33e000 {
@@ -165,6 +167,7 @@
coresight-outports = <0>;
coresight-child-list = <&funnel_kpss>;
coresight-child-ports = <2>;
+ qcom,pc-save;
};
etm3: etm@fc33f000 {
@@ -177,6 +180,7 @@
coresight-outports = <0>;
coresight-child-list = <&funnel_kpss>;
coresight-child-ports = <3>;
+ qcom,pc-save;
};
csr: csr@fc302000 {
diff --git a/arch/arm/boot/dts/msm8974-fluid.dts b/arch/arm/boot/dts/msm8974-fluid.dts
new file mode 100644
index 0000000..b1d467e
--- /dev/null
+++ b/arch/arm/boot/dts/msm8974-fluid.dts
@@ -0,0 +1,366 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+/include/ "msm8974.dtsi"
+/include/ "dsi-panel-toshiba-720p-video.dtsi"
+
+/ {
+ model = "Qualcomm MSM 8974 FLUID";
+ compatible = "qcom,msm8974-fluid", "qcom,msm8974";
+ qcom,msm-id = <126 3 0>;
+
+ serial@f991e000 {
+ status = "ok";
+ };
+
+ qcom,mdss_dsi@fd922800 {
+ qcom,mdss_dsi_toshiba_720p_video {
+ status = "ok";
+ };
+ };
+
+ i2c@f9924000 {
+ atmel_mxt_ts@4a {
+ compatible = "atmel,mxt-ts";
+ reg = <0x4a>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <61 0x2>;
+ vdd_ana-supply = <&pm8941_l18>;
+ vcc_i2c-supply = <&pm8941_lvs1>;
+ atmel,reset-gpio = <&msmgpio 60 0x00>;
+ atmel,irq-gpio = <&msmgpio 61 0x00>;
+ atmel,panel-coords = <0 0 760 1424>;
+ atmel,display-coords = <0 0 720 1280>;
+ atmel,i2c-pull-up = <1>;
+ atmel,cfg_1 {
+ atmel,family-id = <0x82>;
+ atmel,variant-id = <0x19>;
+ atmel,version = <0x10>;
+ atmel,build = <0xaa>;
+ atmel,config = [
+ /* Object 6, Instance = 0 */
+ 00 00 00 00 00 00
+ /* Object 38, Instance = 0 */
+ 15 00 02 10 08 0C 00 00
+ /* Object 7, Instance = 0 */
+ FF FF 32 03
+ /* Object 8, Instance = 0 */
+ 0F 00 0A 0A 00 00 0A 00 00 00
+ /* Object 9, Instance = 0 */
+ 83 00 00 18 0E 00 70 32 02 01
+ 00 03 01 01 05 0A 0A 0A 90 05
+ F8 02 00 00 0F 0F 00 00 48 2D
+ 07 0C 00 00 00 00
+ /* Object 15, Instance = 0 */
+ 00 00 00 00 00 00 00 00 00 00
+ 00
+ /* Object 18, Instance = 0 */
+ 00 00
+ /* Object 19, Instance = 0 */
+ 00 00 00 00 00 00
+ /* Object 23, Instance = 0 */
+ 00 00 00 00 00 00 00 00 00 00
+ 00 00 00 00 00
+ /* Object 25, Instance = 0 */
+ 00 00 00 00 00 00 00 00 00 00
+ 00 00 00 00 00
+ /* Object 40, Instance = 0 */
+ 00 00 00 00 00
+ /* Object 42, Instance = 0 */
+ 00 00 00 00 00 00 00 00 00 00
+ /* Object 46, Instance = 0 */
+ 00 00 10 10 00 00 03 00 00 01
+ /* Object 47, Instance = 0 */
+ 08 0A 28 0A 02 0A 00 8C 00 20
+ 00 00 00
+ /* Object 55, Instance = 0 */
+ 00 00 00 00 00 00
+ /* Object 56, Instance = 0 */
+ 03 00 01 18 05 05 05 05 05 05
+ 05 05 05 05 05 05 05 05 05 05
+ 05 05 05 05 05 05 05 05 00 00
+ 00 00 00 00 00 00 00 00 00 00
+ 00 00
+ /* Object 57, Instance = 0 */
+ 00 00 00
+ /* Object 61, Instance = 0 */
+ 00 00 00 00 00
+ /* Object 61, Instance = 1 */
+ 00 00 00 00 00
+ /* Object 62, Instance = 0 */
+ 7F 03 00 16 00 00 00 00 00 00
+ 04 08 10 18 05 00 0A 05 05 50
+ 14 19 34 1A 64 00 00 04 40 00
+ 00 00 00 00 30 32 02 00 01 00
+ 05 00 00 00 00 00 00 00 00 00
+ 00 00 0C 00
+ ];
+ };
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ camera_snapshot {
+ label = "camera_snapshot";
+ gpios = <&pm8941_gpios 3 0x1>;
+ linux,input-type = <1>;
+ linux,code = <0x2fe>;
+ gpio-key,wakeup;
+ debounce-interval = <15>;
+ };
+
+ camera_focus {
+ label = "camera_focus";
+ gpios = <&pm8941_gpios 4 0x1>;
+ linux,input-type = <1>;
+ linux,code = <0x210>;
+ gpio-key,wakeup;
+ debounce-interval = <15>;
+ };
+
+ vol_up {
+ label = "volume_up";
+ gpios = <&pm8941_gpios 5 0x1>;
+ linux,input-type = <1>;
+ linux,code = <115>;
+ gpio-key,wakeup;
+ debounce-interval = <15>;
+ };
+ };
+
+ spi@f9923000 {
+ ethernet-switch@2 {
+ compatible = "micrel,ks8851";
+ reg = <2>;
+ interrupt-parent = <&msmgpio>;
+ interrupts = <94 0>;
+ spi-max-frequency = <4800000>;
+ rst-gpio = <&pm8941_mpps 6 0>;
+ vdd-io-supply = <&spi_eth_vreg>;
+ vdd-phy-supply = <&spi_eth_vreg>;
+ };
+ };
+};
+
+&sdcc1 {
+ qcom,sdcc-bus-width = <4>;
+};
+
+&sdcc2 {
+ #address-cells = <0>;
+ interrupt-parent = <&sdcc2>;
+ interrupts = <0 1 2>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0xffffffff>;
+ interrupt-map = <0 &intc 0 125 0
+ 1 &intc 0 220 0
+ 2 &msmgpio 62 0x3>;
+ interrupt-names = "core_irq", "bam_irq", "status_irq";
+ cd-gpios = <&msmgpio 62 0x1>;
+};
+
+&pm8941_gpios {
+ gpio@c000 { /* GPIO 1 */
+ };
+
+ gpio@c100 { /* GPIO 2 */
+ };
+
+ gpio@c200 { /* GPIO 3 */
+ qcom,mode = <0>;
+ qcom,pull = <0>;
+ qcom,vin-sel = <2>;
+ qcom,select = <0>;
+ };
+
+ gpio@c300 { /* GPIO 4 */
+ qcom,mode = <0>;
+ qcom,pull = <0>;
+ qcom,vin-sel = <2>;
+ qcom,select = <0>;
+ };
+
+ gpio@c400 { /* GPIO 5 */
+ qcom,mode = <0>;
+ qcom,pull = <0>;
+ qcom,vin-sel = <2>;
+ qcom,select = <0>;
+ };
+
+ gpio@c500 { /* GPIO 6 */
+ };
+
+ gpio@c600 { /* GPIO 7 */
+ };
+
+ gpio@c700 { /* GPIO 8 */
+ };
+
+ gpio@c800 { /* GPIO 9 */
+ };
+
+ gpio@c900 { /* GPIO 10 */
+ };
+
+ gpio@ca00 { /* GPIO 11 */
+ };
+
+ gpio@cb00 { /* GPIO 12 */
+ };
+
+ gpio@cc00 { /* GPIO 13 */
+ };
+
+ gpio@cd00 { /* GPIO 14 */
+ };
+
+ gpio@ce00 { /* GPIO 15 */
+ qcom,mode = <1>;
+ qcom,output-type = <0>;
+ qcom,pull = <5>;
+ qcom,vin-sel = <2>;
+ qcom,out-strength = <3>;
+ qcom,src-select = <2>;
+ qcom,master-en = <1>;
+ };
+
+ gpio@cf00 { /* GPIO 16 */
+ };
+
+ gpio@d000 { /* GPIO 17 */
+ };
+
+ gpio@d100 { /* GPIO 18 */
+ };
+
+ gpio@d200 { /* GPIO 19 */
+ qcom,mode = <1>; /* QPNP_PIN_MODE_DIG_OUT */
+ qcom,output-type = <0>; /* QPNP_PIN_OUT_BUF_CMOS */
+ qcom,pull = <5>; /* QPNP_PIN_PULL_NO */
+ qcom,vin-sel = <2>; /* QPNP_PIN_VIN2 */
+ qcom,out-strength = <2>; /* QPNP_PIN_OUT_STRENGTH_MED */
+ qcom,src-select = <0>; /* QPNP_PIN_SEL_FUNC_CONSTANT */
+ qcom,master-en = <1>;
+ };
+
+ gpio@d300 { /* GPIO 20 */
+ };
+
+ gpio@d400 { /* GPIO 21 */
+ };
+
+ gpio@d500 { /* GPIO 22 */
+ };
+
+ gpio@d600 { /* GPIO 23 */
+ };
+
+ gpio@d700 { /* GPIO 24 */
+ };
+
+ gpio@d800 { /* GPIO 25 */
+ };
+
+ gpio@d900 { /* GPIO 26 */
+ };
+
+ gpio@da00 { /* GPIO 27 */
+ };
+
+ gpio@db00 { /* GPIO 28 */
+ };
+
+ gpio@dc00 { /* GPIO 29 */
+ qcom,pull = <0>; /* set to default pull */
+ qcom,master-en = <1>;
+ qcom,vin-sel = <2>; /* select 1.8 V source */
+ };
+
+ gpio@dd00 { /* GPIO 30 */
+ };
+
+ gpio@de00 { /* GPIO 31 */
+ };
+
+ gpio@df00 { /* GPIO 32 */
+ };
+
+ gpio@e000 { /* GPIO 33 */
+ };
+
+ gpio@e100 { /* GPIO 34 */
+ };
+
+ gpio@e200 { /* GPIO 35 */
+ };
+
+ gpio@e300 { /* GPIO 36 */
+ };
+};
+
+&pm8941_mpps {
+
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ };
+
+ mpp@a200 { /* MPP 3 */
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+
+ mpp@a400 { /* MPP 5 */
+ /* SPI_ETH config */
+ qcom,mode = <1>; /* DIG_OUT */
+ qcom,output-type = <0>; /* CMOS */
+ qcom,vin-sel = <2>; /* PM8941_S3 1.8V > 1.6V */
+ qcom,src-select = <0>; /* CONSTANT */
+ qcom,master-en = <1>; /* ENABLE MPP */
+ };
+
+ mpp@a500 { /* MPP 6 */
+ /* SPI_ETH_RST config */
+ qcom,mode = <1>; /* DIG_OUT */
+ qcom,output-type = <0>; /* CMOS */
+ qcom,vin-sel = <2>; /* PM8941_S3 1.8V > 1.6V */
+ qcom,src-select = <0>; /* CONSTANT */
+ qcom,master-en = <1>; /* ENABLE MPP */
+ };
+
+ mpp@a600 { /* MPP 7 */
+ };
+
+ mpp@a700 { /* MPP 8 */
+ };
+};
+
+&pm8841_mpps {
+
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ };
+
+ mpp@a200 { /* MPP 3 */
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+};
diff --git a/arch/arm/boot/dts/msm8974-gpio.dtsi b/arch/arm/boot/dts/msm8974-gpio.dtsi
deleted file mode 100644
index e7c742c..0000000
--- a/arch/arm/boot/dts/msm8974-gpio.dtsi
+++ /dev/null
@@ -1,266 +0,0 @@
-/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-&spmi_bus {
-
- qcom,pm8941@0 {
-
- pm8941_gpios: pm8941_gpios {
-
- gpio@c000 {
- status = "ok";
- };
-
- gpio@c100 {
- status = "ok";
- };
-
- gpio@c200 {
- qcom,mode = <0>;
- qcom,pull = <0>;
- qcom,vin-sel = <2>;
- qcom,select = <0>;
- status = "ok";
- };
-
- gpio@c300 {
- qcom,mode = <0>;
- qcom,pull = <0>;
- qcom,vin-sel = <2>;
- qcom,select = <0>;
- status = "ok";
- };
-
- gpio@c400 {
- qcom,mode = <0>;
- qcom,pull = <0>;
- qcom,vin-sel = <2>;
- qcom,select = <0>;
- status = "ok";
- };
-
- gpio@c500 {
- status = "ok";
- };
-
- gpio@c600 {
- status = "ok";
- };
-
- gpio@c700 {
- status = "ok";
- };
-
- gpio@c800 {
- status = "ok";
- };
-
- gpio@c900 {
- status = "ok";
- };
-
- gpio@ca00 {
- status = "ok";
- };
-
- gpio@cb00 {
- status = "ok";
- };
-
- gpio@cc00 {
- status = "ok";
- };
-
- gpio@cd00 {
- status = "ok";
- };
-
- gpio@ce00 {
- status = "ok";
- qcom,mode = <1>;
- qcom,output-type = <0>;
- qcom,pull = <5>;
- qcom,vin-sel = <2>;
- qcom,out-strength = <3>;
- qcom,src-select = <2>;
- qcom,master-en = <1>;
- };
-
- gpio@cf00 {
- status = "ok";
- };
-
- gpio@d000 {
- status = "ok";
- };
-
- gpio@d100 {
- status = "ok";
- };
-
- gpio@d200 {
- status = "ok";
- };
-
- gpio@d300 {
- status = "ok";
- };
-
- gpio@d400 {
- status = "ok";
- };
-
- gpio@d500 {
- status = "ok";
- };
-
- gpio@d600 {
- status = "ok";
- };
-
- gpio@d700 {
- status = "ok";
- };
-
- gpio@d800 {
- qcom,out-strength = <1>;
- status = "ok";
- };
-
- gpio@d900 {
- qcom,out-strength = <1>;
- status = "ok";
- };
-
- gpio@da00 {
- qcom,out-strength = <1>;
- status = "ok";
- };
-
- gpio@db00 {
- qcom,out-strength = <1>;
- status = "ok";
- };
-
- gpio@dc00 {
- qcom,pull = <0>; /* set to default pull */
- qcom,master-en = <1>;
- qcom,vin-sel = <2>; /* select 1.8 V source */
- status = "ok";
- };
-
- gpio@dd00 {
- qcom,out-strength = <1>;
- status = "ok";
- };
-
- gpio@de00 {
- qcom,out-strength = <1>;
- status = "ok";
- };
-
- gpio@df00 {
- qcom,out-strength = <1>;
- status = "ok";
- };
-
- gpio@e000 {
- qcom,out-strength = <1>;
- status = "ok";
- };
-
- gpio@e100 {
- qcom,out-strength = <1>;
- status = "ok";
- };
-
- gpio@e200 {
- qcom,out-strength = <1>;
- status = "ok";
- };
-
- gpio@e300 {
- qcom,out-strength = <1>;
- status = "ok";
- };
- };
-
- pm8941_mpps: pm8941_mpps {
-
- mpp@a000 {
- status = "ok";
- };
-
- mpp@a100 {
- status = "ok";
- };
-
- mpp@a200 {
- status = "ok";
- };
-
- mpp@a300 {
- status = "ok";
- };
-
- mpp@a400 {
- status = "ok";
- /* SPI_ETH config */
- qcom,mode = <1>; /* DIG_OUT */
- qcom,output-type = <0>; /* CMOS */
- qcom,vin-sel = <2>; /* PM8941_S3 1.8V > 1.6V */
- qcom,src-select = <0>; /* CONSTANT */
- qcom,master-en = <1>; /* ENABLE MPP */
- };
-
- mpp@a500 {
- status = "ok";
- /* SPI_ETH_RST config */
- qcom,mode = <1>; /* DIG_OUT */
- qcom,output-type = <0>; /* CMOS */
- qcom,vin-sel = <2>; /* PM8941_S3 1.8V > 1.6V */
- qcom,src-select = <0>; /* CONSTANT */
- qcom,master-en = <1>; /* ENABLE MPP */
- };
-
- mpp@a600 {
- status = "ok";
- };
-
- mpp@a700 {
- status = "ok";
- };
- };
- };
-
- qcom,pm8841@4 {
-
- pm8841_mpps: pm8841_mpps {
-
- mpp@a000 {
- status = "ok";
- };
-
- mpp@a100 {
- status = "ok";
- };
-
- mpp@a200 {
- status = "ok";
- };
-
- mpp@a300 {
- status = "ok";
- };
- };
- };
-};
diff --git a/arch/arm/boot/dts/msm8974-liquid.dts b/arch/arm/boot/dts/msm8974-liquid.dts
index 5de2d43..2abc1d5 100644
--- a/arch/arm/boot/dts/msm8974-liquid.dts
+++ b/arch/arm/boot/dts/msm8974-liquid.dts
@@ -24,4 +24,195 @@
};
};
+&pm8941_gpios {
+ gpio@c000 { /* GPIO 1 */
+ };
+ gpio@c100 { /* GPIO 2 */
+ };
+
+ gpio@c200 { /* GPIO 3 */
+ qcom,mode = <0>;
+ qcom,pull = <0>;
+ qcom,vin-sel = <2>;
+ qcom,select = <0>;
+ };
+
+ gpio@c300 { /* GPIO 4 */
+ qcom,mode = <0>;
+ qcom,pull = <0>;
+ qcom,vin-sel = <2>;
+ qcom,select = <0>;
+ };
+
+ gpio@c400 { /* GPIO 5 */
+ qcom,mode = <0>;
+ qcom,pull = <0>;
+ qcom,vin-sel = <2>;
+ qcom,select = <0>;
+ };
+
+ gpio@c500 { /* GPIO 6 */
+ };
+
+ gpio@c600 { /* GPIO 7 */
+ };
+
+ gpio@c700 { /* GPIO 8 */
+ };
+
+ gpio@c800 { /* GPIO 9 */
+ };
+
+ gpio@c900 { /* GPIO 10 */
+ };
+
+ gpio@ca00 { /* GPIO 11 */
+ };
+
+ gpio@cb00 { /* GPIO 12 */
+ };
+
+ gpio@cc00 { /* GPIO 13 */
+ };
+
+ gpio@cd00 { /* GPIO 14 */
+ };
+
+ gpio@ce00 { /* GPIO 15 */
+ qcom,mode = <1>;
+ qcom,output-type = <0>;
+ qcom,pull = <5>;
+ qcom,vin-sel = <2>;
+ qcom,out-strength = <3>;
+ qcom,src-select = <2>;
+ qcom,master-en = <1>;
+ };
+
+ gpio@cf00 { /* GPIO 16 */
+ };
+
+ gpio@d000 { /* GPIO 17 */
+ };
+
+ gpio@d100 { /* GPIO 18 */
+ };
+
+ gpio@d200 { /* GPIO 19 */
+ qcom,mode = <1>; /* QPNP_PIN_MODE_DIG_OUT */
+ qcom,output-type = <0>; /* QPNP_PIN_OUT_BUF_CMOS */
+ qcom,pull = <5>; /* QPNP_PIN_PULL_NO */
+ qcom,vin-sel = <2>; /* QPNP_PIN_VIN2 */
+ qcom,out-strength = <2>; /* QPNP_PIN_OUT_STRENGTH_MED */
+ qcom,src-select = <0>; /* QPNP_PIN_SEL_FUNC_CONSTANT */
+ qcom,master-en = <1>;
+ };
+
+ gpio@d300 { /* GPIO 20 */
+ };
+
+ gpio@d400 { /* GPIO 21 */
+ };
+
+ gpio@d500 { /* GPIO 22 */
+ };
+
+ gpio@d600 { /* GPIO 23 */
+ };
+
+ gpio@d700 { /* GPIO 24 */
+ };
+
+ gpio@d800 { /* GPIO 25 */
+ };
+
+ gpio@d900 { /* GPIO 26 */
+ };
+
+ gpio@da00 { /* GPIO 27 */
+ };
+
+ gpio@db00 { /* GPIO 28 */
+ };
+
+ gpio@dc00 { /* GPIO 29 */
+ qcom,pull = <0>; /* set to default pull */
+ qcom,master-en = <1>;
+ qcom,vin-sel = <2>; /* select 1.8 V source */
+ };
+
+ gpio@dd00 { /* GPIO 30 */
+ };
+
+ gpio@de00 { /* GPIO 31 */
+ };
+
+ gpio@df00 { /* GPIO 32 */
+ };
+
+ gpio@e000 { /* GPIO 33 */
+ };
+
+ gpio@e100 { /* GPIO 34 */
+ };
+
+ gpio@e200 { /* GPIO 35 */
+ };
+
+ gpio@e300 { /* GPIO 36 */
+ };
+};
+
+&pm8941_mpps {
+
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ };
+
+ mpp@a200 { /* MPP 3 */
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+
+ mpp@a400 { /* MPP 5 */
+ /* SPI_ETH config */
+ qcom,mode = <1>; /* DIG_OUT */
+ qcom,output-type = <0>; /* CMOS */
+ qcom,vin-sel = <2>; /* PM8941_S3 1.8V > 1.6V */
+ qcom,src-select = <0>; /* CONSTANT */
+ qcom,master-en = <1>; /* ENABLE MPP */
+ };
+
+ mpp@a500 { /* MPP 6 */
+ /* SPI_ETH_RST config */
+ qcom,mode = <1>; /* DIG_OUT */
+ qcom,output-type = <0>; /* CMOS */
+ qcom,vin-sel = <2>; /* PM8941_S3 1.8V > 1.6V */
+ qcom,src-select = <0>; /* CONSTANT */
+ qcom,master-en = <1>; /* ENABLE MPP */
+ };
+
+ mpp@a600 { /* MPP 7 */
+ };
+
+ mpp@a700 { /* MPP 8 */
+ };
+};
+
+&pm8841_mpps {
+
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ };
+
+ mpp@a200 { /* MPP 3 */
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+};
diff --git a/arch/arm/boot/dts/msm8974-mdss.dtsi b/arch/arm/boot/dts/msm8974-mdss.dtsi
index 344aa7f..ca98706 100644
--- a/arch/arm/boot/dts/msm8974-mdss.dtsi
+++ b/arch/arm/boot/dts/msm8974-mdss.dtsi
@@ -18,6 +18,8 @@
reg-names = "mdp_phys", "vbif_phys";
interrupts = <0 72 0>;
vdd-supply = <&gdsc_mdss>;
+ qcom,memory-reservation-type = "EBI1"; /* reserve EBI memory */
+ qcom,memory-reservation-size = <0x800000>; /* size 8MB */
};
mdss_dsi: qcom,mdss_dsi@fd922800 {
@@ -55,7 +57,7 @@
qcom,mdss_wb_panel {
compatible = "qcom,mdss_wb";
- qcom,mdss_pan_res = <640 480>;
+ qcom,mdss_pan_res = <1920 1080>;
qcom,mdss_pan_bpp = <24>;
};
};
diff --git a/arch/arm/boot/dts/msm8974-mtp.dts b/arch/arm/boot/dts/msm8974-mtp.dts
index d3e0bc3..00aec9f 100644
--- a/arch/arm/boot/dts/msm8974-mtp.dts
+++ b/arch/arm/boot/dts/msm8974-mtp.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -167,3 +167,196 @@
interrupt-names = "core_irq", "bam_irq", "status_irq";
cd-gpios = <&msmgpio 62 0x1>;
};
+
+&pm8941_gpios {
+ gpio@c000 { /* GPIO 1 */
+ };
+
+ gpio@c100 { /* GPIO 2 */
+ };
+
+ gpio@c200 { /* GPIO 3 */
+ qcom,mode = <0>;
+ qcom,pull = <0>;
+ qcom,vin-sel = <2>;
+ qcom,select = <0>;
+ };
+
+ gpio@c300 { /* GPIO 4 */
+ qcom,mode = <0>;
+ qcom,pull = <0>;
+ qcom,vin-sel = <2>;
+ qcom,select = <0>;
+ };
+
+ gpio@c400 { /* GPIO 5 */
+ qcom,mode = <0>;
+ qcom,pull = <0>;
+ qcom,vin-sel = <2>;
+ qcom,select = <0>;
+ };
+
+ gpio@c500 { /* GPIO 6 */
+ };
+
+ gpio@c600 { /* GPIO 7 */
+ };
+
+ gpio@c700 { /* GPIO 8 */
+ };
+
+ gpio@c800 { /* GPIO 9 */
+ };
+
+ gpio@c900 { /* GPIO 10 */
+ };
+
+ gpio@ca00 { /* GPIO 11 */
+ };
+
+ gpio@cb00 { /* GPIO 12 */
+ };
+
+ gpio@cc00 { /* GPIO 13 */
+ };
+
+ gpio@cd00 { /* GPIO 14 */
+ };
+
+ gpio@ce00 { /* GPIO 15 */
+ qcom,mode = <1>;
+ qcom,output-type = <0>;
+ qcom,pull = <5>;
+ qcom,vin-sel = <2>;
+ qcom,out-strength = <3>;
+ qcom,src-select = <2>;
+ qcom,master-en = <1>;
+ };
+
+ gpio@cf00 { /* GPIO 16 */
+ };
+
+ gpio@d000 { /* GPIO 17 */
+ };
+
+ gpio@d100 { /* GPIO 18 */
+ };
+
+ gpio@d200 { /* GPIO 19 */
+ qcom,mode = <1>; /* QPNP_PIN_MODE_DIG_OUT */
+ qcom,output-type = <0>; /* QPNP_PIN_OUT_BUF_CMOS */
+ qcom,pull = <5>; /* QPNP_PIN_PULL_NO */
+ qcom,vin-sel = <2>; /* QPNP_PIN_VIN2 */
+ qcom,out-strength = <2>; /* QPNP_PIN_OUT_STRENGTH_MED */
+ qcom,src-select = <0>; /* QPNP_PIN_SEL_FUNC_CONSTANT */
+ qcom,master-en = <1>;
+ };
+
+ gpio@d300 { /* GPIO 20 */
+ };
+
+ gpio@d400 { /* GPIO 21 */
+ };
+
+ gpio@d500 { /* GPIO 22 */
+ };
+
+ gpio@d600 { /* GPIO 23 */
+ };
+
+ gpio@d700 { /* GPIO 24 */
+ };
+
+ gpio@d800 { /* GPIO 25 */
+ };
+
+ gpio@d900 { /* GPIO 26 */
+ };
+
+ gpio@da00 { /* GPIO 27 */
+ };
+
+ gpio@db00 { /* GPIO 28 */
+ };
+
+ gpio@dc00 { /* GPIO 29 */
+ qcom,pull = <0>; /* set to default pull */
+ qcom,master-en = <1>;
+ qcom,vin-sel = <2>; /* select 1.8 V source */
+ };
+
+ gpio@dd00 { /* GPIO 30 */
+ };
+
+ gpio@de00 { /* GPIO 31 */
+ };
+
+ gpio@df00 { /* GPIO 32 */
+ };
+
+ gpio@e000 { /* GPIO 33 */
+ };
+
+ gpio@e100 { /* GPIO 34 */
+ };
+
+ gpio@e200 { /* GPIO 35 */
+ };
+
+ gpio@e300 { /* GPIO 36 */
+ };
+};
+
+&pm8941_mpps {
+
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ };
+
+ mpp@a200 { /* MPP 3 */
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+
+ mpp@a400 { /* MPP 5 */
+ /* SPI_ETH config */
+ qcom,mode = <1>; /* DIG_OUT */
+ qcom,output-type = <0>; /* CMOS */
+ qcom,vin-sel = <2>; /* PM8941_S3 1.8V > 1.6V */
+ qcom,src-select = <0>; /* CONSTANT */
+ qcom,master-en = <1>; /* ENABLE MPP */
+ };
+
+ mpp@a500 { /* MPP 6 */
+ /* SPI_ETH_RST config */
+ qcom,mode = <1>; /* DIG_OUT */
+ qcom,output-type = <0>; /* CMOS */
+ qcom,vin-sel = <2>; /* PM8941_S3 1.8V > 1.6V */
+ qcom,src-select = <0>; /* CONSTANT */
+ qcom,master-en = <1>; /* ENABLE MPP */
+ };
+
+ mpp@a600 { /* MPP 7 */
+ };
+
+ mpp@a700 { /* MPP 8 */
+ };
+};
+
+&pm8841_mpps {
+
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ };
+
+ mpp@a200 { /* MPP 3 */
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+};
diff --git a/arch/arm/boot/dts/msm8974-regulator.dtsi b/arch/arm/boot/dts/msm8974-regulator.dtsi
index 1fd96f9..de9e98c 100644
--- a/arch/arm/boot/dts/msm8974-regulator.dtsi
+++ b/arch/arm/boot/dts/msm8974-regulator.dtsi
@@ -58,6 +58,15 @@
status = "okay";
compatible = "qcom,rpm-regulator-smd";
};
+ pm8841_s1_so: regulator-s1-so {
+ regulator-name = "8841_s1_so";
+ qcom,set = <2>;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <1050000>;
+ qcom,init-voltage = <675000>;
+ status = "okay";
+ compatible = "qcom,rpm-regulator-smd";
+ };
};
rpm-regulator-smpb2 {
diff --git a/arch/arm/boot/dts/msm8974.dtsi b/arch/arm/boot/dts/msm8974.dtsi
index fe60c83..b992e86 100644
--- a/arch/arm/boot/dts/msm8974.dtsi
+++ b/arch/arm/boot/dts/msm8974.dtsi
@@ -60,6 +60,10 @@
<244800 133330000>;
};
+ qcom,wfd {
+ compatible = "qcom,msm-wfd";
+ };
+
serial@f991f000 {
compatible = "qcom,msm-lsuart-v14";
reg = <0xf991f000 0x1000>;
@@ -235,6 +239,19 @@
qcom,bam-dma-res-pipes = <6>;
};
+ spi@f9966000 {
+ compatible = "qcom,spi-qup-v2";
+ cell-index = <7>;
+ reg = <0xf9966000 0x1000>;
+ interrupts = <0 104 0>;
+ spi-max-frequency = <19200000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpios = <&msmgpio 56 0>, /* CLK */
+ <&msmgpio 54 0>, /* MISO */
+ <&msmgpio 53 0>; /* MOSI */
+ cs-gpios = <&msmgpio 55 0>;
+ };
slim@fe12f000 {
cell-index = <1>;
@@ -302,7 +319,6 @@
qcom,audio-routing =
"RX_BIAS", "MCLK",
"LDO_H", "MCLK",
- "HEADPHONE", "LDO_H",
"Ext Spk Bottom Pos", "LINEOUT1",
"Ext Spk Bottom Neg", "LINEOUT3",
"Ext Spk Top Pos", "LINEOUT2",
@@ -629,6 +645,7 @@
compatible = "qcom,pil-q6v5-lpass";
reg = <0xfe200000 0x00100>,
<0xfd485100 0x00010>;
+ reg-names = "qdsp6_base", "halt_base";
qcom,firmware-name = "adsp";
};
@@ -669,6 +686,10 @@
compatible = "qcom,msm-dai-fe";
};
+ qcom,msm-pcm-afe {
+ compatible = "qcom,msm-pcm-afe";
+ };
+
qcom,msm-dai-q6 {
compatible = "qcom,msm-dai-q6";
qcom,msm-dai-q6-sb-0-rx {
@@ -680,6 +701,36 @@
compatible = "qcom,msm-dai-q6-dev";
qcom,msm-dai-q6-dev-id = <16385>;
};
+
+ qcom,msm-dai-q6-bt-sco-rx {
+ compatible = "qcom,msm-dai-q6-dev";
+ qcom,msm-dai-q6-dev-id = <12288>;
+ };
+
+ qcom,msm-dai-q6-bt-sco-tx {
+ compatible = "qcom,msm-dai-q6-dev";
+ qcom,msm-dai-q6-dev-id = <12289>;
+ };
+
+ qcom,msm-dai-q6-be-afe-pcm-rx {
+ compatible = "qcom,msm-dai-q6-dev";
+ qcom,msm-dai-q6-dev-id = <224>;
+ };
+
+ qcom,msm-dai-q6-be-afe-pcm-tx {
+ compatible = "qcom,msm-dai-q6-dev";
+ qcom,msm-dai-q6-dev-id = <225>;
+ };
+
+ qcom,msm-dai-q6-afe-proxy-rx {
+ compatible = "qcom,msm-dai-q6-dev";
+ qcom,msm-dai-q6-dev-id = <241>;
+ };
+
+ qcom,msm-dai-q6-afe-proxy-tx {
+ compatible = "qcom,msm-dai-q6-dev";
+ qcom,msm-dai-q6-dev-id = <240>;
+ };
};
qcom,msm-auxpcm {
@@ -723,6 +774,9 @@
<0xfc820000 0x020>,
<0xfc401680 0x004>,
<0xfc980008 0x004>;
+ reg-names = "qdsp6_base", "halt_base", "rmb_base",
+ "restart_reg", "clamp_reg";
+
vdd_mss-supply = <&pm8841_s3>;
qcom,firmware-name = "mba";
@@ -733,6 +787,7 @@
compatible = "qcom,pil-mba";
reg = <0xfc820000 0x0020>,
<0x0d1fc000 0x4000>;
+ reg-names = "rmb_base", "metadata_base";
qcom,firmware-name = "modem";
qcom,depends-on = "mba";
@@ -743,6 +798,7 @@
reg = <0xfb21b000 0x3000>,
<0xfc401700 0x4>,
<0xfd485300 0xc>;
+ reg-names = "pmu_base", "clk_base", "halt_base";
vdd_pronto_pll-supply = <&pm8941_l12>;
qcom,firmware-name = "wcnss";
@@ -847,6 +903,7 @@
compatible = "qcom,pil-venus";
reg = <0xfdce0000 0x4000>,
<0xfdc80208 0x8>;
+ reg-names = "wrapper_base", "vbif_base";
vdd-supply = <&gdsc_venus>;
qcom,firmware-name = "venus";
@@ -860,6 +917,14 @@
interrupt-names = "l1_irq", "l2_irq";
};
+ qcom,cache_dump {
+ compatible = "qcom,cache_dump";
+ qcom,l1-dump-size = <0x100000>;
+ qcom,l2-dump-size = <0x500000>;
+ qcom,memory-reservation-type = "EBI1";
+ qcom,memory-reservation-size = <0x600000>; /* 6M EBI1 buffer */
+ };
+
tsens@fc4a8000 {
compatible = "qcom,msm-tsens";
reg = <0xfc4a8000 0x2000>,
@@ -980,11 +1045,16 @@
reg = <0xfc834000 0x7000>;
interrupts = <0 29 1>;
};
+
+ qcom,msm-wdog-debug@fc401000 {
+ compatible = "qcom,msm-wdog-debug";
+ reg = <0xfc401000 0x1000>;
+ };
+
};
/include/ "msm-pm8x41-rpm-regulator.dtsi"
/include/ "msm-pm8841.dtsi"
/include/ "msm-pm8941.dtsi"
/include/ "msm8974-regulator.dtsi"
-/include/ "msm8974-gpio.dtsi"
/include/ "msm8974-clock.dtsi"
diff --git a/arch/arm/boot/dts/msm8974_pm.dtsi b/arch/arm/boot/dts/msm8974_pm.dtsi
index f3efbb8..e39a72a 100644
--- a/arch/arm/boot/dts/msm8974_pm.dtsi
+++ b/arch/arm/boot/dts/msm8974_pm.dtsi
@@ -117,10 +117,9 @@
qcom,vctl-port = <0x0>;
qcom,phase-port = <0x1>;
qcom,saw2-spm-cmd-ret = [00 20 03 22 00 0f];
- qcom,saw2-spm-cmd-gdhs = [00 20 32 0b 42 07 44 22 50 02 32 50
- 0f];
- qcom,saw2-spm-cmd-pc = [00 10 32 b0 11 0b 42 07 01 b0 12 44 a0
- 50 02 32 a0 50 0f];
+ qcom,saw2-spm-cmd-gdhs = [00 20 32 42 07 44 22 50 02 32 50 0f];
+ qcom,saw2-spm-cmd-pc = [00 10 32 b0 11 42 07 01 b0 12 44
+ 50 02 32 50 0f];
};
qcom,lpm-resources {
@@ -309,8 +308,9 @@
qcom,ipc-bit-offset = <1>;
qcom,gic-parent = <&intc>;
- qcom,gic-map = <47 180>, /* usb2_hsic_async_wakeup_irq */
+ qcom,gic-map = <47 172>, /* usb2_hsic_async_wakeup_irq */
<53 104>, /* mdss_irq */
+ <62 222>, /* ee0_krait_hlos_spmi_periph_irq */
<0xff 57>, /* mss_to_apps_irq(0) */
<0xff 58>, /* mss_to_apps_irq(1) */
<0xff 59>, /* mss_to_apps_irq(2) */
@@ -384,8 +384,8 @@
<40 95>;
};
- qcom,pc-cntr@fe800000 {
+ qcom,pc-cntr@fe805664 {
compatible = "qcom,pc-cntr";
- reg = <0xfe800664 0x40>;
+ reg = <0xfe805664 0x40>;
};
};
diff --git a/arch/arm/boot/dts/msm9625-cdp.dts b/arch/arm/boot/dts/msm9625-cdp.dts
index 6733f59..aa1ec92 100644
--- a/arch/arm/boot/dts/msm9625-cdp.dts
+++ b/arch/arm/boot/dts/msm9625-cdp.dts
@@ -19,3 +19,44 @@
compatible = "qcom,msm9625-cdp", "qcom,msm9625";
qcom,msm-id = <134 1 0>;
};
+
+/* PM8019 GPIO and MPP configuration */
+&pm8019_gpios {
+ gpio@c000 { /* GPIO 1 */
+ };
+
+ gpio@c100 { /* GPIO 2 */
+ };
+
+ gpio@c200 { /* GPIO 3 */
+ };
+
+ gpio@c300 { /* GPIO 4 */
+ };
+
+ gpio@c400 { /* GPIO 5 */
+ };
+
+ gpio@c500 { /* GPIO 6 */
+ };
+};
+
+&pm8019_mpps {
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ };
+
+ mpp@a200 { /* MPP 3 */
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+
+ mpp@a400 { /* MPP 5 */
+ };
+
+ mpp@a500 { /* MPP 6 */
+ };
+};
diff --git a/arch/arm/boot/dts/msm9625-mtp.dts b/arch/arm/boot/dts/msm9625-mtp.dts
index 32185dc..3ec949f 100644
--- a/arch/arm/boot/dts/msm9625-mtp.dts
+++ b/arch/arm/boot/dts/msm9625-mtp.dts
@@ -19,3 +19,44 @@
compatible = "qcom,msm9625-mtp", "qcom,msm9625";
qcom,msm-id = <134 8 0>;
};
+
+/* PM8019 GPIO and MPP configuration */
+&pm8019_gpios {
+ gpio@c000 { /* GPIO 1 */
+ };
+
+ gpio@c100 { /* GPIO 2 */
+ };
+
+ gpio@c200 { /* GPIO 3 */
+ };
+
+ gpio@c300 { /* GPIO 4 */
+ };
+
+ gpio@c400 { /* GPIO 5 */
+ };
+
+ gpio@c500 { /* GPIO 6 */
+ };
+};
+
+&pm8019_mpps {
+ mpp@a000 { /* MPP 1 */
+ };
+
+ mpp@a100 { /* MPP 2 */
+ };
+
+ mpp@a200 { /* MPP 3 */
+ };
+
+ mpp@a300 { /* MPP 4 */
+ };
+
+ mpp@a400 { /* MPP 5 */
+ };
+
+ mpp@a500 { /* MPP 6 */
+ };
+};
diff --git a/arch/arm/boot/dts/msm9625-regulator.dtsi b/arch/arm/boot/dts/msm9625-regulator.dtsi
new file mode 100644
index 0000000..c42af2c
--- /dev/null
+++ b/arch/arm/boot/dts/msm9625-regulator.dtsi
@@ -0,0 +1,164 @@
+/* Copyright (c) 2012, Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&spmi_bus {
+ qcom,pm8019@1 {
+ pm8019_s1: regulator@1400 {
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1050000>;
+ qcom,enable-time = <500>;
+ status = "okay";
+ };
+
+ pm8019_s2: regulator@1700 {
+ regulator-min-microvolt = <1250000>;
+ regulator-max-microvolt = <1250000>;
+ qcom,system-load = <100000>;
+ qcom,enable-time = <500>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ pm8019_s3: regulator@1a00 {
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ qcom,system-load = <100000>;
+ qcom,enable-time = <500>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ pm8019_s4: regulator@1d00 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2075000>;
+ qcom,system-load = <100000>;
+ qcom,enable-time = <500>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ pm8019_l1: regulator@4000 {
+ parent-supply = <&pm8019_s2>;
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ qcom,enable-time = <200>;
+ status = "okay";
+ };
+
+ pm8019_l2: regulator@4100 {
+ parent-supply = <&pm8019_s4>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,enable-time = <200>;
+ status = "okay";
+ };
+
+ pm8019_l3: regulator@4200 {
+ parent-supply = <&pm8019_s4>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,enable-time = <200>;
+ status = "okay";
+ };
+
+ pm8019_l4: regulator@4300 {
+ regulator-min-microvolt = <3075000>;
+ regulator-max-microvolt = <3075000>;
+ qcom,enable-time = <200>;
+ status = "okay";
+ };
+
+ pm8019_l5: regulator@4400 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2850000>;
+ qcom,enable-time = <200>;
+ status = "okay";
+ };
+
+ pm8019_l6: regulator@4500 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2850000>;
+ qcom,enable-time = <200>;
+ status = "okay";
+ };
+
+ pm8019_l7: regulator@4600 {
+ parent-supply = <&pm8019_s4>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,enable-time = <200>;
+ status = "okay";
+ };
+
+ pm8019_l8: regulator@4700 {
+ parent-supply = <&pm8019_s4>;
+ regulator-min-microvolt = <2050000>;
+ regulator-max-microvolt = <2050000>;
+ qcom,enable-time = <200>;
+ status = "okay";
+ };
+
+ pm8019_l9: regulator@4800 {
+ parent-supply = <&pm8019_s2>;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ qcom,system-load = <10000>;
+ qcom,enable-time = <200>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ pm8019_l10: regulator@4900 {
+ parent-supply = <&pm8019_s3>;
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ qcom,system-load = <10000>;
+ qcom,enable-time = <200>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ pm8019_l11: regulator@4a00 {
+ parent-supply = <&pm8019_s4>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,system-load = <10000>;
+ qcom,enable-time = <200>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ pm8019_l12: regulator@4b00 {
+ parent-supply = <&pm8019_s3>;
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ qcom,system-load = <10000>;
+ qcom,enable-time = <200>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ pm8019_l13: regulator@4c00 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2950000>;
+ qcom,enable-time = <200>;
+ status = "okay";
+ };
+
+ pm8019_l14: regulator@4d00 {
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <2700000>;
+ qcom,enable-time = <200>;
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/msm9625-rumi.dts b/arch/arm/boot/dts/msm9625-rumi.dts
index e4fa000..dadb3f7 100644
--- a/arch/arm/boot/dts/msm9625-rumi.dts
+++ b/arch/arm/boot/dts/msm9625-rumi.dts
@@ -18,4 +18,9 @@
model = "Qualcomm MSM 9625 RUMI";
compatible = "qcom,msm9625-rumi", "qcom,msm9625";
qcom,msm-id = <134 15 0>;
+
+ chosen{
+ bootargs = "root=/dev/ram rw init=/init console=ttyHSL0,115200n8 initrd=0x00000000,0x00000000 mem=29M@0x00200000 mem=10M@0x07600000";
+
+ };
};
diff --git a/arch/arm/boot/dts/msm9625.dtsi b/arch/arm/boot/dts/msm9625.dtsi
index 7b7adca..f50d14f 100644
--- a/arch/arm/boot/dts/msm9625.dtsi
+++ b/arch/arm/boot/dts/msm9625.dtsi
@@ -48,14 +48,14 @@
reg = <0xF9021000 0x1000>;
interrupts = <0 7 0>;
irq-is-not-percpu;
- clock-frequency = <5000000>;
+ clock-frequency = <19200000>;
};
qcom,sps@f9980000 {
compatible = "qcom,msm_sps";
reg = <0xf9984000 0x15000>,
<0xf9999000 0xb000>,
- <0xfe800000 0x4800>;
+ <0xfe803000 0x4800>;
interrupts = <0 94 0>;
qcom,device-type = <2>;
};
@@ -66,6 +66,26 @@
interrupts = <0 109 0>;
};
+ usb@f9a55000 {
+ compatible = "qcom,hsusb-otg";
+ reg = <0xf9a55000 0x400>;
+ interrupts = <0 134 0 0 140 0>;
+ interrupt-names = "core_irq", "async_irq";
+ HSUSB_VDDCX-supply = <&pm8019_l12>;
+ HSUSB_1p8-supply = <&pm8019_l2>;
+ HSUSB_3p3-supply = <&pm8019_l4>;
+
+ qcom,hsusb-otg-phy-type = <2>;
+ qcom,hsusb-otg-mode = <1>;
+ qcom,hsusb-otg-otg-control = <1>;
+ qcom,hsusb-otg-disable-reset;
+ };
+
+ android_usb@fc42b0c8 {
+ compatible = "qcom,android-usb";
+ reg = <0xfc42b0c8 0xc8>;
+ };
+
qcom,nand@f9ac0000 {
compatible = "qcom,msm-nand";
reg = <0xf9ac0000 0x1000>,
@@ -106,4 +126,41 @@
qcom,pet-time = <10000>;
qcom,ipi-ping = <0>;
};
+
+ rpm_bus: qcom,rpm-smd {
+ compatible = "qcom,rpm-smd";
+ rpm-channel-name = "rpm_requests";
+ rpm-channel-type = <15>; /* SMD_APPS_RPM */
+ };
+
+ spmi_bus: qcom,spmi@fc4c0000 {
+ cell-index = <0>;
+ compatible = "qcom,spmi-pmic-arb";
+ reg = <0xfc4cf000 0x1000>,
+ <0Xfc4cb000 0x1000>;
+ /* 190,ee0_krait_hlos_spmi_periph_irq */
+ /* 187,channel_0_krait_hlos_trans_done_irq */
+ interrupts = <0 190 0 0 187 0>;
+ qcom,not-wakeup;
+ qcom,pmic-arb-ee = <0>;
+ qcom,pmic-arb-channel = <0>;
+ qcom,pmic-arb-ppid-map = <0x02400000>, /* TEMP_ALARM */
+ <0x03100001>, /* VADC1_USR */
+ <0x06100002>, /* RTC_ALARM */
+ <0x06200003>, /* RTC_TIMER */
+ <0x0a000004>, /* MPP1 */
+ <0x0a100005>, /* MPP2 */
+ <0x0a200006>, /* MPP3 */
+ <0x0a300007>, /* MPP4 */
+ <0x0a400008>, /* MPP5 */
+ <0x0a500009>, /* MPP6 */
+ <0x0c20000a>, /* GPIO3 */
+ <0x0c30000b>, /* GPIO4 */
+ <0x0c50000c>, /* GPIO6 */
+ <0x0080000d>; /* PON */
+ };
};
+
+/include/ "msm-pm8019-rpm-regulator.dtsi"
+/include/ "msm-pm8019.dtsi"
+/include/ "msm9625-regulator.dtsi"
diff --git a/arch/arm/configs/fsm9xxx-perf_defconfig b/arch/arm/configs/fsm9xxx-perf_defconfig
index 4ba55de..93e84e9 100644
--- a/arch/arm/configs/fsm9xxx-perf_defconfig
+++ b/arch/arm/configs/fsm9xxx-perf_defconfig
@@ -39,6 +39,9 @@
# CONFIG_QSD_AUDIO is not set
# CONFIG_SURF_FFA_GPIO_KEYPAD is not set
CONFIG_MSM_WATCHDOG=y
+CONFIG_MSM_RPC_PMIC=y
+CONFIG_MSM_RPC_USB=y
+CONFIG_MSM_RPC_PMAPP=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_VMSPLIT_2G=y
diff --git a/arch/arm/configs/fsm9xxx_defconfig b/arch/arm/configs/fsm9xxx_defconfig
index ad1b6a6..c45063f 100644
--- a/arch/arm/configs/fsm9xxx_defconfig
+++ b/arch/arm/configs/fsm9xxx_defconfig
@@ -38,6 +38,9 @@
# CONFIG_QSD_AUDIO is not set
# CONFIG_SURF_FFA_GPIO_KEYPAD is not set
CONFIG_MSM_WATCHDOG=y
+CONFIG_MSM_RPC_PMIC=y
+CONFIG_MSM_RPC_USB=y
+CONFIG_MSM_RPC_PMAPP=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_VMSPLIT_2G=y
diff --git a/arch/arm/configs/msm7627a-perf_defconfig b/arch/arm/configs/msm7627a-perf_defconfig
index 1b792d9..9a0bfba 100644
--- a/arch/arm/configs/msm7627a-perf_defconfig
+++ b/arch/arm/configs/msm7627a-perf_defconfig
@@ -55,6 +55,9 @@
CONFIG_MSM_MULTIMEDIA_USE_ION=y
CONFIG_MSM_CPR=y
CONFIG_MSM_VP_REGULATOR=y
+CONFIG_MSM_RPC_PMIC=y
+CONFIG_MSM_RPC_USB=y
+CONFIG_MSM_RPC_PMAPP=y
CONFIG_ARM_THUMBEE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
@@ -283,6 +286,7 @@
CONFIG_ION=y
CONFIG_ION_MSM=y
CONFIG_MSM_KGSL=y
+CONFIG_MSM_KGSL_DISABLE_SHADOW_WRITES=y
CONFIG_FB=y
CONFIG_FB_MSM=y
# CONFIG_FB_MSM_BACKLIGHT is not set
diff --git a/arch/arm/configs/msm7627a_defconfig b/arch/arm/configs/msm7627a_defconfig
index aeb59af..60a2d72 100644
--- a/arch/arm/configs/msm7627a_defconfig
+++ b/arch/arm/configs/msm7627a_defconfig
@@ -57,6 +57,9 @@
CONFIG_MSM_RTB_SEPARATE_CPUS=y
CONFIG_MSM_CPR=y
CONFIG_MSM_VP_REGULATOR=y
+CONFIG_MSM_RPC_PMIC=y
+CONFIG_MSM_RPC_USB=y
+CONFIG_MSM_RPC_PMAPP=y
CONFIG_ARM_THUMBEE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
@@ -285,6 +288,7 @@
CONFIG_ION=y
CONFIG_ION_MSM=y
CONFIG_MSM_KGSL=y
+CONFIG_MSM_KGSL_DISABLE_SHADOW_WRITES=y
CONFIG_FB=y
CONFIG_FB_MSM=y
# CONFIG_FB_MSM_BACKLIGHT is not set
diff --git a/arch/arm/configs/msm7630-perf_defconfig b/arch/arm/configs/msm7630-perf_defconfig
index 1bf888b..401654d 100644
--- a/arch/arm/configs/msm7630-perf_defconfig
+++ b/arch/arm/configs/msm7630-perf_defconfig
@@ -44,6 +44,9 @@
CONFIG_MSM_IDLE_WAIT_ON_MODEM=2000
CONFIG_MSM_STANDALONE_POWER_COLLAPSE=y
CONFIG_MSM_MULTIMEDIA_USE_ION=y
+CONFIG_MSM_RPC_PMIC=y
+CONFIG_MSM_RPC_USB=y
+CONFIG_MSM_RPC_PMAPP=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
@@ -278,6 +281,7 @@
CONFIG_FB_MSM_MDP40=y
CONFIG_FB_MSM_OVERLAY=y
CONFIG_FB_MSM_OVERLAY0_WRITEBACK=y
+CONFIG_FB_MSM_NO_MDP_PIPE_CTRL=y
CONFIG_FB_MSM_TRY_MDDI_CATCH_LCDC_PRISM=y
CONFIG_FB_MSM_HDMI_ADV7520_PANEL=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
diff --git a/arch/arm/configs/msm7630_defconfig b/arch/arm/configs/msm7630_defconfig
index 5c5a152..0e066d9 100644
--- a/arch/arm/configs/msm7630_defconfig
+++ b/arch/arm/configs/msm7630_defconfig
@@ -44,6 +44,9 @@
CONFIG_MSM_IDLE_WAIT_ON_MODEM=2000
CONFIG_MSM_STANDALONE_POWER_COLLAPSE=y
CONFIG_MSM_MULTIMEDIA_USE_ION=y
+CONFIG_MSM_RPC_PMIC=y
+CONFIG_MSM_RPC_USB=y
+CONFIG_MSM_RPC_PMAPP=y
CONFIG_STRICT_MEMORY_RWX=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
diff --git a/arch/arm/configs/msm8960-perf_defconfig b/arch/arm/configs/msm8960-perf_defconfig
index 2c8f71e..45d52e4 100644
--- a/arch/arm/configs/msm8960-perf_defconfig
+++ b/arch/arm/configs/msm8960-perf_defconfig
@@ -69,6 +69,7 @@
CONFIG_MSM_DSPS=y
CONFIG_MSM_IPC_ROUTER=y
CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
+CONFIG_MSM_AVS_HW=y
# CONFIG_MSM_HW3D is not set
CONFIG_MSM_PIL_QDSP6V4=y
CONFIG_MSM_PIL_RIVA=y
@@ -96,6 +97,7 @@
CONFIG_MSM_L1_ERR_PANIC=y
CONFIG_MSM_L1_ERR_LOG=y
CONFIG_MSM_L2_ERP_2BIT_PANIC=y
+CONFIG_MSM_EVENT_TIMER=y
CONFIG_MSM_DCVS=y
CONFIG_MSM_HSIC_SYSMON=y
CONFIG_STRICT_MEMORY_RWX=y
@@ -345,6 +347,7 @@
CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_DEV=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
+CONFIG_MSM_WFD=y
CONFIG_USER_RC_INPUT=y
CONFIG_IR_GPIO_CIR=y
# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
@@ -389,6 +392,7 @@
CONFIG_FB_MSM_WRITEBACK_MSM_PANEL=y
CONFIG_FB_MSM_LVDS_MIPI_PANEL_DETECT=y
CONFIG_FB_MSM_HDMI_MSM_PANEL=y
+CONFIG_FB_MSM_HDMI_MHL_8334=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_SOUND=y
@@ -502,3 +506,4 @@
CONFIG_CRYPTO_DEV_QCEDEV=m
CONFIG_CRC_CCITT=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
+CONFIG_CONTROL_TRACE=m
diff --git a/arch/arm/configs/msm8960_defconfig b/arch/arm/configs/msm8960_defconfig
index a2deab2..465598f 100644
--- a/arch/arm/configs/msm8960_defconfig
+++ b/arch/arm/configs/msm8960_defconfig
@@ -68,6 +68,7 @@
CONFIG_MSM_DSPS=y
CONFIG_MSM_IPC_ROUTER=y
CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
+CONFIG_MSM_AVS_HW=y
# CONFIG_MSM_HW3D is not set
CONFIG_MSM_PIL_QDSP6V4=y
CONFIG_MSM_PIL_RIVA=y
@@ -87,6 +88,7 @@
CONFIG_MSM_RPM_RBCPR_STATS_LOG=y
CONFIG_MSM_BUS_SCALING=y
CONFIG_MSM_BUS_RPM_MULTI_TIER_ENABLED=y
+CONFIG_MSM_EVENT_TIMER=y
CONFIG_MSM_WATCHDOG=y
CONFIG_MSM_DLOAD_MODE=y
CONFIG_MSM_RTB=y
@@ -349,6 +351,7 @@
CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_DEV=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
+CONFIG_MSM_WFD=y
CONFIG_USER_RC_INPUT=y
CONFIG_IR_GPIO_CIR=y
# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
@@ -392,6 +395,7 @@
CONFIG_FB_MSM_WRITEBACK_MSM_PANEL=y
CONFIG_FB_MSM_LVDS_MIPI_PANEL_DETECT=y
CONFIG_FB_MSM_HDMI_MSM_PANEL=y
+CONFIG_FB_MSM_HDMI_MHL_8334=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_SOUND=y
@@ -510,6 +514,7 @@
CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
CONFIG_DEBUG_PAGEALLOC=y
CONFIG_ENABLE_DEFAULT_TRACERS=y
+CONFIG_CPU_FREQ_SWITCH_PROFILER=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_USER=y
CONFIG_PID_IN_CONTEXTIDR=y
@@ -519,3 +524,4 @@
CONFIG_CRYPTO_DEV_QCEDEV=m
CONFIG_CRC_CCITT=y
CONFIG_WCNSS_MEM_PRE_ALLOC=y
+CONFIG_CONTROL_TRACE=m
diff --git a/arch/arm/configs/msm8974-perf_defconfig b/arch/arm/configs/msm8974-perf_defconfig
new file mode 100644
index 0000000..2f1833e
--- /dev/null
+++ b/arch/arm/configs/msm8974-perf_defconfig
@@ -0,0 +1,405 @@
+# CONFIG_ARM_PATCH_PHYS_VIRT is not set
+CONFIG_EXPERIMENTAL=y
+CONFIG_LOCALVERSION="-perf"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEBUG=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_PANIC_TIMEOUT=5
+CONFIG_KALLSYMS_ALL=y
+CONFIG_ASHMEM=y
+CONFIG_EMBEDDED=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_EFI_PARTITION=y
+CONFIG_ARCH_MSM=y
+CONFIG_ARCH_MSM8974=y
+CONFIG_ARCH_MSM8226=y
+CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y
+# CONFIG_MSM_STACKED_MEMORY is not set
+CONFIG_CPU_HAS_L2_PMU=y
+# CONFIG_MSM_FIQ_SUPPORT is not set
+# CONFIG_MSM_PROC_COMM is not set
+CONFIG_MSM_SMD=y
+CONFIG_MSM_SMD_PKG4=y
+CONFIG_MSM_BAM_DMUX=y
+CONFIG_MSM_IPC_ROUTER=y
+CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
+# CONFIG_MSM_HW3D is not set
+CONFIG_MSM_SUBSYSTEM_RESTART=y
+CONFIG_MSM_PIL_LPASS_QDSP6V5=y
+CONFIG_MSM_PIL_MSS_QDSP6V5=y
+CONFIG_MSM_PIL_MBA=y
+CONFIG_MSM_PIL_VENUS=y
+CONFIG_MSM_PIL_PRONTO=y
+CONFIG_MSM_MODEM_SSR_8974=y
+CONFIG_MSM_ADSP_SSR_8974=y
+CONFIG_MSM_WCNSS_SSR_8974=y
+CONFIG_MSM_TZ_LOG=y
+CONFIG_MSM_DIRECT_SCLK_ACCESS=y
+CONFIG_MSM_BUS_SCALING=y
+CONFIG_MSM_WATCHDOG_V2=y
+CONFIG_MSM_MEMORY_DUMP=y
+CONFIG_MSM_DLOAD_MODE=y
+CONFIG_MSM_ADSP_LOADER=m
+CONFIG_MSM_OCMEM=y
+CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL=y
+CONFIG_MSM_OCMEM_DEBUG=y
+CONFIG_MSM_OCMEM_NONSECURE=y
+CONFIG_MSM_CACHE_ERP=y
+CONFIG_MSM_L1_ERR_PANIC=y
+CONFIG_MSM_L1_ERR_LOG=y
+CONFIG_MSM_L2_ERP_2BIT_PANIC=y
+CONFIG_STRICT_MEMORY_RWX=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_SMP=y
+# CONFIG_SMP_ON_UP is not set
+CONFIG_ARM_ARCH_TIMER=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_VMALLOC_RESERVE=0x19000000
+CONFIG_CC_STACKPROTECTOR=y
+CONFIG_CP_ACCESS=y
+CONFIG_USE_OF=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_IDLE=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_WAKELOCK=y
+CONFIG_PM_RUNTIME=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_IPV6=y
+CONFIG_IPV6_PRIVACY=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+CONFIG_NETFILTER=y
+CONFIG_NETFILTER_NETLINK_LOG=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CT_PROTO_DCCP=y
+CONFIG_NF_CT_PROTO_SCTP=y
+CONFIG_NF_CT_PROTO_UDPLITE=y
+CONFIG_NF_CONNTRACK_AMANDA=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_H323=y
+CONFIG_NF_CONNTRACK_IRC=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=y
+CONFIG_NF_CONNTRACK_PPTP=y
+CONFIG_NF_CONNTRACK_SANE=y
+CONFIG_NF_CONNTRACK_SIP=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NETFILTER_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_LOG=y
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_HELPER=y
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_QTAGUID=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
+CONFIG_NETFILTER_XT_MATCH_SOCKET=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
+CONFIG_NETFILTER_XT_MATCH_STRING=y
+CONFIG_NETFILTER_XT_MATCH_TIME=y
+CONFIG_NETFILTER_XT_MATCH_U32=y
+CONFIG_NF_CONNTRACK_IPV4=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=y
+CONFIG_IP_NF_MATCH_ECN=y
+CONFIG_IP_NF_MATCH_TTL=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_ARPTABLES=y
+CONFIG_IP_NF_ARPFILTER=y
+CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_NF_CONNTRACK_IPV6=y
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_IP6_NF_RAW=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_HTB=y
+CONFIG_NET_SCH_PRIO=y
+CONFIG_NET_CLS_FW=y
+CONFIG_NET_CLS_U32=y
+CONFIG_CLS_U32_MARK=y
+CONFIG_NET_CLS_FLOW=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_CMP=y
+CONFIG_NET_EMATCH_NBYTE=y
+CONFIG_NET_EMATCH_U32=y
+CONFIG_NET_EMATCH_META=y
+CONFIG_NET_EMATCH_TEXT=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCISMD=y
+CONFIG_MSM_BT_POWER=y
+CONFIG_CFG80211=m
+CONFIG_RFKILL=y
+CONFIG_GENLOCK=y
+CONFIG_GENLOCK_MISCDEVICE=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_QSEECOM=y
+CONFIG_SCSI=y
+CONFIG_SCSI_TGT=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_MD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_DM_CRYPT=y
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=y
+CONFIG_TUN=y
+CONFIG_KS8851=m
+# CONFIG_MSM_RMNET is not set
+CONFIG_MSM_RMNET_BAM=y
+CONFIG_SLIP=y
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_MODE_SLIP6=y
+CONFIG_WCNSS_CORE=y
+CONFIG_WCNSS_CORE_PRONTO=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=m
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ATMEL_MXT=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_SERIAL_MSM_HSL=y
+CONFIG_SERIAL_MSM_HSL_CONSOLE=y
+CONFIG_DIAG_CHAR=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_MSM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_QUP=y
+CONFIG_SPI=y
+CONFIG_SPI_QUP=y
+CONFIG_SPI_SPIDEV=m
+CONFIG_SPMI=y
+CONFIG_SPMI_MSM_PMIC_ARB=y
+CONFIG_MSM_QPNP_INT=y
+CONFIG_SLIMBUS_MSM_CTRL=y
+CONFIG_DEBUG_GPIO=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_QPNP_PIN=y
+CONFIG_GPIO_QPNP_PIN_DEBUG=y
+CONFIG_POWER_SUPPLY=y
+# CONFIG_BATTERY_MSM is not set
+CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y
+CONFIG_SENSORS_QPNP_ADC_CURRENT=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_TSENS8974=y
+CONFIG_WCD9320_CODEC=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_STUB=y
+CONFIG_REGULATOR_QPNP=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+CONFIG_VIDEOBUF2_MSM_MEM=y
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_MSM_CAMERA_V4L2=y
+CONFIG_OV2720=y
+CONFIG_MSM_CAMERA_SENSOR=y
+CONFIG_MSM_ACTUATOR=y
+CONFIG_MSM_JPEG=y
+CONFIG_MSM_CCI=y
+CONFIG_MSM_CSI30_HEADER=y
+CONFIG_MSM_CSIPHY=y
+CONFIG_MSM_CSID=y
+CONFIG_MSM_CSI2_REGISTER=y
+CONFIG_MSM_ISPIF=y
+CONFIG_S5K3L1YX=y
+CONFIG_MT9M114=y
+CONFIG_RADIO_IRIS=y
+CONFIG_RADIO_IRIS_TRANSPORT=m
+CONFIG_ION=y
+CONFIG_ION_MSM=y
+CONFIG_MSM_KGSL=y
+CONFIG_FB=y
+CONFIG_FB_MSM=y
+# CONFIG_FB_MSM_BACKLIGHT is not set
+CONFIG_FB_MSM_MDSS=y
+CONFIG_FB_MSM_MDSS_WRITEBACK=y
+CONFIG_FB_MSM_MDSS_HDMI_PANEL=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_MSM8974=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_USB_STORAGE_ALAUDA=y
+CONFIG_USB_STORAGE_ONETOUCH=y
+CONFIG_USB_STORAGE_KARMA=y
+CONFIG_USB_STORAGE_CYPRESS_ATACB=y
+CONFIG_USB_STORAGE_ENE_UB6250=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_CI13XXX_MSM=y
+CONFIG_USB_G_ANDROID=y
+CONFIG_MMC=y
+CONFIG_MMC_PERF_PROFILING=y
+CONFIG_MMC_UNSAFE_RESUME=y
+CONFIG_MMC_CLKGATE=y
+CONFIG_MMC_PARANOID_SD_INIT=y
+CONFIG_MMC_BLOCK_MINORS=32
+# CONFIG_MMC_BLOCK_BOUNCE is not set
+CONFIG_MMC_TEST=m
+CONFIG_MMC_MSM=y
+CONFIG_MMC_MSM_SPS_SUPPORT=y
+CONFIG_LEDS_QPNP=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_SWITCH=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_DRV_MSM is not set
+CONFIG_RTC_DRV_QPNP=y
+CONFIG_STAGING=y
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_LOGGER=y
+CONFIG_ANDROID_RAM_CONSOLE=y
+CONFIG_ANDROID_TIMED_GPIO=y
+CONFIG_ANDROID_LOW_MEMORY_KILLER=y
+CONFIG_MSM_SSBI=y
+CONFIG_SPS=y
+CONFIG_USB_BAM=y
+CONFIG_SPS_SUPPORT_BAMDMA=y
+CONFIG_SPS_SUPPORT_NDP_BAM=y
+CONFIG_QPNP_POWER_ON=y
+CONFIG_QPNP_CLKDIV=y
+CONFIG_MSM_IOMMU=y
+CONFIG_MSM_QDSS=y
+CONFIG_MSM_QDSS_ETM_PCSAVE_DEFAULT_ENABLE=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT4_FS=y
+CONFIG_FUSE_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_TIMER_STATS=y
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_ENABLE_DEFAULT_TRACERS=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_DEBUG_USER=y
+CONFIG_PID_IN_CONTEXTIDR=y
+CONFIG_KEYS=y
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_DEV_QCRYPTO=m
+CONFIG_CRYPTO_DEV_QCE=m
+CONFIG_CRYPTO_DEV_QCEDEV=m
+CONFIG_CRC_CCITT=y
+CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL=y
diff --git a/arch/arm/configs/msm8974_defconfig b/arch/arm/configs/msm8974_defconfig
index 471ecd9..1230fbe 100644
--- a/arch/arm/configs/msm8974_defconfig
+++ b/arch/arm/configs/msm8974_defconfig
@@ -20,14 +20,18 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_PANIC_TIMEOUT=5
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
+CONFIG_OPROFILE=y
+CONFIG_KPROBES=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_EFI_PARTITION=y
CONFIG_ARCH_MSM=y
@@ -35,39 +39,44 @@
CONFIG_ARCH_MSM8226=y
CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y
# CONFIG_MSM_STACKED_MEMORY is not set
-CONFIG_KERNEL_PMEM_EBI_REGION=y
CONFIG_CPU_HAS_L2_PMU=y
# CONFIG_MSM_FIQ_SUPPORT is not set
# CONFIG_MSM_PROC_COMM is not set
CONFIG_MSM_SMD=y
CONFIG_MSM_SMD_PKG4=y
+CONFIG_MSM_BAM_DMUX=y
CONFIG_MSM_IPC_ROUTER=y
CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
# CONFIG_MSM_HW3D is not set
+CONFIG_MSM_SUBSYSTEM_RESTART=y
+CONFIG_MSM_SYSMON_COMM=y
CONFIG_MSM_PIL_LPASS_QDSP6V5=y
CONFIG_MSM_PIL_MSS_QDSP6V5=y
CONFIG_MSM_PIL_MBA=y
CONFIG_MSM_PIL_VENUS=y
CONFIG_MSM_PIL_PRONTO=y
-CONFIG_MSM_SUBSYSTEM_RESTART=y
CONFIG_MSM_MODEM_SSR_8974=y
CONFIG_MSM_ADSP_SSR_8974=y
+CONFIG_MSM_WCNSS_SSR_8974=y
CONFIG_MSM_TZ_LOG=y
CONFIG_MSM_DIRECT_SCLK_ACCESS=y
-CONFIG_MSM_QDSS=y
+CONFIG_MSM_BUS_SCALING=y
+CONFIG_MSM_WATCHDOG_V2=y
+CONFIG_MSM_MEMORY_DUMP=y
+CONFIG_MSM_DLOAD_MODE=y
+CONFIG_MSM_ADSP_LOADER=m
CONFIG_MSM_OCMEM=y
CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL=y
CONFIG_MSM_OCMEM_DEBUG=y
CONFIG_MSM_OCMEM_NONSECURE=y
-CONFIG_MSM_MEMORY_DUMP=y
-CONFIG_MSM_WATCHDOG_V2=y
-CONFIG_MSM_DLOAD_MODE=y
-CONFIG_PANIC_TIMEOUT=5
CONFIG_MSM_CACHE_ERP=y
CONFIG_MSM_L1_ERR_PANIC=y
+CONFIG_MSM_L1_ERR_LOG=y
CONFIG_MSM_L2_ERP_PRINT_ACCESS_ERRORS=y
CONFIG_MSM_L2_ERP_2BIT_PANIC=y
-CONFIG_MSM_ADSP_LOADER=m
+CONFIG_MSM_CACHE_DUMP=y
+CONFIG_MSM_CACHE_DUMP_ON_PANIC=y
+CONFIG_STRICT_MEMORY_RWX=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_SMP=y
@@ -77,6 +86,8 @@
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
CONFIG_VMALLOC_RESERVE=0x19000000
+CONFIG_CC_STACKPROTECTOR=y
+CONFIG_CP_ACCESS=y
CONFIG_USE_OF=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
@@ -113,10 +124,100 @@
CONFIG_IPV6_MIP6=y
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_SUBTREES=y
+CONFIG_NETFILTER=y
+CONFIG_NETFILTER_NETLINK_LOG=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CT_PROTO_DCCP=y
+CONFIG_NF_CT_PROTO_SCTP=y
+CONFIG_NF_CT_PROTO_UDPLITE=y
+CONFIG_NF_CONNTRACK_AMANDA=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_H323=y
+CONFIG_NF_CONNTRACK_IRC=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=y
+CONFIG_NF_CONNTRACK_PPTP=y
+CONFIG_NF_CONNTRACK_SANE=y
+CONFIG_NF_CONNTRACK_SIP=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NETFILTER_TPROXY=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_LOG=y
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_HELPER=y
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_QTAGUID=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
+CONFIG_NETFILTER_XT_MATCH_SOCKET=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
+CONFIG_NETFILTER_XT_MATCH_STRING=y
+CONFIG_NETFILTER_XT_MATCH_TIME=y
+CONFIG_NETFILTER_XT_MATCH_U32=y
+CONFIG_NF_CONNTRACK_IPV4=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=y
+CONFIG_IP_NF_MATCH_ECN=y
+CONFIG_IP_NF_MATCH_TTL=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_ARPTABLES=y
+CONFIG_IP_NF_ARPFILTER=y
+CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_NF_CONNTRACK_IPV6=y
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_IP6_NF_RAW=y
CONFIG_NET_SCHED=y
CONFIG_NET_SCH_HTB=y
CONFIG_NET_SCH_PRIO=y
CONFIG_NET_CLS_FW=y
+CONFIG_NET_CLS_U32=y
+CONFIG_CLS_U32_MARK=y
+CONFIG_NET_CLS_FLOW=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_CMP=y
+CONFIG_NET_EMATCH_NBYTE=y
+CONFIG_NET_EMATCH_U32=y
+CONFIG_NET_EMATCH_META=y
+CONFIG_NET_EMATCH_TEXT=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCISMD=y
+CONFIG_MSM_BT_POWER=y
+CONFIG_CFG80211=m
+CONFIG_RFKILL=y
CONFIG_GENLOCK=y
CONFIG_GENLOCK_MISCDEVICE=y
CONFIG_BLK_DEV_LOOP=y
@@ -136,15 +237,20 @@
CONFIG_DM_CRYPT=y
CONFIG_NETDEVICES=y
CONFIG_DUMMY=y
+CONFIG_TUN=y
CONFIG_KS8851=m
# CONFIG_MSM_RMNET is not set
CONFIG_MSM_RMNET_BAM=y
+CONFIG_SLIP=y
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLIP_MODE_SLIP6=y
+CONFIG_WCNSS_CORE=y
+CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
CONFIG_KEYBOARD_GPIO=y
CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ATMEL_MAXTOUCH=n
CONFIG_TOUCHSCREEN_ATMEL_MXT=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_UINPUT=y
@@ -156,14 +262,12 @@
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_QUP=y
-CONFIG_MSM_BUS_SCALING=y
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=m
CONFIG_SPMI=y
CONFIG_SPMI_MSM_PMIC_ARB=y
CONFIG_MSM_QPNP_INT=y
-CONFIG_SLIMBUS=y
CONFIG_SLIMBUS_MSM_CTRL=y
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
@@ -171,11 +275,12 @@
CONFIG_GPIO_QPNP_PIN_DEBUG=y
CONFIG_POWER_SUPPLY=y
# CONFIG_BATTERY_MSM is not set
-CONFIG_HWMON=y
+CONFIG_QPNP_BMS=y
CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y
CONFIG_SENSORS_QPNP_ADC_CURRENT=y
CONFIG_THERMAL=y
CONFIG_THERMAL_TSENS8974=y
+CONFIG_WCD9320_CODEC=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_STUB=y
CONFIG_REGULATOR_QPNP=y
@@ -186,9 +291,11 @@
CONFIG_VIDEOBUF2_MSM_MEM=y
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_MSM_CAMERA_V4L2=y
+CONFIG_MT9M114=y
+CONFIG_OV2720=y
CONFIG_MSM_CAMERA_SENSOR=y
CONFIG_MSM_ACTUATOR=y
-CONFIG_MSM_CAM_IRQ_ROUTER=n
+CONFIG_MSM_JPEG=y
CONFIG_MSM_CCI=y
CONFIG_MSM_CSI30_HEADER=y
CONFIG_MSM_CSIPHY=y
@@ -196,11 +303,9 @@
CONFIG_MSM_CSI2_REGISTER=y
CONFIG_MSM_ISPIF=y
CONFIG_S5K3L1YX=y
-CONFIG_OV2720=y
-CONFIG_MSM_JPEG=y
+CONFIG_MSM_WFD=y
CONFIG_RADIO_IRIS=y
CONFIG_RADIO_IRIS_TRANSPORT=m
-CONFIG_RADIO_ADAPTERS=y
CONFIG_ION=y
CONFIG_ION_MSM=y
CONFIG_MSM_KGSL=y
@@ -218,7 +323,6 @@
CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_MSM8974=y
-CONFIG_WCD9320_CODEC=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_STORAGE=y
@@ -248,8 +352,6 @@
CONFIG_MMC_TEST=m
CONFIG_MMC_MSM=y
CONFIG_MMC_MSM_SPS_SUPPORT=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
CONFIG_LEDS_QPNP=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
@@ -273,6 +375,8 @@
CONFIG_QPNP_POWER_ON=y
CONFIG_QPNP_CLKDIV=y
CONFIG_MSM_IOMMU=y
+CONFIG_MSM_QDSS=y
+CONFIG_MSM_QDSS_ETM_PCSAVE_DEFAULT_ENABLE=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT3_FS=y
@@ -286,48 +390,35 @@
CONFIG_NLS_ISO8859_1=y
CONFIG_PRINTK_TIME=y
CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_FS=y
+CONFIG_LOCKUP_DETECTOR=y
+# CONFIG_DETECT_HUNG_TASK is not set
# CONFIG_SCHED_DEBUG is not set
CONFIG_TIMER_STATS=y
+CONFIG_DEBUG_KMEMLEAK=y
+CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y
# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_ATOMIC_SLEEP=y
+CONFIG_DEBUG_STACK_USAGE=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_DEBUG_LIST=y
+CONFIG_FAULT_INJECTION=y
+CONFIG_FAIL_PAGE_ALLOC=y
+CONFIG_FAULT_INJECTION_DEBUG_FS=y
+CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
+CONFIG_DEBUG_PAGEALLOC=y
CONFIG_ENABLE_DEFAULT_TRACERS=y
+CONFIG_CPU_FREQ_SWITCH_PROFILER=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_DEBUG_USER=y
+CONFIG_PID_IN_CONTEXTIDR=y
CONFIG_KEYS=y
CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_DEV_QCRYPTO=m
CONFIG_CRYPTO_DEV_QCE=m
CONFIG_CRYPTO_DEV_QCEDEV=m
CONFIG_CRC_CCITT=y
-CONFIG_LIBCRC32C=y
-
-CONFIG_BT=y
-CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=y
-CONFIG_BT_RFCOMM=y
-CONFIG_BT_RFCOMM_TTY=y
-CONFIG_BT_BNEP=y
-CONFIG_BT_BNEP_MC_FILTER=y
-CONFIG_BT_BNEP_PROTO_FILTER=y
-CONFIG_BT_HIDP=y
-
-CONFIG_BT_HCISMD=y
-CONFIG_MSM_BT_POWER=y
-
-CONFIG_RADIO_IRIS=y
-CONFIG_RADIO_IRIS_TRANSPORT=m
-CONFIG_MSM_BAM_DMUX=y
-CONFIG_WCNSS_CORE=y
-CONFIG_WCNSS_CORE_PRONTO=y
-CONFIG_CFG80211=m
-CONFIG_RFKILL=y
-CONFIG_VIDEO_V4L2=y
-CONFIG_VIDEO_DEV=y
-CONFIG_VIDEO_V4L2_COMMON=y
-CONFIG_VIDEO_MEDIA=y
+CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL=y
diff --git a/arch/arm/configs/msm9625_defconfig b/arch/arm/configs/msm9625_defconfig
index 0057062..364a1bf 100644
--- a/arch/arm/configs/msm9625_defconfig
+++ b/arch/arm/configs/msm9625_defconfig
@@ -45,24 +45,22 @@
CONFIG_HIGHMEM=y
CONFIG_VMALLOC_RESERVE=0x19000000
CONFIG_USE_OF=y
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_VFP=y
CONFIG_NEON=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
# CONFIG_SUSPEND is not set
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_OF_PARTS=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_MTD_MSM_NAND is not set
-CONFIG_MTD_MSM_QPIC_NAND=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IPV6=y
# CONFIG_WIRELESS is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_OF_PARTS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_MTD_MSM_NAND is not set
+CONFIG_MTD_MSM_QPIC_NAND=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
# CONFIG_ANDROID_PMEM is not set
@@ -89,16 +87,30 @@
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_MSM_HSL=y
CONFIG_SERIAL_MSM_HSL_CONSOLE=y
+CONFIG_DIAG_CHAR=y
CONFIG_HW_RANDOM=y
CONFIG_SPI=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=m
+CONFIG_SPMI=y
+CONFIG_SPMI_MSM_PMIC_ARB=y
+CONFIG_MSM_QPNP_INT=y
CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_QPNP_PIN=y
+CONFIG_GPIO_QPNP_PIN_DEBUG=y
# CONFIG_HWMON is not set
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_QPNP=y
# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_CI13XXX_MSM=y
+CONFIG_USB_G_ANDROID=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_DRV_MSM is not set
+CONFIG_RTC_DRV_QPNP=y
CONFIG_SPS=y
+CONFIG_USB_BAM=y
CONFIG_SPS_SUPPORT_BAMDMA=y
CONFIG_SPS_SUPPORT_NDP_BAM=y
CONFIG_VFAT_FS=y
diff --git a/arch/arm/mach-msm/cp14.h b/arch/arm/include/asm/hardware/cp14.h
similarity index 99%
rename from arch/arm/mach-msm/cp14.h
rename to arch/arm/include/asm/hardware/cp14.h
index d640412..8acf0c7 100644
--- a/arch/arm/mach-msm/cp14.h
+++ b/arch/arm/include/asm/hardware/cp14.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -10,8 +10,8 @@
* GNU General Public License for more details.
*/
-#ifndef _ARCH_ARM_MACH_MSM_CP14_H_
-#define _ARCH_ARM_MACH_MSM_CP14_H_
+#ifndef __ASM_HARDWARE_CP14_H
+#define __ASM_HARDWARE_CP14_H
#include <linux/types.h>
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index ff2c0ad..1692129 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -216,6 +216,20 @@
return core_has_mismatch_brps() ? brps - 1 : brps;
}
+/* Determine if halting mode is enabled */
+static int halting_mode_enabled(void)
+{
+ u32 dscr;
+
+ ARM_DBG_READ(c1, 0, dscr);
+
+ if (WARN_ONCE(dscr & ARM_DSCR_HDBGEN,
+ "halting debug mode enabled. "
+ "Unable to access hardware resources.\n"))
+ return -EPERM;
+ return 0;
+}
+
/*
* In order to access the breakpoint/watchpoint control registers,
* we must be running in debug monitor mode. Unfortunately, we can
@@ -225,16 +239,14 @@
static int enable_monitor_mode(void)
{
u32 dscr;
- int ret = 0;
+ int ret;
ARM_DBG_READ(c1, 0, dscr);
/* Ensure that halting mode is disabled. */
- if (WARN_ONCE(dscr & ARM_DSCR_HDBGEN,
- "halting debug mode enabled. Unable to access hardware resources.\n")) {
- ret = -EPERM;
+ ret = halting_mode_enabled();
+ if (ret)
goto out;
- }
/* If monitor mode is already enabled, just return. */
if (dscr & ARM_DSCR_MDBGEN)
@@ -853,18 +865,6 @@
return ret;
}
-static void reset_brps_reserved_reg(int n)
-{
- int i;
-
- /* we must also reset any reserved registers. */
- for (i = 0; i < n; ++i) {
- write_wb_reg(ARM_BASE_BCR + i, 0UL);
- write_wb_reg(ARM_BASE_BVR + i, 0UL);
- }
-
-}
-
/*
* One-time initialisation.
*/
@@ -947,19 +947,21 @@
isb();
reset_regs:
- if (enable_monitor_mode())
+ if (halting_mode_enabled())
return;
-#ifdef CONFIG_HAVE_HW_BRKPT_RESERVED_RW_ACCESS
- reset_brps_reserved_reg(core_num_brps);
-#else
- reset_brps_reserved_reg(core_num_brps + core_num_reserved_brps);
-#endif
+ /* We must also reset any reserved registers. */
+ raw_num_brps = get_num_brp_resources();
+ for (i = 0; i < raw_num_brps; ++i) {
+ write_wb_reg(ARM_BASE_BCR + i, 0UL);
+ write_wb_reg(ARM_BASE_BVR + i, 0UL);
+ }
for (i = 0; i < core_num_wrps; ++i) {
write_wb_reg(ARM_BASE_WCR + i, 0UL);
write_wb_reg(ARM_BASE_WVR + i, 0UL);
}
+ enable_monitor_mode();
}
static int __cpuinit dbg_reset_notify(struct notifier_block *self,
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 63d402f..1e9504b 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -37,6 +37,8 @@
#include "signal.h"
+#include <trace/events/exception.h>
+
static const char *handler[]= { "prefetch abort", "data abort", "address exception", "interrupt" };
void *vectors_page;
@@ -410,6 +412,8 @@
if (call_undef_hook(regs, instr) == 0)
return;
+ trace_undef_instr(regs, (void *)pc);
+
#ifdef CONFIG_DEBUG_USER
if (user_debug & UDBG_UNDEFINED) {
printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n",
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index badee85..2020422 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -357,6 +357,8 @@
select MSM_GPIOMUX
select MULTI_IRQ_HANDLER
select GPIO_MSM_V3
+ select MAY_HAVE_SPARSE_IRQ
+ select SPARSE_IRQ
endmenu
choice
@@ -410,7 +412,6 @@
select HAVE_ARCH_HAS_CURRENT_TIMER
select MSM_JTAG if MSM_QDSS
bool
- select HAVE_HW_BRKPT_RESERVED_RW_ACCESS
config ARCH_MSM_CORTEXMP
select MSM_SMP
@@ -424,7 +425,6 @@
config ARCH_MSM_CORTEX_A5
bool
- select HAVE_HW_BRKPT_RESERVED_RW_ACCESS
config ARCH_MSM7X27A
bool
@@ -927,7 +927,7 @@
default "0x00000000" if ARCH_MPQ8092
default "0x00000000" if ARCH_MSM8226
default "0x10000000" if ARCH_FSM9XXX
- default "0x20200000" if ARCH_MSM9625
+ default "0x00200000" if ARCH_MSM9625
default "0x00200000" if !MSM_STACKED_MEMORY
default "0x00000000" if ARCH_QSD8X50 && MSM_SOC_REV_A
default "0x20000000" if ARCH_QSD8X50
@@ -1903,13 +1903,13 @@
config MSM_PIL_MODEM
tristate "Modem (ARM11) Boot Support"
- depends on MSM_PIL
+ depends on MSM_PIL && MSM_SUBSYSTEM_RESTART
help
Support for booting and shutting down ARM11 Modem processors.
config MSM_PIL_QDSP6V3
tristate "QDSP6v3 (Hexagon) Boot Support"
- depends on MSM_PIL
+ depends on MSM_PIL && MSM_SUBSYSTEM_RESTART
help
Support for booting and shutting down QDSP6v3 processors (hexagon).
The QDSP6 is a low power DSP used in audio software applications.
@@ -1945,7 +1945,7 @@
config MSM_PIL_RIVA
tristate "RIVA (WCNSS) Boot Support"
- depends on MSM_PIL
+ depends on MSM_PIL && MSM_SUBSYSTEM_RESTART
help
Support for booting and shutting down the RIVA processor (WCNSS).
Riva is the wireless subsystem processor used in bluetooth, wireless
@@ -1984,8 +1984,8 @@
Venus is the Video subsystem processor used for video codecs.
config MSM_PIL_GSS
- tristate "GSS (Coretx A5) Boot Support"
- depends on MSM_PIL
+ tristate "GSS (Cortex A5) Boot Support"
+ depends on MSM_PIL && MSM_SUBSYSTEM_RESTART
help
Support for booting and shutting down Cortex A5 processors which run
GPS subsystem firmware.
@@ -2018,22 +2018,6 @@
lpass hardware watchdog interrupt lines and plugs into the subsystem
restart and PIL drivers. For MSM9615, it only supports a full chip reset.
-config MSM_WCNSS_SSR_8960
- tristate "MSM 8960 WCNSS restart module"
- depends on (ARCH_MSM8960)
- help
- This option enables the WCNSS restart module for MSM8960, which
- monitors WCNSS hardware watchdog interrupt lines and plugs WCNSS
- into the subsystem restart framework.
-
-config MSM_GSS_SSR_8064
- bool "MSM 8064 GSS restart driver"
- depends on (ARCH_APQ8064)
- help
- This option enables the gps subsystem restart driver for APQ8064, which monitors
- gss hardware watchdog interrupt lines and plugs into the subsystem
- restart and PIL drivers.
-
config MSM_MODEM_SSR_8974
bool "MSM 8974 Modem restart driver"
depends on (ARCH_MSM8974)
@@ -2052,6 +2036,15 @@
restarts the adsp or the 8974 when the adsp encounters a fatal error,
depending on the restart level selected in the subsystem restart driver.
+config MSM_WCNSS_SSR_8974
+ tristate "MSM 8974 WCNSS restart module"
+ depends on (ARCH_MSM8974)
+ help
+ This option enables the WCNSS restart module for MSM8974. It monitors
+ WCNSS SMSM status bits and WCNSS hardware watchdog interrupt line; and
+ depending on the restart level, it will restart WCNSS when a fatal error
+ occurs at WCNSS.
+
config SCORPION_Uni_45nm_BUG
bool "Scorpion Uni 45nm(SC45U): Workaround for ICIMVAU and BPIMVA"
depends on ARCH_MSM7X30 || (ARCH_QSD8X50 && MSM_SOC_REV_A)
@@ -2142,6 +2135,14 @@
depends on PM
bool
+config MSM_EVENT_TIMER
+ bool "Event timer"
+ help
+ This option enables a modules that manages a list of event timers that
+ need to be monitored by the PM. The enables the PM code to monitor
+ events that require the core to be awake and ready to handle the
+ event.
+
config MSM_NOPM
default y if !PM
bool
@@ -2599,4 +2600,39 @@
can be read and written to send character data to the sysmon port of
the modem over USB.
+config MSM_RPC_PMIC
+ tristate "MSM RPC PMIC driver"
+ depends on MSM_ONCRPCROUTER
+ help
+ This driver supports the PMIC functionality over RPC for those MSM's
+ which do not have a direct access to PMIC. It supports ability to
+ configure MPP, GPIO and all the other supported peripherals of the
+ PMIC.
+
+config MSM_RPC_USB
+ tristate "MSM RPC USB driver"
+ depends on MSM_ONCRPCROUTER
+ help
+ This driver supports the USB configuration support over the RPC
+ interface. It support the HS USB module connected to the MSM
+ and FS USB which is connected over the PMIC. This support is
+ required for MSMs on which the APPS does not have a direct access
+ to the PMIC.
+
+config MSM_RPC_PMAPP
+ tristate "MSM RPC PMIC APP driver"
+ depends on MSM_ONCRPCROUTER
+ help
+ This driver supports the configuration of various PMIC APP modules
+ such as display backlight, vreg pin-ctrl, smps clock over the RPC
+ interface. This support is required for MSMs on which the APPS
+ does not have a direct access to the PMIC.
+
+config MSM_ENABLE_WDOG_DEBUG_CONTROL
+ bool "MSM Watchdog driver to disable debug Image"
+ help
+ This driver supports the configuration of the GCC_WDOG_DEBUG register
+ used to control debug image.
+ This support is currently required for MSM8974 to disable debug image
+ on PS HOLD reset
endif
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 3bef471..7dece76 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -65,6 +65,8 @@
$(obj)/smd_rpc_sym.c: $(src)/smd_rpc_sym $(src)/mkrpcsym.pl
$(call if_changed,mkrpcsym)
+obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o remote_spinlock.o smd_private.o
+
obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o
obj-$(CONFIG_MSM_SECURE_IO) += scm-io.o
obj-$(CONFIG_MSM_PIL) += peripheral-loader.o
@@ -96,22 +98,7 @@
ifdef CONFIG_DEBUG_FS
obj-$(CONFIG_MSM_IPC_LOGGING) += ipc_logging_debug.o
endif
-obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o remote_spinlock.o smd_private.o
obj-y += socinfo.o
-ifndef CONFIG_ARCH_MSM9615
-ifndef CONFIG_ARCH_APQ8064
-ifndef CONFIG_ARCH_MSM8960
-ifndef CONFIG_ARCH_MSM8X60
-ifndef CONFIG_ARCH_MSM8974
-ifndef CONFIG_ARCH_MPQ8092
- obj-$(CONFIG_MSM_SMD) += pmic.o
- obj-$(CONFIG_MSM_ONCRPCROUTER) += rpc_hsusb.o rpc_pmapp.o rpc_fsusb.o
-endif
-endif
-endif
-endif
-endif
-endif
ifndef CONFIG_ARCH_MSM8960
ifndef CONFIG_ARCH_MSM8X60
ifndef CONFIG_ARCH_APQ8064
@@ -208,15 +195,12 @@
obj-y += subsystem_notif.o
obj-y += subsystem_restart.o
obj-y += ramdump.o
- obj-$(CONFIG_ARCH_MSM8X60) += modem-8660.o lpass-8660.o
endif
obj-$(CONFIG_MSM_SYSMON_COMM) += sysmon.o
obj-$(CONFIG_MSM_MODEM_8960) += modem-8960.o
obj-$(CONFIG_MSM_MODEM_SSR_8974) += modem-ssr-8974.o
obj-$(CONFIG_MSM_LPASS_8960) += lpass-8960.o
obj-$(CONFIG_MSM_ADSP_SSR_8974) += adsp-8974.o
-obj-$(CONFIG_MSM_WCNSS_SSR_8960) += wcnss-ssr-8960.o
-obj-$(CONFIG_MSM_GSS_SSR_8064) += gss-8064.o
ifdef CONFIG_CPU_IDLE
obj-$(CONFIG_ARCH_APQ8064) += cpuidle.o
@@ -288,7 +272,7 @@
obj-$(CONFIG_MACH_MSM8930_CDP) += board-8930-all.o board-8930-regulator-pm8038.o board-8930-regulator-pm8917.o
obj-$(CONFIG_MACH_MSM8930_MTP) += board-8930-all.o board-8930-regulator-pm8038.o board-8930-regulator-pm8917.o
obj-$(CONFIG_MACH_MSM8930_FLUID) += board-8930-all.o board-8930-regulator-pm8038.o board-8930-regulator-pm8917.o
-obj-$(CONFIG_PM8921_BMS) += bms-batterydata.o bms-batterydata-desay.o
+obj-$(CONFIG_PM8921_BMS) += bms-batterydata.o bms-batterydata-desay.o batterydata-lib.o
obj-$(CONFIG_MACH_APQ8064_CDP) += board-8064-all.o board-8064-regulator.o
obj-$(CONFIG_MACH_APQ8064_MTP) += board-8064-all.o board-8064-regulator.o
obj-$(CONFIG_MACH_APQ8064_LIQUID) += board-8064-all.o board-8064-regulator.o
@@ -343,6 +327,7 @@
obj-$(CONFIG_MSM_BUSPM_DEV) += msm-buspm-dev.o
obj-$(CONFIG_MSM_IOMMU) += devices-iommu.o iommu_domains.o
+obj-$(CONFIG_MSM_EVENT_TIMER) += event_timer.o
ifdef CONFIG_VCM
obj-$(CONFIG_ARCH_MSM8X60) += board-msm8x60-vcm.o
@@ -392,6 +377,11 @@
obj-$(CONFIG_MSM_RPM_SMD) += rpm-smd.o
obj-$(CONFIG_MSM_CPR) += msm_cpr.o
obj-$(CONFIG_MSM_VP_REGULATOR) += msm_vp.o
+obj-$(CONFIG_MSM_RPC_PMIC) += pmic.o
+obj-$(CONFIG_MSM_RPC_USB) += rpc_hsusb.o rpc_fsusb.o
+obj-$(CONFIG_MSM_RPC_PMAPP) += rpc_pmapp.o
+
+obj-$(CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL) += wdog_debug.o
ifdef CONFIG_MSM_CPR
obj-$(CONFIG_DEBUG_FS) += msm_cpr-debug.o
diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot
index 526616a..9234b2c 100644
--- a/arch/arm/mach-msm/Makefile.boot
+++ b/arch/arm/mach-msm/Makefile.boot
@@ -52,7 +52,7 @@
zreladdr-$(CONFIG_ARCH_MSM9615) := 0x40808000
# MSM9625
- zreladdr-$(CONFIG_ARCH_MSM9625) := 0x20208000
+ zreladdr-$(CONFIG_ARCH_MSM9625) := 0x00208000
# MSM8226
zreladdr-$(CONFIG_ARCH_MSM8226) := 0x00008000
diff --git a/arch/arm/mach-msm/acpuclock-7627.c b/arch/arm/mach-msm/acpuclock-7627.c
index 7be3667..5c4a923 100644
--- a/arch/arm/mach-msm/acpuclock-7627.c
+++ b/arch/arm/mach-msm/acpuclock-7627.c
@@ -32,13 +32,13 @@
#include <mach/board.h>
#include <mach/msm_iomap.h>
+#include <mach/clk-provider.h>
#include <mach/socinfo.h>
#include <asm/mach-types.h>
#include <asm/cpu.h>
#include "smd_private.h"
#include "acpuclock.h"
-#include "clock.h"
#define A11S_CLK_CNTL_ADDR (MSM_CSR_BASE + 0x100)
#define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104)
@@ -719,6 +719,7 @@
*/
clk_enable(pll_clk[backup_s->pll].clk);
acpuclk_set_div(backup_s);
+ update_jiffies(cpu, backup_s->lpj);
}
/* Make sure PLL4 is off before reprogramming */
if ((plls_enabled & (1 << tgt_s->pll))) {
@@ -736,10 +737,12 @@
*/
clk_enable(pll_clk[backup_s->pll].clk);
acpuclk_set_div(backup_s);
+ update_jiffies(cpu, backup_s->lpj);
}
}
- if (!(plls_enabled & (1 << tgt_s->pll))) {
+ if ((tgt_s->pll != ACPU_PLL_TCXO) &&
+ !(plls_enabled & (1 << tgt_s->pll))) {
rc = clk_enable(pll_clk[tgt_s->pll].clk);
if (rc < 0) {
pr_err("PLL%d enable failed (%d)\n",
@@ -827,7 +830,8 @@
goto out;
/* Change the AXI bus frequency if we can. */
- if (strt_s->axiclk_khz != tgt_s->axiclk_khz) {
+ if (reason != SETRATE_PC &&
+ strt_s->axiclk_khz != tgt_s->axiclk_khz) {
res = clk_set_rate(drv_state.ebi1_clk,
tgt_s->axiclk_khz * 1000);
if (res < 0)
diff --git a/arch/arm/mach-msm/acpuclock-7x30.c b/arch/arm/mach-msm/acpuclock-7x30.c
index b49613e..5b947e6 100644
--- a/arch/arm/mach-msm/acpuclock-7x30.c
+++ b/arch/arm/mach-msm/acpuclock-7x30.c
@@ -32,7 +32,6 @@
#include <asm/mach-types.h>
#include "smd_private.h"
-#include "clock.h"
#include "acpuclock.h"
#include "spm.h"
diff --git a/arch/arm/mach-msm/acpuclock-8064.c b/arch/arm/mach-msm/acpuclock-8064.c
index 3c80875..d10211bc 100644
--- a/arch/arm/mach-msm/acpuclock-8064.c
+++ b/arch/arm/mach-msm/acpuclock-8064.c
@@ -18,6 +18,7 @@
#include <mach/msm_bus_board.h>
#include <mach/msm_bus.h>
+#include "mach/socinfo.h"
#include "acpuclock.h"
#include "acpuclock-krait.h"
@@ -44,6 +45,7 @@
.hfpll_phys_base = 0x00903200,
.aux_clk_sel_phys = 0x02088014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x4501,
.vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
@@ -54,6 +56,7 @@
.hfpll_phys_base = 0x00903240,
.aux_clk_sel_phys = 0x02098014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x5501,
.vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
@@ -64,6 +67,7 @@
.hfpll_phys_base = 0x00903280,
.aux_clk_sel_phys = 0x020A8014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x6501,
.vreg[VREG_CORE] = { "krait2", 1300000 },
.vreg[VREG_MEM] = { "krait2_mem", 1150000 },
@@ -74,6 +78,7 @@
.hfpll_phys_base = 0x009032C0,
.aux_clk_sel_phys = 0x020B8014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x7501,
.vreg[VREG_CORE] = { "krait3", 1300000 },
.vreg[VREG_MEM] = { "krait3_mem", 1150000 },
@@ -84,11 +89,16 @@
.hfpll_phys_base = 0x00903300,
.aux_clk_sel_phys = 0x02011028,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x0500,
.vreg[VREG_HFPLL_A] = { "l2_hfpll", 1800000 },
},
};
+/*
+ * The correct maximum rate for 8064ab in 600 MHZ.
+ * We rely on the RPM rounding requests up here.
+*/
static struct msm_bus_paths bw_level_tbl[] __initdata = {
[0] = BW_MBPS(640), /* At least 80 MHz on bus. */
[1] = BW_MBPS(1064), /* At least 133 MHz on bus. */
@@ -105,110 +115,191 @@
.name = "acpuclk-8064",
};
-static struct l2_level l2_freq_tbl[] __initdata __initdata = {
- [0] = { { 384000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 1 },
- [1] = { { 432000, HFPLL, 2, 0, 0x20 }, 1050000, 1050000, 2 },
- [2] = { { 486000, HFPLL, 2, 0, 0x24 }, 1050000, 1050000, 2 },
- [3] = { { 540000, HFPLL, 2, 0, 0x28 }, 1050000, 1050000, 2 },
- [4] = { { 594000, HFPLL, 1, 0, 0x16 }, 1050000, 1050000, 2 },
- [5] = { { 648000, HFPLL, 1, 0, 0x18 }, 1050000, 1050000, 4 },
- [6] = { { 702000, HFPLL, 1, 0, 0x1A }, 1050000, 1050000, 4 },
- [7] = { { 756000, HFPLL, 1, 0, 0x1C }, 1150000, 1150000, 4 },
- [8] = { { 810000, HFPLL, 1, 0, 0x1E }, 1150000, 1150000, 4 },
- [9] = { { 864000, HFPLL, 1, 0, 0x20 }, 1150000, 1150000, 4 },
- [10] = { { 918000, HFPLL, 1, 0, 0x22 }, 1150000, 1150000, 5 },
- [11] = { { 972000, HFPLL, 1, 0, 0x24 }, 1150000, 1150000, 5 },
- [12] = { { 1026000, HFPLL, 1, 0, 0x26 }, 1150000, 1150000, 5 },
- [13] = { { 1080000, HFPLL, 1, 0, 0x28 }, 1150000, 1150000, 5 },
- [14] = { { 1134000, HFPLL, 1, 0, 0x2A }, 1150000, 1150000, 5 },
- [15] = { { 1188000, HFPLL, 1, 0, 0x2C }, 1150000, 1150000, 5 },
+static struct l2_level l2_freq_tbl[] __initdata = {
+ [0] = { { 384000, PLL_8, 0, 0x00 }, 1050000, 1050000, 1 },
+ [1] = { { 432000, HFPLL, 2, 0x20 }, 1050000, 1050000, 2 },
+ [2] = { { 486000, HFPLL, 2, 0x24 }, 1050000, 1050000, 2 },
+ [3] = { { 540000, HFPLL, 2, 0x28 }, 1050000, 1050000, 2 },
+ [4] = { { 594000, HFPLL, 1, 0x16 }, 1050000, 1050000, 2 },
+ [5] = { { 648000, HFPLL, 1, 0x18 }, 1050000, 1050000, 4 },
+ [6] = { { 702000, HFPLL, 1, 0x1A }, 1050000, 1050000, 4 },
+ [7] = { { 756000, HFPLL, 1, 0x1C }, 1150000, 1150000, 4 },
+ [8] = { { 810000, HFPLL, 1, 0x1E }, 1150000, 1150000, 4 },
+ [9] = { { 864000, HFPLL, 1, 0x20 }, 1150000, 1150000, 4 },
+ [10] = { { 918000, HFPLL, 1, 0x22 }, 1150000, 1150000, 5 },
+ [11] = { { 972000, HFPLL, 1, 0x24 }, 1150000, 1150000, 5 },
+ [12] = { { 1026000, HFPLL, 1, 0x26 }, 1150000, 1150000, 5 },
+ [13] = { { 1080000, HFPLL, 1, 0x28 }, 1150000, 1150000, 5 },
+ [14] = { { 1134000, HFPLL, 1, 0x2A }, 1150000, 1150000, 5 },
+ [15] = { { 1188000, HFPLL, 1, 0x2C }, 1150000, 1150000, 5 },
+ /* L2 Level 16 is for 8064ab only */
+ [16] = { { 1242000, HFPLL, 1, 0x2E }, 1150000, 1150000, 5 },
{ }
};
-static struct acpu_level acpu_freq_tbl_slow[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 950000 },
- { 0, { 432000, HFPLL, 2, 0, 0x20 }, L2(6), 975000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(6), 975000 },
- { 0, { 540000, HFPLL, 2, 0, 0x28 }, L2(6), 1000000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(6), 1000000 },
- { 0, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 1025000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(6), 1025000 },
- { 0, { 756000, HFPLL, 1, 0, 0x1C }, L2(6), 1075000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(6), 1075000 },
- { 0, { 864000, HFPLL, 1, 0, 0x20 }, L2(6), 1100000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(6), 1100000 },
- { 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(6), 1125000 },
- { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(6), 1125000 },
- { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(15), 1175000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1175000 },
- { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(15), 1200000 },
- { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(15), 1200000 },
- { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(15), 1225000 },
- { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(15), 1225000 },
- { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(15), 1237500 },
- { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(15), 1237500 },
- { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(15), 1250000 },
+static struct acpu_level tbl_slow[] __initdata = {
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 950000 },
+ { 0, { 432000, HFPLL, 2, 0x20 }, L2(6), 975000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(6), 975000 },
+ { 0, { 540000, HFPLL, 2, 0x28 }, L2(6), 1000000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(6), 1000000 },
+ { 0, { 648000, HFPLL, 1, 0x18 }, L2(6), 1025000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(6), 1025000 },
+ { 0, { 756000, HFPLL, 1, 0x1C }, L2(6), 1075000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(6), 1075000 },
+ { 0, { 864000, HFPLL, 1, 0x20 }, L2(6), 1100000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(6), 1100000 },
+ { 0, { 972000, HFPLL, 1, 0x24 }, L2(6), 1125000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(6), 1125000 },
+ { 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1175000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1175000 },
+ { 0, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1200000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1200000 },
+ { 0, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1225000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1225000 },
+ { 0, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1237500 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1237500 },
+ { 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1250000 },
{ 0, { 0 } }
};
-static struct acpu_level acpu_freq_tbl_nom[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 900000 },
- { 0, { 432000, HFPLL, 2, 0, 0x20 }, L2(6), 925000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(6), 925000 },
- { 0, { 540000, HFPLL, 2, 0, 0x28 }, L2(6), 950000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(6), 950000 },
- { 0, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 975000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(6), 975000 },
- { 0, { 756000, HFPLL, 1, 0, 0x1C }, L2(6), 1025000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(6), 1025000 },
- { 0, { 864000, HFPLL, 1, 0, 0x20 }, L2(6), 1050000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(6), 1050000 },
- { 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(6), 1075000 },
- { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(6), 1075000 },
- { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(15), 1125000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1125000 },
- { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(15), 1150000 },
- { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(15), 1150000 },
- { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(15), 1175000 },
- { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(15), 1175000 },
- { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(15), 1187500 },
- { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(15), 1187500 },
- { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(15), 1200000 },
+static struct acpu_level tbl_nom[] __initdata = {
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 900000 },
+ { 0, { 432000, HFPLL, 2, 0x20 }, L2(6), 925000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(6), 925000 },
+ { 0, { 540000, HFPLL, 2, 0x28 }, L2(6), 950000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(6), 950000 },
+ { 0, { 648000, HFPLL, 1, 0x18 }, L2(6), 975000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(6), 975000 },
+ { 0, { 756000, HFPLL, 1, 0x1C }, L2(6), 1025000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(6), 1025000 },
+ { 0, { 864000, HFPLL, 1, 0x20 }, L2(6), 1050000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(6), 1050000 },
+ { 0, { 972000, HFPLL, 1, 0x24 }, L2(6), 1075000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(6), 1075000 },
+ { 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1125000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1125000 },
+ { 0, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1150000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1150000 },
+ { 0, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1175000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1175000 },
+ { 0, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1187500 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1187500 },
+ { 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1200000 },
{ 0, { 0 } }
};
-static struct acpu_level acpu_freq_tbl_fast[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 850000 },
- { 0, { 432000, HFPLL, 2, 0, 0x20 }, L2(6), 875000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(6), 875000 },
- { 0, { 540000, HFPLL, 2, 0, 0x28 }, L2(6), 900000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(6), 900000 },
- { 0, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 925000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(6), 925000 },
- { 0, { 756000, HFPLL, 1, 0, 0x1C }, L2(6), 975000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(6), 975000 },
- { 0, { 864000, HFPLL, 1, 0, 0x20 }, L2(6), 1000000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(6), 1000000 },
- { 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(6), 1025000 },
- { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(6), 1025000 },
- { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(15), 1075000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1075000 },
- { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(15), 1100000 },
- { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(15), 1100000 },
- { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(15), 1125000 },
- { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(15), 1125000 },
- { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(15), 1137500 },
- { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(15), 1137500 },
- { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(15), 1150000 },
+static struct acpu_level tbl_fast[] __initdata = {
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 850000 },
+ { 0, { 432000, HFPLL, 2, 0x20 }, L2(6), 875000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(6), 875000 },
+ { 0, { 540000, HFPLL, 2, 0x28 }, L2(6), 900000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(6), 900000 },
+ { 0, { 648000, HFPLL, 1, 0x18 }, L2(6), 925000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(6), 925000 },
+ { 0, { 756000, HFPLL, 1, 0x1C }, L2(6), 975000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(6), 975000 },
+ { 0, { 864000, HFPLL, 1, 0x20 }, L2(6), 1000000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(6), 1000000 },
+ { 0, { 972000, HFPLL, 1, 0x24 }, L2(6), 1025000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(6), 1025000 },
+ { 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1075000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1075000 },
+ { 0, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1100000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1100000 },
+ { 0, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1125000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1125000 },
+ { 0, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1137500 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1137500 },
+ { 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1150000 },
{ 0, { 0 } }
};
-static struct pvs_table pvs_tables[NUM_PVS] __initdata = {
-[PVS_SLOW] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
-[PVS_NOMINAL] = { acpu_freq_tbl_nom, sizeof(acpu_freq_tbl_nom), 25000 },
-[PVS_FAST] = { acpu_freq_tbl_fast, sizeof(acpu_freq_tbl_fast), 25000 },
-/* TODO: update the faster table when data is available */
-[PVS_FASTER] = { acpu_freq_tbl_fast, sizeof(acpu_freq_tbl_fast), 25000 },
+static struct acpu_level tbl_slow_1p7[] __initdata = {
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 950000 },
+ { 0, { 432000, HFPLL, 2, 0x20 }, L2(6), 975000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(6), 975000 },
+ { 0, { 540000, HFPLL, 2, 0x28 }, L2(6), 1000000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(6), 1000000 },
+ { 0, { 648000, HFPLL, 1, 0x18 }, L2(6), 1025000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(6), 1025000 },
+ { 0, { 756000, HFPLL, 1, 0x1C }, L2(6), 1075000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(6), 1075000 },
+ { 0, { 864000, HFPLL, 1, 0x20 }, L2(6), 1100000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(6), 1100000 },
+ { 0, { 972000, HFPLL, 1, 0x24 }, L2(6), 1125000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(6), 1125000 },
+ { 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1175000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1175000 },
+ { 0, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1200000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1200000 },
+ { 0, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1225000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1225000 },
+ { 0, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1237500 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1237500 },
+ { 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1250000 },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1250000 },
+ { 1, { 1620000, HFPLL, 1, 0x3C }, L2(15), 1250000 },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1250000 },
+ { 0, { 0 } }
+};
+
+static struct acpu_level tbl_slow_2p0[] __initdata = {
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 950000 },
+ { 0, { 432000, HFPLL, 2, 0x20 }, L2(6), 975000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(6), 975000 },
+ { 0, { 540000, HFPLL, 2, 0x28 }, L2(6), 1000000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(6), 1000000 },
+ { 0, { 648000, HFPLL, 1, 0x18 }, L2(6), 1025000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(6), 1025000 },
+ { 0, { 756000, HFPLL, 1, 0x1C }, L2(6), 1075000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(6), 1075000 },
+ { 0, { 864000, HFPLL, 1, 0x20 }, L2(6), 1100000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(6), 1100000 },
+ { 0, { 972000, HFPLL, 1, 0x24 }, L2(6), 1125000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(6), 1125000 },
+ { 0, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1175000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1175000 },
+ { 0, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1200000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1200000 },
+ { 0, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1225000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1225000 },
+ { 0, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1237500 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 1237500 },
+ { 1, { 1512000, HFPLL, 1, 0x38 }, L2(15), 1250000 },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1250000 },
+ { 1, { 1620000, HFPLL, 1, 0x3C }, L2(15), 1250000 },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1250000 },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(15), 1250000 },
+ { 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1250000 },
+ { 1, { 1836000, HFPLL, 1, 0x44 }, L2(15), 1250000 },
+ { 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1250000 },
+ { 1, { 1944000, HFPLL, 1, 0x48 }, L2(15), 1250000 },
+ { 1, { 1998000, HFPLL, 1, 0x4A }, L2(15), 1250000 },
+ { 0, { 0 } }
+};
+
+static struct pvs_table pvs_tables[NUM_SPEED_BINS][NUM_PVS] __initdata = {
+ [0][PVS_SLOW] = {tbl_slow, sizeof(tbl_slow), 0 },
+ [0][PVS_NOMINAL] = {tbl_nom, sizeof(tbl_nom), 25000 },
+ [0][PVS_FAST] = {tbl_fast, sizeof(tbl_fast), 25000 },
+ [0][PVS_FASTER] = {tbl_fast, sizeof(tbl_fast), 25000 },
+
+ [1][0] = { tbl_slow_1p7, sizeof(tbl_slow_1p7), 0 },
+ [1][1] = { tbl_slow_1p7, sizeof(tbl_slow_1p7), 0 },
+ [1][2] = { tbl_slow_1p7, sizeof(tbl_slow_1p7), 0 },
+ [1][3] = { tbl_slow_1p7, sizeof(tbl_slow_1p7), 0 },
+ [1][4] = { tbl_slow_1p7, sizeof(tbl_slow_1p7), 0 },
+ [1][5] = { tbl_slow_1p7, sizeof(tbl_slow_1p7), 0 },
+ [1][6] = { tbl_slow_1p7, sizeof(tbl_slow_1p7), 0 },
+
+ [2][0] = { tbl_slow_2p0, sizeof(tbl_slow_2p0), 0 },
+ [2][1] = { tbl_slow_2p0, sizeof(tbl_slow_2p0), 0 },
+ [2][2] = { tbl_slow_2p0, sizeof(tbl_slow_2p0), 0 },
+ [2][3] = { tbl_slow_2p0, sizeof(tbl_slow_2p0), 0 },
+ [2][4] = { tbl_slow_2p0, sizeof(tbl_slow_2p0), 0 },
+ [2][5] = { tbl_slow_2p0, sizeof(tbl_slow_2p0), 0 },
+ [2][6] = { tbl_slow_2p0, sizeof(tbl_slow_2p0), 0 },
};
static struct acpuclk_krait_params acpuclk_8064_params __initdata = {
@@ -219,12 +310,18 @@
.l2_freq_tbl = l2_freq_tbl,
.l2_freq_tbl_size = sizeof(l2_freq_tbl),
.bus_scale = &bus_scale_data,
- .qfprom_phys_base = 0x00700000,
+ .pte_efuse_phys = 0x007000C0,
.stby_khz = 384000,
};
static int __init acpuclk_8064_probe(struct platform_device *pdev)
{
+ if (cpu_is_apq8064ab() ||
+ SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
+ acpuclk_8064_params.hfpll_data->low_vdd_l_max = 37;
+ acpuclk_8064_params.hfpll_data->nom_vdd_l_max = 74;
+ }
+
return acpuclk_krait_init(&pdev->dev, &acpuclk_8064_params);
}
diff --git a/arch/arm/mach-msm/acpuclock-8627.c b/arch/arm/mach-msm/acpuclock-8627.c
index 07a7f8f..ac29cac 100644
--- a/arch/arm/mach-msm/acpuclock-8627.c
+++ b/arch/arm/mach-msm/acpuclock-8627.c
@@ -50,6 +50,7 @@
.hfpll_phys_base = 0x00903200,
.aux_clk_sel_phys = 0x02088014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x4501,
.vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
@@ -60,6 +61,7 @@
.hfpll_phys_base = 0x00903300,
.aux_clk_sel_phys = 0x02098014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x5501,
.vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
@@ -70,6 +72,7 @@
.hfpll_phys_base = 0x00903400,
.aux_clk_sel_phys = 0x02011028,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x0500,
.vreg[VREG_HFPLL_A] = { "l2_hfpll", 1800000 },
},
@@ -92,42 +95,42 @@
/* TODO: Update vdd_dig, vdd_mem and bw when data is available. */
static struct l2_level l2_freq_tbl[] __initdata = {
- [0] = { { 384000, PLL_8, 0, 2, 0x00 }, LVL_NOM, 1050000, 1 },
- [1] = { { 432000, HFPLL, 2, 0, 0x20 }, LVL_NOM, 1050000, 1 },
- [2] = { { 486000, HFPLL, 2, 0, 0x24 }, LVL_NOM, 1050000, 1 },
- [3] = { { 540000, HFPLL, 2, 0, 0x28 }, LVL_NOM, 1050000, 2 },
- [4] = { { 594000, HFPLL, 1, 0, 0x16 }, LVL_NOM, 1050000, 2 },
- [5] = { { 648000, HFPLL, 1, 0, 0x18 }, LVL_NOM, 1050000, 2 },
- [6] = { { 702000, HFPLL, 1, 0, 0x1A }, LVL_NOM, 1050000, 3 },
- [7] = { { 756000, HFPLL, 1, 0, 0x1C }, LVL_HIGH, 1150000, 3 },
- [8] = { { 810000, HFPLL, 1, 0, 0x1E }, LVL_HIGH, 1150000, 3 },
- [9] = { { 864000, HFPLL, 1, 0, 0x20 }, LVL_HIGH, 1150000, 4 },
- [10] = { { 918000, HFPLL, 1, 0, 0x22 }, LVL_HIGH, 1150000, 4 },
- [11] = { { 972000, HFPLL, 1, 0, 0x24 }, LVL_HIGH, 1150000, 4 },
+ [0] = { { 384000, PLL_8, 0, 0x00 }, LVL_NOM, 1050000, 1 },
+ [1] = { { 432000, HFPLL, 2, 0x20 }, LVL_NOM, 1050000, 1 },
+ [2] = { { 486000, HFPLL, 2, 0x24 }, LVL_NOM, 1050000, 1 },
+ [3] = { { 540000, HFPLL, 2, 0x28 }, LVL_NOM, 1050000, 2 },
+ [4] = { { 594000, HFPLL, 1, 0x16 }, LVL_NOM, 1050000, 2 },
+ [5] = { { 648000, HFPLL, 1, 0x18 }, LVL_NOM, 1050000, 2 },
+ [6] = { { 702000, HFPLL, 1, 0x1A }, LVL_NOM, 1050000, 3 },
+ [7] = { { 756000, HFPLL, 1, 0x1C }, LVL_HIGH, 1150000, 3 },
+ [8] = { { 810000, HFPLL, 1, 0x1E }, LVL_HIGH, 1150000, 3 },
+ [9] = { { 864000, HFPLL, 1, 0x20 }, LVL_HIGH, 1150000, 4 },
+ [10] = { { 918000, HFPLL, 1, 0x22 }, LVL_HIGH, 1150000, 4 },
+ [11] = { { 972000, HFPLL, 1, 0x24 }, LVL_HIGH, 1150000, 4 },
{ }
};
/* TODO: Update core voltages when data is available. */
static struct acpu_level acpu_freq_tbl[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 900000 },
- { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(4), 925000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(4), 925000 },
- { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(4), 937500 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(4), 962500 },
- { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(8), 987500 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(8), 1000000 },
- { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(8), 1025000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(8), 1062500 },
- { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(11), 1062500 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(11), 1087500 },
- { 1, { 972000, HFPLL, 1, 0, 0x24 }, L2(11), 1100000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 900000 },
+ { 1, { 432000, HFPLL, 2, 0x20 }, L2(4), 925000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(4), 925000 },
+ { 1, { 540000, HFPLL, 2, 0x28 }, L2(4), 937500 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(4), 962500 },
+ { 1, { 648000, HFPLL, 1, 0x18 }, L2(8), 987500 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(8), 1000000 },
+ { 1, { 756000, HFPLL, 1, 0x1C }, L2(8), 1025000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(8), 1062500 },
+ { 1, { 864000, HFPLL, 1, 0x20 }, L2(11), 1062500 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(11), 1087500 },
+ { 1, { 972000, HFPLL, 1, 0x24 }, L2(11), 1100000 },
{ 0, { 0 } }
};
-static struct pvs_table pvs_tables[NUM_PVS] __initdata = {
- [PVS_SLOW] = { acpu_freq_tbl, sizeof(acpu_freq_tbl), 0 },
- [PVS_NOMINAL] = { acpu_freq_tbl, sizeof(acpu_freq_tbl), 25000 },
- [PVS_FAST] = { acpu_freq_tbl, sizeof(acpu_freq_tbl), 25000 },
+static struct pvs_table pvs_tables[NUM_SPEED_BINS][NUM_PVS] __initdata = {
+ [0][PVS_SLOW] = { acpu_freq_tbl, sizeof(acpu_freq_tbl), 0 },
+ [0][PVS_NOMINAL] = { acpu_freq_tbl, sizeof(acpu_freq_tbl), 25000 },
+ [0][PVS_FAST] = { acpu_freq_tbl, sizeof(acpu_freq_tbl), 25000 },
};
static struct acpuclk_krait_params acpuclk_8627_params __initdata = {
@@ -138,7 +141,7 @@
.l2_freq_tbl = l2_freq_tbl,
.l2_freq_tbl_size = sizeof(l2_freq_tbl),
.bus_scale = &bus_scale_data,
- .qfprom_phys_base = 0x00700000,
+ .pte_efuse_phys = 0x007000C0,
.stby_khz = 384000,
};
diff --git a/arch/arm/mach-msm/acpuclock-8930.c b/arch/arm/mach-msm/acpuclock-8930.c
index 77876ee..e46599a 100644
--- a/arch/arm/mach-msm/acpuclock-8930.c
+++ b/arch/arm/mach-msm/acpuclock-8930.c
@@ -50,6 +50,7 @@
.hfpll_phys_base = 0x00903200,
.aux_clk_sel_phys = 0x02088014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x4501,
.vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
@@ -61,6 +62,7 @@
.hfpll_phys_base = 0x00903300,
.aux_clk_sel_phys = 0x02098014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x5501,
.vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
@@ -72,6 +74,7 @@
.hfpll_phys_base = 0x00903400,
.aux_clk_sel_phys = 0x02011028,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x0500,
.vreg[VREG_HFPLL_A] = { "l2_s8", 2050000 },
.vreg[VREG_HFPLL_B] = { "l2_l23", 1800000 },
@@ -83,6 +86,7 @@
.hfpll_phys_base = 0x00903200,
.aux_clk_sel_phys = 0x02088014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x4501,
.vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
@@ -93,6 +97,7 @@
.hfpll_phys_base = 0x00903300,
.aux_clk_sel_phys = 0x02098014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x5501,
.vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
@@ -103,6 +108,7 @@
.hfpll_phys_base = 0x00903400,
.aux_clk_sel_phys = 0x02011028,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x0500,
.vreg[VREG_HFPLL_A] = { "l2_hfpll", 1800000 },
},
@@ -128,89 +134,89 @@
/* TODO: Update vdd_dig, vdd_mem and bw when data is available. */
static struct l2_level l2_freq_tbl[] __initdata = {
- [0] = { { 384000, PLL_8, 0, 2, 0x00 }, LVL_NOM, 1050000, 1 },
- [1] = { { 432000, HFPLL, 2, 0, 0x20 }, LVL_NOM, 1050000, 2 },
- [2] = { { 486000, HFPLL, 2, 0, 0x24 }, LVL_NOM, 1050000, 2 },
- [3] = { { 540000, HFPLL, 2, 0, 0x28 }, LVL_NOM, 1050000, 2 },
- [4] = { { 594000, HFPLL, 1, 0, 0x16 }, LVL_NOM, 1050000, 2 },
- [5] = { { 648000, HFPLL, 1, 0, 0x18 }, LVL_NOM, 1050000, 4 },
- [6] = { { 702000, HFPLL, 1, 0, 0x1A }, LVL_NOM, 1050000, 4 },
- [7] = { { 756000, HFPLL, 1, 0, 0x1C }, LVL_HIGH, 1150000, 4 },
- [8] = { { 810000, HFPLL, 1, 0, 0x1E }, LVL_HIGH, 1150000, 4 },
- [9] = { { 864000, HFPLL, 1, 0, 0x20 }, LVL_HIGH, 1150000, 4 },
- [10] = { { 918000, HFPLL, 1, 0, 0x22 }, LVL_HIGH, 1150000, 7 },
- [11] = { { 972000, HFPLL, 1, 0, 0x24 }, LVL_HIGH, 1150000, 7 },
- [12] = { { 1026000, HFPLL, 1, 0, 0x26 }, LVL_HIGH, 1150000, 7 },
- [13] = { { 1080000, HFPLL, 1, 0, 0x28 }, LVL_HIGH, 1150000, 7 },
- [14] = { { 1134000, HFPLL, 1, 0, 0x2A }, LVL_HIGH, 1150000, 7 },
- [15] = { { 1188000, HFPLL, 1, 0, 0x2C }, LVL_HIGH, 1150000, 7 },
+ [0] = { { 384000, PLL_8, 0, 0x00 }, LVL_NOM, 1050000, 1 },
+ [1] = { { 432000, HFPLL, 2, 0x20 }, LVL_NOM, 1050000, 2 },
+ [2] = { { 486000, HFPLL, 2, 0x24 }, LVL_NOM, 1050000, 2 },
+ [3] = { { 540000, HFPLL, 2, 0x28 }, LVL_NOM, 1050000, 2 },
+ [4] = { { 594000, HFPLL, 1, 0x16 }, LVL_NOM, 1050000, 2 },
+ [5] = { { 648000, HFPLL, 1, 0x18 }, LVL_NOM, 1050000, 4 },
+ [6] = { { 702000, HFPLL, 1, 0x1A }, LVL_NOM, 1050000, 4 },
+ [7] = { { 756000, HFPLL, 1, 0x1C }, LVL_HIGH, 1150000, 4 },
+ [8] = { { 810000, HFPLL, 1, 0x1E }, LVL_HIGH, 1150000, 4 },
+ [9] = { { 864000, HFPLL, 1, 0x20 }, LVL_HIGH, 1150000, 4 },
+ [10] = { { 918000, HFPLL, 1, 0x22 }, LVL_HIGH, 1150000, 7 },
+ [11] = { { 972000, HFPLL, 1, 0x24 }, LVL_HIGH, 1150000, 7 },
+ [12] = { { 1026000, HFPLL, 1, 0x26 }, LVL_HIGH, 1150000, 7 },
+ [13] = { { 1080000, HFPLL, 1, 0x28 }, LVL_HIGH, 1150000, 7 },
+ [14] = { { 1134000, HFPLL, 1, 0x2A }, LVL_HIGH, 1150000, 7 },
+ [15] = { { 1188000, HFPLL, 1, 0x2C }, LVL_HIGH, 1150000, 7 },
{ }
};
static struct acpu_level acpu_freq_tbl_slow[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 950000 },
- { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(5), 975000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(5), 975000 },
- { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(5), 1000000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(5), 1000000 },
- { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(5), 1025000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(5), 1025000 },
- { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(10), 1075000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(10), 1075000 },
- { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(10), 1100000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(10), 1100000 },
- { 1, { 972000, HFPLL, 1, 0, 0x24 }, L2(10), 1125000 },
- { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(10), 1125000 },
- { 1, { 1080000, HFPLL, 1, 0, 0x28 }, L2(15), 1175000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1175000 },
- { 1, { 1188000, HFPLL, 1, 0, 0x2C }, L2(15), 1200000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 950000 },
+ { 1, { 432000, HFPLL, 2, 0x20 }, L2(5), 975000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 975000 },
+ { 1, { 540000, HFPLL, 2, 0x28 }, L2(5), 1000000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(5), 1000000 },
+ { 1, { 648000, HFPLL, 1, 0x18 }, L2(5), 1025000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(5), 1025000 },
+ { 1, { 756000, HFPLL, 1, 0x1C }, L2(10), 1075000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(10), 1075000 },
+ { 1, { 864000, HFPLL, 1, 0x20 }, L2(10), 1100000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(10), 1100000 },
+ { 1, { 972000, HFPLL, 1, 0x24 }, L2(10), 1125000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(10), 1125000 },
+ { 1, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1175000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1175000 },
+ { 1, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1200000 },
{ 0, { 0 } }
};
static struct acpu_level acpu_freq_tbl_nom[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 925000 },
- { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(5), 950000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(5), 950000 },
- { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(5), 975000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(5), 975000 },
- { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(5), 1000000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(5), 1000000 },
- { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(10), 1050000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(10), 1050000 },
- { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(10), 1075000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(10), 1075000 },
- { 1, { 972000, HFPLL, 1, 0, 0x24 }, L2(10), 1100000 },
- { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(10), 1100000 },
- { 1, { 1080000, HFPLL, 1, 0, 0x28 }, L2(15), 1150000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1150000 },
- { 1, { 1188000, HFPLL, 1, 0, 0x2C }, L2(15), 1175000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 925000 },
+ { 1, { 432000, HFPLL, 2, 0x20 }, L2(5), 950000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 950000 },
+ { 1, { 540000, HFPLL, 2, 0x28 }, L2(5), 975000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(5), 975000 },
+ { 1, { 648000, HFPLL, 1, 0x18 }, L2(5), 1000000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(5), 1000000 },
+ { 1, { 756000, HFPLL, 1, 0x1C }, L2(10), 1050000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(10), 1050000 },
+ { 1, { 864000, HFPLL, 1, 0x20 }, L2(10), 1075000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(10), 1075000 },
+ { 1, { 972000, HFPLL, 1, 0x24 }, L2(10), 1100000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(10), 1100000 },
+ { 1, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1150000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1150000 },
+ { 1, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1175000 },
{ 0, { 0 } }
};
static struct acpu_level acpu_freq_tbl_fast[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 900000 },
- { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(5), 900000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(5), 900000 },
- { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(5), 925000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(5), 925000 },
- { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(5), 950000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(5), 950000 },
- { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(10), 1000000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(10), 1000000 },
- { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(10), 1025000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(10), 1025000 },
- { 1, { 972000, HFPLL, 1, 0, 0x24 }, L2(10), 1050000 },
- { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(10), 1050000 },
- { 1, { 1080000, HFPLL, 1, 0, 0x28 }, L2(15), 1100000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1100000 },
- { 1, { 1188000, HFPLL, 1, 0, 0x2C }, L2(15), 1125000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 900000 },
+ { 1, { 432000, HFPLL, 2, 0x20 }, L2(5), 900000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 900000 },
+ { 1, { 540000, HFPLL, 2, 0x28 }, L2(5), 925000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(5), 925000 },
+ { 1, { 648000, HFPLL, 1, 0x18 }, L2(5), 950000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(5), 950000 },
+ { 1, { 756000, HFPLL, 1, 0x1C }, L2(10), 1000000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(10), 1000000 },
+ { 1, { 864000, HFPLL, 1, 0x20 }, L2(10), 1025000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(10), 1025000 },
+ { 1, { 972000, HFPLL, 1, 0x24 }, L2(10), 1050000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(10), 1050000 },
+ { 1, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1100000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1100000 },
+ { 1, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1125000 },
{ 0, { 0 } }
};
-static struct pvs_table pvs_tables[NUM_PVS] __initdata = {
-[PVS_SLOW] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
-[PVS_NOMINAL] = { acpu_freq_tbl_nom, sizeof(acpu_freq_tbl_nom), 25000 },
-[PVS_FAST] = { acpu_freq_tbl_fast, sizeof(acpu_freq_tbl_fast), 25000 },
+static struct pvs_table pvs_tables[NUM_SPEED_BINS][NUM_PVS] __initdata = {
+[0][PVS_SLOW] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
+[0][PVS_NOMINAL] = { acpu_freq_tbl_nom, sizeof(acpu_freq_tbl_nom), 25000 },
+[0][PVS_FAST] = { acpu_freq_tbl_fast, sizeof(acpu_freq_tbl_fast), 25000 },
};
static struct acpuclk_krait_params acpuclk_8930_params __initdata = {
@@ -221,7 +227,7 @@
.l2_freq_tbl = l2_freq_tbl,
.l2_freq_tbl_size = sizeof(l2_freq_tbl),
.bus_scale = &bus_scale_data,
- .qfprom_phys_base = 0x00700000,
+ .pte_efuse_phys = 0x007000C0,
.stby_khz = 384000,
};
diff --git a/arch/arm/mach-msm/acpuclock-8930aa.c b/arch/arm/mach-msm/acpuclock-8930aa.c
index dbc3e32..9d2b6fc 100644
--- a/arch/arm/mach-msm/acpuclock-8930aa.c
+++ b/arch/arm/mach-msm/acpuclock-8930aa.c
@@ -50,6 +50,7 @@
.hfpll_phys_base = 0x00903200,
.aux_clk_sel_phys = 0x02088014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x4501,
.vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
@@ -60,6 +61,7 @@
.hfpll_phys_base = 0x00903300,
.aux_clk_sel_phys = 0x02098014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x5501,
.vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
@@ -70,6 +72,7 @@
.hfpll_phys_base = 0x00903400,
.aux_clk_sel_phys = 0x02011028,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x0500,
.vreg[VREG_HFPLL_A] = { "l2_hfpll", 1800000 },
},
@@ -95,101 +98,101 @@
/* TODO: Update vdd_dig, vdd_mem and bw when data is available. */
static struct l2_level l2_freq_tbl[] __initdata = {
- [0] = { { 384000, PLL_8, 0, 2, 0x00 }, LVL_NOM, 1050000, 1 },
- [1] = { { 432000, HFPLL, 2, 0, 0x20 }, LVL_NOM, 1050000, 2 },
- [2] = { { 486000, HFPLL, 2, 0, 0x24 }, LVL_NOM, 1050000, 2 },
- [3] = { { 540000, HFPLL, 2, 0, 0x28 }, LVL_NOM, 1050000, 2 },
- [4] = { { 594000, HFPLL, 1, 0, 0x16 }, LVL_NOM, 1050000, 2 },
- [5] = { { 648000, HFPLL, 1, 0, 0x18 }, LVL_NOM, 1050000, 4 },
- [6] = { { 702000, HFPLL, 1, 0, 0x1A }, LVL_NOM, 1050000, 4 },
- [7] = { { 756000, HFPLL, 1, 0, 0x1C }, LVL_HIGH, 1150000, 4 },
- [8] = { { 810000, HFPLL, 1, 0, 0x1E }, LVL_HIGH, 1150000, 4 },
- [9] = { { 864000, HFPLL, 1, 0, 0x20 }, LVL_HIGH, 1150000, 4 },
- [10] = { { 918000, HFPLL, 1, 0, 0x22 }, LVL_HIGH, 1150000, 7 },
- [11] = { { 972000, HFPLL, 1, 0, 0x24 }, LVL_HIGH, 1150000, 7 },
- [12] = { { 1026000, HFPLL, 1, 0, 0x26 }, LVL_HIGH, 1150000, 7 },
- [13] = { { 1080000, HFPLL, 1, 0, 0x28 }, LVL_HIGH, 1150000, 7 },
- [14] = { { 1134000, HFPLL, 1, 0, 0x2A }, LVL_HIGH, 1150000, 7 },
- [15] = { { 1188000, HFPLL, 1, 0, 0x2C }, LVL_HIGH, 1150000, 7 },
+ [0] = { { 384000, PLL_8, 0, 0x00 }, LVL_NOM, 1050000, 1 },
+ [1] = { { 432000, HFPLL, 2, 0x20 }, LVL_NOM, 1050000, 2 },
+ [2] = { { 486000, HFPLL, 2, 0x24 }, LVL_NOM, 1050000, 2 },
+ [3] = { { 540000, HFPLL, 2, 0x28 }, LVL_NOM, 1050000, 2 },
+ [4] = { { 594000, HFPLL, 1, 0x16 }, LVL_NOM, 1050000, 2 },
+ [5] = { { 648000, HFPLL, 1, 0x18 }, LVL_NOM, 1050000, 4 },
+ [6] = { { 702000, HFPLL, 1, 0x1A }, LVL_NOM, 1050000, 4 },
+ [7] = { { 756000, HFPLL, 1, 0x1C }, LVL_HIGH, 1150000, 4 },
+ [8] = { { 810000, HFPLL, 1, 0x1E }, LVL_HIGH, 1150000, 4 },
+ [9] = { { 864000, HFPLL, 1, 0x20 }, LVL_HIGH, 1150000, 4 },
+ [10] = { { 918000, HFPLL, 1, 0x22 }, LVL_HIGH, 1150000, 7 },
+ [11] = { { 972000, HFPLL, 1, 0x24 }, LVL_HIGH, 1150000, 7 },
+ [12] = { { 1026000, HFPLL, 1, 0x26 }, LVL_HIGH, 1150000, 7 },
+ [13] = { { 1080000, HFPLL, 1, 0x28 }, LVL_HIGH, 1150000, 7 },
+ [14] = { { 1134000, HFPLL, 1, 0x2A }, LVL_HIGH, 1150000, 7 },
+ [15] = { { 1188000, HFPLL, 1, 0x2C }, LVL_HIGH, 1150000, 7 },
{ }
};
static struct acpu_level acpu_freq_tbl_slow[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 950000 },
- { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(5), 975000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(5), 975000 },
- { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(5), 1000000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(5), 1000000 },
- { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(5), 1025000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(5), 1025000 },
- { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(10), 1075000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(10), 1075000 },
- { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(10), 1100000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(10), 1100000 },
- { 1, { 972000, HFPLL, 1, 0, 0x24 }, L2(10), 1125000 },
- { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(10), 1125000 },
- { 1, { 1080000, HFPLL, 1, 0, 0x28 }, L2(15), 1175000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1175000 },
- { 1, { 1188000, HFPLL, 1, 0, 0x2C }, L2(15), 1200000 },
- { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(15), 1200000 },
- { 1, { 1296000, HFPLL, 1, 0, 0x30 }, L2(15), 1225000 },
- { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(15), 1225000 },
- { 1, { 1404000, HFPLL, 1, 0, 0x34 }, L2(15), 1237500 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 950000 },
+ { 1, { 432000, HFPLL, 2, 0x20 }, L2(5), 975000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 975000 },
+ { 1, { 540000, HFPLL, 2, 0x28 }, L2(5), 1000000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(5), 1000000 },
+ { 1, { 648000, HFPLL, 1, 0x18 }, L2(5), 1025000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(5), 1025000 },
+ { 1, { 756000, HFPLL, 1, 0x1C }, L2(10), 1075000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(10), 1075000 },
+ { 1, { 864000, HFPLL, 1, 0x20 }, L2(10), 1100000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(10), 1100000 },
+ { 1, { 972000, HFPLL, 1, 0x24 }, L2(10), 1125000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(10), 1125000 },
+ { 1, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1175000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1175000 },
+ { 1, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1200000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1200000 },
+ { 1, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1225000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1225000 },
+ { 1, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1237500 },
{ 0, { 0 } }
};
static struct acpu_level acpu_freq_tbl_nom[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 925000 },
- { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(5), 950000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(5), 950000 },
- { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(5), 975000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(5), 975000 },
- { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(5), 1000000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(5), 1000000 },
- { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(10), 1050000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(10), 1050000 },
- { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(10), 1075000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(10), 1075000 },
- { 1, { 972000, HFPLL, 1, 0, 0x24 }, L2(10), 1100000 },
- { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(10), 1100000 },
- { 1, { 1080000, HFPLL, 1, 0, 0x28 }, L2(15), 1150000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1150000 },
- { 1, { 1188000, HFPLL, 1, 0, 0x2C }, L2(15), 1175000 },
- { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(15), 1175000 },
- { 1, { 1296000, HFPLL, 1, 0, 0x30 }, L2(15), 1200000 },
- { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(15), 1200000 },
- { 1, { 1404000, HFPLL, 1, 0, 0x34 }, L2(15), 1212500 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 925000 },
+ { 1, { 432000, HFPLL, 2, 0x20 }, L2(5), 950000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 950000 },
+ { 1, { 540000, HFPLL, 2, 0x28 }, L2(5), 975000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(5), 975000 },
+ { 1, { 648000, HFPLL, 1, 0x18 }, L2(5), 1000000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(5), 1000000 },
+ { 1, { 756000, HFPLL, 1, 0x1C }, L2(10), 1050000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(10), 1050000 },
+ { 1, { 864000, HFPLL, 1, 0x20 }, L2(10), 1075000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(10), 1075000 },
+ { 1, { 972000, HFPLL, 1, 0x24 }, L2(10), 1100000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(10), 1100000 },
+ { 1, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1150000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1150000 },
+ { 1, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1175000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1175000 },
+ { 1, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1200000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1200000 },
+ { 1, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1212500 },
{ 0, { 0 } }
};
static struct acpu_level acpu_freq_tbl_fast[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 900000 },
- { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(5), 900000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(5), 900000 },
- { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(5), 925000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(5), 925000 },
- { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(5), 950000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(5), 950000 },
- { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(10), 1000000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(10), 1000000 },
- { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(10), 1025000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(10), 1025000 },
- { 1, { 972000, HFPLL, 1, 0, 0x24 }, L2(10), 1050000 },
- { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(10), 1050000 },
- { 1, { 1080000, HFPLL, 1, 0, 0x28 }, L2(15), 1100000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1100000 },
- { 1, { 1188000, HFPLL, 1, 0, 0x2C }, L2(15), 1125000 },
- { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(15), 1125000 },
- { 1, { 1296000, HFPLL, 1, 0, 0x30 }, L2(15), 1150000 },
- { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(15), 1150000 },
- { 1, { 1404000, HFPLL, 1, 0, 0x34 }, L2(15), 1162500 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 900000 },
+ { 1, { 432000, HFPLL, 2, 0x20 }, L2(5), 900000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 900000 },
+ { 1, { 540000, HFPLL, 2, 0x28 }, L2(5), 925000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(5), 925000 },
+ { 1, { 648000, HFPLL, 1, 0x18 }, L2(5), 950000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(5), 950000 },
+ { 1, { 756000, HFPLL, 1, 0x1C }, L2(10), 1000000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(10), 1000000 },
+ { 1, { 864000, HFPLL, 1, 0x20 }, L2(10), 1025000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(10), 1025000 },
+ { 1, { 972000, HFPLL, 1, 0x24 }, L2(10), 1050000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(10), 1050000 },
+ { 1, { 1080000, HFPLL, 1, 0x28 }, L2(15), 1100000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 1100000 },
+ { 1, { 1188000, HFPLL, 1, 0x2C }, L2(15), 1125000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 1125000 },
+ { 1, { 1296000, HFPLL, 1, 0x30 }, L2(15), 1150000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 1150000 },
+ { 1, { 1404000, HFPLL, 1, 0x34 }, L2(15), 1162500 },
{ 0, { 0 } }
};
-static struct pvs_table pvs_tables[NUM_PVS] __initdata = {
-[PVS_SLOW] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
-[PVS_NOMINAL] = { acpu_freq_tbl_nom, sizeof(acpu_freq_tbl_nom), 25000 },
-[PVS_FAST] = { acpu_freq_tbl_fast, sizeof(acpu_freq_tbl_fast), 25000 },
+static struct pvs_table pvs_tables[NUM_SPEED_BINS][NUM_PVS] __initdata = {
+[0][PVS_SLOW] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
+[0][PVS_NOMINAL] = { acpu_freq_tbl_nom, sizeof(acpu_freq_tbl_nom), 25000 },
+[0][PVS_FAST] = { acpu_freq_tbl_fast, sizeof(acpu_freq_tbl_fast), 25000 },
};
static struct acpuclk_krait_params acpuclk_8930aa_params __initdata = {
@@ -200,7 +203,7 @@
.l2_freq_tbl = l2_freq_tbl,
.l2_freq_tbl_size = sizeof(l2_freq_tbl),
.bus_scale = &bus_scale_data,
- .qfprom_phys_base = 0x00700000,
+ .pte_efuse_phys = 0x007000C0,
.stby_khz = 384000,
};
diff --git a/arch/arm/mach-msm/acpuclock-8960.c b/arch/arm/mach-msm/acpuclock-8960.c
index 631bd7e..d7d3edd 100644
--- a/arch/arm/mach-msm/acpuclock-8960.c
+++ b/arch/arm/mach-msm/acpuclock-8960.c
@@ -44,6 +44,7 @@
.hfpll_phys_base = 0x00903200,
.aux_clk_sel_phys = 0x02088014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x4501,
.vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
@@ -55,6 +56,7 @@
.hfpll_phys_base = 0x00903300,
.aux_clk_sel_phys = 0x02098014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x5501,
.vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
@@ -66,6 +68,7 @@
.hfpll_phys_base = 0x00903400,
.aux_clk_sel_phys = 0x02011028,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x0500,
.vreg[VREG_HFPLL_A] = { "l2_s8", 2050000 },
.vreg[VREG_HFPLL_B] = { "l2_l23", 1800000 },
@@ -90,110 +93,112 @@
};
static struct l2_level l2_freq_tbl[] __initdata = {
- [0] = { { 384000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 1 },
- [1] = { { 432000, HFPLL, 2, 0, 0x20 }, 1050000, 1050000, 2 },
- [2] = { { 486000, HFPLL, 2, 0, 0x24 }, 1050000, 1050000, 2 },
- [3] = { { 540000, HFPLL, 2, 0, 0x28 }, 1050000, 1050000, 2 },
- [4] = { { 594000, HFPLL, 1, 0, 0x16 }, 1050000, 1050000, 2 },
- [5] = { { 648000, HFPLL, 1, 0, 0x18 }, 1050000, 1050000, 4 },
- [6] = { { 702000, HFPLL, 1, 0, 0x1A }, 1050000, 1050000, 4 },
- [7] = { { 756000, HFPLL, 1, 0, 0x1C }, 1150000, 1150000, 4 },
- [8] = { { 810000, HFPLL, 1, 0, 0x1E }, 1150000, 1150000, 4 },
- [9] = { { 864000, HFPLL, 1, 0, 0x20 }, 1150000, 1150000, 4 },
- [10] = { { 918000, HFPLL, 1, 0, 0x22 }, 1150000, 1150000, 6 },
- [11] = { { 972000, HFPLL, 1, 0, 0x24 }, 1150000, 1150000, 6 },
- [12] = { { 1026000, HFPLL, 1, 0, 0x26 }, 1150000, 1150000, 6 },
- [13] = { { 1080000, HFPLL, 1, 0, 0x28 }, 1150000, 1150000, 6 },
- [14] = { { 1134000, HFPLL, 1, 0, 0x2A }, 1150000, 1150000, 6 },
- [15] = { { 1188000, HFPLL, 1, 0, 0x2C }, 1150000, 1150000, 6 },
- [16] = { { 1242000, HFPLL, 1, 0, 0x2E }, 1150000, 1150000, 6 },
- [17] = { { 1296000, HFPLL, 1, 0, 0x30 }, 1150000, 1150000, 6 },
- [18] = { { 1350000, HFPLL, 1, 0, 0x32 }, 1150000, 1150000, 6 },
+ [0] = { { 384000, PLL_8, 0, 0x00 }, 1050000, 1050000, 1 },
+ [1] = { { 432000, HFPLL, 2, 0x20 }, 1050000, 1050000, 2 },
+ [2] = { { 486000, HFPLL, 2, 0x24 }, 1050000, 1050000, 2 },
+ [3] = { { 540000, HFPLL, 2, 0x28 }, 1050000, 1050000, 2 },
+ [4] = { { 594000, HFPLL, 1, 0x16 }, 1050000, 1050000, 2 },
+ [5] = { { 648000, HFPLL, 1, 0x18 }, 1050000, 1050000, 4 },
+ [6] = { { 702000, HFPLL, 1, 0x1A }, 1050000, 1050000, 4 },
+ [7] = { { 756000, HFPLL, 1, 0x1C }, 1150000, 1150000, 4 },
+ [8] = { { 810000, HFPLL, 1, 0x1E }, 1150000, 1150000, 4 },
+ [9] = { { 864000, HFPLL, 1, 0x20 }, 1150000, 1150000, 4 },
+ [10] = { { 918000, HFPLL, 1, 0x22 }, 1150000, 1150000, 6 },
+ [11] = { { 972000, HFPLL, 1, 0x24 }, 1150000, 1150000, 6 },
+ [12] = { { 1026000, HFPLL, 1, 0x26 }, 1150000, 1150000, 6 },
+ [13] = { { 1080000, HFPLL, 1, 0x28 }, 1150000, 1150000, 6 },
+ [14] = { { 1134000, HFPLL, 1, 0x2A }, 1150000, 1150000, 6 },
+ [15] = { { 1188000, HFPLL, 1, 0x2C }, 1150000, 1150000, 6 },
+ [16] = { { 1242000, HFPLL, 1, 0x2E }, 1150000, 1150000, 6 },
+ [17] = { { 1296000, HFPLL, 1, 0x30 }, 1150000, 1150000, 6 },
+ [18] = { { 1350000, HFPLL, 1, 0x32 }, 1150000, 1150000, 6 },
{ }
};
+#define AVS(x) .avsdscr_setting = (x)
+
static struct acpu_level acpu_freq_tbl_slow[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 950000 },
- { 0, { 432000, HFPLL, 2, 0, 0x20 }, L2(6), 975000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(6), 975000 },
- { 0, { 540000, HFPLL, 2, 0, 0x28 }, L2(6), 1000000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(6), 1000000 },
- { 0, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 1025000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(6), 1025000 },
- { 0, { 756000, HFPLL, 1, 0, 0x1C }, L2(6), 1075000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(6), 1075000 },
- { 0, { 864000, HFPLL, 1, 0, 0x20 }, L2(6), 1100000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(6), 1100000 },
- { 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(6), 1125000 },
- { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(6), 1125000 },
- { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(18), 1175000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(18), 1175000 },
- { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(18), 1200000 },
- { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(18), 1200000 },
- { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(18), 1225000 },
- { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(18), 1225000 },
- { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(18), 1237500 },
- { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(18), 1237500 },
- { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(18), 1250000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 950000, AVS(0x40001F) },
+ { 0, { 432000, HFPLL, 2, 0x20 }, L2(6), 975000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(6), 975000 },
+ { 0, { 540000, HFPLL, 2, 0x28 }, L2(6), 1000000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(6), 1000000 },
+ { 0, { 648000, HFPLL, 1, 0x18 }, L2(6), 1025000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(6), 1025000 },
+ { 0, { 756000, HFPLL, 1, 0x1C }, L2(6), 1075000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(6), 1075000 },
+ { 0, { 864000, HFPLL, 1, 0x20 }, L2(6), 1100000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(6), 1100000 },
+ { 0, { 972000, HFPLL, 1, 0x24 }, L2(6), 1125000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(6), 1125000 },
+ { 0, { 1080000, HFPLL, 1, 0x28 }, L2(18), 1175000, AVS(0x400015) },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(18), 1175000, AVS(0x400015) },
+ { 0, { 1188000, HFPLL, 1, 0x2C }, L2(18), 1200000, AVS(0x400015) },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(18), 1200000, AVS(0x400015) },
+ { 0, { 1296000, HFPLL, 1, 0x30 }, L2(18), 1225000, AVS(0x400015) },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(18), 1225000, AVS(0x400015) },
+ { 0, { 1404000, HFPLL, 1, 0x34 }, L2(18), 1237500, AVS(0x400015) },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(18), 1237500, AVS(0x100018) },
+ { 1, { 1512000, HFPLL, 1, 0x38 }, L2(18), 1250000, AVS(0x400012) },
{ 0, { 0 } }
};
static struct acpu_level acpu_freq_tbl_nom[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 900000 },
- { 0, { 432000, HFPLL, 2, 0, 0x20 }, L2(6), 925000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(6), 925000 },
- { 0, { 540000, HFPLL, 2, 0, 0x28 }, L2(6), 950000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(6), 950000 },
- { 0, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 975000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(6), 975000 },
- { 0, { 756000, HFPLL, 1, 0, 0x1C }, L2(6), 1025000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(6), 1025000 },
- { 0, { 864000, HFPLL, 1, 0, 0x20 }, L2(6), 1050000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(6), 1050000 },
- { 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(6), 1075000 },
- { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(6), 1075000 },
- { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(18), 1125000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(18), 1125000 },
- { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(18), 1150000 },
- { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(18), 1150000 },
- { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(18), 1175000 },
- { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(18), 1175000 },
- { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(18), 1187500 },
- { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(18), 1187500 },
- { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(18), 1200000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 900000, AVS(0x40007F) },
+ { 0, { 432000, HFPLL, 2, 0x20 }, L2(6), 925000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(6), 925000 },
+ { 0, { 540000, HFPLL, 2, 0x28 }, L2(6), 950000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(6), 950000 },
+ { 0, { 648000, HFPLL, 1, 0x18 }, L2(6), 975000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(6), 975000 },
+ { 0, { 756000, HFPLL, 1, 0x1C }, L2(6), 1025000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(6), 1025000 },
+ { 0, { 864000, HFPLL, 1, 0x20 }, L2(6), 1050000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(6), 1050000 },
+ { 0, { 972000, HFPLL, 1, 0x24 }, L2(6), 1075000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(6), 1075000 },
+ { 0, { 1080000, HFPLL, 1, 0x28 }, L2(18), 1125000, AVS(0x400015) },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(18), 1125000, AVS(0x400015) },
+ { 0, { 1188000, HFPLL, 1, 0x2C }, L2(18), 1150000, AVS(0x400015) },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(18), 1150000, AVS(0x400015) },
+ { 0, { 1296000, HFPLL, 1, 0x30 }, L2(18), 1175000, AVS(0x400015) },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(18), 1175000, AVS(0x400015) },
+ { 0, { 1404000, HFPLL, 1, 0x34 }, L2(18), 1187500, AVS(0x400015) },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(18), 1187500, AVS(0x100018) },
+ { 1, { 1512000, HFPLL, 1, 0x38 }, L2(18), 1200000, AVS(0x400012) },
{ 0, { 0 } }
};
static struct acpu_level acpu_freq_tbl_fast[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 850000 },
- { 0, { 432000, HFPLL, 2, 0, 0x20 }, L2(6), 875000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(6), 875000 },
- { 0, { 540000, HFPLL, 2, 0, 0x28 }, L2(6), 900000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(6), 900000 },
- { 0, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 925000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(6), 925000 },
- { 0, { 756000, HFPLL, 1, 0, 0x1C }, L2(6), 975000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(6), 975000 },
- { 0, { 864000, HFPLL, 1, 0, 0x20 }, L2(6), 1000000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(6), 1000000 },
- { 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(6), 1025000 },
- { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(6), 1025000 },
- { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(18), 1075000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(18), 1075000 },
- { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(18), 1100000 },
- { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(18), 1100000 },
- { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(18), 1125000 },
- { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(18), 1125000 },
- { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(18), 1137500 },
- { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(18), 1137500 },
- { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(18), 1150000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 850000, AVS(0x4000FF) },
+ { 0, { 432000, HFPLL, 2, 0x20 }, L2(6), 875000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(6), 875000 },
+ { 0, { 540000, HFPLL, 2, 0x28 }, L2(6), 900000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(6), 900000 },
+ { 0, { 648000, HFPLL, 1, 0x18 }, L2(6), 925000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(6), 925000 },
+ { 0, { 756000, HFPLL, 1, 0x1C }, L2(6), 975000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(6), 975000 },
+ { 0, { 864000, HFPLL, 1, 0x20 }, L2(6), 1000000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(6), 1000000 },
+ { 0, { 972000, HFPLL, 1, 0x24 }, L2(6), 1025000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(6), 1025000 },
+ { 0, { 1080000, HFPLL, 1, 0x28 }, L2(18), 1075000, AVS(0x10001B) },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(18), 1075000, AVS(0x10001B) },
+ { 0, { 1188000, HFPLL, 1, 0x2C }, L2(18), 1100000, AVS(0x10001B) },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(18), 1100000, AVS(0x10001B) },
+ { 0, { 1296000, HFPLL, 1, 0x30 }, L2(18), 1125000, AVS(0x10001B) },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(18), 1125000, AVS(0x400012) },
+ { 0, { 1404000, HFPLL, 1, 0x34 }, L2(18), 1137500, AVS(0x400012) },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(18), 1137500, AVS(0x400012) },
+ { 1, { 1512000, HFPLL, 1, 0x38 }, L2(18), 1150000, AVS(0x400012) },
{ 0, { 0 } }
};
-static struct pvs_table pvs_tables[NUM_PVS] __initdata = {
-[PVS_SLOW] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
-[PVS_NOMINAL] = { acpu_freq_tbl_nom, sizeof(acpu_freq_tbl_nom), 25000 },
-[PVS_FAST] = { acpu_freq_tbl_fast, sizeof(acpu_freq_tbl_fast), 25000 },
+static struct pvs_table pvs_tables[NUM_SPEED_BINS][NUM_PVS] __initdata = {
+[0][PVS_SLOW] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
+[0][PVS_NOMINAL] = { acpu_freq_tbl_nom, sizeof(acpu_freq_tbl_nom), 25000 },
+[0][PVS_FAST] = { acpu_freq_tbl_fast, sizeof(acpu_freq_tbl_fast), 25000 },
};
static struct acpuclk_krait_params acpuclk_8960_params __initdata = {
@@ -204,7 +209,7 @@
.l2_freq_tbl = l2_freq_tbl,
.l2_freq_tbl_size = sizeof(l2_freq_tbl),
.bus_scale = &bus_scale_data,
- .qfprom_phys_base = 0x00700000,
+ .pte_efuse_phys = 0x007000C0,
.stby_khz = 384000,
};
diff --git a/arch/arm/mach-msm/acpuclock-8960ab.c b/arch/arm/mach-msm/acpuclock-8960ab.c
index 63bff55..ae1cd7b 100644
--- a/arch/arm/mach-msm/acpuclock-8960ab.c
+++ b/arch/arm/mach-msm/acpuclock-8960ab.c
@@ -44,6 +44,7 @@
.hfpll_phys_base = 0x00903200,
.aux_clk_sel_phys = 0x02088014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x4501,
.vreg[VREG_CORE] = { "krait0", 1300000 },
.vreg[VREG_MEM] = { "krait0_mem", 1150000 },
@@ -55,6 +56,7 @@
.hfpll_phys_base = 0x00903300,
.aux_clk_sel_phys = 0x02098014,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x5501,
.vreg[VREG_CORE] = { "krait1", 1300000 },
.vreg[VREG_MEM] = { "krait1_mem", 1150000 },
@@ -66,6 +68,7 @@
.hfpll_phys_base = 0x00903400,
.aux_clk_sel_phys = 0x02011028,
.aux_clk_sel = 3,
+ .sec_clk_sel = 2,
.l2cpmr_iaddr = 0x0500,
.vreg[VREG_HFPLL_A] = { "l2_s8", 2050000 },
.vreg[VREG_HFPLL_B] = { "l2_l23", 1800000 },
@@ -89,53 +92,53 @@
};
static struct l2_level l2_freq_tbl[] __initdata = {
- [0] = { { 384000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 1 },
- [1] = { { 486000, HFPLL, 2, 0, 0x24 }, 1050000, 1050000, 2 },
- [2] = { { 594000, HFPLL, 1, 0, 0x16 }, 1050000, 1050000, 2 },
- [3] = { { 702000, HFPLL, 1, 0, 0x1A }, 1050000, 1050000, 4 },
- [4] = { { 810000, HFPLL, 1, 0, 0x1E }, 1050000, 1050000, 4 },
- [5] = { { 918000, HFPLL, 1, 0, 0x22 }, 1150000, 1150000, 5 },
- [6] = { { 1026000, HFPLL, 1, 0, 0x26 }, 1150000, 1150000, 5 },
- [7] = { { 1134000, HFPLL, 1, 0, 0x2A }, 1150000, 1150000, 5 },
- [8] = { { 1242000, HFPLL, 1, 0, 0x2E }, 1150000, 1150000, 5 },
- [9] = { { 1350000, HFPLL, 1, 0, 0x32 }, 1150000, 1150000, 5 },
+ [0] = { { 384000, PLL_8, 0, 0x00 }, 1050000, 1050000, 1 },
+ [1] = { { 486000, HFPLL, 2, 0x24 }, 1050000, 1050000, 2 },
+ [2] = { { 594000, HFPLL, 1, 0x16 }, 1050000, 1050000, 2 },
+ [3] = { { 702000, HFPLL, 1, 0x1A }, 1050000, 1050000, 4 },
+ [4] = { { 810000, HFPLL, 1, 0x1E }, 1050000, 1050000, 4 },
+ [5] = { { 918000, HFPLL, 1, 0x22 }, 1150000, 1150000, 5 },
+ [6] = { { 1026000, HFPLL, 1, 0x26 }, 1150000, 1150000, 5 },
+ [7] = { { 1134000, HFPLL, 1, 0x2A }, 1150000, 1150000, 5 },
+ [8] = { { 1242000, HFPLL, 1, 0x2E }, 1150000, 1150000, 5 },
+ [9] = { { 1350000, HFPLL, 1, 0x32 }, 1150000, 1150000, 5 },
{ }
};
static struct acpu_level acpu_freq_tbl_slow[] __initdata = {
- { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(0), 950000 },
- { 0, { 432000, HFPLL, 2, 0, 0x20 }, L2(3), 975000 },
- { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(3), 975000 },
- { 0, { 540000, HFPLL, 2, 0, 0x28 }, L2(3), 1000000 },
- { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(3), 1000000 },
- { 0, { 648000, HFPLL, 1, 0, 0x18 }, L2(3), 1025000 },
- { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(3), 1025000 },
- { 0, { 756000, HFPLL, 1, 0, 0x1C }, L2(3), 1075000 },
- { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(3), 1075000 },
- { 0, { 864000, HFPLL, 1, 0, 0x20 }, L2(3), 1100000 },
- { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(3), 1100000 },
- { 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(3), 1125000 },
- { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(3), 1125000 },
- { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(9), 1175000 },
- { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(9), 1175000 },
- { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(9), 1200000 },
- { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(9), 1200000 },
- { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(9), 1225000 },
- { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(9), 1225000 },
- { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(9), 1237500 },
- { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(9), 1237500 },
- { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(9), 1250000 },
- { 1, { 1566000, HFPLL, 1, 0, 0x3A }, L2(9), 1250000 },
- { 1, { 1620000, HFPLL, 1, 0, 0x3C }, L2(9), 1250000 },
- { 1, { 1674000, HFPLL, 1, 0, 0x3E }, L2(9), 1250000 },
- { 1, { 1728000, HFPLL, 1, 0, 0x40 }, L2(9), 1250000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 950000 },
+ { 0, { 432000, HFPLL, 2, 0x20 }, L2(3), 975000 },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 975000 },
+ { 0, { 540000, HFPLL, 2, 0x28 }, L2(3), 1000000 },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 1000000 },
+ { 0, { 648000, HFPLL, 1, 0x18 }, L2(3), 1025000 },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 1025000 },
+ { 0, { 756000, HFPLL, 1, 0x1C }, L2(3), 1075000 },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 1075000 },
+ { 0, { 864000, HFPLL, 1, 0x20 }, L2(3), 1100000 },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 1100000 },
+ { 0, { 972000, HFPLL, 1, 0x24 }, L2(3), 1125000 },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1125000 },
+ { 0, { 1080000, HFPLL, 1, 0x28 }, L2(9), 1175000 },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1175000 },
+ { 0, { 1188000, HFPLL, 1, 0x2C }, L2(9), 1200000 },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1200000 },
+ { 0, { 1296000, HFPLL, 1, 0x30 }, L2(9), 1225000 },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1225000 },
+ { 0, { 1404000, HFPLL, 1, 0x34 }, L2(9), 1237500 },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1237500 },
+ { 1, { 1512000, HFPLL, 1, 0x38 }, L2(9), 1250000 },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1250000 },
+ { 1, { 1620000, HFPLL, 1, 0x3C }, L2(9), 1250000 },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1250000 },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1250000 },
{ 0, { 0 } }
};
-static struct pvs_table pvs_tables[NUM_PVS] __initdata = {
-[PVS_SLOW] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
-[PVS_NOMINAL] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
-[PVS_FAST] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
+static struct pvs_table pvs_tables[NUM_SPEED_BINS][NUM_PVS] __initdata = {
+[0][PVS_SLOW] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
+[0][PVS_NOMINAL] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
+[0][PVS_FAST] = { acpu_freq_tbl_slow, sizeof(acpu_freq_tbl_slow), 0 },
};
static struct acpuclk_krait_params acpuclk_8960ab_params __initdata = {
@@ -146,7 +149,7 @@
.l2_freq_tbl = l2_freq_tbl,
.l2_freq_tbl_size = sizeof(l2_freq_tbl),
.bus_scale = &bus_scale_data,
- .qfprom_phys_base = 0x00700000,
+ .pte_efuse_phys = 0x007000C0,
.stby_khz = 384000,
};
diff --git a/arch/arm/mach-msm/acpuclock-8974.c b/arch/arm/mach-msm/acpuclock-8974.c
index 16f77ba..098f854 100644
--- a/arch/arm/mach-msm/acpuclock-8974.c
+++ b/arch/arm/mach-msm/acpuclock-8974.c
@@ -36,8 +36,8 @@
.has_user_reg = true,
.user_offset = 0x10,
.config_offset = 0x14,
- /* TODO: Verify magic numbers when final values are available. */
.user_val = 0x8,
+ .user_vco_mask = BIT(20),
.config_val = 0x04D0405D,
.low_vco_l_max = 65,
.low_vdd_l_max = 52,
@@ -52,6 +52,7 @@
[CPU0] = {
.hfpll_phys_base = 0xF908A000,
.l2cpmr_iaddr = 0x4501,
+ .sec_clk_sel = 2,
.vreg[VREG_CORE] = { "krait0", 1050000 },
.vreg[VREG_MEM] = { "krait0_mem", 1050000 },
.vreg[VREG_DIG] = { "krait0_dig", LVL_HIGH },
@@ -61,6 +62,7 @@
[CPU1] = {
.hfpll_phys_base = 0xF909A000,
.l2cpmr_iaddr = 0x5501,
+ .sec_clk_sel = 2,
.vreg[VREG_CORE] = { "krait1", 1050000 },
.vreg[VREG_MEM] = { "krait1_mem", 1050000 },
.vreg[VREG_DIG] = { "krait1_dig", LVL_HIGH },
@@ -70,6 +72,7 @@
[CPU2] = {
.hfpll_phys_base = 0xF90AA000,
.l2cpmr_iaddr = 0x6501,
+ .sec_clk_sel = 2,
.vreg[VREG_CORE] = { "krait2", 1050000 },
.vreg[VREG_MEM] = { "krait2_mem", 1050000 },
.vreg[VREG_DIG] = { "krait2_dig", LVL_HIGH },
@@ -79,6 +82,7 @@
[CPU3] = {
.hfpll_phys_base = 0xF90BA000,
.l2cpmr_iaddr = 0x7501,
+ .sec_clk_sel = 2,
.vreg[VREG_CORE] = { "krait3", 1050000 },
.vreg[VREG_MEM] = { "krait3_mem", 1050000 },
.vreg[VREG_DIG] = { "krait3_dig", LVL_HIGH },
@@ -88,6 +92,7 @@
[L2] = {
.hfpll_phys_base = 0xF9016000,
.l2cpmr_iaddr = 0x0500,
+ .sec_clk_sel = 2,
.vreg[VREG_HFPLL_A] = { "l2_hfpll_a", 2150000 },
.vreg[VREG_HFPLL_B] = { "l2_hfpll_b", 1800000 },
},
@@ -108,67 +113,67 @@
};
static struct l2_level l2_freq_tbl[] __initdata = {
- [0] = { { 300000, PLL_0, 0, 2, 0 }, LVL_LOW, 950000, 0 },
- [1] = { { 384000, HFPLL, 2, 0, 40 }, LVL_NOM, 950000, 1 },
- [2] = { { 460800, HFPLL, 2, 0, 48 }, LVL_NOM, 950000, 1 },
- [3] = { { 537600, HFPLL, 1, 0, 28 }, LVL_NOM, 950000, 2 },
- [4] = { { 576000, HFPLL, 1, 0, 30 }, LVL_NOM, 950000, 2 },
- [5] = { { 652800, HFPLL, 1, 0, 34 }, LVL_NOM, 950000, 2 },
- [6] = { { 729600, HFPLL, 1, 0, 38 }, LVL_NOM, 950000, 2 },
- [7] = { { 806400, HFPLL, 1, 0, 42 }, LVL_NOM, 950000, 2 },
- [8] = { { 883200, HFPLL, 1, 0, 46 }, LVL_HIGH, 1050000, 2 },
- [9] = { { 960000, HFPLL, 1, 0, 50 }, LVL_HIGH, 1050000, 2 },
- [10] = { { 1036800, HFPLL, 1, 0, 54 }, LVL_HIGH, 1050000, 3 },
- [11] = { { 1113600, HFPLL, 1, 0, 58 }, LVL_HIGH, 1050000, 3 },
- [12] = { { 1190400, HFPLL, 1, 0, 62 }, LVL_HIGH, 1050000, 3 },
- [13] = { { 1267200, HFPLL, 1, 0, 66 }, LVL_HIGH, 1050000, 3 },
- [14] = { { 1344000, HFPLL, 1, 0, 70 }, LVL_HIGH, 1050000, 3 },
- [15] = { { 1420800, HFPLL, 1, 0, 74 }, LVL_HIGH, 1050000, 3 },
- [16] = { { 1497600, HFPLL, 1, 0, 78 }, LVL_HIGH, 1050000, 3 },
- [17] = { { 1574400, HFPLL, 1, 0, 82 }, LVL_HIGH, 1050000, 3 },
- [18] = { { 1651200, HFPLL, 1, 0, 86 }, LVL_HIGH, 1050000, 3 },
- [19] = { { 1728000, HFPLL, 1, 0, 90 }, LVL_HIGH, 1050000, 3 },
- [20] = { { 1804800, HFPLL, 1, 0, 94 }, LVL_HIGH, 1050000, 3 },
- [21] = { { 1881600, HFPLL, 1, 0, 98 }, LVL_HIGH, 1050000, 3 },
- [22] = { { 1958400, HFPLL, 1, 0, 102 }, LVL_HIGH, 1050000, 3 },
- [23] = { { 2035200, HFPLL, 1, 0, 106 }, LVL_HIGH, 1050000, 3 },
- [24] = { { 2112000, HFPLL, 1, 0, 110 }, LVL_HIGH, 1050000, 3 },
- [25] = { { 2188800, HFPLL, 1, 0, 114 }, LVL_HIGH, 1050000, 3 },
+ [0] = { { 300000, PLL_0, 0, 0 }, LVL_LOW, 950000, 0 },
+ [1] = { { 384000, HFPLL, 2, 40 }, LVL_NOM, 950000, 1 },
+ [2] = { { 460800, HFPLL, 2, 48 }, LVL_NOM, 950000, 1 },
+ [3] = { { 537600, HFPLL, 1, 28 }, LVL_NOM, 950000, 2 },
+ [4] = { { 576000, HFPLL, 1, 30 }, LVL_NOM, 950000, 2 },
+ [5] = { { 652800, HFPLL, 1, 34 }, LVL_NOM, 950000, 2 },
+ [6] = { { 729600, HFPLL, 1, 38 }, LVL_NOM, 950000, 2 },
+ [7] = { { 806400, HFPLL, 1, 42 }, LVL_NOM, 950000, 2 },
+ [8] = { { 883200, HFPLL, 1, 46 }, LVL_HIGH, 1050000, 2 },
+ [9] = { { 960000, HFPLL, 1, 50 }, LVL_HIGH, 1050000, 2 },
+ [10] = { { 1036800, HFPLL, 1, 54 }, LVL_HIGH, 1050000, 3 },
+ [11] = { { 1113600, HFPLL, 1, 58 }, LVL_HIGH, 1050000, 3 },
+ [12] = { { 1190400, HFPLL, 1, 62 }, LVL_HIGH, 1050000, 3 },
+ [13] = { { 1267200, HFPLL, 1, 66 }, LVL_HIGH, 1050000, 3 },
+ [14] = { { 1344000, HFPLL, 1, 70 }, LVL_HIGH, 1050000, 3 },
+ [15] = { { 1420800, HFPLL, 1, 74 }, LVL_HIGH, 1050000, 3 },
+ [16] = { { 1497600, HFPLL, 1, 78 }, LVL_HIGH, 1050000, 3 },
+ [17] = { { 1574400, HFPLL, 1, 82 }, LVL_HIGH, 1050000, 3 },
+ [18] = { { 1651200, HFPLL, 1, 86 }, LVL_HIGH, 1050000, 3 },
+ [19] = { { 1728000, HFPLL, 1, 90 }, LVL_HIGH, 1050000, 3 },
+ [20] = { { 1804800, HFPLL, 1, 94 }, LVL_HIGH, 1050000, 3 },
+ [21] = { { 1881600, HFPLL, 1, 98 }, LVL_HIGH, 1050000, 3 },
+ [22] = { { 1958400, HFPLL, 1, 102 }, LVL_HIGH, 1050000, 3 },
+ [23] = { { 2035200, HFPLL, 1, 106 }, LVL_HIGH, 1050000, 3 },
+ [24] = { { 2112000, HFPLL, 1, 110 }, LVL_HIGH, 1050000, 3 },
+ [25] = { { 2188800, HFPLL, 1, 114 }, LVL_HIGH, 1050000, 3 },
{ }
};
static struct acpu_level acpu_freq_tbl[] __initdata = {
- { 1, { 300000, PLL_0, 0, 2, 0 }, L2(0), 950000, 3200000 },
- { 1, { 384000, HFPLL, 2, 0, 40 }, L2(3), 950000, 3200000 },
- { 1, { 460800, HFPLL, 2, 0, 48 }, L2(3), 950000, 3200000 },
- { 1, { 537600, HFPLL, 1, 0, 28 }, L2(5), 950000, 3200000 },
- { 1, { 576000, HFPLL, 1, 0, 30 }, L2(5), 950000, 3200000 },
- { 1, { 652800, HFPLL, 1, 0, 34 }, L2(5), 950000, 3200000 },
- { 1, { 729600, HFPLL, 1, 0, 38 }, L2(5), 950000, 3200000 },
- { 1, { 806400, HFPLL, 1, 0, 42 }, L2(7), 950000, 3200000 },
- { 1, { 883200, HFPLL, 1, 0, 46 }, L2(7), 950000, 3200000 },
- { 1, { 960000, HFPLL, 1, 0, 50 }, L2(7), 950000, 3200000 },
- { 1, { 1036800, HFPLL, 1, 0, 54 }, L2(7), 950000, 3200000 },
- { 1, { 1113600, HFPLL, 1, 0, 58 }, L2(12), 1050000, 3200000 },
- { 1, { 1190400, HFPLL, 1, 0, 62 }, L2(12), 1050000, 3200000 },
- { 1, { 1267200, HFPLL, 1, 0, 66 }, L2(12), 1050000, 3200000 },
- { 1, { 1344000, HFPLL, 1, 0, 70 }, L2(15), 1050000, 3200000 },
- { 1, { 1420800, HFPLL, 1, 0, 74 }, L2(15), 1050000, 3200000 },
- { 1, { 1497600, HFPLL, 1, 0, 78 }, L2(16), 1050000, 3200000 },
- { 0, { 1574400, HFPLL, 1, 0, 82 }, L2(20), 1050000, 3200000 },
- { 0, { 1651200, HFPLL, 1, 0, 86 }, L2(20), 1050000, 3200000 },
- { 0, { 1728000, HFPLL, 1, 0, 90 }, L2(20), 1050000, 3200000 },
- { 0, { 1804800, HFPLL, 1, 0, 94 }, L2(25), 1050000, 3200000 },
- { 0, { 1881600, HFPLL, 1, 0, 98 }, L2(25), 1050000, 3200000 },
- { 0, { 1958400, HFPLL, 1, 0, 102 }, L2(25), 1050000, 3200000 },
- { 0, { 1996800, HFPLL, 1, 0, 104 }, L2(25), 1050000, 3200000 },
+ { 1, { 300000, PLL_0, 0, 0 }, L2(0), 950000, 3200000 },
+ { 1, { 384000, HFPLL, 2, 40 }, L2(3), 950000, 3200000 },
+ { 1, { 460800, HFPLL, 2, 48 }, L2(3), 950000, 3200000 },
+ { 1, { 537600, HFPLL, 1, 28 }, L2(5), 950000, 3200000 },
+ { 1, { 576000, HFPLL, 1, 30 }, L2(5), 950000, 3200000 },
+ { 1, { 652800, HFPLL, 1, 34 }, L2(5), 950000, 3200000 },
+ { 1, { 729600, HFPLL, 1, 38 }, L2(5), 950000, 3200000 },
+ { 1, { 806400, HFPLL, 1, 42 }, L2(7), 950000, 3200000 },
+ { 1, { 883200, HFPLL, 1, 46 }, L2(7), 950000, 3200000 },
+ { 1, { 960000, HFPLL, 1, 50 }, L2(7), 950000, 3200000 },
+ { 1, { 1036800, HFPLL, 1, 54 }, L2(7), 950000, 3200000 },
+ { 1, { 1113600, HFPLL, 1, 58 }, L2(12), 1050000, 3200000 },
+ { 1, { 1190400, HFPLL, 1, 62 }, L2(12), 1050000, 3200000 },
+ { 1, { 1267200, HFPLL, 1, 66 }, L2(12), 1050000, 3200000 },
+ { 1, { 1344000, HFPLL, 1, 70 }, L2(15), 1050000, 3200000 },
+ { 1, { 1420800, HFPLL, 1, 74 }, L2(15), 1050000, 3200000 },
+ { 1, { 1497600, HFPLL, 1, 78 }, L2(16), 1050000, 3200000 },
+ { 0, { 1574400, HFPLL, 1, 82 }, L2(20), 1050000, 3200000 },
+ { 0, { 1651200, HFPLL, 1, 86 }, L2(20), 1050000, 3200000 },
+ { 0, { 1728000, HFPLL, 1, 90 }, L2(20), 1050000, 3200000 },
+ { 0, { 1804800, HFPLL, 1, 94 }, L2(25), 1050000, 3200000 },
+ { 0, { 1881600, HFPLL, 1, 98 }, L2(25), 1050000, 3200000 },
+ { 0, { 1958400, HFPLL, 1, 102 }, L2(25), 1050000, 3200000 },
+ { 0, { 1996800, HFPLL, 1, 104 }, L2(25), 1050000, 3200000 },
{ 0, { 0 } }
};
-static struct pvs_table pvs_tables[NUM_PVS] __initdata = {
- [PVS_SLOW] = { acpu_freq_tbl, sizeof(acpu_freq_tbl) },
- [PVS_NOMINAL] = { acpu_freq_tbl, sizeof(acpu_freq_tbl) },
- [PVS_FAST] = { acpu_freq_tbl, sizeof(acpu_freq_tbl) },
+static struct pvs_table pvs_tables[NUM_SPEED_BINS][NUM_PVS] __initdata = {
+ [0][PVS_SLOW] = { acpu_freq_tbl, sizeof(acpu_freq_tbl) },
+ [0][PVS_NOMINAL] = { acpu_freq_tbl, sizeof(acpu_freq_tbl) },
+ [0][PVS_FAST] = { acpu_freq_tbl, sizeof(acpu_freq_tbl) },
};
static struct acpuclk_krait_params acpuclk_8974_params __initdata = {
@@ -179,7 +184,7 @@
.l2_freq_tbl = l2_freq_tbl,
.l2_freq_tbl_size = sizeof(l2_freq_tbl),
.bus_scale = &bus_scale_data,
- .qfprom_phys_base = 0xFC4A8000,
+ .pte_efuse_phys = 0xFC4B80B0,
.stby_khz = 300000,
};
diff --git a/arch/arm/mach-msm/acpuclock-krait.c b/arch/arm/mach-msm/acpuclock-krait.c
index 9afa7c0..57c4411 100644
--- a/arch/arm/mach-msm/acpuclock-krait.c
+++ b/arch/arm/mach-msm/acpuclock-krait.c
@@ -36,16 +36,14 @@
#include "acpuclock.h"
#include "acpuclock-krait.h"
+#include "avs.h"
/* MUX source selects. */
#define PRI_SRC_SEL_SEC_SRC 0
#define PRI_SRC_SEL_HFPLL 1
#define PRI_SRC_SEL_HFPLL_DIV2 2
-#define SEC_SRC_SEL_L2PLL 1
-#define SEC_SRC_SEL_AUX 2
-/* PTE EFUSE register offset. */
-#define PTE_EFUSE 0xC0
+#define SECCLKAGD BIT(4)
static DEFINE_MUTEX(driver_lock);
static DEFINE_SPINLOCK(l2_lock);
@@ -81,14 +79,24 @@
}
/* Select a source on the secondary MUX. */
-static void set_sec_clk_src(struct scalable *sc, u32 sec_src_sel)
+static void __cpuinit set_sec_clk_src(struct scalable *sc, u32 sec_src_sel)
{
u32 regval;
+ /* 8064 Errata: disable sec_src clock gating during switch. */
regval = get_l2_indirect_reg(sc->l2cpmr_iaddr);
+ regval |= SECCLKAGD;
+ set_l2_indirect_reg(sc->l2cpmr_iaddr, regval);
+
+ /* Program the MUX */
regval &= ~(0x3 << 2);
regval |= ((sec_src_sel & 0x3) << 2);
set_l2_indirect_reg(sc->l2cpmr_iaddr, regval);
+
+ /* 8064 Errata: re-enabled sec_src clock gating. */
+ regval &= ~SECCLKAGD;
+ set_l2_indirect_reg(sc->l2cpmr_iaddr, regval);
+
/* Wait for switch to complete. */
mb();
udelay(1);
@@ -222,7 +230,6 @@
* Move to an always-on source running at a frequency
* that does not require an elevated CPU voltage.
*/
- set_sec_clk_src(sc, SEC_SRC_SEL_AUX);
set_pri_clk_src(sc, PRI_SRC_SEL_SEC_SRC);
/* Re-program HFPLL. */
@@ -233,15 +240,12 @@
/* Move to HFPLL. */
set_pri_clk_src(sc, tgt_s->pri_src_sel);
} else if (strt_s->src == HFPLL && tgt_s->src != HFPLL) {
- set_sec_clk_src(sc, tgt_s->sec_src_sel);
set_pri_clk_src(sc, tgt_s->pri_src_sel);
hfpll_disable(sc, false);
} else if (strt_s->src != HFPLL && tgt_s->src == HFPLL) {
hfpll_set_rate(sc, tgt_s);
hfpll_enable(sc, false);
set_pri_clk_src(sc, tgt_s->pri_src_sel);
- } else {
- set_sec_clk_src(sc, tgt_s->sec_src_sel);
}
sc->cur_speed = tgt_s;
@@ -472,6 +476,12 @@
vdd_data.vdd_core = calculate_vdd_core(tgt);
vdd_data.ua_core = tgt->ua_core;
+ /* Disable AVS before voltage switch */
+ if (reason == SETRATE_CPUFREQ && drv.scalable[cpu].avs_enabled) {
+ AVS_DISABLE(cpu);
+ drv.scalable[cpu].avs_enabled = false;
+ }
+
/* Increase VDD levels if needed. */
if (reason == SETRATE_CPUFREQ || reason == SETRATE_HOTPLUG) {
rc = increase_vdd(cpu, &vdd_data, reason);
@@ -507,6 +517,12 @@
/* Drop VDD levels if we can. */
decrease_vdd(cpu, &vdd_data, reason);
+ /* Re-enable AVS */
+ if (reason == SETRATE_CPUFREQ && tgt->avsdscr_setting) {
+ AVS_ENABLE(cpu, tgt->avsdscr_setting);
+ drv.scalable[cpu].avs_enabled = true;
+ }
+
dev_dbg(drv.dev, "ACPU%d speed change complete\n", cpu);
out:
@@ -699,7 +715,7 @@
}
/* Switch away from the HFPLL while it's re-initialized. */
- set_sec_clk_src(sc, SEC_SRC_SEL_AUX);
+ set_sec_clk_src(sc, sc->sec_clk_sel);
set_pri_clk_src(sc, PRI_SRC_SEL_SEC_SRC);
hfpll_init(sc, tgt_s);
@@ -709,7 +725,6 @@
set_l2_indirect_reg(sc->l2cpmr_iaddr, regval);
/* Switch to the target clock source. */
- set_sec_clk_src(sc, tgt_s->sec_src_sel);
set_pri_clk_src(sc, tgt_s->pri_src_sel);
sc->cur_speed = tgt_s;
@@ -720,7 +735,6 @@
struct scalable *sc)
{
s->pri_src_sel = get_l2_indirect_reg(sc->l2cpmr_iaddr) & 0x3;
- s->sec_src_sel = (get_l2_indirect_reg(sc->l2cpmr_iaddr) >> 2) & 0x3;
s->pll_l_val = readl_relaxed(sc->hfpll_base + drv.hfpll_data->l_offset);
}
@@ -728,7 +742,6 @@
const struct core_speed *s2)
{
return (s1->pri_src_sel == s2->pri_src_sel &&
- s1->sec_src_sel == s2->sec_src_sel &&
s1->pll_l_val == s2->pll_l_val);
}
@@ -926,63 +939,75 @@
static void krait_apply_vmin(struct acpu_level *tbl)
{
- for (; tbl->speed.khz != 0; tbl++)
+ for (; tbl->speed.khz != 0; tbl++) {
if (tbl->vdd_core < 1150000)
tbl->vdd_core = 1150000;
+ tbl->avsdscr_setting = 0;
+ }
}
-static int __init select_freq_plan(u32 qfprom_phys)
+static int __init get_speed_bin(u32 pte_efuse)
{
- void __iomem *qfprom_base;
- u32 pte_efuse, pvs, tbl_idx;
- char *pvs_names[] = { "Slow", "Nominal", "Fast", "Faster", "Unknown" };
+ uint32_t speed_bin;
- qfprom_base = ioremap(qfprom_phys, SZ_256);
- /* Select frequency tables. */
- if (qfprom_base) {
- pte_efuse = readl_relaxed(qfprom_base + PTE_EFUSE);
- pvs = (pte_efuse >> 10) & 0x7;
- iounmap(qfprom_base);
- if (pvs == 0x7)
- pvs = (pte_efuse >> 13) & 0x7;
+ speed_bin = pte_efuse & 0xF;
+ if (speed_bin == 0xF)
+ speed_bin = (pte_efuse >> 4) & 0xF;
- switch (pvs) {
- case 0x0:
- case 0x7:
- tbl_idx = PVS_SLOW;
- break;
- case 0x1:
- tbl_idx = PVS_NOMINAL;
- break;
- case 0x3:
- tbl_idx = PVS_FAST;
- break;
- case 0x4:
- tbl_idx = PVS_FASTER;
- break;
- default:
- tbl_idx = PVS_UNKNOWN;
- break;
- }
+ if (speed_bin == 0xF) {
+ speed_bin = 0;
+ dev_warn(drv.dev, "SPEED BIN: Defaulting to %d\n", speed_bin);
} else {
- tbl_idx = PVS_UNKNOWN;
+ dev_info(drv.dev, "SPEED BIN: %d\n", speed_bin);
+ }
+
+ return speed_bin;
+}
+
+static int __init get_pvs_bin(u32 pte_efuse)
+{
+ uint32_t pvs_bin;
+
+ pvs_bin = (pte_efuse >> 10) & 0x7;
+ if (pvs_bin == 0x7)
+ pvs_bin = (pte_efuse >> 13) & 0x7;
+
+ if (pvs_bin == 0x7) {
+ pvs_bin = 0;
+ dev_warn(drv.dev, "ACPU PVS: Defaulting to %d\n", pvs_bin);
+ } else {
+ dev_info(drv.dev, "ACPU PVS: %d\n", pvs_bin);
+ }
+
+ return pvs_bin;
+}
+
+static struct pvs_table * __init select_freq_plan(u32 pte_efuse_phys,
+ struct pvs_table (*pvs_tables)[NUM_PVS])
+{
+ void __iomem *pte_efuse;
+ u32 pte_efuse_val, tbl_idx, bin_idx;
+
+ pte_efuse = ioremap(pte_efuse_phys, 4);
+ if (!pte_efuse) {
dev_err(drv.dev, "Unable to map QFPROM base\n");
- }
- if (tbl_idx == PVS_UNKNOWN) {
- tbl_idx = PVS_SLOW;
- dev_warn(drv.dev, "ACPU PVS: Defaulting to %s\n",
- pvs_names[tbl_idx]);
- } else {
- dev_info(drv.dev, "ACPU PVS: %s\n", pvs_names[tbl_idx]);
+ return NULL;
}
- return tbl_idx;
+ pte_efuse_val = readl_relaxed(pte_efuse);
+ iounmap(pte_efuse);
+
+ /* Select frequency tables. */
+ bin_idx = get_speed_bin(pte_efuse_val);
+ tbl_idx = get_pvs_bin(pte_efuse_val);
+
+ return &pvs_tables[bin_idx][tbl_idx];
}
static void __init drv_data_init(struct device *dev,
const struct acpuclk_krait_params *params)
{
- int tbl_idx;
+ struct pvs_table *pvs;
drv.dev = dev;
drv.scalable = kmemdup(params->scalable, params->scalable_size,
@@ -1005,12 +1030,12 @@
GFP_KERNEL);
BUG_ON(!drv.bus_scale->usecase);
- tbl_idx = select_freq_plan(params->qfprom_phys_base);
- drv.acpu_freq_tbl = kmemdup(params->pvs_tables[tbl_idx].table,
- params->pvs_tables[tbl_idx].size,
- GFP_KERNEL);
+ pvs = select_freq_plan(params->pte_efuse_phys, params->pvs_tables);
+ BUG_ON(!pvs->table);
+
+ drv.acpu_freq_tbl = kmemdup(pvs->table, pvs->size, GFP_KERNEL);
BUG_ON(!drv.acpu_freq_tbl);
- drv.boost_uv = params->pvs_tables[tbl_idx].boost_uv;
+ drv.boost_uv = pvs->boost_uv;
acpuclk_krait_data.power_collapse_khz = params->stby_khz;
acpuclk_krait_data.wait_for_irq_khz = params->stby_khz;
diff --git a/arch/arm/mach-msm/acpuclock-krait.h b/arch/arm/mach-msm/acpuclock-krait.h
index 1b891b1..3fa10e3 100644
--- a/arch/arm/mach-msm/acpuclock-krait.h
+++ b/arch/arm/mach-msm/acpuclock-krait.h
@@ -46,14 +46,18 @@
*/
enum pvs {
PVS_SLOW = 0,
- PVS_NOMINAL,
- PVS_FAST,
- PVS_FASTER,
- PVS_UNKNOWN,
- NUM_PVS
+ PVS_NOMINAL = 1,
+ PVS_FAST = 3,
+ PVS_FASTER = 4,
+ NUM_PVS = 7
};
/**
+ * The maximum number of speed bins.
+ */
+#define NUM_SPEED_BINS (16)
+
+/**
* enum scalables - IDs of frequency scalable hardware blocks.
*/
enum scalables {
@@ -111,14 +115,12 @@
* @khz: Clock rate in KHz.
* @src: Clock source ID.
* @pri_src_sel: Input to select on the primary MUX.
- * @sec_src_sel: Input to select on the secondary MUX.
* @pll_l_val: HFPLL "L" value to be applied when an HFPLL source is selected.
*/
struct core_speed {
unsigned long khz;
int src;
u32 pri_src_sel;
- u32 sec_src_sel;
u32 pll_l_val;
};
@@ -143,6 +145,7 @@
* @l2_level: L2 configuration to use.
* @vdd_core: CPU core voltage in uV.
* @ua_core: CPU core current consumption in uA.
+ * @avsdscr_setting: AVS DSCR configuration.
*/
struct acpu_level {
const int use_for_scaling;
@@ -150,6 +153,7 @@
const unsigned int l2_level;
int vdd_core;
int ua_core;
+ unsigned int avsdscr_setting;
};
/**
@@ -186,8 +190,8 @@
const bool has_droop_ctl;
const u32 droop_offset;
const u32 droop_val;
- const u32 low_vdd_l_max;
- const u32 nom_vdd_l_max;
+ u32 low_vdd_l_max;
+ u32 nom_vdd_l_max;
const u32 low_vco_l_max;
const int vdd[NUM_HFPLL_VDD];
};
@@ -198,22 +202,26 @@
* @hfpll_base: Virtual base address of HFPLL registers.
* @aux_clk_sel_phys: Physical address of auxiliary MUX.
* @aux_clk_sel: Auxiliary mux input to select at boot.
+ * @sec_clk_sel: Secondary mux input to select at boot.
* @l2cpmr_iaddr: Indirect address of the CPMR MUX/divider CP15 register.
* @cur_speed: Pointer to currently-set speed.
* @l2_vote: L2 performance level vote associate with the current CPU speed.
* @vreg: Array of voltage regulators needed by the scalable.
* @initialized: Flag set to true when per_cpu_init() has been called.
+ * @avs_enabled: True if avs is enabled for the scalabale. False otherwise.
*/
struct scalable {
const phys_addr_t hfpll_phys_base;
void __iomem *hfpll_base;
const phys_addr_t aux_clk_sel_phys;
const u32 aux_clk_sel;
+ const u32 sec_clk_sel;
const u32 l2cpmr_iaddr;
const struct core_speed *cur_speed;
unsigned int l2_vote;
struct vreg vreg[NUM_VREG];
bool initialized;
+ bool avs_enabled;
};
/**
@@ -233,10 +241,10 @@
* @scalable: Array of scalables.
* @scalable_size: Size of @scalable.
* @hfpll_data: HFPLL configuration data.
- * @pvs_tables: CPU frequency tables.
+ * @pvs_tables: 2D array of CPU frequency tables.
* @l2_freq_tbl: L2 frequency table.
* @l2_freq_tbl_size: Size of @l2_freq_tbl.
- * @qfprom_phys_base: Physical base address of QFPROM.
+ * @pte_efuse_phys: Physical address of PTE EFUSE.
* @bus_scale: MSM bus driver parameters.
* @stby_khz: KHz value corresponding to an always-on clock source.
*/
@@ -244,10 +252,10 @@
struct scalable *scalable;
size_t scalable_size;
struct hfpll_data *hfpll_data;
- struct pvs_table *pvs_tables;
+ struct pvs_table (*pvs_tables)[NUM_PVS];
struct l2_level *l2_freq_tbl;
size_t l2_freq_tbl_size;
- phys_addr_t qfprom_phys_base;
+ phys_addr_t pte_efuse_phys;
struct msm_bus_scale_pdata *bus_scale;
unsigned long stby_khz;
};
diff --git a/arch/arm/mach-msm/adsp-8974.c b/arch/arm/mach-msm/adsp-8974.c
index 050a24b..fa7d9d4 100644
--- a/arch/arm/mach-msm/adsp-8974.c
+++ b/arch/arm/mach-msm/adsp-8974.c
@@ -119,12 +119,17 @@
wmb();
}
+static void restart_adsp(void)
+{
+ adsp_log_failure_reason();
+ subsystem_restart("adsp");
+}
+
static void adsp_fatal_fn(struct work_struct *work)
{
pr_err("%s %s: Watchdog bite received from Q6!\n", MODULE_NAME,
__func__);
- adsp_log_failure_reason();
- panic(MODULE_NAME ": Resetting the SoC");
+ restart_adsp();
}
static void adsp_smsm_state_cb(void *data, uint32_t old_state,
@@ -137,8 +142,7 @@
if (new_state & SMSM_RESET) {
pr_debug("%s: ADSP SMSM state changed to SMSM_RESET, new_state= 0x%x, old_state = 0x%x\n",
__func__, new_state, old_state);
- adsp_log_failure_reason();
- panic(MODULE_NAME ": Resetting the SoC");
+ restart_adsp();
}
}
@@ -156,7 +160,7 @@
/* The write needs to go through before the q6 is shutdown. */
mb();
- pil_force_shutdown("q6");
+ pil_force_shutdown("adsp");
disable_irq_nosync(ADSP_Q6SS_WDOG_EXPIRED);
return 0;
@@ -171,7 +175,7 @@
msleep(10000);
}
- ret = pil_force_boot("q6");
+ ret = pil_force_boot("adsp");
enable_irq(ADSP_Q6SS_WDOG_EXPIRED);
return ret;
}
diff --git a/arch/arm/mach-msm/bam_dmux.c b/arch/arm/mach-msm/bam_dmux.c
index 1a02fce..7ba22f4 100644
--- a/arch/arm/mach-msm/bam_dmux.c
+++ b/arch/arm/mach-msm/bam_dmux.c
@@ -171,7 +171,6 @@
#define A2_NUM_PIPES 6
#define A2_SUMMING_THRESHOLD 4096
-#define A2_DEFAULT_DESCRIPTORS 32
#define A2_PHYS_BASE 0x124C2000
#define A2_PHYS_SIZE 0x2000
#define BUFFER_SIZE 2048
@@ -223,6 +222,7 @@
static void rx_timer_work_func(struct work_struct *work);
static DECLARE_WORK(rx_timer_work, rx_timer_work_func);
+static struct delayed_work queue_rx_work;
static struct workqueue_struct *bam_mux_rx_workqueue;
static struct workqueue_struct *bam_mux_tx_workqueue;
@@ -430,21 +430,27 @@
rx_len_cached = bam_rx_pool_len;
mutex_unlock(&bam_rx_pool_mutexlock);
- while (rx_len_cached < NUM_BUFFERS) {
+ while (bam_connection_is_active && rx_len_cached < NUM_BUFFERS) {
if (in_global_reset)
goto fail;
- info = kmalloc(sizeof(struct rx_pkt_info), GFP_KERNEL);
+ info = kmalloc(sizeof(struct rx_pkt_info),
+ GFP_NOWAIT | __GFP_NOWARN);
if (!info) {
- pr_err("%s: unable to alloc rx_pkt_info\n", __func__);
+ DMUX_LOG_KERR(
+ "%s: unable to alloc rx_pkt_info, will retry later\n",
+ __func__);
goto fail;
}
INIT_WORK(&info->work, handle_bam_mux_cmd);
- info->skb = __dev_alloc_skb(BUFFER_SIZE, GFP_KERNEL);
+ info->skb = __dev_alloc_skb(BUFFER_SIZE,
+ GFP_NOWAIT | __GFP_NOWARN);
if (info->skb == NULL) {
- DMUX_LOG_KERR("%s: unable to alloc skb\n", __func__);
+ DMUX_LOG_KERR(
+ "%s: unable to alloc skb, will retry later\n",
+ __func__);
goto fail_info;
}
ptr = skb_put(info->skb, BUFFER_SIZE);
@@ -488,11 +494,16 @@
fail:
if (rx_len_cached == 0) {
- DMUX_LOG_KERR("%s: RX queue failure\n", __func__);
- in_global_reset = 1;
+ DMUX_LOG_KERR("%s: rescheduling\n", __func__);
+ schedule_delayed_work(&queue_rx_work, msecs_to_jiffies(100));
}
}
+static void queue_rx_work_func(struct work_struct *work)
+{
+ queue_rx();
+}
+
static void bam_mux_process_data(struct sk_buff *rx_skb)
{
unsigned long flags;
@@ -1809,6 +1820,10 @@
in_global_reset = 0;
vote_dfab();
if (!power_management_only_mode) {
+ sps_disconnect(bam_tx_pipe);
+ sps_disconnect(bam_rx_pipe);
+ __memzero(rx_desc_mem_buf.base, rx_desc_mem_buf.size);
+ __memzero(tx_desc_mem_buf.base, tx_desc_mem_buf.size);
i = sps_device_reset(a2_device_handle);
if (i)
pr_err("%s: device reset failed rc = %d\n", __func__,
@@ -1861,12 +1876,6 @@
/* tear down BAM connection */
INIT_COMPLETION(bam_connection_completion);
- if (!power_management_only_mode) {
- sps_disconnect(bam_tx_pipe);
- sps_disconnect(bam_rx_pipe);
- __memzero(rx_desc_mem_buf.base, rx_desc_mem_buf.size);
- __memzero(tx_desc_mem_buf.base, tx_desc_mem_buf.size);
- }
unvote_dfab();
mutex_lock(&bam_rx_pool_mutexlock);
@@ -2424,6 +2433,7 @@
init_completion(&bam_connection_completion);
init_completion(&dfab_unvote_completion);
INIT_DELAYED_WORK(&ul_timeout_work, ul_timeout);
+ INIT_DELAYED_WORK(&queue_rx_work, queue_rx_work_func);
wake_lock_init(&bam_wakelock, WAKE_LOCK_SUSPEND, "bam_dmux_wakelock");
rc = smsm_state_cb_register(SMSM_MODEM_STATE, SMSM_A2_POWER_CONTROL,
diff --git a/arch/arm/mach-msm/batterydata-lib.c b/arch/arm/mach-msm/batterydata-lib.c
new file mode 100644
index 0000000..2be591c
--- /dev/null
+++ b/arch/arm/mach-msm/batterydata-lib.c
@@ -0,0 +1,338 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define pr_fmt(fmt) "%s: " fmt, __func__
+
+#include <linux/module.h>
+#include <linux/mfd/pm8xxx/batterydata-lib.h>
+
+int linear_interpolate(int y0, int x0, int y1, int x1, int x)
+{
+ if (y0 == y1 || x == x0)
+ return y0;
+ if (x1 == x0 || x == x1)
+ return y1;
+
+ return y0 + ((y1 - y0) * (x - x0) / (x1 - x0));
+}
+
+int is_between(int left, int right, int value)
+{
+ if (left >= right && left >= value && value >= right)
+ return 1;
+ if (left <= right && left <= value && value <= right)
+ return 1;
+ return 0;
+}
+
+static int interpolate_single_lut(struct single_row_lut *lut, int x)
+{
+ int i, result;
+
+ if (x < lut->x[0]) {
+ pr_debug("x %d less than known range return y = %d lut = %pS\n",
+ x, lut->y[0], lut);
+ return lut->y[0];
+ }
+ if (x > lut->x[lut->cols - 1]) {
+ pr_debug("x %d more than known range return y = %d lut = %pS\n",
+ x, lut->y[lut->cols - 1], lut);
+ return lut->y[lut->cols - 1];
+ }
+
+ for (i = 0; i < lut->cols; i++)
+ if (x <= lut->x[i])
+ break;
+ if (x == lut->x[i]) {
+ result = lut->y[i];
+ } else {
+ result = linear_interpolate(
+ lut->y[i - 1],
+ lut->x[i - 1],
+ lut->y[i],
+ lut->x[i],
+ x);
+ }
+ return result;
+}
+
+int interpolate_fcc(struct single_row_lut *fcc_temp_lut, int batt_temp)
+{
+ /* batt_temp is in tenths of degC - convert it to degC for lookups */
+ batt_temp = batt_temp/10;
+ return interpolate_single_lut(fcc_temp_lut, batt_temp);
+}
+
+int interpolate_scalingfactor_fcc(struct single_row_lut *fcc_sf_lut,
+ int cycles)
+{
+ /*
+ * sf table could be null when no battery aging data is available, in
+ * that case return 100%
+ */
+ if (fcc_sf_lut)
+ return interpolate_single_lut(fcc_sf_lut, cycles);
+ else
+ return 100;
+}
+
+int interpolate_scalingfactor(struct sf_lut *sf_lut, int row_entry, int pc)
+{
+ int i, scalefactorrow1, scalefactorrow2, scalefactor, rows, cols;
+ int row1 = 0;
+ int row2 = 0;
+
+ /*
+ * sf table could be null when no battery aging data is available, in
+ * that case return 100%
+ */
+ if (!sf_lut)
+ return 100;
+
+ rows = sf_lut->rows;
+ cols = sf_lut->cols;
+ if (pc > sf_lut->percent[0]) {
+ pr_debug("pc %d greater than known pc ranges for sfd\n", pc);
+ row1 = 0;
+ row2 = 0;
+ }
+ if (pc < sf_lut->percent[rows - 1]) {
+ pr_debug("pc %d less than known pc ranges for sf\n", pc);
+ row1 = rows - 1;
+ row2 = rows - 1;
+ }
+ for (i = 0; i < rows; i++) {
+ if (pc == sf_lut->percent[i]) {
+ row1 = i;
+ row2 = i;
+ break;
+ }
+ if (pc > sf_lut->percent[i]) {
+ row1 = i - 1;
+ row2 = i;
+ break;
+ }
+ }
+
+ if (row_entry < sf_lut->row_entries[0])
+ row_entry = sf_lut->row_entries[0];
+ if (row_entry > sf_lut->row_entries[cols - 1])
+ row_entry = sf_lut->row_entries[cols - 1];
+
+ for (i = 0; i < cols; i++)
+ if (row_entry <= sf_lut->row_entries[i])
+ break;
+ if (row_entry == sf_lut->row_entries[i]) {
+ scalefactor = linear_interpolate(
+ sf_lut->sf[row1][i],
+ sf_lut->percent[row1],
+ sf_lut->sf[row2][i],
+ sf_lut->percent[row2],
+ pc);
+ return scalefactor;
+ }
+
+ scalefactorrow1 = linear_interpolate(
+ sf_lut->sf[row1][i - 1],
+ sf_lut->row_entries[i - 1],
+ sf_lut->sf[row1][i],
+ sf_lut->row_entries[i],
+ row_entry);
+
+ scalefactorrow2 = linear_interpolate(
+ sf_lut->sf[row2][i - 1],
+ sf_lut->row_entries[i - 1],
+ sf_lut->sf[row2][i],
+ sf_lut->row_entries[i],
+ row_entry);
+
+ scalefactor = linear_interpolate(
+ scalefactorrow1,
+ sf_lut->percent[row1],
+ scalefactorrow2,
+ sf_lut->percent[row2],
+ pc);
+
+ return scalefactor;
+}
+
+/* get ocv given a soc -- reverse lookup */
+int interpolate_ocv(struct pc_temp_ocv_lut *pc_temp_ocv,
+ int batt_temp_degc, int pc)
+{
+ int i, ocvrow1, ocvrow2, ocv, rows, cols;
+ int row1 = 0;
+ int row2 = 0;
+
+ rows = pc_temp_ocv->rows;
+ cols = pc_temp_ocv->cols;
+ if (pc > pc_temp_ocv->percent[0]) {
+ pr_debug("pc %d greater than known pc ranges for sfd\n", pc);
+ row1 = 0;
+ row2 = 0;
+ }
+ if (pc < pc_temp_ocv->percent[rows - 1]) {
+ pr_debug("pc %d less than known pc ranges for sf\n", pc);
+ row1 = rows - 1;
+ row2 = rows - 1;
+ }
+ for (i = 0; i < rows; i++) {
+ if (pc == pc_temp_ocv->percent[i]) {
+ row1 = i;
+ row2 = i;
+ break;
+ }
+ if (pc > pc_temp_ocv->percent[i]) {
+ row1 = i - 1;
+ row2 = i;
+ break;
+ }
+ }
+
+ if (batt_temp_degc < pc_temp_ocv->temp[0])
+ batt_temp_degc = pc_temp_ocv->temp[0];
+ if (batt_temp_degc > pc_temp_ocv->temp[cols - 1])
+ batt_temp_degc = pc_temp_ocv->temp[cols - 1];
+
+ for (i = 0; i < cols; i++)
+ if (batt_temp_degc <= pc_temp_ocv->temp[i])
+ break;
+ if (batt_temp_degc == pc_temp_ocv->temp[i]) {
+ ocv = linear_interpolate(
+ pc_temp_ocv->ocv[row1][i],
+ pc_temp_ocv->percent[row1],
+ pc_temp_ocv->ocv[row2][i],
+ pc_temp_ocv->percent[row2],
+ pc);
+ return ocv;
+ }
+
+ ocvrow1 = linear_interpolate(
+ pc_temp_ocv->ocv[row1][i - 1],
+ pc_temp_ocv->temp[i - 1],
+ pc_temp_ocv->ocv[row1][i],
+ pc_temp_ocv->temp[i],
+ batt_temp_degc);
+
+ ocvrow2 = linear_interpolate(
+ pc_temp_ocv->ocv[row2][i - 1],
+ pc_temp_ocv->temp[i - 1],
+ pc_temp_ocv->ocv[row2][i],
+ pc_temp_ocv->temp[i],
+ batt_temp_degc);
+
+ ocv = linear_interpolate(
+ ocvrow1,
+ pc_temp_ocv->percent[row1],
+ ocvrow2,
+ pc_temp_ocv->percent[row2],
+ pc);
+
+ return ocv;
+}
+
+int interpolate_pc(struct pc_temp_ocv_lut *pc_temp_ocv,
+ int batt_temp_degc, int ocv)
+{
+ int i, j, pcj, pcj_minus_one, pc;
+ int rows = pc_temp_ocv->rows;
+ int cols = pc_temp_ocv->cols;
+
+ if (batt_temp_degc < pc_temp_ocv->temp[0]) {
+ pr_debug("batt_temp %d < known temp range\n", batt_temp_degc);
+ batt_temp_degc = pc_temp_ocv->temp[0];
+ }
+
+ if (batt_temp_degc > pc_temp_ocv->temp[cols - 1]) {
+ pr_debug("batt_temp %d > known temp range\n", batt_temp_degc);
+ batt_temp_degc = pc_temp_ocv->temp[cols - 1];
+ }
+
+ for (j = 0; j < cols; j++)
+ if (batt_temp_degc <= pc_temp_ocv->temp[j])
+ break;
+ if (batt_temp_degc == pc_temp_ocv->temp[j]) {
+ /* found an exact match for temp in the table */
+ if (ocv >= pc_temp_ocv->ocv[0][j])
+ return pc_temp_ocv->percent[0];
+ if (ocv <= pc_temp_ocv->ocv[rows - 1][j])
+ return pc_temp_ocv->percent[rows - 1];
+ for (i = 0; i < rows; i++) {
+ if (ocv >= pc_temp_ocv->ocv[i][j]) {
+ if (ocv == pc_temp_ocv->ocv[i][j])
+ return pc_temp_ocv->percent[i];
+ pc = linear_interpolate(
+ pc_temp_ocv->percent[i],
+ pc_temp_ocv->ocv[i][j],
+ pc_temp_ocv->percent[i - 1],
+ pc_temp_ocv->ocv[i - 1][j],
+ ocv);
+ return pc;
+ }
+ }
+ }
+
+ /*
+ * batt_temp_degc is within temperature for
+ * column j-1 and j
+ */
+ if (ocv >= pc_temp_ocv->ocv[0][j])
+ return pc_temp_ocv->percent[0];
+ if (ocv <= pc_temp_ocv->ocv[rows - 1][j - 1])
+ return pc_temp_ocv->percent[rows - 1];
+
+ pcj_minus_one = 0;
+ pcj = 0;
+ for (i = 0; i < rows-1; i++) {
+ if (pcj == 0
+ && is_between(pc_temp_ocv->ocv[i][j],
+ pc_temp_ocv->ocv[i+1][j], ocv)) {
+ pcj = linear_interpolate(
+ pc_temp_ocv->percent[i],
+ pc_temp_ocv->ocv[i][j],
+ pc_temp_ocv->percent[i + 1],
+ pc_temp_ocv->ocv[i+1][j],
+ ocv);
+ }
+
+ if (pcj_minus_one == 0
+ && is_between(pc_temp_ocv->ocv[i][j-1],
+ pc_temp_ocv->ocv[i+1][j-1], ocv)) {
+ pcj_minus_one = linear_interpolate(
+ pc_temp_ocv->percent[i],
+ pc_temp_ocv->ocv[i][j-1],
+ pc_temp_ocv->percent[i + 1],
+ pc_temp_ocv->ocv[i+1][j-1],
+ ocv);
+ }
+
+ if (pcj && pcj_minus_one) {
+ pc = linear_interpolate(
+ pcj_minus_one,
+ pc_temp_ocv->temp[j-1],
+ pcj,
+ pc_temp_ocv->temp[j],
+ batt_temp_degc);
+ return pc;
+ }
+ }
+
+ if (pcj)
+ return pcj;
+
+ if (pcj_minus_one)
+ return pcj_minus_one;
+
+ pr_debug("%d ocv wasn't found for temp %d in the LUT returning 100%%\n",
+ ocv, batt_temp_degc);
+ return 100;
+}
diff --git a/arch/arm/mach-msm/bms-batterydata-desay.c b/arch/arm/mach-msm/bms-batterydata-desay.c
index f362a72..d9fa061 100644
--- a/arch/arm/mach-msm/bms-batterydata-desay.c
+++ b/arch/arm/mach-msm/bms-batterydata-desay.c
@@ -10,7 +10,7 @@
* GNU General Public License for more details.
*/
-#include <linux/mfd/pm8xxx/pm8921-bms.h>
+#include <linux/mfd/pm8xxx/batterydata-lib.h>
static struct single_row_lut desay_5200_fcc_temp = {
.x = {-20, 0, 25, 40},
@@ -76,7 +76,7 @@
},
};
-struct pm8921_bms_battery_data desay_5200_data = {
+struct bms_battery_data desay_5200_data = {
.fcc = 5200,
.fcc_temp_lut = &desay_5200_fcc_temp,
.fcc_sf_lut = &desay_5200_fcc_sf,
diff --git a/arch/arm/mach-msm/bms-batterydata.c b/arch/arm/mach-msm/bms-batterydata.c
index 81ab121..fb4f967 100644
--- a/arch/arm/mach-msm/bms-batterydata.c
+++ b/arch/arm/mach-msm/bms-batterydata.c
@@ -10,7 +10,7 @@
* GNU General Public License for more details.
*/
-#include <linux/mfd/pm8xxx/pm8921-bms.h>
+#include <linux/mfd/pm8xxx/batterydata-lib.h>
static struct single_row_lut fcc_temp = {
.x = {-20, 0, 25, 40, 65},
@@ -99,7 +99,7 @@
}
};
-struct pm8921_bms_battery_data palladium_1500_data = {
+struct bms_battery_data palladium_1500_data = {
.fcc = 1500,
.fcc_temp_lut = &fcc_temp,
.pc_temp_ocv_lut = &pc_temp_ocv,
diff --git a/arch/arm/mach-msm/board-8064-camera.c b/arch/arm/mach-msm/board-8064-camera.c
index bc1eded..c79f82f 100644
--- a/arch/arm/mach-msm/board-8064-camera.c
+++ b/arch/arm/mach-msm/board-8064-camera.c
@@ -396,11 +396,13 @@
static struct msm_camera_device_platform_data msm_camera_csi_device_data[] = {
{
+ .csiphy_core = 0,
.csid_core = 0,
.is_vpe = 1,
.cam_bus_scale_table = &cam_bus_client_pdata,
},
{
+ .csiphy_core = 1,
.csid_core = 1,
.is_vpe = 1,
.cam_bus_scale_table = &cam_bus_client_pdata,
diff --git a/arch/arm/mach-msm/board-8064-gpiomux.c b/arch/arm/mach-msm/board-8064-gpiomux.c
index a08f45c..cb03d4b 100644
--- a/arch/arm/mach-msm/board-8064-gpiomux.c
+++ b/arch/arm/mach-msm/board-8064-gpiomux.c
@@ -31,6 +31,7 @@
.drv = GPIOMUX_DRV_8MA,
.func = GPIOMUX_FUNC_GPIO,
};
+#endif
/* The SPI configurations apply to GSBI 5*/
static struct gpiomux_setting gpio_spi_config = {
@@ -60,6 +61,7 @@
.pull = GPIOMUX_PULL_UP,
};
+#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE)
struct msm_gpiomux_config apq8064_ethernet_configs[] = {
{
.gpio = 43,
@@ -361,6 +363,22 @@
.pull = GPIOMUX_PULL_NONE,
};
+static struct gpiomux_setting audio_auxpcm[] = {
+/* Suspended state */
+ {
+ .func = GPIOMUX_FUNC_GPIO,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+ },
+/* Active state */
+ {
+ .func = GPIOMUX_FUNC_1,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+ },
+};
+
+
static struct gpiomux_setting wcnss_5wire_suspend_cfg = {
.func = GPIOMUX_FUNC_GPIO,
.drv = GPIOMUX_DRV_2MA,
@@ -682,7 +700,6 @@
[GPIOMUX_SUSPENDED] = &gsbi1_uart_config,
},
},
-#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE)
{
.gpio = 51, /* GSBI5 QUP SPI_DATA_MOSI */
.settings = {
@@ -713,7 +730,6 @@
[GPIOMUX_SUSPENDED] = &gpio_spi_config,
},
},
-#endif
{
.gpio = 30, /* FP CS */
.settings = {
@@ -846,6 +862,37 @@
},
};
+static struct msm_gpiomux_config mpq8064_audio_auxpcm_configs[] __initdata = {
+ {
+ .gpio = 43,
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
+ [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
+ },
+ },
+ {
+ .gpio = 44,
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
+ [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
+ },
+ },
+ {
+ .gpio = 45,
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
+ [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
+ },
+ },
+ {
+ .gpio = 46,
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &audio_auxpcm[0],
+ [GPIOMUX_ACTIVE] = &audio_auxpcm[1],
+ },
+ },
+};
+
/* External 3.3 V regulator enable */
static struct msm_gpiomux_config apq8064_ext_regulator_configs[] __initdata = {
{
@@ -1527,6 +1574,10 @@
if (machine_is_mpq8064_cdp() || machine_is_mpq8064_hrd() ||
machine_is_mpq8064_dtv()) {
+
+ msm_gpiomux_install(mpq8064_audio_auxpcm_configs,
+ ARRAY_SIZE(mpq8064_audio_auxpcm_configs));
+
msm_gpiomux_install(mpq8064_spkr_i2s_config,
ARRAY_SIZE(mpq8064_spkr_i2s_config));
}
diff --git a/arch/arm/mach-msm/board-8064-gpu.c b/arch/arm/mach-msm/board-8064-gpu.c
index 26d4c27..3be7fc6 100644
--- a/arch/arm/mach-msm/board-8064-gpu.c
+++ b/arch/arm/mach-msm/board-8064-gpu.c
@@ -274,11 +274,17 @@
{
unsigned int version = socinfo_get_version();
- if ((SOCINFO_VERSION_MAJOR(version) == 1) &&
- (SOCINFO_VERSION_MINOR(version) == 1))
- kgsl_3d0_pdata.chipid = ADRENO_CHIPID(3, 2, 0, 1);
- else
- kgsl_3d0_pdata.chipid = ADRENO_CHIPID(3, 2, 0, 0);
+ if (cpu_is_apq8064ab())
+ kgsl_3d0_pdata.pwrlevel[0].gpu_freq = 450000000;
+ if (SOCINFO_VERSION_MAJOR(version) == 2) {
+ kgsl_3d0_pdata.chipid = ADRENO_CHIPID(3, 2, 0, 2);
+ } else {
+ if ((SOCINFO_VERSION_MAJOR(version) == 1) &&
+ (SOCINFO_VERSION_MINOR(version) == 1))
+ kgsl_3d0_pdata.chipid = ADRENO_CHIPID(3, 2, 0, 1);
+ else
+ kgsl_3d0_pdata.chipid = ADRENO_CHIPID(3, 2, 0, 0);
+ }
platform_device_register(&device_kgsl_3d0);
}
diff --git a/arch/arm/mach-msm/board-8064-pmic.c b/arch/arm/mach-msm/board-8064-pmic.c
index 3b47d2e..f6423c8 100644
--- a/arch/arm/mach-msm/board-8064-pmic.c
+++ b/arch/arm/mach-msm/board-8064-pmic.c
@@ -115,7 +115,6 @@
/* Initial PM8921 GPIO configurations */
static struct pm8xxx_gpio_init pm8921_gpios[] __initdata = {
PM8921_GPIO_OUTPUT(14, 1, HIGH), /* HDMI Mux Selector */
- PM8921_GPIO_OUTPUT(23, 0, HIGH), /* touchscreen power FET */
PM8921_GPIO_OUTPUT_BUFCONF(25, 0, LOW, CMOS), /* DISP_RESET_N */
PM8921_GPIO_OUTPUT_FUNC(26, 0, PM_GPIO_FUNC_2), /* Bl: Off, PWM mode */
PM8921_GPIO_OUTPUT_VIN(30, 1, PM_GPIO_VIN_VPH), /* SMB349 susp line */
@@ -146,10 +145,13 @@
PM8921_GPIO_OUTPUT(37, 0, LOW), /* MUX1_SEL */
};
+static struct pm8xxx_gpio_init touchscreen_gpios[] __initdata = {
+ PM8921_GPIO_OUTPUT(23, 0, HIGH), /* touchscreen power FET */
+};
+
/* Initial PM8917 GPIO configurations */
static struct pm8xxx_gpio_init pm8917_gpios[] __initdata = {
PM8921_GPIO_OUTPUT(14, 1, HIGH), /* HDMI Mux Selector */
- PM8921_GPIO_OUTPUT(23, 0, HIGH), /* touchscreen power FET */
PM8921_GPIO_OUTPUT_BUFCONF(25, 0, LOW, CMOS), /* DISP_RESET_N */
PM8921_GPIO_OUTPUT(26, 1, HIGH), /* Backlight: on */
PM8921_GPIO_OUTPUT_BUFCONF(36, 1, LOW, OPEN_DRAIN),
@@ -210,6 +212,8 @@
apq8064_configure_gpios(pm8917_gpios, ARRAY_SIZE(pm8917_gpios));
if (machine_is_apq8064_cdp() || machine_is_apq8064_liquid()) {
+ apq8064_configure_gpios(touchscreen_gpios,
+ ARRAY_SIZE(touchscreen_gpios));
if (socinfo_get_pmic_model() != PMIC_MODEL_PM8917)
apq8064_configure_gpios(pm8921_cdp_kp_gpios,
ARRAY_SIZE(pm8921_cdp_kp_gpios));
@@ -395,6 +399,8 @@
.max_voltage = MAX_VOLTAGE_MV,
.min_voltage = 3200,
.uvd_thresh_voltage = 4050,
+ .alarm_low_mv = 3400,
+ .alarm_high_mv = 4000,
.resume_voltage_delta = 100,
.term_current = CHG_TERM_MA,
.cool_temp = 10,
diff --git a/arch/arm/mach-msm/board-8064-regulator.c b/arch/arm/mach-msm/board-8064-regulator.c
index bbb9a81..ef3c81d 100644
--- a/arch/arm/mach-msm/board-8064-regulator.c
+++ b/arch/arm/mach-msm/board-8064-regulator.c
@@ -189,6 +189,7 @@
REGULATOR_SUPPLY("vcc_i2c", "3-0024"),
REGULATOR_SUPPLY("vddp", "0-0048"),
REGULATOR_SUPPLY("hdmi_lvl_tsl", "hdmi_msm.0"),
+ REGULATOR_SUPPLY("vdd-io", "spi0.2"),
};
VREG_CONSUMERS(S5) = {
REGULATOR_SUPPLY("8921_s5", NULL),
@@ -252,7 +253,7 @@
};
VREG_CONSUMERS(EXT_3P3V) = {
REGULATOR_SUPPLY("ext_3p3v", NULL),
- REGULATOR_SUPPLY("vdd_io", "spi0.2"),
+ REGULATOR_SUPPLY("vdd-phy", "spi0.2"),
REGULATOR_SUPPLY("mhl_usb_hs_switch", "msm_otg"),
REGULATOR_SUPPLY("lvds_vccs_3p3v", "lvds.0"),
REGULATOR_SUPPLY("dsi1_vccs_3p3v", "mipi_dsi.1"),
@@ -770,4 +771,10 @@
= ARRAY_SIZE(vreg_consumers_8917_S1);
}
}
+
+ /*
+ * Switch to 8960_PM8917 rpm-regulator version so that TCXO workaround
+ * is applied to PM8917 regulators L25, L26, L27, and L28.
+ */
+ apq8064_rpm_regulator_pdata.version = RPM_VREG_VERSION_8960_PM8917;
}
diff --git a/arch/arm/mach-msm/board-8064-storage.c b/arch/arm/mach-msm/board-8064-storage.c
index c81a637..379d7ae 100644
--- a/arch/arm/mach-msm/board-8064-storage.c
+++ b/arch/arm/mach-msm/board-8064-storage.c
@@ -338,6 +338,11 @@
apq8064_add_sdcc(2, apq8064_sdc2_pdata);
if (apq8064_sdc3_pdata) {
+ if (machine_is_mpq8064_hrd() || machine_is_mpq8064_dtv()) {
+ apq8064_sdc3_pdata->uhs_caps &= ~(MMC_CAP_UHS_SDR12 |
+ MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_DDR50 |
+ MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104);
+ }
if (!machine_is_apq8064_cdp()) {
apq8064_sdc3_pdata->wpswitch_gpio = 0;
apq8064_sdc3_pdata->is_wpswitch_active_low = false;
diff --git a/arch/arm/mach-msm/board-8064.c b/arch/arm/mach-msm/board-8064.c
index 5e01caa..cc9dcbb 100644
--- a/arch/arm/mach-msm/board-8064.c
+++ b/arch/arm/mach-msm/board-8064.c
@@ -78,6 +78,7 @@
#include "msm_watchdog.h"
#include "board-8064.h"
+#include "clock.h"
#include "spm.h"
#include <mach/mpm.h>
#include "rpm_resources.h"
@@ -469,7 +470,8 @@
const struct ion_platform_heap *heap =
&(apq8064_ion_pdata.heaps[i]);
- if (heap->type == ION_HEAP_TYPE_CP && heap->extra_data) {
+ if (heap->type == (enum ion_heap_type) ION_HEAP_TYPE_CP
+ && heap->extra_data) {
struct ion_cp_heap_pdata *data = heap->extra_data;
reusable_count += (data->reusable) ? 1 : 0;
@@ -491,7 +493,7 @@
int fixed_position = NOT_FIXED;
int mem_is_fmem = 0;
- switch (heap->type) {
+ switch ((int)heap->type) {
case ION_HEAP_TYPE_CP:
mem_is_fmem = ((struct ion_cp_heap_pdata *)
heap->extra_data)->mem_is_fmem;
@@ -552,7 +554,7 @@
int fixed_position = NOT_FIXED;
struct ion_cp_heap_pdata *pdata = NULL;
- switch (heap->type) {
+ switch ((int) heap->type) {
case ION_HEAP_TYPE_CP:
pdata =
(struct ion_cp_heap_pdata *)heap->extra_data;
@@ -925,7 +927,8 @@
static void __init apq8064_ehci_host_init(void)
{
if (machine_is_apq8064_liquid() || machine_is_mpq8064_cdp() ||
- machine_is_mpq8064_hrd() || machine_is_mpq8064_dtv()) {
+ machine_is_mpq8064_hrd() || machine_is_mpq8064_dtv() ||
+ machine_is_apq8064_cdp()) {
if (machine_is_apq8064_liquid())
msm_ehci_host_pdata3.dock_connect_irq =
PM8921_MPP_IRQ(PM8921_IRQ_BASE, 9);
@@ -1767,6 +1770,27 @@
},
};
+static struct msm_bus_vectors qseecom_enable_dfab_sfpb_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_ADM_PORT0,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ab = 70000000UL,
+ .ib = 70000000UL,
+ },
+ {
+ .src = MSM_BUS_MASTER_ADM_PORT1,
+ .dst = MSM_BUS_SLAVE_GSBI1_UART,
+ .ab = 2480000000UL,
+ .ib = 2480000000UL,
+ },
+ {
+ .src = MSM_BUS_MASTER_SPDM,
+ .dst = MSM_BUS_SLAVE_SPDM,
+ .ib = (64 * 8) * 1000000UL,
+ .ab = (64 * 8) * 100000UL,
+ },
+};
+
static struct msm_bus_paths qseecom_hw_bus_scale_usecases[] = {
{
ARRAY_SIZE(qseecom_clks_init_vectors),
@@ -1780,6 +1804,10 @@
ARRAY_SIZE(qseecom_enable_sfpb_vectors),
qseecom_enable_sfpb_vectors,
},
+ {
+ ARRAY_SIZE(qseecom_enable_dfab_sfpb_vectors),
+ qseecom_enable_dfab_sfpb_vectors,
+ },
};
static struct msm_bus_scale_pdata qseecom_bus_pdata = {
@@ -1929,6 +1957,7 @@
.ramdump_delay_ms = 2000,
.early_power_on = 1,
.sfr_query = 1,
+ .send_shdn = 1,
.vddmin_resource = &mdm_vddmin_rscs,
.peripheral_platform_device = &apq8064_device_hsic_host,
.ramdump_timeout_ms = 120000,
@@ -2439,7 +2468,6 @@
&apq8064_device_ext_3p3v_vreg,
&apq8064_device_ssbi_pmic1,
&apq8064_device_ssbi_pmic2,
- &apq8064_device_ext_ts_sw_vreg,
};
static struct platform_device *pm8917_common_devices[] __initdata = {
@@ -2447,7 +2475,6 @@
&apq8064_device_ext_3p3v_vreg,
&apq8064_device_ssbi_pmic1,
&apq8064_device_ssbi_pmic2,
- &apq8064_device_ext_ts_sw_vreg,
};
static struct platform_device *common_devices[] __initdata = {
@@ -2576,6 +2603,7 @@
#ifdef CONFIG_MSM_ROTATOR
&msm_rotator_device,
#endif
+ &msm8064_pc_cntr,
};
static struct platform_device
@@ -3345,6 +3373,8 @@
else
platform_add_devices(pm8917_common_devices,
ARRAY_SIZE(pm8917_common_devices));
+ if (machine_is_apq8064_cdp() || machine_is_apq8064_liquid())
+ platform_device_register(&apq8064_device_ext_ts_sw_vreg);
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
if (!(machine_is_mpq8064_cdp() || machine_is_mpq8064_hrd() ||
machine_is_mpq8064_dtv()))
diff --git a/arch/arm/mach-msm/board-8226.c b/arch/arm/mach-msm/board-8226.c
index c845a3a..9545c7a 100644
--- a/arch/arm/mach-msm/board-8226.c
+++ b/arch/arm/mach-msm/board-8226.c
@@ -40,6 +40,7 @@
#include <mach/msm_memtypes.h>
#include <mach/socinfo.h>
#include <mach/board.h>
+#include <mach/clk-provider.h>
#include "clock.h"
static struct clk_lookup msm_clocks_dummy[] = {
diff --git a/arch/arm/mach-msm/board-8930-camera.c b/arch/arm/mach-msm/board-8930-camera.c
index 883e04d..eb00f34 100644
--- a/arch/arm/mach-msm/board-8930-camera.c
+++ b/arch/arm/mach-msm/board-8930-camera.c
@@ -392,11 +392,13 @@
static struct msm_camera_device_platform_data msm_camera_csi_device_data[] = {
{
+ .csiphy_core = 0,
.csid_core = 0,
.is_vpe = 1,
.cam_bus_scale_table = &cam_bus_client_pdata,
},
{
+ .csiphy_core = 1,
.csid_core = 1,
.is_vpe = 1,
.cam_bus_scale_table = &cam_bus_client_pdata,
diff --git a/arch/arm/mach-msm/board-8930-pmic.c b/arch/arm/mach-msm/board-8930-pmic.c
index 59e4ba1..402aec4 100644
--- a/arch/arm/mach-msm/board-8930-pmic.c
+++ b/arch/arm/mach-msm/board-8930-pmic.c
@@ -320,6 +320,8 @@
.max_voltage = MAX_VOLTAGE_MV,
.min_voltage = 3200,
.uvd_thresh_voltage = 4050,
+ .alarm_low_mv = 3400,
+ .alarm_high_mv = 4000,
.resume_voltage_delta = 100,
.term_current = CHG_TERM_MA,
.cool_temp = 10,
diff --git a/arch/arm/mach-msm/board-8930.c b/arch/arm/mach-msm/board-8930.c
index 54802ee..a6a90a7 100644
--- a/arch/arm/mach-msm/board-8930.c
+++ b/arch/arm/mach-msm/board-8930.c
@@ -96,6 +96,7 @@
#include <mach/cpuidle.h>
#include "rpm_resources.h"
#include <mach/mpm.h>
+#include "clock.h"
#include "smd_private.h"
#include "pm-boot.h"
#include "msm_watchdog.h"
@@ -517,7 +518,8 @@
const struct ion_platform_heap *heap =
&(msm8930_ion_pdata.heaps[i]);
- if (heap->type == ION_HEAP_TYPE_CP && heap->extra_data) {
+ if (heap->type == (enum ion_heap_type) ION_HEAP_TYPE_CP
+ && heap->extra_data) {
struct ion_cp_heap_pdata *data = heap->extra_data;
reusable_count += (data->reusable) ? 1 : 0;
@@ -539,7 +541,7 @@
int fixed_position = NOT_FIXED;
int mem_is_fmem = 0;
- switch (heap->type) {
+ switch ((int) heap->type) {
case ION_HEAP_TYPE_CP:
mem_is_fmem = ((struct ion_cp_heap_pdata *)
heap->extra_data)->mem_is_fmem;
@@ -600,7 +602,7 @@
int fixed_position = NOT_FIXED;
struct ion_cp_heap_pdata *pdata = NULL;
- switch (heap->type) {
+ switch ((int) heap->type) {
case ION_HEAP_TYPE_CP:
pdata =
(struct ion_cp_heap_pdata *)heap->extra_data;
@@ -1046,6 +1048,27 @@
},
};
+static struct msm_bus_vectors qseecom_enable_dfab_sfpb_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_SPS,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ib = (492 * 8) * 1000000UL,
+ .ab = (492 * 8) * 100000UL,
+ },
+ {
+ .src = MSM_BUS_MASTER_SPS,
+ .dst = MSM_BUS_SLAVE_SPS,
+ .ib = (492 * 8) * 1000000UL,
+ .ab = (492 * 8) * 100000UL,
+ },
+ {
+ .src = MSM_BUS_MASTER_SPDM,
+ .dst = MSM_BUS_SLAVE_SPDM,
+ .ib = (64 * 8) * 1000000UL,
+ .ab = (64 * 8) * 100000UL,
+ },
+};
+
static struct msm_bus_paths qseecom_hw_bus_scale_usecases[] = {
{
ARRAY_SIZE(qseecom_clks_init_vectors),
@@ -1059,6 +1082,10 @@
ARRAY_SIZE(qseecom_enable_sfpb_vectors),
qseecom_enable_sfpb_vectors,
},
+ {
+ ARRAY_SIZE(qseecom_enable_dfab_sfpb_vectors),
+ qseecom_enable_dfab_sfpb_vectors,
+ },
};
static struct msm_bus_scale_pdata qseecom_bus_pdata = {
@@ -2396,6 +2423,7 @@
&msm8930_iommu_domain_device,
&msm_tsens_device,
&msm8930_cache_dump_device,
+ &msm8930_pc_cntr,
};
static struct platform_device *cdp_devices[] __initdata = {
diff --git a/arch/arm/mach-msm/board-8960-camera.c b/arch/arm/mach-msm/board-8960-camera.c
index 792eea4..9bb6e09 100644
--- a/arch/arm/mach-msm/board-8960-camera.c
+++ b/arch/arm/mach-msm/board-8960-camera.c
@@ -474,16 +474,19 @@
static struct msm_camera_device_platform_data msm_camera_csi_device_data[] = {
{
+ .csiphy_core = 0,
.csid_core = 0,
.is_vpe = 1,
.cam_bus_scale_table = &cam_bus_client_pdata,
},
{
+ .csiphy_core = 1,
.csid_core = 1,
.is_vpe = 1,
.cam_bus_scale_table = &cam_bus_client_pdata,
},
{
+ .csiphy_core = 2,
.csid_core = 2,
.is_vpe = 1,
.cam_bus_scale_table = &cam_bus_client_pdata,
diff --git a/arch/arm/mach-msm/board-8960-pmic.c b/arch/arm/mach-msm/board-8960-pmic.c
index 244125c..f6c3653 100644
--- a/arch/arm/mach-msm/board-8960-pmic.c
+++ b/arch/arm/mach-msm/board-8960-pmic.c
@@ -249,8 +249,8 @@
static const unsigned int keymap[] = {
KEY(0, 0, KEY_VOLUMEUP),
KEY(0, 1, KEY_VOLUMEDOWN),
- KEY(0, 2, KEY_CAMERA_SNAPSHOT),
- KEY(0, 3, KEY_CAMERA_FOCUS),
+ KEY(0, 2, KEY_CAMERA_FOCUS),
+ KEY(0, 3, KEY_CAMERA_SNAPSHOT),
};
static struct matrix_keymap_data keymap_data = {
@@ -401,6 +401,8 @@
.max_voltage = MAX_VOLTAGE_MV,
.min_voltage = 3200,
.uvd_thresh_voltage = 4050,
+ .alarm_low_mv = 3400,
+ .alarm_high_mv = 4000,
.resume_voltage_delta = 100,
.term_current = CHG_TERM_MA,
.cool_temp = 10,
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index a2d9478..7115e40 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -98,6 +98,7 @@
#include <mach/cpuidle.h>
#include "rpm_resources.h"
#include <mach/mpm.h>
+#include "clock.h"
#include "smd_private.h"
#include "pm-boot.h"
#include "msm_watchdog.h"
@@ -561,7 +562,8 @@
const struct ion_platform_heap *heap =
&(msm8960_ion_pdata.heaps[i]);
- if (heap->type == ION_HEAP_TYPE_CP && heap->extra_data) {
+ if (heap->type == (enum ion_heap_type) ION_HEAP_TYPE_CP
+ && heap->extra_data) {
struct ion_cp_heap_pdata *data = heap->extra_data;
reusable_count += (data->reusable) ? 1 : 0;
@@ -586,7 +588,7 @@
int fixed_position = NOT_FIXED;
int mem_is_fmem = 0;
- switch (heap->type) {
+ switch ((int) heap->type) {
case ION_HEAP_TYPE_CP:
mem_is_fmem = ((struct ion_cp_heap_pdata *)
heap->extra_data)->mem_is_fmem;
@@ -665,7 +667,7 @@
int fixed_position = NOT_FIXED;
struct ion_cp_heap_pdata *pdata = NULL;
- switch (heap->type) {
+ switch ((int) heap->type) {
case ION_HEAP_TYPE_CP:
pdata =
(struct ion_cp_heap_pdata *)heap->extra_data;
@@ -1111,6 +1113,27 @@
},
};
+static struct msm_bus_vectors qseecom_enable_dfab_sfpb_vectors[] = {
+ {
+ .src = MSM_BUS_MASTER_SPS,
+ .dst = MSM_BUS_SLAVE_EBI_CH0,
+ .ib = (492 * 8) * 1000000UL,
+ .ab = (492 * 8) * 100000UL,
+ },
+ {
+ .src = MSM_BUS_MASTER_SPS,
+ .dst = MSM_BUS_SLAVE_SPS,
+ .ib = (492 * 8) * 1000000UL,
+ .ab = (492 * 8) * 100000UL,
+ },
+ {
+ .src = MSM_BUS_MASTER_SPDM,
+ .dst = MSM_BUS_SLAVE_SPDM,
+ .ib = (64 * 8) * 1000000UL,
+ .ab = (64 * 8) * 100000UL,
+ },
+};
+
static struct msm_bus_paths qseecom_hw_bus_scale_usecases[] = {
{
ARRAY_SIZE(qseecom_clks_init_vectors),
@@ -1124,6 +1147,10 @@
ARRAY_SIZE(qseecom_enable_sfpb_vectors),
qseecom_enable_sfpb_vectors,
},
+ {
+ ARRAY_SIZE(qseecom_enable_dfab_sfpb_vectors),
+ qseecom_enable_dfab_sfpb_vectors,
+ },
};
static struct msm_bus_scale_pdata qseecom_bus_pdata = {
@@ -1688,8 +1715,8 @@
.reg_base_addr = MSM_SAW0_BASE,
.reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
#if defined(CONFIG_MSM_AVS_HW)
- .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
- .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
+ .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x50589464,
+ .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00020000,
#endif
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x03020004,
@@ -1703,8 +1730,8 @@
.reg_base_addr = MSM_SAW1_BASE,
.reg_init_values[MSM_SPM_REG_SAW2_CFG] = 0x1F,
#if defined(CONFIG_MSM_AVS_HW)
- .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x00,
- .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00,
+ .reg_init_values[MSM_SPM_REG_SAW2_AVS_CTL] = 0x50589464,
+ .reg_init_values[MSM_SPM_REG_SAW2_AVS_HYSTERESIS] = 0x00020000,
#endif
.reg_init_values[MSM_SPM_REG_SAW2_SPM_CTL] = 0x01,
.reg_init_values[MSM_SPM_REG_SAW2_PMIC_DLY] = 0x02020204,
@@ -2742,6 +2769,7 @@
&msm8960_cache_dump_device,
&msm8960_iommu_domain_device,
&msm_tsens_device,
+ &msm8960_pc_cntr,
};
static struct platform_device *cdp_devices[] __initdata = {
@@ -2821,19 +2849,24 @@
msm_kgsl_3d0.dev.platform_data;
uint32_t soc_platform_version = socinfo_get_version();
+ /* Fixup data that needs to change based on GPU ID */
if (cpu_is_msm8960ab()) {
kgsl_3d0_pdata->chipid = ADRENO_CHIPID(3, 2, 1, 0);
/* 8960PRO nominal clock rate is 325Mhz instead of 320Mhz */
kgsl_3d0_pdata->pwrlevel[1].gpu_freq = 325000000;
- } else if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1) {
- kgsl_3d0_pdata->pwrlevel[0].gpu_freq = 320000000;
- kgsl_3d0_pdata->pwrlevel[1].gpu_freq = 266667000;
- } else if (SOCINFO_VERSION_MAJOR(soc_platform_version) >= 3) {
- /* 8960v3 GPU registers returns 5 for patch release
- * but it should be 6, so dummy up the chipid here
- * based the platform type
- */
- kgsl_3d0_pdata->chipid = ADRENO_CHIPID(2, 2, 0, 6);
+ } else {
+ kgsl_3d0_pdata->iommu_count = 1;
+ if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1) {
+ kgsl_3d0_pdata->pwrlevel[0].gpu_freq = 320000000;
+ kgsl_3d0_pdata->pwrlevel[1].gpu_freq = 266667000;
+ }
+ if (SOCINFO_VERSION_MAJOR(soc_platform_version) >= 3) {
+ /* 8960v3 GPU registers returns 5 for patch release
+ * but it should be 6, so dummy up the chipid here
+ * based the platform type
+ */
+ kgsl_3d0_pdata->chipid = ADRENO_CHIPID(2, 2, 0, 6);
+ }
}
/* Register the 3D core */
@@ -3151,13 +3184,22 @@
#endif
}
+static void __init msm8960_tsens_init(void)
+{
+ if (cpu_is_msm8960())
+ if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 1)
+ return;
+
+ msm_tsens_early_init(&msm_tsens_pdata);
+}
+
static void __init msm8960_cdp_init(void)
{
if (meminfo_init(SYS_MEMORY, SZ_256M) < 0)
pr_err("meminfo_init() failed!\n");
platform_device_register(&msm_gpio_device);
- msm_tsens_early_init(&msm_tsens_pdata);
+ msm8960_tsens_init();
msm_thermal_init(&msm_thermal_pdata);
BUG_ON(msm_rpm_init(&msm8960_rpm_data));
BUG_ON(msm_rpmrs_levels_init(&msm_rpmrs_data));
diff --git a/arch/arm/mach-msm/board-8974-gpiomux.c b/arch/arm/mach-msm/board-8974-gpiomux.c
index 479dec6..8568340 100644
--- a/arch/arm/mach-msm/board-8974-gpiomux.c
+++ b/arch/arm/mach-msm/board-8974-gpiomux.c
@@ -271,6 +271,30 @@
[GPIOMUX_SUSPENDED] = &gpio_uart_config,
},
},
+ {
+ .gpio = 53, /* BLSP2 QUP4 SPI_DATA_MOSI */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
+ {
+ .gpio = 54, /* BLSP2 QUP4 SPI_DATA_MISO */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
+ {
+ .gpio = 56, /* BLSP2 QUP4 SPI_CLK */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
+ {
+ .gpio = 55, /* BLSP2 QUP4 SPI_CS0_N */
+ .settings = {
+ [GPIOMUX_SUSPENDED] = &gpio_spi_config,
+ },
+ },
};
static struct msm_gpiomux_config msm8974_slimbus_config[] __initdata = {
@@ -290,22 +314,34 @@
static struct gpiomux_setting cam_settings[] = {
{
- .func = GPIOMUX_FUNC_1, /*active 1*/
+ .func = GPIOMUX_FUNC_1, /*active 1*/ /* 0 */
.drv = GPIOMUX_DRV_2MA,
.pull = GPIOMUX_PULL_NONE,
},
{
- .func = GPIOMUX_FUNC_1, /*suspend*/
+ .func = GPIOMUX_FUNC_1, /*suspend*/ /* 1 */
.drv = GPIOMUX_DRV_2MA,
.pull = GPIOMUX_PULL_DOWN,
},
{
- .func = GPIOMUX_FUNC_1, /*i2c suspend*/
+ .func = GPIOMUX_FUNC_1, /*i2c suspend*/ /* 2 */
.drv = GPIOMUX_DRV_2MA,
.pull = GPIOMUX_PULL_KEEPER,
},
+
+ {
+ .func = GPIOMUX_FUNC_GPIO, /*active 0*/ /* 3 */
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_NONE,
+ },
+
+ {
+ .func = GPIOMUX_FUNC_GPIO, /*suspend 0*/ /* 4 */
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_DOWN,
+ },
};
static struct msm_gpiomux_config msm_sensor_configs[] __initdata = {
@@ -333,8 +369,8 @@
{
.gpio = 18, /* WEBCAM1_RESET_N / CAM_MCLK3 */
.settings = {
- [GPIOMUX_ACTIVE] = &cam_settings[0],
- [GPIOMUX_SUSPENDED] = &cam_settings[1],
+ [GPIOMUX_ACTIVE] = &cam_settings[3],
+ [GPIOMUX_SUSPENDED] = &cam_settings[4],
},
},
{
diff --git a/arch/arm/mach-msm/board-9615.c b/arch/arm/mach-msm/board-9615.c
index 4523cf7..ca95b62 100644
--- a/arch/arm/mach-msm/board-9615.c
+++ b/arch/arm/mach-msm/board-9615.c
@@ -50,6 +50,7 @@
#include "devices.h"
#include "board-9615.h"
#include "pm.h"
+#include "clock.h"
#include "pm-boot.h"
#include <mach/gpiomux.h>
#include "ci13xxx_udc.h"
diff --git a/arch/arm/mach-msm/board-9625-gpiomux.c b/arch/arm/mach-msm/board-9625-gpiomux.c
index 2919f06..fe7670b 100644
--- a/arch/arm/mach-msm/board-9625-gpiomux.c
+++ b/arch/arm/mach-msm/board-9625-gpiomux.c
@@ -18,8 +18,8 @@
#include <mach/gpiomux.h>
static struct gpiomux_setting gpio_uart_config = {
- .func = GPIOMUX_FUNC_2,
- .drv = GPIOMUX_DRV_16MA,
+ .func = GPIOMUX_FUNC_1,
+ .drv = GPIOMUX_DRV_8MA,
.pull = GPIOMUX_PULL_NONE,
.dir = GPIOMUX_OUT_HIGH,
};
@@ -38,13 +38,13 @@
static struct msm_gpiomux_config msm_blsp_configs[] __initdata = {
{
- .gpio = 45, /* BLSP1 UART TX */
+ .gpio = 8, /* BLSP1 UART TX */
.settings = {
[GPIOMUX_SUSPENDED] = &gpio_uart_config,
},
},
{
- .gpio = 46, /* BLSP1 UART RX */
+ .gpio = 9, /* BLSP1 UART RX */
.settings = {
[GPIOMUX_SUSPENDED] = &gpio_uart_config,
},
diff --git a/arch/arm/mach-msm/board-9625.c b/arch/arm/mach-msm/board-9625.c
index e7ef1a9..37e93b6 100644
--- a/arch/arm/mach-msm/board-9625.c
+++ b/arch/arm/mach-msm/board-9625.c
@@ -29,8 +29,41 @@
#include <mach/socinfo.h>
#include <mach/board.h>
#include <mach/gpio.h>
+#include <mach/clk-provider.h>
+#include <mach/qpnp-int.h>
+#include <mach/msm_memtypes.h>
#include "clock.h"
+#define MSM_KERNEL_EBI_SIZE 0x51000
+
+static struct memtype_reserve msm9625_reserve_table[] __initdata = {
+ [MEMTYPE_SMI] = {
+ },
+ [MEMTYPE_EBI0] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+ [MEMTYPE_EBI1] = {
+ .flags = MEMTYPE_FLAGS_1M_ALIGN,
+ },
+};
+
+static int msm9625_paddr_to_memtype(unsigned int paddr)
+{
+ return MEMTYPE_EBI1;
+}
+
+static void __init msm9625_calculate_reserve_sizes(void)
+{
+ msm9625_reserve_table[MEMTYPE_EBI1].size += MSM_KERNEL_EBI_SIZE;
+}
+
+static struct reserve_info msm9625_reserve_info __initdata = {
+ .memtype_reserve_table = msm9625_reserve_table,
+ .calculate_reserve_sizes = msm9625_calculate_reserve_sizes,
+ .paddr_to_memtype = msm9625_paddr_to_memtype,
+};
+
+
#define L2CC_AUX_CTRL ((0x1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) | \
(0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | \
(0x1 << L2X0_AUX_CTRL_EVNT_MON_BUS_EN_SHIFT))
@@ -61,6 +94,7 @@
static struct of_device_id irq_match[] __initdata = {
{ .compatible = "qcom,msm-qgic2", .data = gic_of_init, },
{ .compatible = "qcom,msm-gpio", .data = msm_gpio_of_init, },
+ { .compatible = "qcom,spmi-pmic-arb", .data = qpnpint_of_init, },
{}
};
@@ -74,6 +108,8 @@
"msm_serial_hsl.0", NULL),
OF_DEV_AUXDATA("qcom,spi-qup-v2", 0xF9928000, \
"spi_qsd.1", NULL),
+ OF_DEV_AUXDATA("qcom,spmi-pmic-arb", 0xFC4C0000, \
+ "spmi-pmic-arb.0", NULL),
{}
};
@@ -92,6 +128,13 @@
.init = msm_dt_timer_init
};
+static void __init msm9625_reserve(void)
+{
+ reserve_info = &msm9625_reserve_info;
+ msm_reserve();
+}
+
+
void __init msm9625_init(void)
{
if (socinfo_init() < 0)
@@ -110,5 +153,5 @@
.handle_irq = gic_handle_irq,
.timer = &msm_dt_timer,
.dt_compat = msm9625_dt_match,
- .nr_irqs = -1,
+ .reserve = msm9625_reserve,
MACHINE_END
diff --git a/arch/arm/mach-msm/board-fsm9xxx.c b/arch/arm/mach-msm/board-fsm9xxx.c
index 24d54e4..1d6eb01 100644
--- a/arch/arm/mach-msm/board-fsm9xxx.c
+++ b/arch/arm/mach-msm/board-fsm9xxx.c
@@ -38,6 +38,7 @@
#include <mach/socinfo.h>
#include "devices.h"
#include "timer.h"
+#include "clock.h"
#include "pm.h"
#include "spm.h"
#include <linux/regulator/consumer.h>
@@ -940,6 +941,8 @@
static void __init fsm9xxx_init(void)
{
+ msm_clock_init(&fsm9xxx_clock_init_data);
+
regulator_has_full_constraints();
#if defined(CONFIG_I2C_SSBI) || defined(CONFIG_MSM_SSBI)
@@ -976,7 +979,6 @@
{
msm_shared_ram_phys = 0x00100000;
msm_map_fsm9xxx_io();
- msm_clock_init(&fsm9xxx_clock_init_data);
if (socinfo_init() < 0)
pr_err("%s: socinfo_init() failed!\n",
__func__);
diff --git a/arch/arm/mach-msm/board-msm7627a-camera.c b/arch/arm/mach-msm/board-msm7627a-camera.c
index 7a1e2ff..b5f214b 100644
--- a/arch/arm/mach-msm/board-msm7627a-camera.c
+++ b/arch/arm/mach-msm/board-msm7627a-camera.c
@@ -139,12 +139,14 @@
struct msm_camera_device_platform_data msm_camera_device_data_csi1[] = {
{
+ .csiphy_core = 1,
.csid_core = 1,
.ioclk = {
.vfe_clk_rate = 192000000,
},
},
{
+ .csiphy_core = 1,
.csid_core = 1,
.ioclk = {
.vfe_clk_rate = 266667000,
@@ -154,12 +156,14 @@
struct msm_camera_device_platform_data msm_camera_device_data_csi0[] = {
{
+ .csiphy_core = 0,
.csid_core = 0,
.ioclk = {
.vfe_clk_rate = 192000000,
},
},
{
+ .csiphy_core = 0,
.csid_core = 0,
.ioclk = {
.vfe_clk_rate = 266667000,
diff --git a/arch/arm/mach-msm/board-msm7627a-io.c b/arch/arm/mach-msm/board-msm7627a-io.c
index 47e8381..6e3d10a 100644
--- a/arch/arm/mach-msm/board-msm7627a-io.c
+++ b/arch/arm/mach-msm/board-msm7627a-io.c
@@ -266,16 +266,16 @@
/* T6 Object */
0, 0, 0, 0, 0, 0,
/* T38 Object */
- 20, 0, 0, 0, 0, 0, 0, 0,
+ 20, 1, 0, 25, 9, 12, 0, 0,
/* T7 Object */
24, 12, 10,
/* T8 Object */
- 30, 0, 20, 20, 0, 0, 9, 45, 10, 192,
+ 30, 0, 20, 20, 0, 0, 0, 0, 10, 192,
/* T9 Object */
- 3, 0, 0, 18, 11, 0, 16, 60, 3, 1,
- 0, 1, 1, 0, 10, 10, 10, 10, 107, 3,
- 223, 1, 0, 0, 0, 0, 0, 0, 0, 0,
- 20, 15, 0, 0, 2,
+ 131, 0, 0, 18, 11, 0, 16, 70, 2, 1,
+ 0, 2, 1, 62, 10, 10, 10, 10, 107, 3,
+ 223, 1, 2, 2, 20, 20, 172, 40, 139, 110,
+ 10, 15, 0, 0, 0,
/* T15 Object */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0,
@@ -291,7 +291,7 @@
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0,
/* T40 Object */
- 17, 0, 0, 30, 30,
+ 0, 0, 0, 0, 0,
/* T42 Object */
3, 20, 45, 40, 128, 0, 0, 0,
/* T46 Object */
@@ -299,12 +299,12 @@
/* T47 Object */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/* T48 Object */
- 1, 128, 96, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 6, 6, 0, 0, 63, 4, 64,
- 10, 0, 32, 5, 0, 38, 0, 8, 0, 0,
+ 1, 12, 64, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 6, 6, 0, 0, 100, 4, 64,
+ 10, 0, 20, 5, 0, 38, 0, 20, 0, 0,
0, 0, 0, 0, 16, 65, 3, 1, 1, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0,
+ 10, 10, 10, 0, 0, 15, 15, 154, 58, 145,
+ 80, 100, 15, 3,
};
static struct mxt_config_info mxt_config_array[] = {
@@ -822,6 +822,7 @@
mxt_config_array[0].config_length =
ARRAY_SIZE(mxt_config_data_evt);
mxt_platform_data.panel_maxy = 875;
+ mxt_platform_data.need_calibration = true;
mxt_vkey_setup();
}
diff --git a/arch/arm/mach-msm/board-msm7x27a.c b/arch/arm/mach-msm/board-msm7x27a.c
index 2a51e66..13c4be2 100644
--- a/arch/arm/mach-msm/board-msm7x27a.c
+++ b/arch/arm/mach-msm/board-msm7x27a.c
@@ -841,7 +841,7 @@
static void __init msm8625_reserve(void)
{
msm7x27a_reserve();
- memblock_remove(MSM8625_SECONDARY_PHYS, SZ_8);
+ memblock_remove(MSM8625_CPU_PHYS, SZ_8);
memblock_remove(MSM8625_WARM_BOOT_PHYS, SZ_32);
}
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index f16751d..ee13e04 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -82,6 +82,7 @@
#include "pm-boot.h"
#include "spm.h"
#include "acpuclock.h"
+#include "clock.h"
#include <mach/dal_axi.h>
#include <mach/msm_serial_hs.h>
#include <mach/qdsp5v2/mi2s.h>
@@ -884,6 +885,7 @@
#ifdef CONFIG_MSM_CAMERA_V4L2
static struct msm_camera_device_platform_data msm_camera_csi_device_data[] = {
{
+ .csiphy_core = 0,
.csid_core = 0,
.is_vpe = 1,
.ioclk = {
@@ -891,6 +893,7 @@
},
},
{
+ .csiphy_core = 0,
.csid_core = 0,
.is_vpe = 1,
.ioclk = {
@@ -5187,7 +5190,7 @@
int bahama_not_marimba = bahama_present();
- if (bahama_not_marimba == -1) {
+ if (bahama_not_marimba < 0) {
printk(KERN_WARNING "%s: bahama_present: %d\n",
__func__, bahama_not_marimba);
return -ENODEV;
diff --git a/arch/arm/mach-msm/board-msm8x60-camera.c b/arch/arm/mach-msm/board-msm8x60-camera.c
index acd7f74..7e5f022 100644
--- a/arch/arm/mach-msm/board-msm8x60-camera.c
+++ b/arch/arm/mach-msm/board-msm8x60-camera.c
@@ -360,6 +360,7 @@
static struct msm_camera_device_platform_data msm_camera_csi_device_data[] = {
{
+ .csiphy_core = 0,
.csid_core = 0,
.is_vpe = 1,
.cam_bus_scale_table = &cam_bus_client_pdata,
@@ -368,6 +369,7 @@
},
},
{
+ .csiphy_core = 1,
.csid_core = 1,
.is_vpe = 1,
.cam_bus_scale_table = &cam_bus_client_pdata,
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 281d055..d831ad2 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -100,6 +100,7 @@
#include "peripheral-loader.h"
#include <linux/platform_data/qcom_crypto_device.h>
#include "rpm_resources.h"
+#include "clock.h"
#include "pm-boot.h"
#include "board-storage-common-a.h"
@@ -5477,7 +5478,8 @@
for (i = 0; i < ion_pdata.nr; i++) {
struct ion_platform_heap *heap = &(ion_pdata.heaps[i]);
- if (heap->extra_data && heap->type == ION_HEAP_TYPE_CP) {
+ if (heap->extra_data &&
+ heap->type == (enum ion_heap_type) ION_HEAP_TYPE_CP) {
int map_all = ((struct ion_cp_heap_pdata *)
heap->extra_data)->iommu_map_all;
diff --git a/arch/arm/mach-msm/board-qrd7627a.c b/arch/arm/mach-msm/board-qrd7627a.c
index f6b0c4f..ec8e438 100644
--- a/arch/arm/mach-msm/board-qrd7627a.c
+++ b/arch/arm/mach-msm/board-qrd7627a.c
@@ -276,6 +276,7 @@
static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
.is_phy_status_timer_on = 1,
+ .prop_chg = 0,
};
#ifdef CONFIG_SERIAL_MSM_HS
@@ -811,7 +812,7 @@
static void __init msm8625_reserve(void)
{
- memblock_remove(MSM8625_SECONDARY_PHYS, SZ_8);
+ memblock_remove(MSM8625_CPU_PHYS, SZ_8);
msm7627a_reserve();
}
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index 4df4266..146c8a8 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -55,6 +55,7 @@
#include "timer.h"
#include "msm-keypad-devices.h"
#include "acpuclock.h"
+#include "clock.h"
#include "pm.h"
#include "irq.h"
#include "pm-boot.h"
diff --git a/arch/arm/mach-msm/clock-7x30.c b/arch/arm/mach-msm/clock-7x30.c
index 8cce34b..e42fe65 100644
--- a/arch/arm/mach-msm/clock-7x30.c
+++ b/arch/arm/mach-msm/clock-7x30.c
@@ -24,7 +24,6 @@
#include <linux/string.h>
#include <mach/msm_iomap.h>
-#include <mach/clk.h>
#include <mach/proc_comm.h>
#include "clock.h"
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 01bc9dd..2cd2cd4 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -24,10 +24,10 @@
#include <asm/mach-types.h>
#include <mach/msm_iomap.h>
-#include <mach/clk.h>
#include <mach/rpm-regulator.h>
#include <mach/socinfo.h>
+#include "clock.h"
#include "clock-local.h"
#include "clock-rpm.h"
#include "clock-voter.h"
@@ -1534,6 +1534,11 @@
static CLK_SDC(sdc4_clk, 4, 3, 33000000, 67000000);
static CLK_SDC(sdc5_clk, 5, 2, 33000000, 67000000);
+static unsigned long fmax_sdc1_8064v2[MAX_VDD_LEVELS] __initdata = {
+ [VDD_DIG_LOW] = 100000000,
+ [VDD_DIG_NOMINAL] = 200000000,
+};
+
#define F_TSIF_REF(f, s, d, m, n) \
{ \
.freq_hz = f, \
@@ -1907,6 +1912,7 @@
F_CE3( 0, gnd, 1),
F_CE3( 48000000, pll8, 8),
F_CE3(100000000, pll3, 12),
+ F_CE3(120000000, pll3, 10),
F_END
};
@@ -1929,6 +1935,11 @@
},
};
+static unsigned long fmax_ce3_8064v2[MAX_VDD_LEVELS] __initdata = {
+ [VDD_DIG_LOW] = 57000000,
+ [VDD_DIG_NOMINAL] = 120000000,
+};
+
static struct branch_clk ce3_core_clk = {
.b = {
.ctl_reg = CE3_CORE_CLK_CTL_REG,
@@ -3540,11 +3551,12 @@
F_GFX3D(145455000, pll2, 2, 11),
F_GFX3D(160000000, pll2, 1, 5),
F_GFX3D(177778000, pll2, 2, 9),
+ F_GFX3D(192000000, pll8, 1, 2),
F_GFX3D(200000000, pll2, 1, 4),
F_GFX3D(228571000, pll2, 2, 7),
F_GFX3D(266667000, pll2, 1, 3),
- F_GFX3D(325000000, pll15, 1, 3),
F_GFX3D(400000000, pll2, 1, 2),
+ F_GFX3D(450000000, pll15, 1, 2),
F_END
};
@@ -3570,6 +3582,12 @@
F_END
};
+static unsigned long fmax_gfx3d_8064ab[MAX_VDD_LEVELS] __initdata = {
+ [VDD_DIG_LOW] = 128000000,
+ [VDD_DIG_NOMINAL] = 325000000,
+ [VDD_DIG_HIGH] = 450000000
+};
+
static unsigned long fmax_gfx3d_8064[MAX_VDD_LEVELS] __initdata = {
[VDD_DIG_LOW] = 128000000,
[VDD_DIG_NOMINAL] = 325000000,
@@ -4295,6 +4313,7 @@
F_VCODEC(133330000, pll2, 1, 6),
F_VCODEC(200000000, pll2, 1, 4),
F_VCODEC(228570000, pll2, 2, 7),
+ F_VCODEC(266670000, pll2, 1, 3),
F_END
};
@@ -4325,6 +4344,12 @@
},
};
+static unsigned long fmax_vcodec_8064v2[MAX_VDD_LEVELS] __initdata = {
+ [VDD_DIG_LOW] = 100000000,
+ [VDD_DIG_NOMINAL] = 200000000,
+ [VDD_DIG_HIGH] = 266670000,
+};
+
#define F_VPE(f, s, d) \
{ \
.freq_hz = f, \
@@ -5065,6 +5090,8 @@
writel_relaxed(0x80|BVAL(5, 3, clk_sel), GCC_APCS_CLK_DIAG);
measure->sample_ticks = 0x4000;
measure->multiplier = 2;
+ if (cpu_is_krait_v3())
+ measure->multiplier = 8;
break;
default:
ret = -EPERM;
@@ -5330,6 +5357,7 @@
CLK_LOOKUP("cam_clk", cam0_clk.c, "4-0020"),
CLK_LOOKUP("cam_clk", cam1_clk.c, "4-0048"),
CLK_LOOKUP("cam_clk", cam1_clk.c, "4-006c"),
+ CLK_LOOKUP("cam_clk", cam2_clk.c, ""),
CLK_LOOKUP("csi_src_clk", csi0_src_clk.c, "msm_csid.0"),
CLK_LOOKUP("csi_src_clk", csi1_src_clk.c, "msm_csid.1"),
CLK_LOOKUP("csi_src_clk", csi2_src_clk.c, "msm_csid.2"),
@@ -5449,6 +5477,10 @@
CLK_LOOKUP("osr_clk", spare_i2s_mic_osr_clk.c,
"msm-dai-q6.5"),
CLK_LOOKUP("bit_clk", codec_i2s_spkr_bit_clk.c,
+ "msm-dai-q6.0"),
+ CLK_LOOKUP("osr_clk", codec_i2s_spkr_osr_clk.c,
+ "msm-dai-q6.0"),
+ CLK_LOOKUP("bit_clk", codec_i2s_spkr_bit_clk.c,
"msm-dai-q6.16384"),
CLK_LOOKUP("osr_clk", codec_i2s_spkr_osr_clk.c,
"msm-dai-q6.16384"),
@@ -5792,6 +5824,10 @@
CLK_LOOKUP("osr_clk", spare_i2s_mic_osr_clk.c,
"msm-dai-q6.5"),
CLK_LOOKUP("bit_clk", codec_i2s_spkr_bit_clk.c,
+ "msm-dai-q6.0"),
+ CLK_LOOKUP("osr_clk", codec_i2s_spkr_osr_clk.c,
+ "msm-dai-q6.0"),
+ CLK_LOOKUP("bit_clk", codec_i2s_spkr_bit_clk.c,
"msm-dai-q6.16384"),
CLK_LOOKUP("osr_clk", codec_i2s_spkr_osr_clk.c,
"msm-dai-q6.16384"),
@@ -6124,6 +6160,10 @@
CLK_LOOKUP("osr_clk", spare_i2s_mic_osr_clk.c,
"msm-dai-q6.5"),
CLK_LOOKUP("bit_clk", codec_i2s_spkr_bit_clk.c,
+ "msm-dai-q6.0"),
+ CLK_LOOKUP("osr_clk", codec_i2s_spkr_osr_clk.c,
+ "msm-dai-q6.0"),
+ CLK_LOOKUP("bit_clk", codec_i2s_spkr_bit_clk.c,
"msm-dai-q6.16384"),
CLK_LOOKUP("osr_clk", codec_i2s_spkr_osr_clk.c,
"msm-dai-q6.16384"),
@@ -6289,7 +6329,7 @@
writel_relaxed(0x3C7097F9, AHB_EN2_REG);
}
- if (cpu_is_apq8064())
+ if (cpu_is_apq8064() || cpu_is_apq8064ab())
rmwreg(0x00000001, AHB_EN3_REG, 0x00000001);
/* Deassert all locally-owned MM AHB resets. */
@@ -6312,7 +6352,7 @@
rmwreg(0x0027FCFF, MAXI_EN3_REG, 0x003FFFFF);
rmwreg(0x0027FCFF, MAXI_EN4_REG, 0x017FFFFF);
- if (cpu_is_apq8064())
+ if (cpu_is_apq8064() || cpu_is_apq8064ab())
rmwreg(0x019FECFF, MAXI_EN5_REG, 0x01FFEFFF);
if (cpu_is_msm8930() || cpu_is_msm8930aa() || cpu_is_msm8627())
rmwreg(0x000004FF, MAXI_EN5_REG, 0x00000FFF);
@@ -6350,7 +6390,8 @@
rmwreg(0x80FF0000, VFE_CC_REG, 0xE0FF4010);
rmwreg(0x800000FF, VFE_CC2_REG, 0xE00000FF);
rmwreg(0x80FF0000, VPE_CC_REG, 0xE0FF0010);
- if (cpu_is_msm8960ab() || cpu_is_msm8960() || cpu_is_apq8064()) {
+ if (cpu_is_msm8960ab() || cpu_is_msm8960() || cpu_is_apq8064()
+ || cpu_is_apq8064ab()) {
rmwreg(0x80FF0000, DSI2_BYTE_CC_REG, 0xE0FF0010);
rmwreg(0x80FF0000, DSI2_PIXEL_CC_REG, 0xE0FF0010);
rmwreg(0x80FF0000, JPEGD_CC_REG, 0xE0FF0010);
@@ -6368,7 +6409,7 @@
rmwreg(0x80FF0000, GFX2D0_CC_REG, 0xE0FF0010);
rmwreg(0x80FF0000, GFX2D1_CC_REG, 0xE0FF0010);
}
- if (cpu_is_apq8064()) {
+ if (cpu_is_apq8064() || cpu_is_apq8064ab()) {
rmwreg(0x00000000, TV_CC_REG, 0x00004010);
rmwreg(0x80FF0000, VCAP_CC_REG, 0xE0FF1010);
}
@@ -6379,7 +6420,7 @@
* and wake-up value to max.
*/
rmwreg(0x0000004F, USB_HS1_HCLK_FS_REG, 0x0000007F);
- if (cpu_is_apq8064()) {
+ if (cpu_is_apq8064() || cpu_is_apq8064ab()) {
rmwreg(0x0000004F, USB_HS3_HCLK_FS_REG, 0x0000007F);
rmwreg(0x0000004F, USB_HS4_HCLK_FS_REG, 0x0000007F);
}
@@ -6401,7 +6442,8 @@
/* Source the dsi_byte_clks from the DSI PHY PLLs */
rmwreg(0x1, DSI1_BYTE_NS_REG, 0x7);
- if (cpu_is_msm8960ab() || cpu_is_msm8960() || cpu_is_apq8064())
+ if (cpu_is_msm8960ab() || cpu_is_msm8960() || cpu_is_apq8064()
+ || cpu_is_apq8064ab())
rmwreg(0x2, DSI2_BYTE_NS_REG, 0x7);
/* Source the dsi1_esc_clk from the DSI1 PHY PLLs */
@@ -6411,7 +6453,7 @@
* Source the sata_phy_ref_clk from PXO and set predivider of
* sata_pmalive_clk to 1.
*/
- if (cpu_is_apq8064()) {
+ if (cpu_is_apq8064() || cpu_is_apq8064ab()) {
rmwreg(0, SATA_PHY_REF_CLK_CTL_REG, 0x1);
rmwreg(0, SATA_PMALIVE_CLK_CTL_REG, 0x3);
}
@@ -6420,7 +6462,7 @@
* TODO: Programming below PLLs and prng_clk is temporary and
* needs to be removed after bootloaders program them.
*/
- if (cpu_is_apq8064()) {
+ if (cpu_is_apq8064() || cpu_is_apq8064ab()) {
u32 is_pll_enabled;
/* Program pxo_src_clk to source from PXO */
@@ -6430,16 +6472,13 @@
is_pll_enabled = readl_relaxed(BB_PLL14_STATUS_REG) & BIT(16);
if (!is_pll_enabled)
/* Ref clk = 27MHz and program pll14 to 480MHz */
- configure_pll(&pll14_config, &pll14_regs, 1);
-
- /* Program PLL15 to 975MHz with ref clk = 27MHz */
- configure_pll(&pll15_config, &pll15_regs, 0);
+ configure_sr_pll(&pll14_config, &pll14_regs, 1);
/* Check if PLL4 is active */
is_pll_enabled = readl_relaxed(LCC_PLL0_STATUS_REG) & BIT(16);
if (!is_pll_enabled)
/* Ref clk = 27MHz and program pll4 to 393.2160MHz */
- configure_pll(&pll4_config_393, &pll4_regs, 1);
+ configure_sr_pll(&pll4_config_393, &pll4_regs, 1);
/* Enable PLL4 source on the LPASS Primary PLL Mux */
writel_relaxed(0x1, LCC_PRI_PLL_CLK_CTL_REG);
@@ -6449,6 +6488,17 @@
writel_relaxed(0x2B, PRNG_CLK_NS_REG);
}
+ if (cpu_is_apq8064()) {
+ /* Program PLL15 to 975MHz with ref clk = 27MHz */
+ configure_sr_pll(&pll15_config, &pll15_regs, 0);
+ } else if (cpu_is_apq8064ab()) {
+ /* Program PLL15 to 900MHZ */
+ pll15_config.l = 0x21 | BVAL(31, 7, 0x620);
+ pll15_config.m = 0x1;
+ pll15_config.n = 0x3;
+ configure_sr_pll(&pll15_config, &pll15_regs, 0);
+ }
+
/*
* Program PLL15 to 900MHz with ref clk = 27MHz and
* only enable PLL main output.
@@ -6457,7 +6507,7 @@
pll15_config.l = 0x21 | BVAL(31, 7, 0x600);
pll15_config.m = 0x1;
pll15_config.n = 0x3;
- configure_pll(&pll15_config, &pll15_regs, 0);
+ configure_sr_pll(&pll15_config, &pll15_regs, 0);
/* Disable AUX and BIST outputs */
writel_relaxed(0, MM_PLL3_TEST_CTL_REG);
}
@@ -6469,7 +6519,7 @@
/* Initialize clock registers. */
reg_init();
- if (cpu_is_apq8064())
+ if (cpu_is_apq8064() || cpu_is_apq8064ab())
vdd_sr2_hdmi_pll.set_vdd = set_vdd_sr2_hdmi_pll_8064;
/* Detect PLL4 programmed for alternate 491.52MHz clock plan. */
@@ -6511,13 +6561,32 @@
}
/*
* Change the freq tables for and voltage requirements for
- * clocks which differ between 8960 and 8064.
+ * clocks which differ between chips.
*/
if (cpu_is_apq8064()) {
gfx3d_clk.freq_tbl = clk_tbl_gfx3d_8064;
memcpy(gfx3d_clk.c.fmax, fmax_gfx3d_8064,
sizeof(gfx3d_clk.c.fmax));
+ }
+ if (cpu_is_apq8064ab()) {
+ gfx3d_clk.freq_tbl = clk_tbl_gfx3d_8064;
+
+ memcpy(gfx3d_clk.c.fmax, fmax_gfx3d_8064ab,
+ sizeof(gfx3d_clk.c.fmax));
+ }
+ if ((cpu_is_apq8064() &&
+ SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) ||
+ cpu_is_apq8064ab()) {
+
+ memcpy(vcodec_clk.c.fmax, fmax_vcodec_8064v2,
+ sizeof(vcodec_clk.c.fmax));
+ memcpy(ce3_src_clk.c.fmax, fmax_ce3_8064v2,
+ sizeof(ce3_src_clk.c.fmax));
+ memcpy(sdc1_clk.c.fmax, fmax_sdc1_8064v2,
+ sizeof(sdc1_clk.c.fmax));
+ }
+ if (cpu_is_apq8064() || cpu_is_apq8064ab()) {
memcpy(ijpeg_clk.c.fmax, fmax_ijpeg_8064,
sizeof(ijpeg_clk.c.fmax));
memcpy(mdp_clk.c.fmax, fmax_mdp_8064,
@@ -6593,7 +6662,7 @@
clk_set_rate(&tsif_ref_clk.c, 105000);
clk_set_rate(&tssc_clk.c, 27000000);
clk_set_rate(&usb_hs1_xcvr_clk.c, 60000000);
- if (cpu_is_apq8064()) {
+ if (cpu_is_apq8064() || cpu_is_apq8064ab()) {
clk_set_rate(&usb_hs3_xcvr_clk.c, 60000000);
clk_set_rate(&usb_hs4_xcvr_clk.c, 60000000);
}
diff --git a/arch/arm/mach-msm/clock-8974.c b/arch/arm/mach-msm/clock-8974.c
index b054e08..10de231 100644
--- a/arch/arm/mach-msm/clock-8974.c
+++ b/arch/arm/mach-msm/clock-8974.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -20,7 +20,6 @@
#include <linux/clk.h>
#include <linux/iopoll.h>
-#include <mach/clk.h>
#include <mach/rpm-regulator-smd.h>
#include <mach/socinfo.h>
#include <mach/rpm-smd.h>
@@ -30,6 +29,7 @@
#include "clock-rpm.h"
#include "clock-voter.h"
#include "clock-mdss-8974.h"
+#include "clock.h"
enum {
GCC_BASE,
@@ -2183,6 +2183,18 @@
},
};
+struct branch_clk gcc_sys_noc_usb3_axi_clk = {
+ .cbcr_reg = SYS_NOC_USB3_AXI_CBCR,
+ .parent = &usb30_master_clk_src.c,
+ .has_sibling = 1,
+ .base = &virt_bases[GCC_BASE],
+ .c = {
+ .dbg_name = "gcc_sys_noc_usb3_axi_clk",
+ .ops = &clk_ops_branch,
+ CLK_INIT(gcc_sys_noc_usb3_axi_clk.c),
+ },
+};
+
static struct branch_clk gcc_usb30_master_clk = {
.cbcr_reg = USB30_MASTER_CBCR,
.bcr_reg = USB_30_BCR,
@@ -2193,6 +2205,7 @@
.dbg_name = "gcc_usb30_master_clk",
.ops = &clk_ops_branch,
CLK_INIT(gcc_usb30_master_clk.c),
+ .depends = &gcc_sys_noc_usb3_axi_clk.c,
},
};
@@ -2207,18 +2220,6 @@
},
};
-struct branch_clk gcc_sys_noc_usb3_axi_clk = {
- .cbcr_reg = SYS_NOC_USB3_AXI_CBCR,
- .parent = &usb30_master_clk_src.c,
- .has_sibling = 1,
- .base = &virt_bases[GCC_BASE],
- .c = {
- .dbg_name = "gcc_sys_noc_usb3_axi_clk",
- .ops = &clk_ops_branch,
- CLK_INIT(gcc_sys_noc_usb3_axi_clk.c),
- },
-};
-
struct branch_clk gcc_usb30_sleep_clk = {
.cbcr_reg = USB30_SLEEP_CBCR,
.has_sibling = 1,
@@ -2366,9 +2367,12 @@
static struct clk_freq_tbl ftbl_mmss_axi_clk[] = {
F_MM( 19200000, cxo, 1, 0, 0),
+ F_MM( 37500000, gpll0, 16, 0, 0),
+ F_MM( 50000000, gpll0, 12, 0, 0),
+ F_MM( 75000000, gpll0, 8, 0, 0),
+ F_MM(100000000, gpll0, 6, 0, 0),
F_MM(150000000, gpll0, 4, 0, 0),
F_MM(282000000, mmpll1, 3, 0, 0),
- F_MM(320000000, mmpll0, 2.5, 0, 0),
F_MM(400000000, mmpll0, 2, 0, 0),
F_END
};
@@ -2390,6 +2394,10 @@
static struct clk_freq_tbl ftbl_ocmemnoc_clk[] = {
F_MM( 19200000, cxo, 1, 0, 0),
+ F_MM( 37500000, gpll0, 16, 0, 0),
+ F_MM( 50000000, gpll0, 12, 0, 0),
+ F_MM( 75000000, gpll0, 8, 0, 0),
+ F_MM(100000000, gpll0, 6, 0, 0),
F_MM(150000000, gpll0, 4, 0, 0),
F_MM(282000000, mmpll1, 3, 0, 0),
F_MM(400000000, mmpll0, 2, 0, 0),
@@ -5032,6 +5040,7 @@
CLK_LOOKUP("core_clk", gcc_blsp1_uart6_apps_clk.c, ""),
CLK_LOOKUP("iface_clk", gcc_blsp2_ahb_clk.c, "f9967000.i2c"),
+ CLK_LOOKUP("iface_clk", gcc_blsp2_ahb_clk.c, "f9966000.spi"),
CLK_LOOKUP("iface_clk", gcc_blsp2_ahb_clk.c, "f995e000.serial"),
CLK_LOOKUP("core_clk", gcc_blsp2_qup1_i2c_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp2_qup1_spi_apps_clk.c, ""),
@@ -5040,8 +5049,8 @@
CLK_LOOKUP("core_clk", gcc_blsp2_qup3_i2c_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp2_qup3_spi_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp2_qup4_i2c_apps_clk.c, ""),
- CLK_LOOKUP("core_clk", gcc_blsp2_qup4_spi_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp2_qup5_i2c_apps_clk.c, "f9967000.i2c"),
+ CLK_LOOKUP("core_clk", gcc_blsp2_qup4_spi_apps_clk.c, "f9966000.spi"),
CLK_LOOKUP("core_clk", gcc_blsp2_qup5_spi_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp2_qup6_i2c_apps_clk.c, ""),
CLK_LOOKUP("core_clk", gcc_blsp2_qup6_spi_apps_clk.c, ""),
@@ -5121,7 +5130,9 @@
CLK_LOOKUP("core_clk", mdss_esc1_clk.c, ""),
CLK_LOOKUP("pixel_clk", mdss_pclk0_clk.c, "fd922800.qcom,mdss_dsi"),
CLK_LOOKUP("pixel_clk", mdss_pclk1_clk.c, ""),
- CLK_LOOKUP("iface_clk", mdss_hdmi_ahb_clk.c, "fd922100.qcom,hdmi_tx"),
+ CLK_LOOKUP("iface_clk", mdss_ahb_clk.c, "fd922100.qcom,hdmi_tx"),
+ CLK_LOOKUP("alt_iface_clk", mdss_hdmi_ahb_clk.c,
+ "fd922100.qcom,hdmi_tx"),
CLK_LOOKUP("core_clk", mdss_hdmi_clk.c, "fd922100.qcom,hdmi_tx"),
CLK_LOOKUP("extp_clk", mdss_extpclk_clk.c, "fd922100.qcom,hdmi_tx"),
CLK_LOOKUP("core_clk", mdss_mdp_clk.c, "mdp.0"),
@@ -5132,8 +5143,10 @@
/* MM sensor clocks */
CLK_LOOKUP("cam_src_clk", mclk0_clk_src.c, "6e.qcom,camera"),
CLK_LOOKUP("cam_src_clk", mclk1_clk_src.c, "6c.qcom,camera"),
+ CLK_LOOKUP("cam_src_clk", mclk1_clk_src.c, "90.qcom,camera"),
CLK_LOOKUP("cam_clk", camss_mclk0_clk.c, "6e.qcom,camera"),
CLK_LOOKUP("cam_clk", camss_mclk1_clk.c, "6c.qcom,camera"),
+ CLK_LOOKUP("cam_clk", camss_mclk1_clk.c, "90.qcom,camera"),
CLK_LOOKUP("cam_clk", camss_mclk1_clk.c, ""),
CLK_LOOKUP("cam_clk", camss_mclk2_clk.c, ""),
CLK_LOOKUP("cam_clk", camss_mclk3_clk.c, ""),
@@ -5594,16 +5607,16 @@
if (!(readl_relaxed(GCC_REG_BASE(GPLL0_STATUS_REG))
& gpll0_clk_src.status_mask))
- configure_pll(&gpll0_config, &gpll0_regs, 1);
+ configure_sr_hpm_lp_pll(&gpll0_config, &gpll0_regs, 1);
if (!(readl_relaxed(GCC_REG_BASE(GPLL1_STATUS_REG))
& gpll1_clk_src.status_mask))
- configure_pll(&gpll1_config, &gpll1_regs, 1);
+ configure_sr_hpm_lp_pll(&gpll1_config, &gpll1_regs, 1);
- configure_pll(&mmpll0_config, &mmpll0_regs, 1);
- configure_pll(&mmpll1_config, &mmpll1_regs, 1);
- configure_pll(&mmpll3_config, &mmpll3_regs, 0);
- configure_pll(&lpapll0_config, &lpapll0_regs, 1);
+ configure_sr_hpm_lp_pll(&mmpll0_config, &mmpll0_regs, 1);
+ configure_sr_hpm_lp_pll(&mmpll1_config, &mmpll1_regs, 1);
+ configure_sr_hpm_lp_pll(&mmpll3_config, &mmpll3_regs, 0);
+ configure_sr_hpm_lp_pll(&lpapll0_config, &lpapll0_regs, 1);
/* Enable GPLL0's aux outputs. */
regval = readl_relaxed(GCC_REG_BASE(GPLL0_USER_CTL_REG));
@@ -5769,7 +5782,7 @@
if (!virt_bases[APCS_BASE])
panic("clock-8974: Unable to ioremap APCS_GCC_CC memory!");
- clk_ops_local_pll.enable = msm8974_pll_clk_enable;
+ clk_ops_local_pll.enable = sr_hpm_lp_pll_clk_enable;
vdd_dig_reg = rpm_regulator_get(NULL, "vdd_dig");
if (IS_ERR(vdd_dig_reg))
diff --git a/arch/arm/mach-msm/clock-8x60.c b/arch/arm/mach-msm/clock-8x60.c
index 24c06c9..6ae66fe 100644
--- a/arch/arm/mach-msm/clock-8x60.c
+++ b/arch/arm/mach-msm/clock-8x60.c
@@ -23,11 +23,11 @@
#include <linux/clkdev.h>
#include <mach/msm_iomap.h>
-#include <mach/clk.h>
#include <mach/scm-io.h>
#include <mach/rpm.h>
#include <mach/rpm-regulator.h>
+#include "clock.h"
#include "clock-local.h"
#include "clock-rpm.h"
#include "clock-voter.h"
diff --git a/arch/arm/mach-msm/clock-9615.c b/arch/arm/mach-msm/clock-9615.c
index 648a8d4..fee8445 100644
--- a/arch/arm/mach-msm/clock-9615.c
+++ b/arch/arm/mach-msm/clock-9615.c
@@ -24,10 +24,10 @@
#include <asm/mach-types.h>
#include <mach/msm_iomap.h>
-#include <mach/clk.h>
#include <mach/rpm-9615.h>
#include <mach/rpm-regulator.h>
+#include "clock.h"
#include "clock-local.h"
#include "clock-voter.h"
#include "clock-rpm.h"
@@ -1807,14 +1807,14 @@
regval |= BIT(12);
writel_relaxed(regval, BB_PLL0_TEST_CTL_REG);
- configure_pll(&pll0_config, &pll0_regs, 1);
+ configure_sr_pll(&pll0_config, &pll0_regs, 1);
}
/* Check if PLL14 is enabled in FSM mode */
is_pll_enabled = readl_relaxed(BB_PLL14_STATUS_REG) & BIT(16);
if (!is_pll_enabled)
- configure_pll(&pll14_config, &pll14_regs, 1);
+ configure_sr_pll(&pll14_config, &pll14_regs, 1);
else if (!(readl_relaxed(BB_PLL14_MODE_REG) & BIT(20)))
WARN(1, "PLL14 enabled in non-FSM mode!\n");
diff --git a/arch/arm/mach-msm/clock-debug.c b/arch/arm/mach-msm/clock-debug.c
index c996ff4..8bd4433 100644
--- a/arch/arm/mach-msm/clock-debug.c
+++ b/arch/arm/mach-msm/clock-debug.c
@@ -21,6 +21,7 @@
#include <linux/clk.h>
#include <linux/list.h>
#include <linux/clkdev.h>
+#include <mach/clk-provider.h>
#include "clock.h"
@@ -145,74 +146,39 @@
DEFINE_SIMPLE_ATTRIBUTE(clock_hwcg_fops, clock_debug_hwcg_get,
NULL, "%llu\n");
-static struct dentry *debugfs_base;
-static u32 debug_suspend;
-static struct clk_lookup *msm_clocks;
-static size_t num_msm_clocks;
-
-int __init clock_debug_init(struct clock_init_data *data)
+static int fmax_rates_show(struct seq_file *m, void *unused)
{
- debugfs_base = debugfs_create_dir("clk", NULL);
- if (!debugfs_base)
- return -ENOMEM;
- if (!debugfs_create_u32("debug_suspend", S_IRUGO | S_IWUSR,
- debugfs_base, &debug_suspend)) {
- debugfs_remove_recursive(debugfs_base);
- return -ENOMEM;
- }
- msm_clocks = data->table;
- num_msm_clocks = data->size;
+ struct clk *clock = m->private;
+ int level = 0;
- measure = clk_get_sys("debug", "measure");
- if (IS_ERR(measure))
- measure = NULL;
+ int vdd_level = find_vdd_level(clock, clock->rate);
+ if (vdd_level < 0) {
+ seq_printf(m, "could not find_vdd_level for %s, %ld\n",
+ clock->dbg_name, clock->rate);
+ return 0;
+ }
+ for (level = 0; level < ARRAY_SIZE(clock->fmax); level++) {
+ if (vdd_level == level)
+ seq_printf(m, "[%lu] ", clock->fmax[level]);
+ else
+ seq_printf(m, "%lu ", clock->fmax[level]);
+ }
+ seq_printf(m, "\n");
return 0;
}
-
-static int clock_debug_print_clock(struct clk *c)
+static int fmax_rates_open(struct inode *inode, struct file *file)
{
- char *start = "";
-
- if (!c || !c->prepare_count)
- return 0;
-
- pr_info("\t");
- do {
- if (c->vdd_class)
- pr_cont("%s%s:%u:%u [%ld, %lu]", start, c->dbg_name,
- c->prepare_count, c->count, c->rate,
- c->vdd_class->cur_level);
- else
- pr_cont("%s%s:%u:%u [%ld]", start, c->dbg_name,
- c->prepare_count, c->count, c->rate);
- start = " -> ";
- } while ((c = clk_get_parent(c)));
-
- pr_cont("\n");
-
- return 1;
+ return single_open(file, fmax_rates_show, inode->i_private);
}
-void clock_debug_print_enabled(void)
-{
- unsigned i;
- int cnt = 0;
-
- if (likely(!debug_suspend))
- return;
-
- pr_info("Enabled clocks:\n");
- for (i = 0; i < num_msm_clocks; i++)
- cnt += clock_debug_print_clock(msm_clocks[i].clk);
-
- if (cnt)
- pr_info("Enabled clock count: %d\n", cnt);
- else
- pr_info("No clocks enabled.\n");
-
-}
+static const struct file_operations fmax_rates_fops = {
+ .open = fmax_rates_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = seq_release,
+};
static int list_rates_show(struct seq_file *m, void *unused)
{
@@ -252,41 +218,38 @@
.release = seq_release,
};
-static int fmax_rates_show(struct seq_file *m, void *unused)
+static int clock_parent_show(struct seq_file *m, void *unused)
{
struct clk *clock = m->private;
- int level = 0;
+ struct clk *parent = clk_get_parent(clock);
- int vdd_level = find_vdd_level(clock, clock->rate);
- if (vdd_level < 0) {
- seq_printf(m, "could not find_vdd_level for %s, %ld\n",
- clock->dbg_name, clock->rate);
- return 0;
- }
- for (level = 0; level < ARRAY_SIZE(clock->fmax); level++) {
- if (vdd_level == level)
- seq_printf(m, "[%lu] ", clock->fmax[level]);
- else
- seq_printf(m, "%lu ", clock->fmax[level]);
- }
- seq_printf(m, "\n");
+ seq_printf(m, "%s\n", (parent ? parent->dbg_name : "None"));
return 0;
}
-static int fmax_rates_open(struct inode *inode, struct file *file)
+static int clock_parent_open(struct inode *inode, struct file *file)
{
- return single_open(file, fmax_rates_show, inode->i_private);
+ return single_open(file, clock_parent_show, inode->i_private);
}
-static const struct file_operations fmax_rates_fops = {
- .open = fmax_rates_open,
+static const struct file_operations clock_parent_fops = {
+ .open = clock_parent_open,
.read = seq_read,
.llseek = seq_lseek,
.release = seq_release,
};
-int __init clock_debug_add(struct clk *clock)
+static struct dentry *debugfs_base;
+static u32 debug_suspend;
+
+struct clk_table {
+ struct list_head node;
+ struct clk_lookup *clocks;
+ size_t num_clocks;
+};
+
+static int clock_debug_add(struct clk *clock)
{
char temp[50], *ptr;
struct dentry *clk_dir;
@@ -333,9 +296,122 @@
S_IRUGO, clk_dir, clock, &fmax_rates_fops))
goto error;
+ if (!debugfs_create_file("parent", S_IRUGO, clk_dir, clock,
+ &clock_parent_fops))
+ goto error;
return 0;
error:
debugfs_remove_recursive(clk_dir);
return -ENOMEM;
}
+static LIST_HEAD(clk_list);
+static DEFINE_SPINLOCK(clk_list_lock);
+
+/**
+ * clock_debug_register() - Add additional clocks to clock debugfs hierarchy
+ * @table: Table of clocks to create debugfs nodes for
+ * @size: Size of @table
+ *
+ * Use this function to register additional clocks in debugfs. The clock debugfs
+ * hierarchy must have already been initialized with clock_debug_init() prior to
+ * calling this function. Unlike clock_debug_init(), this may be called multiple
+ * times with different clock lists and can be used after the kernel has
+ * finished booting.
+ */
+int clock_debug_register(struct clk_lookup *table, size_t size)
+{
+ struct clk_table *clk_table;
+ unsigned long flags;
+ int i;
+
+ clk_table = kmalloc(sizeof(*clk_table), GFP_KERNEL);
+ if (!clk_table)
+ return -ENOMEM;
+
+ clk_table->clocks = table;
+ clk_table->num_clocks = size;
+
+ spin_lock_irqsave(&clk_list_lock, flags);
+ list_add_tail(&clk_table->node, &clk_list);
+ spin_unlock_irqrestore(&clk_list_lock, flags);
+
+ for (i = 0; i < size; i++)
+ clock_debug_add(table[i].clk);
+
+ return 0;
+}
+
+/**
+ * clock_debug_init() - Initialize clock debugfs
+ */
+int __init clock_debug_init(void)
+{
+ debugfs_base = debugfs_create_dir("clk", NULL);
+ if (!debugfs_base)
+ return -ENOMEM;
+ if (!debugfs_create_u32("debug_suspend", S_IRUGO | S_IWUSR,
+ debugfs_base, &debug_suspend)) {
+ debugfs_remove_recursive(debugfs_base);
+ return -ENOMEM;
+ }
+
+ measure = clk_get_sys("debug", "measure");
+ if (IS_ERR(measure))
+ measure = NULL;
+
+ return 0;
+}
+
+static int clock_debug_print_clock(struct clk *c)
+{
+ char *start = "";
+
+ if (!c || !c->prepare_count)
+ return 0;
+
+ pr_info("\t");
+ do {
+ if (c->vdd_class)
+ pr_cont("%s%s:%u:%u [%ld, %lu]", start, c->dbg_name,
+ c->prepare_count, c->count, c->rate,
+ c->vdd_class->cur_level);
+ else
+ pr_cont("%s%s:%u:%u [%ld]", start, c->dbg_name,
+ c->prepare_count, c->count, c->rate);
+ start = " -> ";
+ } while ((c = clk_get_parent(c)));
+
+ pr_cont("\n");
+
+ return 1;
+}
+
+/**
+ * clock_debug_print_enabled() - Print names of enabled clocks for suspend debug
+ *
+ * Print the names of enabled clocks and their parents if debug_suspend is set
+ */
+void clock_debug_print_enabled(void)
+{
+ struct clk_table *table;
+ unsigned long flags;
+ int i, cnt = 0;
+
+ if (likely(!debug_suspend))
+ return;
+
+ pr_info("Enabled clocks:\n");
+ spin_lock_irqsave(&clk_list_lock, flags);
+ list_for_each_entry(table, &clk_list, node) {
+ for (i = 0; i < table->num_clocks; i++)
+ cnt += clock_debug_print_clock(table->clocks[i].clk);
+ }
+ spin_unlock_irqrestore(&clk_list_lock, flags);
+
+ if (cnt)
+ pr_info("Enabled clock count: %d\n", cnt);
+ else
+ pr_info("No clocks enabled.\n");
+
+}
diff --git a/arch/arm/mach-msm/clock-dummy.c b/arch/arm/mach-msm/clock-dummy.c
index 54c9de8..fda7a92 100644
--- a/arch/arm/mach-msm/clock-dummy.c
+++ b/arch/arm/mach-msm/clock-dummy.c
@@ -10,7 +10,7 @@
* GNU General Public License for more details.
*/
-#include "clock.h"
+#include <mach/clk-provider.h>
static int dummy_clk_reset(struct clk *clk, enum clk_reset_action action)
{
diff --git a/arch/arm/mach-msm/clock-fsm9xxx.c b/arch/arm/mach-msm/clock-fsm9xxx.c
index c188ba6..2900d45 100644
--- a/arch/arm/mach-msm/clock-fsm9xxx.c
+++ b/arch/arm/mach-msm/clock-fsm9xxx.c
@@ -12,9 +12,7 @@
*/
#include <linux/kernel.h>
#include <linux/clk.h>
-
-#include <mach/clk.h>
-
+#include <mach/clk-provider.h>
#include "clock.h"
/*
diff --git a/arch/arm/mach-msm/clock-local.c b/arch/arm/mach-msm/clock-local.c
index b952f2f..ca031ad 100644
--- a/arch/arm/mach-msm/clock-local.c
+++ b/arch/arm/mach-msm/clock-local.c
@@ -24,10 +24,10 @@
#include <linux/clk.h>
#include <mach/msm_iomap.h>
+#include <mach/clk-provider.h>
#include <mach/clk.h>
#include <mach/scm-io.h>
-#include "clock.h"
#include "clock-local.h"
#ifdef CONFIG_MSM_SECURE_IO
diff --git a/arch/arm/mach-msm/clock-local.h b/arch/arm/mach-msm/clock-local.h
index 81085ef..1873343 100644
--- a/arch/arm/mach-msm/clock-local.h
+++ b/arch/arm/mach-msm/clock-local.h
@@ -15,7 +15,7 @@
#define __ARCH_ARM_MACH_MSM_CLOCK_LOCAL_H
#include <linux/spinlock.h>
-#include "clock.h"
+#include <mach/clk-provider.h>
#define MN_MODE_DUAL_EDGE 0x2
diff --git a/arch/arm/mach-msm/clock-local2.c b/arch/arm/mach-msm/clock-local2.c
index 3f19b2a..b9c3036 100644
--- a/arch/arm/mach-msm/clock-local2.c
+++ b/arch/arm/mach-msm/clock-local2.c
@@ -24,8 +24,8 @@
#include <linux/clk.h>
#include <mach/clk.h>
+#include <mach/clk-provider.h>
-#include "clock.h"
#include "clock-local2.h"
/*
@@ -474,10 +474,10 @@
if (branch->has_sibling == 1)
return -ENXIO;
- if (branch->parent)
- return rcg_clk_list_rate(branch->parent, n);
+ if (branch->parent && branch->parent->ops->list_rate)
+ return branch->parent->ops->list_rate(branch->parent, n);
else
- return 0;
+ return -ENXIO;
}
static enum handoff branch_clk_handoff(struct clk *c)
diff --git a/arch/arm/mach-msm/clock-local2.h b/arch/arm/mach-msm/clock-local2.h
index 46e9e0c..101dc2d 100644
--- a/arch/arm/mach-msm/clock-local2.h
+++ b/arch/arm/mach-msm/clock-local2.h
@@ -15,7 +15,8 @@
#define __ARCH_ARM_MACH_MSM_CLOCK_LOCAL_2_H
#include <linux/spinlock.h>
-#include "clock.h"
+#include <mach/clk-provider.h>
+#include <mach/clk.h>
/*
* Generic frequency-definition structs and macros
diff --git a/arch/arm/mach-msm/clock-mdss-8974.c b/arch/arm/mach-msm/clock-mdss-8974.c
index 4d147c3..1603c93 100644
--- a/arch/arm/mach-msm/clock-mdss-8974.c
+++ b/arch/arm/mach-msm/clock-mdss-8974.c
@@ -20,8 +20,8 @@
#include <asm/processor.h>
#include <mach/msm_iomap.h>
+#include <mach/clk-provider.h>
-#include "clock.h"
#include "clock-mdss-8974.h"
#define REG_R(addr) readl_relaxed(addr)
@@ -67,7 +67,9 @@
static int pll_byte_clk_rate;
static int pll_pclk_rate;
static int pll_initialized;
+static int pll_enabled;
static struct clk *mdss_dsi_ahb_clk;
+static unsigned long dsi_pll_rate;
static void __iomem *hdmi_phy_base;
static void __iomem *hdmi_phy_pll_base;
@@ -135,6 +137,7 @@
int pll_divcfg1, pll_divcfg2;
int half_bitclk_rate;
+ pr_debug("%s:\n", __func__);
if (pll_initialized)
return 0;
@@ -193,10 +196,13 @@
REG_W(0x00, mdss_dsi_base + 0x0290); /* CAL CFG9 */
REG_W(0x20, mdss_dsi_base + 0x029c); /* EFUSE CFG */
+ dsi_pll_rate = rate;
+
pll_byte_clk_rate = 53000000;
pll_pclk_rate = 105000000;
clk_disable(mdss_dsi_ahb_clk);
+ pr_debug("%s: **** PLL initialized success\n", __func__);
pll_initialized = 1;
return 0;
@@ -206,11 +212,19 @@
{
u32 status;
u32 max_reads, timeout_us;
- static int pll_enabled;
+ int i;
if (pll_enabled)
return 0;
+ if (!pll_initialized) {
+ if (dsi_pll_rate)
+ mdss_dsi_pll_byte_set_rate(c, dsi_pll_rate);
+ else
+ pr_err("%s: Calling clk_en before set_rate\n",
+ __func__);
+ }
+
if (!mdss_dsi_ahb_clk) {
pr_err("%s: mdss_dsi_ahb_clk not initialized\n",
__func__);
@@ -218,26 +232,39 @@
}
clk_enable(mdss_dsi_ahb_clk);
- /* PLL power up */
- REG_W(0x01, mdss_dsi_base + 0x0220); /* GLB CFG */
- REG_W(0x05, mdss_dsi_base + 0x0220); /* GLB CFG */
- udelay(20);
- REG_W(0x07, mdss_dsi_base + 0x0220); /* GLB CFG */
- udelay(20);
- REG_W(0x0f, mdss_dsi_base + 0x0220); /* GLB CFG */
- /* poll for PLL ready status */
- max_reads = 20;
- timeout_us = 100;
- if (readl_poll_timeout_noirq((mdss_dsi_base + 0x02c0),
- status,
- ((status & 0x01) == 1),
- max_reads, timeout_us)) {
+ /* PLL power up */
+ for (i = 0; i < 3; i++) {
+ REG_W(0x01, mdss_dsi_base + 0x0220); /* GLB CFG */
+ REG_W(0x05, mdss_dsi_base + 0x0220); /* GLB CFG */
+ udelay(20);
+ REG_W(0x07, mdss_dsi_base + 0x0220); /* GLB CFG */
+ udelay(20);
+ REG_W(0x0f, mdss_dsi_base + 0x0220); /* GLB CFG */
+
+ /* poll for PLL ready status */
+ max_reads = 20;
+ timeout_us = 100;
+ if (readl_poll_timeout_noirq((mdss_dsi_base + 0x02c0),
+ status,
+ ((status & 0x01) == 1),
+ max_reads, timeout_us)) {
+ pr_debug("%s: DSI PLL status=%x failed to Lock\n",
+ __func__, status);
+ pr_debug("%s:Trying to power UP PLL again\n",
+ __func__);
+ } else
+ break;
+ }
+
+ if ((status & 0x01) != 1) {
pr_err("%s: DSI PLL status=%x failed to Lock\n",
__func__, status);
clk_disable(mdss_dsi_ahb_clk);
return -EINVAL;
}
+
+ pr_debug("%s: **** PLL Lock success\n", __func__);
clk_disable(mdss_dsi_ahb_clk);
pll_enabled = 1;
@@ -253,6 +280,9 @@
clk_enable(mdss_dsi_ahb_clk);
writel_relaxed(0x00, mdss_dsi_base + 0x0220); /* GLB CFG */
clk_disable(mdss_dsi_ahb_clk);
+ pr_debug("%s: **** disable pll Initialize\n", __func__);
+ pll_initialized = 0;
+ pll_enabled = 0;
}
void hdmi_pll_disable(void)
diff --git a/arch/arm/mach-msm/clock-pcom.c b/arch/arm/mach-msm/clock-pcom.c
index 428423a..801b40a 100644
--- a/arch/arm/mach-msm/clock-pcom.c
+++ b/arch/arm/mach-msm/clock-pcom.c
@@ -17,6 +17,7 @@
#include <linux/err.h>
#include <mach/clk.h>
+#include <mach/clk-provider.h>
#include <mach/socinfo.h>
#include <mach/proc_comm.h>
diff --git a/arch/arm/mach-msm/clock-pcom.h b/arch/arm/mach-msm/clock-pcom.h
index 723c53c..82a90ab 100644
--- a/arch/arm/mach-msm/clock-pcom.h
+++ b/arch/arm/mach-msm/clock-pcom.h
@@ -13,6 +13,8 @@
#ifndef __ARCH_ARM_MACH_MSM_CLOCK_PCOM_H
#define __ARCH_ARM_MACH_MSM_CLOCK_PCOM_H
+#include <mach/clk-provider.h>
+
/* clock IDs used by the modem processor */
#define P_ACPU_CLK 0 /* Applications processor clock */
diff --git a/arch/arm/mach-msm/clock-pll.c b/arch/arm/mach-msm/clock-pll.c
index d5831e2..23941d7 100644
--- a/arch/arm/mach-msm/clock-pll.c
+++ b/arch/arm/mach-msm/clock-pll.c
@@ -247,7 +247,7 @@
#define PLL_LOCKED_BIT BIT(16)
-int msm8974_pll_clk_enable(struct clk *c)
+int sr_hpm_lp_pll_clk_enable(struct clk *c)
{
unsigned long flags;
struct pll_clk *pll = to_pll_clk(c);
@@ -255,23 +255,12 @@
int ret = 0;
spin_lock_irqsave(&pll_reg_lock, flags);
- mode = readl_relaxed(PLL_MODE_REG(pll));
- /* Disable PLL bypass mode. */
- mode |= PLL_BYPASSNL;
+
+ /* Disable PLL bypass mode and de-assert reset. */
+ mode = PLL_BYPASSNL | PLL_RESET_N;
writel_relaxed(mode, PLL_MODE_REG(pll));
- /*
- * H/W requires a 5us delay between disabling the bypass and
- * de-asserting the reset. Delay 10us just to be safe.
- */
- mb();
- udelay(10);
-
- /* De-assert active-low PLL reset. */
- mode |= PLL_RESET_N;
- writel_relaxed(mode, PLL_MODE_REG(pll));
-
- /* Wait for pll to enable. */
+ /* Wait for pll to lock. */
for (count = ENABLE_WAIT_MAX_LOOPS; count > 0; count--) {
if (readl_relaxed(PLL_STATUS_REG(pll)) & PLL_LOCKED_BIT)
break;
@@ -453,7 +442,8 @@
.is_enabled = pll_clk_is_enabled,
};
-static void __init __set_fsm_mode(void __iomem *mode_reg)
+static void __init __set_fsm_mode(void __iomem *mode_reg,
+ u32 bias_count, u32 lock_count)
{
u32 regval = readl_relaxed(mode_reg);
@@ -463,12 +453,12 @@
/* Program bias count */
regval &= ~BM(19, 14);
- regval |= BVAL(19, 14, 0x1);
+ regval |= BVAL(19, 14, bias_count);
writel_relaxed(regval, mode_reg);
/* Program lock count */
regval &= ~BM(13, 8);
- regval |= BVAL(13, 8, 0x8);
+ regval |= BVAL(13, 8, lock_count);
writel_relaxed(regval, mode_reg);
/* Enable PLL FSM voting */
@@ -476,7 +466,7 @@
writel_relaxed(regval, mode_reg);
}
-void __init configure_pll(struct pll_config *config,
+void __init __configure_pll(struct pll_config *config,
struct pll_config_regs *regs, u32 ena_fsm_mode)
{
u32 regval;
@@ -509,8 +499,21 @@
regval &= ~config->vco_mask;
regval |= config->vco_val;
writel_relaxed(regval, PLL_CONFIG_REG(regs));
-
- /* Configure in FSM mode if necessary */
- if (ena_fsm_mode)
- __set_fsm_mode(PLL_MODE_REG(regs));
}
+
+void __init configure_sr_pll(struct pll_config *config,
+ struct pll_config_regs *regs, u32 ena_fsm_mode)
+{
+ __configure_pll(config, regs, ena_fsm_mode);
+ if (ena_fsm_mode)
+ __set_fsm_mode(PLL_MODE_REG(regs), 0x1, 0x8);
+}
+
+void __init configure_sr_hpm_lp_pll(struct pll_config *config,
+ struct pll_config_regs *regs, u32 ena_fsm_mode)
+{
+ __configure_pll(config, regs, ena_fsm_mode);
+ if (ena_fsm_mode)
+ __set_fsm_mode(PLL_MODE_REG(regs), 0x1, 0x0);
+}
+
diff --git a/arch/arm/mach-msm/clock-pll.h b/arch/arm/mach-msm/clock-pll.h
index 90f8a95..5c7c304 100644
--- a/arch/arm/mach-msm/clock-pll.h
+++ b/arch/arm/mach-msm/clock-pll.h
@@ -15,6 +15,8 @@
#ifndef __ARCH_ARM_MACH_MSM_CLOCK_PLL_H
#define __ARCH_ARM_MACH_MSM_CLOCK_PLL_H
+#include <mach/clk-provider.h>
+
/**
* enum - For PLL IDs
*/
@@ -111,7 +113,7 @@
}
int sr_pll_clk_enable(struct clk *c);
-int msm8974_pll_clk_enable(struct clk *c);
+int sr_hpm_lp_pll_clk_enable(struct clk *c);
/*
* PLL vote clock APIs
@@ -146,6 +148,8 @@
void *const __iomem *base;
};
-void __init configure_pll(struct pll_config *, struct pll_config_regs *, u32);
-
+void configure_sr_pll(struct pll_config *config, struct pll_config_regs *regs,
+ u32 ena_fsm_mode);
+void configure_sr_hpm_lp_pll(struct pll_config *config,
+ struct pll_config_regs *, u32 ena_fsm_mode);
#endif
diff --git a/arch/arm/mach-msm/clock-rpm.c b/arch/arm/mach-msm/clock-rpm.c
index 149a0511..e06eb4b 100644
--- a/arch/arm/mach-msm/clock-rpm.c
+++ b/arch/arm/mach-msm/clock-rpm.c
@@ -12,10 +12,9 @@
*/
#include <linux/err.h>
-#include <mach/clk.h>
+#include <mach/clk-provider.h>
#include "rpm_resources.h"
-#include "clock.h"
#include "clock-rpm.h"
#define __clk_rpmrs_set_rate(r, value, ctx, noirq) \
diff --git a/arch/arm/mach-msm/clock-rpm.h b/arch/arm/mach-msm/clock-rpm.h
index 7952a33..2f0b729 100644
--- a/arch/arm/mach-msm/clock-rpm.h
+++ b/arch/arm/mach-msm/clock-rpm.h
@@ -16,6 +16,7 @@
#include <mach/rpm.h>
#include <mach/rpm-smd.h>
+#include <mach/clk-provider.h>
#define RPM_SMD_KEY_RATE 0x007A484B
#define RPM_SMD_KEY_ENABLE 0x62616E45
diff --git a/arch/arm/mach-msm/clock-voter.c b/arch/arm/mach-msm/clock-voter.c
index 3e1cbb9..fa170bf4 100644
--- a/arch/arm/mach-msm/clock-voter.c
+++ b/arch/arm/mach-msm/clock-voter.c
@@ -14,8 +14,7 @@
#include <linux/err.h>
#include <linux/mutex.h>
#include <linux/clk.h>
-
-#include "clock.h"
+#include <mach/clk-provider.h>
#include "clock-voter.h"
static DEFINE_MUTEX(voter_clk_lock);
diff --git a/arch/arm/mach-msm/clock-voter.h b/arch/arm/mach-msm/clock-voter.h
index 407aac6..82c071b 100644
--- a/arch/arm/mach-msm/clock-voter.h
+++ b/arch/arm/mach-msm/clock-voter.h
@@ -14,6 +14,8 @@
#ifndef __ARCH_ARM_MACH_MSM_CLOCK_VOTER_H
#define __ARCH_ARM_MACH_MSM_CLOCK_VOTER_H
+#include <mach/clk-provider.h>
+
struct clk_ops;
extern struct clk_ops clk_ops_voter;
diff --git a/arch/arm/mach-msm/clock.c b/arch/arm/mach-msm/clock.c
index 27f2405..c30bd79 100644
--- a/arch/arm/mach-msm/clock.c
+++ b/arch/arm/mach-msm/clock.c
@@ -23,7 +23,7 @@
#include <linux/clkdev.h>
#include <linux/list.h>
#include <trace/events/power.h>
-
+#include <mach/clk-provider.h>
#include "clock.h"
struct handoff_clk {
@@ -72,15 +72,14 @@
/* Vote for a voltage level. */
int vote_vdd_level(struct clk_vdd_class *vdd_class, int level)
{
- unsigned long flags;
int rc;
- spin_lock_irqsave(&vdd_class->lock, flags);
+ mutex_lock(&vdd_class->lock);
vdd_class->level_votes[level]++;
rc = update_vdd(vdd_class);
if (rc)
vdd_class->level_votes[level]--;
- spin_unlock_irqrestore(&vdd_class->lock, flags);
+ mutex_unlock(&vdd_class->lock);
return rc;
}
@@ -88,10 +87,9 @@
/* Remove vote for a voltage level. */
int unvote_vdd_level(struct clk_vdd_class *vdd_class, int level)
{
- unsigned long flags;
int rc = 0;
- spin_lock_irqsave(&vdd_class->lock, flags);
+ mutex_lock(&vdd_class->lock);
if (WARN(!vdd_class->level_votes[level],
"Reference counts are incorrect for %s level %d\n",
vdd_class->class_name, level))
@@ -101,7 +99,7 @@
if (rc)
vdd_class->level_votes[level]++;
out:
- spin_unlock_irqrestore(&vdd_class->lock, flags);
+ mutex_unlock(&vdd_class->lock);
return rc;
}
@@ -135,6 +133,18 @@
unvote_vdd_level(clk->vdd_class, level);
}
+/* Returns true if the rate is valid without voting for it */
+static bool is_rate_valid(struct clk *clk, unsigned long rate)
+{
+ int level;
+
+ if (!clk->vdd_class)
+ return true;
+
+ level = find_vdd_level(clk, rate);
+ return level >= 0;
+}
+
int clk_prepare(struct clk *clk)
{
int ret = 0;
@@ -333,14 +343,16 @@
/* Enforce vdd requirements for target frequency. */
rc = vote_rate_vdd(clk, rate);
if (rc)
- goto err_vote_vdd;
+ goto out;
rc = clk->ops->set_rate(clk, rate);
if (rc)
goto err_set_rate;
/* Release vdd requirements for starting frequency. */
unvote_rate_vdd(clk, start_rate);
- } else {
+ } else if (is_rate_valid(clk, rate)) {
rc = clk->ops->set_rate(clk, rate);
+ } else {
+ rc = -EINVAL;
}
if (!rc)
@@ -351,7 +363,6 @@
err_set_rate:
unvote_rate_vdd(clk, rate);
-err_vote_vdd:
goto out;
}
EXPORT_SYMBOL(clk_set_rate);
@@ -412,7 +423,32 @@
}
EXPORT_SYMBOL(clk_set_flags);
-static struct clock_init_data __initdata *clk_init_data;
+static struct clock_init_data *clk_init_data;
+
+/**
+ * msm_clock_register() - Register additional clock tables
+ * @table: Table of clocks
+ * @size: Size of @table
+ *
+ * Upon return, clock APIs may be used to control clocks registered using this
+ * function. This API may only be used after msm_clock_init() has completed.
+ * Unlike msm_clock_init(), this function may be called multiple times with
+ * different clock lists and used after the kernel has finished booting.
+ */
+int msm_clock_register(struct clk_lookup *table, size_t size)
+{
+ if (!clk_init_data)
+ return -ENODEV;
+
+ if (!table)
+ return -EINVAL;
+
+ clkdev_add_table(table, size);
+ clock_debug_register(table, size);
+
+ return 0;
+}
+EXPORT_SYMBOL(msm_clock_register);
static enum handoff __init __handoff_clk(struct clk *clk)
{
@@ -466,13 +502,23 @@
return ret;
}
-void __init msm_clock_init(struct clock_init_data *data)
+/**
+ * msm_clock_init() - Register and initialize a clock driver
+ * @data: Driver-specific clock initialization data
+ *
+ * Upon return from this call, clock APIs may be used to control
+ * clocks registered with this API.
+ */
+int __init msm_clock_init(struct clock_init_data *data)
{
unsigned n;
struct clk_lookup *clock_tbl;
size_t num_clocks;
struct clk *clk;
+ if (!data)
+ return -EINVAL;
+
clk_init_data = data;
if (clk_init_data->pre_init)
clk_init_data->pre_init();
@@ -499,16 +545,17 @@
if (clk_init_data->post_init)
clk_init_data->post_init();
+
+ clock_debug_init();
+ clock_debug_register(clock_tbl, num_clocks);
+
+ return 0;
}
static int __init clock_late_init(void)
{
struct handoff_clk *h, *h_temp;
- int n, ret = 0;
-
- clock_debug_init(clk_init_data);
- for (n = 0; n < clk_init_data->size; n++)
- clock_debug_add(clk_init_data->table[n].clk);
+ int ret = 0;
pr_info("%s: Removing enables held for handed-off clocks\n", __func__);
list_for_each_entry_safe(h, h_temp, &handoff_list, list) {
diff --git a/arch/arm/mach-msm/clock.h b/arch/arm/mach-msm/clock.h
index 45d2f71..48f897b 100644
--- a/arch/arm/mach-msm/clock.h
+++ b/arch/arm/mach-msm/clock.h
@@ -1,7 +1,5 @@
-/* arch/arm/mach-msm/clock.h
- *
- * Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2007-2012, Code Aurora Forum. All rights reserved.
+/*
+ * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
@@ -17,127 +15,7 @@
#ifndef __ARCH_ARM_MACH_MSM_CLOCK_H
#define __ARCH_ARM_MACH_MSM_CLOCK_H
-#include <linux/types.h>
-#include <linux/list.h>
#include <linux/clkdev.h>
-#include <linux/spinlock.h>
-#include <linux/mutex.h>
-
-#include <mach/clk.h>
-
-#define CLKFLAG_INVERT 0x00000001
-#define CLKFLAG_NOINVERT 0x00000002
-#define CLKFLAG_NONEST 0x00000004
-#define CLKFLAG_NORESET 0x00000008
-#define CLKFLAG_RETAIN 0x00000040
-#define CLKFLAG_NORETAIN 0x00000080
-#define CLKFLAG_SKIP_HANDOFF 0x00000100
-#define CLKFLAG_MIN 0x00000400
-#define CLKFLAG_MAX 0x00000800
-
-/*
- * Bit manipulation macros
- */
-#define BM(msb, lsb) (((((uint32_t)-1) << (31-msb)) >> (31-msb+lsb)) << lsb)
-#define BVAL(msb, lsb, val) (((val) << lsb) & BM(msb, lsb))
-
-/*
- * Halt/Status Checking Mode Macros
- */
-#define HALT 0 /* Bit pol: 1 = halted */
-#define NOCHECK 1 /* No bit to check, do nothing */
-#define HALT_VOTED 2 /* Bit pol: 1 = halted; delay on disable */
-#define ENABLE 3 /* Bit pol: 1 = running */
-#define ENABLE_VOTED 4 /* Bit pol: 1 = running; delay on disable */
-#define DELAY 5 /* No bit to check, just delay */
-
-#define MAX_VDD_LEVELS 4
-
-/**
- * struct clk_vdd_class - Voltage scaling class
- * @class_name: name of the class
- * @set_vdd: function to call when applying a new voltage setting
- * @level_votes: array of votes for each level
- * @cur_level: the currently set voltage level
- * @lock: lock to protect this struct
- */
-struct clk_vdd_class {
- const char *class_name;
- int (*set_vdd)(struct clk_vdd_class *v_class, int level);
- int level_votes[MAX_VDD_LEVELS];
- unsigned long cur_level;
- spinlock_t lock;
-};
-
-#define DEFINE_VDD_CLASS(_name, _set_vdd) \
- struct clk_vdd_class _name = { \
- .class_name = #_name, \
- .set_vdd = _set_vdd, \
- .cur_level = ARRAY_SIZE(_name.level_votes), \
- .lock = __SPIN_LOCK_UNLOCKED(lock) \
- }
-
-enum handoff {
- HANDOFF_ENABLED_CLK,
- HANDOFF_DISABLED_CLK,
- HANDOFF_UNKNOWN_RATE,
-};
-
-struct clk_ops {
- int (*prepare)(struct clk *clk);
- int (*enable)(struct clk *clk);
- void (*disable)(struct clk *clk);
- void (*unprepare)(struct clk *clk);
- void (*enable_hwcg)(struct clk *clk);
- void (*disable_hwcg)(struct clk *clk);
- int (*in_hwcg_mode)(struct clk *clk);
- enum handoff (*handoff)(struct clk *clk);
- int (*reset)(struct clk *clk, enum clk_reset_action action);
- int (*set_rate)(struct clk *clk, unsigned long rate);
- int (*set_max_rate)(struct clk *clk, unsigned long rate);
- int (*set_flags)(struct clk *clk, unsigned flags);
- unsigned long (*get_rate)(struct clk *clk);
- int (*list_rate)(struct clk *clk, unsigned n);
- int (*is_enabled)(struct clk *clk);
- long (*round_rate)(struct clk *clk, unsigned long rate);
- int (*set_parent)(struct clk *clk, struct clk *parent);
- struct clk *(*get_parent)(struct clk *clk);
- bool (*is_local)(struct clk *clk);
-};
-
-/**
- * struct clk
- * @prepare_count: prepare refcount
- * @prepare_lock: protects clk_prepare()/clk_unprepare() path and @prepare_count
- * @count: enable refcount
- * @lock: protects clk_enable()/clk_disable() path and @count
- * @depends: non-direct parent of clock to enable when this clock is enabled
- * @vdd_class: voltage scaling requirement class
- * @fmax: maximum frequency in Hz supported at each voltage level
- */
-struct clk {
- uint32_t flags;
- struct clk_ops *ops;
- const char *dbg_name;
- struct clk *depends;
- struct clk_vdd_class *vdd_class;
- unsigned long fmax[MAX_VDD_LEVELS];
- unsigned long rate;
-
- struct list_head children;
- struct list_head siblings;
-
- unsigned count;
- spinlock_t lock;
- unsigned prepare_count;
- struct mutex prepare_lock;
-};
-
-#define CLK_INIT(name) \
- .lock = __SPIN_LOCK_UNLOCKED((name).lock), \
- .prepare_lock = __MUTEX_INITIALIZER((name).prepare_lock), \
- .children = LIST_HEAD_INIT((name).children), \
- .siblings = LIST_HEAD_INIT((name).siblings)
/**
* struct clock_init_data - SoC specific clock initialization data
@@ -171,30 +49,20 @@
extern struct clock_init_data msm8974_clock_init_data;
extern struct clock_init_data msm8974_rumi_clock_init_data;
-void msm_clock_init(struct clock_init_data *data);
-int vote_vdd_level(struct clk_vdd_class *vdd_class, int level);
-int unvote_vdd_level(struct clk_vdd_class *vdd_class, int level);
+int msm_clock_init(struct clock_init_data *data);
int find_vdd_level(struct clk *clk, unsigned long rate);
#ifdef CONFIG_DEBUG_FS
-int clock_debug_init(struct clock_init_data *data);
-int clock_debug_add(struct clk *clock);
+int clock_debug_init(void);
+int clock_debug_register(struct clk_lookup *t, size_t s);
void clock_debug_print_enabled(void);
#else
-static inline int clock_debug_init(struct clock_init_data *data) { return 0; }
-static inline int clock_debug_add(struct clk *clock) { return 0; }
+static inline int clock_debug_init(void) { return 0; }
+static inline int clock_debug_register(struct clk_lookup *t, size_t s)
+{
+ return 0;
+}
static inline void clock_debug_print_enabled(void) { return; }
#endif
-extern struct clk dummy_clk;
-
-#define CLK_DUMMY(clk_name, clk_id, clk_dev, flags) { \
- .con_id = clk_name, \
- .dev_id = clk_dev, \
- .clk = &dummy_clk, \
- }
-
-#define CLK_LOOKUP(con, c, dev) { .con_id = con, .clk = &c, .dev_id = dev }
-
#endif
-
diff --git a/arch/arm/mach-msm/cpufreq.c b/arch/arm/mach-msm/cpufreq.c
index 05bd56ef..6c9b413 100644
--- a/arch/arm/mach-msm/cpufreq.c
+++ b/arch/arm/mach-msm/cpufreq.c
@@ -32,19 +32,6 @@
#include "acpuclock.h"
-#ifdef CONFIG_SMP
-struct cpufreq_work_struct {
- struct work_struct work;
- struct cpufreq_policy *policy;
- struct completion complete;
- int frequency;
- int status;
-};
-
-static DEFINE_PER_CPU(struct cpufreq_work_struct, cpufreq_work);
-static struct workqueue_struct *msm_cpufreq_wq;
-#endif
-
struct cpufreq_suspend_t {
struct mutex suspend_mutex;
int device_suspended;
@@ -91,45 +78,6 @@
return ret;
}
-#ifdef CONFIG_SMP
-static int __cpuinit msm_cpufreq_cpu_callback(struct notifier_block *nfb,
- unsigned long action, void *hcpu)
-{
- unsigned int cpu = (unsigned long)hcpu;
-
- switch (action) {
- case CPU_ONLINE:
- case CPU_ONLINE_FROZEN:
- per_cpu(cpufreq_suspend, cpu).device_suspended = 0;
- break;
- case CPU_DOWN_PREPARE:
- case CPU_DOWN_PREPARE_FROZEN:
- mutex_lock(&per_cpu(cpufreq_suspend, cpu).suspend_mutex);
- per_cpu(cpufreq_suspend, cpu).device_suspended = 1;
- mutex_unlock(&per_cpu(cpufreq_suspend, cpu).suspend_mutex);
- break;
- case CPU_DOWN_FAILED:
- case CPU_DOWN_FAILED_FROZEN:
- per_cpu(cpufreq_suspend, cpu).device_suspended = 0;
- break;
- }
- return NOTIFY_OK;
-}
-
-static struct notifier_block __refdata msm_cpufreq_cpu_notifier = {
- .notifier_call = msm_cpufreq_cpu_callback,
-};
-
-static void set_cpu_work(struct work_struct *work)
-{
- struct cpufreq_work_struct *cpu_work =
- container_of(work, struct cpufreq_work_struct, work);
-
- cpu_work->status = set_cpu_freq(cpu_work->policy, cpu_work->frequency);
- complete(&cpu_work->complete);
-}
-#endif
-
static int msm_cpufreq_target(struct cpufreq_policy *policy,
unsigned int target_freq,
unsigned int relation)
@@ -137,19 +85,12 @@
int ret = -EFAULT;
int index;
struct cpufreq_frequency_table *table;
-#ifdef CONFIG_SMP
- struct cpufreq_work_struct *cpu_work = NULL;
- cpumask_var_t mask;
if (!cpu_active(policy->cpu)) {
pr_info("cpufreq: cpu %d is not active.\n", policy->cpu);
return -ENODEV;
}
- if (!alloc_cpumask_var(&mask, GFP_KERNEL))
- return -ENOMEM;
-#endif
-
mutex_lock(&per_cpu(cpufreq_suspend, policy->cpu).suspend_mutex);
if (per_cpu(cpufreq_suspend, policy->cpu).device_suspended) {
@@ -167,39 +108,13 @@
goto done;
}
-#ifdef CONFIG_CPU_FREQ_DEBUG
pr_debug("CPU[%d] target %d relation %d (%d-%d) selected %d\n",
policy->cpu, target_freq, relation,
policy->min, policy->max, table[index].frequency);
-#endif
-#ifdef CONFIG_SMP
- cpu_work = &per_cpu(cpufreq_work, policy->cpu);
- cpu_work->policy = policy;
- cpu_work->frequency = table[index].frequency;
- cpu_work->status = -ENODEV;
-
- cpumask_clear(mask);
- cpumask_set_cpu(policy->cpu, mask);
- if (cpumask_equal(mask, ¤t->cpus_allowed)) {
- ret = set_cpu_freq(cpu_work->policy, cpu_work->frequency);
- goto done;
- } else {
- cancel_work_sync(&cpu_work->work);
- INIT_COMPLETION(cpu_work->complete);
- queue_work_on(policy->cpu, msm_cpufreq_wq, &cpu_work->work);
- wait_for_completion(&cpu_work->complete);
- }
-
- ret = cpu_work->status;
-#else
ret = set_cpu_freq(policy, table[index].frequency);
-#endif
done:
-#ifdef CONFIG_SMP
- free_cpumask_var(mask);
-#endif
mutex_unlock(&per_cpu(cpufreq_suspend, policy->cpu).suspend_mutex);
return ret;
}
@@ -282,10 +197,6 @@
int cur_freq;
int index;
struct cpufreq_frequency_table *table;
-#ifdef CONFIG_SMP
- struct cpufreq_work_struct *cpu_work = NULL;
-#endif
-
table = cpufreq_frequency_get_table(policy->cpu);
if (table == NULL)
@@ -314,7 +225,7 @@
CPUFREQ_RELATION_H, &index) &&
cpufreq_frequency_table_target(policy, table, cur_freq,
CPUFREQ_RELATION_L, &index)) {
- pr_info("cpufreq: cpu%d at invalid freq: %d\n",
+ pr_info("%s: cpu%d at invalid freq: %d\n", __func__,
policy->cpu, cur_freq);
return -EINVAL;
}
@@ -334,15 +245,39 @@
policy->cpuinfo.transition_latency =
acpuclk_get_switch_time() * NSEC_PER_USEC;
-#ifdef CONFIG_SMP
- cpu_work = &per_cpu(cpufreq_work, policy->cpu);
- INIT_WORK(&cpu_work->work, set_cpu_work);
- init_completion(&cpu_work->complete);
-#endif
return 0;
}
+static int __cpuinit msm_cpufreq_cpu_callback(struct notifier_block *nfb,
+ unsigned long action, void *hcpu)
+{
+ unsigned int cpu = (unsigned long)hcpu;
+
+ switch (action) {
+ case CPU_ONLINE:
+ case CPU_ONLINE_FROZEN:
+ per_cpu(cpufreq_suspend, cpu).device_suspended = 0;
+ break;
+ case CPU_DOWN_PREPARE:
+ case CPU_DOWN_PREPARE_FROZEN:
+ mutex_lock(&per_cpu(cpufreq_suspend, cpu).suspend_mutex);
+ per_cpu(cpufreq_suspend, cpu).device_suspended = 1;
+ mutex_unlock(&per_cpu(cpufreq_suspend, cpu).suspend_mutex);
+ break;
+ case CPU_DOWN_FAILED:
+ case CPU_DOWN_FAILED_FROZEN:
+ per_cpu(cpufreq_suspend, cpu).device_suspended = 0;
+ break;
+ }
+
+ return NOTIFY_OK;
+}
+
+static struct notifier_block __refdata msm_cpufreq_cpu_notifier = {
+ .notifier_call = msm_cpufreq_cpu_callback,
+};
+
static int msm_cpufreq_suspend(void)
{
int cpu;
@@ -382,6 +317,10 @@
}
}
+static struct notifier_block msm_cpufreq_pm_notifier = {
+ .notifier_call = msm_cpufreq_pm_event,
+};
+
static struct freq_attr *msm_freq_attr[] = {
&cpufreq_freq_attr_scaling_available_freqs,
NULL,
@@ -398,10 +337,6 @@
.attr = msm_freq_attr,
};
-static struct notifier_block msm_cpufreq_pm_notifier = {
- .notifier_call = msm_cpufreq_pm_event,
-};
-
static int __init msm_cpufreq_register(void)
{
int cpu;
@@ -411,10 +346,7 @@
per_cpu(cpufreq_suspend, cpu).device_suspended = 0;
}
-#ifdef CONFIG_SMP
- msm_cpufreq_wq = create_workqueue("msm-cpufreq");
register_hotcpu_notifier(&msm_cpufreq_cpu_notifier);
-#endif
register_pm_notifier(&msm_cpufreq_pm_notifier);
return cpufreq_register_driver(&msm_cpufreq_driver);
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index ebdb335..e8baf6a 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -26,6 +26,7 @@
#include <mach/msm_sps.h>
#include <mach/dma.h>
#include <mach/msm_dsps.h>
+#include <mach/clk-provider.h>
#include <sound/msm-dai-q6.h>
#include <sound/apr_audio.h>
#include <mach/msm_tsif.h>
@@ -98,6 +99,23 @@
/* Address of PCIE20 */
#define PCIE20_PHYS 0x1b500000
#define PCIE20_SIZE SZ_4K
+#define MSM8064_PC_CNTR_PHYS (APQ8064_IMEM_PHYS + 0x664)
+#define MSM8064_PC_CNTR_SIZE 0x40
+
+static struct resource msm8064_resources_pccntr[] = {
+ {
+ .start = MSM8064_PC_CNTR_PHYS,
+ .end = MSM8064_PC_CNTR_PHYS + MSM8064_PC_CNTR_SIZE,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+struct platform_device msm8064_pc_cntr = {
+ .name = "pc-cntr",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(msm8064_resources_pccntr),
+ .resource = msm8064_resources_pccntr,
+};
static struct msm_watchdog_pdata msm_watchdog_pdata = {
.pet_time = 10000,
@@ -1944,6 +1962,11 @@
.end = 0x10008000 + SZ_256 - 1,
.flags = IORESOURCE_MEM,
},
+ {
+ .start = GSS_A5_WDOG_EXPIRED,
+ .end = GSS_A5_WDOG_EXPIRED,
+ .flags = IORESOURCE_IRQ,
+ },
};
struct platform_device msm_gss = {
@@ -2316,8 +2339,8 @@
};
static struct msm_rpmstats_platform_data msm_rpm_stat_pdata = {
- .phys_addr_base = 0x0010D204,
- .phys_size = SZ_8K,
+ .phys_addr_base = 0x0010DD04,
+ .phys_size = SZ_256,
};
struct platform_device apq8064_rpm_stat_device = {
@@ -2349,17 +2372,18 @@
/* Sensors DSPS platform data */
-#define PPSS_DSPS_TCM_CODE_BASE 0x12000000
-#define PPSS_DSPS_TCM_CODE_SIZE 0x28000
-#define PPSS_DSPS_TCM_BUF_BASE 0x12040000
-#define PPSS_DSPS_TCM_BUF_SIZE 0x4000
-#define PPSS_DSPS_PIPE_BASE 0x12800000
-#define PPSS_DSPS_PIPE_SIZE 0x4000
-#define PPSS_DSPS_DDR_BASE 0x8fe00000
-#define PPSS_DSPS_DDR_SIZE 0x100000
-#define PPSS_SMEM_BASE 0x80000000
-#define PPSS_SMEM_SIZE 0x200000
-#define PPSS_REG_PHYS_BASE 0x12080000
+#define PPSS_DSPS_TCM_CODE_BASE 0x12000000
+#define PPSS_DSPS_TCM_CODE_SIZE 0x28000
+#define PPSS_DSPS_TCM_BUF_BASE 0x12040000
+#define PPSS_DSPS_TCM_BUF_SIZE 0x4000
+#define PPSS_DSPS_PIPE_BASE 0x12800000
+#define PPSS_DSPS_PIPE_SIZE 0x4000
+#define PPSS_DSPS_DDR_BASE 0x8fe00000
+#define PPSS_DSPS_DDR_SIZE 0x100000
+#define PPSS_SMEM_BASE 0x80000000
+#define PPSS_SMEM_SIZE 0x200000
+#define PPSS_REG_PHYS_BASE 0x12080000
+#define PPSS_WDOG_UNMASKED_INT_EN 0x1808
static struct dsps_clk_info dsps_clks[] = {};
static struct dsps_regulator_info dsps_regs[] = {};
@@ -2387,6 +2411,7 @@
.ddr_size = PPSS_DSPS_DDR_SIZE,
.smem_start = PPSS_SMEM_BASE,
.smem_size = PPSS_SMEM_SIZE,
+ .ppss_wdog_unmasked_int_en_reg = PPSS_WDOG_UNMASKED_INT_EN,
.signature = DSPS_SIGNATURE,
};
@@ -2749,8 +2774,8 @@
{
.src = MSM_BUS_MASTER_VIDEO_CAP,
.dst = MSM_BUS_SLAVE_EBI_CH0,
- .ab = 1920 * 1080 * 3 * 60,
- .ib = 1920 * 1080 * 3 * 60 * 1.5,
+ .ab = 1920 * 1080 * 10 * 60,
+ .ib = 1920 * 1080 * 10 * 60 * 1.5,
},
};
diff --git a/arch/arm/mach-msm/devices-8930.c b/arch/arm/mach-msm/devices-8930.c
index 54063d2..d062ff4 100644
--- a/arch/arm/mach-msm/devices-8930.c
+++ b/arch/arm/mach-msm/devices-8930.c
@@ -36,6 +36,23 @@
#ifdef CONFIG_MSM_MPM
#include <mach/mpm.h>
#endif
+#define MSM8930_PC_CNTR_PHYS (MSM8930_IMEM_PHYS + 0x664)
+#define MSM8930_PC_CNTR_SIZE 0x40
+
+static struct resource msm8930_resources_pccntr[] = {
+ {
+ .start = MSM8930_PC_CNTR_PHYS,
+ .end = MSM8930_PC_CNTR_PHYS + MSM8930_PC_CNTR_SIZE,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+struct platform_device msm8930_pc_cntr = {
+ .name = "pc-cntr",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(msm8930_resources_pccntr),
+ .resource = msm8930_resources_pccntr,
+};
struct msm_rpm_platform_data msm8930_rpm_data __initdata = {
.reg_base_addrs = {
@@ -529,8 +546,8 @@
};
static struct msm_rpmstats_platform_data msm_rpm_stat_pdata = {
- .phys_addr_base = 0x0010D204,
- .phys_size = SZ_8K,
+ .phys_addr_base = 0x0010DD04,
+ .phys_size = SZ_256,
};
struct platform_device msm8930_rpm_stat_device = {
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index 078605f..72da3d8 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -35,6 +35,7 @@
#include <mach/msm_dcvs.h>
#include <mach/msm_rtb.h>
#include <mach/msm_cache_dump.h>
+#include <mach/clk-provider.h>
#include <sound/msm-dai-q6.h>
#include <sound/apr_audio.h>
#include <mach/msm_tsif.h>
@@ -102,6 +103,24 @@
#define MSM8960_HSUSB_PHYS 0x12500000
#define MSM8960_HSUSB_SIZE SZ_4K
+#define MSM8960_PC_CNTR_PHYS (MSM8960_IMEM_PHYS + 0x664)
+#define MSM8960_PC_CNTR_SIZE 0x40
+
+static struct resource msm8960_resources_pccntr[] = {
+ {
+ .start = MSM8960_PC_CNTR_PHYS,
+ .end = MSM8960_PC_CNTR_PHYS + MSM8960_PC_CNTR_SIZE,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+struct platform_device msm8960_pc_cntr = {
+ .name = "pc-cntr",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(msm8960_resources_pccntr),
+ .resource = msm8960_resources_pccntr,
+};
+
static struct resource resources_otg[] = {
{
.start = MSM8960_HSUSB_PHYS,
@@ -1425,6 +1444,11 @@
.end = 0x03204000 + SZ_256 - 1,
.flags = IORESOURCE_MEM,
},
+ {
+ .start = RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ,
+ .end = RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
};
struct platform_device msm_8960_riva = {
@@ -3188,18 +3212,29 @@
},
};
-static const struct kgsl_iommu_ctx kgsl_3d0_iommu_ctxs[] = {
+static const struct kgsl_iommu_ctx kgsl_3d0_iommu0_ctxs[] = {
{ "gfx3d_user", 0 },
{ "gfx3d_priv", 1 },
};
+static const struct kgsl_iommu_ctx kgsl_3d0_iommu1_ctxs[] = {
+ { "gfx3d1_user", 0 },
+ { "gfx3d1_priv", 1 },
+};
+
static struct kgsl_device_iommu_data kgsl_3d0_iommu_data[] = {
{
- .iommu_ctxs = kgsl_3d0_iommu_ctxs,
- .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu_ctxs),
+ .iommu_ctxs = kgsl_3d0_iommu0_ctxs,
+ .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu0_ctxs),
.physstart = 0x07C00000,
.physend = 0x07C00000 + SZ_1M - 1,
},
+ {
+ .iommu_ctxs = kgsl_3d0_iommu1_ctxs,
+ .iommu_ctx_count = ARRAY_SIZE(kgsl_3d0_iommu1_ctxs),
+ .physstart = 0x07D00000,
+ .physend = 0x07D00000 + SZ_1M - 1,
+ },
};
static struct kgsl_device_platform_data kgsl_3d0_pdata = {
@@ -3700,8 +3735,8 @@
};
static struct msm_rpmstats_platform_data msm_rpm_stat_pdata = {
- .phys_addr_base = 0x0010D204,
- .phys_size = SZ_8K,
+ .phys_addr_base = 0x0010DD04,
+ .phys_size = SZ_256,
};
struct platform_device msm8960_rpm_stat_device = {
@@ -3736,17 +3771,18 @@
/* Sensors DSPS platform data */
#ifdef CONFIG_MSM_DSPS
-#define PPSS_DSPS_TCM_CODE_BASE 0x12000000
-#define PPSS_DSPS_TCM_CODE_SIZE 0x28000
-#define PPSS_DSPS_TCM_BUF_BASE 0x12040000
-#define PPSS_DSPS_TCM_BUF_SIZE 0x4000
-#define PPSS_DSPS_PIPE_BASE 0x12800000
-#define PPSS_DSPS_PIPE_SIZE 0x4000
-#define PPSS_DSPS_DDR_BASE 0x8fe00000
-#define PPSS_DSPS_DDR_SIZE 0x100000
-#define PPSS_SMEM_BASE 0x80000000
-#define PPSS_SMEM_SIZE 0x200000
-#define PPSS_REG_PHYS_BASE 0x12080000
+#define PPSS_DSPS_TCM_CODE_BASE 0x12000000
+#define PPSS_DSPS_TCM_CODE_SIZE 0x28000
+#define PPSS_DSPS_TCM_BUF_BASE 0x12040000
+#define PPSS_DSPS_TCM_BUF_SIZE 0x4000
+#define PPSS_DSPS_PIPE_BASE 0x12800000
+#define PPSS_DSPS_PIPE_SIZE 0x4000
+#define PPSS_DSPS_DDR_BASE 0x8fe00000
+#define PPSS_DSPS_DDR_SIZE 0x100000
+#define PPSS_SMEM_BASE 0x80000000
+#define PPSS_SMEM_SIZE 0x200000
+#define PPSS_REG_PHYS_BASE 0x12080000
+#define PPSS_WDOG_UNMASKED_INT_EN 0x1808
static struct dsps_clk_info dsps_clks[] = {};
static struct dsps_regulator_info dsps_regs[] = {};
@@ -3774,6 +3810,7 @@
.ddr_size = PPSS_DSPS_DDR_SIZE,
.smem_start = PPSS_SMEM_BASE,
.smem_size = PPSS_SMEM_SIZE,
+ .ppss_wdog_unmasked_int_en_reg = PPSS_WDOG_UNMASKED_INT_EN,
.signature = DSPS_SIGNATURE,
};
diff --git a/arch/arm/mach-msm/devices-9615.c b/arch/arm/mach-msm/devices-9615.c
index 0a9bbf6..46853ac 100644
--- a/arch/arm/mach-msm/devices-9615.c
+++ b/arch/arm/mach-msm/devices-9615.c
@@ -1316,8 +1316,8 @@
};
static struct msm_rpmstats_platform_data msm_rpm_stat_pdata = {
- .phys_addr_base = 0x0010D204,
- .phys_size = SZ_8K,
+ .phys_addr_base = 0x0010DD04,
+ .phys_size = SZ_256,
};
struct platform_device msm9615_rpm_stat_device = {
diff --git a/arch/arm/mach-msm/devices-iommu.c b/arch/arm/mach-msm/devices-iommu.c
index b65bd1f..6434a63 100644
--- a/arch/arm/mach-msm/devices-iommu.c
+++ b/arch/arm/mach-msm/devices-iommu.c
@@ -365,25 +365,25 @@
static struct msm_iommu_dev gfx3d_iommu = {
.name = "gfx3d",
.ncb = 3,
- .ttbr_split = 2,
+ .ttbr_split = 1,
};
static struct msm_iommu_dev gfx3d1_iommu = {
.name = "gfx3d1",
.ncb = 3,
- .ttbr_split = 2,
+ .ttbr_split = 1,
};
static struct msm_iommu_dev gfx2d0_iommu = {
.name = "gfx2d0",
.ncb = 2,
- .ttbr_split = 2,
+ .ttbr_split = 1,
};
static struct msm_iommu_dev gfx2d1_iommu = {
.name = "gfx2d1",
.ncb = 2,
- .ttbr_split = 2,
+ .ttbr_split = 1,
};
static struct msm_iommu_dev vcap_iommu = {
@@ -1017,13 +1017,13 @@
ARRAY_SIZE(msm_iommu_gfx2d_devs));
}
- if (cpu_is_apq8064() || cpu_is_msm8960ab()) {
+ if (cpu_is_apq8064() || cpu_is_msm8960ab() || cpu_is_apq8064ab()) {
platform_add_devices(msm_iommu_jpegd_devs,
ARRAY_SIZE(msm_iommu_jpegd_devs));
platform_add_devices(msm_iommu_adreno3xx_gfx_devs,
ARRAY_SIZE(msm_iommu_adreno3xx_gfx_devs));
}
- if (cpu_is_apq8064())
+ if (cpu_is_apq8064() || cpu_is_apq8064ab())
platform_add_devices(msm_iommu_vcap_devs,
ARRAY_SIZE(msm_iommu_vcap_devs));
@@ -1039,14 +1039,14 @@
ARRAY_SIZE(msm_iommu_gfx2d_ctx_devs));
}
- if (cpu_is_apq8064() || cpu_is_msm8960ab()) {
+ if (cpu_is_apq8064() || cpu_is_msm8960ab() || cpu_is_apq8064ab()) {
platform_add_devices(msm_iommu_jpegd_ctx_devs,
ARRAY_SIZE(msm_iommu_jpegd_ctx_devs));
platform_add_devices(msm_iommu_adreno3xx_ctx_devs,
ARRAY_SIZE(msm_iommu_adreno3xx_ctx_devs));
}
- if (cpu_is_apq8064())
+ if (cpu_is_apq8064() || cpu_is_apq8064ab())
platform_add_devices(msm_iommu_vcap_ctx_devs,
ARRAY_SIZE(msm_iommu_vcap_ctx_devs));
@@ -1081,12 +1081,12 @@
for (i = 0; i < ARRAY_SIZE(msm_iommu_jpegd_devs); i++)
platform_device_unregister(msm_iommu_jpegd_devs[i]);
}
- if (cpu_is_apq8064()) {
+ if (cpu_is_apq8064() || cpu_is_apq8064ab()) {
for (i = 0; i < ARRAY_SIZE(msm_iommu_vcap_ctx_devs); i++)
platform_device_unregister(msm_iommu_vcap_ctx_devs[i]);
}
- if (cpu_is_apq8064() || cpu_is_msm8960ab()) {
+ if (cpu_is_apq8064() || cpu_is_msm8960ab() || cpu_is_apq8064ab()) {
for (i = 0; i < ARRAY_SIZE(msm_iommu_adreno3xx_ctx_devs);
i++)
platform_device_unregister(
@@ -1097,7 +1097,7 @@
platform_device_unregister(
msm_iommu_jpegd_ctx_devs[i]);
- if (cpu_is_apq8064()) {
+ if (cpu_is_apq8064() || cpu_is_apq8064ab()) {
for (i = 0; i < ARRAY_SIZE(msm_iommu_vcap_devs);
i++)
platform_device_unregister(
diff --git a/arch/arm/mach-msm/devices-msm7x27a.c b/arch/arm/mach-msm/devices-msm7x27a.c
index cd5b2e5..50ab26f 100644
--- a/arch/arm/mach-msm/devices-msm7x27a.c
+++ b/arch/arm/mach-msm/devices-msm7x27a.c
@@ -30,6 +30,7 @@
#include <asm/cacheflush.h>
#include <mach/rpc_hsusb.h>
#include <mach/socinfo.h>
+#include <mach/clk-provider.h>
#include "devices.h"
#include "devices-msm7x2xa.h"
@@ -1663,12 +1664,13 @@
* These are various Vdd levels supported by PMIC
*/
static uint32_t msm_c2_pmic_mv[] __initdata = {
- 1300000, 1287500, 1275000, 1262500, 1250000,
- 1237500, 1225000, 1212500, 1200000, 1187500,
- 1175000, 1162500, 1150000, 1137500, 1125000,
- 1112500, 1100000, 1087500, 1075000, 1062500,
- 1050000, 1037500, 1025000, 1012500, 0, 0, 0,
- 0, 0, 0, 0, 1000,
+ 1350000, 1337500, 1325000, 1312500, 1300000,
+ 1287500, 1275000, 1262500, 1250000, 1237500,
+ 1225000, 1212500, 1200000, 1187500, 1175000,
+ 1162500, 1150000, 1137500, 1125000, 1112500,
+ 1100000, 1087500, 1075000, 1062500, 0,
+ 0, 0, 0, 0, 0,
+ 0, 1050000,
};
/**
@@ -1708,9 +1710,9 @@
.step_quot = ~0,
.tgt_volt_offset = 0,
.turbo_Vmax = 1350000,
- .turbo_Vmin = 950000,
+ .turbo_Vmin = 1100000,
.nom_Vmax = 1350000,
- .nom_Vmin = 950000,
+ .nom_Vmin = 1100000,
.calibrated_uV = 1300000,
},
};
@@ -1728,7 +1730,7 @@
uint32_t quot;
/* This formula is as per chip characterization data */
- quot = max_quot - ((max_freq / 10 - new_freq / 10) * 5);
+ quot = max_quot - (((max_freq - new_freq) * 7) / 10);
return quot;
}
@@ -1748,7 +1750,7 @@
static struct msm_cpr_config msm_cpr_pdata = {
.ref_clk_khz = 19200,
- .delay_us = 25000,
+ .delay_us = 1000,
.irq_line = 0,
.cpr_mode_data = msm_cpr_mode_data,
.tgt_count_div_N = 1,
@@ -1756,7 +1758,7 @@
.ceiling = 40,
.sw_vlevel = 20,
.up_threshold = 1,
- .dn_threshold = 2,
+ .dn_threshold = 4,
.up_margin = 0,
.dn_margin = 0,
.max_nom_freq = 700800,
@@ -1818,6 +1820,22 @@
* enough to represent the value of maximum quot
*/
msm_cpr_pdata.max_quot = cpr_info->turbo_quot * 10 + 600;
+ /**
+ * Fused Quot value for 1.2GHz on a 1.2GHz part is lower than
+ * the quot value calculated using the scaling factor formula for
+ * 1.2GHz when running on a 1.4GHz part. So, prop up the Quot for
+ * a 1.2GHz part by a chip characterization recommended value.
+ * Ditto for a 1.0GHz part.
+ */
+ if (msm8625_cpu_id() == MSM8625A) {
+ msm_cpr_pdata.max_quot += 100;
+ if (msm_cpr_pdata.max_quot > 1400)
+ msm_cpr_pdata.max_quot = 1400;
+ } else if (msm8625_cpu_id() == MSM8625) {
+ msm_cpr_pdata.max_quot += 120;
+ if (msm_cpr_pdata.max_quot > 1350)
+ msm_cpr_pdata.max_quot = 1350;
+ }
/**
* Bits 4:0 of pvs_fuse provide mapping to the safe boot up voltage.
@@ -2021,6 +2039,7 @@
static struct notifier_block panic_handler = {
.notifier_call = msm7627a_panic_handler,
+ .priority = INT_MAX,
};
static int __init panic_register(void)
diff --git a/arch/arm/mach-msm/devices-msm8x60.c b/arch/arm/mach-msm/devices-msm8x60.c
index 7bffd9b..37cdc98 100644
--- a/arch/arm/mach-msm/devices-msm8x60.c
+++ b/arch/arm/mach-msm/devices-msm8x60.c
@@ -192,7 +192,9 @@
gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, (void *)MSM_QGIC_CPU_BASE);
}
-#define MSM_LPASS_QDSP6SS_PHYS 0x28800000
+#define MSM_LPASS_QDSP6SS_PHYS 0x28800000
+#define MSM_LPASS_QDSP6SS_WDOG_PHYS 0x28882000
+#define MSM_LPASS_QDSP6SS_IM_PHYS 0x288A0000
static struct resource msm_8660_q6_resources[] = {
{
@@ -200,6 +202,21 @@
.end = MSM_LPASS_QDSP6SS_PHYS + SZ_256 - 1,
.flags = IORESOURCE_MEM,
},
+ {
+ .start = MSM_LPASS_QDSP6SS_IM_PHYS,
+ .end = MSM_LPASS_QDSP6SS_IM_PHYS + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MSM_LPASS_QDSP6SS_WDOG_PHYS,
+ .end = MSM_LPASS_QDSP6SS_WDOG_PHYS + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = LPASS_Q6SS_WDOG_EXPIRED,
+ .end = LPASS_Q6SS_WDOG_EXPIRED,
+ .flags = IORESOURCE_IRQ,
+ },
};
struct platform_device msm_pil_q6v3 = {
@@ -210,6 +227,7 @@
};
#define MSM_MSS_REGS_PHYS 0x10200000
+#define MSM_MSS_WDOG_PHYS 0x10020000
static struct resource msm_8660_modem_resources[] = {
{
@@ -217,6 +235,16 @@
.end = MSM_MSS_REGS_PHYS + SZ_256 - 1,
.flags = IORESOURCE_MEM,
},
+ {
+ .start = MSM_MSS_WDOG_PHYS,
+ .end = MSM_MSS_WDOG_PHYS + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MARM_WDOG_EXPIRED,
+ .end = MARM_WDOG_EXPIRED,
+ .flags = IORESOURCE_IRQ,
+ },
};
struct platform_device msm_pil_modem = {
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index ffe268f..6f3dda3 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -109,6 +109,10 @@
extern struct platform_device msm_device_sdc3;
extern struct platform_device msm_device_sdc4;
+extern struct platform_device msm8960_pc_cntr;
+extern struct platform_device msm8064_pc_cntr;
+extern struct platform_device msm8930_pc_cntr;
+
extern struct platform_device msm_device_gadget_peripheral;
extern struct platform_device msm_device_hsusb_host;
extern struct platform_device msm_device_hsusb_host2;
diff --git a/arch/arm/mach-msm/etm.c b/arch/arm/mach-msm/etm.c
index 6cceff2..ae42733 100644
--- a/arch/arm/mach-msm/etm.c
+++ b/arch/arm/mach-msm/etm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -24,8 +24,7 @@
#include <linux/pm_qos.h>
#include <asm/atomic.h>
-
-#include "cp14.h"
+#include <asm/hardware/cp14.h>
#define LOG_BUF_LEN 32768
/* each slot is 4 bytes, 8kb total */
diff --git a/arch/arm/mach-msm/event_timer.c b/arch/arm/mach-msm/event_timer.c
new file mode 100644
index 0000000..e06dad4
--- /dev/null
+++ b/arch/arm/mach-msm/event_timer.c
@@ -0,0 +1,318 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/clocksource.h>
+#include <linux/clockchips.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <mach/event_timer.h>
+
+#define __INIT_HEAD(x) { .head = RB_ROOT,\
+ .next = NULL, }
+
+#define DEFINE_TIME_HEAD(x) struct timerqueue_head x = __INIT_HEAD(x)
+
+/**
+ * struct event_timer_info - basic event timer structure
+ * @node: timerqueue node to track time ordered data structure
+ * of event timers
+ * @timer: hrtimer created for this event.
+ * @function : callback function for event timer.
+ * @data : callback data for event timer.
+ */
+struct event_timer_info {
+ struct timerqueue_node node;
+ void (*function)(void *);
+ void *data;
+};
+
+
+static DEFINE_TIME_HEAD(timer_head);
+static DEFINE_SPINLOCK(event_timer_lock);
+static struct hrtimer event_hrtimer;
+static enum hrtimer_restart event_hrtimer_cb(struct hrtimer *hrtimer);
+
+static int msm_event_debug_mask;
+module_param_named(
+ debug_mask, msm_event_debug_mask, int, S_IRUGO | S_IWUSR | S_IWGRP
+);
+
+enum {
+ MSM_EVENT_TIMER_DEBUG = 1U << 0,
+};
+
+
+/**
+ * add_event_timer() : Add a wakeup event. Intended to be called
+ * by clients once. Returns a handle to be used
+ * for future transactions.
+ * @function : The callback function will be called when event
+ * timer expires.
+ * @data: callback data provided by client.
+ */
+struct event_timer_info *add_event_timer(void (*function)(void *), void *data)
+{
+ struct event_timer_info *event_info =
+ kzalloc(sizeof(struct event_timer_info), GFP_KERNEL);
+
+ if (!event_info)
+ return NULL;
+
+ event_info->function = function;
+ event_info->data = data;
+ /* Init rb node and hr timer */
+ timerqueue_init(&event_info->node);
+
+ return event_info;
+}
+
+/**
+ * is_event_next(): Helper function to check if the event is the next
+ * next expiring event
+ * @event : handle to the event to be checked.
+ */
+static bool is_event_next(struct event_timer_info *event)
+{
+ struct event_timer_info *next_event;
+ struct timerqueue_node *next;
+ bool ret = false;
+
+ next = timerqueue_getnext(&timer_head);
+ if (!next)
+ goto exit_is_next_event;
+
+ next_event = container_of(next, struct event_timer_info, node);
+ if (!next_event)
+ goto exit_is_next_event;
+
+ if (next_event == event)
+ ret = true;
+
+exit_is_next_event:
+ return ret;
+}
+
+/**
+ * is_event_active(): Helper function to check if the timer for a given event
+ * has been started.
+ * @event : handle to the event to be checked.
+ */
+static bool is_event_active(struct event_timer_info *event)
+{
+ struct timerqueue_node *next;
+ struct event_timer_info *next_event;
+ bool ret = false;
+
+ for (next = timerqueue_getnext(&timer_head); next;
+ next = timerqueue_iterate_next(next)) {
+ next_event = container_of(next, struct event_timer_info, node);
+
+ if (event == next_event) {
+ ret = true;
+ break;
+ }
+ }
+ return ret;
+}
+
+/**
+ * create_httimer(): Helper function to setup hrtimer.
+ */
+static void create_hrtimer(ktime_t expires)
+{
+ static bool timer_initialized;
+
+ if (!timer_initialized) {
+ hrtimer_init(&event_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
+ timer_initialized = true;
+ }
+
+ event_hrtimer.function = event_hrtimer_cb;
+ hrtimer_start(&event_hrtimer, expires, HRTIMER_MODE_ABS);
+
+ if (msm_event_debug_mask && MSM_EVENT_TIMER_DEBUG)
+ pr_info("%s: Setting timer for %lu", __func__,
+ (unsigned long)ktime_to_ns(expires));
+}
+
+/**
+ * event_hrtimer_cb() : Callback function for hr timer.
+ * Make the client CB from here and remove the event
+ * from the time ordered queue.
+ */
+static enum hrtimer_restart event_hrtimer_cb(struct hrtimer *hrtimer)
+{
+ struct event_timer_info *event;
+ struct timerqueue_node *next;
+
+ next = timerqueue_getnext(&timer_head);
+
+ while (next && (ktime_to_ns(next->expires)
+ <= ktime_to_ns(hrtimer->node.expires))) {
+ if (!next)
+ goto hrtimer_cb_exit;
+
+ event = container_of(next, struct event_timer_info, node);
+ if (!event)
+ goto hrtimer_cb_exit;
+
+ if (msm_event_debug_mask && MSM_EVENT_TIMER_DEBUG)
+ pr_info("%s: Deleting event @ %lu", __func__,
+ (unsigned long)ktime_to_ns(next->expires));
+
+ timerqueue_del(&timer_head, &event->node);
+
+ if (event->function)
+ event->function(event->data);
+ next = timerqueue_getnext(&timer_head);
+ }
+
+ if (next)
+ create_hrtimer(next->expires);
+
+hrtimer_cb_exit:
+ return HRTIMER_NORESTART;
+}
+
+/**
+ * create_timer_smp(): Helper function used setting up timer on core 0.
+ */
+static void create_timer_smp(void *data)
+{
+ unsigned long flags;
+ struct event_timer_info *event =
+ (struct event_timer_info *)data;
+
+ local_irq_save(flags);
+ create_hrtimer(event->node.expires);
+ local_irq_restore(flags);
+}
+
+/**
+ * setup_timer() : Helper function to setup timer on primary
+ * core during hrtimer callback.
+ * @event: event handle causing the wakeup.
+ */
+static void setup_event_hrtimer(struct event_timer_info *event)
+{
+ struct timerqueue_node *next;
+ unsigned long flags;
+
+ spin_lock_irqsave(&event_timer_lock, flags);
+ if (is_event_active(event))
+ timerqueue_del(&timer_head, &event->node);
+
+ next = timerqueue_getnext(&timer_head);
+ timerqueue_add(&timer_head, &event->node);
+ spin_unlock_irqrestore(&event_timer_lock, flags);
+
+ if (!next ||
+ (next && (ktime_to_ns(event->node.expires) <
+ ktime_to_ns(next->expires)))) {
+ if (msm_event_debug_mask && MSM_EVENT_TIMER_DEBUG)
+ pr_info("%s: Setting timer for %lu", __func__,
+ (unsigned long)ktime_to_ns(event->node.expires));
+
+ smp_call_function_single(0, create_timer_smp, event, 1);
+ }
+}
+
+/**
+ * activate_event_timer() : Set the expiration time for an event in absolute
+ * ktime. This is a oneshot event timer, clients
+ * should call this again to set another expiration.
+ * @event : event handle.
+ * @event_time : event time in absolute ktime.
+ */
+void activate_event_timer(struct event_timer_info *event, ktime_t event_time)
+{
+ if (!event)
+ return;
+
+ if (msm_event_debug_mask && MSM_EVENT_TIMER_DEBUG)
+ pr_info("%s: Adding event timer @ %lu", __func__,
+ (unsigned long)ktime_to_us(event_time));
+
+ event->node.expires = event_time;
+ /* Start hr timer and add event to rb tree */
+ setup_event_hrtimer(event);
+}
+
+
+/**
+ * deactivate_event_timer() : Deactivate an event timer, this removes the event from
+ * the time ordered queue of event timers.
+ * @event: event handle.
+ */
+void deactivate_event_timer(struct event_timer_info *event)
+{
+ unsigned long flags;
+
+ if (msm_event_debug_mask && MSM_EVENT_TIMER_DEBUG)
+ pr_info("%s: Deactivate timer", __func__);
+
+ spin_lock_irqsave(&event_timer_lock, flags);
+ if (is_event_active(event)) {
+ if (is_event_next(event))
+ hrtimer_try_to_cancel(&event_hrtimer);
+
+ timerqueue_del(&timer_head, &event->node);
+ }
+ spin_unlock_irqrestore(&event_timer_lock, flags);
+}
+
+/**
+ * destroy_event_timer() : Free the event info data structure allocated during
+ * add_event_timer().
+ * @event: event handle.
+ */
+void destroy_event_timer(struct event_timer_info *event)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&event_timer_lock, flags);
+ if (is_event_active(event)) {
+ if (is_event_next(event))
+ hrtimer_try_to_cancel(&event_hrtimer);
+
+ timerqueue_del(&timer_head, &event->node);
+ }
+ spin_unlock_irqrestore(&event_timer_lock, flags);
+ kfree(event);
+}
+
+/**
+ * get_next_event_timer() - Get the next wakeup event. Returns
+ * a ktime value of the next expiring event.
+ */
+ktime_t get_next_event_time(void)
+{
+ unsigned long flags;
+ struct timerqueue_node *next;
+ ktime_t next_event = ns_to_ktime(0);
+
+ spin_lock_irqsave(&event_timer_lock, flags);
+ next = timerqueue_getnext(&timer_head);
+ spin_unlock_irqrestore(&event_timer_lock, flags);
+
+ if (!next)
+ return next_event;
+
+ next_event = hrtimer_get_remaining(&event_hrtimer);
+ if (msm_event_debug_mask && MSM_EVENT_TIMER_DEBUG)
+ pr_info("%s: Next Event %lu", __func__,
+ (unsigned long)ktime_to_us(next_event));
+
+ return next_event;
+}
diff --git a/arch/arm/mach-msm/footswitch-8x60.c b/arch/arm/mach-msm/footswitch-8x60.c
index 84735aa..a7b26c1 100644
--- a/arch/arm/mach-msm/footswitch-8x60.c
+++ b/arch/arm/mach-msm/footswitch-8x60.c
@@ -24,7 +24,7 @@
#include <mach/msm_iomap.h>
#include <mach/msm_bus.h>
#include <mach/scm-io.h>
-#include "clock.h"
+#include <mach/clk.h>
#include "footswitch.h"
#ifdef CONFIG_MSM_SECURE_IO
diff --git a/arch/arm/mach-msm/gss-8064.c b/arch/arm/mach-msm/gss-8064.c
deleted file mode 100644
index e528650..0000000
--- a/arch/arm/mach-msm/gss-8064.c
+++ /dev/null
@@ -1,265 +0,0 @@
-/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/reboot.h>
-#include <linux/workqueue.h>
-#include <linux/io.h>
-#include <linux/jiffies.h>
-#include <linux/stringify.h>
-#include <linux/delay.h>
-#include <linux/module.h>
-#include <linux/miscdevice.h>
-#include <linux/fs.h>
-
-#include <mach/irqs.h>
-#include <mach/msm_smsm.h>
-#include <mach/scm.h>
-#include <mach/peripheral-loader.h>
-#include <mach/subsystem_restart.h>
-#include <mach/subsystem_notif.h>
-#include <mach/socinfo.h>
-
-#include "smd_private.h"
-#include "modem_notifier.h"
-#include "ramdump.h"
-
-static struct gss_8064_data {
- struct miscdevice gss_dev;
- void *pil_handle;
- void *gss_ramdump_dev;
- void *smem_ramdump_dev;
-} gss_data;
-
-static int crash_shutdown;
-
-static struct subsys_device *gss_8064_dev;
-
-#define MAX_SSR_REASON_LEN 81U
-
-static void log_gss_sfr(void)
-{
- u32 size;
- char *smem_reason, reason[MAX_SSR_REASON_LEN];
-
- smem_reason = smem_get_entry(SMEM_SSR_REASON_MSS0, &size);
- if (!smem_reason || !size) {
- pr_err("GSS subsystem failure reason: (unknown, smem_get_entry failed).\n");
- return;
- }
- if (!smem_reason[0]) {
- pr_err("GSS subsystem failure reason: (unknown, init string found).\n");
- return;
- }
-
- size = min(size, MAX_SSR_REASON_LEN-1);
- memcpy(reason, smem_reason, size);
- reason[size] = '\0';
- pr_err("GSS subsystem failure reason: %s.\n", reason);
-
- smem_reason[0] = '\0';
- wmb();
-}
-
-static void restart_gss(void)
-{
- log_gss_sfr();
- subsystem_restart_dev(gss_8064_dev);
-}
-
-static void smsm_state_cb(void *data, uint32_t old_state, uint32_t new_state)
-{
- /* Ignore if we're the one that set SMSM_RESET */
- if (crash_shutdown)
- return;
-
- if (new_state & SMSM_RESET) {
- pr_err("GSS SMSM state changed to SMSM_RESET.\n"
- "Probable err_fatal on the GSS. "
- "Calling subsystem restart...\n");
- restart_gss();
- }
-}
-
-#define Q6_FW_WDOG_ENABLE 0x08882024
-#define Q6_SW_WDOG_ENABLE 0x08982024
-static int gss_shutdown(const struct subsys_desc *desc)
-{
- pil_force_shutdown("gss");
- disable_irq_nosync(GSS_A5_WDOG_EXPIRED);
-
- return 0;
-}
-
-static int gss_powerup(const struct subsys_desc *desc)
-{
- pil_force_boot("gss");
- enable_irq(GSS_A5_WDOG_EXPIRED);
- return 0;
-}
-
-void gss_crash_shutdown(const struct subsys_desc *desc)
-{
- crash_shutdown = 1;
- smsm_reset_modem(SMSM_RESET);
-}
-
-/* FIXME: Get address, size from PIL */
-static struct ramdump_segment gss_segments[] = {
- {0x89000000, 0x00D00000}
-};
-
-static struct ramdump_segment smem_segments[] = {
- {0x80000000, 0x00200000},
-};
-
-static int gss_ramdump(int enable,
- const struct subsys_desc *crashed_subsys)
-{
- int ret = 0;
-
- if (enable) {
- ret = do_ramdump(gss_data.gss_ramdump_dev, gss_segments,
- ARRAY_SIZE(gss_segments));
-
- if (ret < 0) {
- pr_err("Unable to dump gss memory (rc = %d).\n",
- ret);
- goto out;
- }
-
- ret = do_ramdump(gss_data.smem_ramdump_dev, smem_segments,
- ARRAY_SIZE(smem_segments));
-
- if (ret < 0) {
- pr_err("Unable to dump smem memory (rc = %d).\n", ret);
- goto out;
- }
- }
-
-out:
- return ret;
-}
-
-static irqreturn_t gss_wdog_bite_irq(int irq, void *dev_id)
-{
- pr_err("Watchdog bite received from GSS!\n");
- restart_gss();
-
- return IRQ_HANDLED;
-}
-
-static struct subsys_desc gss_8064 = {
- .name = "gss",
- .shutdown = gss_shutdown,
- .powerup = gss_powerup,
- .ramdump = gss_ramdump,
- .crash_shutdown = gss_crash_shutdown
-};
-
-static int gss_subsystem_restart_init(void)
-{
- gss_8064_dev = subsys_register(&gss_8064);
- if (IS_ERR(gss_8064_dev))
- return PTR_ERR(gss_8064_dev);
- return 0;
-}
-
-static int gss_open(struct inode *inode, struct file *filep)
-{
- void *ret;
- gss_data.pil_handle = ret = pil_get("gss");
- if (!ret)
- pr_debug("%s - pil_get returned NULL\n", __func__);
- return 0;
-}
-
-static int gss_release(struct inode *inode, struct file *filep)
-{
- pil_put(gss_data.pil_handle);
- pr_debug("%s pil_put called on GSS\n", __func__);
- return 0;
-}
-
-const struct file_operations gss_file_ops = {
- .open = gss_open,
- .release = gss_release,
-};
-
-static int __init gss_8064_init(void)
-{
- int ret;
-
- if (!cpu_is_apq8064())
- return -ENODEV;
-
- ret = smsm_state_cb_register(SMSM_MODEM_STATE, SMSM_RESET,
- smsm_state_cb, 0);
-
- if (ret < 0)
- pr_err("%s: Unable to register SMSM callback! (%d)\n",
- __func__, ret);
-
- ret = request_irq(GSS_A5_WDOG_EXPIRED, gss_wdog_bite_irq,
- IRQF_TRIGGER_RISING, "gss_a5_wdog", NULL);
-
- if (ret < 0) {
- pr_err("%s: Unable to request gss watchdog IRQ. (%d)\n",
- __func__, ret);
- disable_irq_nosync(GSS_A5_WDOG_EXPIRED);
- goto out;
- }
-
- ret = gss_subsystem_restart_init();
-
- if (ret < 0) {
- pr_err("%s: Unable to reg with subsystem restart. (%d)\n",
- __func__, ret);
- goto out;
- }
-
- gss_data.gss_dev.minor = MISC_DYNAMIC_MINOR;
- gss_data.gss_dev.name = "gss";
- gss_data.gss_dev.fops = &gss_file_ops;
- ret = misc_register(&gss_data.gss_dev);
-
- if (ret) {
- pr_err("%s: misc_registers failed for %s (%d)", __func__,
- gss_data.gss_dev.name, ret);
- goto out;
- }
-
- gss_data.gss_ramdump_dev = create_ramdump_device("gss");
-
- if (!gss_data.gss_ramdump_dev) {
- pr_err("%s: Unable to create gss ramdump device. (%d)\n",
- __func__, -ENOMEM);
- ret = -ENOMEM;
- goto out;
- }
-
- gss_data.smem_ramdump_dev = create_ramdump_device("smem-gss");
-
- if (!gss_data.smem_ramdump_dev) {
- pr_err("%s: Unable to create smem ramdump device. (%d)\n",
- __func__, -ENOMEM);
- ret = -ENOMEM;
- goto out;
- }
-
- pr_info("%s: gss fatal driver init'ed.\n", __func__);
-out:
- return ret;
-}
-
-module_init(gss_8064_init);
diff --git a/arch/arm/mach-msm/headsmp.S b/arch/arm/mach-msm/headsmp.S
index e5ad312..0537421 100644
--- a/arch/arm/mach-msm/headsmp.S
+++ b/arch/arm/mach-msm/headsmp.S
@@ -35,8 +35,6 @@
* we've been released from the holding pen: secondary_stack
* should now contain the SVC stack for this core
*/
- mvn r7, #0 @ -1 to registers
- str r7,[r6] @ back to the pen for ack
b secondary_startup
ENDPROC(msm_secondary_startup)
diff --git a/arch/arm/mach-msm/hotplug.c b/arch/arm/mach-msm/hotplug.c
index d1d9f4b..f296aae 100644
--- a/arch/arm/mach-msm/hotplug.c
+++ b/arch/arm/mach-msm/hotplug.c
@@ -43,7 +43,7 @@
{
}
-static inline void platform_do_lowpower(unsigned int cpu)
+static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
{
/* Just enter wfi for now. TODO: Properly shut off the cpu. */
for (;;) {
@@ -53,9 +53,6 @@
/*
* OK, proper wakeup, we're done
*/
- pen_release = -1;
- dmac_flush_range((char *)&pen_release,
- (char *)&pen_release + sizeof(pen_release));
break;
}
@@ -67,9 +64,7 @@
* possible, since we are currently running incoherently, and
* therefore cannot safely call printk() or anything else
*/
- dmac_inv_range((char *)&pen_release,
- (char *)&pen_release + sizeof(pen_release));
- pr_debug("CPU%u: spurious wakeup call\n", cpu);
+ (*spurious)++;
}
}
@@ -85,6 +80,8 @@
*/
void platform_cpu_die(unsigned int cpu)
{
+ int spurious = 0;
+
if (unlikely(cpu != smp_processor_id())) {
pr_crit("%s: running on %u, should be %u\n",
__func__, smp_processor_id(), cpu);
@@ -95,10 +92,13 @@
* we're ready for shutdown now, so do it
*/
cpu_enter_lowpower();
- platform_do_lowpower(cpu);
+ platform_do_lowpower(cpu, &spurious);
pr_debug("CPU%u: %s: normal wakeup\n", cpu, __func__);
cpu_leave_lowpower();
+
+ if (spurious)
+ pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
}
int platform_cpu_disable(unsigned int cpu)
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 5b8729a..433fee3 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -63,6 +63,7 @@
uint8_t csid_core;
uint8_t is_vpe;
struct msm_bus_scale_pdata *cam_bus_scale_table;
+ uint8_t csiphy_core;
};
#ifdef CONFIG_SENSORS_MT9T013
@@ -177,7 +178,6 @@
struct msm_camera_csi_lane_params {
uint16_t csi_lane_assign;
uint16_t csi_lane_mask;
- uint8_t csi_phy_sel;
};
struct msm_camera_gpio_conf {
diff --git a/arch/arm/mach-msm/include/mach/camera.h b/arch/arm/mach-msm/include/mach/camera.h
index cf36388..f5a158f 100644
--- a/arch/arm/mach-msm/include/mach/camera.h
+++ b/arch/arm/mach-msm/include/mach/camera.h
@@ -95,6 +95,7 @@
VFE_MSG_OUTPUT_SECONDARY,
VFE_MSG_OUTPUT_TERTIARY1,
VFE_MSG_OUTPUT_TERTIARY2,
+ VFE_MSG_V2X_LIVESHOT_PRIMARY,
};
enum vpe_resp_msg {
diff --git a/arch/arm/mach-msm/include/mach/clk-provider.h b/arch/arm/mach-msm/include/mach/clk-provider.h
new file mode 100644
index 0000000..770713d
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/clk-provider.h
@@ -0,0 +1,146 @@
+/*
+ * Copyright (C) 2007 Google, Inc.
+ * Copyright (c) 2007-2012, The Linux Foundation. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MACH_CLK_PROVIDER_H
+#define __MACH_CLK_PROVIDER_H
+
+#include <linux/types.h>
+#include <linux/list.h>
+#include <linux/clkdev.h>
+#include <linux/spinlock.h>
+#include <linux/mutex.h>
+#include <mach/clk.h>
+
+/*
+ * Bit manipulation macros
+ */
+#define BM(msb, lsb) (((((uint32_t)-1) << (31-msb)) >> (31-msb+lsb)) << lsb)
+#define BVAL(msb, lsb, val) (((val) << lsb) & BM(msb, lsb))
+
+/*
+ * Halt/Status Checking Mode Macros
+ */
+#define HALT 0 /* Bit pol: 1 = halted */
+#define NOCHECK 1 /* No bit to check, do nothing */
+#define HALT_VOTED 2 /* Bit pol: 1 = halted; delay on disable */
+#define ENABLE 3 /* Bit pol: 1 = running */
+#define ENABLE_VOTED 4 /* Bit pol: 1 = running; delay on disable */
+#define DELAY 5 /* No bit to check, just delay */
+
+#define MAX_VDD_LEVELS 4
+
+/**
+ * struct clk_vdd_class - Voltage scaling class
+ * @class_name: name of the class
+ * @set_vdd: function to call when applying a new voltage setting
+ * @level_votes: array of votes for each level
+ * @cur_level: the currently set voltage level
+ * @lock: lock to protect this struct
+ */
+struct clk_vdd_class {
+ const char *class_name;
+ int (*set_vdd)(struct clk_vdd_class *v_class, int level);
+ int level_votes[MAX_VDD_LEVELS];
+ unsigned long cur_level;
+ struct mutex lock;
+};
+
+#define DEFINE_VDD_CLASS(_name, _set_vdd) \
+ struct clk_vdd_class _name = { \
+ .class_name = #_name, \
+ .set_vdd = _set_vdd, \
+ .cur_level = ARRAY_SIZE(_name.level_votes), \
+ .lock = __MUTEX_INITIALIZER(_name.lock) \
+ }
+
+enum handoff {
+ HANDOFF_ENABLED_CLK,
+ HANDOFF_DISABLED_CLK,
+ HANDOFF_UNKNOWN_RATE,
+};
+
+struct clk_ops {
+ int (*prepare)(struct clk *clk);
+ int (*enable)(struct clk *clk);
+ void (*disable)(struct clk *clk);
+ void (*unprepare)(struct clk *clk);
+ void (*enable_hwcg)(struct clk *clk);
+ void (*disable_hwcg)(struct clk *clk);
+ int (*in_hwcg_mode)(struct clk *clk);
+ enum handoff (*handoff)(struct clk *clk);
+ int (*reset)(struct clk *clk, enum clk_reset_action action);
+ int (*set_rate)(struct clk *clk, unsigned long rate);
+ int (*set_max_rate)(struct clk *clk, unsigned long rate);
+ int (*set_flags)(struct clk *clk, unsigned flags);
+ unsigned long (*get_rate)(struct clk *clk);
+ int (*list_rate)(struct clk *clk, unsigned n);
+ int (*is_enabled)(struct clk *clk);
+ long (*round_rate)(struct clk *clk, unsigned long rate);
+ int (*set_parent)(struct clk *clk, struct clk *parent);
+ struct clk *(*get_parent)(struct clk *clk);
+ bool (*is_local)(struct clk *clk);
+};
+
+/**
+ * struct clk
+ * @prepare_count: prepare refcount
+ * @prepare_lock: protects clk_prepare()/clk_unprepare() path and @prepare_count
+ * @count: enable refcount
+ * @lock: protects clk_enable()/clk_disable() path and @count
+ * @depends: non-direct parent of clock to enable when this clock is enabled
+ * @vdd_class: voltage scaling requirement class
+ * @fmax: maximum frequency in Hz supported at each voltage level
+ */
+struct clk {
+ uint32_t flags;
+ struct clk_ops *ops;
+ const char *dbg_name;
+ struct clk *depends;
+ struct clk_vdd_class *vdd_class;
+ unsigned long fmax[MAX_VDD_LEVELS];
+ unsigned long rate;
+
+ struct list_head children;
+ struct list_head siblings;
+
+ unsigned count;
+ spinlock_t lock;
+ unsigned prepare_count;
+ struct mutex prepare_lock;
+};
+
+#define CLK_INIT(name) \
+ .lock = __SPIN_LOCK_UNLOCKED((name).lock), \
+ .prepare_lock = __MUTEX_INITIALIZER((name).prepare_lock), \
+ .children = LIST_HEAD_INIT((name).children), \
+ .siblings = LIST_HEAD_INIT((name).siblings)
+
+int vote_vdd_level(struct clk_vdd_class *vdd_class, int level);
+int unvote_vdd_level(struct clk_vdd_class *vdd_class, int level);
+
+/* Register clocks with the MSM clock driver */
+int msm_clock_register(struct clk_lookup *table, size_t size);
+
+extern struct clk dummy_clk;
+
+#define CLK_DUMMY(clk_name, clk_id, clk_dev, flags) { \
+ .con_id = clk_name, \
+ .dev_id = clk_dev, \
+ .clk = &dummy_clk, \
+ }
+
+#define CLK_LOOKUP(con, c, dev) { .con_id = con, .clk = &c, .dev_id = dev }
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/clk.h b/arch/arm/mach-msm/include/mach/clk.h
index 8c0ebfa..d69b372 100644
--- a/arch/arm/mach-msm/include/mach/clk.h
+++ b/arch/arm/mach-msm/include/mach/clk.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2009, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2009, 2012 Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -12,19 +12,24 @@
#ifndef __MACH_CLK_H
#define __MACH_CLK_H
-/* Magic rate value for use with PM QOS to request the board's maximum
- * supported AXI rate. PM QOS will only pass positive s32 rate values
- * through to the clock driver, so INT_MAX is used.
- */
-#define MSM_AXI_MAX_FREQ LONG_MAX
+#define CLKFLAG_INVERT 0x00000001
+#define CLKFLAG_NOINVERT 0x00000002
+#define CLKFLAG_NONEST 0x00000004
+#define CLKFLAG_NORESET 0x00000008
+#define CLKFLAG_RETAIN 0x00000040
+#define CLKFLAG_NORETAIN 0x00000080
+#define CLKFLAG_SKIP_HANDOFF 0x00000100
+#define CLKFLAG_MIN 0x00000400
+#define CLKFLAG_MAX 0x00000800
+
+struct clk_lookup;
+struct clk;
enum clk_reset_action {
CLK_RESET_DEASSERT = 0,
CLK_RESET_ASSERT = 1
};
-struct clk;
-
/* Rate is maximum clock rate in Hz */
int clk_set_max_rate(struct clk *clk, unsigned long rate);
diff --git a/arch/arm/mach-msm/include/mach/event_timer.h b/arch/arm/mach-msm/include/mach/event_timer.h
new file mode 100644
index 0000000..7a00b23
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/event_timer.h
@@ -0,0 +1,77 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __ARCH_ARM_MACH_MSM_EVENT_TIMER_H
+#define __ARCH_ARM_MACH_MSM_EVENT_TIMER_H
+
+#include <linux/hrtimer.h>
+
+struct event_timer_info;
+
+#ifdef CONFIG_MSM_EVENT_TIMER
+/**
+ * add_event_timer() : Add a wakeup event. Intended to be called
+ * by clients once. Returns a handle to be used
+ * for future transactions.
+ * @function : The callback function will be called when event
+ * timer expires.
+ * @data : Callback data provided by client.
+ */
+struct event_timer_info *add_event_timer(void (*function)(void *), void *data);
+
+/** activate_event_timer() : Set the expiration time for an event in absolute
+ * ktime. This is a oneshot event timer, clients
+ * should call this again to set another expiration.
+ * @event : Event handle.
+ * @event_time : Event time in absolute ktime.
+ */
+void activate_event_timer(struct event_timer_info *event, ktime_t event_time);
+
+/**
+ * deactivate_event_timer() : Deactivate an event timer.
+ * @event: event handle.
+ */
+void deactivate_event_timer(struct event_timer_info *event);
+
+/**
+ * destroy_event_timer() : Free the event info data structure allocated during
+ * add_event_timer().
+ * @event: event handle.
+ */
+void destroy_event_timer(struct event_timer_info *event);
+
+/**
+ * get_next_event_timer() : Get the next wakeup event.
+ * returns a ktime value of the next
+ * expiring event.
+ */
+ktime_t get_next_event_time(void);
+#else
+static inline void *add_event_timer(void (*function)(void *), void *data)
+{
+ return NULL;
+}
+
+static inline void activate_event_timer(void *event, ktime_t event_time) {}
+
+static inline void deactivate_event_timer(void *event) {}
+
+static inline void destroy_event_timer(void *event) {}
+
+static inline ktime_t get_next_event_time(void)
+{
+ return ns_to_ktime(0);
+}
+
+#endif /* CONFIG_MSM_EVENT_TIMER_MANAGER */
+#endif /* __ARCH_ARM_MACH_MSM_EVENT_TIMER_H */
diff --git a/arch/arm/mach-msm/include/mach/iommu.h b/arch/arm/mach-msm/include/mach/iommu.h
index b14f145..f63af64 100644
--- a/arch/arm/mach-msm/include/mach/iommu.h
+++ b/arch/arm/mach-msm/include/mach/iommu.h
@@ -38,6 +38,8 @@
/* Maximum number of SMT entries allowed by the system */
#define MAX_NUM_SMR 128
+#define MAX_NUM_BFB_REGS 32
+
/**
* struct msm_iommu_dev - a single IOMMU hardware instance
* name Human-readable name given to this IOMMU HW instance
@@ -64,6 +66,17 @@
int mids[MAX_NUM_MIDS];
};
+/**
+ * struct msm_iommu_bfb_settings - a set of IOMMU BFB tuning parameters
+ * regs An array of register offsets to configure
+ * data Values to write to corresponding registers
+ * length Number of valid entries in the offset/val arrays
+ */
+struct msm_iommu_bfb_settings {
+ unsigned int regs[MAX_NUM_BFB_REGS];
+ unsigned int data[MAX_NUM_BFB_REGS];
+ int length;
+};
/**
* struct msm_iommu_drvdata - A single IOMMU hardware instance
@@ -76,6 +89,7 @@
* @name: Human-readable name of this IOMMU device
* @gdsc: Regulator needed to power this HW block (v2 only)
* @nsmr: Size of the SMT on this HW block (v2 only)
+ * @bfb_settings: Optional BFB performance tuning parameters
*
* A msm_iommu_drvdata holds the global driver data about a single piece
* of an IOMMU hardware instance.
@@ -90,6 +104,7 @@
const char *name;
struct regulator *gdsc;
unsigned int nsmr;
+ struct msm_iommu_bfb_settings *bfb_settings;
};
/**
diff --git a/arch/arm/mach-msm/include/mach/iommu_hw-v2.h b/arch/arm/mach-msm/include/mach/iommu_hw-v2.h
index b01dbd8..c4991bf 100644
--- a/arch/arm/mach-msm/include/mach/iommu_hw-v2.h
+++ b/arch/arm/mach-msm/include/mach/iommu_hw-v2.h
@@ -15,6 +15,8 @@
#define CTX_SHIFT 12
#define CTX_OFFSET 0x8000
+#define IMPLDEF_OFFSET 0x2000
+#define IMPLDEF_LENGTH 0xDFF
#define GET_GLOBAL_REG(reg, base) (readl_relaxed((base) + (reg)))
#define GET_CTX_REG(reg, base, ctx) \
diff --git a/arch/arm/mach-msm/include/mach/irqs-8625.h b/arch/arm/mach-msm/include/mach/irqs-8625.h
index 413a778..2ec0e21 100644
--- a/arch/arm/mach-msm/include/mach/irqs-8625.h
+++ b/arch/arm/mach-msm/include/mach/irqs-8625.h
@@ -87,6 +87,8 @@
#define MSM8625_INT_CPR_IRQ0 (GIC_SPI_START + 32 + 25)
#define MSM8625_INT_CPR_IRQ1 (GIC_SPI_START + 32 + 26)
#define MSM8625_INT_CPR_IRQ2 (GIC_SPI_START + 32 + 27)
+#define MSM8625_INT_ACSR_MP_CORE_IPC2 (GIC_SPI_START + 32 + 28)
+#define MSM8625_INT_ACSR_MP_CORE_IPC3 (GIC_SPI_START + 32 + 29)
#define MSM8625_INT_ADSP_A11_SMSM MSM8625_INT_ADSP_A11
#endif
diff --git a/arch/arm/mach-msm/include/mach/irqs-8974.h b/arch/arm/mach-msm/include/mach/irqs-8974.h
index d10b537..8152eca 100644
--- a/arch/arm/mach-msm/include/mach/irqs-8974.h
+++ b/arch/arm/mach-msm/include/mach/irqs-8974.h
@@ -24,9 +24,7 @@
#define GIC_PPI_START 16
#define GIC_SPI_START 32
-#define AVS_SVICINT (GIC_PPI_START + 6)
-#define AVS_SVICINTSWDONE (GIC_PPI_START + 7)
-#define INT_ARMQC_PERFMON (GIC_PPI_START + 10)
+#define INT_ARMQC_PERFMON (GIC_PPI_START + 7)
/* PPI 15 is unused */
#define APCC_QGICL2PERFMONIRPTREQ (GIC_SPI_START + 1)
diff --git a/arch/arm/mach-msm/include/mach/mdm2.h b/arch/arm/mach-msm/include/mach/mdm2.h
index 6ec12c1..fd63fd2 100644
--- a/arch/arm/mach-msm/include/mach/mdm2.h
+++ b/arch/arm/mach-msm/include/mach/mdm2.h
@@ -33,6 +33,7 @@
const unsigned int ramdump_timeout_ms;
int image_upgrade_supported;
struct gpiomux_setting *mdm2ap_status_gpio_run_cfg;
+ int send_shdn;
};
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_dsps.h b/arch/arm/mach-msm/include/mach/msm_dsps.h
index 0f9dba6..a876798 100644
--- a/arch/arm/mach-msm/include/mach/msm_dsps.h
+++ b/arch/arm/mach-msm/include/mach/msm_dsps.h
@@ -86,6 +86,7 @@
* @smem_start - start of the smem region as physical address
* @smem_size - size of the smem region in bytes
* @ppss_pause_reg - Offset to the PPSS_PAUSE register
+ * @ppss_wdog_unmasked_int_en_reg - Offset to PPSS_WDOG_UNMASKED_INT_EN register
* @signature - signature for validity check.
*/
struct msm_dsps_platform_data {
@@ -109,6 +110,7 @@
int smem_start;
int smem_size;
int ppss_pause_reg;
+ int ppss_wdog_unmasked_int_en_reg;
u32 signature;
};
diff --git a/arch/arm/mach-msm/include/mach/msm_hsusb.h b/arch/arm/mach-msm/include/mach/msm_hsusb.h
index 4e22b0f..c6eb527 100644
--- a/arch/arm/mach-msm/include/mach/msm_hsusb.h
+++ b/arch/arm/mach-msm/include/mach/msm_hsusb.h
@@ -138,6 +138,7 @@
int self_powered;
int is_phy_status_timer_on;
+ bool prop_chg;
};
struct msm_otg_platform_data {
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8092.h b/arch/arm/mach-msm/include/mach/msm_iomap-8092.h
index dec8a58..732aaff 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8092.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8092.h
@@ -23,7 +23,7 @@
*
*/
-#define MPQ8092_SHARED_RAM_PHYS 0x0FA00000
+#define MPQ8092_MSM_SHARED_RAM_PHYS 0x0FA00000
#define MPQ8092_QGIC_DIST_PHYS 0xF9000000
#define MPQ8092_QGIC_DIST_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-9625.h b/arch/arm/mach-msm/include/mach/msm_iomap-9625.h
index 493cf36..765de13 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-9625.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-9625.h
@@ -23,7 +23,7 @@
*
*/
-#define MSM9625_SHARED_RAM_PHYS 0x18D00000
+#define MSM9625_SHARED_RAM_PHYS 0x00000000
#define MSM9625_APCS_GCC_PHYS 0xF9011000
#define MSM9625_APCS_GCC_SIZE SZ_4K
@@ -34,9 +34,27 @@
#define MSM9625_TLMM_PHYS 0xFD510000
#define MSM9625_TLMM_SIZE SZ_16K
+/*
+ * TODO: Revert IMEM_PHYS back to actual
+ * address 0xfe807800
+ * after IMEM issues resolved.
+ *
+ */
+#define MSM9625_IMEM_PHYS 0xFC42B000
+#define MSM9625_IMEM_SIZE SZ_2K
+
#ifdef CONFIG_DEBUG_MSM9625_UART
#define MSM_DEBUG_UART_BASE IOMEM(0xFA71E000)
#define MSM_DEBUG_UART_PHYS 0xF991E000
#endif
+/*
+ * IMEM is retained for secure watchdog reset
+ * Debug Image looks at actual IMEM to
+ * do memory dumping.
+ */
+
+#define MSM9625_DBG_IMEM_PHYS 0xFE807800
+#define MSM9625_DBG_IMEM_SIZE SZ_4K
+
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index 21bea4f..8dbd29c 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -101,11 +101,11 @@
#define MSM_DBG_IMEM_BASE IOMEM(0xFB600000) /* 4K */
#define MSM_STRONGLY_ORDERED_PAGE 0xFA0F0000
-#define MSM8625_SECONDARY_PHYS 0x0FE00000
+#define MSM8625_CPU_PHYS 0x0FE00000
#if defined(CONFIG_ARCH_MSM9615) || defined(CONFIG_ARCH_MSM7X27) \
- || defined(CONFIG_ARCH_MSM7X30)
+ || defined(CONFIG_ARCH_MSM7X30) || defined(CONFIG_ARCH_MSM9625)
#define MSM_SHARED_RAM_SIZE SZ_1M
#else
#define MSM_SHARED_RAM_SIZE SZ_2M
diff --git a/arch/arm/mach-msm/include/mach/msm_memory_dump.h b/arch/arm/mach-msm/include/mach/msm_memory_dump.h
index 5e686bf..729a077 100644
--- a/arch/arm/mach-msm/include/mach/msm_memory_dump.h
+++ b/arch/arm/mach-msm/include/mach/msm_memory_dump.h
@@ -17,7 +17,8 @@
enum dump_client_type {
MSM_CPU_CTXT = 0,
- MSM_CACHE,
+ MSM_L1_CACHE,
+ MSM_L2_CACHE,
MSM_OCMEM,
MSM_TMC_ETFETB,
MSM_ETM0_REG,
diff --git a/arch/arm/mach-msm/include/mach/msm_smsm.h b/arch/arm/mach-msm/include/mach/msm_smsm.h
index 133a1b3..44b52b6 100644
--- a/arch/arm/mach-msm/include/mach/msm_smsm.h
+++ b/arch/arm/mach-msm/include/mach/msm_smsm.h
@@ -57,8 +57,7 @@
#define SMSM_PWRC 0x00000200
#define SMSM_TIMEWAIT 0x00000400
#define SMSM_TIMEINIT 0x00000800
-#define SMSM_PWRC_EARLY_EXIT 0x00001000
-#define SMSM_LTE_COEX_AWAKE 0x00001000
+#define SMSM_PROC_AWAKE 0x00001000
#define SMSM_WFPI 0x00002000
#define SMSM_SLEEP 0x00004000
#define SMSM_SLEEPEXIT 0x00008000
@@ -97,47 +96,6 @@
#define SMSM_SUBSYS2AP_STATUS 0x00008000
-#ifdef CONFIG_MSM_SMD
-void *smem_alloc(unsigned id, unsigned size);
-#else
-void *smem_alloc(unsigned id, unsigned size)
-{
- return NULL;
-}
-#endif
-void *smem_alloc2(unsigned id, unsigned size_in);
-void *smem_get_entry(unsigned id, unsigned *size);
-int smsm_change_state(uint32_t smsm_entry,
- uint32_t clear_mask, uint32_t set_mask);
-
-/*
- * Changes the global interrupt mask. The set and clear masks are re-applied
- * every time the global interrupt mask is updated for callback registration
- * and de-registration.
- *
- * The clear mask is applied first, so if a bit is set to 1 in both the clear
- * mask and the set mask, the result will be that the interrupt is set.
- *
- * @smsm_entry SMSM entry to change
- * @clear_mask 1 = clear bit, 0 = no-op
- * @set_mask 1 = set bit, 0 = no-op
- *
- * @returns 0 for success, < 0 for error
- */
-int smsm_change_intr_mask(uint32_t smsm_entry,
- uint32_t clear_mask, uint32_t set_mask);
-int smsm_get_intr_mask(uint32_t smsm_entry, uint32_t *intr_mask);
-uint32_t smsm_get_state(uint32_t smsm_entry);
-int smsm_state_cb_register(uint32_t smsm_entry, uint32_t mask,
- void (*notify)(void *, uint32_t old_state, uint32_t new_state),
- void *data);
-int smsm_state_cb_deregister(uint32_t smsm_entry, uint32_t mask,
- void (*notify)(void *, uint32_t, uint32_t), void *data);
-void smsm_print_sleep_info(uint32_t sleep_delay, uint32_t sleep_limit,
- uint32_t irq_mask, uint32_t wakeup_reason, uint32_t pending_irqs);
-void smsm_reset_modem(unsigned mode);
-void smsm_reset_modem_cont(void);
-void smd_sleep_exit(void);
#define SMEM_NUM_SMD_STREAM_CHANNELS 64
#define SMEM_NUM_SMD_BLOCK_CHANNELS 64
@@ -250,8 +208,128 @@
SMSM_NUM_INTR_MUX = 8,
};
+#ifdef CONFIG_MSM_SMD
+void *smem_alloc(unsigned id, unsigned size);
+void *smem_alloc2(unsigned id, unsigned size_in);
+void *smem_get_entry(unsigned id, unsigned *size);
+int smsm_change_state(uint32_t smsm_entry,
+ uint32_t clear_mask, uint32_t set_mask);
+
+/*
+ * Changes the global interrupt mask. The set and clear masks are re-applied
+ * every time the global interrupt mask is updated for callback registration
+ * and de-registration.
+ *
+ * The clear mask is applied first, so if a bit is set to 1 in both the clear
+ * mask and the set mask, the result will be that the interrupt is set.
+ *
+ * @smsm_entry SMSM entry to change
+ * @clear_mask 1 = clear bit, 0 = no-op
+ * @set_mask 1 = set bit, 0 = no-op
+ *
+ * @returns 0 for success, < 0 for error
+ */
+int smsm_change_intr_mask(uint32_t smsm_entry,
+ uint32_t clear_mask, uint32_t set_mask);
+int smsm_get_intr_mask(uint32_t smsm_entry, uint32_t *intr_mask);
+uint32_t smsm_get_state(uint32_t smsm_entry);
+int smsm_state_cb_register(uint32_t smsm_entry, uint32_t mask,
+ void (*notify)(void *, uint32_t old_state, uint32_t new_state),
+ void *data);
+int smsm_state_cb_deregister(uint32_t smsm_entry, uint32_t mask,
+ void (*notify)(void *, uint32_t, uint32_t), void *data);
+void smsm_print_sleep_info(uint32_t sleep_delay, uint32_t sleep_limit,
+ uint32_t irq_mask, uint32_t wakeup_reason, uint32_t pending_irqs);
+void smsm_reset_modem(unsigned mode);
+void smsm_reset_modem_cont(void);
+void smd_sleep_exit(void);
+
+
int smsm_check_for_modem_crash(void);
void *smem_find(unsigned id, unsigned size);
void *smem_get_entry(unsigned id, unsigned *size);
+#else
+static inline void *smem_alloc(unsigned id, unsigned size)
+{
+ return NULL;
+}
+static inline void *smem_alloc2(unsigned id, unsigned size_in)
+{
+ return NULL;
+}
+
+static inline void *smem_get_entry(unsigned id, unsigned *size)
+{
+ return NULL;
+}
+
+static inline int smsm_change_state(uint32_t smsm_entry,
+ uint32_t clear_mask, uint32_t set_mask)
+{
+ return -ENODEV;
+}
+
+/*
+ * Changes the global interrupt mask. The set and clear masks are re-applied
+ * every time the global interrupt mask is updated for callback registration
+ * and de-registration.
+ *
+ * The clear mask is applied first, so if a bit is set to 1 in both the clear
+ * mask and the set mask, the result will be that the interrupt is set.
+ *
+ * @smsm_entry SMSM entry to change
+ * @clear_mask 1 = clear bit, 0 = no-op
+ * @set_mask 1 = set bit, 0 = no-op
+ *
+ * @returns 0 for success, < 0 for error
+ */
+static inline int smsm_change_intr_mask(uint32_t smsm_entry,
+ uint32_t clear_mask, uint32_t set_mask)
+{
+ return -ENODEV;
+}
+
+static inline int smsm_get_intr_mask(uint32_t smsm_entry, uint32_t *intr_mask)
+{
+ return -ENODEV;
+}
+static inline uint32_t smsm_get_state(uint32_t smsm_entry)
+{
+ return 0;
+}
+static inline int smsm_state_cb_register(uint32_t smsm_entry, uint32_t mask,
+ void (*notify)(void *, uint32_t old_state, uint32_t new_state),
+ void *data)
+{
+ return -ENODEV;
+}
+static inline int smsm_state_cb_deregister(uint32_t smsm_entry, uint32_t mask,
+ void (*notify)(void *, uint32_t, uint32_t), void *data)
+{
+ return -ENODEV;
+}
+static inline void smsm_print_sleep_info(uint32_t sleep_delay,
+ uint32_t sleep_limit, uint32_t irq_mask, uint32_t wakeup_reason,
+ uint32_t pending_irqs)
+{
+}
+static inline void smsm_reset_modem(unsigned mode)
+{
+}
+static inline void smsm_reset_modem_cont(void)
+{
+}
+static inline void smd_sleep_exit(void)
+{
+}
+static inline int smsm_check_for_modem_crash(void)
+{
+ return -ENODEV;
+}
+static inline void *smem_find(unsigned id, unsigned size)
+{
+ return NULL;
+}
+#endif
#endif
diff --git a/arch/arm/mach-msm/qdsp6v2/q6core.h b/arch/arm/mach-msm/include/mach/qdsp6v2/q6core.h
similarity index 81%
rename from arch/arm/mach-msm/qdsp6v2/q6core.h
rename to arch/arm/mach-msm/include/mach/qdsp6v2/q6core.h
index cb25d6b..ea345fb 100644
--- a/arch/arm/mach-msm/qdsp6v2/q6core.h
+++ b/arch/arm/mach-msm/include/mach/qdsp6v2/q6core.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -45,8 +45,18 @@
uint32_t power_collapse;
};
+#define ADSP_CMD_SET_DTS_MODEL_ID 0x00012917
+
+struct adsp_dts_modelid {
+ struct apr_hdr hdr;
+ uint32_t model_ID_size;
+ uint8_t model_ID[128];
+};
+
int core_req_bus_bandwith(u16 bus_id, u32 ab_bps, u32 ib_bps);
uint32_t core_get_adsp_version(void);
+uint32_t core_set_dts_model_id(uint32_t id_size, uint8_t *id);
+
#endif /* __Q6CORE_H__ */
diff --git a/arch/arm/mach-msm/include/mach/rpm-regulator.h b/arch/arm/mach-msm/include/mach/rpm-regulator.h
index f6e082d..075d20f 100644
--- a/arch/arm/mach-msm/include/mach/rpm-regulator.h
+++ b/arch/arm/mach-msm/include/mach/rpm-regulator.h
@@ -32,7 +32,8 @@
RPM_VREG_VERSION_9615,
RPM_VREG_VERSION_8930,
RPM_VREG_VERSION_8930_PM8917,
- RPM_VREG_VERSION_MAX = RPM_VREG_VERSION_8930_PM8917,
+ RPM_VREG_VERSION_8960_PM8917,
+ RPM_VREG_VERSION_MAX = RPM_VREG_VERSION_8960_PM8917,
};
#define RPM_VREG_PIN_CTRL_NONE 0x00
diff --git a/arch/arm/mach-msm/include/mach/socinfo.h b/arch/arm/mach-msm/include/mach/socinfo.h
index 546cbaf..225440c 100644
--- a/arch/arm/mach-msm/include/mach/socinfo.h
+++ b/arch/arm/mach-msm/include/mach/socinfo.h
@@ -89,6 +89,7 @@
MSM_CPU_7X25AA,
MSM_CPU_7X25AB,
MSM_CPU_8064,
+ MSM_CPU_8064AB,
MSM_CPU_8930,
MSM_CPU_8930AA,
MSM_CPU_7X27AA,
@@ -304,6 +305,15 @@
#endif
}
+static inline int cpu_is_apq8064ab(void)
+{
+#ifdef CONFIG_ARCH_APQ8064
+ return read_msm_cpu_type() == MSM_CPU_8064AB;
+#else
+ return 0;
+#endif
+}
+
static inline int cpu_is_msm8930(void)
{
#ifdef CONFIG_ARCH_MSM8930
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 5430f99..39ac253 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -462,6 +462,7 @@
MSM_CHIP_DEVICE(APCS_GCC, MSM9625),
MSM_CHIP_DEVICE(TLMM, MSM9625),
MSM_CHIP_DEVICE(TMR, MSM9625),
+ MSM_CHIP_DEVICE(IMEM, MSM9625),
{
.virtual = (unsigned long) MSM_SHARED_RAM_BASE,
.length = MSM_SHARED_RAM_SIZE,
@@ -470,6 +471,7 @@
#ifdef CONFIG_DEBUG_MSM9625_UART
MSM_DEVICE(DEBUG_UART),
#endif
+ MSM_CHIP_DEVICE(DBG_IMEM, MSM9625),
};
void __init msm_map_msm9625_io(void)
@@ -497,7 +499,7 @@
void __init msm_map_mpq8092_io(void)
{
- msm_shared_ram_phys = MSM8974_MSM_SHARED_RAM_PHYS;
+ msm_shared_ram_phys = MPQ8092_MSM_SHARED_RAM_PHYS;
msm_map_io(mpq8092_io_desc, ARRAY_SIZE(mpq8092_io_desc));
}
#endif /* CONFIG_ARCH_MPQ8092 */
diff --git a/arch/arm/mach-msm/ipc_router.c b/arch/arm/mach-msm/ipc_router.c
index 7dc8d0f..c82eac1 100644
--- a/arch/arm/mach-msm/ipc_router.c
+++ b/arch/arm/mach-msm/ipc_router.c
@@ -2096,7 +2096,7 @@
mutex_lock(&rt_entry->lock);
i += scnprintf(buf + i, max - i,
"Node Id: 0x%08x\n", rt_entry->node_id);
- if (j == IPC_ROUTER_NID_LOCAL) {
+ if (rt_entry->node_id == IPC_ROUTER_NID_LOCAL) {
i += scnprintf(buf + i, max - i,
"XPRT Name: Loopback\n");
i += scnprintf(buf + i, max - i,
diff --git a/arch/arm/mach-msm/jtag.c b/arch/arm/mach-msm/jtag.c
index 4f14b19..24e1c41 100644
--- a/arch/arm/mach-msm/jtag.c
+++ b/arch/arm/mach-msm/jtag.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -20,11 +20,10 @@
#include <linux/printk.h>
#include <linux/ratelimit.h>
#include <linux/coresight.h>
+#include <asm/hardware/cp14.h>
#include <mach/scm.h>
#include <mach/jtag.h>
-#include "cp14.h"
-
/* DBGv7 with baseline CP14 registers implemented */
#define ARM_DEBUG_ARCH_V7B (0x3)
/* DBGv7 with all CP14 registers implemented */
diff --git a/arch/arm/mach-msm/lpass-8660.c b/arch/arm/mach-msm/lpass-8660.c
deleted file mode 100644
index be18b68..0000000
--- a/arch/arm/mach-msm/lpass-8660.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/reboot.h>
-#include <linux/workqueue.h>
-#include <linux/io.h>
-#include <linux/jiffies.h>
-#include <linux/stringify.h>
-#include <linux/delay.h>
-#include <linux/module.h>
-#include <linux/err.h>
-
-#include <mach/irqs.h>
-#include <mach/scm.h>
-#include <mach/peripheral-loader.h>
-#include <mach/subsystem_restart.h>
-#include <mach/subsystem_notif.h>
-
-#include "smd_private.h"
-#include "modem_notifier.h"
-#include "ramdump.h"
-
-#define Q6SS_WDOG_ENABLE 0x28882024
-#define Q6SS_SOFT_INTR_WAKEUP 0x288A001C
-#define MODULE_NAME "lpass_8x60"
-#define SCM_Q6_NMI_CMD 0x1
-
-static struct subsys_device *subsys_8x60_q6_dev;
-
-/* Subsystem restart: QDSP6 data, functions */
-static void *q6_ramdump_dev;
-static void q6_fatal_fn(struct work_struct *);
-static DECLARE_WORK(q6_fatal_work, q6_fatal_fn);
-static void __iomem *q6_wakeup_intr;
-
-static void q6_fatal_fn(struct work_struct *work)
-{
- pr_err("%s: Watchdog bite received from Q6!\n", MODULE_NAME);
- subsystem_restart_dev(subsys_8x60_q6_dev);
- enable_irq(LPASS_Q6SS_WDOG_EXPIRED);
-}
-
-static void send_q6_nmi(void)
-{
- /* Send NMI to QDSP6 via an SCM call. */
- scm_call_atomic1(SCM_SVC_UTIL, SCM_Q6_NMI_CMD, 0x1);
-
- /* Wakeup the Q6 */
- if (q6_wakeup_intr)
- writel_relaxed(0x2000, q6_wakeup_intr);
- else
- pr_warn("lpass-8660: Unable to send wakeup interrupt to Q6.\n");
-
- /* Q6 requires atleast 100ms to dump caches etc.*/
- mdelay(100);
-
- pr_info("subsystem-fatal-8x60: Q6 NMI was sent.\n");
-}
-
-int subsys_q6_shutdown(const struct subsys_desc *crashed_subsys)
-{
- void __iomem *q6_wdog_addr =
- ioremap_nocache(Q6SS_WDOG_ENABLE, 8);
-
- send_q6_nmi();
- writel_relaxed(0x0, q6_wdog_addr);
- /* The write needs to go through before the q6 is shutdown. */
- mb();
- iounmap(q6_wdog_addr);
-
- pil_force_shutdown("q6");
- disable_irq_nosync(LPASS_Q6SS_WDOG_EXPIRED);
-
- return 0;
-}
-
-int subsys_q6_powerup(const struct subsys_desc *crashed_subsys)
-{
- int ret = pil_force_boot("q6");
- enable_irq(LPASS_Q6SS_WDOG_EXPIRED);
- return ret;
-}
-
-/* FIXME: Get address, size from PIL */
-static struct ramdump_segment q6_segments[] = { {0x46700000, 0x47F00000 -
- 0x46700000}, {0x28400000, 0x12800} };
-static int subsys_q6_ramdump(int enable,
- const struct subsys_desc *crashed_subsys)
-{
- if (enable)
- return do_ramdump(q6_ramdump_dev, q6_segments,
- ARRAY_SIZE(q6_segments));
- else
- return 0;
-}
-
-void subsys_q6_crash_shutdown(const struct subsys_desc *crashed_subsys)
-{
- send_q6_nmi();
-}
-
-static irqreturn_t lpass_wdog_bite_irq(int irq, void *dev_id)
-{
- int ret;
-
- ret = schedule_work(&q6_fatal_work);
- disable_irq_nosync(LPASS_Q6SS_WDOG_EXPIRED);
-
- return IRQ_HANDLED;
-}
-
-static struct subsys_desc subsys_8x60_q6 = {
- .name = "lpass",
- .shutdown = subsys_q6_shutdown,
- .powerup = subsys_q6_powerup,
- .ramdump = subsys_q6_ramdump,
- .crash_shutdown = subsys_q6_crash_shutdown
-};
-
-static void __exit lpass_fatal_exit(void)
-{
- subsys_unregister(subsys_8x60_q6_dev);
- iounmap(q6_wakeup_intr);
- free_irq(LPASS_Q6SS_WDOG_EXPIRED, NULL);
-}
-
-static int __init lpass_fatal_init(void)
-{
- int ret;
-
- ret = request_irq(LPASS_Q6SS_WDOG_EXPIRED, lpass_wdog_bite_irq,
- IRQF_TRIGGER_RISING, "q6_wdog", NULL);
-
- if (ret < 0) {
- pr_err("%s: Unable to request LPASS_Q6SS_WDOG_EXPIRED irq.",
- __func__);
- goto out;
- }
-
- q6_ramdump_dev = create_ramdump_device("lpass");
-
- if (!q6_ramdump_dev) {
- ret = -ENOMEM;
- goto out;
- }
-
- q6_wakeup_intr = ioremap_nocache(Q6SS_SOFT_INTR_WAKEUP, 8);
-
- if (!q6_wakeup_intr)
- pr_warn("lpass-8660: Unable to ioremap q6 wakeup address.");
-
- subsys_8x60_q6_dev = subsys_register(&subsys_8x60_q6);
- if (IS_ERR(subsys_8x60_q6_dev))
- ret = PTR_ERR(subsys_8x60_q6_dev);
-out:
- return ret;
-}
-
-module_init(lpass_fatal_init);
-module_exit(lpass_fatal_exit);
-
diff --git a/arch/arm/mach-msm/lpm_levels.c b/arch/arm/mach-msm/lpm_levels.c
index f7456ef..8218a42 100644
--- a/arch/arm/mach-msm/lpm_levels.c
+++ b/arch/arm/mach-msm/lpm_levels.c
@@ -92,8 +92,8 @@
}
static void *msm_lpm_lowest_limits(bool from_idle,
- enum msm_pm_sleep_mode sleep_mode, uint32_t latency_us,
- uint32_t sleep_us, uint32_t *power)
+ enum msm_pm_sleep_mode sleep_mode,
+ struct msm_pm_time_params *time_param, uint32_t *power)
{
unsigned int cpu = smp_processor_id();
struct msm_rpmrs_level *best_level = NULL;
@@ -114,20 +114,22 @@
if (sleep_mode != level->sleep_mode)
continue;
- if (latency_us < level->latency_us)
+ if (time_param->latency_us < level->latency_us)
continue;
- if (sleep_us <= 1) {
+ if (time_param->sleep_us <= 1) {
pwr = level->energy_overhead;
- } else if (sleep_us <= level->time_overhead_us) {
- pwr = level->energy_overhead / sleep_us;
- } else if ((sleep_us >> 10) > level->time_overhead_us) {
+ } else if (time_param->sleep_us <= level->time_overhead_us) {
+ pwr = level->energy_overhead / time_param->sleep_us;
+ } else if ((time_param->sleep_us >> 10)
+ > level->time_overhead_us) {
pwr = level->steady_state_power;
} else {
pwr = level->steady_state_power;
pwr -= (level->time_overhead_us *
- level->steady_state_power)/sleep_us;
- pwr += level->energy_overhead / sleep_us;
+ level->steady_state_power) /
+ time_param->sleep_us;
+ pwr += level->energy_overhead / time_param->sleep_us;
}
if (!best_level || best_level->rs_limits.power[cpu] >= pwr) {
diff --git a/arch/arm/mach-msm/mdm.c b/arch/arm/mach-msm/mdm.c
index 4280fb4..02978cf 100644
--- a/arch/arm/mach-msm/mdm.c
+++ b/arch/arm/mach-msm/mdm.c
@@ -28,7 +28,6 @@
#include <linux/debugfs.h>
#include <linux/completion.h>
#include <linux/workqueue.h>
-#include <linux/clk.h>
#include <asm/mach-types.h>
#include <asm/uaccess.h>
#include <linux/mfd/pm8xxx/misc.h>
@@ -39,7 +38,6 @@
#include <linux/msm_charm.h>
#include "msm_watchdog.h"
#include "devices.h"
-#include "clock.h"
#define CHARM_MODEM_TIMEOUT 6000
#define CHARM_HOLD_TIME 4000
diff --git a/arch/arm/mach-msm/mdm2.c b/arch/arm/mach-msm/mdm2.c
index 43c85bb..77eeb53 100644
--- a/arch/arm/mach-msm/mdm2.c
+++ b/arch/arm/mach-msm/mdm2.c
@@ -28,7 +28,6 @@
#include <linux/debugfs.h>
#include <linux/completion.h>
#include <linux/workqueue.h>
-#include <linux/clk.h>
#include <linux/mfd/pmic8058.h>
#include <asm/mach-types.h>
#include <asm/uaccess.h>
@@ -39,7 +38,6 @@
#include <linux/msm_charm.h>
#include "msm_watchdog.h"
#include "devices.h"
-#include "clock.h"
#include "mdm_private.h"
#define MDM_PBLRDY_CNT 20
@@ -112,8 +110,12 @@
/* Wait for the modem to complete its power down actions. */
for (i = 20; i > 0; i--) {
- if (gpio_get_value(mdm_drv->mdm2ap_status_gpio) == 0)
+ if (gpio_get_value(mdm_drv->mdm2ap_status_gpio) == 0) {
+ if (mdm_debug_mask & MDM_DEBUG_MASK_SHDN_LOG)
+ pr_info("%s: mdm2ap_status went low, i = %d\n",
+ __func__, i);
break;
+ }
msleep(100);
}
if (i == 0) {
diff --git a/arch/arm/mach-msm/mdm_common.c b/arch/arm/mach-msm/mdm_common.c
index ea15a17..58b26f2 100644
--- a/arch/arm/mach-msm/mdm_common.c
+++ b/arch/arm/mach-msm/mdm_common.c
@@ -290,6 +290,17 @@
} else
pr_debug("%s Image upgrade not supported\n", __func__);
break;
+ case SHUTDOWN_CHARM:
+ if (!mdm_drv->pdata->send_shdn)
+ break;
+ mdm_drv->mdm_ready = 0;
+ if (mdm_debug_mask & MDM_DEBUG_MASK_SHDN_LOG)
+ pr_info("Sending shutdown request to mdm\n");
+ ret = sysmon_send_shutdown(SYSMON_SS_EXT_MODEM);
+ if (ret)
+ pr_err("%s: Graceful shutdown of the external modem failed, ret = %d\n",
+ __func__, ret);
+ break;
default:
pr_err("%s: invalid ioctl cmd = %d\n", __func__, _IOC_NR(cmd));
ret = -EINVAL;
@@ -382,6 +393,9 @@
{
int value = gpio_get_value(mdm_drv->mdm2ap_status_gpio);
+ if ((mdm_debug_mask & MDM_DEBUG_MASK_SHDN_LOG) && (value == 0))
+ pr_info("%s: mdm2ap_status went low\n", __func__);
+
pr_debug("%s: mdm sent status change interrupt\n", __func__);
if (value == 0 && mdm_drv->mdm_ready == 1) {
pr_info("%s: unexpected reset external modem\n", __func__);
diff --git a/arch/arm/mach-msm/mdm_private.h b/arch/arm/mach-msm/mdm_private.h
index c406b89a..9e865c5 100644
--- a/arch/arm/mach-msm/mdm_private.h
+++ b/arch/arm/mach-msm/mdm_private.h
@@ -14,6 +14,7 @@
#define _ARCH_ARM_MACH_MSM_MDM_PRIVATE_H
#define MDM_DEBUG_MASK_VDDMIN_SETUP (0x00000002)
+#define MDM_DEBUG_MASK_SHDN_LOG (0x00000004)
#define GPIO_IS_VALID(gpio) \
(gpio != -1)
struct mdm_modem_drv;
diff --git a/arch/arm/mach-msm/memory.c b/arch/arm/mach-msm/memory.c
index 74c1c4a..a785389 100644
--- a/arch/arm/mach-msm/memory.c
+++ b/arch/arm/mach-msm/memory.c
@@ -173,63 +173,29 @@
struct reserve_info *reserve_info;
-static unsigned long stable_size(struct membank *mb,
- unsigned long unstable_limit)
-{
- unsigned long upper_limit = mb->start + mb->size;
-
- if (!unstable_limit)
- return mb->size;
-
- /* Check for 32 bit roll-over */
- if (upper_limit >= mb->start) {
- /* If we didn't roll over we can safely make the check below */
- if (upper_limit <= unstable_limit)
- return mb->size;
- }
-
- if (mb->start >= unstable_limit)
- return 0;
- return unstable_limit - mb->start;
-}
-
-/* stable size of all memory banks contiguous to and below this one */
-static unsigned long total_stable_size(unsigned long bank)
-{
- int i;
- struct membank *mb = &meminfo.bank[bank];
- int memtype = reserve_info->paddr_to_memtype(mb->start);
- unsigned long size;
-
- size = stable_size(mb, reserve_info->low_unstable_address);
- for (i = bank - 1, mb = &meminfo.bank[bank - 1]; i >= 0; i--, mb--) {
- if (mb->start + mb->size != (mb + 1)->start)
- break;
- if (reserve_info->paddr_to_memtype(mb->start) != memtype)
- break;
- size += stable_size(mb, reserve_info->low_unstable_address);
- }
- return size;
-}
-
+/**
+ * calculate_reserve_limits() - calculate reserve limits for all
+ * memtypes
+ *
+ * for each memtype in the reserve_info->memtype_reserve_table, sets
+ * the `limit' field to the largest size of any memblock of that
+ * memtype.
+ */
static void __init calculate_reserve_limits(void)
{
- int i;
- struct membank *mb;
+ struct memblock_region *mr;
int memtype;
struct memtype_reserve *mt;
- unsigned long size;
- for (i = 0, mb = &meminfo.bank[0]; i < meminfo.nr_banks; i++, mb++) {
- memtype = reserve_info->paddr_to_memtype(mb->start);
+ for_each_memblock(memory, mr) {
+ memtype = reserve_info->paddr_to_memtype(mr->base);
if (memtype == MEMTYPE_NONE) {
- pr_warning("unknown memory type for bank at %lx\n",
- (long unsigned int)mb->start);
+ pr_warning("unknown memory type for region at %lx\n",
+ (long unsigned int)mr->base);
continue;
}
mt = &reserve_info->memtype_reserve_table[memtype];
- size = total_stable_size(i);
- mt->limit = max(mt->limit, size);
+ mt->limit = max_t(unsigned long, mt->limit, mr->size);
}
}
@@ -252,50 +218,38 @@
static void __init reserve_memory_for_mempools(void)
{
- int i, memtype, membank_type;
+ int memtype, memreg_type;
struct memtype_reserve *mt;
- struct membank *mb;
+ struct memblock_region *mr, *mr_candidate = NULL;
int ret;
- unsigned long size;
mt = &reserve_info->memtype_reserve_table[0];
for (memtype = 0; memtype < MEMTYPE_MAX; memtype++, mt++) {
if (mt->flags & MEMTYPE_FLAGS_FIXED || !mt->size)
continue;
- /* We know we will find memory bank(s) of the proper size
- * as we have limited the size of the memory pool for
- * each memory type to the largest total size of the memory
- * banks which are contiguous and of the correct memory type.
- * Choose the memory bank with the highest physical
+ /* Choose the memory block with the highest physical
* address which is large enough, so that we will not
* take memory from the lowest memory bank which the kernel
* is in (and cause boot problems) and so that we might
* be able to steal memory that would otherwise become
- * highmem. However, do not use unstable memory.
+ * highmem.
*/
- for (i = meminfo.nr_banks - 1; i >= 0; i--) {
- mb = &meminfo.bank[i];
- membank_type =
- reserve_info->paddr_to_memtype(mb->start);
- if (memtype != membank_type)
+ for_each_memblock(memory, mr) {
+ memreg_type =
+ reserve_info->paddr_to_memtype(mr->base);
+ if (memtype != memreg_type)
continue;
- size = total_stable_size(i);
- if (size >= mt->size) {
- size = stable_size(mb,
- reserve_info->low_unstable_address);
- if (!size)
- continue;
- /* mt->size may be larger than size, all this
- * means is that we are carving the memory pool
- * out of multiple contiguous memory banks.
- */
- mt->start = mb->start + (size - mt->size);
- ret = memblock_remove(mt->start, mt->size);
- BUG_ON(ret);
- break;
- }
+ if (mr->size >= mt->size
+ && (mr_candidate == NULL
+ || mr->base > mr_candidate->base))
+ mr_candidate = mr;
}
+ BUG_ON(mr_candidate == NULL);
+ /* bump mt up against the top of the region */
+ mt->start = mr_candidate->base + mr_candidate->size - mt->size;
+ ret = memblock_remove(mt->start, mt->size);
+ BUG_ON(ret);
}
}
diff --git a/arch/arm/mach-msm/modem-8660.c b/arch/arm/mach-msm/modem-8660.c
deleted file mode 100644
index 096ed9c..0000000
--- a/arch/arm/mach-msm/modem-8660.c
+++ /dev/null
@@ -1,290 +0,0 @@
-/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/reboot.h>
-#include <linux/workqueue.h>
-#include <linux/io.h>
-#include <linux/jiffies.h>
-#include <linux/stringify.h>
-#include <linux/delay.h>
-#include <linux/module.h>
-#include <linux/err.h>
-
-#include <mach/irqs.h>
-#include <mach/scm.h>
-#include <mach/peripheral-loader.h>
-#include <mach/subsystem_restart.h>
-#include <mach/subsystem_notif.h>
-
-#include "smd_private.h"
-#include "modem_notifier.h"
-#include "ramdump.h"
-
-#define MODEM_HWIO_MSS_RESET_ADDR 0x00902C48
-#define MODULE_NAME "modem_8660"
-#define MODEM_WDOG_ENABLE 0x10020008
-#define MODEM_CLEANUP_DELAY_MS 20
-
-#define SUBSYS_FATAL_DEBUG
-
-#if defined(SUBSYS_FATAL_DEBUG)
-static void debug_crash_modem_fn(struct work_struct *);
-static int reset_modem;
-static int ignore_smsm_ack;
-
-static DECLARE_DELAYED_WORK(debug_crash_modem_work,
- debug_crash_modem_fn);
-
-module_param(reset_modem, int, 0644);
-#endif
-
-static struct subsys_device *modem_8660_dev;
-
-/* Subsystem restart: Modem data, functions */
-static void *modem_ramdump_dev;
-static void modem_fatal_fn(struct work_struct *);
-static void modem_unlock_timeout(struct work_struct *work);
-static int modem_notif_handler(struct notifier_block *this,
- unsigned long code,
- void *_cmd);
-static DECLARE_WORK(modem_fatal_work, modem_fatal_fn);
-static DECLARE_DELAYED_WORK(modem_unlock_timeout_work,
- modem_unlock_timeout);
-
-static struct notifier_block modem_notif_nb = {
- .notifier_call = modem_notif_handler,
-};
-
-static void modem_unlock_timeout(struct work_struct *work)
-{
- void __iomem *hwio_modem_reset_addr =
- ioremap_nocache(MODEM_HWIO_MSS_RESET_ADDR, 8);
- pr_crit("%s: Timeout waiting for modem to unlock.\n", MODULE_NAME);
-
- /* Set MSS_MODEM_RESET to 0x0 since the unlock didn't work */
- writel_relaxed(0x0, hwio_modem_reset_addr);
- /* Write needs to go through before the modem is restarted. */
- mb();
- iounmap(hwio_modem_reset_addr);
-
- subsystem_restart_dev(modem_8660_dev);
- enable_irq(MARM_WDOG_EXPIRED);
-}
-
-static void modem_fatal_fn(struct work_struct *work)
-{
- uint32_t modem_state;
- uint32_t panic_smsm_states = SMSM_RESET | SMSM_SYSTEM_DOWNLOAD;
- uint32_t reset_smsm_states = SMSM_SYSTEM_REBOOT_USR |
- SMSM_SYSTEM_PWRDWN_USR;
-
- pr_err("%s: Watchdog bite received from modem!\n", MODULE_NAME);
-
- modem_state = smsm_get_state(SMSM_MODEM_STATE);
- pr_err("%s: Modem SMSM state = 0x%x!", MODULE_NAME, modem_state);
-
- if (modem_state == 0 || modem_state & panic_smsm_states) {
-
- subsystem_restart_dev(modem_8660_dev);
- enable_irq(MARM_WDOG_EXPIRED);
-
- } else if (modem_state & reset_smsm_states) {
-
- pr_err("%s: User-invoked system reset/powerdown.",
- MODULE_NAME);
- kernel_restart(NULL);
-
- } else {
-
- int ret;
- void *hwio_modem_reset_addr =
- ioremap_nocache(MODEM_HWIO_MSS_RESET_ADDR, 8);
-
- pr_err("%s: Modem AHB locked up.\n", MODULE_NAME);
- pr_err("%s: Trying to free up modem!\n", MODULE_NAME);
-
- writel_relaxed(0x3, hwio_modem_reset_addr);
-
- /* If we are still alive after 6 seconds (allowing for
- * the 5-second-delayed-panic-reboot), modem is either
- * still wedged or SMSM didn't come through. Force panic
- * in that case.
- */
- ret = schedule_delayed_work(&modem_unlock_timeout_work,
- msecs_to_jiffies(6000));
-
- iounmap(hwio_modem_reset_addr);
- }
-}
-
-static int modem_notif_handler(struct notifier_block *this,
- unsigned long code,
- void *_cmd)
-{
- if (code == MODEM_NOTIFIER_START_RESET) {
- if (ignore_smsm_ack) {
- ignore_smsm_ack = 0;
- goto out;
- }
- pr_err("%s: Modem error fatal'ed.", MODULE_NAME);
- subsystem_restart_dev(modem_8660_dev);
- }
-out:
- return NOTIFY_DONE;
-}
-
-static int modem_shutdown(const struct subsys_desc *crashed_subsys)
-{
- void __iomem *modem_wdog_addr;
-
- /* If the modem didn't already crash, setting SMSM_RESET
- * here will help flush caches etc. The ignore_smsm_ack
- * flag is set to ignore the SMSM_RESET notification
- * that is generated due to the modem settings its own
- * SMSM_RESET bit in response to the apps setting the
- * apps SMSM_RESET bit.
- */
- if (!(smsm_get_state(SMSM_MODEM_STATE) & SMSM_RESET)) {
- ignore_smsm_ack = 1;
- smsm_reset_modem(SMSM_RESET);
- }
-
- /* Disable the modem watchdog to allow clean modem bootup */
- modem_wdog_addr = ioremap_nocache(MODEM_WDOG_ENABLE, 8);
- writel_relaxed(0x0, modem_wdog_addr);
-
- /*
- * The write above needs to go through before the modem is
- * powered up again (subsystem restart).
- */
- mb();
- iounmap(modem_wdog_addr);
-
- /* Wait here to allow the modem to clean up caches etc. */
- msleep(MODEM_CLEANUP_DELAY_MS);
- pil_force_shutdown("modem");
- disable_irq_nosync(MARM_WDOG_EXPIRED);
-
-
-
- return 0;
-}
-
-static int modem_powerup(const struct subsys_desc *crashed_subsys)
-{
- int ret;
-
- ret = pil_force_boot("modem");
- enable_irq(MARM_WDOG_EXPIRED);
-
- return ret;
-}
-
-/* FIXME: Get address, size from PIL */
-static struct ramdump_segment modem_segments[] = {
- {0x42F00000, 0x46000000 - 0x42F00000} };
-
-static int modem_ramdump(int enable, const struct subsys_desc *crashed_subsys)
-{
- if (enable)
- return do_ramdump(modem_ramdump_dev, modem_segments,
- ARRAY_SIZE(modem_segments));
- else
- return 0;
-}
-
-static void modem_crash_shutdown(const struct subsys_desc *crashed_subsys)
-{
- /* If modem hasn't already crashed, send SMSM_RESET. */
- if (!(smsm_get_state(SMSM_MODEM_STATE) & SMSM_RESET)) {
- modem_unregister_notifier(&modem_notif_nb);
- smsm_reset_modem(SMSM_RESET);
- }
-
- /* Wait to allow the modem to clean up caches etc. */
- mdelay(5);
-}
-
-static irqreturn_t modem_wdog_bite_irq(int irq, void *dev_id)
-{
- int ret;
-
- ret = schedule_work(&modem_fatal_work);
- disable_irq_nosync(MARM_WDOG_EXPIRED);
-
- return IRQ_HANDLED;
-}
-
-static struct subsys_desc subsys_8660_modem = {
- .name = "modem",
- .shutdown = modem_shutdown,
- .powerup = modem_powerup,
- .ramdump = modem_ramdump,
- .crash_shutdown = modem_crash_shutdown
-};
-
-static int __init modem_8660_init(void)
-{
- int ret;
-
- /* Need to listen for SMSM_RESET always */
- modem_register_notifier(&modem_notif_nb);
-
-#if defined(SUBSYS_FATAL_DEBUG)
- schedule_delayed_work(&debug_crash_modem_work, msecs_to_jiffies(5000));
-#endif
-
- ret = request_irq(MARM_WDOG_EXPIRED, modem_wdog_bite_irq,
- IRQF_TRIGGER_RISING, "modem_wdog", NULL);
-
- if (ret < 0) {
- pr_err("%s: Unable to request MARM_WDOG_EXPIRED irq.",
- __func__);
- goto out;
- }
-
- modem_ramdump_dev = create_ramdump_device("modem");
-
- if (!modem_ramdump_dev) {
- ret = -ENOMEM;
- goto out;
- }
-
- modem_8660_dev = subsys_register(&subsys_8660_modem);
- if (IS_ERR(modem_8660_dev))
- ret = PTR_ERR(modem_8660_dev);
-out:
- return ret;
-}
-
-static void __exit modem_8660_exit(void)
-{
- subsys_unregister(modem_8660_dev);
- free_irq(MARM_WDOG_EXPIRED, NULL);
-}
-
-#ifdef SUBSYS_FATAL_DEBUG
-static void debug_crash_modem_fn(struct work_struct *work)
-{
- if (reset_modem == 1)
- smsm_reset_modem(SMSM_RESET);
-
- reset_modem = 0;
- schedule_delayed_work(&debug_crash_modem_work, msecs_to_jiffies(1000));
-}
-#endif
-
-module_init(modem_8660_init);
-module_exit(modem_8660_exit);
-
diff --git a/arch/arm/mach-msm/modem-8960.c b/arch/arm/mach-msm/modem-8960.c
index f0a123b..83b3bc4 100644
--- a/arch/arm/mach-msm/modem-8960.c
+++ b/arch/arm/mach-msm/modem-8960.c
@@ -258,7 +258,7 @@
{
int ret;
- if (cpu_is_apq8064())
+ if (cpu_is_apq8064() || cpu_is_apq8064ab())
return -ENODEV;
ret = smsm_state_cb_register(SMSM_MODEM_STATE, SMSM_RESET,
diff --git a/arch/arm/mach-msm/modem-ssr-8974.c b/arch/arm/mach-msm/modem-ssr-8974.c
index fec578f..942eca5 100644
--- a/arch/arm/mach-msm/modem-ssr-8974.c
+++ b/arch/arm/mach-msm/modem-ssr-8974.c
@@ -15,10 +15,14 @@
#include <linux/module.h>
#include <linux/err.h>
+#include <mach/peripheral-loader.h>
#include <mach/subsystem_restart.h>
#include <mach/msm_smsm.h>
+#include "ramdump.h"
+
static int crash_shutdown;
+static int modem_ssr_ignore_errors;
static struct subsys_device *modem_ssr_dev;
#define MAX_SSR_REASON_LEN 81U
@@ -50,6 +54,7 @@
static void restart_modem(void)
{
log_modem_sfr();
+ modem_ssr_ignore_errors = 1;
subsystem_restart("modem");
}
@@ -67,11 +72,21 @@
static int modem_shutdown(const struct subsys_desc *subsys)
{
+ pil_force_shutdown("modem");
+ pil_force_shutdown("mba");
return 0;
}
static int modem_powerup(const struct subsys_desc *subsys)
{
+ /*
+ * At this time, the modem is shutdown. Therefore this function cannot
+ * run concurrently with either the watchdog bite error handler or the
+ * SMSM callback, making it safe to unset the flag below.
+ */
+ modem_ssr_ignore_errors = 0;
+ pil_force_boot("mba");
+ pil_force_boot("modem");
return 0;
}
@@ -81,15 +96,53 @@
smsm_reset_modem(SMSM_RESET);
}
-static int modem_ramdump(int enable,
- const struct subsys_desc *crashed_subsys)
+static struct ramdump_segment modem_segments[] = {
+ {0x08400000, 0x0D100000 - 0x08400000},
+};
+
+static struct ramdump_segment smem_segments[] = {
+ {0x0FA00000, 0x0FC00000 - 0x0FA00000},
+};
+
+static void *modem_ramdump_dev;
+static void *smem_ramdump_dev;
+
+static int modem_ramdump(int enable, const struct subsys_desc *crashed_subsys)
{
- return 0;
+ int ret = 0;
+
+ if (!enable)
+ return ret;
+
+ pil_force_boot("mba");
+
+ ret = do_ramdump(modem_ramdump_dev, modem_segments,
+ ARRAY_SIZE(modem_segments));
+
+ if (ret < 0) {
+ pr_err("Unable to dump modem fw memory (rc = %d).\n",
+ ret);
+ goto out;
+ }
+
+ ret = do_ramdump(smem_ramdump_dev, smem_segments,
+ ARRAY_SIZE(smem_segments));
+
+ if (ret < 0) {
+ pr_err("Unable to dump smem memory (rc = %d).\n", ret);
+ goto out;
+ }
+
+out:
+ pil_force_shutdown("mba");
+ return ret;
}
static irqreturn_t modem_wdog_bite_irq(int irq, void *dev_id)
{
- pr_err("Watchdog bite received from modem software!\n");
+ if (modem_ssr_ignore_errors)
+ return IRQ_HANDLED;
+ pr_err("Watchdog bite received from the modem!\n");
restart_modem();
return IRQ_HANDLED;
}
@@ -133,9 +186,27 @@
goto out;
}
+ modem_ramdump_dev = create_ramdump_device("modem");
+
+ if (!modem_ramdump_dev) {
+ pr_err("%s: Unable to create a modem ramdump device.\n",
+ __func__);
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ smem_ramdump_dev = create_ramdump_device("smem-modem");
+
+ if (!smem_ramdump_dev) {
+ pr_err("%s: Unable to create an smem ramdump device.\n",
+ __func__);
+ ret = -ENOMEM;
+ goto out;
+ }
+
pr_info("%s: modem subsystem restart driver init'ed.\n", __func__);
out:
return ret;
}
-arch_initcall(modem_8974_init);
+module_init(modem_8974_init);
diff --git a/arch/arm/mach-msm/mpm.c b/arch/arm/mach-msm/mpm.c
index 1c39415..5127607 100644
--- a/arch/arm/mach-msm/mpm.c
+++ b/arch/arm/mach-msm/mpm.c
@@ -388,6 +388,7 @@
{
unsigned long *apps_irq_bitmap;
int debug_mask;
+ int i = 0;
if (from_idle) {
apps_irq_bitmap = msm_mpm_enabled_apps_irqs;
@@ -400,15 +401,17 @@
}
if (debug_mask) {
- static char buf[DIV_ROUND_UP(MSM_MPM_NR_APPS_IRQS, 32)*9+1];
+ i = find_first_bit(apps_irq_bitmap, MSM_MPM_NR_APPS_IRQS);
+ while (i < MSM_MPM_NR_APPS_IRQS) {
+ struct irq_desc *desc = i ?
+ irq_to_desc(i) : NULL;
+ pr_info("%s: cannot monitor irq=%d %s\n",
+ __func__, i, desc->name);
+ i = find_next_bit(apps_irq_bitmap,
+ MSM_MPM_NR_APPS_IRQS, i + 1);
+ }
- bitmap_scnprintf(buf, sizeof(buf), apps_irq_bitmap,
- MSM_MPM_NR_APPS_IRQS);
- buf[sizeof(buf) - 1] = '\0';
-
- pr_info("%s: cannot monitor %s", __func__, buf);
}
-
return (bool)__bitmap_empty(apps_irq_bitmap, MSM_MPM_NR_APPS_IRQS);
}
diff --git a/arch/arm/mach-msm/msm_cache_dump.c b/arch/arm/mach-msm/msm_cache_dump.c
index 9759d5a..8b4978f 100644
--- a/arch/arm/mach-msm/msm_cache_dump.c
+++ b/arch/arm/mach-msm/msm_cache_dump.c
@@ -21,10 +21,13 @@
#include <linux/pm.h>
#include <linux/memory_alloc.h>
#include <linux/notifier.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
#include <mach/scm.h>
#include <mach/msm_cache_dump.h>
#include <mach/memory.h>
#include <mach/msm_iomap.h>
+#include <mach/msm_memory_dump.h>
#define L2_DUMP_OFFSET 0x14
@@ -37,6 +40,7 @@
*/
static struct l1_cache_dump *l1_dump;
static struct l2_cache_dump *l2_dump;
+static int use_imem_dump_offset;
static int msm_cache_dump_panic(struct notifier_block *this,
unsigned long event, void *ptr)
@@ -45,7 +49,8 @@
/*
* Clear the bootloader magic so the dumps aren't overwritten
*/
- __raw_writel(0, MSM_IMEM_BASE + L2_DUMP_OFFSET);
+ if (use_imem_dump_offset)
+ __raw_writel(0, MSM_IMEM_BASE + L2_DUMP_OFFSET);
scm_call_atomic1(L1C_SERVICE_ID, CACHE_BUFFER_DUMP_COMMAND_ID, 2);
scm_call_atomic1(L1C_SERVICE_ID, CACHE_BUFFER_DUMP_COMMAND_ID, 1);
@@ -65,14 +70,38 @@
static int msm_cache_dump_probe(struct platform_device *pdev)
{
struct msm_cache_dump_platform_data *d = pdev->dev.platform_data;
+ struct msm_client_dump l1_dump_entry, l2_dump_entry;
int ret;
struct {
unsigned long buf;
unsigned long size;
} l1_cache_data;
void *temp;
- unsigned long total_size = d->l1_size + d->l2_size;
+ u32 l1_size, l2_size;
+ unsigned long total_size;
+ if (pdev->dev.of_node) {
+ ret = of_property_read_u32(pdev->dev.of_node,
+ "qcom,l1-dump-size", &l1_size);
+ if (ret)
+ return ret;
+
+ ret = of_property_read_u32(pdev->dev.of_node,
+ "qcom,l2-dump-size", &l2_size);
+ if (ret)
+ return ret;
+
+ use_imem_dump_offset = of_property_read_bool(pdev->dev.of_node,
+ "qcom,use-imem-dump-offset");
+ } else {
+ l1_size = d->l1_size;
+ l2_size = d->l2_size;
+
+ /* Non-DT targets assume the IMEM dump offset shall be used */
+ use_imem_dump_offset = 1;
+ };
+
+ total_size = l1_size + l2_size;
msm_cache_dump_addr = allocate_contiguous_ebi_nomap(total_size, SZ_4K);
if (!msm_cache_dump_addr) {
@@ -86,7 +115,7 @@
iounmap(temp);
l1_cache_data.buf = msm_cache_dump_addr;
- l1_cache_data.size = d->l1_size;
+ l1_cache_data.size = l1_size;
ret = scm_call(L1C_SERVICE_ID, L1C_BUFFER_SET_COMMAND_ID,
&l1_cache_data, sizeof(l1_cache_data), NULL, 0);
@@ -96,10 +125,11 @@
__func__, ret);
l1_dump = (struct l1_cache_dump *)msm_cache_dump_addr;
+ l2_dump = (struct l2_cache_dump *)(msm_cache_dump_addr + l1_size);
#if defined(CONFIG_MSM_CACHE_DUMP_ON_PANIC)
- l1_cache_data.buf = msm_cache_dump_addr + d->l1_size;
- l1_cache_data.size = d->l2_size;
+ l1_cache_data.buf = msm_cache_dump_addr + l1_size;
+ l1_cache_data.size = l2_size;
ret = scm_call(L1C_SERVICE_ID, L2C_BUFFER_SET_COMMAND_ID,
&l1_cache_data, sizeof(l1_cache_data), NULL, 0);
@@ -108,11 +138,27 @@
pr_err("%s: could not register L2 buffer ret = %d.\n",
__func__, ret);
#endif
- __raw_writel(msm_cache_dump_addr + d->l1_size,
+
+ if (use_imem_dump_offset)
+ __raw_writel(msm_cache_dump_addr + l1_size,
MSM_IMEM_BASE + L2_DUMP_OFFSET);
+ else {
+ l1_dump_entry.id = MSM_L1_CACHE;
+ l1_dump_entry.start_addr = msm_cache_dump_addr;
+ l1_dump_entry.end_addr = l1_dump_entry.start_addr + l1_size - 1;
+ l2_dump_entry.id = MSM_L2_CACHE;
+ l2_dump_entry.start_addr = msm_cache_dump_addr + l1_size;
+ l2_dump_entry.end_addr = l2_dump_entry.start_addr + l2_size - 1;
- l2_dump = (struct l2_cache_dump *)(msm_cache_dump_addr + d->l1_size);
+ ret = msm_dump_table_register(&l1_dump_entry);
+ if (ret)
+ pr_err("Could not register L1 dump area: %d\n", ret);
+
+ ret = msm_dump_table_register(&l2_dump_entry);
+ if (ret)
+ pr_err("Could not register L2 dump area: %d\n", ret);
+ }
atomic_notifier_chain_register(&panic_notifier_list,
&msm_cache_dump_blk);
@@ -126,11 +172,18 @@
return 0;
}
+static struct of_device_id cache_dump_match_table[] = {
+ { .compatible = "qcom,cache_dump", },
+ {}
+};
+EXPORT_COMPAT("qcom,cache_dump");
+
static struct platform_driver msm_cache_dump_driver = {
.remove = __devexit_p(msm_cache_dump_remove),
.driver = {
.name = "msm_cache_dump",
- .owner = THIS_MODULE
+ .owner = THIS_MODULE,
+ .of_match_table = cache_dump_match_table,
},
};
diff --git a/arch/arm/mach-msm/msm_cpr.c b/arch/arm/mach-msm/msm_cpr.c
index e2640a2..c00352d 100644
--- a/arch/arm/mach-msm/msm_cpr.c
+++ b/arch/arm/mach-msm/msm_cpr.c
@@ -1,5 +1,4 @@
-/*
- * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -44,6 +43,8 @@
*/
#define TIMER_COUNT(freq, delay) ((freq * delay) / 1000)
#define ALL_CPR_IRQ 0x3F
+#define STEP_QUOT_MAX 25
+#define STEP_QUOT_MIN 12
/* Need platform device handle for suspend and resume APIs */
static struct platform_device *cpr_pdev;
@@ -52,6 +53,26 @@
module_param(enable, bool, 0644);
MODULE_PARM_DESC(enable, "CPR Enable");
+static int msm_cpr_debug_mask;
+module_param_named(
+ debug_mask, msm_cpr_debug_mask, int, S_IRUGO | S_IWUSR
+);
+
+enum {
+ /* configuration log */
+ MSM_CPR_DEBUG_CONFIG = BIT(0),
+ /* step up/down interrupt log */
+ MSM_CPR_DEBUG_STEPS = BIT(1),
+ /* cpu frequency notification log */
+ MSM_CPR_DEBUG_FREQ_TRANS = BIT(2),
+};\
+
+#define msm_cpr_debug(mask, message, ...) \
+ do { \
+ if ((mask) & msm_cpr_debug_mask) \
+ pr_info(message, ##__VA_ARGS__); \
+ } while (0)
+
struct msm_cpr {
int curr_osc;
int cpr_mode;
@@ -63,7 +84,9 @@
unsigned int irq;
uint32_t cur_Vmin;
uint32_t cur_Vmax;
+ uint32_t prev_volt_uV;
struct mutex cpr_mutex;
+ spinlock_t cpr_lock;
struct regulator *vreg_cx;
const struct msm_cpr_config *config;
struct notifier_block freq_transition;
@@ -131,17 +154,17 @@
/* Enable the CPR H/W Block */
static void cpr_enable(struct msm_cpr *cpr)
{
- mutex_lock(&cpr->cpr_mutex);
+ spin_lock(&cpr->cpr_lock);
cpr_modify_reg(cpr, RBCPR_CTL, LOOP_EN_M, ENABLE_CPR);
- mutex_unlock(&cpr->cpr_mutex);
+ spin_unlock(&cpr->cpr_lock);
}
/* Disable the CPR H/W Block */
static void cpr_disable(struct msm_cpr *cpr)
{
- mutex_lock(&cpr->cpr_mutex);
+ spin_lock(&cpr->cpr_lock);
cpr_modify_reg(cpr, RBCPR_CTL, LOOP_EN_M, DISABLE_CPR);
- mutex_unlock(&cpr->cpr_mutex);
+ spin_unlock(&cpr->cpr_lock);
}
static int32_t cpr_poll_result(struct msm_cpr *cpr)
@@ -152,8 +175,7 @@
rc = readl_poll_timeout(cpr->base + RBCPR_RESULT_0, val, ~val & BUSY_M,
10, 1000);
if (rc)
- pr_info("%s: RBCPR_RESULT_0 read error: %d\n",
- __func__, rc);
+ pr_err("RBCPR_RESULT_0 read error: %d\n", rc);
return rc;
}
@@ -165,8 +187,7 @@
rc = readl_poll_timeout(cpr->base + RBIF_IRQ_STATUS, val, val & 0x1,
10, 1000);
if (rc)
- pr_info("%s: RBCPR_IRQ_STATUS read error: %d\n",
- __func__, rc);
+ pr_err("RBCPR_IRQ_STATUS read error: %d\n", rc);
return rc;
}
@@ -198,15 +219,16 @@
*/
level_uV = chip_data->turbo_Vmax -
(chip_data->tgt_volt_offset * cpr->vp->step_size);
- pr_debug("tgt_volt_uV = %d\n", level_uV);
+ msm_cpr_debug(MSM_CPR_DEBUG_CONFIG,
+ "tgt_volt_uV = %d\n", level_uV);
/* Call the PMIC specific routine to set the voltage */
rc = regulator_set_voltage(cpr->vreg_cx, level_uV, level_uV);
if (rc) {
- pr_err("%s: Initial voltage set at %duV failed. %d\n",
- __func__, level_uV, rc);
+ pr_err("Initial voltage set at %duV failed\n", level_uV);
return;
}
+
rc = regulator_enable(cpr->vreg_cx);
if (rc) {
pr_err("failed to enable %s, rc=%d\n", "vdd_cx", rc);
@@ -224,15 +246,13 @@
/* IRQ is already disabled */
rc = cpr_poll_result_done(cpr);
if (rc) {
- pr_err("%s: Quot1: Exiting due to INT_DONE poll timeout\n",
- __func__);
+ pr_err("Quot1: Exiting due to INT_DONE poll timeout\n");
return;
}
rc = cpr_poll_result(cpr);
if (rc) {
- pr_err("%s: Quot1: Exiting due to BUSY poll timeout\n",
- __func__);
+ pr_err("Quot1: Exiting due to BUSY poll timeout\n");
return;
}
@@ -240,14 +260,14 @@
/* Take second CPR measurement at a lower voltage to get QUOT2 */
level_uV -= 4 * cpr->vp->step_size;
- pr_debug("tgt_volt_uV = %d\n", level_uV);
+ msm_cpr_debug(MSM_CPR_DEBUG_CONFIG,
+ "tgt_volt_uV = %d\n", level_uV);
cpr_modify_reg(cpr, RBCPR_CTL, LOOP_EN_M, DISABLE_CPR);
/* Call the PMIC specific routine to set the voltage */
rc = regulator_set_voltage(cpr->vreg_cx, level_uV, level_uV);
if (rc) {
- pr_err("%s: Voltage set at %duV failed. %d\n",
- __func__, level_uV, rc);
+ pr_err("Voltage set at %duV failed\n", level_uV);
return;
}
@@ -257,21 +277,30 @@
/* cpr_write_reg(cpr, RBIF_CONT_NACK_CMD, 0x1); */
rc = cpr_poll_result_done(cpr);
if (rc) {
- pr_err("%s: Quot2: Exiting due to INT_DONE poll timeout\n",
- __func__);
+ pr_err("Quot2: Exiting due to INT_DONE poll timeout\n");
goto err_poll_result_done;
}
/* IRQ is already disabled */
rc = cpr_poll_result(cpr);
if (rc) {
- pr_err("%s: Quot2: Exiting due to BUSY poll timeout\n",
- __func__);
+ pr_err("Quot2: Exiting due to BUSY poll timeout\n");
goto err_poll_result;
}
quot2 = (cpr_read_reg(cpr, RBCPR_DEBUG1) & QUOT_SLOW_M) >> 12;
- chip_data->step_quot = (quot1 - quot2) / 4;
- pr_info("%s: Calculated Step Quot is %d\n",
- __func__, chip_data->step_quot);
+ /*
+ * Based on chip characterization data, it is good to add some
+ * margin on top of calculated step quot to help reduce the
+ * number of CPR interrupts. The present value suggested is 3.
+ * Further, if the step quot is outside range, clamp it to the
+ * maximum permitted value.
+ */
+ chip_data->step_quot = ((quot1 - quot2) / 4) + 3;
+ if (chip_data->step_quot < STEP_QUOT_MIN ||
+ chip_data->step_quot > STEP_QUOT_MAX)
+ chip_data->step_quot = STEP_QUOT_MAX;
+
+ msm_cpr_debug(MSM_CPR_DEBUG_CONFIG,
+ "Step Quot is %d\n", chip_data->step_quot);
/* Disable the cpr */
cpr_modify_reg(cpr, RBCPR_CTL, LOOP_EN_M, DISABLE_CPR);
@@ -316,27 +345,31 @@
static void
cpr_up_event_handler(struct msm_cpr *cpr, uint32_t new_volt)
{
- int rc, set_volt_uV;
+ int set_volt_uV, rc;
struct msm_cpr_mode *chip_data;
chip_data = &cpr->config->cpr_mode_data[cpr->cpr_mode];
- /**
- * FIXME: Need to handle a potential race condition between
- * freq switch handler and CPR interrupt handler here
- */
/* Set New PMIC voltage */
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "current Vmin=%d Vmax=%d\n", cpr->cur_Vmin, cpr->cur_Vmax);
set_volt_uV = (new_volt < cpr->cur_Vmax ? new_volt
: cpr->cur_Vmax);
- rc = regulator_set_voltage(cpr->vreg_cx, set_volt_uV,
- set_volt_uV);
+
+ if (cpr->prev_volt_uV == set_volt_uV)
+ rc = regulator_sync_voltage(cpr->vreg_cx);
+ else
+ rc = regulator_set_voltage(cpr->vreg_cx, set_volt_uV,
+ set_volt_uV);
if (rc) {
- pr_err("%s: Voltage set at %duV failed. %d\n",
- __func__, set_volt_uV, rc);
+ pr_err("Unable to set_voltage = %d, rc(%d)\n", set_volt_uV, rc);
cpr_irq_clr_and_nack(cpr, BIT(4) | BIT(0));
return;
}
- pr_info("(railway_voltage: %d uV)\n", set_volt_uV);
+
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "(railway_voltage: %d uV)\n", set_volt_uV);
+ cpr->prev_volt_uV = set_volt_uV;
cpr->max_volt_set = (set_volt_uV == cpr->cur_Vmax) ? 1 : 0;
@@ -358,27 +391,29 @@
static void
cpr_dn_event_handler(struct msm_cpr *cpr, uint32_t new_volt)
{
- int rc, set_volt_uV;
+ int set_volt_uV, rc;
struct msm_cpr_mode *chip_data;
chip_data = &cpr->config->cpr_mode_data[cpr->cpr_mode];
- /**
- * FIXME: Need to handle a potential race condition between
- * freq switch handler and CPR interrupt handler here
- */
/* Set New PMIC volt */
set_volt_uV = (new_volt > cpr->cur_Vmin ? new_volt
: cpr->cur_Vmin);
- rc = regulator_set_voltage(cpr->vreg_cx, set_volt_uV,
- set_volt_uV);
+
+ if (cpr->prev_volt_uV == set_volt_uV)
+ rc = regulator_sync_voltage(cpr->vreg_cx);
+ else
+ rc = regulator_set_voltage(cpr->vreg_cx, set_volt_uV,
+ set_volt_uV);
if (rc) {
- pr_err("%s: Voltage at %duV failed %d\n",
- __func__, set_volt_uV, rc);
+ pr_err("Unable to set_voltage = %d, rc(%d)\n", set_volt_uV, rc);
cpr_irq_clr_and_nack(cpr, BIT(2) | BIT(0));
return;
}
- pr_info("(railway_voltage: %d uV)\n", set_volt_uV);
+
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "(railway_voltage: %d uV)\n", set_volt_uV);
+ cpr->prev_volt_uV = set_volt_uV;
cpr->max_volt_set = 0;
@@ -402,7 +437,8 @@
SW_AUTO_CONT_NACK_DN_EN_M,
SW_AUTO_CONT_NACK_DN_EN);
cpr_irq_set(cpr, DOWN_INT, 0);
- pr_debug("%s: DOWN_INT disabled\n", __func__);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "DOWN_INT disabled\n");
}
}
/* Acknowledge the Recommendation */
@@ -416,9 +452,18 @@
chip_data = &cpr->config->cpr_mode_data[cpr->cpr_mode];
error_step = cpr_read_reg(cpr, RBCPR_RESULT_0) >> 2;
- error_step &= 0xF;
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "RBCPR_RESULT_0 17:6=%d\n", (cpr_read_reg(cpr,
+ RBCPR_RESULT_0) >> 6) & 0xFFF);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "RBCPR_RESULT_0 Busy_b19=%d\n", (cpr_read_reg(cpr,
+ RBCPR_RESULT_0) >> 19) & 0x1);
+
+ error_step &= 0xF;
curr_volt = regulator_get_voltage(cpr->vreg_cx);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "Current voltage=%d\n", curr_volt);
if (action == UP) {
/* Clear IRQ, ACK and return if Vdd already at Vmax */
@@ -434,15 +479,29 @@
*/
if (error_step < (cpr->config->up_threshold +
cpr->config->up_margin)) {
- pr_debug("UP_INT error step too small to set\n");
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "UP_INT error step too small to set\n");
cpr_irq_clr_and_nack(cpr, BIT(4) | BIT(0));
return;
}
+ /**
+ * As per chip characterization recommendation, add a step
+ * to up error steps to increase system stability
+ */
+ error_step += 1;
+
/* Calculte new PMIC voltage */
new_volt = curr_volt + (error_step * cpr->vp->step_size);
- pr_debug("UP_INT: new_volt: %d\n", new_volt);
- pr_info("(UP Voltage recommended by CPR: %d uV)\n", new_volt);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "UP_INT: new_volt: %d, error_step=%d\n",
+ new_volt, error_step);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "Current RBCPR_GCNT_TARGET(%d): = 0x%x\n",
+ cpr->curr_osc, readl_relaxed(cpr->base +
+ RBCPR_GCNT_TARGET(cpr->curr_osc)) & TARGET_M);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "(UP Voltage recommended by CPR: %d uV)\n", new_volt);
cpr_up_event_handler(cpr, new_volt);
} else if (action == DOWN) {
@@ -452,15 +511,35 @@
*/
if (error_step < (cpr->config->dn_threshold +
cpr->config->dn_margin)) {
- pr_debug("DOWN_INT error_step too small to set\n");
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "DOWN_INT error_step=%d is too small to set\n",
+ error_step);
cpr_irq_clr_and_nack(cpr, BIT(2) | BIT(0));
return;
}
+ /**
+ * As per chip characterization recommendation, deduct 2 steps
+ * from down error steps to decrease chances of getting closer
+ * to the system level Vmin, thereby improving stability
+ */
+ error_step -= 2;
+
+ /* Keep down step upto two per interrupt to avoid any spike */
+ if (error_step > 2)
+ error_step = 2;
+
/* Calculte new PMIC voltage */
new_volt = curr_volt - (error_step * cpr->vp->step_size);
- pr_debug("DOWN_INT: new_volt: %d\n", new_volt);
- pr_info("(DN Voltage recommended by CPR: %d uV)\n", new_volt);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "DOWN_INT: new_volt: %d, error_step=%d\n",
+ new_volt, error_step);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "Current RBCPR_GCNT_TARGET(%d): = 0x%x\n",
+ cpr->curr_osc, readl_relaxed(cpr->base +
+ RBCPR_GCNT_TARGET(cpr->curr_osc)) & TARGET_M);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "(DN Voltage recommended by CPR: %d uV)\n", new_volt);
cpr_dn_event_handler(cpr, new_volt);
}
}
@@ -475,31 +554,36 @@
/* Following sequence of handling is as per each IRQ's priority */
if (reg_val & BIT(4)) {
- pr_debug(" CPR:IRQ %d occured for UP Flag\n", irq);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "CPR:IRQ %d occured for UP Flag\n", irq);
cpr_set_vdd(cpr, UP);
} else if ((reg_val & BIT(2)) && !(ctl_reg & SW_AUTO_CONT_NACK_DN_EN)) {
- pr_debug(" CPR:IRQ %d occured for Down Flag\n", irq);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "CPR:IRQ %d occured for Down Flag\n", irq);
cpr_set_vdd(cpr, DOWN);
} else if (reg_val & BIT(1)) {
- pr_debug(" CPR:IRQ %d occured for Min Flag\n", irq);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "CPR:IRQ %d occured for Min Flag\n", irq);
cpr_irq_clr_and_nack(cpr, BIT(1) | BIT(0));
} else if (reg_val & BIT(5)) {
- pr_debug(" CPR:IRQ %d occured for MAX Flag\n", irq);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "CPR:IRQ %d occured for MAX Flag\n", irq);
cpr_irq_clr_and_nack(cpr, BIT(5) | BIT(0));
} else if (reg_val & BIT(3)) {
/* SW_AUTO_CONT_ACK_EN is enabled */
- pr_debug(" CPR:IRQ %d occured for Mid Flag\n", irq);
+ msm_cpr_debug(MSM_CPR_DEBUG_STEPS,
+ "CPR:IRQ %d occured for Mid Flag\n", irq);
}
return IRQ_HANDLED;
}
static void cpr_config(struct msm_cpr *cpr)
{
- uint32_t delay_count, cnt = 0, rc, tmp_uV;
+ uint32_t delay_count, cnt = 0, rc;
struct msm_cpr_mode *chip_data;
chip_data = &cpr->config->cpr_mode_data[cpr->cpr_mode];
@@ -530,11 +614,16 @@
* for all the ring oscilators
*/
while (cnt < NUM_OSC) {
+ msm_cpr_debug(MSM_CPR_DEBUG_CONFIG,
+ "Prog:cnt(%d) gcnt=0x%x quot=0x%x\n", cnt,
+ chip_data->ring_osc_data[cnt].gcnt,
+ chip_data->ring_osc_data[cnt].quot);
cpr_modify_reg(cpr, RBCPR_GCNT_TARGET(cnt),
(GCNT_M | TARGET_M),
(chip_data->ring_osc_data[cnt].gcnt << 12 |
chip_data->ring_osc_data[cnt].quot));
- pr_debug("RBCPR_GCNT_TARGET(%d): = 0x%x\n", cnt,
+ msm_cpr_debug(MSM_CPR_DEBUG_CONFIG,
+ "RBCPR_GCNT_TARGET(%d): = 0x%x\n", cnt,
readl_relaxed(cpr->base + RBCPR_GCNT_TARGET(cnt)));
cnt++;
}
@@ -542,16 +631,11 @@
/* Configure the step quot */
cpr_2pt_kv_analysis(cpr, chip_data);
- /**
- * Call the PMIC specific routine to set the voltage
- * Set with an extra step since it helps as per
- * characterization data.
- */
- chip_data->calibrated_uV += cpr->vp->step_size;
- tmp_uV = chip_data->calibrated_uV;
- rc = regulator_set_voltage(cpr->vreg_cx, tmp_uV, tmp_uV);
+ /* Call the PMIC specific routine to set the voltage */
+ rc = regulator_set_voltage(cpr->vreg_cx, chip_data->calibrated_uV,
+ chip_data->calibrated_uV);
if (rc)
- pr_err("%s: Voltage set failed %d\n", __func__, rc);
+ pr_err("Voltage set failed %d\n", rc);
/*
* Program the Timer Register for delay between CPR measurements
@@ -562,6 +646,11 @@
cpr->config->delay_us);
cpr_write_reg(cpr, RBCPR_TIMER_INTERVAL, delay_count);
+ /* Use Consecutive Down to avoid any interrupt due to spike */
+ cpr_write_reg(cpr, RBIF_TIMER_ADJUST, (0x2 << RBIF_CONS_DN_SHIFT));
+ msm_cpr_debug(MSM_CPR_DEBUG_CONFIG, "RBIF_TIMER_ADJUST: 0x%x\n",
+ readl_relaxed(cpr->base + RBIF_TIMER_ADJUST));
+
/* Enable the Timer */
cpr_modify_reg(cpr, RBCPR_CTL, TIMER_M, ENABLE_TIMER);
@@ -580,19 +669,23 @@
switch (val) {
case CPUFREQ_PRECHANGE:
- pr_debug("pre freq change notification to cpr\n");
-
+ msm_cpr_debug(MSM_CPR_DEBUG_FREQ_TRANS,
+ "pre freq change notification to cpr\n");
/* Disable Measurement to stop generation of CPR IRQs */
cpr_disable(cpr);
/* Disable routing of IRQ to App */
cpr_irq_set(cpr, INT_MASK & ~MID_INT, 0);
disable_irq(cpr->irq);
cpr_write_reg(cpr, RBIF_IRQ_CLEAR, ALL_CPR_IRQ);
- pr_debug("RBCPR_CTL: 0x%x\n",
+
+ msm_cpr_debug(MSM_CPR_DEBUG_FREQ_TRANS,
+ "RBCPR_CTL: 0x%x\n",
readl_relaxed(cpr->base + RBCPR_CTL));
- pr_debug("RBIF_IRQ_STATUS: 0x%x\n",
+ msm_cpr_debug(MSM_CPR_DEBUG_FREQ_TRANS,
+ "RBIF_IRQ_STATUS: 0x%x\n",
cpr_read_reg(cpr, RBIF_IRQ_STATUS));
- pr_debug("RBIF_IRQ_EN(0): 0x%x\n",
+ msm_cpr_debug(MSM_CPR_DEBUG_FREQ_TRANS,
+ "RBIF_IRQ_EN(0): 0x%x\n",
cpr_read_reg(cpr, RBIF_IRQ_EN(cpr->config->irq_line)));
cpr->prev_mode = cpr->cpr_mode;
@@ -621,11 +714,16 @@
new_freq / 1000);
cpr_modify_reg(cpr, RBCPR_GCNT_TARGET(cpr->curr_osc), TARGET_M,
quot);
- pr_debug("RBCPR_GCNT_TARGET(%d): = 0x%x\n", cpr->curr_osc,
+ msm_cpr_debug(MSM_CPR_DEBUG_FREQ_TRANS,
+ "RBCPR_GCNT_TARGET(%d): = 0x%x\n", cpr->curr_osc,
readl_relaxed(cpr->base +
RBCPR_GCNT_TARGET(cpr->curr_osc)));
- pr_debug("%s: new_freq: %d, set_freq: %d, quot: %d\n", __func__,
+ msm_cpr_debug(MSM_CPR_DEBUG_FREQ_TRANS,
+ "new_freq: %d, quot_freq: %d, quot: %d\n",
freqs->new, new_freq, quot);
+ msm_cpr_debug(MSM_CPR_DEBUG_FREQ_TRANS,
+ "PVS Voltage setting is: %d\n",
+ regulator_get_voltage(cpr->vreg_cx));
enable_irq(cpr->irq);
/**
@@ -641,18 +739,28 @@
if (ctl_reg & SW_AUTO_CONT_NACK_DN_EN)
cpr_modify_reg(cpr, RBCPR_CTL,
SW_AUTO_CONT_NACK_DN_EN_M, 0);
- pr_debug("RBIF_IRQ_EN(0): 0x%x\n",
+ if (cpr->max_volt_set)
+ cpr->max_volt_set = 0;
+
+ msm_cpr_debug(MSM_CPR_DEBUG_FREQ_TRANS,
+ "RBIF_IRQ_EN(0): 0x%x\n",
cpr_read_reg(cpr, RBIF_IRQ_EN(cpr->config->irq_line)));
- pr_debug("RBCPR_CTL: 0x%x\n",
+ msm_cpr_debug(MSM_CPR_DEBUG_FREQ_TRANS,
+ "RBCPR_CTL: 0x%x\n",
readl_relaxed(cpr->base + RBCPR_CTL));
- pr_debug("RBIF_IRQ_STATUS: 0x%x\n",
+ msm_cpr_debug(MSM_CPR_DEBUG_FREQ_TRANS,
+ "RBIF_IRQ_STATUS: 0x%x\n",
cpr_read_reg(cpr, RBIF_IRQ_STATUS));
+
+ /* Clear all the interrupts */
+ cpr_write_reg(cpr, RBIF_IRQ_CLEAR, ALL_CPR_IRQ);
+
cpr_enable(cpr);
break;
default:
break;
}
- return 0;
+ return NOTIFY_OK;
}
#ifdef CONFIG_PM
@@ -680,6 +788,9 @@
cpr_write_reg(cpr, RBCPR_CTL,
cpr_save_state.rbcpr_ctl);
+ /* Clear all the interrupts */
+ cpr_write_reg(cpr, RBIF_IRQ_CLEAR, ALL_CPR_IRQ);
+
enable_irq(cpr->irq);
cpr_enable(cpr);
@@ -696,6 +807,9 @@
cpr_disable(cpr);
disable_irq(cpr->irq);
+ /* Clear all the interrupts */
+ cpr_write_reg(cpr, RBIF_IRQ_CLEAR, ALL_CPR_IRQ);
+
cpr_save_state.rbif_timer_interval =
cpr_read_reg(cpr, RBCPR_TIMER_INTERVAL);
cpr_save_state.rbif_int_en =
@@ -718,12 +832,18 @@
void msm_cpr_pm_resume(void)
{
+ if (!enable)
+ return;
+
msm_cpr_resume(&cpr_pdev->dev);
}
EXPORT_SYMBOL(msm_cpr_pm_resume);
void msm_cpr_pm_suspend(void)
{
+ if (!enable)
+ return;
+
msm_cpr_suspend(&cpr_pdev->dev);
}
EXPORT_SYMBOL(msm_cpr_pm_suspend);
@@ -731,14 +851,26 @@
void msm_cpr_disable(void)
{
- struct msm_cpr *cpr = platform_get_drvdata(cpr_pdev);
+ struct msm_cpr *cpr;
+
+ if (!enable)
+ return;
+
+ cpr = platform_get_drvdata(cpr_pdev);
+
cpr_disable(cpr);
}
EXPORT_SYMBOL(msm_cpr_disable);
void msm_cpr_enable(void)
{
- struct msm_cpr *cpr = platform_get_drvdata(cpr_pdev);
+ struct msm_cpr *cpr;
+
+ if (!enable)
+ return;
+
+ cpr = platform_get_drvdata(cpr_pdev);
+
cpr_enable(cpr);
}
EXPORT_SYMBOL(msm_cpr_enable);
@@ -757,12 +889,15 @@
if (!pdata) {
pr_err("CPR: Platform data is not available\n");
+ enable = false;
return -EIO;
}
cpr = devm_kzalloc(&pdev->dev, sizeof(struct msm_cpr), GFP_KERNEL);
- if (!cpr)
+ if (!cpr) {
+ enable = false;
return -ENOMEM;
+ }
/* Initialize platform_data */
cpr->config = pdata;
@@ -805,7 +940,7 @@
cpr->vp = pdata->vp_data;
- mutex_init(&cpr->cpr_mutex);
+ spin_lock_init(&cpr->cpr_lock);
/* Initialize the Voltage domain for CPR */
cpr->vreg_cx = regulator_get(&pdev->dev, "vddx_cx");
@@ -825,12 +960,15 @@
platform_set_drvdata(pdev, cpr);
chip_data = &cpr->config->cpr_mode_data[cpr->cpr_mode];
- pr_info("CPR Platform Data (upside_steps: %d) (downside_steps: %d) ",
+ msm_cpr_debug(MSM_CPR_DEBUG_CONFIG,
+ "CPR Platform Data (upside_steps: %d) (downside_steps: %d))",
cpr->config->up_threshold, cpr->config->dn_threshold);
- pr_info("(nominal_voltage: %duV) (turbo_voltage: %duV)\n",
+ msm_cpr_debug(MSM_CPR_DEBUG_CONFIG,
+ "(nominal_voltage: %duV) (turbo_voltage: %duV)\n",
cpr->config->cpr_mode_data[NORMAL_MODE].calibrated_uV,
cpr->config->cpr_mode_data[TURBO_MODE].calibrated_uV);
- pr_info("(Current corner: TURBO) (gcnt_target: %d) (quot: %d)\n",
+ msm_cpr_debug(MSM_CPR_DEBUG_CONFIG,
+ "(Current corner: TURBO) (gcnt_target: %d) (quot: %d)\n",
chip_data->ring_osc_data[chip_data->ring_osc].gcnt,
chip_data->ring_osc_data[chip_data->ring_osc].quot);
@@ -865,6 +1003,8 @@
cpufreq_register_notifier(&cpr->freq_transition,
CPUFREQ_TRANSITION_NOTIFIER);
+ pr_info("MSM CPR driver successfully registered!\n");
+
return res;
err_reg_get:
@@ -872,6 +1012,7 @@
err_ioremap:
iounmap(base);
out:
+ enable = false;
return res;
}
@@ -886,7 +1027,6 @@
regulator_put(cpr->vreg_cx);
free_irq(cpr->irq, cpr);
iounmap(cpr->base);
- mutex_destroy(&cpr->cpr_mutex);
platform_set_drvdata(pdev, NULL);
return 0;
diff --git a/arch/arm/mach-msm/msm_cpr.h b/arch/arm/mach-msm/msm_cpr.h
index e690c63..005d9b1 100644
--- a/arch/arm/mach-msm/msm_cpr.h
+++ b/arch/arm/mach-msm/msm_cpr.h
@@ -72,6 +72,9 @@
#define SW_AUTO_CONT_ACK_EN BIT(5)
#define SW_AUTO_CONT_NACK_DN_EN BIT(6)
+/* Shift Values */
+#define RBIF_CONS_DN_SHIFT (0x4)
+
/* Test values for RBCPR RUMI Testing */
#define GNT_CNT 0xC0
#define TARGET 0xEFF
diff --git a/arch/arm/mach-msm/msm_dsps.c b/arch/arm/mach-msm/msm_dsps.c
index 6dde576..c39829b 100644
--- a/arch/arm/mach-msm/msm_dsps.c
+++ b/arch/arm/mach-msm/msm_dsps.c
@@ -45,7 +45,7 @@
#include "timer.h"
#define DRV_NAME "msm_dsps"
-#define DRV_VERSION "4.02"
+#define DRV_VERSION "4.03"
#define PPSS_TIMER0_32KHZ_REG 0x1004
@@ -771,6 +771,11 @@
{
pr_debug("%s\n", __func__);
disable_irq_nosync(drv->wdog_irq);
+ if (drv->pdata->ppss_wdog_unmasked_int_en_reg) {
+ writel_relaxed(0, (drv->ppss_base+
+ drv->pdata->ppss_wdog_unmasked_int_en_reg));
+ mb(); /* Make sure wdog is disabled before shutting down */
+ }
pil_force_shutdown(drv->pdata->pil_name);
dsps_power_off_handler();
return 0;
@@ -799,6 +804,7 @@
static void dsps_crash_shutdown(const struct subsys_desc *subsys)
{
pr_debug("%s\n", __func__);
+ disable_irq_nosync(drv->wdog_irq);
dsps_crash_shutdown_g = 1;
smsm_change_state(SMSM_DSPS_STATE, SMSM_RESET, SMSM_RESET);
}
diff --git a/arch/arm/mach-msm/msm_xo.c b/arch/arm/mach-msm/msm_xo.c
index 2d61504..404b350 100644
--- a/arch/arm/mach-msm/msm_xo.c
+++ b/arch/arm/mach-msm/msm_xo.c
@@ -236,7 +236,7 @@
int needs_workaround = cpu_is_msm8960() || cpu_is_apq8064() ||
cpu_is_msm8930() || cpu_is_msm8930aa() ||
cpu_is_msm9615() || cpu_is_msm8627() ||
- cpu_is_msm8960ab();
+ cpu_is_msm8960ab() || cpu_is_apq8064ab();
if (xo_voter->mode == mode)
return 0;
diff --git a/arch/arm/mach-msm/ocmem_core.c b/arch/arm/mach-msm/ocmem_core.c
index 5a85eec..9a85a17 100644
--- a/arch/arm/mach-msm/ocmem_core.c
+++ b/arch/arm/mach-msm/ocmem_core.c
@@ -856,7 +856,7 @@
/* Interfaces invoked from the scheduler */
int ocmem_memory_off(int id, unsigned long offset, unsigned long len)
{
- return switch_power_state(id, offset, len, REGION_DEFAULT_OFF);
+ return switch_power_state(id, offset, len, REGION_DEFAULT_ON);
}
int ocmem_memory_on(int id, unsigned long offset, unsigned long len)
@@ -866,7 +866,7 @@
int ocmem_memory_retain(int id, unsigned long offset, unsigned long len)
{
- return switch_power_state(id, offset, len, REGION_DEFAULT_RETENTION);
+ return switch_power_state(id, offset, len, REGION_DEFAULT_ON);
}
static int ocmem_power_show_sw_state(struct seq_file *f, void *dummy)
diff --git a/arch/arm/mach-msm/ocmem_rdm.c b/arch/arm/mach-msm/ocmem_rdm.c
index 85dc85d..4aba69c 100644
--- a/arch/arm/mach-msm/ocmem_rdm.c
+++ b/arch/arm/mach-msm/ocmem_rdm.c
@@ -93,8 +93,8 @@
static void *br_base;
static void *dm_base;
-static atomic_t dm_pending;
-static wait_queue_head_t dm_wq;
+struct completion dm_clear_event;
+struct completion dm_transfer_event;
/* Shadow tables for debug purposes */
struct ocmem_br_table {
unsigned int offset;
@@ -136,22 +136,22 @@
pr_debug("Data mover completed\n");
irq_status &= ~BIT(0);
ocmem_write(irq_status, dm_base + DM_INTR_CLR);
+ complete(&dm_transfer_event);
} else if (irq_status & BIT(1)) {
pr_debug("Data clear engine completed\n");
irq_status &= ~BIT(1);
ocmem_write(irq_status, dm_base + DM_INTR_CLR);
+ complete(&dm_clear_event);
} else {
BUG_ON(1);
}
- atomic_set(&dm_pending, 0);
- wake_up_interruptible(&dm_wq);
return IRQ_HANDLED;
}
#ifdef CONFIG_MSM_OCMEM_NONSECURE
int ocmem_clear(unsigned long start, unsigned long size)
{
- atomic_set(&dm_pending, 1);
+ INIT_COMPLETION(dm_clear_event);
/* Clear DM Mask */
ocmem_write(DM_MASK_RESET, dm_base + DM_INTR_MASK);
/* Clear DM Interrupts */
@@ -169,8 +169,8 @@
/* Trigger Data Clear */
ocmem_write(DM_CLR_ENABLE, dm_base + DM_CLR_TRIGGER);
- wait_event_interruptible(dm_wq,
- atomic_read(&dm_pending) == 0);
+ wait_for_completion(&dm_clear_event);
+
return 0;
}
#else
@@ -249,7 +249,7 @@
status = ocmem_read(dm_base + DM_GEN_STATUS);
pr_debug("Transfer status before %x\n", status);
- atomic_set(&dm_pending, 1);
+ INIT_COMPLETION(dm_transfer_event);
/* The DM and BR tables must be programmed before triggering the
* Data Mover else the coherent transfer would be corrupted
*/
@@ -258,9 +258,7 @@
ocmem_write(dm_ctrl, dm_base + DM_CTRL);
pr_debug("ocmem: rdm: dm_ctrl %x br_ctrl %x\n", dm_ctrl, br_ctrl);
- wait_event_interruptible(dm_wq,
- atomic_read(&dm_pending) == 0);
-
+ wait_for_completion(&dm_transfer_event);
ocmem_disable_core_clock();
return 0;
}
@@ -291,7 +289,8 @@
return rc;
}
- init_waitqueue_head(&dm_wq);
+ init_completion(&dm_clear_event);
+ init_completion(&dm_transfer_event);
/* Clear DM Mask */
ocmem_write(DM_MASK_RESET, dm_base + DM_INTR_MASK);
/* enable dm interrupts */
diff --git a/arch/arm/mach-msm/peripheral-loader.h b/arch/arm/mach-msm/peripheral-loader.h
index e3b250b..405b73f 100644
--- a/arch/arm/mach-msm/peripheral-loader.h
+++ b/arch/arm/mach-msm/peripheral-loader.h
@@ -55,7 +55,15 @@
struct pil_device;
+#ifdef CONFIG_MSM_PIL
extern struct pil_device *msm_pil_register(struct pil_desc *desc);
extern void msm_pil_unregister(struct pil_device *pil);
+#else
+static inline struct pil_device *msm_pil_register(struct pil_desc *desc)
+{
+ return NULL;
+}
+static inline void msm_pil_unregister(struct pil_device *pil) { }
+#endif
#endif
diff --git a/arch/arm/mach-msm/pil-gss.c b/arch/arm/mach-msm/pil-gss.c
index 73248db..bccbce2 100644
--- a/arch/arm/mach-msm/pil-gss.c
+++ b/arch/arm/mach-msm/pil-gss.c
@@ -21,15 +21,22 @@
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/smp.h>
+#include <linux/miscdevice.h>
+#include <linux/reboot.h>
+#include <linux/interrupt.h>
#include <mach/msm_iomap.h>
#include <mach/msm_xo.h>
#include <mach/socinfo.h>
#include <mach/msm_bus_board.h>
#include <mach/msm_bus.h>
+#include <mach/subsystem_restart.h>
+#include <mach/peripheral-loader.h>
#include "peripheral-loader.h"
#include "scm-pas.h"
+#include "smd_private.h"
+#include "ramdump.h"
#define GSS_CSR_AHB_CLK_SEL 0x0
#define GSS_CSR_RESET 0x4
@@ -63,6 +70,14 @@
unsigned long start_addr;
struct clk *xo;
struct pil_device *pil;
+ struct miscdevice misc_dev;
+ struct subsys_device *subsys;
+ struct subsys_desc subsys_desc;
+ int crash_shutdown;
+ int irq;
+ void *pil_handle;
+ struct ramdump_device *ramdump_dev;
+ struct ramdump_device *smem_ramdump_dev;
};
static int pil_gss_init_image(struct pil_desc *pil, const u8 *metadata,
@@ -308,11 +323,160 @@
.proxy_unvote = remove_gss_proxy_votes,
};
+#define MAX_SSR_REASON_LEN 81U
+
+static void log_gss_sfr(void)
+{
+ u32 size;
+ char *smem_reason, reason[MAX_SSR_REASON_LEN];
+
+ smem_reason = smem_get_entry(SMEM_SSR_REASON_MSS0, &size);
+ if (!smem_reason || !size) {
+ pr_err("GSS subsystem failure reason: (unknown, smem_get_entry failed).\n");
+ return;
+ }
+ if (!smem_reason[0]) {
+ pr_err("GSS subsystem failure reason: (unknown, init string found).\n");
+ return;
+ }
+
+ size = min(size, MAX_SSR_REASON_LEN-1);
+ memcpy(reason, smem_reason, size);
+ reason[size] = '\0';
+ pr_err("GSS subsystem failure reason: %s.\n", reason);
+
+ smem_reason[0] = '\0';
+ wmb();
+}
+
+static void restart_gss(struct gss_data *drv)
+{
+ log_gss_sfr();
+ subsystem_restart_dev(drv->subsys);
+}
+
+static void smsm_state_cb(void *data, uint32_t old_state, uint32_t new_state)
+{
+ struct gss_data *drv = data;
+
+ /* Ignore if we're the one that set SMSM_RESET */
+ if (drv->crash_shutdown)
+ return;
+
+ if (new_state & SMSM_RESET) {
+ pr_err("GSS SMSM state changed to SMSM_RESET.\n"
+ "Probable err_fatal on the GSS. "
+ "Calling subsystem restart...\n");
+ restart_gss(drv);
+ }
+}
+
+static int gss_shutdown(const struct subsys_desc *desc)
+{
+ struct gss_data *drv = container_of(desc, struct gss_data, subsys_desc);
+
+ pil_force_shutdown("gss");
+ disable_irq_nosync(drv->irq);
+
+ return 0;
+}
+
+static int gss_powerup(const struct subsys_desc *desc)
+{
+ struct gss_data *drv = container_of(desc, struct gss_data, subsys_desc);
+
+ pil_force_boot("gss");
+ enable_irq(drv->irq);
+ return 0;
+}
+
+void gss_crash_shutdown(const struct subsys_desc *desc)
+{
+ struct gss_data *drv = container_of(desc, struct gss_data, subsys_desc);
+
+ drv->crash_shutdown = 1;
+ smsm_reset_modem(SMSM_RESET);
+}
+
+/* FIXME: Get address, size from PIL */
+static struct ramdump_segment gss_segments[] = {
+ {0x89000000, 0x00D00000}
+};
+
+static struct ramdump_segment smem_segments[] = {
+ {0x80000000, 0x00200000},
+};
+
+static int gss_ramdump(int enable, const struct subsys_desc *desc)
+{
+ int ret;
+ struct gss_data *drv = container_of(desc, struct gss_data, subsys_desc);
+
+ if (enable) {
+ ret = do_ramdump(drv->ramdump_dev, gss_segments,
+ ARRAY_SIZE(gss_segments));
+ if (ret < 0) {
+ pr_err("Unable to dump gss memory\n");
+ return ret;
+ }
+
+ ret = do_ramdump(drv->smem_ramdump_dev, smem_segments,
+ ARRAY_SIZE(smem_segments));
+ if (ret < 0) {
+ pr_err("Unable to dump smem memory (rc = %d).\n", ret);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static irqreturn_t gss_wdog_bite_irq(int irq, void *dev_id)
+{
+ struct gss_data *drv = dev_id;
+
+ pr_err("Watchdog bite received from GSS!\n");
+ restart_gss(drv);
+
+ return IRQ_HANDLED;
+}
+
+static int gss_open(struct inode *inode, struct file *filp)
+{
+ void *ret;
+ struct miscdevice *c = filp->private_data;
+ struct gss_data *drv = container_of(c, struct gss_data, misc_dev);
+
+ drv->pil_handle = ret = pil_get("gss");
+ if (!ret)
+ pr_debug("%s - pil_get returned NULL\n", __func__);
+
+ return 0;
+}
+
+static int gss_release(struct inode *inode, struct file *filp)
+{
+ struct miscdevice *c = filp->private_data;
+ struct gss_data *drv = container_of(c, struct gss_data, misc_dev);
+
+ pil_put(drv->pil_handle);
+ pr_debug("%s pil_put called on GSS\n", __func__);
+
+ return 0;
+}
+
+const struct file_operations gss_file_ops = {
+ .open = gss_open,
+ .release = gss_release,
+ .owner = THIS_MODULE,
+};
+
static int __devinit pil_gss_probe(struct platform_device *pdev)
{
struct gss_data *drv;
struct resource *res;
struct pil_desc *desc;
+ int ret;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
@@ -344,6 +508,10 @@
if (IS_ERR(drv->xo))
return PTR_ERR(drv->xo);
+ drv->irq = platform_get_irq(pdev, 0);
+ if (drv->irq < 0)
+ return drv->irq;
+
desc->name = "gss";
desc->dev = &pdev->dev;
desc->owner = THIS_MODULE;
@@ -363,13 +531,71 @@
if (IS_ERR(drv->pil)) {
return PTR_ERR(drv->pil);
}
+
+ ret = smsm_state_cb_register(SMSM_MODEM_STATE, SMSM_RESET,
+ smsm_state_cb, drv);
+ if (ret < 0)
+ dev_warn(&pdev->dev, "Unable to register SMSM callback\n");
+
+ drv->subsys_desc.name = "gss";
+ drv->subsys_desc.shutdown = gss_shutdown;
+ drv->subsys_desc.powerup = gss_powerup;
+ drv->subsys_desc.ramdump = gss_ramdump;
+ drv->subsys_desc.crash_shutdown = gss_crash_shutdown;
+
+ drv->subsys = subsys_register(&drv->subsys_desc);
+ if (IS_ERR(drv->subsys)) {
+ ret = PTR_ERR(drv->subsys);
+ goto err_subsys;
+ }
+
+ drv->misc_dev.minor = MISC_DYNAMIC_MINOR;
+ drv->misc_dev.name = "gss";
+ drv->misc_dev.fops = &gss_file_ops;
+ ret = misc_register(&drv->misc_dev);
+ if (ret)
+ goto err_misc;
+
+ drv->ramdump_dev = create_ramdump_device("gss");
+ if (!drv->ramdump_dev) {
+ ret = -ENOMEM;
+ goto err_ramdump;
+ }
+
+ drv->smem_ramdump_dev = create_ramdump_device("smem-gss");
+ if (!drv->smem_ramdump_dev) {
+ ret = -ENOMEM;
+ goto err_smem;
+ }
+
+ ret = devm_request_irq(&pdev->dev, drv->irq, gss_wdog_bite_irq,
+ IRQF_TRIGGER_RISING, "gss_a5_wdog", drv);
+ if (ret < 0)
+ goto err;
return 0;
+err:
+ destroy_ramdump_device(drv->smem_ramdump_dev);
+err_smem:
+ destroy_ramdump_device(drv->ramdump_dev);
+err_ramdump:
+ misc_deregister(&drv->misc_dev);
+err_misc:
+ subsys_unregister(drv->subsys);
+err_subsys:
+ msm_pil_unregister(drv->pil);
+ return ret;
}
static int __devexit pil_gss_remove(struct platform_device *pdev)
{
struct gss_data *drv = platform_get_drvdata(pdev);
+
+ destroy_ramdump_device(drv->smem_ramdump_dev);
+ destroy_ramdump_device(drv->ramdump_dev);
+ misc_deregister(&drv->misc_dev);
+ subsys_unregister(drv->subsys);
msm_pil_unregister(drv->pil);
+
return 0;
}
diff --git a/arch/arm/mach-msm/pil-mba.c b/arch/arm/mach-msm/pil-mba.c
index 5e67d4f..0207f0b 100644
--- a/arch/arm/mach-msm/pil-mba.c
+++ b/arch/arm/mach-msm/pil-mba.c
@@ -172,7 +172,7 @@
return -ENOMEM;
platform_set_drvdata(pdev, drv);
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rmb_base");
if (!res)
return -EINVAL;
drv->reg_base = devm_ioremap(&pdev->dev, res->start,
@@ -180,7 +180,8 @@
if (!drv->reg_base)
return -ENOMEM;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ "metadata_base");
if (res) {
drv->metadata_base = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
diff --git a/arch/arm/mach-msm/pil-modem.c b/arch/arm/mach-msm/pil-modem.c
index 8344496..ecb3800 100644
--- a/arch/arm/mach-msm/pil-modem.c
+++ b/arch/arm/mach-msm/pil-modem.c
@@ -19,11 +19,19 @@
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/clk.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/reboot.h>
#include <mach/msm_iomap.h>
+#include <mach/subsystem_restart.h>
+#include <mach/msm_smsm.h>
+#include <mach/peripheral-loader.h>
+#include "modem_notifier.h"
#include "peripheral-loader.h"
#include "scm-pas.h"
+#include "ramdump.h"
#define MARM_BOOT_CONTROL 0x0010
#define MARM_RESET (MSM_CLK_CTL_BASE + 0x2BD4)
@@ -46,12 +54,22 @@
#define PLL_ENA_MARM (MSM_CLK_CTL_BASE + 0x3500)
#define PLL8_STATUS (MSM_CLK_CTL_BASE + 0x3158)
#define CLK_HALT_MSS_SMPSS_MISC_STATE (MSM_CLK_CTL_BASE + 0x2FDC)
+#define MSS_MODEM_RESET (MSM_CLK_CTL_BASE + 0x2C48)
struct modem_data {
void __iomem *base;
+ void __iomem *wdog;
unsigned long start_addr;
struct pil_device *pil;
struct clk *xo;
+ struct notifier_block notifier;
+ int ignore_smsm_ack;
+ int irq;
+ struct subsys_device *subsys;
+ struct subsys_desc subsys_desc;
+ struct delayed_work unlock_work;
+ struct work_struct fatal_work;
+ struct ramdump_device *ramdump_dev;
};
static int make_modem_proxy_votes(struct pil_desc *pil)
@@ -161,7 +179,7 @@
return 0;
}
-static int modem_shutdown(struct pil_desc *pil)
+static int modem_pil_shutdown(struct pil_desc *pil)
{
u32 reg;
@@ -203,7 +221,7 @@
static struct pil_reset_ops pil_modem_ops = {
.init_image = modem_init_image,
.auth_and_reset = modem_reset,
- .shutdown = modem_shutdown,
+ .shutdown = modem_pil_shutdown,
.proxy_vote = make_modem_proxy_votes,
.proxy_unvote = remove_modem_proxy_votes,
};
@@ -232,11 +250,166 @@
.proxy_unvote = remove_modem_proxy_votes,
};
+static void modem_crash_shutdown(const struct subsys_desc *subsys)
+{
+ struct modem_data *drv;
+
+ /* If modem hasn't already crashed, send SMSM_RESET. */
+ drv = container_of(subsys, struct modem_data, subsys_desc);
+ if (!(smsm_get_state(SMSM_MODEM_STATE) & SMSM_RESET)) {
+ modem_unregister_notifier(&drv->notifier);
+ smsm_reset_modem(SMSM_RESET);
+ }
+
+ /* Wait to allow the modem to clean up caches etc. */
+ mdelay(5);
+}
+
+static irqreturn_t modem_wdog_bite_irq(int irq, void *dev_id)
+{
+ struct modem_data *drv = dev_id;
+
+ schedule_work(&drv->fatal_work);
+ disable_irq_nosync(drv->irq);
+
+ return IRQ_HANDLED;
+}
+
+static void modem_unlock_timeout(struct work_struct *work)
+{
+ struct modem_data *drv;
+ struct delayed_work *dwork = to_delayed_work(work);
+
+ pr_crit("Timeout waiting for modem to unlock.\n");
+
+ drv = container_of(dwork, struct modem_data, unlock_work);
+ /* The unlock didn't work, clear the reset */
+ writel_relaxed(0x0, MSS_MODEM_RESET);
+ mb();
+
+ subsystem_restart_dev(drv->subsys);
+ enable_irq(drv->irq);
+}
+
+static void modem_fatal_fn(struct work_struct *work)
+{
+ u32 modem_state;
+ u32 panic_smsm_states = SMSM_RESET | SMSM_SYSTEM_DOWNLOAD;
+ u32 reset_smsm_states = SMSM_SYSTEM_REBOOT_USR | SMSM_SYSTEM_PWRDWN_USR;
+ struct modem_data *drv;
+
+ drv = container_of(work, struct modem_data, fatal_work);
+
+ pr_err("Watchdog bite received from modem!\n");
+
+ modem_state = smsm_get_state(SMSM_MODEM_STATE);
+ pr_err("Modem SMSM state = 0x%x!\n", modem_state);
+
+ if (modem_state == 0 || modem_state & panic_smsm_states) {
+ subsystem_restart_dev(drv->subsys);
+ enable_irq(drv->irq);
+ } else if (modem_state & reset_smsm_states) {
+ pr_err("User-invoked system reset/powerdown.");
+ kernel_restart(NULL);
+ } else {
+ unsigned long timeout = msecs_to_jiffies(6000);
+
+ pr_err("Modem AHB locked up. Trying to free up modem!\n");
+
+ writel_relaxed(0x3, MSS_MODEM_RESET);
+ /*
+ * If we are still alive (allowing for the 5 second
+ * delayed-panic-reboot), the modem is either still wedged or
+ * SMSM didn't come through. Force panic in that case.
+ */
+ schedule_delayed_work(&drv->unlock_work, timeout);
+ }
+}
+
+static int modem_notif_handler(struct notifier_block *nb, unsigned long code,
+ void *p)
+{
+ struct modem_data *drv = container_of(nb, struct modem_data, notifier);
+
+ if (code == MODEM_NOTIFIER_START_RESET) {
+ if (drv->ignore_smsm_ack) {
+ drv->ignore_smsm_ack = 0;
+ } else {
+ pr_err("Modem error fatal'ed.");
+ subsystem_restart_dev(drv->subsys);
+ }
+ }
+ return NOTIFY_DONE;
+}
+
+static int modem_shutdown(const struct subsys_desc *subsys)
+{
+ struct modem_data *drv;
+
+ drv = container_of(subsys, struct modem_data, subsys_desc);
+ /*
+ * If the modem didn't already crash, setting SMSM_RESET here will help
+ * flush caches etc. The ignore_smsm_ack flag is set to ignore the
+ * SMSM_RESET notification that is generated due to the modem settings
+ * its own SMSM_RESET bit in response to the apps setting the apps
+ * SMSM_RESET bit.
+ */
+ if (!(smsm_get_state(SMSM_MODEM_STATE) & SMSM_RESET)) {
+ drv->ignore_smsm_ack = 1;
+ smsm_reset_modem(SMSM_RESET);
+ }
+
+ /* Disable the modem watchdog to allow clean modem bootup */
+ writel_relaxed(0x0, drv->wdog + 0x8);
+ /*
+ * The write above needs to go through before the modem is powered up
+ * again.
+ */
+ mb();
+ /* Wait here to allow the modem to clean up caches, etc. */
+ msleep(20);
+
+ pil_force_shutdown("modem");
+ disable_irq_nosync(drv->irq);
+
+ return 0;
+}
+
+static int modem_powerup(const struct subsys_desc *subsys)
+{
+ struct modem_data *drv;
+ int ret;
+
+ drv = container_of(subsys, struct modem_data, subsys_desc);
+ ret = pil_force_boot("modem");
+ enable_irq(drv->irq);
+
+ return ret;
+}
+
+/* FIXME: Get address, size from PIL */
+static struct ramdump_segment modem_segments[] = {
+ { 0x42F00000, 0x46000000 - 0x42F00000 },
+};
+
+static int modem_ramdump(int enable, const struct subsys_desc *subsys)
+{
+ struct modem_data *drv;
+
+ drv = container_of(subsys, struct modem_data, subsys_desc);
+ if (enable)
+ return do_ramdump(drv->ramdump_dev, modem_segments,
+ ARRAY_SIZE(modem_segments));
+ else
+ return 0;
+}
+
static int __devinit pil_modem_driver_probe(struct platform_device *pdev)
{
struct modem_data *drv;
struct resource *res;
struct pil_desc *desc;
+ int ret;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
@@ -247,6 +420,10 @@
return -ENOMEM;
platform_set_drvdata(pdev, drv);
+ drv->irq = platform_get_irq(pdev, 0);
+ if (drv->irq < 0)
+ return drv->irq;
+
drv->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
if (!drv->base)
return -ENOMEM;
@@ -259,6 +436,14 @@
if (!desc)
return -ENOMEM;
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (!res)
+ return -EINVAL;
+
+ drv->wdog = devm_ioremap(&pdev->dev, res->start, resource_size(res));
+ if (!drv->wdog)
+ return -ENOMEM;
+
desc->name = "modem";
desc->depends_on = "q6";
desc->dev = &pdev->dev;
@@ -273,16 +458,61 @@
dev_info(&pdev->dev, "using non-secure boot\n");
}
drv->pil = msm_pil_register(desc);
- if (IS_ERR(drv->pil)) {
+ if (IS_ERR(drv->pil))
return PTR_ERR(drv->pil);
+
+ drv->notifier.notifier_call = modem_notif_handler,
+ ret = modem_register_notifier(&drv->notifier);
+ if (ret)
+ goto err_notify;
+
+ drv->subsys_desc.name = "modem";
+ drv->subsys_desc.shutdown = modem_shutdown;
+ drv->subsys_desc.powerup = modem_powerup;
+ drv->subsys_desc.ramdump = modem_ramdump;
+ drv->subsys_desc.crash_shutdown = modem_crash_shutdown;
+
+ INIT_WORK(&drv->fatal_work, modem_fatal_fn);
+ INIT_DELAYED_WORK(&drv->unlock_work, modem_unlock_timeout);
+
+ drv->subsys = subsys_register(&drv->subsys_desc);
+ if (IS_ERR(drv->subsys)) {
+ ret = PTR_ERR(drv->subsys);
+ goto err_subsys;
}
+
+ drv->ramdump_dev = create_ramdump_device("modem");
+ if (!drv->ramdump_dev) {
+ ret = -ENOMEM;
+ goto err_ramdump;
+ }
+
+ ret = devm_request_irq(&pdev->dev, drv->irq, modem_wdog_bite_irq,
+ IRQF_TRIGGER_RISING, "modem_watchdog", drv);
+ if (ret)
+ goto err_irq;
return 0;
+
+err_irq:
+ destroy_ramdump_device(drv->ramdump_dev);
+err_ramdump:
+ subsys_unregister(drv->subsys);
+err_subsys:
+ modem_unregister_notifier(&drv->notifier);
+err_notify:
+ msm_pil_unregister(drv->pil);
+ return ret;
}
static int __devexit pil_modem_driver_exit(struct platform_device *pdev)
{
struct modem_data *drv = platform_get_drvdata(pdev);
+
+ destroy_ramdump_device(drv->ramdump_dev);
+ subsys_unregister(drv->subsys);
+ modem_unregister_notifier(&drv->notifier);
msm_pil_unregister(drv->pil);
+
return 0;
}
diff --git a/arch/arm/mach-msm/pil-pronto.c b/arch/arm/mach-msm/pil-pronto.c
index 01cdb0b..1e39043 100644
--- a/arch/arm/mach-msm/pil-pronto.c
+++ b/arch/arm/mach-msm/pil-pronto.c
@@ -233,7 +233,7 @@
int ret;
uint32_t regval;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pmu_base");
if (!res)
return -EINVAL;
@@ -246,14 +246,14 @@
if (!drv->base)
return -ENOMEM;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "clk_base");
if (!res)
return -EINVAL;
drv->reset_base = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "halt_base");
if (!res)
return -EINVAL;
diff --git a/arch/arm/mach-msm/pil-q6v3.c b/arch/arm/mach-msm/pil-q6v3.c
index 28b9dee..1a226de 100644
--- a/arch/arm/mach-msm/pil-q6v3.c
+++ b/arch/arm/mach-msm/pil-q6v3.c
@@ -19,9 +19,15 @@
#include <linux/elf.h>
#include <linux/err.h>
#include <linux/clk.h>
+#include <linux/workqueue.h>
+#include <linux/interrupt.h>
#include <mach/msm_iomap.h>
+#include <mach/subsystem_restart.h>
+#include <mach/scm.h>
+#include <mach/peripheral-loader.h>
+#include "ramdump.h"
#include "peripheral-loader.h"
#include "scm-pas.h"
@@ -60,11 +66,34 @@
#define Q6_STRAP_TCM_BASE (0x28C << 15)
#define Q6_STRAP_TCM_CONFIG 0x28B
+#define SCM_Q6_NMI_CMD 0x1
+
+/**
+ * struct q6v3_data - LPASS driver data
+ * @base: register base
+ * @wk_base: wakeup register base
+ * @wd_base: watchdog register base
+ * @start_addr: address that processor starts running at
+ * @irq: watchdog irq
+ * @pil: peripheral handle
+ * @subsys: subsystem restart handle
+ * @subsys_desc: subsystem restart descriptor
+ * @fatal_wrk: fatal error workqueue
+ * @pll: pll clock handle
+ * @ramdump_dev: ramdump device
+ */
struct q6v3_data {
void __iomem *base;
+ void __iomem *wk_base;
+ void __iomem *wd_base;
unsigned long start_addr;
+ int irq;
struct pil_device *pil;
+ struct subsys_device *subsys;
+ struct subsys_desc subsys_desc;
+ struct work_struct fatal_wrk;
struct clk *pll;
+ struct ramdump_device *ramdump_dev;
};
static int pil_q6v3_init_image(struct pil_desc *pil, const u8 *metadata,
@@ -198,11 +227,96 @@
.proxy_unvote = pil_q6v3_remove_proxy_votes,
};
+static void q6_fatal_fn(struct work_struct *work)
+{
+ struct q6v3_data *drv = container_of(work, struct q6v3_data, fatal_wrk);
+
+ pr_err("Watchdog bite received from Q6!\n");
+ subsystem_restart_dev(drv->subsys);
+ enable_irq(drv->irq);
+}
+
+static void send_q6_nmi(struct q6v3_data *drv)
+{
+ /* Send NMI to QDSP6 via an SCM call. */
+ scm_call_atomic1(SCM_SVC_UTIL, SCM_Q6_NMI_CMD, 0x1);
+
+ /* Wakeup the Q6 */
+ writel_relaxed(0x2000, drv->wk_base + 0x1c);
+ /* Q6 requires atleast 100ms to dump caches etc.*/
+ mdelay(100);
+ pr_info("Q6 NMI was sent.\n");
+}
+
+static int lpass_q6_shutdown(const struct subsys_desc *subsys)
+{
+ struct q6v3_data *drv;
+
+ drv = container_of(subsys, struct q6v3_data, subsys_desc);
+ send_q6_nmi(drv);
+ writel_relaxed(0x0, drv->wd_base + 0x24);
+ mb();
+
+ pil_force_shutdown("q6");
+ disable_irq_nosync(drv->irq);
+
+ return 0;
+}
+
+static int lpass_q6_powerup(const struct subsys_desc *subsys)
+{
+ struct q6v3_data *drv;
+ int ret;
+
+ drv = container_of(subsys, struct q6v3_data, subsys_desc);
+ ret = pil_force_boot("q6");
+ enable_irq(drv->irq);
+ return ret;
+}
+
+/* FIXME: Get address, size from PIL */
+static struct ramdump_segment q6_segments[] = {
+ { 0x46700000, 0x47f00000 - 0x46700000 },
+ { 0x28400000, 0x12800 }
+};
+
+static int lpass_q6_ramdump(int enable, const struct subsys_desc *subsys)
+{
+ struct q6v3_data *drv;
+
+ drv = container_of(subsys, struct q6v3_data, subsys_desc);
+ if (enable)
+ return do_ramdump(drv->ramdump_dev, q6_segments,
+ ARRAY_SIZE(q6_segments));
+ else
+ return 0;
+}
+
+static void lpass_q6_crash_shutdown(const struct subsys_desc *subsys)
+{
+ struct q6v3_data *drv;
+
+ drv = container_of(subsys, struct q6v3_data, subsys_desc);
+ send_q6_nmi(drv);
+}
+
+static irqreturn_t lpass_wdog_bite_irq(int irq, void *dev_id)
+{
+ int ret;
+ struct q6v3_data *drv = dev_id;
+
+ ret = schedule_work(&drv->fatal_wrk);
+ disable_irq_nosync(drv->irq);
+
+ return IRQ_HANDLED;
+}
+
static int __devinit pil_q6v3_driver_probe(struct platform_device *pdev)
{
struct q6v3_data *drv;
struct resource *res;
struct pil_desc *desc;
+ int ret;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
@@ -217,14 +331,34 @@
if (!drv->base)
return -ENOMEM;
- desc = devm_kzalloc(&pdev->dev, sizeof(*desc), GFP_KERNEL);
- if (!drv)
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (!res)
+ return -EINVAL;
+
+ drv->wk_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
+ if (!drv->wk_base)
return -ENOMEM;
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
+ if (!res)
+ return -EINVAL;
+
+ drv->wd_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
+ if (!drv->wd_base)
+ return -ENOMEM;
+
+ drv->irq = platform_get_irq(pdev, 0);
+ if (drv->irq < 0)
+ return drv->irq;
+
drv->pll = devm_clk_get(&pdev->dev, "pll4");
if (IS_ERR(drv->pll))
return PTR_ERR(drv->pll);
+ desc = devm_kzalloc(&pdev->dev, sizeof(*desc), GFP_KERNEL);
+ if (!drv)
+ return -ENOMEM;
+
desc->name = "q6";
desc->dev = &pdev->dev;
desc->owner = THIS_MODULE;
@@ -239,15 +373,51 @@
}
drv->pil = msm_pil_register(desc);
- if (IS_ERR(drv->pil)) {
+ if (IS_ERR(drv->pil))
return PTR_ERR(drv->pil);
+
+ drv->subsys_desc.name = "lpass";
+ drv->subsys_desc.shutdown = lpass_q6_shutdown;
+ drv->subsys_desc.powerup = lpass_q6_powerup;
+ drv->subsys_desc.ramdump = lpass_q6_ramdump;
+ drv->subsys_desc.crash_shutdown = lpass_q6_crash_shutdown;
+
+ INIT_WORK(&drv->fatal_wrk, q6_fatal_fn);
+
+ drv->ramdump_dev = create_ramdump_device("lpass");
+ if (!drv->ramdump_dev) {
+ ret = -ENOMEM;
+ goto err_ramdump;
}
+
+ drv->subsys = subsys_register(&drv->subsys_desc);
+ if (IS_ERR(drv->subsys)) {
+ ret = PTR_ERR(drv->subsys);
+ goto err_subsys;
+ }
+
+ ret = devm_request_irq(&pdev->dev, drv->irq, lpass_wdog_bite_irq,
+ IRQF_TRIGGER_RISING, "lpass_wdog", drv);
+ if (ret) {
+ dev_err(&pdev->dev, "Unable to request wdog irq.\n");
+ goto err_irq;
+ }
+
return 0;
+err_irq:
+ subsys_unregister(drv->subsys);
+err_subsys:
+ destroy_ramdump_device(drv->ramdump_dev);
+err_ramdump:
+ msm_pil_unregister(drv->pil);
+ return ret;
}
static int __devexit pil_q6v3_driver_exit(struct platform_device *pdev)
{
struct q6v3_data *drv = platform_get_drvdata(pdev);
+ subsys_unregister(drv->subsys);
+ destroy_ramdump_device(drv->ramdump_dev);
msm_pil_unregister(drv->pil);
return 0;
}
diff --git a/arch/arm/mach-msm/pil-q6v5-mss.c b/arch/arm/mach-msm/pil-q6v5-mss.c
index 1fdd342..7b45a0e 100644
--- a/arch/arm/mach-msm/pil-q6v5-mss.c
+++ b/arch/arm/mach-msm/pil-q6v5-mss.c
@@ -266,20 +266,21 @@
of_property_read_u32(pdev->dev.of_node, "qcom,pil-self-auth",
&drv->self_auth);
if (drv->self_auth) {
- res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ "rmb_base");
drv->rmb_base = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
if (!drv->rmb_base)
return -ENOMEM;
}
- res = platform_get_resource(pdev, IORESOURCE_MEM, 3);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "restart_reg");
drv->restart_reg = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
if (!drv->restart_reg)
return -ENOMEM;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 4);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "clamp_reg");
drv->io_clamp_reg = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
if (!drv->io_clamp_reg)
diff --git a/arch/arm/mach-msm/pil-q6v5.c b/arch/arm/mach-msm/pil-q6v5.c
index 772031b..f4e8844 100644
--- a/arch/arm/mach-msm/pil-q6v5.c
+++ b/arch/arm/mach-msm/pil-q6v5.c
@@ -205,14 +205,14 @@
return ERR_PTR(-ENOMEM);
platform_set_drvdata(pdev, drv);
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qdsp6_base");
if (!res)
return ERR_PTR(-EINVAL);
drv->reg_base = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
if (!drv->reg_base)
return ERR_PTR(-ENOMEM);
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "halt_base");
drv->axi_halt_base = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
if (!drv->axi_halt_base)
diff --git a/arch/arm/mach-msm/pil-riva.c b/arch/arm/mach-msm/pil-riva.c
index ba0e242..dbb4408 100644
--- a/arch/arm/mach-msm/pil-riva.c
+++ b/arch/arm/mach-msm/pil-riva.c
@@ -20,12 +20,17 @@
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
#include <linux/clk.h>
+#include <linux/interrupt.h>
+#include <linux/wcnss_wlan.h>
-#include <asm/mach-types.h>
#include <mach/msm_iomap.h>
+#include <mach/subsystem_restart.h>
+#include <mach/peripheral-loader.h>
#include "peripheral-loader.h"
#include "scm-pas.h"
+#include "ramdump.h"
+#include "smd_private.h"
#define RIVA_PMU_A2XB_CFG 0xB8
#define RIVA_PMU_A2XB_CFG_EN BIT(0)
@@ -83,6 +88,13 @@
struct clk *xo;
struct regulator *pll_supply;
struct pil_device *pil;
+ int irq;
+ int crash;
+ int rst_in_progress;
+ struct subsys_device *subsys;
+ struct subsys_desc subsys_desc;
+ struct delayed_work cancel_work;
+ struct ramdump_device *ramdump_dev;
};
static bool cxo_is_needed(struct riva_data *drv)
@@ -273,6 +285,160 @@
.proxy_unvote = pil_riva_remove_proxy_vote,
};
+static int enable_riva_ssr;
+
+static int enable_riva_ssr_set(const char *val, struct kernel_param *kp)
+{
+ int ret;
+
+ ret = param_set_int(val, kp);
+ if (ret)
+ return ret;
+
+ if (enable_riva_ssr)
+ pr_info("Subsystem restart activated for riva.\n");
+
+ return 0;
+}
+module_param_call(enable_riva_ssr, enable_riva_ssr_set, param_get_int,
+ &enable_riva_ssr, S_IRUGO | S_IWUSR);
+
+static void smsm_state_cb_hdlr(void *data, uint32_t old_state,
+ uint32_t new_state)
+{
+ struct riva_data *drv = data;
+ char *smem_reset_reason;
+ char buffer[81];
+ unsigned smem_reset_size;
+ unsigned size;
+
+ drv->crash = true;
+ if (!(new_state & SMSM_RESET))
+ return;
+
+ if (drv->rst_in_progress) {
+ pr_err("riva: Ignoring smsm reset req, restart in progress\n");
+ return;
+ }
+
+ pr_err("riva: smsm state changed to smsm reset\n");
+
+ smem_reset_reason = smem_get_entry(SMEM_SSR_REASON_WCNSS0,
+ &smem_reset_size);
+
+ if (!smem_reset_reason || !smem_reset_size) {
+ pr_err("wcnss subsystem failure reason:\n"
+ "(unknown, smem_get_entry failed)");
+ } else if (!smem_reset_reason[0]) {
+ pr_err("wcnss subsystem failure reason:\n"
+ "(unknown, init string found)");
+ } else {
+ size = smem_reset_size < sizeof(buffer) ? smem_reset_size :
+ (sizeof(buffer) - 1);
+ memcpy(buffer, smem_reset_reason, size);
+ buffer[size] = '\0';
+ pr_err("wcnss subsystem failure reason: %s\n", buffer);
+ memset(smem_reset_reason, 0, smem_reset_size);
+ wmb();
+ }
+
+ drv->rst_in_progress = 1;
+ subsystem_restart_dev(drv->subsys);
+}
+
+static irqreturn_t riva_wdog_bite_irq_hdlr(int irq, void *dev_id)
+{
+ struct riva_data *drv = dev_id;
+
+ drv->crash = true;
+ if (drv->rst_in_progress) {
+ pr_err("Ignoring riva bite irq, restart in progress\n");
+ return IRQ_HANDLED;
+ }
+ if (!enable_riva_ssr)
+ panic("Watchdog bite received from Riva");
+
+ drv->rst_in_progress = 1;
+ subsystem_restart_dev(drv->subsys);
+
+ return IRQ_HANDLED;
+}
+
+static void riva_post_bootup(struct work_struct *work)
+{
+ struct platform_device *pdev = wcnss_get_platform_device();
+ struct wcnss_wlan_config *pwlanconfig = wcnss_get_wlan_config();
+
+ wcnss_wlan_power(&pdev->dev, pwlanconfig, WCNSS_WLAN_SWITCH_OFF);
+}
+
+static int riva_shutdown(const struct subsys_desc *desc)
+{
+ struct riva_data *drv;
+
+ drv = container_of(desc, struct riva_data, subsys_desc);
+ pil_force_shutdown("wcnss");
+ flush_delayed_work(&drv->cancel_work);
+ wcnss_flush_delayed_boot_votes();
+ disable_irq_nosync(drv->irq);
+
+ return 0;
+}
+
+static int riva_powerup(const struct subsys_desc *desc)
+{
+ struct riva_data *drv;
+ struct platform_device *pdev = wcnss_get_platform_device();
+ struct wcnss_wlan_config *pwlanconfig = wcnss_get_wlan_config();
+ int ret = 0;
+
+ drv = container_of(desc, struct riva_data, subsys_desc);
+ if (pdev && pwlanconfig) {
+ ret = wcnss_wlan_power(&pdev->dev, pwlanconfig,
+ WCNSS_WLAN_SWITCH_ON);
+ if (!ret)
+ pil_force_boot("wcnss");
+ }
+ drv->rst_in_progress = 0;
+ enable_irq(drv->irq);
+ schedule_delayed_work(&drv->cancel_work, msecs_to_jiffies(5000));
+
+ return ret;
+}
+
+/*
+ * 7MB RAM segments for Riva SS;
+ * Riva 1.1 0x8f000000 - 0x8f700000
+ * Riva 1.0 0x8f200000 - 0x8f700000
+ */
+static struct ramdump_segment riva_segments[] = {
+ {0x8f000000, 0x8f700000 - 0x8f000000}
+};
+
+static int riva_ramdump(int enable, const struct subsys_desc *desc)
+{
+ struct riva_data *drv;
+
+ drv = container_of(desc, struct riva_data, subsys_desc);
+
+ if (enable)
+ return do_ramdump(drv->ramdump_dev, riva_segments,
+ ARRAY_SIZE(riva_segments));
+ else
+ return 0;
+}
+
+/* Riva crash handler */
+static void riva_crash_shutdown(const struct subsys_desc *desc)
+{
+ struct riva_data *drv;
+
+ drv = container_of(desc, struct riva_data, subsys_desc);
+ pr_err("riva crash shutdown %d\n", drv->crash);
+ if (drv->crash != true)
+ smsm_change_state(SMSM_APPS_STATE, SMSM_RESET, SMSM_RESET);
+}
+
static int __devinit pil_riva_probe(struct platform_device *pdev)
{
struct riva_data *drv;
@@ -318,6 +484,10 @@
}
}
+ drv->irq = platform_get_irq(pdev, 0);
+ if (drv->irq < 0)
+ return drv->irq;
+
desc->name = "wcnss";
desc->dev = &pdev->dev;
desc->owner = THIS_MODULE;
@@ -338,13 +508,60 @@
drv->pil = msm_pil_register(desc);
if (IS_ERR(drv->pil))
return PTR_ERR(drv->pil);
+
+ ret = smsm_state_cb_register(SMSM_WCNSS_STATE, SMSM_RESET,
+ smsm_state_cb_hdlr, drv);
+ if (ret < 0)
+ goto err_smsm;
+
+ drv->subsys_desc.name = "wcnss";
+ drv->subsys_desc.shutdown = riva_shutdown;
+ drv->subsys_desc.powerup = riva_powerup;
+ drv->subsys_desc.ramdump = riva_ramdump;
+ drv->subsys_desc.crash_shutdown = riva_crash_shutdown;
+
+ INIT_DELAYED_WORK(&drv->cancel_work, riva_post_bootup);
+
+ drv->ramdump_dev = create_ramdump_device("riva");
+ if (!drv->ramdump_dev) {
+ ret = -ENOMEM;
+ goto err_ramdump;
+ }
+
+ drv->subsys = subsys_register(&drv->subsys_desc);
+ if (IS_ERR(drv->subsys)) {
+ ret = PTR_ERR(drv->subsys);
+ goto err_subsys;
+ }
+
+ ret = devm_request_irq(&pdev->dev, drv->irq, riva_wdog_bite_irq_hdlr,
+ IRQF_TRIGGER_HIGH, "riva_wdog", drv);
+ if (ret < 0)
+ goto err;
+
return 0;
+err:
+ subsys_unregister(drv->subsys);
+err_subsys:
+ destroy_ramdump_device(drv->ramdump_dev);
+err_ramdump:
+ smsm_state_cb_deregister(SMSM_WCNSS_STATE, SMSM_RESET,
+ smsm_state_cb_hdlr, drv);
+err_smsm:
+ msm_pil_unregister(drv->pil);
+ return ret;
}
static int __devexit pil_riva_remove(struct platform_device *pdev)
{
struct riva_data *drv = platform_get_drvdata(pdev);
+
+ subsys_unregister(drv->subsys);
+ destroy_ramdump_device(drv->ramdump_dev);
+ smsm_state_cb_deregister(SMSM_WCNSS_STATE, SMSM_RESET,
+ smsm_state_cb_hdlr, drv);
msm_pil_unregister(drv->pil);
+
return 0;
}
@@ -359,18 +576,12 @@
static int __init pil_riva_init(void)
{
- if (machine_is_mpq8064_hrd()) {
- pr_err("pil_riva not supported on this target\n");
- return 0;
- }
return platform_driver_register(&pil_riva_driver);
}
module_init(pil_riva_init);
static void __exit pil_riva_exit(void)
{
- if (machine_is_mpq8064_hrd())
- return;
platform_driver_unregister(&pil_riva_driver);
}
module_exit(pil_riva_exit);
diff --git a/arch/arm/mach-msm/pil-venus.c b/arch/arm/mach-msm/pil-venus.c
index 1ccde72..e331296 100644
--- a/arch/arm/mach-msm/pil-venus.c
+++ b/arch/arm/mach-msm/pil-venus.c
@@ -388,7 +388,8 @@
struct pil_desc *desc;
int rc;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ "wrapper_base");
if (!res)
return -EINVAL;
@@ -402,7 +403,7 @@
if (!drv->venus_wrapper_base)
return -ENOMEM;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vbif_base");
if (!res)
return -EINVAL;
diff --git a/arch/arm/mach-msm/platsmp-8625.c b/arch/arm/mach-msm/platsmp-8625.c
index 700f966..e8f8c59 100644
--- a/arch/arm/mach-msm/platsmp-8625.c
+++ b/arch/arm/mach-msm/platsmp-8625.c
@@ -28,19 +28,28 @@
#include <mach/msm_iomap.h>
#include "pm.h"
-#define MSM_CORE1_RESET 0xA8600590
-#define MSM_CORE1_STATUS_MSK 0x02800000
+#define CORE_RESET_BASE 0xA8600590
+#define MSM_CORE_STATUS_MSK 0x02800000
/*
* control for which core is the next to come out of the secondary
* boot "holding pen"
*/
-int pen_release = -1;
+volatile int pen_release = -1;
-static bool cold_boot_done;
+static DEFINE_PER_CPU(bool, cold_boot_done);
+
+struct per_cpu_data {
+ unsigned int reset_off;
+ unsigned int offset;
+ unsigned int ipc_irq;
+ void __iomem *reset_core_base;
+};
static uint32_t *msm8625_boot_vector;
-static void __iomem *reset_core1_base;
+
+
+static struct per_cpu_data cpu_data[CONFIG_NR_CPUS];
/*
* Write pen_release in a way that is guaranteed to be visible to all
@@ -65,7 +74,8 @@
/*
* MP_CORE_IPC will be used to generate interrupt and can be used by either
* of core.
- * To bring core1 out of GDFS we need to raise the SPI using the MP_CORE_IPC.
+ * To bring secondary cores out of GDFS we need to raise the SPI using the
+ * MP_CORE_IPC.
*/
static void raise_clear_spi(unsigned int cpu, bool set)
{
@@ -112,8 +122,8 @@
/* clear the IPC1(SPI-8) pending SPI */
if (power_collapsed) {
- raise_clear_spi(1, false);
- clear_pending_spi(MSM8625_INT_ACSR_MP_CORE_IPC1);
+ raise_clear_spi(cpu, false);
+ clear_pending_spi(cpu_data[cpu].ipc_irq);
power_collapsed = 0;
}
@@ -124,7 +134,7 @@
spin_unlock(&boot_lock);
}
-static int __cpuinit msm8625_release_secondary(void)
+static int __cpuinit msm8625_release_secondary(unsigned int cpu)
{
void __iomem *base_ptr;
int value = 0;
@@ -137,33 +147,35 @@
*/
timeout = jiffies + usecs_to_jiffies(20);
while (time_before(jiffies, timeout)) {
- value = __raw_readl(MSM_CFG_CTL_BASE + 0x3c);
- if ((value & MSM_CORE1_STATUS_MSK) ==
- MSM_CORE1_STATUS_MSK)
+ value = __raw_readl(MSM_CFG_CTL_BASE + cpu_data[cpu].offset);
+ if ((value & MSM_CORE_STATUS_MSK) ==
+ MSM_CORE_STATUS_MSK)
break;
udelay(1);
}
if (!value) {
- pr_err("Core 1 cannot be brought out of Reset!!!\n");
+ pr_err("Core %u cannot be brought out of Reset!!!\n", cpu);
return -ENODEV;
}
- base_ptr = ioremap_nocache(MSM_CORE1_RESET, SZ_4);
+ base_ptr = ioremap_nocache(CORE_RESET_BASE +
+ cpu_data[cpu].reset_off, SZ_4);
if (!base_ptr)
return -ENODEV;
- /* Reset core 1 out of reset */
+
+ /* Reset core out of reset */
__raw_writel(0x0, base_ptr);
mb();
- reset_core1_base = base_ptr;
+ cpu_data[cpu].reset_core_base = base_ptr;
return 0;
}
void __iomem *core1_reset_base(void)
{
- return reset_core1_base;
+ return cpu_data[1].reset_core_base;
}
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
@@ -172,12 +184,12 @@
preset_lpj = loops_per_jiffy;
- if (cold_boot_done == false) {
- if (msm8625_release_secondary()) {
- pr_err("Failed to release secondary core\n");
+ if (per_cpu(cold_boot_done, cpu) == false) {
+ if (msm8625_release_secondary(cpu)) {
+ pr_err("Failed to release core %u\n", cpu);
return -ENODEV;
}
- cold_boot_done = true;
+ per_cpu(cold_boot_done, cpu) = true;
}
/*
@@ -200,13 +212,13 @@
* and branch to the address found there.
*
* power_collapsed is the flag which will be updated for Powercollapse.
- * Once we are out of PC, as Core1 will be in the state of GDFS which
- * needs to be brought out by raising an SPI.
+ * Once we are out of PC, as secondary cores will be in the state of
+ * GDFS which needs to be brought out by raising an SPI.
*/
if (power_collapsed) {
core1_gic_configure_and_raise();
- raise_clear_spi(1, true);
+ raise_clear_spi(cpu, true);
} else {
gic_raise_softirq(cpumask_of(cpu), 1);
}
@@ -247,6 +259,34 @@
set_smp_cross_call(gic_raise_softirq);
}
+static void per_cpu_data(unsigned int cpu, unsigned int off,
+ unsigned int off1, unsigned int irq)
+{
+ cpu_data[cpu].reset_off = off;
+ cpu_data[cpu].offset = off1;
+ cpu_data[cpu].ipc_irq = irq;
+}
+
+static void enable_boot_remapper(unsigned long bit, unsigned int off)
+{
+ int value;
+
+ /* Enable boot remapper address */
+ value = __raw_readl(MSM_CFG_CTL_BASE + off);
+ __raw_writel(value | bit, MSM_CFG_CTL_BASE + off) ;
+ mb();
+}
+
+static void remapper_address(unsigned long phys, unsigned int off)
+{
+ /*
+ * Write the address of secondary startup into the
+ * boot remapper register. The secondary CPU branches to this address.
+ */
+ __raw_writel(phys, (MSM_CFG_CTL_BASE + off));
+ mb();
+}
+
static void __init msm8625_boot_vector_init(uint32_t *boot_vector,
unsigned long entry)
{
@@ -260,8 +300,8 @@
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
{
- int i, value;
- void __iomem *second_ptr;
+ int i, cpu, value;
+ void __iomem *cpu_ptr;
/*
* Initialise the present map, which describes the set of CPUs
@@ -272,25 +312,41 @@
scu_enable(scu_base_addr());
- /*
- * Write the address of secondary startup into the
- * boot remapper register. The secondary CPU branches to this address.
- */
- __raw_writel(MSM8625_SECONDARY_PHYS, (MSM_CFG_CTL_BASE + 0x34));
- mb();
-
- second_ptr = ioremap_nocache(MSM8625_SECONDARY_PHYS, SZ_8);
- if (!second_ptr) {
- pr_err("failed to ioremap for secondary core\n");
+ cpu_ptr = ioremap_nocache(MSM8625_CPU_PHYS, SZ_8);
+ if (!cpu_ptr) {
+ pr_err("failed to ioremap for secondary cores\n");
return;
}
- msm8625_boot_vector_init(second_ptr,
+ msm8625_boot_vector_init(cpu_ptr,
virt_to_phys(msm_secondary_startup));
- iounmap(second_ptr);
- /* Enable boot remapper address: bit 26 for core1 */
- value = __raw_readl(MSM_CFG_CTL_BASE + 0x30);
- __raw_writel(value | (0x4 << 24), MSM_CFG_CTL_BASE + 0x30) ;
- mb();
+ iounmap(cpu_ptr);
+
+ for_each_possible_cpu(cpu) {
+ switch (cpu) {
+ case 0:
+ break;
+ case 1:
+ remapper_address(MSM8625_CPU_PHYS, 0x34);
+ per_cpu_data(cpu, 0x0, 0x3c,
+ MSM8625_INT_ACSR_MP_CORE_IPC1);
+ enable_boot_remapper(BIT(26), 0x30);
+ break;
+ case 2:
+ remapper_address((MSM8625_CPU_PHYS >> 16), 0x4C);
+ per_cpu_data(cpu, 0x8, 0x50,
+ MSM8625_INT_ACSR_MP_CORE_IPC2);
+ enable_boot_remapper(BIT(25), 0x48);
+ break;
+ case 3:
+ value = __raw_readl(MSM_CFG_CTL_BASE + 0x4C);
+ remapper_address(value | MSM8625_CPU_PHYS, 0x4C);
+ per_cpu_data(cpu, 0xC, 0x50,
+ MSM8625_INT_ACSR_MP_CORE_IPC3);
+ enable_boot_remapper(BIT(26), 0x48);
+ break;
+ }
+
+ }
}
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index f6ed1ea..89003cf 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -42,6 +42,19 @@
*/
volatile int pen_release = -1;
+/*
+ * Write pen_release in a way that is guaranteed to be visible to all
+ * observers, irrespective of whether they're taking part in coherency
+ * or not. This is necessary for the hotplug code to work reliably.
+ */
+static void __cpuinit write_pen_release(int val)
+{
+ pen_release = val;
+ smp_wmb();
+ __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
+ outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
+}
+
static DEFINE_SPINLOCK(boot_lock);
void __cpuinit platform_secondary_init(unsigned int cpu)
@@ -56,6 +69,12 @@
gic_secondary_init(0);
/*
+ * let the primary processor know we're out of the
+ * pen, then head off into the C entry point
+ */
+ write_pen_release(-1);
+
+ /*
* Synchronise with the boot thread.
*/
spin_lock(&boot_lock);
@@ -165,7 +184,8 @@
return krait_release_secondary_sim(0xf9088000, cpu);
if (cpu_is_msm8960() || cpu_is_msm8930() || cpu_is_msm8930aa() ||
- cpu_is_apq8064() || cpu_is_msm8627() || cpu_is_msm8960ab())
+ cpu_is_apq8064() || cpu_is_msm8627() || cpu_is_msm8960ab() ||
+ cpu_is_apq8064ab())
return krait_release_secondary(0x02088000, cpu);
if (cpu_is_msm8974())
@@ -176,17 +196,9 @@
}
DEFINE_PER_CPU(int, cold_boot_done);
-static int cold_boot_flags[] = {
- 0,
- SCM_FLAG_COLDBOOT_CPU1,
- SCM_FLAG_COLDBOOT_CPU2,
- SCM_FLAG_COLDBOOT_CPU3,
-};
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
{
- int ret;
- unsigned int flag = 0;
unsigned long timeout;
pr_debug("Starting secondary CPU %d\n", cpu);
@@ -194,19 +206,8 @@
/* Set preset_lpj to avoid subsequent lpj recalculations */
preset_lpj = loops_per_jiffy;
- if (cpu > 0 && cpu < ARRAY_SIZE(cold_boot_flags))
- flag = cold_boot_flags[cpu];
- else
- __WARN();
-
if (per_cpu(cold_boot_done, cpu) == false) {
- ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
- flag);
- if (ret == 0)
- release_secondary(cpu);
- else
- printk(KERN_DEBUG "Failed to set secondary core boot "
- "address\n");
+ release_secondary(cpu);
per_cpu(cold_boot_done, cpu) = true;
}
@@ -224,9 +225,7 @@
* Note that "pen_release" is the hardware CPU ID, whereas
* "cpu" is Linux's internal ID.
*/
- pen_release = cpu_logical_map(cpu);
- __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
- outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1));
+ write_pen_release(cpu_logical_map(cpu));
/*
* Send the secondary CPU a soft interrupt, thereby causing
@@ -241,8 +240,6 @@
if (pen_release == -1)
break;
- dmac_inv_range((char *)&pen_release,
- (char *)&pen_release + sizeof(pen_release));
udelay(10);
}
@@ -274,6 +271,28 @@
set_smp_cross_call(gic_raise_softirq);
}
+static int cold_boot_flags[] __initdata = {
+ 0,
+ SCM_FLAG_COLDBOOT_CPU1,
+ SCM_FLAG_COLDBOOT_CPU2,
+ SCM_FLAG_COLDBOOT_CPU3,
+};
+
void __init platform_smp_prepare_cpus(unsigned int max_cpus)
{
+ int cpu, map;
+ unsigned int flags = 0;
+
+ for_each_present_cpu(cpu) {
+ map = cpu_logical_map(cpu);
+ if (map > ARRAY_SIZE(cold_boot_flags)) {
+ set_cpu_present(cpu, false);
+ __WARN();
+ continue;
+ }
+ flags |= cold_boot_flags[map];
+ }
+
+ if (scm_set_boot_addr(virt_to_phys(msm_secondary_startup), flags))
+ pr_warn("Failed to set CPU boot address\n");
}
diff --git a/arch/arm/mach-msm/pm-8x60.c b/arch/arm/mach-msm/pm-8x60.c
index dbb23d5..60ee8f0 100644
--- a/arch/arm/mach-msm/pm-8x60.c
+++ b/arch/arm/mach-msm/pm-8x60.c
@@ -49,6 +49,7 @@
#include "spm.h"
#include "timer.h"
#include "pm-boot.h"
+#include <mach/event_timer.h>
/******************************************************************************
* Debug Definitions
@@ -112,6 +113,7 @@
"standalone_power_collapse",
};
+static struct hrtimer pm_hrtimer;
static struct msm_pm_sleep_ops pm_sleep_ops;
/*
* Write out the attribute.
@@ -645,6 +647,28 @@
return time;
}
+/**
+ * pm_hrtimer_cb() : Callback function for hrtimer created if the
+ * core needs to be awake to handle an event.
+ * @hrtimer : Pointer to hrtimer
+ */
+static enum hrtimer_restart pm_hrtimer_cb(struct hrtimer *hrtimer)
+{
+ return HRTIMER_NORESTART;
+}
+
+/**
+ * msm_pm_set_timer() : Set an hrtimer to wakeup the core in time
+ * to handle an event.
+ */
+static void msm_pm_set_timer(uint32_t modified_time_us)
+{
+ u64 modified_time_ns = modified_time_us * NSEC_PER_USEC;
+ ktime_t modified_ktime = ns_to_ktime(modified_time_ns);
+ pm_hrtimer.function = pm_hrtimer_cb;
+ hrtimer_start(&pm_hrtimer, modified_ktime, HRTIMER_MODE_ABS);
+}
+
/******************************************************************************
* External Idle/Suspend Functions
*****************************************************************************/
@@ -657,15 +681,25 @@
int msm_pm_idle_prepare(struct cpuidle_device *dev,
struct cpuidle_driver *drv, int index)
{
- uint32_t latency_us;
- uint32_t sleep_us;
int i;
unsigned int power_usage = -1;
int ret = 0;
+ uint32_t modified_time_us = 0;
+ struct msm_pm_time_params time_param;
- latency_us = (uint32_t) pm_qos_request(PM_QOS_CPU_DMA_LATENCY);
- sleep_us = (uint32_t) ktime_to_ns(tick_nohz_get_sleep_length());
- sleep_us = DIV_ROUND_UP(sleep_us, 1000);
+ time_param.latency_us =
+ (uint32_t) pm_qos_request(PM_QOS_CPU_DMA_LATENCY);
+ time_param.sleep_us =
+ (uint32_t) (ktime_to_us(tick_nohz_get_sleep_length())
+ & UINT_MAX);
+ time_param.modified_time_us = 0;
+
+ if (!dev->cpu)
+ time_param.next_event_us =
+ (uint32_t) (ktime_to_us(get_next_event_time())
+ & UINT_MAX);
+ else
+ time_param.next_event_us = 0;
for (i = 0; i < dev->state_count; i++) {
struct cpuidle_state *state = &drv->states[i];
@@ -702,17 +736,18 @@
case MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT:
if (!allow)
break;
+ /* fall through */
if (pm_sleep_ops.lowest_limits)
rs_limits = pm_sleep_ops.lowest_limits(true,
- mode, latency_us, sleep_us,
- &power);
+ mode, &time_param, &power);
if (MSM_PM_DEBUG_IDLE & msm_pm_debug_mask)
pr_info("CPU%u: %s: %s, latency %uus, "
"sleep %uus, limit %p\n",
dev->cpu, __func__, state->desc,
- latency_us, sleep_us, rs_limits);
+ time_param.latency_us,
+ time_param.sleep_us, rs_limits);
if (!rs_limits)
allow = false;
@@ -730,6 +765,7 @@
if (allow) {
if (power < power_usage) {
power_usage = power;
+ modified_time_us = time_param.modified_time_us;
ret = mode;
}
@@ -738,6 +774,8 @@
}
}
+ if (modified_time_us && !dev->cpu)
+ msm_pm_set_timer(modified_time_us);
return ret;
}
@@ -850,6 +888,11 @@
int i;
int64_t period = 0;
int64_t time = msm_pm_timer_enter_suspend(&period);
+ struct msm_pm_time_params time_param;
+
+ time_param.latency_us = -1;
+ time_param.sleep_us = -1;
+ time_param.next_event_us = 0;
if (MSM_PM_DEBUG_SUSPEND & msm_pm_debug_mask)
pr_info("%s\n", __func__);
@@ -887,8 +930,7 @@
#endif /* CONFIG_MSM_SLEEP_TIME_OVERRIDE */
if (pm_sleep_ops.lowest_limits)
rs_limits = pm_sleep_ops.lowest_limits(false,
- MSM_PM_SLEEP_MODE_POWER_COLLAPSE, -1,
- -1, &power);
+ MSM_PM_SLEEP_MODE_POWER_COLLAPSE, &time_param, &power);
if (rs_limits) {
if (pm_sleep_ops.enter_sleep)
@@ -1046,6 +1088,7 @@
suspend_set_ops(&msm_pm_ops);
msm_pm_qtimer_available();
+ hrtimer_init(&pm_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
msm_cpuidle_init();
platform_driver_register(&msm_pc_counter_driver);
diff --git a/arch/arm/mach-msm/pm.h b/arch/arm/mach-msm/pm.h
index e2553e2..51256ca 100644
--- a/arch/arm/mach-msm/pm.h
+++ b/arch/arm/mach-msm/pm.h
@@ -57,6 +57,13 @@
#define MSM_PM_MODE(cpu, mode_nr) ((cpu) * MSM_PM_SLEEP_MODE_NR + (mode_nr))
+struct msm_pm_time_params {
+ uint32_t latency_us;
+ uint32_t sleep_us;
+ uint32_t next_event_us;
+ uint32_t modified_time_us;
+};
+
struct msm_pm_platform_data {
u8 idle_supported; /* Allow device to enter mode during idle */
u8 suspend_supported; /* Allow device to enter mode during suspend */
@@ -72,8 +79,8 @@
struct msm_pm_sleep_ops {
void *(*lowest_limits)(bool from_idle,
- enum msm_pm_sleep_mode sleep_mode, uint32_t latency_us,
- uint32_t sleep_us, uint32_t *power);
+ enum msm_pm_sleep_mode sleep_mode,
+ struct msm_pm_time_params *time_param, uint32_t *power);
int (*enter_sleep)(uint32_t sclk_count, void *limits,
bool from_idle, bool notify_rpm);
void (*exit_sleep)(void *limits, bool from_idle,
diff --git a/arch/arm/mach-msm/qdsp5/adsp_driver.c b/arch/arm/mach-msm/qdsp5/adsp_driver.c
index 9d261ae..6419bd0 100644
--- a/arch/arm/mach-msm/qdsp5/adsp_driver.c
+++ b/arch/arm/mach-msm/qdsp5/adsp_driver.c
@@ -139,7 +139,7 @@
pr_err("%s: could not get flags for the handle\n", __func__);
goto flag_error;
}
- temp_ptr = ion_map_kernel(region->client, region->handle, ionflag);
+ temp_ptr = ion_map_kernel(region->client, region->handle);
if (IS_ERR_OR_NULL(temp_ptr)) {
pr_err("%s: could not get virtual address\n", __func__);
goto map_error;
@@ -267,7 +267,7 @@
module->name, vaddr, len);
return ret;
}
- if ((region->ion_flag == CACHED) && region->handle) {
+ if ((region->ion_flag == ION_FLAG_CACHED) && region->handle) {
len = ((((len) + 31) & (~31)) + 32);
ret = msm_ion_do_cache_op(region->client, region->handle,
(void *)paddr, len, cmd);
diff --git a/arch/arm/mach-msm/qdsp5/audio_aac.c b/arch/arm/mach-msm/qdsp5/audio_aac.c
index ac7cca3..46a80d7 100644
--- a/arch/arm/mach-msm/qdsp5/audio_aac.c
+++ b/arch/arm/mach-msm/qdsp5/audio_aac.c
@@ -1716,7 +1716,7 @@
MM_DBG("allocating mem sz = %d\n", mem_sz);
handle = ion_alloc(client, mem_sz, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1742,7 +1742,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers,freeing instance 0x%08x\n",
(int)audio);
@@ -1758,7 +1758,7 @@
mem_sz = (PCM_BUFSZ_MIN * PCM_BUF_MAX_COUNT);
MM_DBG("allocating mem sz = %d\n", mem_sz);
handle = ion_alloc(client, mem_sz,
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate I/P buffers\n");
rc = -ENOMEM;
@@ -1785,8 +1785,7 @@
goto input_buff_get_flags_error;
}
- audio->map_v_read = ion_map_kernel(client,
- handle, ionflag);
+ audio->map_v_read = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("could not map read buffers, freeing instance \
0x%08x\n", (int)audio);
diff --git a/arch/arm/mach-msm/qdsp5/audio_aac_in.c b/arch/arm/mach-msm/qdsp5/audio_aac_in.c
index 2e64a09..c86c1dd 100644
--- a/arch/arm/mach-msm/qdsp5/audio_aac_in.c
+++ b/arch/arm/mach-msm/qdsp5/audio_aac_in.c
@@ -1370,7 +1370,7 @@
MM_DBG("allocating mem sz = %d\n", dma_size);
handle = ion_alloc(client, dma_size, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1398,7 +1398,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_read = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_read = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("could not map read buffers,freeing instance 0x%08x\n",
(int)audio);
@@ -1414,7 +1414,7 @@
MM_DBG("allocating BUFFER_SIZE %d\n", BUFFER_SIZE);
handle = ion_alloc(client, BUFFER_SIZE,
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate I/P buffers\n");
rc = -ENOMEM;
@@ -1444,8 +1444,7 @@
goto input_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client,
- handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5/audio_ac3.c b/arch/arm/mach-msm/qdsp5/audio_ac3.c
index 63904fb..e453ec5 100644
--- a/arch/arm/mach-msm/qdsp5/audio_ac3.c
+++ b/arch/arm/mach-msm/qdsp5/audio_ac3.c
@@ -1029,7 +1029,7 @@
handle = ion_alloc(audio->client,
(config.buffer_size *
config.buffer_count),
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to alloc I/P buffs\n");
audio->input_buff_handle = NULL;
@@ -1067,8 +1067,7 @@
}
audio->map_v_read = ion_map_kernel(
- audio->client,
- handle, ionflag);
+ audio->client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("map of read buf failed\n");
ion_free(audio->client, handle);
@@ -1588,7 +1587,7 @@
audio->client = client;
handle = ion_alloc(client, DMASZ, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1614,7 +1613,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers,freeing instance 0x%08x\n",
(int)audio);
diff --git a/arch/arm/mach-msm/qdsp5/audio_amrnb.c b/arch/arm/mach-msm/qdsp5/audio_amrnb.c
index 8aa102a..0792e3f 100644
--- a/arch/arm/mach-msm/qdsp5/audio_amrnb.c
+++ b/arch/arm/mach-msm/qdsp5/audio_amrnb.c
@@ -981,7 +981,7 @@
handle = ion_alloc(audio->client,
(config.buffer_size *
config.buffer_count),
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to alloc I/P buffs\n");
audio->input_buff_handle = NULL;
@@ -1018,8 +1018,7 @@
break;
}
audio->map_v_read = ion_map_kernel(
- audio->client,
- handle, ionflag);
+ audio->client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("failed to map read buf\n");
ion_free(audio->client, handle);
@@ -1536,7 +1535,7 @@
audio->client = client;
handle = ion_alloc(client, mem_sz, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1562,7 +1561,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5/audio_amrnb_in.c b/arch/arm/mach-msm/qdsp5/audio_amrnb_in.c
index 4effc8e..0742686 100644
--- a/arch/arm/mach-msm/qdsp5/audio_amrnb_in.c
+++ b/arch/arm/mach-msm/qdsp5/audio_amrnb_in.c
@@ -1336,7 +1336,7 @@
if (audio->mode == MSM_AUD_ENC_MODE_NONTUNNEL) {
MM_DBG("allocating BUFFER_SIZE %d\n", BUFFER_SIZE);
handle = ion_alloc(client, BUFFER_SIZE,
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate write buffers\n");
rc = -ENOMEM;
@@ -1366,8 +1366,7 @@
goto input_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client,
- handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5/audio_amrwb.c b/arch/arm/mach-msm/qdsp5/audio_amrwb.c
index 83320f3..7d37cea 100644
--- a/arch/arm/mach-msm/qdsp5/audio_amrwb.c
+++ b/arch/arm/mach-msm/qdsp5/audio_amrwb.c
@@ -977,7 +977,7 @@
handle = ion_alloc(audio->client,
(config.buffer_size *
config.buffer_count),
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to alloc I/P buffs\n");
audio->input_buff_handle = NULL;
@@ -1014,8 +1014,7 @@
break;
}
audio->map_v_read = ion_map_kernel(
- audio->client,
- handle, ionflag);
+ audio->client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("failed to map mem for read buf\n");
ion_free(audio->client, handle);
@@ -1600,7 +1599,7 @@
audio->client = client;
handle = ion_alloc(client, mem_sz, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
goto output_buff_alloc_error;
@@ -1625,7 +1624,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5/audio_evrc.c b/arch/arm/mach-msm/qdsp5/audio_evrc.c
index c0486db..155b0e1 100644
--- a/arch/arm/mach-msm/qdsp5/audio_evrc.c
+++ b/arch/arm/mach-msm/qdsp5/audio_evrc.c
@@ -966,7 +966,7 @@
handle = ion_alloc(audio->client,
(config.buffer_size *
config.buffer_count),
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to alloc I/P buffs\n");
audio->input_buff_handle = NULL;
@@ -1003,8 +1003,7 @@
break;
}
audio->map_v_read = ion_map_kernel(
- audio->client,
- handle, ionflag);
+ audio->client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("failed to map mem"
" for read buf\n");
@@ -1527,7 +1526,7 @@
audio->client = client;
handle = ion_alloc(client, mem_sz, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1553,7 +1552,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5/audio_evrc_in.c b/arch/arm/mach-msm/qdsp5/audio_evrc_in.c
index 9bf0e83..89ad974 100644
--- a/arch/arm/mach-msm/qdsp5/audio_evrc_in.c
+++ b/arch/arm/mach-msm/qdsp5/audio_evrc_in.c
@@ -1310,7 +1310,7 @@
MM_DBG("allocating mem sz = %d\n", dma_size);
handle = ion_alloc(client, dma_size, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1338,7 +1338,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_read = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_read = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("could not map read buffers,freeing instance 0x%08x\n",
(int)audio);
@@ -1353,7 +1353,7 @@
if (audio->mode == MSM_AUD_ENC_MODE_NONTUNNEL) {
MM_DBG("allocating BUFFER_SIZE %d\n", BUFFER_SIZE);
handle = ion_alloc(client, BUFFER_SIZE,
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate I/P buffers\n");
rc = -ENOMEM;
@@ -1383,8 +1383,7 @@
goto input_buff_alloc_error;
}
- audio->map_v_write = ion_map_kernel(client,
- handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5/audio_lpa.c b/arch/arm/mach-msm/qdsp5/audio_lpa.c
index a067b83..8120d7b 100644
--- a/arch/arm/mach-msm/qdsp5/audio_lpa.c
+++ b/arch/arm/mach-msm/qdsp5/audio_lpa.c
@@ -741,7 +741,7 @@
pr_err("%s: could not get flags for the handle\n", __func__);
goto flag_error;
}
- kvaddr = (unsigned long)ion_map_kernel(audio->client, handle, ionflag);
+ kvaddr = (unsigned long)ion_map_kernel(audio->client, handle);
if (IS_ERR_OR_NULL((void *)kvaddr)) {
pr_err("%s: could not get virtual address\n", __func__);
goto map_error;
diff --git a/arch/arm/mach-msm/qdsp5/audio_mp3.c b/arch/arm/mach-msm/qdsp5/audio_mp3.c
index cef3d99..b8c64be 100644
--- a/arch/arm/mach-msm/qdsp5/audio_mp3.c
+++ b/arch/arm/mach-msm/qdsp5/audio_mp3.c
@@ -1095,7 +1095,7 @@
goto flag_error;
}
- temp_ptr = ion_map_kernel(audio->client, handle, ionflag);
+ temp_ptr = ion_map_kernel(audio->client, handle);
if (IS_ERR_OR_NULL(temp_ptr)) {
pr_err("%s: could not get virtual address\n", __func__);
goto map_error;
@@ -1525,7 +1525,7 @@
handle = ion_alloc(audio->client,
(config.buffer_size *
config.buffer_count),
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to alloc I/P buffs\n");
rc = -ENOMEM;
@@ -1558,8 +1558,7 @@
}
audio->map_v_read = ion_map_kernel(
- audio->client,
- handle, ionflag);
+ audio->client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("map of read buf failed\n");
@@ -2254,7 +2253,7 @@
MM_DBG("memsz = %d\n", mem_sz);
handle = ion_alloc(client, mem_sz, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -2280,7 +2279,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5/audio_mvs.c b/arch/arm/mach-msm/qdsp5/audio_mvs.c
index 158dd46..d45043d 100644
--- a/arch/arm/mach-msm/qdsp5/audio_mvs.c
+++ b/arch/arm/mach-msm/qdsp5/audio_mvs.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -326,6 +326,7 @@
wait_queue_head_t wait;
wait_queue_head_t mode_wait;
+ wait_queue_head_t in_wait;
wait_queue_head_t out_wait;
struct mutex lock;
@@ -1142,6 +1143,7 @@
mutex_unlock(&audio->in_lock);
+ wake_up(&audio->in_wait);
dl_reply.valid_frame_info_ptr = cpu_to_be32(0x00000001);
dl_reply.frame_mode = cpu_to_be32(audio->frame_mode);
@@ -1187,6 +1189,9 @@
rpc_hdr_len);
break;
+ } else if ((rpc_hdr_len == 0) &&
+ (audio->state == AUDIO_MVS_CLOSED)) {
+ break;
} else if (rpc_hdr_len < RPC_COMMON_HDR_SZ) {
continue;
} else {
@@ -1353,8 +1358,11 @@
mutex_lock(&audio->lock);
if (audio->state == AUDIO_MVS_STARTED)
audio_mvs_stop(audio);
- audio_mvs_free_buf(audio);
audio->state = AUDIO_MVS_CLOSED;
+ msm_rpc_read_wakeup(audio->rpc_endpt);
+ msm_rpc_close(audio->rpc_endpt);
+ audio->task = NULL;
+ audio_mvs_free_buf(audio);
mutex_unlock(&audio->lock);
MM_DBG("Release done\n");
@@ -1443,40 +1451,52 @@
MM_DBG("\n");
- mutex_lock(&audio->in_lock);
- if (audio->state == AUDIO_MVS_STARTED) {
- if (count <= sizeof(struct msm_audio_mvs_frame)) {
- if (!list_empty(&audio->free_in_queue)) {
- buf_node =
- list_first_entry(&audio->free_in_queue,
+ rc = wait_event_interruptible_timeout(audio->in_wait,
+ (!list_empty(&audio->free_in_queue) ||
+ audio->state == AUDIO_MVS_STOPPED), 1 * HZ);
+ if (rc > 0) {
+ mutex_lock(&audio->in_lock);
+ if (audio->state == AUDIO_MVS_STARTED) {
+ if (count <= sizeof(struct msm_audio_mvs_frame)) {
+ if (!list_empty(&audio->free_in_queue)) {
+ buf_node = list_first_entry(
+ &audio->free_in_queue,
struct audio_mvs_buf_node,
list);
- list_del(&buf_node->list);
+ list_del(&buf_node->list);
- rc = copy_from_user(&buf_node->frame,
- buf,
- count);
+ rc = copy_from_user(&buf_node->frame,
+ buf,
+ count);
- list_add_tail(&buf_node->list,
- &audio->in_queue);
+ list_add_tail(&buf_node->list,
+ &audio->in_queue);
+ } else {
+ MM_ERR("No free DL buffs\n");
+ }
} else {
- MM_ERR("No free DL buffs\n");
+ MM_ERR("Write count %d > sizeof(frame) %d",
+ count,
+ sizeof(struct msm_audio_mvs_frame));
+
+ rc = -ENOMEM;
}
} else {
- MM_ERR("Write count %d < sizeof(frame) %d",
- count,
- sizeof(struct msm_audio_mvs_frame));
+ MM_ERR("Write performed in invalid state %d\n",
+ audio->state);
- rc = -ENOMEM;
+ rc = -EPERM;
}
+ mutex_unlock(&audio->in_lock);
+ } else if (rc == 0) {
+ MM_ERR("%s: No free DL buffs\n", __func__);
+
+ rc = -ETIMEDOUT;
} else {
- MM_ERR("Write performed in invalid state %d\n",
- audio->state);
+ MM_ERR("%s: write was interrupted\n", __func__);
- rc = -EPERM;
+ rc = -ERESTARTSYS;
}
- mutex_unlock(&audio->in_lock);
-
return rc;
}
@@ -1593,26 +1613,6 @@
MM_DBG("\n");
- memset(&audio_mvs_info, 0, sizeof(audio_mvs_info));
- mutex_init(&audio_mvs_info.lock);
- mutex_init(&audio_mvs_info.in_lock);
- mutex_init(&audio_mvs_info.out_lock);
-
- init_waitqueue_head(&audio_mvs_info.wait);
- init_waitqueue_head(&audio_mvs_info.mode_wait);
- init_waitqueue_head(&audio_mvs_info.out_wait);
-
- INIT_LIST_HEAD(&audio_mvs_info.in_queue);
- INIT_LIST_HEAD(&audio_mvs_info.free_in_queue);
- INIT_LIST_HEAD(&audio_mvs_info.out_queue);
- INIT_LIST_HEAD(&audio_mvs_info.free_out_queue);
-
- wake_lock_init(&audio_mvs_info.suspend_lock,
- WAKE_LOCK_SUSPEND,
- "audio_mvs_suspend");
- pm_qos_add_request(&audio_mvs_info.pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
- PM_QOS_DEFAULT_VALUE);
-
audio_mvs_info.rpc_endpt = msm_rpc_connect_compatible(MVS_PROG,
MVS_VERS_COMP_VER2,
MSM_RPC_UNINTERRUPTIBLE);
@@ -1696,6 +1696,27 @@
};
static int __init audio_mvs_init(void)
{
+ memset(&audio_mvs_info, 0, sizeof(audio_mvs_info));
+ mutex_init(&audio_mvs_info.lock);
+ mutex_init(&audio_mvs_info.in_lock);
+ mutex_init(&audio_mvs_info.out_lock);
+
+ init_waitqueue_head(&audio_mvs_info.wait);
+ init_waitqueue_head(&audio_mvs_info.mode_wait);
+ init_waitqueue_head(&audio_mvs_info.in_wait);
+ init_waitqueue_head(&audio_mvs_info.out_wait);
+
+ INIT_LIST_HEAD(&audio_mvs_info.in_queue);
+ INIT_LIST_HEAD(&audio_mvs_info.free_in_queue);
+ INIT_LIST_HEAD(&audio_mvs_info.out_queue);
+ INIT_LIST_HEAD(&audio_mvs_info.free_out_queue);
+
+ wake_lock_init(&audio_mvs_info.suspend_lock,
+ WAKE_LOCK_SUSPEND,
+ "audio_mvs_suspend");
+ pm_qos_add_request(&audio_mvs_info.pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
+ PM_QOS_DEFAULT_VALUE);
+
return misc_register(&audio_mvs_misc);
}
diff --git a/arch/arm/mach-msm/qdsp5/audio_pcm.c b/arch/arm/mach-msm/qdsp5/audio_pcm.c
index 340bcc6..3eb72c8 100644
--- a/arch/arm/mach-msm/qdsp5/audio_pcm.c
+++ b/arch/arm/mach-msm/qdsp5/audio_pcm.c
@@ -823,7 +823,7 @@
pr_err("%s: could not get flags for the handle\n", __func__);
goto flag_error;
}
- kvaddr = (unsigned long)ion_map_kernel(audio->client, handle, ionflag);
+ kvaddr = (unsigned long)ion_map_kernel(audio->client, handle);
if (IS_ERR_OR_NULL((void *)kvaddr)) {
pr_err("%s: could not get virtual address\n", __func__);
goto map_error;
@@ -1576,7 +1576,7 @@
MM_DBG("memsz = %d\n", mem_sz);
handle = ion_alloc(client, mem_sz, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1602,7 +1602,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5/audio_pcm_in.c b/arch/arm/mach-msm/qdsp5/audio_pcm_in.c
index 2da1f19..68ffcfef 100644
--- a/arch/arm/mach-msm/qdsp5/audio_pcm_in.c
+++ b/arch/arm/mach-msm/qdsp5/audio_pcm_in.c
@@ -843,7 +843,7 @@
MM_DBG("allocating mem sz = %d\n", DMASZ);
handle = ion_alloc(client, DMASZ, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -871,7 +871,7 @@
goto output_buff_get_flags_error;
}
- audio->data = ion_map_kernel(client, handle, ionflag);
+ audio->data = ion_map_kernel(client, handle);
if (IS_ERR(audio->data)) {
MM_ERR("could not map read buffers,freeing instance 0x%08x\n",
(int)audio);
diff --git a/arch/arm/mach-msm/qdsp5/audio_qcelp.c b/arch/arm/mach-msm/qdsp5/audio_qcelp.c
index 1a0c333..876c909 100644
--- a/arch/arm/mach-msm/qdsp5/audio_qcelp.c
+++ b/arch/arm/mach-msm/qdsp5/audio_qcelp.c
@@ -967,7 +967,7 @@
handle = ion_alloc(audio->client,
(config.buffer_size *
config.buffer_count),
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to alloc I/P buffs\n");
audio->input_buff_handle = NULL;
@@ -1004,8 +1004,7 @@
break;
}
audio->map_v_read = ion_map_kernel(
- audio->client,
- handle, ionflag);
+ audio->client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("failed to map read buf\n");
ion_free(audio->client, handle);
@@ -1525,7 +1524,7 @@
audio->client = client;
handle = ion_alloc(client, mem_sz, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1551,7 +1550,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5/audio_qcelp_in.c b/arch/arm/mach-msm/qdsp5/audio_qcelp_in.c
index ee079bc..6ca3382 100644
--- a/arch/arm/mach-msm/qdsp5/audio_qcelp_in.c
+++ b/arch/arm/mach-msm/qdsp5/audio_qcelp_in.c
@@ -1312,7 +1312,7 @@
MM_DBG("allocating mem sz = %d\n", dma_size);
handle = ion_alloc(client, dma_size, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1340,7 +1340,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_read = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_read = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("could not map read buffers,freeing instance 0x%08x\n",
(int)audio);
@@ -1355,7 +1355,7 @@
if (audio->mode == MSM_AUD_ENC_MODE_NONTUNNEL) {
MM_DBG("allocating BUFFER_SIZE %d\n", BUFFER_SIZE);
handle = ion_alloc(client, BUFFER_SIZE,
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate I/P buffers\n");
rc = -ENOMEM;
@@ -1385,8 +1385,7 @@
goto input_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client,
- handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5/audio_wma.c b/arch/arm/mach-msm/qdsp5/audio_wma.c
index 0a77b58..6d520b4 100644
--- a/arch/arm/mach-msm/qdsp5/audio_wma.c
+++ b/arch/arm/mach-msm/qdsp5/audio_wma.c
@@ -1045,7 +1045,7 @@
handle = ion_alloc(audio->client,
(config.buffer_size *
config.buffer_count),
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to alloc I/P buffs\n");
audio->input_buff_handle = NULL;
@@ -1083,8 +1083,7 @@
}
audio->map_v_read = ion_map_kernel(
- audio->client,
- handle, ionflag);
+ audio->client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("map of read buf failed\n");
ion_free(audio->client, handle);
@@ -1678,7 +1677,7 @@
audio->client = client;
handle = ion_alloc(client, mem_sz, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1704,7 +1703,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5/audio_wmapro.c b/arch/arm/mach-msm/qdsp5/audio_wmapro.c
index 82fc3f9..a08f3c9 100644
--- a/arch/arm/mach-msm/qdsp5/audio_wmapro.c
+++ b/arch/arm/mach-msm/qdsp5/audio_wmapro.c
@@ -1042,7 +1042,7 @@
handle = ion_alloc(audio->client,
(config.buffer_size *
config.buffer_count),
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to alloc I/P buffs\n");
audio->input_buff_handle = NULL;
@@ -1080,8 +1080,7 @@
}
audio->map_v_read = ion_map_kernel(
- audio->client,
- handle, ionflag);
+ audio->client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("map of read buf failed\n");
ion_free(audio->client, handle);
@@ -1673,7 +1672,7 @@
audio->client = client;
handle = ion_alloc(client, mem_sz, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1699,7 +1698,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_amrnb_in.c b/arch/arm/mach-msm/qdsp5v2/audio_amrnb_in.c
index 2f03cd0..f1951f7 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_amrnb_in.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_amrnb_in.c
@@ -803,7 +803,7 @@
audio->client = client;
handle = ion_alloc(client, DMASZ, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -828,7 +828,7 @@
goto buff_get_flags_error;
}
- audio->map_v_read = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_read = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_evrc_in.c b/arch/arm/mach-msm/qdsp5v2/audio_evrc_in.c
index 1180e8d..6e95dc5 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_evrc_in.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_evrc_in.c
@@ -1363,7 +1363,7 @@
MM_DBG("allocating mem sz = %d\n", DMASZ);
handle = ion_alloc(client, DMASZ, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1391,7 +1391,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_read = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_read = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("could not map read buffers,freeing instance 0x%08x\n",
(int)audio);
@@ -1458,7 +1458,7 @@
MM_DBG("allocating BUFFER_SIZE %d\n", BUFFER_SIZE);
handle = ion_alloc(client, BUFFER_SIZE,
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate I/P buffers\n");
rc = -ENOMEM;
@@ -1488,8 +1488,7 @@
goto input_buff_alloc_error;
}
- audio->map_v_write = ion_map_kernel(client,
- handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_qcelp_in.c b/arch/arm/mach-msm/qdsp5v2/audio_qcelp_in.c
index 7fac2ea..8ad738e 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_qcelp_in.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_qcelp_in.c
@@ -1368,7 +1368,7 @@
MM_DBG("allocating mem sz = %d\n", DMASZ);
handle = ion_alloc(client, DMASZ, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1396,7 +1396,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_read = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_read = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("could not map read buffers,freeing instance 0x%08x\n",
(int)audio);
@@ -1465,7 +1465,7 @@
MM_DBG("allocating BUFFER_SIZE %d\n", BUFFER_SIZE);
handle = ion_alloc(client, BUFFER_SIZE,
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate I/P buffers\n");
rc = -ENOMEM;
@@ -1495,8 +1495,7 @@
goto input_buff_alloc_error;
}
- audio->map_v_write = ion_map_kernel(client,
- handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_wma.c b/arch/arm/mach-msm/qdsp5v2/audio_wma.c
index 4ba5821..8562020 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_wma.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_wma.c
@@ -1061,7 +1061,7 @@
handle = ion_alloc(audio->client,
(config.buffer_size *
config.buffer_count),
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to alloc I/P buffs\n");
audio->input_buff_handle = NULL;
@@ -1099,8 +1099,7 @@
}
audio->map_v_read = ion_map_kernel(
- audio->client,
- handle, ionflag);
+ audio->client, handle);
if (IS_ERR(audio->map_v_read)) {
MM_ERR("map of read buf failed\n");
ion_free(audio->client, handle);
@@ -1696,7 +1695,7 @@
audio->client = client;
handle = ion_alloc(client, mem_sz, SZ_4K,
- ION_HEAP(ION_AUDIO_HEAP_ID));
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
MM_ERR("Unable to create allocate O/P buffers\n");
rc = -ENOMEM;
@@ -1722,7 +1721,7 @@
goto output_buff_get_flags_error;
}
- audio->map_v_write = ion_map_kernel(client, handle, ionflag);
+ audio->map_v_write = ion_map_kernel(client, handle);
if (IS_ERR(audio->map_v_write)) {
MM_ERR("could not map write buffers\n");
rc = -ENOMEM;
diff --git a/arch/arm/mach-msm/qdsp6v2/Makefile b/arch/arm/mach-msm/qdsp6v2/Makefile
index 0c75f66..ed8cb345 100644
--- a/arch/arm/mach-msm/qdsp6v2/Makefile
+++ b/arch/arm/mach-msm/qdsp6v2/Makefile
@@ -26,3 +26,4 @@
obj-$(CONFIG_MSM_QDSP6V2_CODECS) += audio_mp3.o audio_amrnb.o audio_amrwb.o audio_evrc.o audio_qcelp.o amrwb_in.o
obj-$(CONFIG_MSM_ADSP_LOADER) += adsp-loader.o
obj-$(CONFIG_MSM_ULTRASOUND) += ultrasound/
+obj-m += adsprpc.o
diff --git a/arch/arm/mach-msm/qdsp6v2/adsprpc.c b/arch/arm/mach-msm/qdsp6v2/adsprpc.c
new file mode 100644
index 0000000..49008de
--- /dev/null
+++ b/arch/arm/mach-msm/qdsp6v2/adsprpc.c
@@ -0,0 +1,705 @@
+/*
+ * Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#include "adsprpc.h"
+
+struct smq_invoke_ctx {
+ struct completion work;
+ int retval;
+ atomic_t free;
+};
+
+struct smq_context_list {
+ struct smq_invoke_ctx *ls;
+ int size;
+ int last;
+};
+
+struct fastrpc_apps {
+ smd_channel_t *chan;
+ struct smq_context_list clst;
+ struct completion work;
+ struct ion_client *iclient;
+ struct cdev cdev;
+ dev_t dev_no;
+ spinlock_t wrlock;
+ spinlock_t hlock;
+ struct hlist_head htbl[RPC_HASH_SZ];
+};
+
+struct fastrpc_buf {
+ struct ion_handle *handle;
+ void *virt;
+ ion_phys_addr_t phys;
+ int size;
+ int used;
+};
+
+struct fastrpc_device {
+ uint32_t tgid;
+ struct hlist_node hn;
+ struct fastrpc_buf buf;
+};
+
+static struct fastrpc_apps gfa;
+
+static void free_mem(struct fastrpc_buf *buf)
+{
+ struct fastrpc_apps *me = &gfa;
+
+ if (buf->handle) {
+ if (buf->virt) {
+ ion_unmap_kernel(me->iclient, buf->handle);
+ buf->virt = 0;
+ }
+ ion_free(me->iclient, buf->handle);
+ buf->handle = 0;
+ }
+}
+
+static int alloc_mem(struct fastrpc_buf *buf)
+{
+ struct ion_client *clnt = gfa.iclient;
+ int err = 0;
+
+ buf->handle = ion_alloc(clnt, buf->size, SZ_4K,
+ ION_HEAP(ION_AUDIO_HEAP_ID), 0);
+ VERIFY(0 == IS_ERR_OR_NULL(buf->handle));
+ buf->virt = 0;
+ VERIFY(0 != (buf->virt = ion_map_kernel(clnt, buf->handle)));
+ VERIFY(0 == ion_phys(clnt, buf->handle, &buf->phys, &buf->size));
+ bail:
+ if (err && !IS_ERR_OR_NULL(buf->handle))
+ free_mem(buf);
+ return err;
+}
+
+static int context_list_ctor(struct smq_context_list *me, int size)
+{
+ int err = 0;
+ VERIFY(0 != (me->ls = kzalloc(size, GFP_KERNEL)));
+ me->size = size / sizeof(*me->ls);
+ me->last = 0;
+ bail:
+ return err;
+}
+
+static void context_list_dtor(struct smq_context_list *me)
+{
+ kfree(me->ls);
+ me->ls = 0;
+}
+
+static void context_list_alloc_ctx(struct smq_context_list *me,
+ struct smq_invoke_ctx **po)
+{
+ int ii = me->last;
+ struct smq_invoke_ctx *ctx;
+
+ for (;;) {
+ ii = ii % me->size;
+ ctx = &me->ls[ii];
+ if (atomic_read(&ctx->free) == 0)
+ if (0 == atomic_cmpxchg(&ctx->free, 0, 1))
+ break;
+ ii++;
+ }
+ me->last = ii;
+ ctx->retval = -1;
+ init_completion(&ctx->work);
+ *po = ctx;
+}
+
+static void context_free(struct smq_invoke_ctx *me)
+{
+ if (me)
+ atomic_set(&me->free, 0);
+}
+
+static void context_notify_user(struct smq_invoke_ctx *me, int retval)
+{
+ me->retval = retval;
+ complete(&me->work);
+}
+
+static void context_notify_all_users(struct smq_context_list *me)
+{
+ int ii;
+
+ if (!me->ls)
+ return;
+ for (ii = 0; ii < me->size; ++ii) {
+ if (atomic_read(&me->ls[ii].free) != 0)
+ complete(&me->ls[ii].work);
+ }
+}
+
+static int get_page_list(uint32_t kernel, uint32_t sc, remote_arg_t *pra,
+ struct fastrpc_buf *ibuf, struct fastrpc_buf *obuf)
+{
+ struct smq_phy_page *pgstart, *pages;
+ struct smq_invoke_buf *list;
+ int ii, rlen, err = 0;
+ int inbufs = REMOTE_SCALARS_INBUFS(sc);
+ int outbufs = REMOTE_SCALARS_OUTBUFS(sc);
+
+ VERIFY(0 != try_module_get(THIS_MODULE));
+ LOCK_MMAP(kernel);
+ *obuf = *ibuf;
+ retry:
+ list = smq_invoke_buf_start((remote_arg_t *)obuf->virt, sc);
+ pgstart = smq_phy_page_start(sc, list);
+ pages = pgstart + 1;
+ rlen = obuf->size - ((uint32_t)pages - (uint32_t)obuf->virt);
+ if (rlen < 0) {
+ rlen = ((uint32_t)pages - (uint32_t)obuf->virt) - obuf->size;
+ obuf->size += buf_page_size(rlen);
+ obuf->handle = 0;
+ VERIFY(0 == alloc_mem(obuf));
+ goto retry;
+ }
+ pgstart->addr = obuf->phys;
+ pgstart->size = obuf->size;
+ for (ii = 0; ii < inbufs + outbufs; ++ii) {
+ void *buf;
+ int len, num;
+
+ len = pra[ii].buf.len;
+ if (!len)
+ continue;
+ buf = pra[ii].buf.pv;
+ num = buf_num_pages(buf, len);
+ if (!kernel)
+ list[ii].num = buf_get_pages(buf, len, num,
+ ii >= inbufs, pages, rlen / sizeof(*pages));
+ else
+ list[ii].num = 0;
+ VERIFY(list[ii].num >= 0);
+ if (list[ii].num) {
+ list[ii].pgidx = pages - pgstart;
+ pages = pages + list[ii].num;
+ } else if (rlen > sizeof(*pages)) {
+ list[ii].pgidx = pages - pgstart;
+ pages = pages + 1;
+ } else {
+ if (obuf->handle != ibuf->handle)
+ free_mem(obuf);
+ obuf->size += buf_page_size(sizeof(*pages));
+ obuf->handle = 0;
+ VERIFY(0 == alloc_mem(obuf));
+ goto retry;
+ }
+ rlen = obuf->size - ((uint32_t) pages - (uint32_t) obuf->virt);
+ }
+ obuf->used = obuf->size - rlen;
+ bail:
+ if (err && (obuf->handle != ibuf->handle))
+ free_mem(obuf);
+ UNLOCK_MMAP(kernel);
+ module_put(THIS_MODULE);
+ return err;
+}
+
+static int get_args(uint32_t kernel, uint32_t sc, remote_arg_t *pra,
+ remote_arg_t *rpra, remote_arg_t *upra,
+ struct fastrpc_buf *ibuf, struct fastrpc_buf **abufs,
+ int *nbufs)
+{
+ struct smq_invoke_buf *list;
+ struct fastrpc_buf *pbuf = ibuf, *obufs = 0;
+ struct smq_phy_page *pages;
+ void *args;
+ int ii, rlen, size, used, inh, bufs = 0, err = 0;
+ int inbufs = REMOTE_SCALARS_INBUFS(sc);
+ int outbufs = REMOTE_SCALARS_OUTBUFS(sc);
+
+ list = smq_invoke_buf_start(rpra, sc);
+ pages = smq_phy_page_start(sc, list);
+ used = ALIGN_8(pbuf->used);
+ args = (void *)((char *)pbuf->virt + used);
+ rlen = pbuf->size - used;
+ for (ii = 0; ii < inbufs + outbufs; ++ii) {
+ int num;
+
+ rpra[ii].buf.len = pra[ii].buf.len;
+ if (list[ii].num) {
+ rpra[ii].buf.pv = pra[ii].buf.pv;
+ continue;
+ }
+ if (rlen < pra[ii].buf.len) {
+ struct fastrpc_buf *b;
+ pbuf->used = pbuf->size - rlen;
+ VERIFY(0 != (b = krealloc(obufs,
+ (bufs + 1) * sizeof(*obufs), GFP_KERNEL)));
+ obufs = b;
+ pbuf = obufs + bufs;
+ pbuf->size = buf_num_pages(0, pra[ii].buf.len) *
+ PAGE_SIZE;
+ VERIFY(0 == alloc_mem(pbuf));
+ bufs++;
+ args = pbuf->virt;
+ rlen = pbuf->size;
+ }
+ num = buf_num_pages(args, pra[ii].buf.len);
+ if (pbuf == ibuf) {
+ list[ii].num = num;
+ list[ii].pgidx = 0;
+ } else {
+ list[ii].num = 1;
+ pages[list[ii].pgidx].addr =
+ buf_page_start((void *)(pbuf->phys +
+ (pbuf->size - rlen)));
+ pages[list[ii].pgidx].size =
+ buf_page_size(pra[ii].buf.len);
+ }
+ if (ii < inbufs) {
+ if (!kernel)
+ VERIFY(0 == copy_from_user(args, pra[ii].buf.pv,
+ pra[ii].buf.len));
+ else
+ memmove(args, pra[ii].buf.pv, pra[ii].buf.len);
+ }
+ rpra[ii].buf.pv = args;
+ args = (void *)((char *)args + ALIGN_8(pra[ii].buf.len));
+ rlen -= ALIGN_8(pra[ii].buf.len);
+ }
+ for (ii = 0; ii < inbufs; ++ii) {
+ if (rpra[ii].buf.len)
+ dmac_flush_range(rpra[ii].buf.pv,
+ (char *)rpra[ii].buf.pv + rpra[ii].buf.len);
+ }
+ pbuf->used = pbuf->size - rlen;
+ size = sizeof(*rpra) * REMOTE_SCALARS_INHANDLES(sc);
+ if (size) {
+ inh = inbufs + outbufs;
+ if (!kernel)
+ VERIFY(0 == copy_from_user(&rpra[inh], &upra[inh],
+ size));
+ else
+ memmove(&rpra[inh], &upra[inh], size);
+ }
+ dmac_flush_range(rpra, (char *)rpra + used);
+ bail:
+ *abufs = obufs;
+ *nbufs = bufs;
+ return err;
+}
+
+static int put_args(uint32_t kernel, uint32_t sc, remote_arg_t *pra,
+ remote_arg_t *rpra, remote_arg_t *upra)
+{
+ int ii, inbufs, outbufs, outh, size;
+ int err = 0;
+
+ inbufs = REMOTE_SCALARS_INBUFS(sc);
+ outbufs = REMOTE_SCALARS_OUTBUFS(sc);
+ for (ii = inbufs; ii < inbufs + outbufs; ++ii) {
+ if (rpra[ii].buf.pv != pra[ii].buf.pv)
+ VERIFY(0 == copy_to_user(pra[ii].buf.pv,
+ rpra[ii].buf.pv, rpra[ii].buf.len));
+ }
+ size = sizeof(*rpra) * REMOTE_SCALARS_OUTHANDLES(sc);
+ if (size) {
+ outh = inbufs + outbufs + REMOTE_SCALARS_INHANDLES(sc);
+ if (!kernel)
+ VERIFY(0 == copy_to_user(&upra[outh], &rpra[outh],
+ size));
+ else
+ memmove(&upra[outh], &rpra[outh], size);
+ }
+ bail:
+ return err;
+}
+
+static void inv_args(uint32_t sc, remote_arg_t *rpra, int used)
+{
+ int ii, inbufs, outbufs;
+ int inv = 0;
+
+ inbufs = REMOTE_SCALARS_INBUFS(sc);
+ outbufs = REMOTE_SCALARS_OUTBUFS(sc);
+ for (ii = inbufs; ii < inbufs + outbufs; ++ii) {
+ if (buf_page_start(rpra) == buf_page_start(rpra[ii].buf.pv))
+ inv = 1;
+ else
+ dmac_inv_range(rpra[ii].buf.pv,
+ (char *)rpra[ii].buf.pv + rpra[ii].buf.len);
+ }
+
+ if (inv || REMOTE_SCALARS_OUTHANDLES(sc))
+ dmac_inv_range(rpra, (char *)rpra + used);
+}
+
+static int fastrpc_invoke_send(struct fastrpc_apps *me, remote_handle_t handle,
+ uint32_t sc, struct smq_invoke_ctx *ctx,
+ struct fastrpc_buf *buf)
+{
+ struct smq_msg msg;
+ int err = 0, len;
+
+ msg.pid = current->tgid;
+ msg.tid = current->pid;
+ msg.invoke.header.ctx = ctx;
+ msg.invoke.header.handle = handle;
+ msg.invoke.header.sc = sc;
+ msg.invoke.page.addr = buf->phys;
+ msg.invoke.page.size = buf_page_size(buf->used);
+ spin_lock(&me->wrlock);
+ len = smd_write(me->chan, &msg, sizeof(msg));
+ spin_unlock(&me->wrlock);
+ VERIFY(len == sizeof(msg));
+ bail:
+ return err;
+}
+
+static void fastrpc_deinit(void)
+{
+ struct fastrpc_apps *me = &gfa;
+
+ if (me->chan)
+ (void)smd_close(me->chan);
+ context_list_dtor(&me->clst);
+ ion_client_destroy(me->iclient);
+ me->iclient = 0;
+ me->chan = 0;
+}
+
+static void fastrpc_read_handler(void)
+{
+ struct fastrpc_apps *me = &gfa;
+ struct smq_invoke_rsp rsp;
+ int err = 0;
+
+ do {
+ VERIFY(sizeof(rsp) ==
+ smd_read_from_cb(me->chan, &rsp, sizeof(rsp)));
+ context_notify_user(rsp.ctx, rsp.retval);
+ } while (!err);
+ bail:
+ return;
+}
+
+static void smd_event_handler(void *priv, unsigned event)
+{
+ struct fastrpc_apps *me = (struct fastrpc_apps *)priv;
+
+ switch (event) {
+ case SMD_EVENT_OPEN:
+ complete(&(me->work));
+ break;
+ case SMD_EVENT_CLOSE:
+ context_notify_all_users(&me->clst);
+ break;
+ case SMD_EVENT_DATA:
+ fastrpc_read_handler();
+ break;
+ }
+}
+
+static int fastrpc_init(void)
+{
+ int err = 0;
+ struct fastrpc_apps *me = &gfa;
+
+ if (me->chan == 0) {
+ int ii;
+ spin_lock_init(&me->hlock);
+ spin_lock_init(&me->wrlock);
+ init_completion(&me->work);
+ for (ii = 0; ii < RPC_HASH_SZ; ++ii)
+ INIT_HLIST_HEAD(&me->htbl[ii]);
+ VERIFY(0 == context_list_ctor(&me->clst, SZ_4K));
+ me->iclient = msm_ion_client_create(ION_HEAP_CARVEOUT_MASK,
+ DEVICE_NAME);
+ VERIFY(0 == IS_ERR_OR_NULL(me->iclient));
+ VERIFY(0 == smd_named_open_on_edge(FASTRPC_SMD_GUID,
+ SMD_APPS_QDSP, &me->chan,
+ me, smd_event_handler));
+ VERIFY(0 != wait_for_completion_timeout(&me->work,
+ RPC_TIMEOUT));
+ }
+ bail:
+ if (err)
+ fastrpc_deinit();
+ return err;
+}
+
+static void free_dev(struct fastrpc_device *dev)
+{
+ if (dev) {
+ module_put(THIS_MODULE);
+ free_mem(&dev->buf);
+ kfree(dev);
+ }
+}
+
+static int alloc_dev(struct fastrpc_device **dev)
+{
+ int err = 0;
+ struct fastrpc_device *fd = 0;
+
+ VERIFY(0 != try_module_get(THIS_MODULE));
+ VERIFY(0 != (fd = kzalloc(sizeof(*fd), GFP_KERNEL)));
+ fd->buf.size = PAGE_SIZE;
+ VERIFY(0 == alloc_mem(&fd->buf));
+ fd->tgid = current->tgid;
+ INIT_HLIST_NODE(&fd->hn);
+ *dev = fd;
+ bail:
+ if (err)
+ free_dev(fd);
+ return err;
+}
+
+static int get_dev(struct fastrpc_apps *me, struct fastrpc_device **rdev)
+{
+ struct hlist_head *head;
+ struct fastrpc_device *dev = 0;
+ struct hlist_node *n;
+ uint32_t h = hash_32(current->tgid, RPC_HASH_BITS);
+ int err = 0;
+
+ spin_lock(&me->hlock);
+ head = &me->htbl[h];
+ hlist_for_each_entry(dev, n, head, hn) {
+ if (dev->tgid == current->tgid) {
+ hlist_del(&dev->hn);
+ break;
+ }
+ }
+ spin_unlock(&me->hlock);
+ VERIFY(dev != 0);
+ *rdev = dev;
+ bail:
+ if (err) {
+ free_dev(dev);
+ err = alloc_dev(rdev);
+ }
+ return err;
+}
+
+static void add_dev(struct fastrpc_apps *me, struct fastrpc_device *dev)
+{
+ struct hlist_head *head;
+ uint32_t h = hash_32(current->tgid, RPC_HASH_BITS);
+
+ spin_lock(&me->hlock);
+ head = &me->htbl[h];
+ hlist_add_head(&dev->hn, head);
+ spin_unlock(&me->hlock);
+ return;
+}
+
+static int fastrpc_release_current_dsp_process(void);
+
+static int fastrpc_internal_invoke(struct fastrpc_apps *me, uint32_t kernel,
+ struct fastrpc_ioctl_invoke *invoke, remote_arg_t *pra)
+{
+ remote_arg_t *rpra = 0;
+ struct fastrpc_device *dev = 0;
+ struct smq_invoke_ctx *ctx = 0;
+ struct fastrpc_buf obuf, *abufs = 0, *b;
+ int interrupted = 0;
+ uint32_t sc;
+ int ii, nbufs = 0, err = 0;
+
+ sc = invoke->sc;
+ obuf.handle = 0;
+ if (REMOTE_SCALARS_LENGTH(sc)) {
+ VERIFY(0 == get_dev(me, &dev));
+ VERIFY(0 == get_page_list(kernel, sc, pra, &dev->buf, &obuf));
+ rpra = (remote_arg_t *)obuf.virt;
+ VERIFY(0 == get_args(kernel, sc, pra, rpra, invoke->pra, &obuf,
+ &abufs, &nbufs));
+ }
+
+ context_list_alloc_ctx(&me->clst, &ctx);
+ VERIFY(0 == fastrpc_invoke_send(me, invoke->handle, sc, ctx, &obuf));
+ inv_args(sc, rpra, obuf.used);
+ VERIFY(0 == (interrupted =
+ wait_for_completion_interruptible(&ctx->work)));
+ VERIFY(0 == (err = ctx->retval));
+ VERIFY(0 == put_args(kernel, sc, pra, rpra, invoke->pra));
+ bail:
+ if (interrupted) {
+ init_completion(&ctx->work);
+ if (!kernel)
+ (void)fastrpc_release_current_dsp_process();
+ wait_for_completion(&ctx->work);
+ }
+ context_free(ctx);
+ for (ii = 0, b = abufs; ii < nbufs; ++ii, ++b)
+ free_mem(b);
+ kfree(abufs);
+ if (dev) {
+ add_dev(me, dev);
+ if (obuf.handle != dev->buf.handle)
+ free_mem(&obuf);
+ }
+ return err;
+}
+
+static int fastrpc_create_current_dsp_process(void)
+{
+ int err = 0;
+ struct fastrpc_ioctl_invoke ioctl;
+ struct fastrpc_apps *me = &gfa;
+ remote_arg_t ra[1];
+ int tgid = 0;
+
+ tgid = current->tgid;
+ ra[0].buf.pv = &tgid;
+ ra[0].buf.len = sizeof(tgid);
+ ioctl.handle = 1;
+ ioctl.sc = REMOTE_SCALARS_MAKE(0, 1, 0);
+ ioctl.pra = ra;
+ VERIFY(0 == fastrpc_internal_invoke(me, 1, &ioctl, ra));
+ bail:
+ return err;
+}
+
+static int fastrpc_release_current_dsp_process(void)
+{
+ int err = 0;
+ struct fastrpc_apps *me = &gfa;
+ struct fastrpc_ioctl_invoke ioctl;
+ remote_arg_t ra[1];
+ int tgid = 0;
+
+ tgid = current->tgid;
+ ra[0].buf.pv = &tgid;
+ ra[0].buf.len = sizeof(tgid);
+ ioctl.handle = 1;
+ ioctl.sc = REMOTE_SCALARS_MAKE(1, 1, 0);
+ ioctl.pra = ra;
+ VERIFY(0 == fastrpc_internal_invoke(me, 1, &ioctl, ra));
+ bail:
+ return err;
+}
+
+static void cleanup_current_dev(void)
+{
+ struct fastrpc_apps *me = &gfa;
+ uint32_t h = hash_32(current->tgid, RPC_HASH_BITS);
+ struct hlist_head *head;
+ struct hlist_node *pos;
+ struct fastrpc_device *dev;
+
+ rnext:
+ dev = 0;
+ spin_lock(&me->hlock);
+ head = &me->htbl[h];
+ hlist_for_each_entry(dev, pos, head, hn) {
+ if (dev->tgid == current->tgid) {
+ hlist_del(&dev->hn);
+ break;
+ }
+ }
+ spin_unlock(&me->hlock);
+ if (dev) {
+ free_dev(dev);
+ goto rnext;
+ }
+ return;
+}
+
+static int fastrpc_device_release(struct inode *inode, struct file *file)
+{
+ (void)fastrpc_release_current_dsp_process();
+ cleanup_current_dev();
+ return 0;
+}
+
+static int fastrpc_device_open(struct inode *inode, struct file *filp)
+{
+ int err = 0;
+
+ if (0 != try_module_get(THIS_MODULE)) {
+ /* This call will cause a dev to be created
+ * which will addref this module
+ */
+ VERIFY(0 == fastrpc_create_current_dsp_process());
+ bail:
+ if (err)
+ cleanup_current_dev();
+ module_put(THIS_MODULE);
+ }
+ return err;
+}
+
+
+static long fastrpc_device_ioctl(struct file *file, unsigned int ioctl_num,
+ unsigned long ioctl_param)
+{
+ struct fastrpc_apps *me = &gfa;
+ struct fastrpc_ioctl_invoke invoke;
+ remote_arg_t *pra = 0;
+ void *param = (char *)ioctl_param;
+ int bufs, err = 0;
+
+ switch (ioctl_num) {
+ case FASTRPC_IOCTL_INVOKE:
+ VERIFY(0 == copy_from_user(&invoke, param, sizeof(invoke)));
+ bufs = REMOTE_SCALARS_INBUFS(invoke.sc) +
+ REMOTE_SCALARS_OUTBUFS(invoke.sc);
+ if (bufs) {
+ bufs = bufs * sizeof(*pra);
+ VERIFY(0 != (pra = kmalloc(bufs, GFP_KERNEL)));
+ }
+ VERIFY(0 == copy_from_user(pra, invoke.pra, bufs));
+ VERIFY(0 == (err = fastrpc_internal_invoke(me, 0, &invoke,
+ pra)));
+ break;
+ default:
+ err = -EINVAL;
+ break;
+ }
+ bail:
+ kfree(pra);
+ return err;
+}
+
+static const struct file_operations fops = {
+ .open = fastrpc_device_open,
+ .release = fastrpc_device_release,
+ .unlocked_ioctl = fastrpc_device_ioctl,
+};
+
+static int __init fastrpc_device_init(void)
+{
+ struct fastrpc_apps *me = &gfa;
+ int err = 0;
+
+ VERIFY(0 == fastrpc_init());
+ VERIFY(0 == alloc_chrdev_region(&me->dev_no, 0, 1, DEVICE_NAME));
+ cdev_init(&me->cdev, &fops);
+ me->cdev.owner = THIS_MODULE;
+ VERIFY(0 == cdev_add(&me->cdev, MKDEV(MAJOR(me->dev_no), 0), 1));
+ pr_info("'mknod /dev/%s c %d 0'\n", DEVICE_NAME, MAJOR(me->dev_no));
+ bail:
+ return err;
+}
+
+static void __exit fastrpc_device_exit(void)
+{
+ struct fastrpc_apps *me = &gfa;
+
+ fastrpc_deinit();
+ cdev_del(&me->cdev);
+ unregister_chrdev_region(me->dev_no, 1);
+}
+
+module_init(fastrpc_device_init);
+module_exit(fastrpc_device_exit);
+
+MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-msm/qdsp6v2/adsprpc.h b/arch/arm/mach-msm/qdsp6v2/adsprpc.h
new file mode 100644
index 0000000..c6c7d23
--- /dev/null
+++ b/arch/arm/mach-msm/qdsp6v2/adsprpc.h
@@ -0,0 +1,106 @@
+/*
+ * Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef ADSPRPC_H
+#define ADSPRPC_H
+
+#include <linux/slab.h>
+#include <linux/completion.h>
+#include <linux/pagemap.h>
+#include <linux/mm.h>
+#include <linux/fs.h>
+#include <linux/sched.h>
+#include <linux/module.h>
+#include <linux/cdev.h>
+#include <linux/list.h>
+#include <linux/hash.h>
+#include <linux/msm_ion.h>
+#include <mach/msm_smd.h>
+#include <mach/ion.h>
+#include "adsprpc_shared.h"
+
+#ifndef ION_ADSPRPC_HEAP_ID
+#define ION_ADSPRPC_HEAP_ID ION_AUDIO_HEAP_ID
+#endif
+
+#define RPC_TIMEOUT (5 * HZ)
+#define RPC_HASH_BITS 5
+#define RPC_HASH_SZ (1 << RPC_HASH_BITS)
+
+#define ALIGN_8(a) ALIGN(a, 8)
+
+#define LOCK_MMAP(kernel)\
+ do {\
+ if (!kernel)\
+ down_read(¤t->mm->mmap_sem);\
+ } while (0)
+
+#define UNLOCK_MMAP(kernel)\
+ do {\
+ if (!kernel)\
+ up_read(¤t->mm->mmap_sem);\
+ } while (0)
+
+
+static inline uint32_t buf_page_start(void *buf)
+{
+ uint32_t start = (uint32_t) buf & PAGE_MASK;
+ return start;
+}
+
+static inline uint32_t buf_page_offset(void *buf)
+{
+ uint32_t offset = (uint32_t) buf & (PAGE_SIZE - 1);
+ return offset;
+}
+
+static inline int buf_num_pages(void *buf, int len)
+{
+ uint32_t start = buf_page_start(buf) >> PAGE_SHIFT;
+ uint32_t end = (((uint32_t) buf + len - 1) & PAGE_MASK) >> PAGE_SHIFT;
+ int nPages = end - start + 1;
+ return nPages;
+}
+
+static inline uint32_t buf_page_size(uint32_t size)
+{
+ uint32_t sz = (size + (PAGE_SIZE - 1)) & PAGE_MASK;
+ return sz > PAGE_SIZE ? sz : PAGE_SIZE;
+}
+
+static inline int buf_get_pages(void *addr, int sz, int nr_pages, int access,
+ struct smq_phy_page *pages, int nr_elems)
+{
+ struct vm_area_struct *vma;
+ uint32_t start = buf_page_start(addr);
+ uint32_t len = nr_pages << PAGE_SHIFT;
+ uint32_t pfn;
+ int n = -1, err = 0;
+
+ VERIFY(0 != access_ok(access ? VERIFY_WRITE : VERIFY_READ,
+ (void __user *)start, len));
+ VERIFY(0 != (vma = find_vma(current->mm, start)));
+ VERIFY(((uint32_t)addr + sz) <= vma->vm_end);
+ n = 0;
+ VERIFY(0 != (vma->vm_flags & VM_PFNMAP));
+ VERIFY(0 != (vma->vm_flags & VM_PFN_AT_MMAP));
+ VERIFY(nr_elems > 0);
+ pfn = vma->vm_pgoff + ((start - vma->vm_start) >> PAGE_SHIFT);
+ pages->addr = __pfn_to_phys(pfn);
+ pages->size = len;
+ n++;
+ bail:
+ return n;
+}
+
+#endif
diff --git a/arch/arm/mach-msm/qdsp6v2/adsprpc_shared.h b/arch/arm/mach-msm/qdsp6v2/adsprpc_shared.h
new file mode 100644
index 0000000..04b1d4a
--- /dev/null
+++ b/arch/arm/mach-msm/qdsp6v2/adsprpc_shared.h
@@ -0,0 +1,147 @@
+/*
+ * Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef ADSPRPC_SHARED_H
+#define ADSPRPC_SHARED_H
+
+#define FASTRPC_IOCTL_INVOKE _IOWR('R', 1, struct fastrpc_ioctl_invoke)
+#define FASTRPC_SMD_GUID "fastrpcsmd-apps-dsp"
+#define DEVICE_NAME "adsprpc-smd"
+
+/* Retrives number of input buffers from the scalars parameter */
+#define REMOTE_SCALARS_INBUFS(sc) (((sc) >> 16) & 0x0ff)
+
+/* Retrives number of output buffers from the scalars parameter */
+#define REMOTE_SCALARS_OUTBUFS(sc) (((sc) >> 8) & 0x0ff)
+
+/* Retrives number of input handles from the scalars parameter */
+#define REMOTE_SCALARS_INHANDLES(sc) (((sc) >> 4) & 0x0f)
+
+/* Retrives number of output handles from the scalars parameter */
+#define REMOTE_SCALARS_OUTHANDLES(sc) ((sc) & 0x0f)
+
+#define REMOTE_SCALARS_LENGTH(sc) (REMOTE_SCALARS_INBUFS(sc) +\
+ REMOTE_SCALARS_OUTBUFS(sc) +\
+ REMOTE_SCALARS_INHANDLES(sc) +\
+ REMOTE_SCALARS_OUTHANDLES(sc))
+
+#define REMOTE_SCALARS_MAKEX(attr, method, in, out, oin, oout) \
+ ((((uint32_t) (attr) & 0x7) << 29) | \
+ (((uint32_t) (method) & 0x1f) << 24) | \
+ (((uint32_t) (in) & 0xff) << 16) | \
+ (((uint32_t) (out) & 0xff) << 8) | \
+ (((uint32_t) (oin) & 0x0f) << 4) | \
+ ((uint32_t) (oout) & 0x0f))
+
+#define REMOTE_SCALARS_MAKE(method, in, out) \
+ REMOTE_SCALARS_MAKEX(0, method, in, out, 0, 0)
+
+
+#ifndef VERIFY_PRINT_ERROR
+#define VERIFY_EPRINTF(format, args) (void)0
+#endif
+
+#ifndef VERIFY_PRINT_INFO
+#define VERIFY_IPRINTF(args) (void)0
+#endif
+
+#ifndef VERIFY
+#define __STR__(x) #x ":"
+#define __TOSTR__(x) __STR__(x)
+#define __FILE_LINE__ __FILE__ ":" __TOSTR__(__LINE__)
+
+#define VERIFY(val) \
+do {\
+ VERIFY_IPRINTF(__FILE_LINE__"info: calling: " #val "\n");\
+ if (0 == (val)) {\
+ err = err == 0 ? -1 : err;\
+ VERIFY_EPRINTF(__FILE_LINE__"error: %d: " #val "\n", err);\
+ goto bail;\
+ } else {\
+ VERIFY_IPRINTF(__FILE_LINE__"info: passed: " #val "\n");\
+ } \
+} while (0)
+#endif
+
+#define remote_handle_t uint32_t
+#define remote_arg_t union remote_arg
+
+struct remote_buf {
+ void *pv; /* buffer pointer */
+ int len; /* length of buffer */
+};
+
+union remote_arg {
+ struct remote_buf buf; /* buffer info */
+ remote_handle_t h; /* remote handle */
+};
+
+struct fastrpc_ioctl_invoke {
+ remote_handle_t handle; /* remote handle */
+ uint32_t sc; /* scalars describing the data */
+ remote_arg_t *pra; /* remote arguments list */
+};
+
+struct smq_null_invoke {
+ struct smq_invoke_ctx *ctx; /* invoke caller context */
+ remote_handle_t handle; /* handle to invoke */
+ uint32_t sc; /* scalars structure describing the data */
+};
+
+struct smq_phy_page {
+ uint32_t addr; /* physical address */
+ uint32_t size; /* size of contiguous region */
+};
+
+struct smq_invoke_buf {
+ int num; /* number of contiguous regions */
+ int pgidx; /* index to start of contiguous region */
+};
+
+struct smq_invoke {
+ struct smq_null_invoke header;
+ struct smq_phy_page page; /* remote arg and list of pages address */
+};
+
+struct smq_msg {
+ uint32_t pid; /* process group id */
+ uint32_t tid; /* thread id */
+ struct smq_invoke invoke;
+};
+
+struct smq_invoke_rsp {
+ struct smq_invoke_ctx *ctx; /* invoke caller context */
+ int retval; /* invoke return value */
+};
+
+static inline struct smq_invoke_buf *smq_invoke_buf_start(remote_arg_t *pra,
+ uint32_t sc)
+{
+ int len = REMOTE_SCALARS_LENGTH(sc);
+ return (struct smq_invoke_buf *)(&pra[len]);
+}
+
+static inline struct smq_phy_page *smq_phy_page_start(uint32_t sc,
+ struct smq_invoke_buf *buf)
+{
+ int nTotal = REMOTE_SCALARS_INBUFS(sc) + REMOTE_SCALARS_OUTBUFS(sc);
+ return (struct smq_phy_page *)(&buf[nTotal]);
+}
+
+static inline int smq_invoke_buf_size(uint32_t sc, int nPages)
+{
+ struct smq_phy_page *start = smq_phy_page_start(sc, 0);
+ return (int)(&(start[nPages]));
+}
+
+#endif
diff --git a/arch/arm/mach-msm/qdsp6v2/audio_acdb.c b/arch/arm/mach-msm/qdsp6v2/audio_acdb.c
index 7298fa1..7272f97 100644
--- a/arch/arm/mach-msm/qdsp6v2/audio_acdb.c
+++ b/arch/arm/mach-msm/qdsp6v2/audio_acdb.c
@@ -662,7 +662,7 @@
}
kvptr = ion_map_kernel(acdb_data.ion_client,
- acdb_data.ion_handle, 0);
+ acdb_data.ion_handle);
if (IS_ERR_OR_NULL(kvptr)) {
pr_err("%s: Could not get kernel virt addr!!!\n", __func__);
result = PTR_ERR(kvptr);
diff --git a/arch/arm/mach-msm/qdsp6v2/audio_lpa.c b/arch/arm/mach-msm/qdsp6v2/audio_lpa.c
index b5a382e..176f364 100644
--- a/arch/arm/mach-msm/qdsp6v2/audio_lpa.c
+++ b/arch/arm/mach-msm/qdsp6v2/audio_lpa.c
@@ -486,7 +486,7 @@
goto flag_error;
}
- temp_ptr = ion_map_kernel(audio->client, handle, ionflag);
+ temp_ptr = ion_map_kernel(audio->client, handle);
if (IS_ERR_OR_NULL(temp_ptr)) {
pr_err("%s: could not get virtual address\n", __func__);
goto map_error;
diff --git a/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.c b/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.c
index a7e34d9..28bf5c6 100644
--- a/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.c
+++ b/arch/arm/mach-msm/qdsp6v2/audio_utils_aio.c
@@ -471,13 +471,20 @@
pr_debug("%s[%p]:\n", __func__, audio);
- mutex_lock(&audio->write_lock);
audio->eos_rsp = 0;
+ pr_debug("%s[%p]Wait for write done from DSP\n", __func__, audio);
rc = wait_event_interruptible(audio->write_wait,
(list_empty(&audio->out_queue)) ||
audio->wflush || audio->stopped);
+ if (audio->stopped || audio->wflush) {
+ pr_debug("%s[%p]: Audio Flushed or Stopped,this is not EOS\n"
+ , __func__, audio);
+ audio->wflush = 0;
+ rc = -EBUSY;
+ }
+
if (rc < 0) {
pr_err("%s[%p]: wait event for list_empty failed, rc = %d\n",
__func__, audio, rc);
@@ -485,11 +492,14 @@
}
rc = q6asm_cmd(audio->ac, CMD_EOS);
+ pr_debug("%s[%p]: EOS cmd sent to DSP\n", __func__, audio);
if (rc < 0)
pr_err("%s[%p]: q6asm_cmd failed, rc = %d",
__func__, audio, rc);
+ pr_debug("%s[%p]: wait for RENDERED_EOS from DSP\n"
+ , __func__, audio);
rc = wait_event_interruptible(audio->write_wait,
(audio->eos_rsp || audio->wflush ||
audio->stopped));
@@ -500,22 +510,18 @@
goto done;
}
- if (audio->eos_rsp == 1) {
- rc = audio_aio_enable(audio);
- if (rc)
- pr_err("%s[%p]: audio enable failed\n",
- __func__, audio);
- else {
- audio->drv_status &= ~ADRV_STATUS_PAUSE;
- audio->enabled = 1;
- }
+ if (audio->stopped || audio->wflush) {
+ audio->wflush = 0;
+ pr_debug("%s[%p]: Audio Flushed or Stopped,this is not EOS\n"
+ , __func__, audio);
+ rc = -EBUSY;
}
- if (audio->stopped || audio->wflush)
- rc = -EBUSY;
+ if (audio->eos_rsp == 1)
+ pr_debug("%s[%p]: EOS\n", __func__, audio);
+
done:
- mutex_unlock(&audio->write_lock);
mutex_lock(&audio->lock);
audio->drv_status &= ~ADRV_STATUS_FSYNC;
mutex_unlock(&audio->lock);
@@ -670,7 +676,7 @@
goto flag_error;
}
- temp_ptr = ion_map_kernel(audio->client, handle, ionflag);
+ temp_ptr = ion_map_kernel(audio->client, handle);
if (IS_ERR_OR_NULL(temp_ptr)) {
pr_err("%s: could not get virtual address\n", __func__);
goto map_error;
@@ -963,7 +969,8 @@
audio->drv_ops.out_flush(audio);
} else
audio->drv_ops.out_flush(audio);
- audio->drv_ops.in_flush(audio);
+ if (audio->feedback == NON_TUNNEL_MODE)
+ audio->drv_ops.in_flush(audio);
}
}
@@ -1050,8 +1057,14 @@
switch (cmd) {
case AUDIO_GET_STATS: {
struct msm_audio_stats stats;
+ uint64_t timestamp;
stats.byte_count = atomic_read(&audio->in_bytes);
stats.sample_count = atomic_read(&audio->in_samples);
+ timestamp = q6asm_get_session_time(audio->ac);
+ if (timestamp >= 0)
+ memcpy(&stats.unused[0], ×tamp, sizeof(timestamp));
+ else
+ pr_debug("Error while getting timestamp\n");
if (copy_to_user((void *)arg, &stats, sizeof(stats)))
rc = -EFAULT;
break;
@@ -1167,7 +1180,11 @@
rc = -EINTR;
} else {
audio->rflush = 0;
- audio->wflush = 0;
+ if (audio->drv_status & ADRV_STATUS_FSYNC)
+ wake_up(&audio->write_wait);
+ else
+ audio->wflush = 0;
+
}
audio->eos_flag = 0;
audio->eos_rsp = 0;
diff --git a/arch/arm/mach-msm/qdsp6v2/lpa_if_hdmi.c b/arch/arm/mach-msm/qdsp6v2/lpa_if_hdmi.c
index c19fd85..63b3064 100644
--- a/arch/arm/mach-msm/qdsp6v2/lpa_if_hdmi.c
+++ b/arch/arm/mach-msm/qdsp6v2/lpa_if_hdmi.c
@@ -26,7 +26,7 @@
#include <mach/msm_hdmi_audio.h>
#include <mach/audio_dma_msm8k.h>
#include <sound/dai.h>
-#include "q6core.h"
+#include <mach/qdsp6v2/q6core.h>
#define DMA_ALLOC_BUF_SZ (SZ_4K * 16)
diff --git a/arch/arm/mach-msm/qdsp6v2/q6core.c b/arch/arm/mach-msm/qdsp6v2/q6core.c
index d7de50e..9dd66e1 100644
--- a/arch/arm/mach-msm/qdsp6v2/q6core.c
+++ b/arch/arm/mach-msm/qdsp6v2/q6core.c
@@ -26,7 +26,7 @@
#include <linux/delay.h>
#include <mach/msm_smd.h>
#include <mach/qdsp6v2/apr.h>
-#include "q6core.h"
+#include <mach/qdsp6v2/q6core.h>
#define TIMEOUT_MS 1000
@@ -79,6 +79,10 @@
bus_bw_resp_received = 1;
wake_up(&bus_bw_req_wait);
break;
+ case ADSP_CMD_SET_DTS_MODEL_ID:
+ pr_debug("ADSP_CMD_SET_DTS_MODEL_ID status[0x%x]\n",
+ payload1[1]);
+ break;
default:
pr_err("Invalid cmd rsp[0x%x][0x%x]\n",
payload1[0], payload1[1]);
@@ -382,6 +386,35 @@
return count;
}
+uint32_t core_set_dts_model_id(uint32_t id_size, uint8_t *id)
+{
+ struct adsp_dts_modelid payload;
+ int rc = 0;
+ pr_debug("core_set_dts_model_id(): Enter\n");
+ core_open();
+ if (core_handle_q) {
+ payload.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
+ APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
+ payload.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(uint32_t)+id_size);
+ payload.hdr.src_port = 0;
+ payload.hdr.dest_port = 0;
+ payload.hdr.token = 0;
+ payload.hdr.opcode = ADSP_CMD_SET_DTS_MODEL_ID;
+ payload.model_ID_size = id_size;
+ memcpy(payload.model_ID, id, id_size+1);
+ pr_debug("Send DTS sec opcode=%x modelID = %s, size=%d\n",
+ payload.hdr.opcode, (char *)payload.model_ID,
+ payload.model_ID_size);
+ rc = apr_send_pkt(core_handle_q, (uint32_t *)&payload);
+ if (rc < 0)
+ pr_err("%s: SET_DTS_DTS_MODEL_ID failed op[0x%x]rc[%d]\n",
+ __func__, payload.hdr.opcode, rc);
+ }
+ pr_debug("core_set_dts_model_id(): Exit\n");
+ return rc;
+}
+
static const struct file_operations apr_debug_fops = {
.write = apr_debug_write,
.open = apr_debug_open,
diff --git a/arch/arm/mach-msm/qdsp6v2/q6voice.c b/arch/arm/mach-msm/qdsp6v2/q6voice.c
index 12a02c5..7464ed7 100644
--- a/arch/arm/mach-msm/qdsp6v2/q6voice.c
+++ b/arch/arm/mach-msm/qdsp6v2/q6voice.c
@@ -30,7 +30,7 @@
#include <mach/qdsp6v2/rtac.h>
#include <mach/qdsp6v2/audio_acdb.h>
-#include "q6core.h"
+#include <mach/qdsp6v2/q6core.h>
#define TIMEOUT_MS 3000
diff --git a/arch/arm/mach-msm/restart.c b/arch/arm/mach-msm/restart.c
index 25723d5..2189747 100644
--- a/arch/arm/mach-msm/restart.c
+++ b/arch/arm/mach-msm/restart.c
@@ -24,8 +24,10 @@
#include <linux/mfd/pmic8058.h>
#include <linux/mfd/pmic8901.h>
#include <linux/mfd/pm8xxx/misc.h>
+#include <linux/qpnp/power-on.h>
#include <asm/mach-types.h>
+#include <asm/cacheflush.h>
#include <mach/msm_iomap.h>
#include <mach/restart.h>
@@ -34,6 +36,7 @@
#include <mach/scm.h>
#include "msm_watchdog.h"
#include "timer.h"
+#include "wdog_debug.h"
#define WDT0_RST 0x38
#define WDT0_EN 0x40
@@ -127,6 +130,7 @@
set_dload_mode(0);
#endif
pm8xxx_reset_pwr_off(0);
+ qpnp_pon_system_pwr_off(0);
if (lower_pshold) {
if (!use_restart_v2())
@@ -207,6 +211,7 @@
#endif
pm8xxx_reset_pwr_off(1);
+ qpnp_pon_system_pwr_off(1);
if (cmd != NULL) {
if (!strncmp(cmd, "bootloader", 10)) {
@@ -221,6 +226,8 @@
__raw_writel(0x77665501, restart_reason);
}
}
+
+ flush_cache_all();
}
void msm_restart(char mode, const char *cmd)
@@ -244,8 +251,11 @@
__raw_writel(5*0x31F3, msm_tmr0_base + WDT0_BARK_TIME);
__raw_writel(0x31F3, msm_tmr0_base + WDT0_BITE_TIME);
__raw_writel(1, msm_tmr0_base + WDT0_EN);
- } else
+ } else {
+ /* Needed for 8974: Reset GCC_WDOG_DEBUG register */
+ msm_disable_wdog_debug();
__raw_writel(0, MSM_MPM2_PSHOLD_BASE);
+ }
mdelay(10000);
printk(KERN_ERR "Restarting has failed\n");
diff --git a/arch/arm/mach-msm/rpm-regulator-8960.c b/arch/arm/mach-msm/rpm-regulator-8960.c
index 8fe3571..c5c01c2 100644
--- a/arch/arm/mach-msm/rpm-regulator-8960.c
+++ b/arch/arm/mach-msm/rpm-regulator-8960.c
@@ -325,3 +325,32 @@
{
return &config;
}
+
+struct vreg_config *get_config_8960_pm8917(void)
+{
+ int i;
+
+ /*
+ * PM8917 regulators L24, L25, L26, L27, and L28 require CXO to be ON
+ * while they are enabled. These same regulators on PM8921 do not
+ * require CXO to be ON. Therefore, set the require_cxo flag for these
+ * regulators only when using PM8917.
+ *
+ * Do not apply the workaround to L24 (VDD_MX) because it is always on
+ * and using the TCXO workaround with it would result in additional
+ * latency during every Krait upscaling event.
+ */
+ for (i = 0; i < ARRAY_SIZE(vregs); i++) {
+ switch (vregs[i].id) {
+ case RPM_VREG_ID_PM8921_L25:
+ case RPM_VREG_ID_PM8921_L26:
+ case RPM_VREG_ID_PM8921_L27:
+ case RPM_VREG_ID_PM8921_L28:
+ vregs[i].requires_cxo = true;
+ default:
+ break;
+ }
+ }
+
+ return &config;
+}
diff --git a/arch/arm/mach-msm/rpm-regulator-private.h b/arch/arm/mach-msm/rpm-regulator-private.h
index d55bd73..703335f 100644
--- a/arch/arm/mach-msm/rpm-regulator-private.h
+++ b/arch/arm/mach-msm/rpm-regulator-private.h
@@ -158,11 +158,16 @@
#if defined(CONFIG_MSM_RPM_REGULATOR) && \
(defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064))
struct vreg_config *get_config_8960(void);
+struct vreg_config *get_config_8960_pm8917(void);
#else
static inline struct vreg_config *get_config_8960(void)
{
return NULL;
}
+static inline struct vreg_config *get_config_8960_pm8917(void)
+{
+ return NULL;
+}
#endif
#if defined(CONFIG_MSM_RPM_REGULATOR) && defined(CONFIG_ARCH_MSM9615)
diff --git a/arch/arm/mach-msm/rpm-regulator-smd.c b/arch/arm/mach-msm/rpm-regulator-smd.c
index a8af9e7..9c621c4 100644
--- a/arch/arm/mach-msm/rpm-regulator-smd.c
+++ b/arch/arm/mach-msm/rpm-regulator-smd.c
@@ -1286,7 +1286,7 @@
}
}
- of_property_read_u32(node, "qcom,system_load", ®->system_load);
+ of_property_read_u32(node, "qcom,system-load", ®->system_load);
rpm_vreg_lock(rpm_vreg);
list_add(®->list, &rpm_vreg->reg_list);
diff --git a/arch/arm/mach-msm/rpm-regulator.c b/arch/arm/mach-msm/rpm-regulator.c
index 424a4fe..01543a2 100644
--- a/arch/arm/mach-msm/rpm-regulator.c
+++ b/arch/arm/mach-msm/rpm-regulator.c
@@ -63,6 +63,7 @@
[RPM_VREG_VERSION_9615] = get_config_9615,
[RPM_VREG_VERSION_8930] = get_config_8930,
[RPM_VREG_VERSION_8930_PM8917] = get_config_8930_pm8917,
+ [RPM_VREG_VERSION_8960_PM8917] = get_config_8960_pm8917,
};
static struct rpm_regulator_consumer_mapping *consumer_map;
diff --git a/arch/arm/mach-msm/rpm-smd.c b/arch/arm/mach-msm/rpm-smd.c
index a190342..7c31e76 100644
--- a/arch/arm/mach-msm/rpm-smd.c
+++ b/arch/arm/mach-msm/rpm-smd.c
@@ -149,8 +149,6 @@
uint32_t id_ack;
};
-static int irq_process;
-
LIST_HEAD(msm_rpm_ack_list);
static void msm_rpm_notify_sleep_chain(struct rpm_message_header *hdr,
@@ -289,9 +287,10 @@
if (!handle)
return;
- for (i = 0; i < handle->write_idx; i++)
+ for (i = 0; i < handle->num_elements; i++)
kfree(handle->kvp[i].value);
kfree(handle->kvp);
+ kfree(handle->buf);
kfree(handle);
}
EXPORT_SYMBOL(msm_rpm_free_request);
@@ -517,20 +516,18 @@
uint32_t msg_id;
int errno;
char buf[MAX_ERR_BUFFER_SIZE] = {0};
- unsigned long flags;
- while (smd_is_pkt_avail(msm_rpm_data.ch_info) && !irq_process) {
- spin_lock_irqsave(&msm_rpm_data.smd_lock_read, flags);
+ if (!spin_trylock(&msm_rpm_data.smd_lock_read))
+ return;
+ while (smd_is_pkt_avail(msm_rpm_data.ch_info)) {
if (msm_rpm_read_smd_data(buf)) {
- spin_unlock_irqrestore(&msm_rpm_data.smd_lock_read,
- flags);
break;
}
msg_id = msm_rpm_get_msg_id_from_ack(buf);
errno = msm_rpm_get_error_from_ack(buf);
msm_rpm_process_ack(msg_id, errno);
- spin_unlock_irqrestore(&msm_rpm_data.smd_lock_read, flags);
}
+ spin_unlock(&msm_rpm_data.smd_lock_read);
}
#define DEBUG_PRINT_BUFFER_SIZE 512
@@ -782,7 +779,14 @@
int msm_rpm_send_request(struct msm_rpm_request *handle)
{
- return msm_rpm_send_data(handle, MSM_RPM_MSG_REQUEST_TYPE, false);
+ int ret;
+ static DEFINE_MUTEX(send_mtx);
+
+ mutex_lock(&send_mtx);
+ ret = msm_rpm_send_data(handle, MSM_RPM_MSG_REQUEST_TYPE, false);
+ mutex_unlock(&send_mtx);
+
+ return ret;
}
EXPORT_SYMBOL(msm_rpm_send_request);
@@ -836,7 +840,6 @@
return 0;
spin_lock_irqsave(&msm_rpm_data.smd_lock_read, flags);
- irq_process = true;
elem = msm_rpm_get_entry_from_msg_id(msg_id);
@@ -867,7 +870,6 @@
rc = elem->errno;
msm_rpm_free_list_entry(elem);
wait_ack_cleanup:
- irq_process = false;
spin_unlock_irqrestore(&msm_rpm_data.smd_lock_read, flags);
return rc;
}
diff --git a/arch/arm/mach-msm/rpm_resources.c b/arch/arm/mach-msm/rpm_resources.c
index 9d794e7..dfed3aa 100644
--- a/arch/arm/mach-msm/rpm_resources.c
+++ b/arch/arm/mach-msm/rpm_resources.c
@@ -20,6 +20,7 @@
#include <linux/proc_fs.h>
#include <linux/spinlock.h>
#include <linux/cpu.h>
+#include <linux/hrtimer.h>
#include <mach/rpm.h>
#include <mach/msm_iomap.h>
#include <asm/mach-types.h>
@@ -37,6 +38,7 @@
enum {
MSM_RPMRS_DEBUG_OUTPUT = BIT(0),
MSM_RPMRS_DEBUG_BUFFER = BIT(1),
+ MSM_RPMRS_DEBUG_EVENT_TIMER = BIT(2),
};
static int msm_rpmrs_debug_mask;
@@ -891,8 +893,8 @@
}
static void *msm_rpmrs_lowest_limits(bool from_idle,
- enum msm_pm_sleep_mode sleep_mode, uint32_t latency_us,
- uint32_t sleep_us, uint32_t *power)
+ enum msm_pm_sleep_mode sleep_mode,
+ struct msm_pm_time_params *time_param, uint32_t *power)
{
unsigned int cpu = smp_processor_id();
struct msm_rpmrs_level *best_level = NULL;
@@ -900,6 +902,8 @@
bool gpio_detectable = false;
int i;
uint32_t pwr;
+ uint32_t next_wakeup_us = time_param->sleep_us;
+ bool modify_event_timer;
if (sleep_mode == MSM_PM_SLEEP_MODE_POWER_COLLAPSE) {
irqs_detectable = msm_mpm_irqs_detectable(from_idle);
@@ -909,38 +913,54 @@
for (i = 0; i < msm_rpmrs_level_count; i++) {
struct msm_rpmrs_level *level = &msm_rpmrs_levels[i];
+ modify_event_timer = false;
+
if (!level->available)
continue;
if (sleep_mode != level->sleep_mode)
continue;
- if (latency_us < level->latency_us)
+ if (time_param->latency_us < level->latency_us)
continue;
- if (sleep_us <= level->time_overhead_us)
+ if (time_param->next_event_us &&
+ time_param->next_event_us < level->latency_us)
+ continue;
+
+ if (time_param->next_event_us) {
+ if ((time_param->next_event_us < time_param->sleep_us)
+ || ((time_param->next_event_us - level->latency_us) <
+ time_param->sleep_us)) {
+ modify_event_timer = true;
+ next_wakeup_us = time_param->next_event_us -
+ level->latency_us;
+ }
+ }
+
+ if (next_wakeup_us <= level->time_overhead_us)
continue;
if (!msm_rpmrs_irqs_detectable(&level->rs_limits,
irqs_detectable, gpio_detectable))
continue;
- if (MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE == sleep_mode)
+ if ((MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE == sleep_mode)
+ || (MSM_PM_SLEEP_MODE_POWER_COLLAPSE == sleep_mode))
if (!cpu && msm_rpm_local_request_is_outstanding())
break;
-
- if (sleep_us <= 1) {
+ if (next_wakeup_us <= 1) {
pwr = level->energy_overhead;
- } else if (sleep_us <= level->time_overhead_us) {
- pwr = level->energy_overhead / sleep_us;
- } else if ((sleep_us >> 10) > level->time_overhead_us) {
+ } else if (next_wakeup_us <= level->time_overhead_us) {
+ pwr = level->energy_overhead / next_wakeup_us;
+ } else if ((next_wakeup_us >> 10) > level->time_overhead_us) {
pwr = level->steady_state_power;
} else {
pwr = level->steady_state_power;
pwr -= (level->time_overhead_us *
- level->steady_state_power)/sleep_us;
- pwr += level->energy_overhead / sleep_us;
+ level->steady_state_power)/next_wakeup_us;
+ pwr += level->energy_overhead / next_wakeup_us;
}
if (!best_level ||
@@ -950,6 +970,12 @@
best_level = level;
if (power)
*power = pwr;
+ if (modify_event_timer && best_level->latency_us > 1)
+ time_param->modified_time_us =
+ time_param->next_event_us -
+ best_level->latency_us;
+ else
+ time_param->modified_time_us = 0;
}
}
@@ -1106,7 +1132,8 @@
static int __init msm_rpmrs_l2_init(void)
{
if (cpu_is_msm8960() || cpu_is_msm8930() || cpu_is_msm8930aa() ||
- cpu_is_apq8064() || cpu_is_msm8627() || cpu_is_msm8960ab()) {
+ cpu_is_apq8064() || cpu_is_msm8627() || cpu_is_msm8960ab() ||
+ cpu_is_apq8064ab()) {
msm_pm_set_l2_flush_flag(0);
diff --git a/arch/arm/mach-msm/scm-pas.h b/arch/arm/mach-msm/scm-pas.h
index dd24e20..8da1d75 100644
--- a/arch/arm/mach-msm/scm-pas.h
+++ b/arch/arm/mach-msm/scm-pas.h
@@ -25,8 +25,29 @@
PAS_VIDC,
};
+#ifdef CONFIG_MSM_PIL
extern int pas_init_image(enum pas_id id, const u8 *metadata, size_t size);
extern int pas_auth_and_reset(enum pas_id id);
extern int pas_shutdown(enum pas_id id);
extern int pas_supported(enum pas_id id);
+#else
+static inline int pas_init_image(enum pas_id id, const u8 *metadata,
+ size_t size)
+{
+ return 0;
+}
+static inline int pas_auth_and_reset(enum pas_id id)
+{
+ return 0;
+}
+static inline int pas_shutdown(enum pas_id id)
+{
+ return 0;
+}
+static inline int pas_supported(enum pas_id id)
+{
+ return 0;
+}
+#endif
+
#endif
diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
index e33f87b..c1e2421 100644
--- a/arch/arm/mach-msm/smd.c
+++ b/arch/arm/mach-msm/smd.c
@@ -35,6 +35,7 @@
#include <linux/wakelock.h>
#include <linux/notifier.h>
#include <linux/sort.h>
+#include <linux/suspend.h>
#include <mach/msm_smd.h>
#include <mach/msm_iomap.h>
#include <mach/system.h>
@@ -553,6 +554,26 @@
}
}
+static int smsm_pm_notifier(struct notifier_block *nb,
+ unsigned long event, void *unused)
+{
+ switch (event) {
+ case PM_SUSPEND_PREPARE:
+ smsm_change_state(SMSM_APPS_STATE, SMSM_PROC_AWAKE, 0);
+ break;
+
+ case PM_POST_SUSPEND:
+ smsm_change_state(SMSM_APPS_STATE, 0, SMSM_PROC_AWAKE);
+ break;
+ }
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block smsm_pm_nb = {
+ .notifier_call = smsm_pm_notifier,
+ .priority = 0,
+};
+
void smd_diag(void)
{
char *x;
@@ -2545,6 +2566,12 @@
return i;
wmb();
+
+ smsm_pm_notifier(&smsm_pm_nb, PM_POST_SUSPEND, NULL);
+ i = register_pm_notifier(&smsm_pm_nb);
+ if (i)
+ pr_err("%s: power state notif error %d\n", __func__, i);
+
return 0;
}
@@ -3513,9 +3540,10 @@
static struct restart_notifier_block restart_notifiers[] = {
{SMD_MODEM, "modem", .nb.notifier_call = restart_notifier_cb},
{SMD_Q6, "lpass", .nb.notifier_call = restart_notifier_cb},
- {SMD_WCNSS, "riva", .nb.notifier_call = restart_notifier_cb},
+ {SMD_WCNSS, "wcnss", .nb.notifier_call = restart_notifier_cb},
{SMD_DSPS, "dsps", .nb.notifier_call = restart_notifier_cb},
{SMD_MODEM, "gss", .nb.notifier_call = restart_notifier_cb},
+ {SMD_Q6, "adsp", .nb.notifier_call = restart_notifier_cb},
};
static int restart_notifier_cb(struct notifier_block *this,
diff --git a/arch/arm/mach-msm/smd_pkt.c b/arch/arm/mach-msm/smd_pkt.c
index 5962d71..928e59b 100644
--- a/arch/arm/mach-msm/smd_pkt.c
+++ b/arch/arm/mach-msm/smd_pkt.c
@@ -35,6 +35,7 @@
#include <mach/msm_smd.h>
#include <mach/peripheral-loader.h>
+#include <mach/msm_ipc_logging.h>
#include "smd_private.h"
#ifdef CONFIG_ARCH_FSM9XXX
@@ -65,6 +66,7 @@
wait_queue_head_t ch_opened_wait_queue;
int i;
+ int ref_cnt;
int blocking_write;
int is_open;
@@ -88,6 +90,9 @@
static void check_and_wakeup_writer(struct smd_pkt_dev *smd_pkt_devp);
static uint32_t is_modem_smsm_inited(void);
+#define SMD_PKT_IPC_LOG_PAGE_CNT 2
+static void *smd_pkt_ilctxt;
+
static int msm_smd_pkt_debug_mask;
module_param_named(debug_mask, msm_smd_pkt_debug_mask,
int, S_IRUGO | S_IWUSR | S_IWGRP);
@@ -104,22 +109,44 @@
#define DEBUG
#ifdef DEBUG
+
+#define SMD_PKT_LOG_STRING(x...) \
+do { \
+ if (smd_pkt_ilctxt) \
+ ipc_log_string(smd_pkt_ilctxt, "<SMD_PKT>: "x); \
+} while (0)
+
+#define SMD_PKT_LOG_BUF(buf, cnt) \
+do { \
+ char log_buf[128]; \
+ int i; \
+ if (smd_pkt_ilctxt) { \
+ i = cnt < 16 ? cnt : 16; \
+ hex_dump_to_buffer(buf, i, 16, 1, log_buf, \
+ sizeof(log_buf), false); \
+ ipc_log_string(smd_pkt_ilctxt, "<SMD_PKT>: %s", log_buf); \
+ } \
+} while (0)
+
#define D_STATUS(x...) \
do { \
if (msm_smd_pkt_debug_mask & SMD_PKT_STATUS) \
pr_info("Status: "x); \
+ SMD_PKT_LOG_STRING(x); \
} while (0)
#define D_READ(x...) \
do { \
if (msm_smd_pkt_debug_mask & SMD_PKT_READ) \
pr_info("Read: "x); \
+ SMD_PKT_LOG_STRING(x); \
} while (0)
#define D_WRITE(x...) \
do { \
if (msm_smd_pkt_debug_mask & SMD_PKT_WRITE) \
pr_info("Write: "x); \
+ SMD_PKT_LOG_STRING(x); \
} while (0)
#define D_READ_DUMP_BUFFER(prestr, cnt, buf) \
@@ -128,6 +155,7 @@
print_hex_dump(KERN_INFO, prestr, \
DUMP_PREFIX_NONE, 16, 1, \
buf, cnt, 1); \
+ SMD_PKT_LOG_BUF(buf, cnt); \
} while (0)
#define D_WRITE_DUMP_BUFFER(prestr, cnt, buf) \
@@ -136,12 +164,14 @@
print_hex_dump(KERN_INFO, prestr, \
DUMP_PREFIX_NONE, 16, 1, \
buf, cnt, 1); \
+ SMD_PKT_LOG_BUF(buf, cnt); \
} while (0)
#define D_POLL(x...) \
do { \
if (msm_smd_pkt_debug_mask & SMD_PKT_POLL) \
pr_info("Poll: "x); \
+ SMD_PKT_LOG_STRING(x); \
} while (0)
#define E_SMD_PKT_SSR(x) \
@@ -270,6 +300,7 @@
if (!smd_pkt_devp)
return -EINVAL;
+ mutex_lock(&smd_pkt_devp->ch_lock);
switch (cmd) {
case TIOCMGET:
D_STATUS("%s TIOCMGET command on smd_pkt_dev id:%d\n",
@@ -288,6 +319,7 @@
pr_err("%s: Unrecognized ioctl command %d\n", __func__, cmd);
ret = -1;
}
+ mutex_unlock(&smd_pkt_devp->ch_lock);
return ret;
}
@@ -867,9 +899,12 @@
smd_pkt_devp->ch_size =
smd_write_avail(smd_pkt_devp->ch);
r = 0;
+ smd_pkt_devp->ref_cnt++;
D_STATUS("Finished %s on smd_pkt_dev id:%d\n",
__func__, smd_pkt_devp->i);
}
+ } else {
+ smd_pkt_devp->ref_cnt++;
}
release_pil:
if (peripheral && (r < 0))
@@ -902,12 +937,14 @@
D_STATUS("Begin %s on smd_pkt_dev id:%d\n",
__func__, smd_pkt_devp->i);
- clean_and_signal(smd_pkt_devp);
-
mutex_lock(&smd_pkt_devp->ch_lock);
mutex_lock(&smd_pkt_devp->rx_lock);
mutex_lock(&smd_pkt_devp->tx_lock);
- if (smd_pkt_devp->ch != 0) {
+ if (smd_pkt_devp->ref_cnt > 0)
+ smd_pkt_devp->ref_cnt--;
+
+ if (smd_pkt_devp->ch != 0 && smd_pkt_devp->ref_cnt == 0) {
+ clean_and_signal(smd_pkt_devp);
r = smd_close(smd_pkt_devp->ch);
smd_pkt_devp->ch = 0;
smd_pkt_devp->blocking_write = 0;
@@ -916,15 +953,15 @@
smd_pkt_devp->driver.probe = NULL;
if (smd_pkt_devp->pil)
pil_put(smd_pkt_devp->pil);
+ smd_pkt_devp->has_reset = 0;
+ smd_pkt_devp->do_reset_notification = 0;
+ smd_pkt_devp->wakelock_locked = 0;
+ wake_lock_destroy(&smd_pkt_devp->pa_wake_lock);
}
mutex_unlock(&smd_pkt_devp->tx_lock);
mutex_unlock(&smd_pkt_devp->rx_lock);
mutex_unlock(&smd_pkt_devp->ch_lock);
- smd_pkt_devp->has_reset = 0;
- smd_pkt_devp->do_reset_notification = 0;
- smd_pkt_devp->wakelock_locked = 0;
- wake_lock_destroy(&smd_pkt_devp->pa_wake_lock);
D_STATUS("Finished %s on smd_pkt_dev id:%d\n",
__func__, smd_pkt_devp->i);
@@ -1024,6 +1061,9 @@
INIT_DELAYED_WORK(&loopback_work, loopback_probe_worker);
+ smd_pkt_ilctxt = ipc_log_context_create(SMD_PKT_IPC_LOG_PAGE_CNT,
+ "smd_pkt");
+
D_STATUS("SMD Packet Port Driver Initialized.\n");
return 0;
diff --git a/arch/arm/mach-msm/smd_rpcrouter.c b/arch/arm/mach-msm/smd_rpcrouter.c
index 983d0c1..68c3dd3 100644
--- a/arch/arm/mach-msm/smd_rpcrouter.c
+++ b/arch/arm/mach-msm/smd_rpcrouter.c
@@ -2421,6 +2421,7 @@
{
struct rpcrouter_xprt_info *xprt_info;
struct rpcrouter_xprt_work *xprt_work;
+ unsigned long flags;
/* Workqueue is created in init function which works for all existing
* clients. If this fails in the future, then it will need to be
@@ -2452,11 +2453,13 @@
xprt_info = xprt->priv;
if (xprt_info) {
+ spin_lock_irqsave(&xprt_info->lock, flags);
/* Check read_avail even for OPEN event to handle missed
DATA events while processing the OPEN event*/
if (xprt->read_avail() >= xprt_info->need_len)
wake_lock(&xprt_info->wakelock);
wake_up(&xprt_info->read_wait);
+ spin_unlock_irqrestore(&xprt_info->lock, flags);
}
}
diff --git a/arch/arm/mach-msm/socinfo.c b/arch/arm/mach-msm/socinfo.c
index 86de130..ac077e9 100644
--- a/arch/arm/mach-msm/socinfo.c
+++ b/arch/arm/mach-msm/socinfo.c
@@ -286,6 +286,9 @@
/* 8092 IDs */
[146] = MSM_CPU_8092,
+ /* 8064AB IDs */
+ [153] = MSM_CPU_8064AB,
+
/* Uninitialized IDs are not known to run Linux.
MSM_CPU_UNKNOWN is set to 0 to ensure these IDs are
considered as unknown CPU. */
diff --git a/arch/arm/mach-msm/spm-v2.c b/arch/arm/mach-msm/spm-v2.c
index 26dfdff..f0d3d06 100644
--- a/arch/arm/mach-msm/spm-v2.c
+++ b/arch/arm/mach-msm/spm-v2.c
@@ -179,7 +179,7 @@
}
}
-static inline uint32_t msm_spm_drv_get_sts_curr_pmic_data(
+uint32_t msm_spm_drv_get_sts_curr_pmic_data(
struct msm_spm_driver_data *dev)
{
if (dev->major == SAW2_MAJOR_2) {
@@ -310,9 +310,43 @@
return 0;
}
+#ifdef CONFIG_MSM_AVS_HW
+static void msm_spm_drv_disable_avs(struct msm_spm_driver_data *dev)
+{
+ msm_spm_drv_load_shadow(dev, MSM_SPM_REG_SAW2_AVS_CTL);
+ dev->reg_shadow[MSM_SPM_REG_SAW2_AVS_CTL] &= ~BIT(27);
+ msm_spm_drv_flush_shadow(dev, MSM_SPM_REG_SAW2_AVS_CTL);
+}
+
+static void msm_spm_drv_enable_avs(struct msm_spm_driver_data *dev)
+{
+ dev->reg_shadow[MSM_SPM_REG_SAW2_AVS_CTL] |= BIT(27);
+ msm_spm_drv_flush_shadow(dev, MSM_SPM_REG_SAW2_AVS_CTL);
+}
+
+static void msm_spm_drv_set_avs_vlevel(struct msm_spm_driver_data *dev,
+ unsigned int vlevel)
+{
+ vlevel &= 0x3f;
+ dev->reg_shadow[MSM_SPM_REG_SAW2_AVS_CTL] &= ~0x7efc00;
+ dev->reg_shadow[MSM_SPM_REG_SAW2_AVS_CTL] |= ((vlevel - 4) << 10);
+ dev->reg_shadow[MSM_SPM_REG_SAW2_AVS_CTL] |= (vlevel << 17);
+ msm_spm_drv_flush_shadow(dev, MSM_SPM_REG_SAW2_AVS_CTL);
+}
+
+#else
+
+static void msm_spm_drv_disable_avs(struct msm_spm_driver_data *dev) { }
+
+static void msm_spm_drv_enable_avs(struct msm_spm_driver_data *dev) { }
+
+static void msm_spm_drv_set_avs_vlevel(struct msm_spm_driver_data *dev,
+ unsigned int vlevel) { }
+#endif
+
int msm_spm_drv_set_vdd(struct msm_spm_driver_data *dev, unsigned int vlevel)
{
- uint32_t timeout_us;
+ uint32_t timeout_us, new_level;
if (!dev)
return -EINVAL;
@@ -321,42 +355,46 @@
return -ENOSYS;
if (msm_spm_debug_mask & MSM_SPM_DEBUG_VCTL)
- pr_info("%s: requesting vlevel 0x%x\n",
- __func__, vlevel);
+ pr_info("%s: requesting vlevel %#x\n", __func__, vlevel);
+
+ msm_spm_drv_disable_avs(dev);
+
+ /* Kick the state machine back to idle */
+ dev->reg_shadow[MSM_SPM_REG_SAW2_RST] = 1;
+ msm_spm_drv_flush_shadow(dev, MSM_SPM_REG_SAW2_RST);
msm_spm_drv_apcs_set_vctl(dev, vlevel);
msm_spm_drv_flush_shadow(dev, MSM_SPM_REG_SAW2_VCTL);
msm_spm_drv_flush_shadow(dev, MSM_SPM_REG_SAW2_PMIC_DATA_0);
msm_spm_drv_flush_shadow(dev, MSM_SPM_REG_SAW2_PMIC_DATA_1);
- mb();
- /* Wait for PMIC state to return to idle or until timeout */
timeout_us = dev->vctl_timeout_us;
- while (msm_spm_drv_get_sts_pmic_state(dev) != MSM_SPM_PMIC_STATE_IDLE) {
- if (!timeout_us)
- goto set_vdd_bail;
-
- if (timeout_us > 10) {
- udelay(10);
- timeout_us -= 10;
- } else {
- udelay(timeout_us);
- timeout_us = 0;
- }
+ /* Confirm the voltage we set was what hardware sent */
+ do {
+ new_level = msm_spm_drv_get_sts_curr_pmic_data(dev);
+ if (new_level == vlevel)
+ break;
+ udelay(1);
+ } while (--timeout_us);
+ if (!timeout_us) {
+ pr_info("Wrong level %#x\n", new_level);
+ goto set_vdd_bail;
}
- if (msm_spm_drv_get_sts_curr_pmic_data(dev) != vlevel)
- goto set_vdd_bail;
+ /* Set AVS min/max */
+ msm_spm_drv_set_avs_vlevel(dev, vlevel);
if (msm_spm_debug_mask & MSM_SPM_DEBUG_VCTL)
pr_info("%s: done, remaining timeout %uus\n",
__func__, timeout_us);
+ msm_spm_drv_enable_avs(dev);
return 0;
set_vdd_bail:
- pr_err("%s: failed, remaining timeout %uus, vlevel 0x%x\n",
- __func__, timeout_us, msm_spm_drv_get_sts_curr_pmic_data(dev));
+ msm_spm_drv_enable_avs(dev);
+ pr_err("%s: failed %#x, remaining timeout %uus, vlevel %#x\n",
+ __func__, vlevel, timeout_us, new_level);
return -EIO;
}
diff --git a/arch/arm/mach-msm/spm.h b/arch/arm/mach-msm/spm.h
index e81e335..09ee26a 100644
--- a/arch/arm/mach-msm/spm.h
+++ b/arch/arm/mach-msm/spm.h
@@ -141,6 +141,13 @@
int msm_spm_set_vdd(unsigned int cpu, unsigned int vlevel);
/**
+ * msm_spm_get_vdd(): Get core voltage
+ * @cpu: core id
+ * @return: Returns encoded PMIC data.
+ */
+unsigned int msm_spm_get_vdd(unsigned int cpu);
+
+/**
* msm_spm_turn_on_cpu_rail(): Power on cpu rail before turning on core
* @cpu: core id
*/
@@ -239,6 +246,11 @@
return -ENOSYS;
}
+static inline unsigned int msm_spm_get_vdd(unsigned int cpu)
+{
+ return 0;
+}
+
static inline void msm_spm_reinit(void)
{
/* empty */
diff --git a/arch/arm/mach-msm/spm_devices.c b/arch/arm/mach-msm/spm_devices.c
index 05d11d2..2cbed94 100644
--- a/arch/arm/mach-msm/spm_devices.c
+++ b/arch/arm/mach-msm/spm_devices.c
@@ -38,21 +38,52 @@
uint32_t num_modes;
};
+struct msm_spm_vdd_info {
+ uint32_t cpu;
+ uint32_t vlevel;
+ int err;
+};
+
static struct msm_spm_device msm_spm_l2_device;
static DEFINE_PER_CPU_SHARED_ALIGNED(struct msm_spm_device, msm_cpu_spm_device);
-int msm_spm_set_vdd(unsigned int cpu, unsigned int vlevel)
+
+/* Must be called on the same cpu as the one being set to */
+static void msm_spm_smp_set_vdd(void *data)
{
struct msm_spm_device *dev;
- int ret = -EIO;
+ struct msm_spm_vdd_info *info = (struct msm_spm_vdd_info *)data;
- dev = &per_cpu(msm_cpu_spm_device, cpu);
- ret = msm_spm_drv_set_vdd(&dev->reg_data, vlevel);
+ dev = &per_cpu(msm_cpu_spm_device, info->cpu);
+ info->err = msm_spm_drv_set_vdd(&dev->reg_data, info->vlevel);
+}
+
+int msm_spm_set_vdd(unsigned int cpu, unsigned int vlevel)
+{
+ struct msm_spm_vdd_info info;
+ int ret;
+
+ info.cpu = cpu;
+ info.vlevel = vlevel;
+
+ /* Set to true to block on vdd change */
+ ret = smp_call_function_single(cpu, msm_spm_smp_set_vdd, &info, true);
+ if (!ret)
+ ret = info.err;
return ret;
}
EXPORT_SYMBOL(msm_spm_set_vdd);
+unsigned int msm_spm_get_vdd(unsigned int cpu)
+{
+ struct msm_spm_device *dev;
+
+ dev = &per_cpu(msm_cpu_spm_device, cpu);
+ return msm_spm_drv_get_sts_curr_pmic_data(&dev->reg_data);
+}
+EXPORT_SYMBOL(msm_spm_get_vdd);
+
static int msm_spm_dev_set_low_power_mode(struct msm_spm_device *dev,
unsigned int mode, bool notify_rpm)
{
@@ -137,7 +168,8 @@
reg = saw_bases[cpu];
if (cpu_is_msm8960() || cpu_is_msm8930() || cpu_is_msm8930aa() ||
- cpu_is_apq8064() || cpu_is_msm8627() || cpu_is_msm8960ab()) {
+ cpu_is_apq8064() || cpu_is_msm8627() || cpu_is_msm8960ab() ||
+ cpu_is_apq8064ab()) {
val = 0xA4;
reg += 0x14;
timeout = 512;
diff --git a/arch/arm/mach-msm/spm_driver.h b/arch/arm/mach-msm/spm_driver.h
index f272adb..4cdfd33 100644
--- a/arch/arm/mach-msm/spm_driver.h
+++ b/arch/arm/mach-msm/spm_driver.h
@@ -35,6 +35,8 @@
uint32_t addr);
int msm_spm_drv_set_vdd(struct msm_spm_driver_data *dev,
unsigned int vlevel);
+uint32_t msm_spm_drv_get_sts_curr_pmic_data(
+ struct msm_spm_driver_data *dev);
int msm_spm_drv_write_seq_data(struct msm_spm_driver_data *dev,
uint8_t *cmd, uint32_t *offset);
void msm_spm_drv_flush_seq_entry(struct msm_spm_driver_data *dev);
diff --git a/arch/arm/mach-msm/subsystem_restart.c b/arch/arm/mach-msm/subsystem_restart.c
index 0318a70..bae1ab0 100644
--- a/arch/arm/mach-msm/subsystem_restart.c
+++ b/arch/arm/mach-msm/subsystem_restart.c
@@ -58,11 +58,13 @@
enum subsys_state {
SUBSYS_OFFLINE,
SUBSYS_ONLINE,
+ SUBSYS_CRASHED,
};
static const char * const subsys_states[] = {
[SUBSYS_OFFLINE] = "OFFLINE",
[SUBSYS_ONLINE] = "ONLINE",
+ [SUBSYS_CRASHED] = "CRASHED",
};
struct subsys_device {
@@ -71,7 +73,7 @@
char wlname[64];
struct work_struct work;
spinlock_t restart_lock;
- int restart_count;
+ bool restarting;
void *notify;
struct device dev;
@@ -107,6 +109,21 @@
return snprintf(buf, PAGE_SIZE, "%s\n", subsys_states[state]);
}
+static void subsys_set_state(struct subsys_device *subsys,
+ enum subsys_state state)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&subsys->restart_lock, flags);
+ if (subsys->state != state) {
+ subsys->state = state;
+ spin_unlock_irqrestore(&subsys->restart_lock, flags);
+ sysfs_notify(&subsys->dev.kobj, NULL, "state");
+ return;
+ }
+ spin_unlock_irqrestore(&subsys->restart_lock, flags);
+}
+
static struct device_attribute subsys_attrs[] = {
__ATTR_RO(name),
__ATTR_RO(state),
@@ -333,6 +350,7 @@
if (dev->desc->shutdown(dev->desc) < 0)
panic("subsys-restart: [%p]: Failed to shutdown %s!",
current, name);
+ subsys_set_state(dev, SUBSYS_OFFLINE);
}
static void subsystem_ramdump(struct subsys_device *dev, void *data)
@@ -351,6 +369,7 @@
pr_info("[%p]: Powering up %s\n", current, name);
if (dev->desc->powerup(dev->desc) < 0)
panic("[%p]: Failed to powerup %s!", current, name);
+ subsys_set_state(dev, SUBSYS_ONLINE);
}
static int __find_subsys(struct device *dev, void *data)
@@ -418,7 +437,10 @@
* Now that we've acquired the shutdown lock, either we're the first to
* restart these subsystems or some other thread is doing the powerup
* sequence for these subsystems. In the latter case, panic and bail
- * out, since a subsystem died in its powerup sequence.
+ * out, since a subsystem died in its powerup sequence. This catches
+ * the case where a subsystem in a restart order isn't the one
+ * who initiated the original restart but has crashed while the restart
+ * order is being rebooted.
*/
if (!mutex_trylock(powerup_lock))
panic("%s[%p]: Subsystem died during powerup!",
@@ -465,32 +487,36 @@
out:
spin_lock_irqsave(&dev->restart_lock, flags);
- dev->restart_count--;
- if (!dev->restart_count)
- wake_unlock(&dev->wake_lock);
+ dev->restarting = false;
+ wake_unlock(&dev->wake_lock);
spin_unlock_irqrestore(&dev->restart_lock, flags);
}
static void __subsystem_restart_dev(struct subsys_device *dev)
{
struct subsys_desc *desc = dev->desc;
+ const char *name = dev->desc->name;
unsigned long flags;
pr_debug("Restarting %s [level=%d]!\n", desc->name, restart_level);
+ /*
+ * We want to allow drivers to call subsystem_restart{_dev}() as many
+ * times as they want up until the point where the subsystem is
+ * shutdown.
+ */
spin_lock_irqsave(&dev->restart_lock, flags);
- if (!dev->restart_count)
- wake_lock(&dev->wake_lock);
- dev->restart_count++;
- spin_unlock_irqrestore(&dev->restart_lock, flags);
-
- if (!queue_work(ssr_wq, &dev->work)) {
- spin_lock_irqsave(&dev->restart_lock, flags);
- dev->restart_count--;
- if (!dev->restart_count)
- wake_unlock(&dev->wake_lock);
- spin_unlock_irqrestore(&dev->restart_lock, flags);
+ if (dev->state != SUBSYS_CRASHED) {
+ if (dev->state == SUBSYS_ONLINE && !dev->restarting) {
+ dev->restarting = true;
+ dev->state = SUBSYS_CRASHED;
+ wake_lock(&dev->wake_lock);
+ queue_work(ssr_wq, &dev->work);
+ } else {
+ panic("Subsystem %s crashed during SSR!", name);
+ }
}
+ spin_unlock_irqrestore(&dev->restart_lock, flags);
}
int subsystem_restart_dev(struct subsys_device *dev)
@@ -644,6 +670,7 @@
subsys->dev.parent = desc->dev;
subsys->dev.bus = &subsys_bus_type;
subsys->dev.release = subsys_device_release;
+ subsys->state = SUBSYS_ONLINE; /* Until proper refcounting appears */
subsys->notify = subsys_notif_add_subsys(desc->name);
subsys->restart_order = update_restart_order(subsys);
diff --git a/arch/arm/mach-msm/sysmon.c b/arch/arm/mach-msm/sysmon.c
index 1305bd1..02ba5ea 100644
--- a/arch/arm/mach-msm/sysmon.c
+++ b/arch/arm/mach-msm/sysmon.c
@@ -159,6 +159,41 @@
}
/**
+ * sysmon_send_shutdown() - send shutdown command to a
+ * subsystem.
+ * @dest_ss: ID of subsystem to send to.
+ *
+ * Returns 0 for success, -EINVAL for an invalid destination, -ENODEV if
+ * the SMD transport channel is not open, -ETIMEDOUT if the destination
+ * subsystem does not respond, and -ENOSYS if the destination subsystem
+ * responds with something unexpected.
+ *
+ * If CONFIG_MSM_SYSMON_COMM is not defined, always return success (0).
+ */
+int sysmon_send_shutdown(enum subsys_id dest_ss)
+{
+ struct sysmon_subsys *ss = &subsys[dest_ss];
+ const char tx_buf[] = "system:shutdown";
+ const char expect[] = "system:ack";
+ size_t prefix_len = ARRAY_SIZE(expect) - 1;
+ int ret;
+
+ if (dest_ss < 0 || dest_ss >= SYSMON_NUM_SS)
+ return -EINVAL;
+
+ mutex_lock(&ss->lock);
+ ret = sysmon_send_msg(ss, tx_buf, ARRAY_SIZE(tx_buf));
+ if (ret)
+ goto out;
+
+ if (strncmp(ss->rx_buf, expect, prefix_len))
+ ret = -ENOSYS;
+out:
+ mutex_unlock(&ss->lock);
+ return ret;
+}
+
+/**
* sysmon_get_reason() - Retrieve failure reason from a subsystem.
* @dest_ss: ID of subsystem to query
* @buf: Caller-allocated buffer for the returned NUL-terminated reason
diff --git a/arch/arm/mach-msm/sysmon.h b/arch/arm/mach-msm/sysmon.h
index 77c3329..8c2f6ea 100644
--- a/arch/arm/mach-msm/sysmon.h
+++ b/arch/arm/mach-msm/sysmon.h
@@ -38,6 +38,7 @@
int sysmon_send_event(enum subsys_id dest_ss, const char *event_ss,
enum subsys_notif_type notif);
int sysmon_get_reason(enum subsys_id dest_ss, char *buf, size_t len);
+int sysmon_send_shutdown(enum subsys_id dest_ss);
#else
static inline int sysmon_send_event(enum subsys_id dest_ss,
const char *event_ss,
@@ -50,6 +51,10 @@
{
return 0;
}
+static inline int sysmon_send_shutdown(enum subsys_id dest_ss)
+{
+ return 0;
+}
#endif
#endif
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 668f4cc..b361d9d 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -966,7 +966,7 @@
if (cpu_is_msm8x60() || cpu_is_msm8960() || cpu_is_apq8064() ||
cpu_is_msm8930() || cpu_is_msm8930aa() || cpu_is_msm8627() ||
- cpu_is_msm8960ab())
+ cpu_is_msm8960ab() || cpu_is_apq8064ab())
__raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
if (__get_cpu_var(first_boot)) {
@@ -1064,7 +1064,7 @@
dgt->flags |= MSM_CLOCK_FLAGS_UNSTABLE_COUNT;
} else if (cpu_is_msm8960() || cpu_is_apq8064() || cpu_is_msm8930() ||
cpu_is_msm8930aa() || cpu_is_msm8627() ||
- cpu_is_msm8960ab()) {
+ cpu_is_msm8960ab() || cpu_is_apq8064ab()) {
global_timer_offset = MSM_TMR0_BASE - MSM_TMR_BASE;
dgt->freq = 6750000;
__raw_writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
@@ -1127,7 +1127,7 @@
if (cpu_is_msm8x60() || cpu_is_msm8960() || cpu_is_apq8064() ||
cpu_is_msm8930() || cpu_is_msm9615() || cpu_is_msm8625() ||
cpu_is_msm8627() || cpu_is_msm8930aa() ||
- cpu_is_msm8960ab()) {
+ cpu_is_msm8960ab() || cpu_is_apq8064ab()) {
clock->percpu_evt = alloc_percpu(struct clock_event_device *);
if (!clock->percpu_evt) {
pr_err("msm_timer_init: memory allocation "
diff --git a/arch/arm/mach-msm/wcnss-ssr-8960.c b/arch/arm/mach-msm/wcnss-ssr-8960.c
deleted file mode 100644
index f014df9..0000000
--- a/arch/arm/mach-msm/wcnss-ssr-8960.c
+++ /dev/null
@@ -1,277 +0,0 @@
-/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/reboot.h>
-#include <linux/workqueue.h>
-#include <linux/io.h>
-#include <linux/delay.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/wcnss_wlan.h>
-#include <linux/err.h>
-#include <asm/mach-types.h>
-#include <mach/irqs.h>
-#include <mach/scm.h>
-#include <mach/subsystem_restart.h>
-#include <mach/subsystem_notif.h>
-#include <mach/peripheral-loader.h>
-#include "smd_private.h"
-#include "ramdump.h"
-
-#define MODULE_NAME "wcnss_8960"
-#define MAX_BUF_SIZE 0x51
-
-
-
-static struct delayed_work cancel_vote_work;
-static void *riva_ramdump_dev;
-static int riva_crash;
-static int ss_restart_inprogress;
-static int enable_riva_ssr;
-static struct subsys_device *riva_8960_dev;
-
-static void smsm_state_cb_hdlr(void *data, uint32_t old_state,
- uint32_t new_state)
-{
- char *smem_reset_reason;
- char buffer[MAX_BUF_SIZE];
- unsigned smem_reset_size;
- unsigned size;
-
- riva_crash = true;
-
- pr_err("%s: smsm state changed\n", MODULE_NAME);
-
- if (!(new_state & SMSM_RESET))
- return;
-
- if (ss_restart_inprogress) {
- pr_err("%s: Ignoring smsm reset req, restart in progress\n",
- MODULE_NAME);
- return;
- }
-
- if (!enable_riva_ssr)
- panic(MODULE_NAME ": SMSM reset request received from Riva");
-
- smem_reset_reason = smem_get_entry(SMEM_SSR_REASON_WCNSS0,
- &smem_reset_size);
-
- if (!smem_reset_reason || !smem_reset_size) {
- pr_err("%s: wcnss subsystem failure reason: %s\n",
- __func__, "(unknown, smem_get_entry failed)");
- } else if (!smem_reset_reason[0]) {
- pr_err("%s: wcnss subsystem failure reason: %s\n",
- __func__, "(unknown, init string found)");
- } else {
- size = smem_reset_size < MAX_BUF_SIZE ? smem_reset_size :
- (MAX_BUF_SIZE - 1);
- memcpy(buffer, smem_reset_reason, size);
- buffer[size] = '\0';
- pr_err("%s: wcnss subsystem failure reason: %s\n",
- __func__, buffer);
- memset(smem_reset_reason, 0, smem_reset_size);
- wmb();
- }
-
- ss_restart_inprogress = true;
- subsystem_restart_dev(riva_8960_dev);
-}
-
-static irqreturn_t riva_wdog_bite_irq_hdlr(int irq, void *dev_id)
-{
- riva_crash = true;
-
- if (ss_restart_inprogress) {
- pr_err("%s: Ignoring riva bite irq, restart in progress\n",
- MODULE_NAME);
- return IRQ_HANDLED;
- }
-
- if (!enable_riva_ssr)
- panic(MODULE_NAME ": Watchdog bite received from Riva");
-
- ss_restart_inprogress = true;
- subsystem_restart_dev(riva_8960_dev);
-
- return IRQ_HANDLED;
-}
-
-/* SMSM reset Riva */
-static void smsm_riva_reset(void)
-{
- /* per SS reset request bit is not available now,
- * all SS host modules are setting this bit
- * This is still under discussion*/
- smsm_change_state(SMSM_APPS_STATE, SMSM_RESET, SMSM_RESET);
-}
-
-static void riva_post_bootup(struct work_struct *work)
-{
- struct platform_device *pdev = wcnss_get_platform_device();
- struct wcnss_wlan_config *pwlanconfig = wcnss_get_wlan_config();
-
- pr_debug(MODULE_NAME ": Cancel APPS vote for Iris & Riva\n");
-
- wcnss_wlan_power(&pdev->dev, pwlanconfig,
- WCNSS_WLAN_SWITCH_OFF);
-}
-
-/* Subsystem handlers */
-static int riva_shutdown(const struct subsys_desc *subsys)
-{
- pil_force_shutdown("wcnss");
- flush_delayed_work(&cancel_vote_work);
- wcnss_flush_delayed_boot_votes();
- disable_irq_nosync(RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ);
-
- return 0;
-}
-
-static int riva_powerup(const struct subsys_desc *subsys)
-{
- struct platform_device *pdev = wcnss_get_platform_device();
- struct wcnss_wlan_config *pwlanconfig = wcnss_get_wlan_config();
- int ret = -1;
-
- if (pdev && pwlanconfig)
- ret = wcnss_wlan_power(&pdev->dev, pwlanconfig,
- WCNSS_WLAN_SWITCH_ON);
- /* delay PIL operation, this SSR may be happening soon after kernel
- * resumes because of a SMSM RESET by Riva when APPS was suspended.
- * PIL fails to locate the images without this delay */
- if (!ret) {
- msleep(1000);
- pil_force_boot("wcnss");
- }
- ss_restart_inprogress = false;
- enable_irq(RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ);
- schedule_delayed_work(&cancel_vote_work, msecs_to_jiffies(5000));
-
- return ret;
-}
-
-/* 5MB RAM segments for Riva SS */
-static struct ramdump_segment riva_segments[] = {{0x8f200000,
- 0x8f700000 - 0x8f200000} };
-
-static int riva_ramdump(int enable, const struct subsys_desc *subsys)
-{
- pr_debug("%s: enable[%d]\n", MODULE_NAME, enable);
- if (enable)
- return do_ramdump(riva_ramdump_dev,
- riva_segments,
- ARRAY_SIZE(riva_segments));
- else
- return 0;
-}
-
-/* Riva crash handler */
-static void riva_crash_shutdown(const struct subsys_desc *subsys)
-{
- pr_err("%s: crash shutdown : %d\n", MODULE_NAME, riva_crash);
- if (riva_crash != true)
- smsm_riva_reset();
-}
-
-static struct subsys_desc riva_8960 = {
- .name = "riva",
- .shutdown = riva_shutdown,
- .powerup = riva_powerup,
- .ramdump = riva_ramdump,
- .crash_shutdown = riva_crash_shutdown
-};
-
-static int enable_riva_ssr_set(const char *val, struct kernel_param *kp)
-{
- int ret;
-
- ret = param_set_int(val, kp);
- if (ret)
- return ret;
-
- if (enable_riva_ssr)
- pr_info(MODULE_NAME ": Subsystem restart activated for riva.\n");
-
- return 0;
-}
-
-module_param_call(enable_riva_ssr, enable_riva_ssr_set, param_get_int,
- &enable_riva_ssr, S_IRUGO | S_IWUSR);
-
-static int __init riva_restart_init(void)
-{
- riva_8960_dev = subsys_register(&riva_8960);
- if (IS_ERR(riva_8960_dev))
- return PTR_ERR(riva_8960_dev);
- return 0;
-}
-
-static int __init riva_ssr_module_init(void)
-{
- int ret;
-
- if (machine_is_mpq8064_hrd()) {
- pr_err("Riva not supported on this target\n");
- return 0;
- }
-
- ret = smsm_state_cb_register(SMSM_WCNSS_STATE, SMSM_RESET,
- smsm_state_cb_hdlr, 0);
- if (ret < 0) {
- pr_err("%s: Unable to register smsm callback for Riva Reset! %d\n",
- MODULE_NAME, ret);
- goto out;
- }
- ret = request_irq(RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ,
- riva_wdog_bite_irq_hdlr, IRQF_TRIGGER_HIGH,
- "riva_wdog", NULL);
-
- if (ret < 0) {
- pr_err("%s: Unable to register for Riva bite interrupt (%d)\n",
- MODULE_NAME, ret);
- goto out;
- }
- ret = riva_restart_init();
- if (ret < 0) {
- pr_err("%s: Unable to register with ssr. (%d)\n",
- MODULE_NAME, ret);
- goto out;
- }
- riva_ramdump_dev = create_ramdump_device("riva");
- if (!riva_ramdump_dev) {
- pr_err("%s: Unable to create ramdump device.\n",
- MODULE_NAME);
- ret = -ENOMEM;
- goto out;
- }
- INIT_DELAYED_WORK(&cancel_vote_work, riva_post_bootup);
-
- pr_info("%s: module initialized\n", MODULE_NAME);
-out:
- return ret;
-}
-
-static void __exit riva_ssr_module_exit(void)
-{
- if (machine_is_mpq8064_hrd())
- return;
- subsys_unregister(riva_8960_dev);
- free_irq(RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ, NULL);
-}
-
-module_init(riva_ssr_module_init);
-module_exit(riva_ssr_module_exit);
-
-MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-msm/wcnss-ssr-8974.c b/arch/arm/mach-msm/wcnss-ssr-8974.c
new file mode 100644
index 0000000..b837efc
--- /dev/null
+++ b/arch/arm/mach-msm/wcnss-ssr-8974.c
@@ -0,0 +1,163 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/err.h>
+
+#include <mach/subsystem_restart.h>
+#include <mach/msm_smsm.h>
+
+#define MODULE_NAME "wcnss_8974"
+#define MAX_SSR_REASON_LEN 0x51
+
+static int ss_restart_inprogress;
+static int wcnss_crash;
+static struct subsys_device *wcnss_ssr_dev;
+
+#define WCNSS_APSS_WDOG_BITE_RESET_RDY_IRQ 181
+
+static void log_wcnss_sfr(void)
+{
+ char *smem_reset_reason;
+ char buffer[MAX_SSR_REASON_LEN];
+ unsigned smem_reset_size;
+ unsigned size;
+
+ smem_reset_reason = smem_get_entry(SMEM_SSR_REASON_WCNSS0,
+ &smem_reset_size);
+
+ if (!smem_reset_reason || !smem_reset_size) {
+ pr_err("%s: wcnss subsystem failure reason: %s\n",
+ __func__, "(unknown, smem_get_entry failed)");
+ } else if (!smem_reset_reason[0]) {
+ pr_err("%s: wcnss subsystem failure reason: %s\n",
+ __func__, "(unknown, init string found)");
+ } else {
+ size = smem_reset_size < MAX_SSR_REASON_LEN ? smem_reset_size :
+ (MAX_SSR_REASON_LEN - 1);
+ memcpy(buffer, smem_reset_reason, size);
+ buffer[size] = '\0';
+ pr_err("%s: wcnss subsystem failure reason: %s\n",
+ __func__, buffer);
+ memset(smem_reset_reason, 0, smem_reset_size);
+ wmb();
+ }
+}
+
+static void restart_wcnss(void)
+{
+ log_wcnss_sfr();
+ subsystem_restart("wcnss");
+}
+
+static void smsm_state_cb_hdlr(void *data, uint32_t old_state,
+ uint32_t new_state)
+{
+ wcnss_crash = true;
+
+ pr_err("%s: smsm state changed\n", MODULE_NAME);
+
+ if (!(new_state & SMSM_RESET))
+ return;
+
+ if (ss_restart_inprogress) {
+ pr_err("%s: Ignoring smsm reset req, restart in progress\n",
+ MODULE_NAME);
+ return;
+ }
+
+ ss_restart_inprogress = true;
+ restart_wcnss();
+}
+
+
+static irqreturn_t wcnss_wdog_bite_irq_hdlr(int irq, void *dev_id)
+{
+ wcnss_crash = true;
+
+ if (ss_restart_inprogress) {
+ pr_err("%s: Ignoring wcnss bite irq, restart in progress\n",
+ MODULE_NAME);
+ return IRQ_HANDLED;
+ }
+
+ ss_restart_inprogress = true;
+ restart_wcnss();
+
+ return IRQ_HANDLED;
+}
+
+
+static int wcnss_shutdown(const struct subsys_desc *subsys)
+{
+ return 0;
+}
+
+static int wcnss_powerup(const struct subsys_desc *subsys)
+{
+ return 0;
+}
+
+/* wcnss crash handler */
+static void wcnss_crash_shutdown(const struct subsys_desc *subsys)
+{
+ pr_err("%s: crash shutdown : %d\n", MODULE_NAME, wcnss_crash);
+ if (wcnss_crash != true)
+ smsm_change_state(SMSM_APPS_STATE, SMSM_RESET, SMSM_RESET);
+}
+
+static int wcnss_ramdump(int enable,
+ const struct subsys_desc *crashed_subsys)
+{
+ return 0;
+}
+
+static struct subsys_desc wcnss_ssr = {
+ .name = "wcnss",
+ .shutdown = wcnss_shutdown,
+ .powerup = wcnss_powerup,
+ .ramdump = wcnss_ramdump,
+ .crash_shutdown = wcnss_crash_shutdown
+};
+
+static int __init wcnss_ssr_init(void)
+{
+ int ret;
+
+ ret = smsm_state_cb_register(SMSM_WCNSS_STATE, SMSM_RESET,
+ smsm_state_cb_hdlr, 0);
+ if (ret < 0) {
+ pr_err("%s: Unable to register smsm callback for wcnss Reset! %d\n",
+ MODULE_NAME, ret);
+ goto out;
+ }
+ ret = request_irq(WCNSS_APSS_WDOG_BITE_RESET_RDY_IRQ,
+ wcnss_wdog_bite_irq_hdlr, IRQF_TRIGGER_HIGH,
+ "wcnss_wdog", NULL);
+
+ if (ret < 0) {
+ pr_err("%s: Unable to register for wcnss bite interrupt (%d)\n",
+ MODULE_NAME, ret);
+ goto out;
+ }
+ wcnss_ssr_dev = subsys_register(&wcnss_ssr);
+ if (IS_ERR(wcnss_ssr_dev))
+ return PTR_ERR(wcnss_ssr_dev);
+
+ pr_info("%s: module initialized\n", MODULE_NAME);
+out:
+ return ret;
+}
+
+arch_initcall(wcnss_ssr_init);
diff --git a/arch/arm/mach-msm/wdog_debug.c b/arch/arm/mach-msm/wdog_debug.c
new file mode 100644
index 0000000..82800cf
--- /dev/null
+++ b/arch/arm/mach-msm/wdog_debug.c
@@ -0,0 +1,149 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/mutex.h>
+#include <linux/sched.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <mach/scm.h>
+#include <linux/slab.h>
+
+#define MODULE_NAME "wdog_debug"
+#define WDOG_DEBUG_EN 17
+#define GCC_WDOG_DEBUG_OFFSET 0x780
+
+struct msm_wdog_debug_data {
+ unsigned int __iomem phys_base;
+ size_t size;
+ void __iomem *base;
+ struct device *dev;
+};
+
+static struct msm_wdog_debug_data *wdog_data;
+
+void msm_disable_wdog_debug(void)
+{
+ unsigned long int value;
+
+ if (wdog_data == NULL)
+ return;
+ value = readl_relaxed(wdog_data->base + GCC_WDOG_DEBUG_OFFSET);
+ value &= ~BIT(WDOG_DEBUG_EN);
+ writel_relaxed(value, wdog_data->base + GCC_WDOG_DEBUG_OFFSET);
+}
+EXPORT_SYMBOL(msm_disable_wdog_debug);
+
+void msm_enable_wdog_debug(void)
+{
+ unsigned long int value;
+
+ if (wdog_data == NULL)
+ return;
+ value = readl_relaxed(wdog_data->base + GCC_WDOG_DEBUG_OFFSET);
+ value |= BIT(WDOG_DEBUG_EN);
+ writel_relaxed(value, wdog_data->base + GCC_WDOG_DEBUG_OFFSET);
+}
+EXPORT_SYMBOL(msm_enable_wdog_debug);
+
+static int __devexit msm_wdog_debug_remove(struct platform_device *pdev)
+{
+ kfree(wdog_data);
+ wdog_data = NULL;
+ pr_info("MSM wdog_debug Exit - Deactivated\n");
+ return 0;
+}
+
+static int __devinit msm_wdog_debug_dt_to_pdata(struct platform_device *pdev,
+ struct msm_wdog_debug_data *pdata)
+{
+ struct resource *wdog_resource;
+
+ wdog_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!wdog_resource) {
+ dev_err(&pdev->dev, \
+ "%s cannot allocate resource for wdog_debug\n", \
+ __func__);
+ return -ENXIO;
+ }
+ pdata->size = resource_size(wdog_resource);
+ pdata->phys_base = wdog_resource->start;
+ if (unlikely(!(devm_request_region(&pdev->dev, pdata->phys_base,
+ pdata->size, "msm-wdog-debug")))) {
+ dev_err(&pdev->dev, "%s cannot reserve wdog_debug region\n",
+ __func__);
+ return -ENXIO;
+ }
+ pdata->base = devm_ioremap(&pdev->dev, pdata->phys_base,
+ pdata->size);
+ if (!pdata->base) {
+ dev_err(&pdev->dev, "%s cannot map wdog register space\n",
+ __func__);
+ return -ENXIO;
+ }
+
+ return 0;
+}
+
+static int __devinit msm_wdog_debug_probe(struct platform_device *pdev)
+{
+ int ret;
+ if (!pdev->dev.of_node)
+ return -ENODEV;
+ wdog_data = kzalloc(sizeof(struct msm_wdog_debug_data), GFP_KERNEL);
+ if (!wdog_data)
+ return -ENOMEM;
+ ret = msm_wdog_debug_dt_to_pdata(pdev, wdog_data);
+ if (ret)
+ goto err;
+ wdog_data->dev = &pdev->dev;
+ platform_set_drvdata(pdev, wdog_data);
+ msm_enable_wdog_debug();
+ return 0;
+err:
+ kzfree(wdog_data);
+ wdog_data = NULL;
+ return ret;
+}
+
+static struct of_device_id msm_wdog_debug_match_table[] = {
+ { .compatible = "qcom,msm-wdog-debug" },
+ {}
+};
+
+static struct platform_driver msm_wdog_debug_driver = {
+ .probe = msm_wdog_debug_probe,
+ .remove = msm_wdog_debug_remove,
+ .driver = {
+ .name = MODULE_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = msm_wdog_debug_match_table,
+ },
+};
+
+static int __devinit wdog_debug_init(void)
+{
+ return platform_driver_register(&msm_wdog_debug_driver);
+}
+module_init(wdog_debug_init);
+
+static void __exit wdog_debug_exit(void)
+{
+ platform_driver_unregister(&msm_wdog_debug_driver);
+}
+module_exit(wdog_debug_exit);
+
+MODULE_DESCRIPTION("MSM Driver to disable debug Image");
+MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-msm/wdog_debug.h b/arch/arm/mach-msm/wdog_debug.h
new file mode 100644
index 0000000..920aa89
--- /dev/null
+++ b/arch/arm/mach-msm/wdog_debug.h
@@ -0,0 +1,24 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __WDOG_DEBUG_H
+#define __WDOG_DEBUG_H
+
+#ifdef CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL
+void msm_enable_wdog_debug(void);
+void msm_disable_wdog_debug(void);
+#else
+void msm_enable_wdog_debug(void) { }
+void msm_disable_wdog_debug(void) { }
+#endif
+
+#endif
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index ed03b33..19ef5a6 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -37,6 +37,9 @@
#include "fault.h"
+#define CREATE_TRACE_POINTS
+#include <trace/events/exception.h>
+
#ifdef CONFIG_MMU
#ifdef CONFIG_KPROBES
@@ -173,6 +176,8 @@
{
struct siginfo si;
+ trace_user_fault(tsk, addr, fsr);
+
#ifdef CONFIG_DEBUG_USER
if (((user_debug & UDBG_SEGV) && (sig == SIGSEGV)) ||
((user_debug & UDBG_BUS) && (sig == SIGBUS))) {
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 47dab27..ba93e68 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -393,6 +393,16 @@
.size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info
/*
+ * Qualcomm Inc. Krait processors.
+ */
+ .type __krait_proc_info, #object
+__krait_proc_info:
+ .long 0x510f0400 @ Required ID value
+ .long 0xff0ffc00 @ Mask for ID
+ __v7_proc __v7_setup, hwcaps = HWCAP_IDIV
+ .size __krait_proc_info, . - __krait_proc_info
+
+ /*
* Match any ARMv7 processor core.
*/
.type __v7_proc_info, #object
diff --git a/block/Kconfig.iosched b/block/Kconfig.iosched
index 4142d91..5fd98ea 100644
--- a/block/Kconfig.iosched
+++ b/block/Kconfig.iosched
@@ -32,6 +32,17 @@
a new point in the service tree and doing a batch of IO from there
in case of expiry.
+config IOSCHED_ROW
+ tristate "ROW I/O scheduler"
+ default y
+ ---help---
+ The ROW I/O scheduler gives priority to READ requests over the
+ WRITE requests when dispatching, without starving WRITE requests.
+ Requests are kept in priority queues. Dispatching is done in a RR
+ manner when the dispatch quantum for each queue is calculated
+ according to queue priority.
+ Most suitable for mobile devices.
+
config IOSCHED_CFQ
tristate "CFQ I/O scheduler"
# If BLK_CGROUP is a module, CFQ has to be built as module.
@@ -64,6 +75,16 @@
config DEFAULT_DEADLINE
bool "Deadline" if IOSCHED_DEADLINE=y
+ config DEFAULT_ROW
+ bool "ROW" if IOSCHED_ROW=y
+ help
+ The ROW I/O scheduler gives priority to READ requests
+ over the WRITE requests when dispatching, without starving
+ WRITE requests. Requests are kept in priority queues.
+ Dispatching is done in a RR manner when the dispatch quantum
+ for each queue is defined according to queue priority.
+ Most suitable for mobile devices.
+
config DEFAULT_CFQ
bool "CFQ" if IOSCHED_CFQ=y
@@ -75,6 +96,7 @@
config DEFAULT_IOSCHED
string
default "deadline" if DEFAULT_DEADLINE
+ default "row" if DEFAULT_ROW
default "cfq" if DEFAULT_CFQ
default "noop" if DEFAULT_NOOP
diff --git a/block/Makefile b/block/Makefile
index 436b220..b5e6637 100644
--- a/block/Makefile
+++ b/block/Makefile
@@ -14,6 +14,7 @@
obj-$(CONFIG_BLK_DEV_THROTTLING) += blk-throttle.o
obj-$(CONFIG_IOSCHED_NOOP) += noop-iosched.o
obj-$(CONFIG_IOSCHED_DEADLINE) += deadline-iosched.o
+obj-$(CONFIG_IOSCHED_ROW) += row-iosched.o
obj-$(CONFIG_IOSCHED_CFQ) += cfq-iosched.o
obj-$(CONFIG_IOSCHED_TEST) += test-iosched.o
diff --git a/block/row-iosched.c b/block/row-iosched.c
new file mode 100644
index 0000000..f24437c
--- /dev/null
+++ b/block/row-iosched.c
@@ -0,0 +1,681 @@
+/*
+ * ROW (Read Over Write) I/O scheduler.
+ *
+ * Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* See Documentation/block/row-iosched.txt */
+
+#include <linux/kernel.h>
+#include <linux/fs.h>
+#include <linux/blkdev.h>
+#include <linux/elevator.h>
+#include <linux/bio.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/compiler.h>
+#include <linux/blktrace_api.h>
+#include <linux/jiffies.h>
+
+/*
+ * enum row_queue_prio - Priorities of the ROW queues
+ *
+ * This enum defines the priorities (and the number of queues)
+ * the requests will be disptributed to. The higher priority -
+ * the bigger is the dispatch quantum given to that queue.
+ * ROWQ_PRIO_HIGH_READ - is the higher priority queue.
+ *
+ */
+enum row_queue_prio {
+ ROWQ_PRIO_HIGH_READ = 0,
+ ROWQ_PRIO_REG_READ,
+ ROWQ_PRIO_HIGH_SWRITE,
+ ROWQ_PRIO_REG_SWRITE,
+ ROWQ_PRIO_REG_WRITE,
+ ROWQ_PRIO_LOW_READ,
+ ROWQ_PRIO_LOW_SWRITE,
+ ROWQ_MAX_PRIO,
+};
+
+/* Flags indicating whether idling is enabled on the queue */
+static const bool queue_idling_enabled[] = {
+ true, /* ROWQ_PRIO_HIGH_READ */
+ true, /* ROWQ_PRIO_REG_READ */
+ false, /* ROWQ_PRIO_HIGH_SWRITE */
+ false, /* ROWQ_PRIO_REG_SWRITE */
+ false, /* ROWQ_PRIO_REG_WRITE */
+ false, /* ROWQ_PRIO_LOW_READ */
+ false, /* ROWQ_PRIO_LOW_SWRITE */
+};
+
+/* Default values for row queues quantums in each dispatch cycle */
+static const int queue_quantum[] = {
+ 100, /* ROWQ_PRIO_HIGH_READ */
+ 100, /* ROWQ_PRIO_REG_READ */
+ 2, /* ROWQ_PRIO_HIGH_SWRITE */
+ 1, /* ROWQ_PRIO_REG_SWRITE */
+ 1, /* ROWQ_PRIO_REG_WRITE */
+ 1, /* ROWQ_PRIO_LOW_READ */
+ 1 /* ROWQ_PRIO_LOW_SWRITE */
+};
+
+/* Default values for idling on read queues */
+#define ROW_IDLE_TIME 50 /* 5 msec */
+#define ROW_READ_FREQ 70 /* 7 msec */
+
+/**
+ * struct rowq_idling_data - parameters for idling on the queue
+ * @idle_trigger_time: time (in jiffies). If a new request was
+ * inserted before this time value, idling
+ * will be enabled.
+ * @begin_idling: flag indicating wether we should idle
+ *
+ */
+struct rowq_idling_data {
+ unsigned long idle_trigger_time;
+ bool begin_idling;
+};
+
+/**
+ * struct row_queue - requests grouping structure
+ * @rdata: parent row_data structure
+ * @fifo: fifo of requests
+ * @prio: queue priority (enum row_queue_prio)
+ * @nr_dispatched: number of requests already dispatched in
+ * the current dispatch cycle
+ * @slice: number of requests to dispatch in a cycle
+ * @idle_data: data for idling on queues
+ *
+ */
+struct row_queue {
+ struct row_data *rdata;
+ struct list_head fifo;
+ enum row_queue_prio prio;
+
+ unsigned int nr_dispatched;
+ unsigned int slice;
+
+ /* used only for READ queues */
+ struct rowq_idling_data idle_data;
+};
+
+/**
+ * struct idling_data - data for idling on empty rqueue
+ * @idle_time: idling duration (msec)
+ * @freq: min time between two requests that
+ * triger idling (msec)
+ * @idle_work: pointer to struct delayed_work
+ *
+ */
+struct idling_data {
+ unsigned long idle_time;
+ unsigned long freq;
+
+ struct workqueue_struct *idle_workqueue;
+ struct delayed_work idle_work;
+};
+
+/**
+ * struct row_queue - Per block device rqueue structure
+ * @dispatch_queue: dispatch rqueue
+ * @row_queues: array of priority request queues with
+ * dispatch quantum per rqueue
+ * @curr_queue: index in the row_queues array of the
+ * currently serviced rqueue
+ * @read_idle: data for idling after READ request
+ * @nr_reqs: nr_reqs[0] holds the number of all READ requests in
+ * scheduler, nr_reqs[1] holds the number of all WRITE
+ * requests in scheduler
+ * @cycle_flags: used for marking unserved queueus
+ *
+ */
+struct row_data {
+ struct request_queue *dispatch_queue;
+
+ struct {
+ struct row_queue rqueue;
+ int disp_quantum;
+ } row_queues[ROWQ_MAX_PRIO];
+
+ enum row_queue_prio curr_queue;
+
+ struct idling_data read_idle;
+ unsigned int nr_reqs[2];
+
+ unsigned int cycle_flags;
+};
+
+#define RQ_ROWQ(rq) ((struct row_queue *) ((rq)->elv.priv[0]))
+
+#define row_log(q, fmt, args...) \
+ blk_add_trace_msg(q, "%s():" fmt , __func__, ##args)
+#define row_log_rowq(rdata, rowq_id, fmt, args...) \
+ blk_add_trace_msg(rdata->dispatch_queue, "rowq%d " fmt, \
+ rowq_id, ##args)
+
+static inline void row_mark_rowq_unserved(struct row_data *rd,
+ enum row_queue_prio qnum)
+{
+ rd->cycle_flags |= (1 << qnum);
+}
+
+static inline void row_clear_rowq_unserved(struct row_data *rd,
+ enum row_queue_prio qnum)
+{
+ rd->cycle_flags &= ~(1 << qnum);
+}
+
+static inline int row_rowq_unserved(struct row_data *rd,
+ enum row_queue_prio qnum)
+{
+ return rd->cycle_flags & (1 << qnum);
+}
+
+/******************** Static helper functions ***********************/
+/*
+ * kick_queue() - Wake up device driver queue thread
+ * @work: pointer to struct work_struct
+ *
+ * This is a idling delayed work function. It's purpose is to wake up the
+ * device driver in order for it to start fetching requests.
+ *
+ */
+static void kick_queue(struct work_struct *work)
+{
+ struct delayed_work *idle_work = to_delayed_work(work);
+ struct idling_data *read_data =
+ container_of(idle_work, struct idling_data, idle_work);
+ struct row_data *rd =
+ container_of(read_data, struct row_data, read_idle);
+
+ row_log_rowq(rd, rd->curr_queue, "Performing delayed work");
+ /* Mark idling process as done */
+ rd->row_queues[rd->curr_queue].rqueue.idle_data.begin_idling = false;
+
+ if (!(rd->nr_reqs[0] + rd->nr_reqs[1]))
+ row_log(rd->dispatch_queue, "No requests in scheduler");
+ else {
+ spin_lock_irq(rd->dispatch_queue->queue_lock);
+ __blk_run_queue(rd->dispatch_queue);
+ spin_unlock_irq(rd->dispatch_queue->queue_lock);
+ }
+}
+
+/*
+ * row_restart_disp_cycle() - Restart the dispatch cycle
+ * @rd: pointer to struct row_data
+ *
+ * This function restarts the dispatch cycle by:
+ * - Setting current queue to ROWQ_PRIO_HIGH_READ
+ * - For each queue: reset the number of requests dispatched in
+ * the cycle
+ */
+static inline void row_restart_disp_cycle(struct row_data *rd)
+{
+ int i;
+
+ for (i = 0; i < ROWQ_MAX_PRIO; i++)
+ rd->row_queues[i].rqueue.nr_dispatched = 0;
+
+ rd->curr_queue = ROWQ_PRIO_HIGH_READ;
+ row_log(rd->dispatch_queue, "Restarting cycle");
+}
+
+static inline void row_get_next_queue(struct row_data *rd)
+{
+ rd->curr_queue++;
+ if (rd->curr_queue == ROWQ_MAX_PRIO)
+ row_restart_disp_cycle(rd);
+}
+
+/******************* Elevator callback functions *********************/
+
+/*
+ * row_add_request() - Add request to the scheduler
+ * @q: requests queue
+ * @rq: request to add
+ *
+ */
+static void row_add_request(struct request_queue *q,
+ struct request *rq)
+{
+ struct row_data *rd = (struct row_data *)q->elevator->elevator_data;
+ struct row_queue *rqueue = RQ_ROWQ(rq);
+
+ list_add_tail(&rq->queuelist, &rqueue->fifo);
+ rd->nr_reqs[rq_data_dir(rq)]++;
+ rq_set_fifo_time(rq, jiffies); /* for statistics*/
+
+ if (queue_idling_enabled[rqueue->prio]) {
+ if (delayed_work_pending(&rd->read_idle.idle_work))
+ (void)cancel_delayed_work(
+ &rd->read_idle.idle_work);
+ if (time_before(jiffies, rqueue->idle_data.idle_trigger_time)) {
+ rqueue->idle_data.begin_idling = true;
+ row_log_rowq(rd, rqueue->prio, "Enable idling");
+ } else
+ rqueue->idle_data.begin_idling = false;
+
+ rqueue->idle_data.idle_trigger_time =
+ jiffies + msecs_to_jiffies(rd->read_idle.freq);
+ }
+ row_log_rowq(rd, rqueue->prio, "added request");
+}
+
+/*
+ * row_remove_request() - Remove given request from scheduler
+ * @q: requests queue
+ * @rq: request to remove
+ *
+ */
+static void row_remove_request(struct request_queue *q,
+ struct request *rq)
+{
+ struct row_data *rd = (struct row_data *)q->elevator->elevator_data;
+
+ rq_fifo_clear(rq);
+ rd->nr_reqs[rq_data_dir(rq)]--;
+}
+
+/*
+ * row_dispatch_insert() - move request to dispatch queue
+ * @rd: pointer to struct row_data
+ *
+ * This function moves the next request to dispatch from
+ * rd->curr_queue to the dispatch queue
+ *
+ */
+static void row_dispatch_insert(struct row_data *rd)
+{
+ struct request *rq;
+
+ rq = rq_entry_fifo(rd->row_queues[rd->curr_queue].rqueue.fifo.next);
+ row_remove_request(rd->dispatch_queue, rq);
+ elv_dispatch_add_tail(rd->dispatch_queue, rq);
+ rd->row_queues[rd->curr_queue].rqueue.nr_dispatched++;
+ row_clear_rowq_unserved(rd, rd->curr_queue);
+ row_log_rowq(rd, rd->curr_queue, " Dispatched request nr_disp = %d",
+ rd->row_queues[rd->curr_queue].rqueue.nr_dispatched);
+}
+
+/*
+ * row_choose_queue() - choose the next queue to dispatch from
+ * @rd: pointer to struct row_data
+ *
+ * Updates rd->curr_queue. Returns 1 if there are requests to
+ * dispatch, 0 if there are no requests in scheduler
+ *
+ */
+static int row_choose_queue(struct row_data *rd)
+{
+ int prev_curr_queue = rd->curr_queue;
+
+ if (!(rd->nr_reqs[0] + rd->nr_reqs[1])) {
+ row_log(rd->dispatch_queue, "No more requests in scheduler");
+ return 0;
+ }
+
+ row_get_next_queue(rd);
+
+ /*
+ * Loop over all queues to find the next queue that is not empty.
+ * Stop when you get back to curr_queue
+ */
+ while (list_empty(&rd->row_queues[rd->curr_queue].rqueue.fifo)
+ && rd->curr_queue != prev_curr_queue) {
+ /* Mark rqueue as unserved */
+ row_mark_rowq_unserved(rd, rd->curr_queue);
+ row_get_next_queue(rd);
+ }
+
+ return 1;
+}
+
+/*
+ * row_dispatch_requests() - selects the next request to dispatch
+ * @q: requests queue
+ * @force: ignored
+ *
+ * Return 0 if no requests were moved to the dispatch queue.
+ * 1 otherwise
+ *
+ */
+static int row_dispatch_requests(struct request_queue *q, int force)
+{
+ struct row_data *rd = (struct row_data *)q->elevator->elevator_data;
+ int ret = 0, currq, i;
+
+ currq = rd->curr_queue;
+
+ /*
+ * Find the first unserved queue (with higher priority then currq)
+ * that is not empty
+ */
+ for (i = 0; i < currq; i++) {
+ if (row_rowq_unserved(rd, i) &&
+ !list_empty(&rd->row_queues[i].rqueue.fifo)) {
+ row_log_rowq(rd, currq,
+ " Preemting for unserved rowq%d", i);
+ rd->curr_queue = i;
+ row_dispatch_insert(rd);
+ ret = 1;
+ goto done;
+ }
+ }
+
+ if (rd->row_queues[currq].rqueue.nr_dispatched >=
+ rd->row_queues[currq].disp_quantum) {
+ rd->row_queues[currq].rqueue.nr_dispatched = 0;
+ row_log_rowq(rd, currq, "Expiring rqueue");
+ ret = row_choose_queue(rd);
+ if (ret)
+ row_dispatch_insert(rd);
+ goto done;
+ }
+
+ /* Dispatch from curr_queue */
+ if (list_empty(&rd->row_queues[currq].rqueue.fifo)) {
+ /* check idling */
+ if (delayed_work_pending(&rd->read_idle.idle_work)) {
+ row_log_rowq(rd, currq,
+ "Delayed work pending. Exiting");
+ goto done;
+ }
+
+ if (queue_idling_enabled[currq] &&
+ rd->row_queues[currq].rqueue.idle_data.begin_idling) {
+ if (!queue_delayed_work(rd->read_idle.idle_workqueue,
+ &rd->read_idle.idle_work,
+ jiffies +
+ msecs_to_jiffies(rd->read_idle.idle_time))) {
+ row_log_rowq(rd, currq,
+ "Work already on queue!");
+ pr_err("ROW_BUG: Work already on queue!");
+ } else
+ row_log_rowq(rd, currq,
+ "Scheduled delayed work. exiting");
+ goto done;
+ } else {
+ row_log_rowq(rd, currq,
+ "Currq empty. Choose next queue");
+ ret = row_choose_queue(rd);
+ if (!ret)
+ goto done;
+ }
+ }
+
+ ret = 1;
+ row_dispatch_insert(rd);
+
+done:
+ return ret;
+}
+
+/*
+ * row_init_queue() - Init scheduler data structures
+ * @q: requests queue
+ *
+ * Return pointer to struct row_data to be saved in elevator for
+ * this dispatch queue
+ *
+ */
+static void *row_init_queue(struct request_queue *q)
+{
+
+ struct row_data *rdata;
+ int i;
+
+ rdata = kmalloc_node(sizeof(*rdata),
+ GFP_KERNEL | __GFP_ZERO, q->node);
+ if (!rdata)
+ return NULL;
+
+ for (i = 0; i < ROWQ_MAX_PRIO; i++) {
+ INIT_LIST_HEAD(&rdata->row_queues[i].rqueue.fifo);
+ rdata->row_queues[i].disp_quantum = queue_quantum[i];
+ rdata->row_queues[i].rqueue.rdata = rdata;
+ rdata->row_queues[i].rqueue.prio = i;
+ rdata->row_queues[i].rqueue.idle_data.begin_idling = false;
+ }
+
+ /*
+ * Currently idling is enabled only for READ queues. If we want to
+ * enable it for write queues also, note that idling frequency will
+ * be the same in both cases
+ */
+ rdata->read_idle.idle_time = ROW_IDLE_TIME;
+ rdata->read_idle.freq = ROW_READ_FREQ;
+ rdata->read_idle.idle_workqueue = alloc_workqueue("row_idle_work",
+ WQ_MEM_RECLAIM | WQ_HIGHPRI, 0);
+ if (!rdata->read_idle.idle_workqueue)
+ panic("Failed to create idle workqueue\n");
+ INIT_DELAYED_WORK(&rdata->read_idle.idle_work, kick_queue);
+
+ rdata->curr_queue = ROWQ_PRIO_HIGH_READ;
+ rdata->dispatch_queue = q;
+
+ rdata->nr_reqs[READ] = rdata->nr_reqs[WRITE] = 0;
+
+ return rdata;
+}
+
+/*
+ * row_exit_queue() - called on unloading the RAW scheduler
+ * @e: poiner to struct elevator_queue
+ *
+ */
+static void row_exit_queue(struct elevator_queue *e)
+{
+ struct row_data *rd = (struct row_data *)e->elevator_data;
+ int i;
+
+ for (i = 0; i < ROWQ_MAX_PRIO; i++)
+ BUG_ON(!list_empty(&rd->row_queues[i].rqueue.fifo));
+ (void)cancel_delayed_work_sync(&rd->read_idle.idle_work);
+ kfree(rd);
+}
+
+/*
+ * row_merged_requests() - Called when 2 requests are merged
+ * @q: requests queue
+ * @rq: request the two requests were merged into
+ * @next: request that was merged
+ */
+static void row_merged_requests(struct request_queue *q, struct request *rq,
+ struct request *next)
+{
+ struct row_queue *rqueue = RQ_ROWQ(next);
+
+ list_del_init(&next->queuelist);
+
+ rqueue->rdata->nr_reqs[rq_data_dir(rq)]--;
+}
+
+/*
+ * get_queue_type() - Get queue type for a given request
+ *
+ * This is a helping function which purpose is to determine what
+ * ROW queue the given request should be added to (and
+ * dispatched from leter on)
+ *
+ * TODO: Right now only 3 queues are used REG_READ, REG_WRITE
+ * and REG_SWRITE
+ */
+static enum row_queue_prio get_queue_type(struct request *rq)
+{
+ const int data_dir = rq_data_dir(rq);
+ const bool is_sync = rq_is_sync(rq);
+
+ if (data_dir == READ)
+ return ROWQ_PRIO_REG_READ;
+ else if (is_sync)
+ return ROWQ_PRIO_REG_SWRITE;
+ else
+ return ROWQ_PRIO_REG_WRITE;
+}
+
+/*
+ * row_set_request() - Set ROW data structures associated with this request.
+ * @q: requests queue
+ * @rq: pointer to the request
+ * @gfp_mask: ignored
+ *
+ */
+static int
+row_set_request(struct request_queue *q, struct request *rq, gfp_t gfp_mask)
+{
+ struct row_data *rd = (struct row_data *)q->elevator->elevator_data;
+ unsigned long flags;
+
+ spin_lock_irqsave(q->queue_lock, flags);
+ rq->elv.priv[0] =
+ (void *)(&rd->row_queues[get_queue_type(rq)]);
+ spin_unlock_irqrestore(q->queue_lock, flags);
+
+ return 0;
+}
+
+/********** Helping sysfs functions/defenitions for ROW attributes ******/
+static ssize_t row_var_show(int var, char *page)
+{
+ return snprintf(page, 100, "%d\n", var);
+}
+
+static ssize_t row_var_store(int *var, const char *page, size_t count)
+{
+ int err;
+ err = kstrtoul(page, 10, (unsigned long *)var);
+
+ return count;
+}
+
+#define SHOW_FUNCTION(__FUNC, __VAR, __CONV) \
+static ssize_t __FUNC(struct elevator_queue *e, char *page) \
+{ \
+ struct row_data *rowd = e->elevator_data; \
+ int __data = __VAR; \
+ if (__CONV) \
+ __data = jiffies_to_msecs(__data); \
+ return row_var_show(__data, (page)); \
+}
+SHOW_FUNCTION(row_hp_read_quantum_show,
+ rowd->row_queues[ROWQ_PRIO_HIGH_READ].disp_quantum, 0);
+SHOW_FUNCTION(row_rp_read_quantum_show,
+ rowd->row_queues[ROWQ_PRIO_REG_READ].disp_quantum, 0);
+SHOW_FUNCTION(row_hp_swrite_quantum_show,
+ rowd->row_queues[ROWQ_PRIO_HIGH_SWRITE].disp_quantum, 0);
+SHOW_FUNCTION(row_rp_swrite_quantum_show,
+ rowd->row_queues[ROWQ_PRIO_REG_SWRITE].disp_quantum, 0);
+SHOW_FUNCTION(row_rp_write_quantum_show,
+ rowd->row_queues[ROWQ_PRIO_REG_WRITE].disp_quantum, 0);
+SHOW_FUNCTION(row_lp_read_quantum_show,
+ rowd->row_queues[ROWQ_PRIO_LOW_READ].disp_quantum, 0);
+SHOW_FUNCTION(row_lp_swrite_quantum_show,
+ rowd->row_queues[ROWQ_PRIO_LOW_SWRITE].disp_quantum, 0);
+SHOW_FUNCTION(row_read_idle_show, rowd->read_idle.idle_time, 1);
+SHOW_FUNCTION(row_read_idle_freq_show, rowd->read_idle.freq, 1);
+#undef SHOW_FUNCTION
+
+#define STORE_FUNCTION(__FUNC, __PTR, MIN, MAX, __CONV) \
+static ssize_t __FUNC(struct elevator_queue *e, \
+ const char *page, size_t count) \
+{ \
+ struct row_data *rowd = e->elevator_data; \
+ int __data; \
+ int ret = row_var_store(&__data, (page), count); \
+ if (__CONV) \
+ __data = (int)msecs_to_jiffies(__data); \
+ if (__data < (MIN)) \
+ __data = (MIN); \
+ else if (__data > (MAX)) \
+ __data = (MAX); \
+ *(__PTR) = __data; \
+ return ret; \
+}
+STORE_FUNCTION(row_hp_read_quantum_store,
+ &rowd->row_queues[ROWQ_PRIO_HIGH_READ].disp_quantum, 0,
+ INT_MAX, 0);
+STORE_FUNCTION(row_rp_read_quantum_store,
+ &rowd->row_queues[ROWQ_PRIO_REG_READ].disp_quantum, 0,
+ INT_MAX, 0);
+STORE_FUNCTION(row_hp_swrite_quantum_store,
+ &rowd->row_queues[ROWQ_PRIO_HIGH_SWRITE].disp_quantum, 0,
+ INT_MAX, 0);
+STORE_FUNCTION(row_rp_swrite_quantum_store,
+ &rowd->row_queues[ROWQ_PRIO_REG_SWRITE].disp_quantum, 0,
+ INT_MAX, 0);
+STORE_FUNCTION(row_rp_write_quantum_store,
+ &rowd->row_queues[ROWQ_PRIO_REG_WRITE].disp_quantum, 0,
+ INT_MAX, 0);
+STORE_FUNCTION(row_lp_read_quantum_store,
+ &rowd->row_queues[ROWQ_PRIO_LOW_READ].disp_quantum, 0,
+ INT_MAX, 0);
+STORE_FUNCTION(row_lp_swrite_quantum_store,
+ &rowd->row_queues[ROWQ_PRIO_LOW_SWRITE].disp_quantum, 0,
+ INT_MAX, 1);
+STORE_FUNCTION(row_read_idle_store, &rowd->read_idle.idle_time, 1, INT_MAX, 1);
+STORE_FUNCTION(row_read_idle_freq_store, &rowd->read_idle.freq,
+ 1, INT_MAX, 1);
+
+#undef STORE_FUNCTION
+
+#define ROW_ATTR(name) \
+ __ATTR(name, S_IRUGO|S_IWUSR, row_##name##_show, \
+ row_##name##_store)
+
+static struct elv_fs_entry row_attrs[] = {
+ ROW_ATTR(hp_read_quantum),
+ ROW_ATTR(rp_read_quantum),
+ ROW_ATTR(hp_swrite_quantum),
+ ROW_ATTR(rp_swrite_quantum),
+ ROW_ATTR(rp_write_quantum),
+ ROW_ATTR(lp_read_quantum),
+ ROW_ATTR(lp_swrite_quantum),
+ ROW_ATTR(read_idle),
+ ROW_ATTR(read_idle_freq),
+ __ATTR_NULL
+};
+
+static struct elevator_type iosched_row = {
+ .ops = {
+ .elevator_merge_req_fn = row_merged_requests,
+ .elevator_dispatch_fn = row_dispatch_requests,
+ .elevator_add_req_fn = row_add_request,
+ .elevator_former_req_fn = elv_rb_former_request,
+ .elevator_latter_req_fn = elv_rb_latter_request,
+ .elevator_set_req_fn = row_set_request,
+ .elevator_init_fn = row_init_queue,
+ .elevator_exit_fn = row_exit_queue,
+ },
+
+ .elevator_attrs = row_attrs,
+ .elevator_name = "row",
+ .elevator_owner = THIS_MODULE,
+};
+
+static int __init row_init(void)
+{
+ elv_register(&iosched_row);
+ return 0;
+}
+
+static void __exit row_exit(void)
+{
+ elv_unregister(&iosched_row);
+}
+
+module_init(row_init);
+module_exit(row_exit);
+
+MODULE_LICENSE("GPLv2");
+MODULE_DESCRIPTION("Read Over Write IO scheduler");
diff --git a/drivers/base/sync.c b/drivers/base/sync.c
index 9bc0da5..c0690c8 100644
--- a/drivers/base/sync.c
+++ b/drivers/base/sync.c
@@ -218,8 +218,10 @@
spin_lock_irqsave(&obj->active_list_lock, flags);
err = _sync_pt_has_signaled(pt);
- if (err != 0)
+ if (err != 0) {
+ sync_fence_signal_pt(pt);
goto out;
+ }
list_add_tail(&pt->active_list, &obj->active_list_head);
diff --git a/drivers/bluetooth/hci_ibs.c b/drivers/bluetooth/hci_ibs.c
index 6253605..acff5a5 100644
--- a/drivers/bluetooth/hci_ibs.c
+++ b/drivers/bluetooth/hci_ibs.c
@@ -254,13 +254,14 @@
struct ibs_struct *ibs = container_of(work, struct ibs_struct,
ws_awake_device);
struct hci_uart *hu = (struct hci_uart *)ibs->ibs_hu;
+ unsigned long flags;
BT_DBG(" %p ", hu);
/* Vote for serial clock */
ibs_msm_serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu);
- spin_lock(&ibs->hci_ibs_lock);
+ spin_lock_irqsave(&ibs->hci_ibs_lock, flags);
/* send wake indication to device */
if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0)
@@ -271,7 +272,8 @@
/* start retransmit timer */
mod_timer(&ibs->wake_retrans_timer, jiffies + wake_retrans);
- spin_unlock(&ibs->hci_ibs_lock);
+ spin_unlock_irqrestore(&ibs->hci_ibs_lock, flags);
+
}
static void ibs_wq_awake_rx(struct work_struct *work)
@@ -279,12 +281,14 @@
struct ibs_struct *ibs = container_of(work, struct ibs_struct,
ws_awake_rx);
struct hci_uart *hu = (struct hci_uart *)ibs->ibs_hu;
+ unsigned long flags;
BT_DBG(" %p ", hu);
ibs_msm_serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu);
- spin_lock(&ibs->hci_ibs_lock);
+ spin_lock_irqsave(&ibs->hci_ibs_lock, flags);
+
ibs->rx_ibs_state = HCI_IBS_RX_AWAKE;
/* Always acknowledge device wake up,
* sending IBS message doesn't count as TX ON
@@ -294,7 +298,8 @@
ibs->ibs_sent_wacks++; /* debug */
- spin_unlock(&ibs->hci_ibs_lock);
+ spin_unlock_irqrestore(&ibs->hci_ibs_lock, flags);
+
/* actually send the packets */
hci_uart_tx_wakeup(hu);
diff --git a/drivers/char/diag/Makefile b/drivers/char/diag/Makefile
index ea75ffd..6ecc970 100644
--- a/drivers/char/diag/Makefile
+++ b/drivers/char/diag/Makefile
@@ -2,4 +2,4 @@
obj-$(CONFIG_DIAG_SDIO_PIPE) += diagfwd_sdio.o
obj-$(CONFIG_DIAG_BRIDGE_CODE) += diagfwd_hsic.o
obj-$(CONFIG_DIAG_BRIDGE_CODE) += diagfwd_smux.o
-diagchar-objs := diagchar_core.o diagchar_hdlc.o diagfwd.o diagmem.o diagfwd_cntl.o diag_dci.o
+diagchar-objs := diagchar_core.o diagchar_hdlc.o diagfwd.o diagmem.o diagfwd_cntl.o diag_dci.o diag_masks.o diag_debugfs.o
diff --git a/drivers/char/diag/diag_debugfs.c b/drivers/char/diag/diag_debugfs.c
new file mode 100644
index 0000000..ed0f08e
--- /dev/null
+++ b/drivers/char/diag/diag_debugfs.c
@@ -0,0 +1,305 @@
+/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifdef CONFIG_DEBUG_FS
+
+#include <linux/slab.h>
+#include <linux/debugfs.h>
+#include "diagchar.h"
+#include "diagfwd.h"
+
+#define DEBUG_BUF_SIZE 4096
+static struct dentry *diag_dbgfs_dent;
+static int diag_dbgfs_table_index;
+
+static ssize_t diag_dbgfs_read_status(struct file *file, char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ char *buf;
+ int ret;
+
+ buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
+ if (!buf) {
+ pr_err("diag: %s, Error allocating memory\n", __func__);
+ return -ENOMEM;
+ }
+
+ ret = scnprintf(buf, DEBUG_BUF_SIZE,
+ "modem ch: 0x%x\n"
+ "lpass ch: 0x%x\n"
+ "riva ch: 0x%x\n"
+ "dci ch: 0x%x\n"
+ "modem cntl_ch: 0x%x\n"
+ "lpass cntl_ch: 0x%x\n"
+ "riva cntl_ch: 0x%x\n"
+ "CPU Tools id: %d\n"
+ "Apps only: %d\n"
+ "Apps master: %d\n"
+ "Check Polling Response: %d\n"
+ "polling_reg_flag: %d\n"
+ "uses device tree: %d\n"
+ "in_busy_1: %d\n"
+ "in_busy_2: %d\n"
+ "in_busy_lpass_1: %d\n"
+ "in_busy_lpass_2: %d\n"
+ "in_busy_wcnss_1: %d\n"
+ "in_busy_wcnss_2: %d\n"
+ "in_busy_dci: %d\n"
+ "logging_mode: %d\n",
+ (unsigned int)driver->ch,
+ (unsigned int)driver->chlpass,
+ (unsigned int)driver->ch_wcnss,
+ (unsigned int)driver->ch_dci,
+ (unsigned int)driver->ch_cntl,
+ (unsigned int)driver->chlpass_cntl,
+ (unsigned int)driver->ch_wcnss_cntl,
+ chk_config_get_id(),
+ chk_apps_only(),
+ chk_apps_master(),
+ chk_polling_response(),
+ driver->polling_reg_flag,
+ driver->use_device_tree,
+ driver->in_busy_1,
+ driver->in_busy_2,
+ driver->in_busy_lpass_1,
+ driver->in_busy_lpass_2,
+ driver->in_busy_wcnss_1,
+ driver->in_busy_wcnss_2,
+ driver->in_busy_dci,
+ driver->logging_mode);
+
+#ifdef CONFIG_DIAG_OVER_USB
+ ret += scnprintf(buf+ret, DEBUG_BUF_SIZE,
+ "usb_connected: %d\n",
+ driver->usb_connected);
+#endif
+ ret = simple_read_from_buffer(ubuf, count, ppos, buf, ret);
+
+ kfree(buf);
+ return ret;
+}
+
+static ssize_t diag_dbgfs_read_workpending(struct file *file,
+ char __user *ubuf, size_t count, loff_t *ppos)
+{
+ char *buf;
+ int ret;
+
+ buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
+ if (!buf) {
+ pr_err("diag: %s, Error allocating memory\n", __func__);
+ return -ENOMEM;
+ }
+
+ ret = scnprintf(buf, DEBUG_BUF_SIZE,
+ "Pending status for work_stucts:\n"
+ "diag_drain_work: %d\n"
+ "diag_read_smd_work: %d\n"
+ "diag_read_smd_cntl_work: %d\n"
+ "diag_read_smd_lpass_work: %d\n"
+ "diag_read_smd_lpass_cntl_work: %d\n"
+ "diag_read_smd_wcnss_work: %d\n"
+ "diag_read_smd_wcnss_cntl_work: %d\n"
+ "diag_modem_mask_update_work: %d\n"
+ "diag_lpass_mask_update_work: %d\n"
+ "diag_wcnss_mask_update_work: %d\n"
+ "diag_read_smd_dci_work: %d\n",
+ work_pending(&(driver->diag_drain_work)),
+ work_pending(&(driver->diag_read_smd_work)),
+ work_pending(&(driver->diag_read_smd_cntl_work)),
+ work_pending(&(driver->diag_read_smd_lpass_work)),
+ work_pending(&(driver->diag_read_smd_lpass_cntl_work)),
+ work_pending(&(driver->diag_read_smd_wcnss_work)),
+ work_pending(&(driver->diag_read_smd_wcnss_cntl_work)),
+ work_pending(&(driver->diag_modem_mask_update_work)),
+ work_pending(&(driver->diag_lpass_mask_update_work)),
+ work_pending(&(driver->diag_wcnss_mask_update_work)),
+ work_pending(&(driver->diag_read_smd_dci_work)));
+
+#ifdef CONFIG_DIAG_OVER_USB
+ ret += scnprintf(buf+ret, DEBUG_BUF_SIZE,
+ "diag_proc_hdlc_work: %d\n"
+ "diag_read_work: %d\n",
+ work_pending(&(driver->diag_proc_hdlc_work)),
+ work_pending(&(driver->diag_read_work)));
+#endif
+ ret = simple_read_from_buffer(ubuf, count, ppos, buf, ret);
+
+ kfree(buf);
+ return ret;
+}
+
+static ssize_t diag_dbgfs_read_table(struct file *file, char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ char *buf;
+ int ret = 0;
+ int i;
+ int bytes_remaining;
+ int bytes_in_buffer = 0;
+ int bytes_written;
+ int buf_size = (DEBUG_BUF_SIZE < count) ? DEBUG_BUF_SIZE : count;
+
+ if (diag_dbgfs_table_index >= diag_max_reg) {
+ /* Done. Reset to prepare for future requests */
+ diag_dbgfs_table_index = 0;
+ return 0;
+ }
+
+ buf = kzalloc(sizeof(char) * buf_size, GFP_KERNEL);
+ if (!buf) {
+ pr_err("diag: %s, Error allocating memory\n", __func__);
+ return -ENOMEM;
+ }
+
+ bytes_remaining = buf_size;
+ for (i = diag_dbgfs_table_index; i < diag_max_reg; i++) {
+ /* Do not process empty entries in the table */
+ if (driver->table[i].process_id == 0)
+ continue;
+
+ bytes_written = scnprintf(buf+bytes_in_buffer, bytes_remaining,
+ "i: %3d, cmd_code: %4x, subsys_id: %4x, "
+ "client: %2d, cmd_code_lo: %4x, "
+ "cmd_code_hi: %4x, process_id: %5d\n",
+ i,
+ driver->table[i].cmd_code,
+ driver->table[i].subsys_id,
+ driver->table[i].client_id,
+ driver->table[i].cmd_code_lo,
+ driver->table[i].cmd_code_hi,
+ driver->table[i].process_id);
+
+ bytes_in_buffer += bytes_written;
+
+ /* Check if there is room to add another table entry */
+ bytes_remaining = buf_size - bytes_in_buffer;
+ if (bytes_remaining < bytes_written)
+ break;
+ }
+ diag_dbgfs_table_index = i;
+
+ *ppos = 0;
+ ret = simple_read_from_buffer(ubuf, count, ppos, buf, bytes_in_buffer);
+
+ kfree(buf);
+ return ret;
+}
+
+#ifdef CONFIG_DIAG_BRIDGE_CODE
+static ssize_t diag_dbgfs_read_hsic(struct file *file, char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ char *buf;
+ int ret;
+
+ buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
+ if (!buf) {
+ pr_err("diag: %s, Error allocating memory\n", __func__);
+ return -ENOMEM;
+ }
+
+ ret = scnprintf(buf, DEBUG_BUF_SIZE,
+ "hsic ch: %d\n"
+ "hsic_inited: %d\n"
+ "hsic enabled: %d\n"
+ "hsic_opened: %d\n"
+ "hsic_suspend: %d\n"
+ "in_busy_hsic_read_on_device: %d\n"
+ "in_busy_hsic_write: %d\n"
+ "count_hsic_pool: %d\n"
+ "count_hsic_write_pool: %d\n"
+ "diag_hsic_pool: %x\n"
+ "diag_hsic_write_pool: %x\n"
+ "write_len_mdm: %d\n"
+ "num_hsic_buf_tbl_entries: %d\n"
+ "usb_mdm_connected: %d\n"
+ "diag_read_mdm_work: %d\n"
+ "diag_read_hsic_work: %d\n"
+ "diag_disconnect_work: %d\n"
+ "diag_usb_read_complete_work: %d\n",
+ driver->hsic_ch,
+ driver->hsic_inited,
+ driver->hsic_device_enabled,
+ driver->hsic_device_opened,
+ driver->hsic_suspend,
+ driver->in_busy_hsic_read_on_device,
+ driver->in_busy_hsic_write,
+ driver->count_hsic_pool,
+ driver->count_hsic_write_pool,
+ (unsigned int)driver->diag_hsic_pool,
+ (unsigned int)driver->diag_hsic_write_pool,
+ driver->write_len_mdm,
+ driver->num_hsic_buf_tbl_entries,
+ driver->usb_mdm_connected,
+ work_pending(&(driver->diag_read_mdm_work)),
+ work_pending(&(driver->diag_read_hsic_work)),
+ work_pending(&(driver->diag_disconnect_work)),
+ work_pending(&(driver->diag_usb_read_complete_work)));
+
+ ret = simple_read_from_buffer(ubuf, count, ppos, buf, ret);
+
+ kfree(buf);
+ return ret;
+}
+
+const struct file_operations diag_dbgfs_hsic_ops = {
+ .read = diag_dbgfs_read_hsic,
+};
+#endif
+
+const struct file_operations diag_dbgfs_status_ops = {
+ .read = diag_dbgfs_read_status,
+};
+
+const struct file_operations diag_dbgfs_table_ops = {
+ .read = diag_dbgfs_read_table,
+};
+
+const struct file_operations diag_dbgfs_workpending_ops = {
+ .read = diag_dbgfs_read_workpending,
+};
+
+void diag_debugfs_init(void)
+{
+ diag_dbgfs_dent = debugfs_create_dir("diag", 0);
+ if (IS_ERR(diag_dbgfs_dent))
+ return;
+
+ debugfs_create_file("status", 0444, diag_dbgfs_dent, 0,
+ &diag_dbgfs_status_ops);
+
+ debugfs_create_file("table", 0444, diag_dbgfs_dent, 0,
+ &diag_dbgfs_table_ops);
+
+ debugfs_create_file("work_pending", 0444, diag_dbgfs_dent, 0,
+ &diag_dbgfs_workpending_ops);
+
+#ifdef CONFIG_DIAG_BRIDGE_CODE
+ debugfs_create_file("hsic", 0444, diag_dbgfs_dent, 0,
+ &diag_dbgfs_hsic_ops);
+#endif
+
+ diag_dbgfs_table_index = 0;
+}
+
+void diag_debugfs_cleanup(void)
+{
+ if (diag_dbgfs_dent) {
+ debugfs_remove_recursive(diag_dbgfs_dent);
+ diag_dbgfs_dent = NULL;
+ }
+}
+#else
+void diag_debugfs_init(void) { }
+void diag_debugfs_cleanup(void) { }
+#endif
diff --git a/drivers/char/diag/diag_debugfs.h b/drivers/char/diag/diag_debugfs.h
new file mode 100644
index 0000000..4bc8b0f
--- /dev/null
+++ b/drivers/char/diag/diag_debugfs.h
@@ -0,0 +1,19 @@
+/* Copyright (c)2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef DIAG_DEBUGFS_H
+#define DIAG_DEBUGFS_H
+
+void diag_debugfs_init(void);
+void diag_debugfs_cleanup(void);
+
+#endif
diff --git a/drivers/char/diag/diag_masks.c b/drivers/char/diag/diag_masks.c
new file mode 100644
index 0000000..5316548
--- /dev/null
+++ b/drivers/char/diag/diag_masks.c
@@ -0,0 +1,790 @@
+/* Copyright (c) 2008-2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/diagchar.h>
+#include <linux/kmemleak.h>
+#include <linux/workqueue.h>
+#include "diagchar.h"
+#include "diagfwd_cntl.h"
+#include "diag_masks.h"
+
+int diag_event_config;
+int diag_event_num_bytes;
+
+#define ALL_EQUIP_ID 100
+#define ALL_SSID -1
+#define MAX_SSID_PER_RANGE 100
+
+struct mask_info {
+ int equip_id;
+ int num_items;
+ int index;
+};
+
+#define CREATE_MSG_MASK_TBL_ROW(XX) \
+do { \
+ *(int *)(msg_mask_tbl_ptr) = MSG_SSID_ ## XX; \
+ msg_mask_tbl_ptr += 4; \
+ *(int *)(msg_mask_tbl_ptr) = MSG_SSID_ ## XX ## _LAST; \
+ msg_mask_tbl_ptr += 4; \
+ /* mimic the last entry as actual_last while creation */ \
+ *(int *)(msg_mask_tbl_ptr) = MSG_SSID_ ## XX ## _LAST; \
+ msg_mask_tbl_ptr += 4; \
+ /* increment by MAX_SSID_PER_RANGE cells */ \
+ msg_mask_tbl_ptr += MAX_SSID_PER_RANGE * sizeof(int); \
+} while (0)
+
+#define WAIT_FOR_SMD(num_delays, delay_time) \
+do { \
+ int count; \
+ for (count = 0; count < (num_delays); count++) \
+ udelay((delay_time)); \
+} while (0)
+
+static void diag_print_mask_table(void)
+{
+/* Enable this to print mask table when updated */
+#ifdef MASK_DEBUG
+ int first, last, actual_last;
+ uint8_t *ptr = driver->msg_masks;
+ int i = 0;
+ pr_info("diag: F3 message mask table\n");
+ while (*(uint32_t *)(ptr + 4)) {
+ first = *(uint32_t *)ptr;
+ ptr += 4;
+ last = *(uint32_t *)ptr;
+ ptr += 4;
+ actual_last = *(uint32_t *)ptr;
+ ptr += 4;
+ pr_info("diag: SSID %d, %d - %d\n", first, last, actual_last);
+ for (i = 0 ; i <= actual_last - first ; i++)
+ pr_info("diag: MASK:%x\n", *((uint32_t *)ptr + i));
+ ptr += MAX_SSID_PER_RANGE*4;
+ }
+#endif
+}
+
+void diag_create_msg_mask_table(void)
+{
+ uint8_t *msg_mask_tbl_ptr = driver->msg_masks;
+
+ CREATE_MSG_MASK_TBL_ROW(0);
+ CREATE_MSG_MASK_TBL_ROW(1);
+ CREATE_MSG_MASK_TBL_ROW(2);
+ CREATE_MSG_MASK_TBL_ROW(3);
+ CREATE_MSG_MASK_TBL_ROW(4);
+ CREATE_MSG_MASK_TBL_ROW(5);
+ CREATE_MSG_MASK_TBL_ROW(6);
+ CREATE_MSG_MASK_TBL_ROW(7);
+ CREATE_MSG_MASK_TBL_ROW(8);
+ CREATE_MSG_MASK_TBL_ROW(9);
+ CREATE_MSG_MASK_TBL_ROW(10);
+ CREATE_MSG_MASK_TBL_ROW(11);
+ CREATE_MSG_MASK_TBL_ROW(12);
+ CREATE_MSG_MASK_TBL_ROW(13);
+ CREATE_MSG_MASK_TBL_ROW(14);
+ CREATE_MSG_MASK_TBL_ROW(15);
+ CREATE_MSG_MASK_TBL_ROW(16);
+ CREATE_MSG_MASK_TBL_ROW(17);
+ CREATE_MSG_MASK_TBL_ROW(18);
+ CREATE_MSG_MASK_TBL_ROW(19);
+ CREATE_MSG_MASK_TBL_ROW(20);
+ CREATE_MSG_MASK_TBL_ROW(21);
+ CREATE_MSG_MASK_TBL_ROW(22);
+ CREATE_MSG_MASK_TBL_ROW(23);
+}
+
+static void diag_set_msg_mask(int rt_mask)
+{
+ int first_ssid, last_ssid, i;
+ uint8_t *parse_ptr, *ptr = driver->msg_masks;
+
+ mutex_lock(&driver->diagchar_mutex);
+ while (*(uint32_t *)(ptr + 4)) {
+ first_ssid = *(uint32_t *)ptr;
+ ptr += 8; /* increment by 8 to skip 'last' */
+ last_ssid = *(uint32_t *)ptr;
+ ptr += 4;
+ parse_ptr = ptr;
+ pr_debug("diag: updating range %d %d\n", first_ssid, last_ssid);
+ for (i = 0; i < last_ssid - first_ssid + 1; i++) {
+ *(int *)parse_ptr = rt_mask;
+ parse_ptr += 4;
+ }
+ ptr += MAX_SSID_PER_RANGE * 4;
+ }
+ mutex_unlock(&driver->diagchar_mutex);
+}
+
+static void diag_update_msg_mask(int start, int end , uint8_t *buf)
+{
+ int found = 0, first, last, actual_last;
+ uint8_t *actual_last_ptr;
+ uint8_t *ptr = driver->msg_masks;
+ uint8_t *ptr_buffer_start = &(*(driver->msg_masks));
+ uint8_t *ptr_buffer_end = &(*(driver->msg_masks)) + MSG_MASK_SIZE;
+
+ mutex_lock(&driver->diagchar_mutex);
+
+ /* First SSID can be zero : So check that last is non-zero */
+ while (*(uint32_t *)(ptr + 4)) {
+ first = *(uint32_t *)ptr;
+ ptr += 4;
+ last = *(uint32_t *)ptr;
+ ptr += 4;
+ actual_last = *(uint32_t *)ptr;
+ actual_last_ptr = ptr;
+ ptr += 4;
+ if (start >= first && start <= actual_last) {
+ ptr += (start - first)*4;
+ if (end > actual_last) {
+ pr_info("diag: ssid range mismatch\n");
+ actual_last = end;
+ *(uint32_t *)(actual_last_ptr) = end;
+ }
+ if (CHK_OVERFLOW(ptr_buffer_start, ptr, ptr_buffer_end,
+ (((end - start)+1)*4))) {
+ pr_debug("diag: update ssid start %d, end %d\n",
+ start, end);
+ memcpy(ptr, buf , ((end - start)+1)*4);
+ } else
+ pr_alert("diag: Not enough space MSG_MASK\n");
+ found = 1;
+ break;
+ } else {
+ ptr += MAX_SSID_PER_RANGE*4;
+ }
+ }
+ /* Entry was not found - add new table */
+ if (!found) {
+ if (CHK_OVERFLOW(ptr_buffer_start, ptr, ptr_buffer_end,
+ 8 + ((end - start) + 1)*4)) {
+ memcpy(ptr, &(start) , 4);
+ ptr += 4;
+ memcpy(ptr, &(end), 4);
+ ptr += 4;
+ memcpy(ptr, &(end), 4); /* create actual_last entry */
+ ptr += 4;
+ pr_debug("diag: adding NEW ssid start %d, end %d\n",
+ start, end);
+ memcpy(ptr, buf , ((end - start) + 1)*4);
+ } else
+ pr_alert("diag: Not enough buffer space for MSG_MASK\n");
+ }
+ mutex_unlock(&driver->diagchar_mutex);
+ diag_print_mask_table();
+}
+
+void diag_toggle_event_mask(int toggle)
+{
+ uint8_t *ptr = driver->event_masks;
+
+ mutex_lock(&driver->diagchar_mutex);
+ if (toggle)
+ memset(ptr, 0xFF, EVENT_MASK_SIZE);
+ else
+ memset(ptr, 0, EVENT_MASK_SIZE);
+ mutex_unlock(&driver->diagchar_mutex);
+}
+
+
+static void diag_update_event_mask(uint8_t *buf, int toggle, int num_bytes)
+{
+ uint8_t *ptr = driver->event_masks;
+ uint8_t *temp = buf + 2;
+
+ mutex_lock(&driver->diagchar_mutex);
+ if (!toggle)
+ memset(ptr, 0 , EVENT_MASK_SIZE);
+ else
+ if (CHK_OVERFLOW(ptr, ptr,
+ ptr+EVENT_MASK_SIZE, num_bytes))
+ memcpy(ptr, temp , num_bytes);
+ else
+ printk(KERN_CRIT "Not enough buffer space for EVENT_MASK\n");
+ mutex_unlock(&driver->diagchar_mutex);
+}
+
+static void diag_disable_log_mask(void)
+{
+ int i = 0;
+ struct mask_info *parse_ptr = (struct mask_info *)(driver->log_masks);
+
+ pr_debug("diag: disable log masks\n");
+ mutex_lock(&driver->diagchar_mutex);
+ for (i = 0; i < MAX_EQUIP_ID; i++) {
+ pr_debug("diag: equip id %d\n", parse_ptr->equip_id);
+ if (!(parse_ptr->equip_id)) /* Reached a null entry */
+ break;
+ memset(driver->log_masks + parse_ptr->index, 0,
+ (parse_ptr->num_items + 7)/8);
+ parse_ptr++;
+ }
+ mutex_unlock(&driver->diagchar_mutex);
+}
+
+int chk_equip_id_and_mask(int equip_id, uint8_t *buf)
+{
+ int i = 0, flag = 0, num_items, offset;
+ unsigned char *ptr_data;
+ struct mask_info *ptr = (struct mask_info *)(driver->log_masks);
+
+ pr_debug("diag: received equip id = %d\n", equip_id);
+ /* Check if this is valid equipment ID */
+ for (i = 0; i < MAX_EQUIP_ID; i++) {
+ if ((ptr->equip_id == equip_id) && (ptr->index != 0)) {
+ offset = ptr->index;
+ num_items = ptr->num_items;
+ flag = 1;
+ break;
+ }
+ ptr++;
+ }
+ if (!flag)
+ return -EPERM;
+ ptr_data = driver->log_masks + offset;
+ memcpy(buf, ptr_data, (num_items+7)/8);
+ return 0;
+}
+
+static void diag_update_log_mask(int equip_id, uint8_t *buf, int num_items)
+{
+ uint8_t *temp = buf;
+ int i = 0;
+ unsigned char *ptr_data;
+ int offset = (sizeof(struct mask_info))*MAX_EQUIP_ID;
+ struct mask_info *ptr = (struct mask_info *)(driver->log_masks);
+
+ pr_debug("diag: received equip id = %d\n", equip_id);
+ mutex_lock(&driver->diagchar_mutex);
+ /* Check if we already know index of this equipment ID */
+ for (i = 0; i < MAX_EQUIP_ID; i++) {
+ if ((ptr->equip_id == equip_id) && (ptr->index != 0)) {
+ offset = ptr->index;
+ break;
+ }
+ if ((ptr->equip_id == 0) && (ptr->index == 0)) {
+ /* Reached a null entry */
+ ptr->equip_id = equip_id;
+ ptr->num_items = num_items;
+ ptr->index = driver->log_masks_length;
+ offset = driver->log_masks_length;
+ driver->log_masks_length += ((num_items+7)/8);
+ break;
+ }
+ ptr++;
+ }
+ ptr_data = driver->log_masks + offset;
+ if (CHK_OVERFLOW(driver->log_masks, ptr_data, driver->log_masks
+ + LOG_MASK_SIZE, (num_items+7)/8))
+ memcpy(ptr_data, temp , (num_items+7)/8);
+ else
+ pr_err("diag: Not enough buffer space for LOG_MASK\n");
+ mutex_unlock(&driver->diagchar_mutex);
+}
+
+void diag_modem_mask_update_fn(struct work_struct *work)
+{
+ diag_send_msg_mask_update(driver->ch_cntl, ALL_SSID,
+ ALL_SSID, MODEM_PROC);
+ diag_send_log_mask_update(driver->ch_cntl, ALL_EQUIP_ID);
+ diag_send_event_mask_update(driver->ch_cntl, diag_event_num_bytes);
+}
+
+void diag_lpass_mask_update_fn(struct work_struct *work)
+{
+ diag_send_msg_mask_update(driver->chlpass_cntl, ALL_SSID,
+ ALL_SSID, LPASS_PROC);
+ diag_send_log_mask_update(driver->chlpass_cntl, ALL_EQUIP_ID);
+ diag_send_event_mask_update(driver->chlpass_cntl, diag_event_num_bytes);
+}
+
+void diag_wcnss_mask_update_fn(struct work_struct *work)
+{
+ diag_send_msg_mask_update(driver->ch_wcnss_cntl, ALL_SSID,
+ ALL_SSID, WCNSS_PROC);
+ diag_send_log_mask_update(driver->ch_wcnss_cntl, ALL_EQUIP_ID);
+ diag_send_event_mask_update(driver->ch_wcnss_cntl,
+ diag_event_num_bytes);
+}
+
+void diag_send_log_mask_update(smd_channel_t *ch, int equip_id)
+{
+ void *buf = driver->buf_log_mask_update;
+ int header_size = sizeof(struct diag_ctrl_log_mask);
+ struct mask_info *ptr = (struct mask_info *)driver->log_masks;
+ int i, size, wr_size = -ENOMEM, retry_count = 0;
+
+ mutex_lock(&driver->diag_cntl_mutex);
+ for (i = 0; i < MAX_EQUIP_ID; i++) {
+ size = (ptr->num_items+7)/8;
+ /* reached null entry */
+ if ((ptr->equip_id == 0) && (ptr->index == 0))
+ break;
+ driver->log_mask->cmd_type = DIAG_CTRL_MSG_LOG_MASK;
+ driver->log_mask->num_items = ptr->num_items;
+ driver->log_mask->data_len = 11 + size;
+ driver->log_mask->stream_id = 1; /* 2, if dual stream */
+ driver->log_mask->status = 3; /* status for valid mask */
+ driver->log_mask->equip_id = ptr->equip_id;
+ driver->log_mask->log_mask_size = size;
+ /* send only desired update, NOT ALL */
+ if (equip_id == ALL_EQUIP_ID || equip_id ==
+ driver->log_mask->equip_id) {
+ memcpy(buf, driver->log_mask, header_size);
+ memcpy(buf+header_size, driver->log_masks+ptr->index,
+ size);
+ if (ch) {
+ while (retry_count < 3) {
+ wr_size = smd_write(ch, buf,
+ header_size + size);
+ if (wr_size == -ENOMEM) {
+ retry_count++;
+ WAIT_FOR_SMD(5, 2000);
+ } else
+ break;
+ }
+ if (wr_size != header_size + size)
+ pr_err("diag: log mask update failed %d, tried %d",
+ wr_size, header_size + size);
+ else
+ pr_debug("diag: updated log equip ID %d,len %d\n",
+ driver->log_mask->equip_id,
+ driver->log_mask->log_mask_size);
+ } else
+ pr_err("diag: ch not valid for log update\n");
+ }
+ ptr++;
+ }
+ mutex_unlock(&driver->diag_cntl_mutex);
+}
+
+void diag_send_event_mask_update(smd_channel_t *ch, int num_bytes)
+{
+ void *buf = driver->buf_event_mask_update;
+ int header_size = sizeof(struct diag_ctrl_event_mask);
+ int wr_size = -ENOMEM, retry_count = 0;
+
+ mutex_lock(&driver->diag_cntl_mutex);
+ if (num_bytes == 0) {
+ pr_debug("diag: event mask not set yet, so no update\n");
+ mutex_unlock(&driver->diag_cntl_mutex);
+ return;
+ }
+ /* send event mask update */
+ driver->event_mask->cmd_type = DIAG_CTRL_MSG_EVENT_MASK;
+ driver->event_mask->data_len = 7 + num_bytes;
+ driver->event_mask->stream_id = 1; /* 2, if dual stream */
+ driver->event_mask->status = 3; /* status for valid mask */
+ driver->event_mask->event_config = diag_event_config; /* event config */
+ driver->event_mask->event_mask_size = num_bytes;
+ memcpy(buf, driver->event_mask, header_size);
+ memcpy(buf+header_size, driver->event_masks, num_bytes);
+ if (ch) {
+ while (retry_count < 3) {
+ wr_size = smd_write(ch, buf, header_size + num_bytes);
+ if (wr_size == -ENOMEM) {
+ retry_count++;
+ WAIT_FOR_SMD(5, 2000);
+ } else
+ break;
+ }
+ if (wr_size != header_size + num_bytes)
+ pr_err("diag: error writing event mask %d, tried %d\n",
+ wr_size, header_size + num_bytes);
+ } else
+ pr_err("diag: ch not valid for event update\n");
+ mutex_unlock(&driver->diag_cntl_mutex);
+}
+
+void diag_send_msg_mask_update(smd_channel_t *ch, int updated_ssid_first,
+ int updated_ssid_last, int proc)
+{
+ void *buf = driver->buf_msg_mask_update;
+ int first, last, actual_last, size = -ENOMEM, retry_count = 0;
+ int header_size = sizeof(struct diag_ctrl_msg_mask);
+ uint8_t *ptr = driver->msg_masks;
+
+ mutex_lock(&driver->diag_cntl_mutex);
+ while (*(uint32_t *)(ptr + 4)) {
+ first = *(uint32_t *)ptr;
+ ptr += 4;
+ last = *(uint32_t *)ptr;
+ ptr += 4;
+ actual_last = *(uint32_t *)ptr;
+ ptr += 4;
+ if ((updated_ssid_first >= first && updated_ssid_last <=
+ actual_last) || (updated_ssid_first == ALL_SSID)) {
+ /* send f3 mask update */
+ driver->msg_mask->cmd_type = DIAG_CTRL_MSG_F3_MASK;
+ driver->msg_mask->msg_mask_size = actual_last -
+ first + 1;
+ driver->msg_mask->data_len = 11 +
+ 4 * (driver->msg_mask->msg_mask_size);
+ driver->msg_mask->stream_id = 1; /* 2, if dual stream */
+ driver->msg_mask->status = 3; /* status valid mask */
+ driver->msg_mask->msg_mode = 0; /* Legcay mode */
+ driver->msg_mask->ssid_first = first;
+ driver->msg_mask->ssid_last = actual_last;
+ memcpy(buf, driver->msg_mask, header_size);
+ memcpy(buf+header_size, ptr,
+ 4 * (driver->msg_mask->msg_mask_size));
+ if (ch) {
+ while (retry_count < 3) {
+ size = smd_write(ch, buf, header_size +
+ 4*(driver->msg_mask->msg_mask_size));
+ if (size == -ENOMEM) {
+ retry_count++;
+ WAIT_FOR_SMD(5, 2000);
+ } else
+ break;
+ }
+ if (size != header_size +
+ 4*(driver->msg_mask->msg_mask_size))
+ pr_err("diag: proc %d, msg mask update fail %d, tried %d\n",
+ proc, size, (header_size +
+ 4*(driver->msg_mask->msg_mask_size)));
+ else
+ pr_debug("diag: sending mask update for ssid first %d, last %d on PROC %d\n",
+ first, actual_last, proc);
+ } else
+ pr_err("diag: proc %d, ch invalid msg mask update\n",
+ proc);
+ }
+ ptr += MAX_SSID_PER_RANGE*4;
+ }
+ mutex_unlock(&driver->diag_cntl_mutex);
+}
+
+int diag_process_apps_masks(unsigned char *buf, int len)
+{
+ int packet_type = 1;
+ int i;
+ int ssid_first, ssid_last, ssid_range;
+ int rt_mask, rt_first_ssid, rt_last_ssid, rt_mask_size;
+ uint8_t *rt_mask_ptr;
+ int equip_id, num_items;
+#if defined(CONFIG_DIAG_OVER_USB)
+ int payload_length;
+#endif
+
+ /* Set log masks */
+ if (*buf == 0x73 && *(int *)(buf+4) == 3) {
+ buf += 8;
+ /* Read Equip ID and pass as first param below*/
+ diag_update_log_mask(*(int *)buf, buf+8, *(int *)(buf+4));
+ diag_update_userspace_clients(LOG_MASKS_TYPE);
+#if defined(CONFIG_DIAG_OVER_USB)
+ if (chk_apps_only()) {
+ driver->apps_rsp_buf[0] = 0x73;
+ *(int *)(driver->apps_rsp_buf + 4) = 0x3; /* op. ID */
+ *(int *)(driver->apps_rsp_buf + 8) = 0x0; /* success */
+ payload_length = 8 + ((*(int *)(buf + 4)) + 7)/8;
+ for (i = 0; i < payload_length; i++)
+ *(int *)(driver->apps_rsp_buf+12+i) = *(buf+i);
+ if (driver->ch_cntl)
+ diag_send_log_mask_update(driver->ch_cntl,
+ *(int *)buf);
+ if (driver->chlpass_cntl)
+ diag_send_log_mask_update(driver->chlpass_cntl,
+ *(int *)buf);
+ if (driver->ch_wcnss_cntl)
+ diag_send_log_mask_update(driver->ch_wcnss_cntl,
+ *(int *)buf);
+ encode_rsp_and_send(12 + payload_length - 1);
+ return 0;
+ }
+#endif
+ } /* Get log masks */
+ else if (*buf == 0x73 && *(int *)(buf+4) == 4) {
+#if defined(CONFIG_DIAG_OVER_USB)
+ if (!(driver->ch) && chk_apps_only()) {
+ equip_id = *(int *)(buf + 8);
+ num_items = *(int *)(buf + 12);
+ driver->apps_rsp_buf[0] = 0x73;
+ driver->apps_rsp_buf[1] = 0x0;
+ driver->apps_rsp_buf[2] = 0x0;
+ driver->apps_rsp_buf[3] = 0x0;
+ *(int *)(driver->apps_rsp_buf + 4) = 0x4;
+ if (!chk_equip_id_and_mask(equip_id,
+ driver->apps_rsp_buf+20))
+ *(int *)(driver->apps_rsp_buf + 8) = 0x0;
+ else
+ *(int *)(driver->apps_rsp_buf + 8) = 0x1;
+ *(int *)(driver->apps_rsp_buf + 12) = equip_id;
+ *(int *)(driver->apps_rsp_buf + 16) = num_items;
+ encode_rsp_and_send(20+(num_items+7)/8-1);
+ return 0;
+ }
+#endif
+ } /* Disable log masks */
+ else if (*buf == 0x73 && *(int *)(buf+4) == 0) {
+ /* Disable mask for each log code */
+ diag_disable_log_mask();
+ diag_update_userspace_clients(LOG_MASKS_TYPE);
+#if defined(CONFIG_DIAG_OVER_USB)
+ if (chk_apps_only()) {
+ driver->apps_rsp_buf[0] = 0x73;
+ driver->apps_rsp_buf[1] = 0x0;
+ driver->apps_rsp_buf[2] = 0x0;
+ driver->apps_rsp_buf[3] = 0x0;
+ *(int *)(driver->apps_rsp_buf + 4) = 0x0;
+ *(int *)(driver->apps_rsp_buf + 8) = 0x0; /* status */
+ if (driver->ch_cntl)
+ diag_send_log_mask_update(driver->ch_cntl,
+ ALL_EQUIP_ID);
+ if (driver->chlpass_cntl)
+ diag_send_log_mask_update(driver->chlpass_cntl,
+ ALL_EQUIP_ID);
+ if (driver->ch_wcnss_cntl)
+ diag_send_log_mask_update(driver->ch_wcnss_cntl,
+ ALL_EQUIP_ID);
+ encode_rsp_and_send(11);
+ return 0;
+ }
+#endif
+ } /* Get runtime message mask */
+ else if ((*buf == 0x7d) && (*(buf+1) == 0x3)) {
+ ssid_first = *(uint16_t *)(buf + 2);
+ ssid_last = *(uint16_t *)(buf + 4);
+#if defined(CONFIG_DIAG_OVER_USB)
+ if (!(driver->ch) && chk_apps_only()) {
+ driver->apps_rsp_buf[0] = 0x7d;
+ driver->apps_rsp_buf[1] = 0x3;
+ *(uint16_t *)(driver->apps_rsp_buf+2) = ssid_first;
+ *(uint16_t *)(driver->apps_rsp_buf+4) = ssid_last;
+ driver->apps_rsp_buf[6] = 0x1; /* Success Status */
+ driver->apps_rsp_buf[7] = 0x0;
+ rt_mask_ptr = driver->msg_masks;
+ while (*(uint32_t *)(rt_mask_ptr + 4)) {
+ rt_first_ssid = *(uint32_t *)rt_mask_ptr;
+ rt_mask_ptr += 8; /* +8 to skip 'last' */
+ rt_last_ssid = *(uint32_t *)rt_mask_ptr;
+ rt_mask_ptr += 4;
+ if (ssid_first == rt_first_ssid && ssid_last ==
+ rt_last_ssid) {
+ rt_mask_size = 4 * (rt_last_ssid -
+ rt_first_ssid + 1);
+ memcpy(driver->apps_rsp_buf+8,
+ rt_mask_ptr, rt_mask_size);
+ encode_rsp_and_send(8+rt_mask_size-1);
+ return 0;
+ }
+ rt_mask_ptr += MAX_SSID_PER_RANGE*4;
+ }
+ }
+#endif
+ } /* Set runtime message mask */
+ else if ((*buf == 0x7d) && (*(buf+1) == 0x4)) {
+ ssid_first = *(uint16_t *)(buf + 2);
+ ssid_last = *(uint16_t *)(buf + 4);
+ ssid_range = 4 * (ssid_last - ssid_first + 1);
+ pr_debug("diag: received mask update for ssid_first = %d, ssid_last = %d",
+ ssid_first, ssid_last);
+ diag_update_msg_mask(ssid_first, ssid_last , buf + 8);
+ diag_update_userspace_clients(MSG_MASKS_TYPE);
+#if defined(CONFIG_DIAG_OVER_USB)
+ if (chk_apps_only()) {
+ for (i = 0; i < 8 + ssid_range; i++)
+ *(driver->apps_rsp_buf + i) = *(buf+i);
+ *(driver->apps_rsp_buf + 6) = 0x1;
+ if (driver->ch_cntl)
+ diag_send_msg_mask_update(driver->ch_cntl,
+ ssid_first, ssid_last, MODEM_PROC);
+ if (driver->chlpass_cntl)
+ diag_send_msg_mask_update(driver->chlpass_cntl,
+ ssid_first, ssid_last, LPASS_PROC);
+ if (driver->ch_wcnss_cntl)
+ diag_send_msg_mask_update(driver->ch_wcnss_cntl,
+ ssid_first, ssid_last, WCNSS_PROC);
+ encode_rsp_and_send(8 + ssid_range - 1);
+ return 0;
+ }
+#endif
+ } /* Set ALL runtime message mask */
+ else if ((*buf == 0x7d) && (*(buf+1) == 0x5)) {
+ rt_mask = *(int *)(buf + 4);
+ diag_set_msg_mask(rt_mask);
+ diag_update_userspace_clients(MSG_MASKS_TYPE);
+#if defined(CONFIG_DIAG_OVER_USB)
+ if (chk_apps_only()) {
+ driver->apps_rsp_buf[0] = 0x7d; /* cmd_code */
+ driver->apps_rsp_buf[1] = 0x5; /* set subcommand */
+ driver->apps_rsp_buf[2] = 1; /* success */
+ driver->apps_rsp_buf[3] = 0; /* rsvd */
+ *(int *)(driver->apps_rsp_buf + 4) = rt_mask;
+ /* send msg mask update to peripheral */
+ if (driver->ch_cntl)
+ diag_send_msg_mask_update(driver->ch_cntl,
+ ALL_SSID, ALL_SSID, MODEM_PROC);
+ if (driver->chlpass_cntl)
+ diag_send_msg_mask_update(driver->chlpass_cntl,
+ ALL_SSID, ALL_SSID, LPASS_PROC);
+ if (driver->ch_wcnss_cntl)
+ diag_send_msg_mask_update(driver->ch_wcnss_cntl,
+ ALL_SSID, ALL_SSID, WCNSS_PROC);
+ encode_rsp_and_send(7);
+ return 0;
+ }
+#endif
+ } else if (*buf == 0x82) { /* event mask change */
+ buf += 4;
+ diag_event_num_bytes = (*(uint16_t *)buf)/8+1;
+ diag_update_event_mask(buf, 1, (*(uint16_t *)buf)/8+1);
+ diag_update_userspace_clients(EVENT_MASKS_TYPE);
+#if defined(CONFIG_DIAG_OVER_USB)
+ if (chk_apps_only()) {
+ driver->apps_rsp_buf[0] = 0x82;
+ driver->apps_rsp_buf[1] = 0x0;
+ *(uint16_t *)(driver->apps_rsp_buf + 2) = 0x0;
+ *(uint16_t *)(driver->apps_rsp_buf + 4) =
+ EVENT_LAST_ID + 1;
+ memcpy(driver->apps_rsp_buf+6, driver->event_masks,
+ EVENT_LAST_ID/8+1);
+ if (driver->ch_cntl)
+ diag_send_event_mask_update(driver->ch_cntl,
+ diag_event_num_bytes);
+ if (driver->chlpass_cntl)
+ diag_send_event_mask_update(
+ driver->chlpass_cntl,
+ diag_event_num_bytes);
+ if (driver->ch_wcnss_cntl)
+ diag_send_event_mask_update(
+ driver->ch_wcnss_cntl, diag_event_num_bytes);
+ encode_rsp_and_send(6 + EVENT_LAST_ID/8);
+ return 0;
+ }
+#endif
+ } else if (*buf == 0x60) {
+ diag_event_config = *(buf+1);
+ diag_toggle_event_mask(*(buf+1));
+ diag_update_userspace_clients(EVENT_MASKS_TYPE);
+#if defined(CONFIG_DIAG_OVER_USB)
+ if (chk_apps_only()) {
+ driver->apps_rsp_buf[0] = 0x60;
+ driver->apps_rsp_buf[1] = 0x0;
+ driver->apps_rsp_buf[2] = 0x0;
+ if (driver->ch_cntl)
+ diag_send_event_mask_update(driver->ch_cntl,
+ diag_event_num_bytes);
+ if (driver->chlpass_cntl)
+ diag_send_event_mask_update(
+ driver->chlpass_cntl,
+ diag_event_num_bytes);
+ if (driver->ch_wcnss_cntl)
+ diag_send_event_mask_update(
+ driver->ch_wcnss_cntl, diag_event_num_bytes);
+ encode_rsp_and_send(2);
+ return 0;
+ }
+#endif
+ }
+
+ return packet_type;
+}
+
+void diag_masks_init(void)
+{
+ if (driver->event_mask == NULL) {
+ driver->event_mask = kzalloc(sizeof(
+ struct diag_ctrl_event_mask), GFP_KERNEL);
+ if (driver->event_mask == NULL)
+ goto err;
+ kmemleak_not_leak(driver->event_mask);
+ }
+ if (driver->msg_mask == NULL) {
+ driver->msg_mask = kzalloc(sizeof(
+ struct diag_ctrl_msg_mask), GFP_KERNEL);
+ if (driver->msg_mask == NULL)
+ goto err;
+ kmemleak_not_leak(driver->msg_mask);
+ }
+ if (driver->log_mask == NULL) {
+ driver->log_mask = kzalloc(sizeof(
+ struct diag_ctrl_log_mask), GFP_KERNEL);
+ if (driver->log_mask == NULL)
+ goto err;
+ kmemleak_not_leak(driver->log_mask);
+ }
+
+ if (driver->buf_msg_mask_update == NULL) {
+ driver->buf_msg_mask_update = kzalloc(APPS_BUF_SIZE,
+ GFP_KERNEL);
+ if (driver->buf_msg_mask_update == NULL)
+ goto err;
+ kmemleak_not_leak(driver->buf_msg_mask_update);
+ }
+ if (driver->buf_log_mask_update == NULL) {
+ driver->buf_log_mask_update = kzalloc(APPS_BUF_SIZE,
+ GFP_KERNEL);
+ if (driver->buf_log_mask_update == NULL)
+ goto err;
+ kmemleak_not_leak(driver->buf_log_mask_update);
+ }
+ if (driver->buf_event_mask_update == NULL) {
+ driver->buf_event_mask_update = kzalloc(APPS_BUF_SIZE,
+ GFP_KERNEL);
+ if (driver->buf_event_mask_update == NULL)
+ goto err;
+ kmemleak_not_leak(driver->buf_event_mask_update);
+ }
+ if (driver->msg_masks == NULL) {
+ driver->msg_masks = kzalloc(MSG_MASK_SIZE, GFP_KERNEL);
+ if (driver->msg_masks == NULL)
+ goto err;
+ kmemleak_not_leak(driver->msg_masks);
+ }
+ diag_create_msg_mask_table();
+ diag_event_num_bytes = 0;
+ if (driver->log_masks == NULL) {
+ driver->log_masks = kzalloc(LOG_MASK_SIZE, GFP_KERNEL);
+ if (driver->log_masks == NULL)
+ goto err;
+ kmemleak_not_leak(driver->log_masks);
+ }
+ driver->log_masks_length = (sizeof(struct mask_info))*MAX_EQUIP_ID;
+ if (driver->event_masks == NULL) {
+ driver->event_masks = kzalloc(EVENT_MASK_SIZE, GFP_KERNEL);
+ if (driver->event_masks == NULL)
+ goto err;
+ kmemleak_not_leak(driver->event_masks);
+ }
+#ifdef CONFIG_DIAG_OVER_USB
+ INIT_WORK(&(driver->diag_modem_mask_update_work),
+ diag_modem_mask_update_fn);
+ INIT_WORK(&(driver->diag_lpass_mask_update_work),
+ diag_lpass_mask_update_fn);
+ INIT_WORK(&(driver->diag_wcnss_mask_update_work),
+ diag_wcnss_mask_update_fn);
+#endif
+ return;
+err:
+ pr_err("diag: Could not initialize diag mask buffers");
+ kfree(driver->event_mask);
+ kfree(driver->log_mask);
+ kfree(driver->msg_mask);
+ kfree(driver->msg_masks);
+ kfree(driver->log_masks);
+ kfree(driver->event_masks);
+}
+
+void diag_masks_exit(void)
+{
+ kfree(driver->event_mask);
+ kfree(driver->log_mask);
+ kfree(driver->msg_mask);
+ kfree(driver->msg_masks);
+ kfree(driver->log_masks);
+ kfree(driver->event_masks);
+}
diff --git a/drivers/char/diag/diag_masks.h b/drivers/char/diag/diag_masks.h
new file mode 100644
index 0000000..bcf5bc2
--- /dev/null
+++ b/drivers/char/diag/diag_masks.h
@@ -0,0 +1,27 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef DIAG_MASKS_H
+#define DIAG_MASKS_H
+
+#include "diagfwd.h"
+
+int chk_equip_id_and_mask(int equip_id, uint8_t *buf);
+void diag_send_event_mask_update(smd_channel_t *, int num_bytes);
+void diag_send_msg_mask_update(smd_channel_t *, int ssid_first,
+ int ssid_last, int proc);
+void diag_send_log_mask_update(smd_channel_t *, int);
+int diag_process_apps_masks(unsigned char *buf, int len);
+void diag_masks_init(void);
+void diag_masks_exit(void);
+extern int diag_event_num_bytes;
+#endif
diff --git a/drivers/char/diag/diagchar.h b/drivers/char/diag/diagchar.h
index 1c14859..a8e33b5 100644
--- a/drivers/char/diag/diagchar.h
+++ b/drivers/char/diag/diagchar.h
@@ -39,16 +39,16 @@
#define POOL_TYPE_HSIC 8
#define POOL_TYPE_HSIC_WRITE 16
#define POOL_TYPE_ALL 7
-#define MODEM_DATA 1
-#define QDSP_DATA 2
-#define APPS_DATA 3
+#define MODEM_DATA 1
+#define LPASS_DATA 2
+#define APPS_DATA 3
#define SDIO_DATA 4
#define WCNSS_DATA 5
#define HSIC_DATA 6
#define SMUX_DATA 7
#define MODEM_PROC 0
#define APPS_PROC 1
-#define QDSP_PROC 2
+#define LPASS_PROC 2
#define WCNSS_PROC 3
#define MSG_MASK_SIZE 10000
#define LOG_MASK_SIZE 8000
@@ -181,9 +181,9 @@
unsigned char *buf_in_1;
unsigned char *buf_in_2;
unsigned char *buf_in_cntl;
- unsigned char *buf_in_qdsp_1;
- unsigned char *buf_in_qdsp_2;
- unsigned char *buf_in_qdsp_cntl;
+ unsigned char *buf_in_lpass_1;
+ unsigned char *buf_in_lpass_2;
+ unsigned char *buf_in_lpass_cntl;
unsigned char *buf_in_wcnss_1;
unsigned char *buf_in_wcnss_2;
unsigned char *buf_in_wcnss_cntl;
@@ -198,14 +198,14 @@
smd_channel_t *ch;
smd_channel_t *ch_cntl;
smd_channel_t *ch_dci;
- smd_channel_t *chqdsp;
- smd_channel_t *chqdsp_cntl;
+ smd_channel_t *chlpass;
+ smd_channel_t *chlpass_cntl;
smd_channel_t *ch_wcnss;
smd_channel_t *ch_wcnss_cntl;
int in_busy_1;
int in_busy_2;
- int in_busy_qdsp_1;
- int in_busy_qdsp_2;
+ int in_busy_lpass_1;
+ int in_busy_lpass_2;
int in_busy_wcnss_1;
int in_busy_wcnss_2;
int in_busy_dci;
@@ -223,13 +223,13 @@
struct work_struct diag_drain_work;
struct work_struct diag_read_smd_work;
struct work_struct diag_read_smd_cntl_work;
- struct work_struct diag_read_smd_qdsp_work;
- struct work_struct diag_read_smd_qdsp_cntl_work;
+ struct work_struct diag_read_smd_lpass_work;
+ struct work_struct diag_read_smd_lpass_cntl_work;
struct work_struct diag_read_smd_wcnss_work;
struct work_struct diag_read_smd_wcnss_cntl_work;
struct workqueue_struct *diag_cntl_wq;
struct work_struct diag_modem_mask_update_work;
- struct work_struct diag_qdsp_mask_update_work;
+ struct work_struct diag_lpass_mask_update_work;
struct work_struct diag_wcnss_mask_update_work;
struct work_struct diag_read_smd_dci_work;
struct work_struct diag_clean_modem_reg_work;
@@ -246,8 +246,8 @@
struct diag_request *write_ptr_2;
struct diag_request *usb_read_ptr;
struct diag_request *write_ptr_svc;
- struct diag_request *write_ptr_qdsp_1;
- struct diag_request *write_ptr_qdsp_2;
+ struct diag_request *write_ptr_lpass_1;
+ struct diag_request *write_ptr_lpass_2;
struct diag_request *write_ptr_wcnss_1;
struct diag_request *write_ptr_wcnss_2;
struct diag_write_device *write_ptr_dci;
@@ -279,12 +279,14 @@
struct diag_request *write_ptr_mdm;
/* HSIC variables */
int hsic_ch;
+ int hsic_inited;
int hsic_device_enabled;
int hsic_device_opened;
int hsic_suspend;
int in_busy_hsic_read_on_device;
int in_busy_hsic_write;
struct work_struct diag_read_hsic_work;
+ struct mutex bridge_mutex;
/* USB MDM channel variables */
int usb_mdm_connected;
int read_len_mdm;
diff --git a/drivers/char/diag/diagchar_core.c b/drivers/char/diag/diagchar_core.c
index 59139dc..5c6cdc6 100644
--- a/drivers/char/diag/diagchar_core.c
+++ b/drivers/char/diag/diagchar_core.c
@@ -37,6 +37,8 @@
#include "diagfwd_smux.h"
#endif
#include <linux/timer.h>
+#include "diag_debugfs.h"
+#include "diag_masks.h"
MODULE_DESCRIPTION("Diag Char Driver");
MODULE_LICENSE("GPL v2");
@@ -151,9 +153,9 @@
__diag_smd_send_req();
}
-void diag_read_smd_qdsp_work_fn(struct work_struct *work)
+void diag_read_smd_lpass_work_fn(struct work_struct *work)
{
- __diag_smd_qdsp_send_req();
+ __diag_smd_lpass_send_req();
}
void diag_read_smd_wcnss_work_fn(struct work_struct *work)
@@ -548,8 +550,8 @@
== NO_LOGGING_MODE) {
driver->in_busy_1 = 1;
driver->in_busy_2 = 1;
- driver->in_busy_qdsp_1 = 1;
- driver->in_busy_qdsp_2 = 1;
+ driver->in_busy_lpass_1 = 1;
+ driver->in_busy_lpass_2 = 1;
driver->in_busy_wcnss_1 = 1;
driver->in_busy_wcnss_2 = 1;
#ifdef CONFIG_DIAG_SDIO_PIPE
@@ -563,17 +565,17 @@
== MEMORY_DEVICE_MODE) {
driver->in_busy_1 = 0;
driver->in_busy_2 = 0;
- driver->in_busy_qdsp_1 = 0;
- driver->in_busy_qdsp_2 = 0;
+ driver->in_busy_lpass_1 = 0;
+ driver->in_busy_lpass_2 = 0;
driver->in_busy_wcnss_1 = 0;
driver->in_busy_wcnss_2 = 0;
/* Poll SMD channels to check for data*/
if (driver->ch)
queue_work(driver->diag_wq,
&(driver->diag_read_smd_work));
- if (driver->chqdsp)
+ if (driver->chlpass)
queue_work(driver->diag_wq,
- &(driver->diag_read_smd_qdsp_work));
+ &(driver->diag_read_smd_lpass_work));
if (driver->ch_wcnss)
queue_work(driver->diag_wq,
&(driver->diag_read_smd_wcnss_work));
@@ -606,8 +608,8 @@
diagfwd_disconnect();
driver->in_busy_1 = 0;
driver->in_busy_2 = 0;
- driver->in_busy_qdsp_1 = 0;
- driver->in_busy_qdsp_2 = 0;
+ driver->in_busy_lpass_1 = 0;
+ driver->in_busy_lpass_2 = 0;
driver->in_busy_wcnss_1 = 0;
driver->in_busy_wcnss_2 = 0;
@@ -615,9 +617,9 @@
if (driver->ch)
queue_work(driver->diag_wq,
&(driver->diag_read_smd_work));
- if (driver->chqdsp)
+ if (driver->chlpass)
queue_work(driver->diag_wq,
- &(driver->diag_read_smd_qdsp_work));
+ &(driver->diag_read_smd_lpass_work));
if (driver->ch_wcnss)
queue_work(driver->diag_wq,
&(driver->diag_read_smd_wcnss_work));
@@ -747,27 +749,27 @@
driver->in_busy_2 = 0;
}
/* copy lpass data */
- if (driver->in_busy_qdsp_1 == 1) {
+ if (driver->in_busy_lpass_1 == 1) {
num_data++;
/*Copy the length of data being passed*/
COPY_USER_SPACE_OR_EXIT(buf+ret,
- (driver->write_ptr_qdsp_1->length), 4);
+ (driver->write_ptr_lpass_1->length), 4);
/*Copy the actual data being passed*/
COPY_USER_SPACE_OR_EXIT(buf+ret, *(driver->
- buf_in_qdsp_1),
- driver->write_ptr_qdsp_1->length);
- driver->in_busy_qdsp_1 = 0;
+ buf_in_lpass_1),
+ driver->write_ptr_lpass_1->length);
+ driver->in_busy_lpass_1 = 0;
}
- if (driver->in_busy_qdsp_2 == 1) {
+ if (driver->in_busy_lpass_2 == 1) {
num_data++;
/*Copy the length of data being passed*/
COPY_USER_SPACE_OR_EXIT(buf+ret,
- (driver->write_ptr_qdsp_2->length), 4);
+ (driver->write_ptr_lpass_2->length), 4);
/*Copy the actual data being passed*/
COPY_USER_SPACE_OR_EXIT(buf+ret, *(driver->
- buf_in_qdsp_2), driver->
- write_ptr_qdsp_2->length);
- driver->in_busy_qdsp_2 = 0;
+ buf_in_lpass_2), driver->
+ write_ptr_lpass_2->length);
+ driver->in_busy_lpass_2 = 0;
}
/* copy wncss data */
if (driver->in_busy_wcnss_1 == 1) {
@@ -886,9 +888,9 @@
if (driver->ch)
queue_work(driver->diag_wq,
&(driver->diag_read_smd_work));
- if (driver->chqdsp)
+ if (driver->chlpass)
queue_work(driver->diag_wq,
- &(driver->diag_read_smd_qdsp_work));
+ &(driver->diag_read_smd_lpass_work));
if (driver->ch_wcnss)
queue_work(driver->diag_wq,
&(driver->diag_read_smd_wcnss_work));
@@ -1403,10 +1405,10 @@
INIT_WORK(&(driver->diag_read_smd_work), diag_read_smd_work_fn);
INIT_WORK(&(driver->diag_read_smd_cntl_work),
diag_read_smd_cntl_work_fn);
- INIT_WORK(&(driver->diag_read_smd_qdsp_work),
- diag_read_smd_qdsp_work_fn);
- INIT_WORK(&(driver->diag_read_smd_qdsp_cntl_work),
- diag_read_smd_qdsp_cntl_work_fn);
+ INIT_WORK(&(driver->diag_read_smd_lpass_work),
+ diag_read_smd_lpass_work_fn);
+ INIT_WORK(&(driver->diag_read_smd_lpass_cntl_work),
+ diag_read_smd_lpass_cntl_work_fn);
INIT_WORK(&(driver->diag_read_smd_wcnss_work),
diag_read_smd_wcnss_work_fn);
INIT_WORK(&(driver->diag_read_smd_wcnss_cntl_work),
@@ -1420,6 +1422,7 @@
INIT_WORK(&(driver->diag_clean_wcnss_reg_work),
diag_clean_wcnss_reg_fn);
diag_debugfs_init();
+ diag_masks_init();
diagfwd_init();
diagfwd_cntl_init();
driver->dci_state = diag_dci_init();
@@ -1457,6 +1460,7 @@
diagchar_cleanup();
diagfwd_exit();
diagfwd_cntl_exit();
+ diag_masks_exit();
diag_sdio_fn(EXIT);
diag_bridge_fn(EXIT);
return -1;
@@ -1470,6 +1474,7 @@
diagmem_exit(driver, POOL_TYPE_ALL);
diagfwd_exit();
diagfwd_cntl_exit();
+ diag_masks_exit();
diag_sdio_fn(EXIT);
diag_bridge_fn(EXIT);
diag_debugfs_cleanup();
diff --git a/drivers/char/diag/diagfwd.c b/drivers/char/diag/diagfwd.c
index c827ec7..a537bb3 100644
--- a/drivers/char/diag/diagfwd.c
+++ b/drivers/char/diag/diagfwd.c
@@ -39,63 +39,38 @@
#include "diagfwd_sdio.h"
#endif
#include "diag_dci.h"
+#include "diag_masks.h"
#define MODE_CMD 41
#define RESET_ID 2
-#define ALL_EQUIP_ID 100
-#define ALL_SSID -1
-#define MAX_SSID_PER_RANGE 100
int diag_debug_buf_idx;
unsigned char diag_debug_buf[1024];
static unsigned int buf_tbl_size = 8; /*Number of entries in table of buffers */
struct diag_master_table entry;
-smd_channel_t *ch_temp = NULL, *chqdsp_temp = NULL, *ch_wcnss_temp = NULL;
-int diag_event_num_bytes;
-int diag_event_config;
+smd_channel_t *ch_temp = NULL, *chlpass_temp = NULL, *ch_wcnss_temp = NULL;
struct diag_send_desc_type send = { NULL, NULL, DIAG_STATE_START, 0 };
struct diag_hdlc_dest_type enc = { NULL, NULL, 0 };
-struct mask_info {
- int equip_id;
- int num_items;
- int index;
-};
-#define CREATE_MSG_MASK_TBL_ROW(XX) \
-do { \
- *(int *)(msg_mask_tbl_ptr) = MSG_SSID_ ## XX; \
- msg_mask_tbl_ptr += 4; \
- *(int *)(msg_mask_tbl_ptr) = MSG_SSID_ ## XX ## _LAST; \
- msg_mask_tbl_ptr += 4; \
- /* mimic the last entry as actual_last while creation */ \
- *(int *)(msg_mask_tbl_ptr) = MSG_SSID_ ## XX ## _LAST; \
- msg_mask_tbl_ptr += 4; \
- /* increment by MAX_SSID_PER_RANGE cells */ \
- msg_mask_tbl_ptr += MAX_SSID_PER_RANGE * sizeof(int); \
-} while (0)
-
-#define ENCODE_RSP_AND_SEND(buf_length) \
-do { \
- send.state = DIAG_STATE_START; \
- send.pkt = driver->apps_rsp_buf; \
- send.last = (void *)(driver->apps_rsp_buf + buf_length); \
- send.terminate = 1; \
- if (!driver->in_busy_1) { \
- enc.dest = driver->buf_in_1; \
- enc.dest_last = (void *)(driver->buf_in_1 + APPS_BUF_SIZE - 1);\
- diag_hdlc_encode(&send, &enc); \
- driver->write_ptr_1->buf = driver->buf_in_1; \
- driver->write_ptr_1->length = (int)(enc.dest - \
- (void *)(driver->buf_in_1)); \
- driver->in_busy_1 = 1; \
- diag_device_write(driver->buf_in_1, MODEM_DATA, \
- driver->write_ptr_1); \
- memset(driver->apps_rsp_buf, '\0', APPS_BUF_SIZE); \
- } \
-} while (0)
-
-#define CHK_OVERFLOW(bufStart, start, end, length) \
-((bufStart <= start) && (end - start >= length)) ? 1 : 0
+void encode_rsp_and_send(int buf_length)
+{
+ send.state = DIAG_STATE_START;
+ send.pkt = driver->apps_rsp_buf;
+ send.last = (void *)(driver->apps_rsp_buf + buf_length);
+ send.terminate = 1;
+ if (!driver->in_busy_1) {
+ enc.dest = driver->buf_in_1;
+ enc.dest_last = (void *)(driver->buf_in_1 + APPS_BUF_SIZE - 1);
+ diag_hdlc_encode(&send, &enc);
+ driver->write_ptr_1->buf = driver->buf_in_1;
+ driver->write_ptr_1->length = (int)(enc.dest -
+ (void *)(driver->buf_in_1));
+ driver->in_busy_1 = 1;
+ diag_device_write(driver->buf_in_1, MODEM_DATA,
+ driver->write_ptr_1);
+ memset(driver->apps_rsp_buf, '\0', APPS_BUF_SIZE);
+ }
+}
/* Determine if this device uses a device tree */
#ifdef CONFIG_OF
@@ -136,6 +111,7 @@
case MSM_CPU_8960AB:
return AO8960_TOOLS_ID;
case MSM_CPU_8064:
+ case MSM_CPU_8064AB:
return APQ8064_TOOLS_ID;
case MSM_CPU_8930:
case MSM_CPU_8930AA:
@@ -163,6 +139,7 @@
case MSM_CPU_8960:
case MSM_CPU_8960AB:
case MSM_CPU_8064:
+ case MSM_CPU_8064AB:
case MSM_CPU_8930:
case MSM_CPU_8930AA:
case MSM_CPU_8627:
@@ -185,7 +162,7 @@
return 1;
else if (cpu_is_msm8960() || cpu_is_msm8930() || cpu_is_msm8930aa() ||
cpu_is_msm9615() || cpu_is_apq8064() || cpu_is_msm8627() ||
- cpu_is_msm8960ab())
+ cpu_is_msm8960ab() || cpu_is_apq8064ab())
return 1;
else
return 0;
@@ -353,11 +330,11 @@
driver->in_busy_2 = 0;
queue_work(driver->diag_wq, &(driver->
diag_read_smd_work));
- } else if (proc_num == QDSP_DATA) {
- driver->in_busy_qdsp_1 = 0;
- driver->in_busy_qdsp_2 = 0;
+ } else if (proc_num == LPASS_DATA) {
+ driver->in_busy_lpass_1 = 0;
+ driver->in_busy_lpass_2 = 0;
queue_work(driver->diag_wq, &(driver->
- diag_read_smd_qdsp_work));
+ diag_read_smd_lpass_work));
} else if (proc_num == WCNSS_DATA) {
driver->in_busy_wcnss_1 = 0;
driver->in_busy_wcnss_2 = 0;
@@ -403,7 +380,7 @@
buf, write_ptr->length, 1);
#endif /* DIAG DEBUG */
err = usb_diag_write(driver->legacy_ch, write_ptr);
- } else if (proc_num == QDSP_DATA) {
+ } else if (proc_num == LPASS_DATA) {
write_ptr->buf = buf;
err = usb_diag_write(driver->legacy_ch, write_ptr);
} else if (proc_num == WCNSS_DATA) {
@@ -510,24 +487,24 @@
}
}
-void __diag_smd_qdsp_send_req(void)
+void __diag_smd_lpass_send_req(void)
{
void *buf = NULL;
- int *in_busy_qdsp_ptr = NULL;
- struct diag_request *write_ptr_qdsp = NULL;
+ int *in_busy_lpass_ptr = NULL;
+ struct diag_request *write_ptr_lpass = NULL;
- if (!driver->in_busy_qdsp_1) {
- buf = driver->buf_in_qdsp_1;
- write_ptr_qdsp = driver->write_ptr_qdsp_1;
- in_busy_qdsp_ptr = &(driver->in_busy_qdsp_1);
- } else if (!driver->in_busy_qdsp_2) {
- buf = driver->buf_in_qdsp_2;
- write_ptr_qdsp = driver->write_ptr_qdsp_2;
- in_busy_qdsp_ptr = &(driver->in_busy_qdsp_2);
+ if (!driver->in_busy_lpass_1) {
+ buf = driver->buf_in_lpass_1;
+ write_ptr_lpass = driver->write_ptr_lpass_1;
+ in_busy_lpass_ptr = &(driver->in_busy_lpass_1);
+ } else if (!driver->in_busy_lpass_2) {
+ buf = driver->buf_in_lpass_2;
+ write_ptr_lpass = driver->write_ptr_lpass_2;
+ in_busy_lpass_ptr = &(driver->in_busy_lpass_2);
}
- if (driver->chqdsp && buf) {
- int r = smd_read_avail(driver->chqdsp);
+ if (driver->chlpass && buf) {
+ int r = smd_read_avail(driver->chlpass);
if (r > IN_BUF_SIZE) {
if (r < MAX_IN_BUF_SIZE) {
@@ -542,265 +519,23 @@
}
if (r > 0) {
if (!buf)
- printk(KERN_INFO "Out of diagmem for QDSP\n");
+ printk(KERN_INFO "Out of diagmem for LPASS\n");
else {
APPEND_DEBUG('i');
- smd_read(driver->chqdsp, buf, r);
+ smd_read(driver->chlpass, buf, r);
APPEND_DEBUG('j');
- write_ptr_qdsp->length = r;
- *in_busy_qdsp_ptr = 1;
- diag_device_write(buf, QDSP_DATA,
- write_ptr_qdsp);
+ write_ptr_lpass->length = r;
+ *in_busy_lpass_ptr = 1;
+ diag_device_write(buf, LPASS_DATA,
+ write_ptr_lpass);
}
}
- } else if (driver->chqdsp && !buf &&
+ } else if (driver->chlpass && !buf &&
(driver->logging_mode == MEMORY_DEVICE_MODE)) {
chk_logging_wakeup();
}
}
-static void diag_print_mask_table(void)
-{
-/* Enable this to print mask table when updated */
-#ifdef MASK_DEBUG
- int first, last, actual_last;
- uint8_t *ptr = driver->msg_masks;
- int i = 0;
- pr_info("diag: F3 message mask table\n");
- while (*(uint32_t *)(ptr + 4)) {
- first = *(uint32_t *)ptr;
- ptr += 4;
- last = *(uint32_t *)ptr;
- ptr += 4;
- actual_last = *(uint32_t *)ptr;
- ptr += 4;
- pr_info("diag: SSID %d, %d - %d\n", first, last, actual_last);
- for (i = 0 ; i <= actual_last - first ; i++)
- pr_info("diag: MASK:%x\n", *((uint32_t *)ptr + i));
- ptr += MAX_SSID_PER_RANGE*4;
- }
-#endif
-}
-
-void diag_create_msg_mask_table(void)
-{
- uint8_t *msg_mask_tbl_ptr = driver->msg_masks;
-
- CREATE_MSG_MASK_TBL_ROW(0);
- CREATE_MSG_MASK_TBL_ROW(1);
- CREATE_MSG_MASK_TBL_ROW(2);
- CREATE_MSG_MASK_TBL_ROW(3);
- CREATE_MSG_MASK_TBL_ROW(4);
- CREATE_MSG_MASK_TBL_ROW(5);
- CREATE_MSG_MASK_TBL_ROW(6);
- CREATE_MSG_MASK_TBL_ROW(7);
- CREATE_MSG_MASK_TBL_ROW(8);
- CREATE_MSG_MASK_TBL_ROW(9);
- CREATE_MSG_MASK_TBL_ROW(10);
- CREATE_MSG_MASK_TBL_ROW(11);
- CREATE_MSG_MASK_TBL_ROW(12);
- CREATE_MSG_MASK_TBL_ROW(13);
- CREATE_MSG_MASK_TBL_ROW(14);
- CREATE_MSG_MASK_TBL_ROW(15);
- CREATE_MSG_MASK_TBL_ROW(16);
- CREATE_MSG_MASK_TBL_ROW(17);
- CREATE_MSG_MASK_TBL_ROW(18);
- CREATE_MSG_MASK_TBL_ROW(19);
- CREATE_MSG_MASK_TBL_ROW(20);
- CREATE_MSG_MASK_TBL_ROW(21);
- CREATE_MSG_MASK_TBL_ROW(22);
- CREATE_MSG_MASK_TBL_ROW(23);
-}
-
-static void diag_set_msg_mask(int rt_mask)
-{
- int first_ssid, last_ssid, i;
- uint8_t *parse_ptr, *ptr = driver->msg_masks;
-
- mutex_lock(&driver->diagchar_mutex);
- while (*(uint32_t *)(ptr + 4)) {
- first_ssid = *(uint32_t *)ptr;
- ptr += 8; /* increment by 8 to skip 'last' */
- last_ssid = *(uint32_t *)ptr;
- ptr += 4;
- parse_ptr = ptr;
- pr_debug("diag: updating range %d %d\n", first_ssid, last_ssid);
- for (i = 0; i < last_ssid - first_ssid + 1; i++) {
- *(int *)parse_ptr = rt_mask;
- parse_ptr += 4;
- }
- ptr += MAX_SSID_PER_RANGE * 4;
- }
- mutex_unlock(&driver->diagchar_mutex);
-}
-
-static void diag_update_msg_mask(int start, int end , uint8_t *buf)
-{
- int found = 0, first, last, actual_last;
- uint8_t *actual_last_ptr;
- uint8_t *ptr = driver->msg_masks;
- uint8_t *ptr_buffer_start = &(*(driver->msg_masks));
- uint8_t *ptr_buffer_end = &(*(driver->msg_masks)) + MSG_MASK_SIZE;
-
- mutex_lock(&driver->diagchar_mutex);
-
- /* First SSID can be zero : So check that last is non-zero */
- while (*(uint32_t *)(ptr + 4)) {
- first = *(uint32_t *)ptr;
- ptr += 4;
- last = *(uint32_t *)ptr;
- ptr += 4;
- actual_last = *(uint32_t *)ptr;
- actual_last_ptr = ptr;
- ptr += 4;
- if (start >= first && start <= actual_last) {
- ptr += (start - first)*4;
- if (end > actual_last) {
- pr_info("diag: ssid range mismatch\n");
- actual_last = end;
- *(uint32_t *)(actual_last_ptr) = end;
- }
- if (CHK_OVERFLOW(ptr_buffer_start, ptr, ptr_buffer_end,
- (((end - start)+1)*4))) {
- pr_debug("diag: update ssid start %d, end %d\n",
- start, end);
- memcpy(ptr, buf , ((end - start)+1)*4);
- } else
- pr_alert("diag: Not enough space MSG_MASK\n");
- found = 1;
- break;
- } else {
- ptr += MAX_SSID_PER_RANGE*4;
- }
- }
- /* Entry was not found - add new table */
- if (!found) {
- if (CHK_OVERFLOW(ptr_buffer_start, ptr, ptr_buffer_end,
- 8 + ((end - start) + 1)*4)) {
- memcpy(ptr, &(start) , 4);
- ptr += 4;
- memcpy(ptr, &(end), 4);
- ptr += 4;
- memcpy(ptr, &(end), 4); /* create actual_last entry */
- ptr += 4;
- pr_debug("diag: adding NEW ssid start %d, end %d\n",
- start, end);
- memcpy(ptr, buf , ((end - start) + 1)*4);
- } else
- pr_alert("diag: Not enough buffer space for MSG_MASK\n");
- }
- mutex_unlock(&driver->diagchar_mutex);
- diag_print_mask_table();
-}
-
-void diag_toggle_event_mask(int toggle)
-{
- uint8_t *ptr = driver->event_masks;
-
- mutex_lock(&driver->diagchar_mutex);
- if (toggle)
- memset(ptr, 0xFF, EVENT_MASK_SIZE);
- else
- memset(ptr, 0, EVENT_MASK_SIZE);
- mutex_unlock(&driver->diagchar_mutex);
-}
-
-static void diag_update_event_mask(uint8_t *buf, int toggle, int num_bytes)
-{
- uint8_t *ptr = driver->event_masks;
- uint8_t *temp = buf + 2;
-
- mutex_lock(&driver->diagchar_mutex);
- if (!toggle)
- memset(ptr, 0 , EVENT_MASK_SIZE);
- else
- if (CHK_OVERFLOW(ptr, ptr,
- ptr+EVENT_MASK_SIZE, num_bytes))
- memcpy(ptr, temp , num_bytes);
- else
- printk(KERN_CRIT "Not enough buffer space "
- "for EVENT_MASK\n");
- mutex_unlock(&driver->diagchar_mutex);
-}
-
-static void diag_disable_log_mask(void)
-{
- int i = 0;
- struct mask_info *parse_ptr = (struct mask_info *)(driver->log_masks);
-
- pr_debug("diag: disable log masks\n");
- mutex_lock(&driver->diagchar_mutex);
- for (i = 0; i < MAX_EQUIP_ID; i++) {
- pr_debug("diag: equip id %d\n", parse_ptr->equip_id);
- if (!(parse_ptr->equip_id)) /* Reached a null entry */
- break;
- memset(driver->log_masks + parse_ptr->index, 0,
- (parse_ptr->num_items + 7)/8);
- parse_ptr++;
- }
- mutex_unlock(&driver->diagchar_mutex);
-}
-
-int chk_equip_id_and_mask(int equip_id, uint8_t *buf)
-{
- int i = 0, flag = 0, num_items, offset;
- unsigned char *ptr_data;
- struct mask_info *ptr = (struct mask_info *)(driver->log_masks);
-
- pr_debug("diag: received equip id = %d\n", equip_id);
- /* Check if this is valid equipment ID */
- for (i = 0; i < MAX_EQUIP_ID; i++) {
- if ((ptr->equip_id == equip_id) && (ptr->index != 0)) {
- offset = ptr->index;
- num_items = ptr->num_items;
- flag = 1;
- break;
- }
- ptr++;
- }
- if (!flag)
- return -EPERM;
- ptr_data = driver->log_masks + offset;
- memcpy(buf, ptr_data, (num_items+7)/8);
- return 0;
-}
-
-static void diag_update_log_mask(int equip_id, uint8_t *buf, int num_items)
-{
- uint8_t *temp = buf;
- int i = 0;
- unsigned char *ptr_data;
- int offset = (sizeof(struct mask_info))*MAX_EQUIP_ID;
- struct mask_info *ptr = (struct mask_info *)(driver->log_masks);
-
- pr_debug("diag: received equip id = %d\n", equip_id);
- mutex_lock(&driver->diagchar_mutex);
- /* Check if we already know index of this equipment ID */
- for (i = 0; i < MAX_EQUIP_ID; i++) {
- if ((ptr->equip_id == equip_id) && (ptr->index != 0)) {
- offset = ptr->index;
- break;
- }
- if ((ptr->equip_id == 0) && (ptr->index == 0)) {
- /* Reached a null entry */
- ptr->equip_id = equip_id;
- ptr->num_items = num_items;
- ptr->index = driver->log_masks_length;
- offset = driver->log_masks_length;
- driver->log_masks_length += ((num_items+7)/8);
- break;
- }
- ptr++;
- }
- ptr_data = driver->log_masks + offset;
- if (CHK_OVERFLOW(driver->log_masks, ptr_data, driver->log_masks
- + LOG_MASK_SIZE, (num_items+7)/8))
- memcpy(ptr_data, temp , (num_items+7)/8);
- else
- pr_err("diag: Not enough buffer space for LOG_MASK\n");
- mutex_unlock(&driver->diagchar_mutex);
-}
-
static void diag_update_pkt_buffer(unsigned char *buf)
{
unsigned char *ptr = driver->pkt_buf;
@@ -856,9 +591,9 @@
RESET_ID)
return;
smd_write(driver->ch, buf, len);
- } else if (entry.client_id == QDSP_PROC &&
- driver->chqdsp) {
- smd_write(driver->chqdsp, buf, len);
+ } else if (entry.client_id == LPASS_PROC &&
+ driver->chlpass) {
+ smd_write(driver->chlpass, buf, len);
} else if (entry.client_id == WCNSS_PROC &&
driver->ch_wcnss) {
smd_write(driver->ch_wcnss, buf, len);
@@ -869,412 +604,21 @@
}
}
-void diag_modem_mask_update_fn(struct work_struct *work)
-{
- diag_send_msg_mask_update(driver->ch_cntl, ALL_SSID,
- ALL_SSID, MODEM_PROC);
- diag_send_log_mask_update(driver->ch_cntl, ALL_EQUIP_ID);
- diag_send_event_mask_update(driver->ch_cntl, diag_event_num_bytes);
-}
-
-void diag_qdsp_mask_update_fn(struct work_struct *work)
-{
- diag_send_msg_mask_update(driver->chqdsp_cntl, ALL_SSID,
- ALL_SSID, QDSP_PROC);
- diag_send_log_mask_update(driver->chqdsp_cntl, ALL_EQUIP_ID);
- diag_send_event_mask_update(driver->chqdsp_cntl, diag_event_num_bytes);
-}
-
-void diag_wcnss_mask_update_fn(struct work_struct *work)
-{
- diag_send_msg_mask_update(driver->ch_wcnss_cntl, ALL_SSID,
- ALL_SSID, WCNSS_PROC);
- diag_send_log_mask_update(driver->ch_wcnss_cntl, ALL_EQUIP_ID);
- diag_send_event_mask_update(driver->ch_wcnss_cntl,
- diag_event_num_bytes);
-}
-
-void diag_send_log_mask_update(smd_channel_t *ch, int equip_id)
-{
- void *buf = driver->buf_log_mask_update;
- int header_size = sizeof(struct diag_ctrl_log_mask);
- struct mask_info *ptr = (struct mask_info *)driver->log_masks;
- int i, size, wr_size = -ENOMEM, retry_count = 0, timer;
-
- mutex_lock(&driver->diag_cntl_mutex);
- for (i = 0; i < MAX_EQUIP_ID; i++) {
- size = (ptr->num_items+7)/8;
- /* reached null entry */
- if ((ptr->equip_id == 0) && (ptr->index == 0))
- break;
- driver->log_mask->cmd_type = DIAG_CTRL_MSG_LOG_MASK;
- driver->log_mask->num_items = ptr->num_items;
- driver->log_mask->data_len = 11 + size;
- driver->log_mask->stream_id = 1; /* 2, if dual stream */
- driver->log_mask->status = 3; /* status for valid mask */
- driver->log_mask->equip_id = ptr->equip_id;
- driver->log_mask->log_mask_size = size;
- /* send only desired update, NOT ALL */
- if (equip_id == ALL_EQUIP_ID || equip_id ==
- driver->log_mask->equip_id) {
- memcpy(buf, driver->log_mask, header_size);
- memcpy(buf+header_size, driver->log_masks+ptr->index,
- size);
- if (ch) {
- while (retry_count < 3) {
- wr_size = smd_write(ch, buf,
- header_size + size);
- if (wr_size == -ENOMEM) {
- retry_count++;
- for (timer = 0; timer < 5;
- timer++)
- udelay(2000);
- } else
- break;
- }
- if (wr_size != header_size + size)
- pr_err("diag: log mask update failed"
- " %d, tried %d", wr_size, header_size + size);
- else
- pr_debug("diag: updated log equip ID %d"
- ",len %d\n", driver->log_mask->equip_id,
- driver->log_mask->log_mask_size);
- } else
- pr_err("diag: ch not valid for log update\n");
- }
- ptr++;
- }
- mutex_unlock(&driver->diag_cntl_mutex);
-}
-
-void diag_send_event_mask_update(smd_channel_t *ch, int num_bytes)
-{
- void *buf = driver->buf_event_mask_update;
- int header_size = sizeof(struct diag_ctrl_event_mask);
- int wr_size = -ENOMEM, retry_count = 0, timer;
-
- mutex_lock(&driver->diag_cntl_mutex);
- if (num_bytes == 0) {
- pr_debug("diag: event mask not set yet, so no update\n");
- mutex_unlock(&driver->diag_cntl_mutex);
- return;
- }
- /* send event mask update */
- driver->event_mask->cmd_type = DIAG_CTRL_MSG_EVENT_MASK;
- driver->event_mask->data_len = 7 + num_bytes;
- driver->event_mask->stream_id = 1; /* 2, if dual stream */
- driver->event_mask->status = 3; /* status for valid mask */
- driver->event_mask->event_config = diag_event_config; /* event config */
- driver->event_mask->event_mask_size = num_bytes;
- memcpy(buf, driver->event_mask, header_size);
- memcpy(buf+header_size, driver->event_masks, num_bytes);
- if (ch) {
- while (retry_count < 3) {
- wr_size = smd_write(ch, buf, header_size + num_bytes);
- if (wr_size == -ENOMEM) {
- retry_count++;
- for (timer = 0; timer < 5; timer++)
- udelay(2000);
- } else
- break;
- }
- if (wr_size != header_size + num_bytes)
- pr_err("diag: error writing event mask %d, tried %d\n",
- wr_size, header_size + num_bytes);
- } else
- pr_err("diag: ch not valid for event update\n");
- mutex_unlock(&driver->diag_cntl_mutex);
-}
-
-void diag_send_msg_mask_update(smd_channel_t *ch, int updated_ssid_first,
- int updated_ssid_last, int proc)
-{
- void *buf = driver->buf_msg_mask_update;
- int first, last, actual_last, size = -ENOMEM, retry_count = 0, timer;
- int header_size = sizeof(struct diag_ctrl_msg_mask);
- uint8_t *ptr = driver->msg_masks;
-
- mutex_lock(&driver->diag_cntl_mutex);
- while (*(uint32_t *)(ptr + 4)) {
- first = *(uint32_t *)ptr;
- ptr += 4;
- last = *(uint32_t *)ptr;
- ptr += 4;
- actual_last = *(uint32_t *)ptr;
- ptr += 4;
- if ((updated_ssid_first >= first && updated_ssid_last <=
- actual_last) || (updated_ssid_first == ALL_SSID)) {
- /* send f3 mask update */
- driver->msg_mask->cmd_type = DIAG_CTRL_MSG_F3_MASK;
- driver->msg_mask->msg_mask_size = actual_last -
- first + 1;
- driver->msg_mask->data_len = 11 +
- 4 * (driver->msg_mask->msg_mask_size);
- driver->msg_mask->stream_id = 1; /* 2, if dual stream */
- driver->msg_mask->status = 3; /* status valid mask */
- driver->msg_mask->msg_mode = 0; /* Legcay mode */
- driver->msg_mask->ssid_first = first;
- driver->msg_mask->ssid_last = actual_last;
- memcpy(buf, driver->msg_mask, header_size);
- memcpy(buf+header_size, ptr,
- 4 * (driver->msg_mask->msg_mask_size));
- if (ch) {
- while (retry_count < 3) {
- size = smd_write(ch, buf, header_size +
- 4*(driver->msg_mask->msg_mask_size));
- if (size == -ENOMEM) {
- retry_count++;
- for (timer = 0; timer < 5;
- timer++)
- udelay(2000);
- } else
- break;
- }
- if (size != header_size +
- 4*(driver->msg_mask->msg_mask_size))
- pr_err("diag: proc %d, msg mask update "
- "fail %d, tried %d\n", proc, size,
- header_size + 4*(driver->msg_mask->msg_mask_size));
- else
- pr_debug("diag: sending mask update for ssid first %d, last %d on PROC %d\n",
- first, actual_last, proc);
- } else
- pr_err("diag: proc %d, ch invalid msg mask"
- "update\n", proc);
- }
- ptr += MAX_SSID_PER_RANGE*4;
- }
- mutex_unlock(&driver->diag_cntl_mutex);
-}
-
static int diag_process_apps_pkt(unsigned char *buf, int len)
{
uint16_t subsys_cmd_code;
int subsys_id, ssid_first, ssid_last, ssid_range;
int packet_type = 1, i, cmd_code;
- int rt_mask, rt_first_ssid, rt_last_ssid, rt_mask_size;
unsigned char *temp = buf;
- uint8_t *rt_mask_ptr;
- int data_type, equip_id, num_items;
+ int data_type;
#if defined(CONFIG_DIAG_OVER_USB)
- int payload_length;
unsigned char *ptr;
#endif
- /* Set log masks */
- if (*buf == 0x73 && *(int *)(buf+4) == 3) {
- buf += 8;
- /* Read Equip ID and pass as first param below*/
- diag_update_log_mask(*(int *)buf, buf+8, *(int *)(buf+4));
- diag_update_userspace_clients(LOG_MASKS_TYPE);
-#if defined(CONFIG_DIAG_OVER_USB)
- if (chk_apps_only()) {
- driver->apps_rsp_buf[0] = 0x73;
- *(int *)(driver->apps_rsp_buf + 4) = 0x3; /* op. ID */
- *(int *)(driver->apps_rsp_buf + 8) = 0x0; /* success */
- payload_length = 8 + ((*(int *)(buf + 4)) + 7)/8;
- for (i = 0; i < payload_length; i++)
- *(int *)(driver->apps_rsp_buf+12+i) = *(buf+i);
- if (driver->ch_cntl)
- diag_send_log_mask_update(driver->ch_cntl,
- *(int *)buf);
- if (driver->chqdsp_cntl)
- diag_send_log_mask_update(driver->chqdsp_cntl,
- *(int *)buf);
- if (driver->ch_wcnss_cntl)
- diag_send_log_mask_update(driver->ch_wcnss_cntl,
- *(int *)buf);
- ENCODE_RSP_AND_SEND(12 + payload_length - 1);
- return 0;
- } else
- buf = temp;
-#endif
- } /* Get log masks */
- else if (*buf == 0x73 && *(int *)(buf+4) == 4) {
-#if defined(CONFIG_DIAG_OVER_USB)
- if (!(driver->ch) && chk_apps_only()) {
- equip_id = *(int *)(buf + 8);
- num_items = *(int *)(buf + 12);
- driver->apps_rsp_buf[0] = 0x73;
- driver->apps_rsp_buf[1] = 0x0;
- driver->apps_rsp_buf[2] = 0x0;
- driver->apps_rsp_buf[3] = 0x0;
- *(int *)(driver->apps_rsp_buf + 4) = 0x4;
- if (!chk_equip_id_and_mask(equip_id,
- driver->apps_rsp_buf+20))
- *(int *)(driver->apps_rsp_buf + 8) = 0x0;
- else
- *(int *)(driver->apps_rsp_buf + 8) = 0x1;
- *(int *)(driver->apps_rsp_buf + 12) = equip_id;
- *(int *)(driver->apps_rsp_buf + 16) = num_items;
- ENCODE_RSP_AND_SEND(20+(num_items+7)/8-1);
- return 0;
- } else
- buf = temp;
-#endif
- } /* Disable log masks */
- else if (*buf == 0x73 && *(int *)(buf+4) == 0) {
- /* Disable mask for each log code */
- diag_disable_log_mask();
- diag_update_userspace_clients(LOG_MASKS_TYPE);
-#if defined(CONFIG_DIAG_OVER_USB)
- if (chk_apps_only()) {
- driver->apps_rsp_buf[0] = 0x73;
- driver->apps_rsp_buf[1] = 0x0;
- driver->apps_rsp_buf[2] = 0x0;
- driver->apps_rsp_buf[3] = 0x0;
- *(int *)(driver->apps_rsp_buf + 4) = 0x0;
- if (driver->ch_cntl)
- diag_send_log_mask_update(driver->ch_cntl,
- ALL_EQUIP_ID);
- if (driver->chqdsp_cntl)
- diag_send_log_mask_update(driver->chqdsp_cntl,
- ALL_EQUIP_ID);
- if (driver->ch_wcnss_cntl)
- diag_send_log_mask_update(driver->ch_wcnss_cntl,
- ALL_EQUIP_ID);
- ENCODE_RSP_AND_SEND(7);
- return 0;
- }
-#endif
- } /* Get runtime message mask */
- else if ((*buf == 0x7d) && (*(buf+1) == 0x3)) {
- ssid_first = *(uint16_t *)(buf + 2);
- ssid_last = *(uint16_t *)(buf + 4);
-#if defined(CONFIG_DIAG_OVER_USB)
- if (!(driver->ch) && chk_apps_only()) {
- driver->apps_rsp_buf[0] = 0x7d;
- driver->apps_rsp_buf[1] = 0x3;
- *(uint16_t *)(driver->apps_rsp_buf+2) = ssid_first;
- *(uint16_t *)(driver->apps_rsp_buf+4) = ssid_last;
- driver->apps_rsp_buf[6] = 0x1; /* Success Status */
- driver->apps_rsp_buf[7] = 0x0;
- rt_mask_ptr = driver->msg_masks;
- while (*(uint32_t *)(rt_mask_ptr + 4)) {
- rt_first_ssid = *(uint32_t *)rt_mask_ptr;
- rt_mask_ptr += 8; /* +8 to skip 'last' */
- rt_last_ssid = *(uint32_t *)rt_mask_ptr;
- rt_mask_ptr += 4;
- if (ssid_first == rt_first_ssid && ssid_last ==
- rt_last_ssid) {
- rt_mask_size = 4 * (rt_last_ssid -
- rt_first_ssid + 1);
- memcpy(driver->apps_rsp_buf+8,
- rt_mask_ptr, rt_mask_size);
- ENCODE_RSP_AND_SEND(8+rt_mask_size-1);
- return 0;
- }
- rt_mask_ptr += MAX_SSID_PER_RANGE*4;
- }
- } else
- buf = temp;
-#endif
- } /* Set runtime message mask */
- else if ((*buf == 0x7d) && (*(buf+1) == 0x4)) {
- ssid_first = *(uint16_t *)(buf + 2);
- ssid_last = *(uint16_t *)(buf + 4);
- ssid_range = 4 * (ssid_last - ssid_first + 1);
- pr_debug("diag: received mask update for ssid_first = %d,"
- " ssid_last = %d", ssid_first, ssid_last);
- diag_update_msg_mask(ssid_first, ssid_last , buf + 8);
- diag_update_userspace_clients(MSG_MASKS_TYPE);
-#if defined(CONFIG_DIAG_OVER_USB)
- if (chk_apps_only()) {
- for (i = 0; i < 8 + ssid_range; i++)
- *(driver->apps_rsp_buf + i) = *(buf+i);
- *(driver->apps_rsp_buf + 6) = 0x1;
- if (driver->ch_cntl)
- diag_send_msg_mask_update(driver->ch_cntl,
- ssid_first, ssid_last, MODEM_PROC);
- if (driver->chqdsp_cntl)
- diag_send_msg_mask_update(driver->chqdsp_cntl,
- ssid_first, ssid_last, QDSP_PROC);
- if (driver->ch_wcnss_cntl)
- diag_send_msg_mask_update(driver->ch_wcnss_cntl,
- ssid_first, ssid_last, WCNSS_PROC);
- ENCODE_RSP_AND_SEND(8 + ssid_range - 1);
- return 0;
- } else
- buf = temp;
-#endif
- } /* Set ALL runtime message mask */
- else if ((*buf == 0x7d) && (*(buf+1) == 0x5)) {
- rt_mask = *(int *)(buf + 4);
- diag_set_msg_mask(rt_mask);
- diag_update_userspace_clients(MSG_MASKS_TYPE);
-#if defined(CONFIG_DIAG_OVER_USB)
- if (chk_apps_only()) {
- driver->apps_rsp_buf[0] = 0x7d; /* cmd_code */
- driver->apps_rsp_buf[1] = 0x5; /* set subcommand */
- driver->apps_rsp_buf[2] = 1; /* success */
- driver->apps_rsp_buf[3] = 0; /* rsvd */
- *(int *)(driver->apps_rsp_buf + 4) = rt_mask;
- /* send msg mask update to peripheral */
- if (driver->ch_cntl)
- diag_send_msg_mask_update(driver->ch_cntl,
- ALL_SSID, ALL_SSID, MODEM_PROC);
- if (driver->chqdsp_cntl)
- diag_send_msg_mask_update(driver->chqdsp_cntl,
- ALL_SSID, ALL_SSID, QDSP_PROC);
- if (driver->ch_wcnss_cntl)
- diag_send_msg_mask_update(driver->ch_wcnss_cntl,
- ALL_SSID, ALL_SSID, WCNSS_PROC);
- ENCODE_RSP_AND_SEND(7);
- return 0;
- } else
- buf = temp;
-#endif
- } else if (*buf == 0x82) { /* event mask change */
- buf += 4;
- diag_event_num_bytes = (*(uint16_t *)buf)/8+1;
- diag_update_event_mask(buf, 1, (*(uint16_t *)buf)/8+1);
- diag_update_userspace_clients(EVENT_MASKS_TYPE);
-#if defined(CONFIG_DIAG_OVER_USB)
- if (chk_apps_only()) {
- driver->apps_rsp_buf[0] = 0x82;
- driver->apps_rsp_buf[1] = 0x0;
- *(uint16_t *)(driver->apps_rsp_buf + 2) = 0x0;
- *(uint16_t *)(driver->apps_rsp_buf + 4) =
- EVENT_LAST_ID + 1;
- memcpy(driver->apps_rsp_buf+6, driver->event_masks,
- EVENT_LAST_ID/8+1);
- if (driver->ch_cntl)
- diag_send_event_mask_update(driver->ch_cntl,
- diag_event_num_bytes);
- if (driver->chqdsp_cntl)
- diag_send_event_mask_update(driver->chqdsp_cntl,
- diag_event_num_bytes);
- if (driver->ch_wcnss_cntl)
- diag_send_event_mask_update(
- driver->ch_wcnss_cntl, diag_event_num_bytes);
- ENCODE_RSP_AND_SEND(6 + EVENT_LAST_ID/8);
- return 0;
- } else
- buf = temp;
-#endif
- } else if (*buf == 0x60) {
- diag_event_config = *(buf+1);
- diag_toggle_event_mask(*(buf+1));
- diag_update_userspace_clients(EVENT_MASKS_TYPE);
-#if defined(CONFIG_DIAG_OVER_USB)
- if (chk_apps_only()) {
- driver->apps_rsp_buf[0] = 0x60;
- driver->apps_rsp_buf[1] = 0x0;
- driver->apps_rsp_buf[2] = 0x0;
- if (driver->ch_cntl)
- diag_send_event_mask_update(driver->ch_cntl,
- diag_event_num_bytes);
- if (driver->chqdsp_cntl)
- diag_send_event_mask_update(driver->chqdsp_cntl,
- diag_event_num_bytes);
- if (driver->ch_wcnss_cntl)
- diag_send_event_mask_update(
- driver->ch_wcnss_cntl, diag_event_num_bytes);
- ENCODE_RSP_AND_SEND(2);
- return 0;
- }
-#endif
- }
+ /* Check if the command is a supported mask command */
+ if (diag_process_apps_masks(buf, len) == 0)
+ return 0;
+
/* Check for registered clients and forward packet to apropriate proc */
cmd_code = (int)(*(char *)buf);
temp++;
@@ -1331,7 +675,7 @@
for (i = 0; i < 4; i++)
*(driver->apps_rsp_buf+i) = *(buf+i);
*(uint32_t *)(driver->apps_rsp_buf+4) = PKT_SIZE;
- ENCODE_RSP_AND_SEND(7);
+ encode_rsp_and_send(7);
return 0;
}
/* Check for Apps Only & get event mask request */
@@ -1342,7 +686,7 @@
*(uint16_t *)(driver->apps_rsp_buf + 4) = EVENT_LAST_ID + 1;
for (i = 0; i < EVENT_LAST_ID/8 + 1; i++)
*(unsigned char *)(driver->apps_rsp_buf + 6 + i) = 0x0;
- ENCODE_RSP_AND_SEND(6 + EVENT_LAST_ID/8);
+ encode_rsp_and_send(6 + EVENT_LAST_ID/8);
return 0;
}
/* Get log ID range & Check for Apps Only */
@@ -1367,7 +711,7 @@
*(int *)(driver->apps_rsp_buf + 64) = LOG_GET_ITEM_NUM(LOG_13);
*(int *)(driver->apps_rsp_buf + 68) = LOG_GET_ITEM_NUM(LOG_14);
*(int *)(driver->apps_rsp_buf + 72) = LOG_GET_ITEM_NUM(LOG_15);
- ENCODE_RSP_AND_SEND(75);
+ encode_rsp_and_send(75);
return 0;
}
/* Respond to Get SSID Range request message */
@@ -1425,7 +769,7 @@
*(uint16_t *)(driver->apps_rsp_buf + 94) = MSG_SSID_21_LAST;
*(uint16_t *)(driver->apps_rsp_buf + 96) = MSG_SSID_22;
*(uint16_t *)(driver->apps_rsp_buf + 98) = MSG_SSID_22_LAST;
- ENCODE_RSP_AND_SEND(99);
+ encode_rsp_and_send(99);
return 0;
}
/* Check for Apps Only Respond to Get Subsys Build mask */
@@ -1537,14 +881,14 @@
*(int *)(ptr + i) = msg_bld_masks_22[i/4];
break;
}
- ENCODE_RSP_AND_SEND(8 + ssid_range - 1);
+ encode_rsp_and_send(8 + ssid_range - 1);
return 0;
}
/* Check for download command */
else if ((cpu_is_msm8x60() || chk_apps_master()) && (*buf == 0x3A)) {
/* send response back */
driver->apps_rsp_buf[0] = *buf;
- ENCODE_RSP_AND_SEND(0);
+ encode_rsp_and_send(0);
msleep(5000);
/* call download API */
msm_set_restart_mode(RESTART_DLOAD);
@@ -1564,7 +908,7 @@
for (i = 0; i < 13; i++)
driver->apps_rsp_buf[i+3] = 0;
- ENCODE_RSP_AND_SEND(15);
+ encode_rsp_and_send(15);
return 0;
}
}
@@ -1575,7 +919,7 @@
for (i = 0; i < 55; i++)
driver->apps_rsp_buf[i] = 0;
- ENCODE_RSP_AND_SEND(54);
+ encode_rsp_and_send(54);
return 0;
}
/* respond to 0x7c command */
@@ -1588,12 +932,12 @@
chk_config_get_id();
*(unsigned char *)(driver->apps_rsp_buf + 12) = '\0';
*(unsigned char *)(driver->apps_rsp_buf + 13) = '\0';
- ENCODE_RSP_AND_SEND(13);
+ encode_rsp_and_send(13);
return 0;
}
}
#endif
- return packet_type;
+ return packet_type;
}
#ifdef CONFIG_DIAG_OVER_USB
@@ -1608,7 +952,7 @@
driver->apps_rsp_buf[0] = 0x13; /* error code 13 */
for (i = 0; i < index; i++)
driver->apps_rsp_buf[i+1] = *(driver->hdlc_buf+i);
- ENCODE_RSP_AND_SEND(index - 3);
+ encode_rsp_and_send(index - 3);
}
#else
static inline void diag_send_error_rsp(int index) {}
@@ -1650,8 +994,8 @@
if (chk_apps_only()) {
diag_send_error_rsp(hdlc.dest_idx);
} else { /* APQ 8060, Let Q6 respond */
- if (driver->chqdsp)
- smd_write(driver->chqdsp, driver->hdlc_buf,
+ if (driver->chlpass)
+ smd_write(driver->chlpass, driver->hdlc_buf,
hdlc.dest_idx - 3);
}
type = 0;
@@ -1694,18 +1038,18 @@
driver->usb_connected = 1;
driver->in_busy_1 = 0;
driver->in_busy_2 = 0;
- driver->in_busy_qdsp_1 = 0;
- driver->in_busy_qdsp_2 = 0;
+ driver->in_busy_lpass_1 = 0;
+ driver->in_busy_lpass_2 = 0;
driver->in_busy_wcnss_1 = 0;
driver->in_busy_wcnss_2 = 0;
/* Poll SMD channels to check for data*/
queue_work(driver->diag_wq, &(driver->diag_read_smd_work));
- queue_work(driver->diag_wq, &(driver->diag_read_smd_qdsp_work));
+ queue_work(driver->diag_wq, &(driver->diag_read_smd_lpass_work));
queue_work(driver->diag_wq, &(driver->diag_read_smd_wcnss_work));
/* Poll SMD CNTL channels to check for data */
diag_smd_cntl_notify(NULL, SMD_EVENT_DATA);
- diag_smd_qdsp_cntl_notify(NULL, SMD_EVENT_DATA);
+ diag_smd_lpass_cntl_notify(NULL, SMD_EVENT_DATA);
diag_smd_wcnss_cntl_notify(NULL, SMD_EVENT_DATA);
/* Poll USB channel to check for data*/
queue_work(driver->diag_wq, &(driver->diag_read_work));
@@ -1729,8 +1073,8 @@
if (driver->logging_mode == USB_MODE) {
driver->in_busy_1 = 1;
driver->in_busy_2 = 1;
- driver->in_busy_qdsp_1 = 1;
- driver->in_busy_qdsp_2 = 1;
+ driver->in_busy_lpass_1 = 1;
+ driver->in_busy_lpass_2 = 1;
driver->in_busy_wcnss_1 = 1;
driver->in_busy_wcnss_2 = 1;
}
@@ -1756,14 +1100,16 @@
driver->in_busy_2 = 0;
APPEND_DEBUG('O');
queue_work(driver->diag_wq, &(driver->diag_read_smd_work));
- } else if (buf == (void *)driver->buf_in_qdsp_1) {
- driver->in_busy_qdsp_1 = 0;
+ } else if (buf == (void *)driver->buf_in_lpass_1) {
+ driver->in_busy_lpass_1 = 0;
APPEND_DEBUG('p');
- queue_work(driver->diag_wq, &(driver->diag_read_smd_qdsp_work));
- } else if (buf == (void *)driver->buf_in_qdsp_2) {
- driver->in_busy_qdsp_2 = 0;
+ queue_work(driver->diag_wq,
+ &(driver->diag_read_smd_lpass_work));
+ } else if (buf == (void *)driver->buf_in_lpass_2) {
+ driver->in_busy_lpass_2 = 0;
APPEND_DEBUG('P');
- queue_work(driver->diag_wq, &(driver->diag_read_smd_qdsp_work));
+ queue_work(driver->diag_wq,
+ &(driver->diag_read_smd_lpass_work));
} else if (buf == driver->buf_in_wcnss_1) {
driver->in_busy_wcnss_1 = 0;
APPEND_DEBUG('r');
@@ -1889,18 +1235,18 @@
}
#if defined(CONFIG_MSM_N_WAY_SMD)
-static void diag_smd_qdsp_notify(void *ctxt, unsigned event)
+static void diag_smd_lpass_notify(void *ctxt, unsigned event)
{
if (event == SMD_EVENT_CLOSE) {
queue_work(driver->diag_cntl_wq,
&(driver->diag_clean_lpass_reg_work));
- driver->chqdsp = 0;
+ driver->chlpass = 0;
return;
} else if (event == SMD_EVENT_OPEN) {
- if (chqdsp_temp)
- driver->chqdsp = chqdsp_temp;
+ if (chlpass_temp)
+ driver->chlpass = chlpass_temp;
}
- queue_work(driver->diag_wq, &(driver->diag_read_smd_qdsp_work));
+ queue_work(driver->diag_wq, &(driver->diag_read_smd_lpass_work));
}
#endif
@@ -1928,9 +1274,9 @@
}
#if defined(CONFIG_MSM_N_WAY_SMD)
if (pdev->id == SMD_APPS_QDSP) {
- r = smd_named_open_on_edge("DIAG", SMD_APPS_QDSP
- , &driver->chqdsp, driver, diag_smd_qdsp_notify);
- chqdsp_temp = driver->chqdsp;
+ r = smd_named_open_on_edge("DIAG", SMD_APPS_QDSP,
+ &driver->chlpass, driver, diag_smd_lpass_notify);
+ chlpass_temp = driver->chlpass;
}
#endif
if (pdev->id == SMD_APPS_WCNSS) {
@@ -1989,27 +1335,6 @@
driver->use_device_tree = has_device_tree();
mutex_init(&driver->diag_cntl_mutex);
- if (driver->event_mask == NULL) {
- driver->event_mask = kzalloc(sizeof(
- struct diag_ctrl_event_mask), GFP_KERNEL);
- if (driver->event_mask == NULL)
- goto err;
- kmemleak_not_leak(driver->event_mask);
- }
- if (driver->msg_mask == NULL) {
- driver->msg_mask = kzalloc(sizeof(
- struct diag_ctrl_msg_mask), GFP_KERNEL);
- if (driver->msg_mask == NULL)
- goto err;
- kmemleak_not_leak(driver->msg_mask);
- }
- if (driver->log_mask == NULL) {
- driver->log_mask = kzalloc(sizeof(
- struct diag_ctrl_log_mask), GFP_KERNEL);
- if (driver->log_mask == NULL)
- goto err;
- kmemleak_not_leak(driver->log_mask);
- }
if (driver->buf_in_1 == NULL) {
driver->buf_in_1 = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
if (driver->buf_in_1 == NULL)
@@ -2022,17 +1347,17 @@
goto err;
kmemleak_not_leak(driver->buf_in_2);
}
- if (driver->buf_in_qdsp_1 == NULL) {
- driver->buf_in_qdsp_1 = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
- if (driver->buf_in_qdsp_1 == NULL)
+ if (driver->buf_in_lpass_1 == NULL) {
+ driver->buf_in_lpass_1 = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
+ if (driver->buf_in_lpass_1 == NULL)
goto err;
- kmemleak_not_leak(driver->buf_in_qdsp_1);
+ kmemleak_not_leak(driver->buf_in_lpass_1);
}
- if (driver->buf_in_qdsp_2 == NULL) {
- driver->buf_in_qdsp_2 = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
- if (driver->buf_in_qdsp_2 == NULL)
+ if (driver->buf_in_lpass_2 == NULL) {
+ driver->buf_in_lpass_2 = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
+ if (driver->buf_in_lpass_2 == NULL)
goto err;
- kmemleak_not_leak(driver->buf_in_qdsp_2);
+ kmemleak_not_leak(driver->buf_in_lpass_2);
}
if (driver->buf_in_wcnss_1 == NULL) {
driver->buf_in_wcnss_1 = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
@@ -2046,28 +1371,6 @@
goto err;
kmemleak_not_leak(driver->buf_in_wcnss_2);
}
-
- if (driver->buf_msg_mask_update == NULL) {
- driver->buf_msg_mask_update = kzalloc(APPS_BUF_SIZE,
- GFP_KERNEL);
- if (driver->buf_msg_mask_update == NULL)
- goto err;
- kmemleak_not_leak(driver->buf_msg_mask_update);
- }
- if (driver->buf_log_mask_update == NULL) {
- driver->buf_log_mask_update = kzalloc(APPS_BUF_SIZE,
- GFP_KERNEL);
- if (driver->buf_log_mask_update == NULL)
- goto err;
- kmemleak_not_leak(driver->buf_log_mask_update);
- }
- if (driver->buf_event_mask_update == NULL) {
- driver->buf_event_mask_update = kzalloc(APPS_BUF_SIZE,
- GFP_KERNEL);
- if (driver->buf_event_mask_update == NULL)
- goto err;
- kmemleak_not_leak(driver->buf_event_mask_update);
- }
if (driver->usb_buf_out == NULL &&
(driver->usb_buf_out = kzalloc(USB_MAX_OUT_BUF,
GFP_KERNEL)) == NULL)
@@ -2082,23 +1385,6 @@
if (driver->user_space_data == NULL)
goto err;
kmemleak_not_leak(driver->user_space_data);
- if (driver->msg_masks == NULL
- && (driver->msg_masks = kzalloc(MSG_MASK_SIZE,
- GFP_KERNEL)) == NULL)
- goto err;
- kmemleak_not_leak(driver->msg_masks);
- diag_create_msg_mask_table();
- diag_event_num_bytes = 0;
- if (driver->log_masks == NULL &&
- (driver->log_masks = kzalloc(LOG_MASK_SIZE, GFP_KERNEL)) == NULL)
- goto err;
- kmemleak_not_leak(driver->log_masks);
- driver->log_masks_length = (sizeof(struct mask_info))*MAX_EQUIP_ID;
- if (driver->event_masks == NULL &&
- (driver->event_masks = kzalloc(EVENT_MASK_SIZE,
- GFP_KERNEL)) == NULL)
- goto err;
- kmemleak_not_leak(driver->event_masks);
if (driver->client_map == NULL &&
(driver->client_map = kzalloc
((driver->num_clients) * sizeof(struct diag_client_map),
@@ -2136,19 +1422,19 @@
goto err;
kmemleak_not_leak(driver->write_ptr_2);
}
- if (driver->write_ptr_qdsp_1 == NULL) {
- driver->write_ptr_qdsp_1 = kzalloc(
+ if (driver->write_ptr_lpass_1 == NULL) {
+ driver->write_ptr_lpass_1 = kzalloc(
sizeof(struct diag_request), GFP_KERNEL);
- if (driver->write_ptr_qdsp_1 == NULL)
+ if (driver->write_ptr_lpass_1 == NULL)
goto err;
- kmemleak_not_leak(driver->write_ptr_qdsp_1);
+ kmemleak_not_leak(driver->write_ptr_lpass_1);
}
- if (driver->write_ptr_qdsp_2 == NULL) {
- driver->write_ptr_qdsp_2 = kzalloc(
+ if (driver->write_ptr_lpass_2 == NULL) {
+ driver->write_ptr_lpass_2 = kzalloc(
sizeof(struct diag_request), GFP_KERNEL);
- if (driver->write_ptr_qdsp_2 == NULL)
+ if (driver->write_ptr_lpass_2 == NULL)
goto err;
- kmemleak_not_leak(driver->write_ptr_qdsp_2);
+ kmemleak_not_leak(driver->write_ptr_lpass_2);
}
if (driver->write_ptr_wcnss_1 == NULL) {
driver->write_ptr_wcnss_1 = kzalloc(
@@ -2187,12 +1473,6 @@
#ifdef CONFIG_DIAG_OVER_USB
INIT_WORK(&(driver->diag_proc_hdlc_work), diag_process_hdlc_fn);
INIT_WORK(&(driver->diag_read_work), diag_read_work_fn);
- INIT_WORK(&(driver->diag_modem_mask_update_work),
- diag_modem_mask_update_fn);
- INIT_WORK(&(driver->diag_qdsp_mask_update_work),
- diag_qdsp_mask_update_fn);
- INIT_WORK(&(driver->diag_wcnss_mask_update_work),
- diag_wcnss_mask_update_fn);
driver->legacy_ch = usb_diag_open(DIAG_LEGACY, driver,
diag_usb_legacy_notifier);
if (IS_ERR(driver->legacy_ch)) {
@@ -2205,49 +1485,43 @@
return;
err:
- pr_err("diag: Could not initialize diag buffers");
- kfree(driver->event_mask);
- kfree(driver->log_mask);
- kfree(driver->msg_mask);
- kfree(driver->buf_in_1);
- kfree(driver->buf_in_2);
- kfree(driver->buf_in_qdsp_1);
- kfree(driver->buf_in_qdsp_2);
- kfree(driver->buf_in_wcnss_1);
- kfree(driver->buf_in_wcnss_2);
- kfree(driver->buf_msg_mask_update);
- kfree(driver->buf_log_mask_update);
- kfree(driver->buf_event_mask_update);
- kfree(driver->usb_buf_out);
- kfree(driver->hdlc_buf);
- kfree(driver->msg_masks);
- kfree(driver->log_masks);
- kfree(driver->event_masks);
- kfree(driver->client_map);
- kfree(driver->buf_tbl);
- kfree(driver->data_ready);
- kfree(driver->table);
- kfree(driver->pkt_buf);
- kfree(driver->write_ptr_1);
- kfree(driver->write_ptr_2);
- kfree(driver->write_ptr_qdsp_1);
- kfree(driver->write_ptr_qdsp_2);
- kfree(driver->write_ptr_wcnss_1);
- kfree(driver->write_ptr_wcnss_2);
- kfree(driver->usb_read_ptr);
- kfree(driver->apps_rsp_buf);
- kfree(driver->user_space_data);
- if (driver->diag_wq)
- destroy_workqueue(driver->diag_wq);
+ pr_err("diag: Could not initialize diag buffers");
+ kfree(driver->buf_in_1);
+ kfree(driver->buf_in_2);
+ kfree(driver->buf_in_lpass_1);
+ kfree(driver->buf_in_lpass_2);
+ kfree(driver->buf_in_wcnss_1);
+ kfree(driver->buf_in_wcnss_2);
+ kfree(driver->buf_msg_mask_update);
+ kfree(driver->buf_log_mask_update);
+ kfree(driver->buf_event_mask_update);
+ kfree(driver->usb_buf_out);
+ kfree(driver->hdlc_buf);
+ kfree(driver->client_map);
+ kfree(driver->buf_tbl);
+ kfree(driver->data_ready);
+ kfree(driver->table);
+ kfree(driver->pkt_buf);
+ kfree(driver->write_ptr_1);
+ kfree(driver->write_ptr_2);
+ kfree(driver->write_ptr_lpass_1);
+ kfree(driver->write_ptr_lpass_2);
+ kfree(driver->write_ptr_wcnss_1);
+ kfree(driver->write_ptr_wcnss_2);
+ kfree(driver->usb_read_ptr);
+ kfree(driver->apps_rsp_buf);
+ kfree(driver->user_space_data);
+ if (driver->diag_wq)
+ destroy_workqueue(driver->diag_wq);
}
void diagfwd_exit(void)
{
smd_close(driver->ch);
- smd_close(driver->chqdsp);
+ smd_close(driver->chlpass);
smd_close(driver->ch_wcnss);
driver->ch = 0; /* SMD can make this NULL */
- driver->chqdsp = 0;
+ driver->chlpass = 0;
driver->ch_wcnss = 0;
#ifdef CONFIG_DIAG_OVER_USB
if (driver->usb_connected)
@@ -2257,13 +1531,10 @@
platform_driver_unregister(&msm_smd_ch1_driver);
platform_driver_unregister(&msm_diag_dci_driver);
platform_driver_unregister(&diag_smd_lite_driver);
- kfree(driver->event_mask);
- kfree(driver->log_mask);
- kfree(driver->msg_mask);
kfree(driver->buf_in_1);
kfree(driver->buf_in_2);
- kfree(driver->buf_in_qdsp_1);
- kfree(driver->buf_in_qdsp_2);
+ kfree(driver->buf_in_lpass_1);
+ kfree(driver->buf_in_lpass_2);
kfree(driver->buf_in_wcnss_1);
kfree(driver->buf_in_wcnss_2);
kfree(driver->buf_msg_mask_update);
@@ -2271,9 +1542,6 @@
kfree(driver->buf_event_mask_update);
kfree(driver->usb_buf_out);
kfree(driver->hdlc_buf);
- kfree(driver->msg_masks);
- kfree(driver->log_masks);
- kfree(driver->event_masks);
kfree(driver->client_map);
kfree(driver->buf_tbl);
kfree(driver->data_ready);
@@ -2281,8 +1549,8 @@
kfree(driver->pkt_buf);
kfree(driver->write_ptr_1);
kfree(driver->write_ptr_2);
- kfree(driver->write_ptr_qdsp_1);
- kfree(driver->write_ptr_qdsp_2);
+ kfree(driver->write_ptr_lpass_1);
+ kfree(driver->write_ptr_lpass_2);
kfree(driver->write_ptr_wcnss_1);
kfree(driver->write_ptr_wcnss_2);
kfree(driver->usb_read_ptr);
diff --git a/drivers/char/diag/diagfwd.h b/drivers/char/diag/diagfwd.h
index f5de2ac..a0631d6 100644
--- a/drivers/char/diag/diagfwd.h
+++ b/drivers/char/diag/diagfwd.h
@@ -16,11 +16,14 @@
#define NO_PROCESS 0
#define NON_APPS_PROC -1
+#define CHK_OVERFLOW(bufStart, start, end, length) \
+ ((((bufStart) <= (start)) && ((end) - (start) >= (length))) ? 1 : 0)
+
void diagfwd_init(void);
void diagfwd_exit(void);
void diag_process_hdlc(void *data, unsigned len);
void __diag_smd_send_req(void);
-void __diag_smd_qdsp_send_req(void);
+void __diag_smd_lpass_send_req(void);
void __diag_smd_wcnss_send_req(void);
void diag_usb_legacy_notifier(void *, unsigned, struct diag_request *);
long diagchar_ioctl(struct file *, unsigned int, unsigned long);
@@ -31,11 +34,9 @@
int chk_apps_only(void);
int chk_apps_master(void);
int chk_polling_response(void);
-void diag_send_event_mask_update(smd_channel_t *, int num_bytes);
-void diag_send_msg_mask_update(smd_channel_t *, int ssid_first,
- int ssid_last, int proc);
-void diag_send_log_mask_update(smd_channel_t *, int);
+void diag_update_userspace_clients(unsigned int type);
void diag_update_sleeping_process(int process_id, int data_type);
+void encode_rsp_and_send(int buf_length);
/* State for diag forwarding */
#ifdef CONFIG_DIAG_OVER_USB
int diagfwd_connect(void);
@@ -43,6 +44,5 @@
#endif
extern int diag_debug_buf_idx;
extern unsigned char diag_debug_buf[1024];
-extern int diag_event_num_bytes;
extern struct platform_driver msm_diag_dci_driver;
#endif
diff --git a/drivers/char/diag/diagfwd_cntl.c b/drivers/char/diag/diagfwd_cntl.c
index 52fd673..4848a1d 100644
--- a/drivers/char/diag/diagfwd_cntl.c
+++ b/drivers/char/diag/diagfwd_cntl.c
@@ -17,9 +17,6 @@
#include "diagchar.h"
#include "diagfwd.h"
#include "diagfwd_cntl.h"
-#ifdef CONFIG_DEBUG_FS
-#include <linux/debugfs.h>
-#endif
/* tracks which peripheral is undergoing SSR */
static uint16_t reg_dirty;
#define HDR_SIZ 8
@@ -36,7 +33,7 @@
{
pr_debug("diag: clean lpass registration\n");
reg_dirty |= DIAG_CON_LPASS;
- diag_clear_reg(QDSP_PROC);
+ diag_clear_reg(LPASS_PROC);
reg_dirty ^= DIAG_CON_LPASS;
}
@@ -72,26 +69,26 @@
}
}
-void diag_smd_qdsp_cntl_notify(void *ctxt, unsigned event)
+void diag_smd_lpass_cntl_notify(void *ctxt, unsigned event)
{
int r1, r2;
- if (!(driver->chqdsp_cntl))
+ if (!(driver->chlpass_cntl))
return;
switch (event) {
case SMD_EVENT_DATA:
- r1 = smd_read_avail(driver->chqdsp_cntl);
- r2 = smd_cur_packet_size(driver->chqdsp_cntl);
+ r1 = smd_read_avail(driver->chlpass_cntl);
+ r2 = smd_cur_packet_size(driver->chlpass_cntl);
if (r1 > 0 && r1 == r2)
queue_work(driver->diag_wq,
- &(driver->diag_read_smd_qdsp_cntl_work));
+ &(driver->diag_read_smd_lpass_cntl_work));
else
pr_debug("diag: incomplete pkt on LPASS CNTL ch\n");
break;
case SMD_EVENT_OPEN:
queue_work(driver->diag_cntl_wq,
- &(driver->diag_qdsp_mask_update_work));
+ &(driver->diag_lpass_mask_update_work));
break;
}
}
@@ -142,9 +139,9 @@
buf = driver->buf_in_cntl;
smd_ch = driver->ch_cntl;
reg_mask = DIAG_CON_MPSS;
- } else if (proc_num == QDSP_PROC) {
- buf = driver->buf_in_qdsp_cntl;
- smd_ch = driver->chqdsp_cntl;
+ } else if (proc_num == LPASS_PROC) {
+ buf = driver->buf_in_lpass_cntl;
+ smd_ch = driver->chlpass_cntl;
reg_mask = DIAG_CON_LPASS;
} else if (proc_num == WCNSS_PROC) {
buf = driver->buf_in_wcnss_cntl;
@@ -221,6 +218,8 @@
pr_err("diag: drop reg proc %d\n",
proc_num);
kfree(temp);
+ } else if (type != DIAG_CTRL_MSG_REG) {
+ flag = 1;
}
buf = buf + HDR_SIZ + data_len;
}
@@ -230,8 +229,8 @@
/* Poll SMD CNTL channels to check for data */
if (proc_num == MODEM_PROC)
diag_smd_cntl_notify(NULL, SMD_EVENT_DATA);
- else if (proc_num == QDSP_PROC)
- diag_smd_qdsp_cntl_notify(NULL, SMD_EVENT_DATA);
+ else if (proc_num == LPASS_PROC)
+ diag_smd_lpass_cntl_notify(NULL, SMD_EVENT_DATA);
else if (proc_num == WCNSS_PROC)
diag_smd_wcnss_cntl_notify(NULL, SMD_EVENT_DATA);
}
@@ -242,9 +241,9 @@
diag_smd_cntl_send_req(MODEM_PROC);
}
-void diag_read_smd_qdsp_cntl_work_fn(struct work_struct *work)
+void diag_read_smd_lpass_cntl_work_fn(struct work_struct *work)
{
- diag_smd_cntl_send_req(QDSP_PROC);
+ diag_smd_cntl_send_req(LPASS_PROC);
}
void diag_read_smd_wcnss_cntl_work_fn(struct work_struct *work)
@@ -263,8 +262,8 @@
diag_smd_cntl_notify);
if (pdev->id == SMD_APPS_QDSP)
r = smd_named_open_on_edge("DIAG_CNTL", SMD_APPS_QDSP
- , &driver->chqdsp_cntl, driver,
- diag_smd_qdsp_cntl_notify);
+ , &driver->chlpass_cntl, driver,
+ diag_smd_lpass_cntl_notify);
if (pdev->id == SMD_APPS_WCNSS)
r = smd_named_open_on_edge("APPS_RIVA_CTRL",
SMD_APPS_WCNSS, &driver->ch_wcnss_cntl,
@@ -322,11 +321,11 @@
goto err;
kmemleak_not_leak(driver->buf_in_cntl);
}
- if (driver->buf_in_qdsp_cntl == NULL) {
- driver->buf_in_qdsp_cntl = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
- if (driver->buf_in_qdsp_cntl == NULL)
+ if (driver->buf_in_lpass_cntl == NULL) {
+ driver->buf_in_lpass_cntl = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
+ if (driver->buf_in_lpass_cntl == NULL)
goto err;
- kmemleak_not_leak(driver->buf_in_qdsp_cntl);
+ kmemleak_not_leak(driver->buf_in_lpass_cntl);
}
if (driver->buf_in_wcnss_cntl == NULL) {
driver->buf_in_wcnss_cntl = kzalloc(IN_BUF_SIZE, GFP_KERNEL);
@@ -341,7 +340,7 @@
err:
pr_err("diag: Could not initialize diag buffers");
kfree(driver->buf_in_cntl);
- kfree(driver->buf_in_qdsp_cntl);
+ kfree(driver->buf_in_lpass_cntl);
kfree(driver->buf_in_wcnss_cntl);
if (driver->diag_cntl_wq)
destroy_workqueue(driver->diag_cntl_wq);
@@ -350,302 +349,16 @@
void diagfwd_cntl_exit(void)
{
smd_close(driver->ch_cntl);
- smd_close(driver->chqdsp_cntl);
+ smd_close(driver->chlpass_cntl);
smd_close(driver->ch_wcnss_cntl);
driver->ch_cntl = 0;
- driver->chqdsp_cntl = 0;
+ driver->chlpass_cntl = 0;
driver->ch_wcnss_cntl = 0;
destroy_workqueue(driver->diag_cntl_wq);
platform_driver_unregister(&msm_smd_ch1_cntl_driver);
platform_driver_unregister(&diag_smd_lite_cntl_driver);
kfree(driver->buf_in_cntl);
- kfree(driver->buf_in_qdsp_cntl);
+ kfree(driver->buf_in_lpass_cntl);
kfree(driver->buf_in_wcnss_cntl);
}
-
-#ifdef CONFIG_DEBUG_FS
-#define DEBUG_BUF_SIZE 4096
-static struct dentry *diag_dbgfs_dent;
-static int diag_dbgfs_table_index;
-
-static ssize_t diag_dbgfs_read_status(struct file *file, char __user *ubuf,
- size_t count, loff_t *ppos)
-{
- char *buf;
- int ret;
-
- buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
- if (!buf) {
- pr_err("diag: %s, Error allocating memory\n", __func__);
- return -ENOMEM;
- }
-
- ret = scnprintf(buf, DEBUG_BUF_SIZE,
- "modem ch: 0x%x\n"
- "lpass ch: 0x%x\n"
- "riva ch: 0x%x\n"
- "dci ch: 0x%x\n"
- "modem cntl_ch: 0x%x\n"
- "lpass cntl_ch: 0x%x\n"
- "riva cntl_ch: 0x%x\n"
- "CPU Tools id: %d\n"
- "Apps only: %d\n"
- "Apps master: %d\n"
- "Check Polling Response: %d\n"
- "polling_reg_flag: %d\n"
- "uses device tree: %d\n"
- "in_busy_1: %d\n"
- "in_busy_2: %d\n"
- "in_busy_qdsp_1: %d\n"
- "in_busy_qdsp_2: %d\n"
- "in_busy_wcnss_1: %d\n"
- "in_busy_wcnss_2: %d\n"
- "in_busy_dci: %d\n"
- "logging_mode: %d\n",
- (unsigned int)driver->ch,
- (unsigned int)driver->chqdsp,
- (unsigned int)driver->ch_wcnss,
- (unsigned int)driver->ch_dci,
- (unsigned int)driver->ch_cntl,
- (unsigned int)driver->chqdsp_cntl,
- (unsigned int)driver->ch_wcnss_cntl,
- chk_config_get_id(),
- chk_apps_only(),
- chk_apps_master(),
- chk_polling_response(),
- driver->polling_reg_flag,
- driver->use_device_tree,
- driver->in_busy_1,
- driver->in_busy_2,
- driver->in_busy_qdsp_1,
- driver->in_busy_qdsp_2,
- driver->in_busy_wcnss_1,
- driver->in_busy_wcnss_2,
- driver->in_busy_dci,
- driver->logging_mode);
-
-#ifdef CONFIG_DIAG_OVER_USB
- ret += scnprintf(buf+ret, DEBUG_BUF_SIZE,
- "usb_connected: %d\n",
- driver->usb_connected);
-#endif
- ret = simple_read_from_buffer(ubuf, count, ppos, buf, ret);
-
- kfree(buf);
- return ret;
-}
-
-static ssize_t diag_dbgfs_read_workpending(struct file *file,
- char __user *ubuf, size_t count, loff_t *ppos)
-{
- char *buf;
- int ret;
-
- buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
- if (!buf) {
- pr_err("diag: %s, Error allocating memory\n", __func__);
- return -ENOMEM;
- }
-
- ret = scnprintf(buf, DEBUG_BUF_SIZE,
- "Pending status for work_stucts:\n"
- "diag_drain_work: %d\n"
- "diag_read_smd_work: %d\n"
- "diag_read_smd_cntl_work: %d\n"
- "diag_read_smd_qdsp_work: %d\n"
- "diag_read_smd_qdsp_cntl_work: %d\n"
- "diag_read_smd_wcnss_work: %d\n"
- "diag_read_smd_wcnss_cntl_work: %d\n"
- "diag_modem_mask_update_work: %d\n"
- "diag_qdsp_mask_update_work: %d\n"
- "diag_wcnss_mask_update_work: %d\n"
- "diag_read_smd_dci_work: %d\n",
- work_pending(&(driver->diag_drain_work)),
- work_pending(&(driver->diag_read_smd_work)),
- work_pending(&(driver->diag_read_smd_cntl_work)),
- work_pending(&(driver->diag_read_smd_qdsp_work)),
- work_pending(&(driver->diag_read_smd_qdsp_cntl_work)),
- work_pending(&(driver->diag_read_smd_wcnss_work)),
- work_pending(&(driver->diag_read_smd_wcnss_cntl_work)),
- work_pending(&(driver->diag_modem_mask_update_work)),
- work_pending(&(driver->diag_qdsp_mask_update_work)),
- work_pending(&(driver->diag_wcnss_mask_update_work)),
- work_pending(&(driver->diag_read_smd_dci_work)));
-
-#ifdef CONFIG_DIAG_OVER_USB
- ret += scnprintf(buf+ret, DEBUG_BUF_SIZE,
- "diag_proc_hdlc_work: %d\n"
- "diag_read_work: %d\n",
- work_pending(&(driver->diag_proc_hdlc_work)),
- work_pending(&(driver->diag_read_work)));
-#endif
- ret = simple_read_from_buffer(ubuf, count, ppos, buf, ret);
-
- kfree(buf);
- return ret;
-}
-
-static ssize_t diag_dbgfs_read_table(struct file *file, char __user *ubuf,
- size_t count, loff_t *ppos)
-{
- char *buf;
- int ret = 0;
- int i;
- int bytes_remaining;
- int bytes_in_buffer = 0;
- int bytes_written;
- int buf_size = (DEBUG_BUF_SIZE < count) ? DEBUG_BUF_SIZE : count;
-
- if (diag_dbgfs_table_index >= diag_max_reg) {
- /* Done. Reset to prepare for future requests */
- diag_dbgfs_table_index = 0;
- return 0;
- }
-
- buf = kzalloc(sizeof(char) * buf_size, GFP_KERNEL);
- if (!buf) {
- pr_err("diag: %s, Error allocating memory\n", __func__);
- return -ENOMEM;
- }
-
- bytes_remaining = buf_size;
- for (i = diag_dbgfs_table_index; i < diag_max_reg; i++) {
- /* Do not process empty entries in the table */
- if (driver->table[i].process_id == 0)
- continue;
-
- bytes_written = scnprintf(buf+bytes_in_buffer, bytes_remaining,
- "i: %3d, cmd_code: %4x, subsys_id: %4x, "
- "client: %2d, cmd_code_lo: %4x, "
- "cmd_code_hi: %4x, process_id: %5d\n",
- i,
- driver->table[i].cmd_code,
- driver->table[i].subsys_id,
- driver->table[i].client_id,
- driver->table[i].cmd_code_lo,
- driver->table[i].cmd_code_hi,
- driver->table[i].process_id);
-
- bytes_in_buffer += bytes_written;
-
- /* Check if there is room to add another table entry */
- bytes_remaining = buf_size - bytes_in_buffer;
- if (bytes_remaining < bytes_written)
- break;
- }
- diag_dbgfs_table_index = i;
-
- *ppos = 0;
- ret = simple_read_from_buffer(ubuf, count, ppos, buf, bytes_in_buffer);
-
- kfree(buf);
- return ret;
-}
-
-#ifdef CONFIG_DIAG_BRIDGE_CODE
-static ssize_t diag_dbgfs_read_hsic(struct file *file, char __user *ubuf,
- size_t count, loff_t *ppos)
-{
- char *buf;
- int ret;
-
- buf = kzalloc(sizeof(char) * DEBUG_BUF_SIZE, GFP_KERNEL);
- if (!buf) {
- pr_err("diag: %s, Error allocating memory\n", __func__);
- return -ENOMEM;
- }
-
- ret = scnprintf(buf, DEBUG_BUF_SIZE,
- "hsic ch: %d\n"
- "hsic enabled: %d\n"
- "hsic_opened: %d\n"
- "hsic_suspend: %d\n"
- "in_busy_hsic_read_on_device: %d\n"
- "in_busy_hsic_write: %d\n"
- "count_hsic_pool: %d\n"
- "count_hsic_write_pool: %d\n"
- "diag_hsic_pool: %x\n"
- "diag_hsic_write_pool: %x\n"
- "write_len_mdm: %d\n"
- "num_hsic_buf_tbl_entries: %d\n"
- "usb_mdm_connected: %d\n"
- "diag_read_mdm_work: %d\n"
- "diag_read_hsic_work: %d\n"
- "diag_disconnect_work: %d\n"
- "diag_usb_read_complete_work: %d\n",
- driver->hsic_ch,
- driver->hsic_device_enabled,
- driver->hsic_device_opened,
- driver->hsic_suspend,
- driver->in_busy_hsic_read_on_device,
- driver->in_busy_hsic_write,
- driver->count_hsic_pool,
- driver->count_hsic_write_pool,
- (unsigned int)driver->diag_hsic_pool,
- (unsigned int)driver->diag_hsic_write_pool,
- driver->write_len_mdm,
- driver->num_hsic_buf_tbl_entries,
- driver->usb_mdm_connected,
- work_pending(&(driver->diag_read_mdm_work)),
- work_pending(&(driver->diag_read_hsic_work)),
- work_pending(&(driver->diag_disconnect_work)),
- work_pending(&(driver->diag_usb_read_complete_work)));
-
- ret = simple_read_from_buffer(ubuf, count, ppos, buf, ret);
-
- kfree(buf);
- return ret;
-}
-
-const struct file_operations diag_dbgfs_hsic_ops = {
- .read = diag_dbgfs_read_hsic,
-};
-#endif
-
-const struct file_operations diag_dbgfs_status_ops = {
- .read = diag_dbgfs_read_status,
-};
-
-const struct file_operations diag_dbgfs_table_ops = {
- .read = diag_dbgfs_read_table,
-};
-
-const struct file_operations diag_dbgfs_workpending_ops = {
- .read = diag_dbgfs_read_workpending,
-};
-
-void diag_debugfs_init(void)
-{
- diag_dbgfs_dent = debugfs_create_dir("diag", 0);
- if (IS_ERR(diag_dbgfs_dent))
- return;
-
- debugfs_create_file("status", 0444, diag_dbgfs_dent, 0,
- &diag_dbgfs_status_ops);
-
- debugfs_create_file("table", 0444, diag_dbgfs_dent, 0,
- &diag_dbgfs_table_ops);
-
- debugfs_create_file("work_pending", 0444, diag_dbgfs_dent, 0,
- &diag_dbgfs_workpending_ops);
-
-#ifdef CONFIG_DIAG_BRIDGE_CODE
- debugfs_create_file("hsic", 0444, diag_dbgfs_dent, 0,
- &diag_dbgfs_hsic_ops);
-#endif
-
- diag_dbgfs_table_index = 0;
-}
-
-void diag_debugfs_cleanup(void)
-{
- if (diag_dbgfs_dent) {
- debugfs_remove_recursive(diag_dbgfs_dent);
- diag_dbgfs_dent = NULL;
- }
-}
-#else
-void diag_debugfs_init(void) { }
-void diag_debugfs_cleanup(void) { }
-#endif
diff --git a/drivers/char/diag/diagfwd_cntl.h b/drivers/char/diag/diagfwd_cntl.h
index 59e5e6b..8a0ec3f 100644
--- a/drivers/char/diag/diagfwd_cntl.h
+++ b/drivers/char/diag/diagfwd_cntl.h
@@ -80,15 +80,13 @@
void diagfwd_cntl_init(void);
void diagfwd_cntl_exit(void);
void diag_read_smd_cntl_work_fn(struct work_struct *);
-void diag_read_smd_qdsp_cntl_work_fn(struct work_struct *);
+void diag_read_smd_lpass_cntl_work_fn(struct work_struct *);
void diag_read_smd_wcnss_cntl_work_fn(struct work_struct *);
void diag_smd_cntl_notify(void *ctxt, unsigned event);
-void diag_smd_qdsp_cntl_notify(void *ctxt, unsigned event);
+void diag_smd_lpass_cntl_notify(void *ctxt, unsigned event);
void diag_smd_wcnss_cntl_notify(void *ctxt, unsigned event);
void diag_clean_modem_reg_fn(struct work_struct *);
void diag_clean_lpass_reg_fn(struct work_struct *);
void diag_clean_wcnss_reg_fn(struct work_struct *);
-void diag_debugfs_init(void);
-void diag_debugfs_cleanup(void);
#endif
diff --git a/drivers/char/diag/diagfwd_hsic.c b/drivers/char/diag/diagfwd_hsic.c
index 3878a82..56f2fae 100644
--- a/drivers/char/diag/diagfwd_hsic.c
+++ b/drivers/char/diag/diagfwd_hsic.c
@@ -236,20 +236,20 @@
.resume = diag_hsic_resume,
};
-static int diag_hsic_close(void)
+static void diag_hsic_close(void)
{
if (driver->hsic_device_enabled) {
driver->hsic_ch = 0;
if (driver->hsic_device_opened) {
driver->hsic_device_opened = 0;
diag_bridge_close();
+ pr_debug("diag: %s: closed successfully\n", __func__);
+ } else {
+ pr_debug("diag: %s: already closed\n", __func__);
}
- pr_debug("diag: in %s: closed successfully\n", __func__);
} else {
- pr_debug("diag: in %s: already closed\n", __func__);
+ pr_debug("diag: %s: HSIC device already removed\n", __func__);
}
-
- return 0;
}
/* diagfwd_cancel_hsic is called to cancel outstanding read/writes */
@@ -257,6 +257,7 @@
{
int err;
+ mutex_lock(&driver->bridge_mutex);
if (driver->hsic_device_enabled) {
if (driver->hsic_device_opened) {
driver->hsic_ch = 0;
@@ -274,6 +275,7 @@
}
}
+ mutex_unlock(&driver->bridge_mutex);
return 0;
}
@@ -284,6 +286,7 @@
pr_debug("diag: in %s\n", __func__);
+ mutex_lock(&driver->bridge_mutex);
/* If the usb cable is being connected */
if (process_cable) {
err = usb_diag_alloc_req(driver->mdm_ch, N_MDM_WRITE,
@@ -301,6 +304,7 @@
} else if (driver->diag_smux_enabled) {
driver->in_busy_smux = 0;
diagfwd_connect_smux();
+ mutex_unlock(&driver->bridge_mutex);
return 0;
}
@@ -323,22 +327,24 @@
* Turn on communication over usb mdm and hsic, if the hsic
* device driver is enabled and opened
*/
- if (driver->hsic_device_opened)
+ if (driver->hsic_device_opened) {
driver->hsic_ch = 1;
- /* Poll USB mdm channel to check for data */
- if (driver->logging_mode == USB_MODE)
- queue_work(driver->diag_bridge_wq,
- &driver->diag_read_mdm_work);
+ /* Poll USB mdm channel to check for data */
+ if (driver->logging_mode == USB_MODE)
+ queue_work(driver->diag_bridge_wq,
+ &driver->diag_read_mdm_work);
- /* Poll HSIC channel to check for data */
- queue_work(driver->diag_bridge_wq,
- &driver->diag_read_hsic_work);
+ /* Poll HSIC channel to check for data */
+ queue_work(driver->diag_bridge_wq,
+ &driver->diag_read_hsic_work);
+ }
} else {
/* The hsic device driver has not yet been enabled */
pr_info("diag: HSIC channel not yet enabled\n");
}
+ mutex_unlock(&driver->bridge_mutex);
return 0;
}
@@ -350,6 +356,8 @@
{
pr_debug("diag: In %s, process_cable: %d\n", __func__, process_cable);
+ mutex_lock(&driver->bridge_mutex);
+
/* If the usb cable is being disconnected */
if (process_cable) {
driver->usb_mdm_connected = 0;
@@ -361,7 +369,7 @@
driver->in_busy_hsic_read_on_device = 1;
driver->in_busy_hsic_write = 1;
/* Turn off communication over usb mdm and hsic */
- return diag_hsic_close();
+ diag_hsic_close();
} else if (driver->diag_smux_enabled &&
driver->logging_mode == USB_MODE) {
driver->in_busy_smux = 1;
@@ -370,6 +378,8 @@
/* Turn off communication over usb mdm and smux */
msm_smux_close(LCID_VALID);
}
+
+ mutex_unlock(&driver->bridge_mutex);
return 0;
}
@@ -551,13 +561,15 @@
{
int err = 0;
pr_debug("diag: in %s\n", __func__);
- if (!driver->hsic_device_enabled) {
+ if (!driver->hsic_inited) {
diagmem_hsic_init(driver);
INIT_WORK(&(driver->diag_read_hsic_work),
diag_read_hsic_work_fn);
- driver->hsic_device_enabled = 1;
+ driver->hsic_inited = 1;
}
+ mutex_lock(&driver->bridge_mutex);
+
/*
* The probe function was called after the usb was connected
* on the legacy channel OR ODL is turned on. Communication over usb
@@ -565,11 +577,17 @@
*/
if (driver->usb_mdm_connected || (driver->logging_mode ==
MEMORY_DEVICE_MODE)) {
- /* The hsic (diag_bridge) platform device driver is enabled */
+ if (driver->hsic_device_opened) {
+ /* should not happen. close it before re-opening */
+ pr_warn("diag: HSIC channel already opened in probe\n");
+ diag_bridge_close();
+ }
+
err = diag_bridge_open(&hsic_diag_bridge_ops);
if (err) {
pr_err("diag: could not open HSIC, err: %d\n", err);
driver->hsic_device_opened = 0;
+ mutex_unlock(&driver->bridge_mutex);
return err;
}
@@ -591,13 +609,19 @@
&driver->diag_read_hsic_work);
}
+ /* The hsic (diag_bridge) platform device driver is enabled */
+ driver->hsic_device_enabled = 1;
+ mutex_unlock(&driver->bridge_mutex);
return err;
}
static int diag_hsic_remove(struct platform_device *pdev)
{
pr_debug("diag: %s called\n", __func__);
+ mutex_lock(&driver->bridge_mutex);
diag_hsic_close();
+ driver->hsic_device_enabled = 0;
+ mutex_unlock(&driver->bridge_mutex);
return 0;
}
@@ -670,6 +694,7 @@
driver->itemsize_hsic_write = sizeof(struct diag_request);
driver->poolsize_hsic_write = N_MDM_WRITE;
+ mutex_init(&driver->bridge_mutex);
#ifdef CONFIG_DIAG_OVER_USB
INIT_WORK(&(driver->diag_read_mdm_work), diag_read_mdm_work_fn);
#endif
@@ -713,8 +738,9 @@
if (driver->hsic_device_enabled) {
diag_hsic_close();
driver->hsic_device_enabled = 0;
- diagmem_exit(driver, POOL_TYPE_ALL);
}
+ driver->hsic_inited = 0;
+ diagmem_exit(driver, POOL_TYPE_ALL);
if (driver->diag_smux_enabled) {
driver->lcid = LCID_INVALID;
kfree(driver->buf_in_smux);
diff --git a/drivers/char/diag/diagmem.c b/drivers/char/diag/diagmem.c
index 82c47af..1a522d5 100644
--- a/drivers/char/diag/diagmem.c
+++ b/drivers/char/diag/diagmem.c
@@ -106,7 +106,7 @@
printk(KERN_ALERT "Unable to destroy STRUCT mempool");
}
#ifdef CONFIG_DIAG_BRIDGE_CODE
- if (driver->diag_hsic_pool && (driver->hsic_device_enabled == 0)) {
+ if (driver->diag_hsic_pool && (driver->hsic_inited == 0)) {
if (driver->count_hsic_pool == 0) {
mempool_destroy(driver->diag_hdlc_pool);
driver->diag_hdlc_pool = NULL;
@@ -114,8 +114,7 @@
pr_err("Unable to destroy HDLC mempool");
}
- if (driver->diag_hsic_write_pool &&
- (driver->hsic_device_enabled == 0)) {
+ if (driver->diag_hsic_write_pool && (driver->hsic_inited == 0)) {
/*
* Free up struct pool ONLY if there are no outstanding
* transactions(aggregation buffer) with USB
diff --git a/drivers/coresight/Kconfig b/drivers/coresight/Kconfig
index 1219af1..ea4ad4f 100644
--- a/drivers/coresight/Kconfig
+++ b/drivers/coresight/Kconfig
@@ -30,3 +30,22 @@
For production builds, you should probably say 'N' here to avoid
potential power, performance and memory penalty.
+
+config MSM_QDSS_ETM_PCSAVE_DEFAULT_ENABLE
+ bool "Turn on PC saving by default"
+ depends on MSM_QDSS
+ help
+ Turns on program counter saving on reset by default. Otherwise,
+ PC saving is disabled by default but can be enabled via sysfs.
+
+ For production builds, you should probably say 'N' here to avoid
+ potential power penalty.
+
+config CONTROL_TRACE
+ tristate "Turn on to control tracing"
+ help
+ Builds module to abort tracing on a user space data, instruction
+ or prefetch abort.
+
+ For production builds, you should probably say 'N' here to avoid
+ potential power, performance and memory penalty.
diff --git a/drivers/coresight/Makefile b/drivers/coresight/Makefile
index 4ee93cf..033e5a0 100644
--- a/drivers/coresight/Makefile
+++ b/drivers/coresight/Makefile
@@ -1,3 +1,3 @@
-
+obj-$(CONFIG_CONTROL_TRACE) += control_trace.o
obj-$(CONFIG_OF) += of_coresight.o
-obj-$(CONFIG_MSM_QDSS) += coresight.o coresight-csr.o coresight-tmc.o coresight-tpiu.o coresight-etb.o coresight-funnel.o coresight-replicator.o coresight-stm.o coresight-etm.o
+obj-$(CONFIG_MSM_QDSS) += coresight.o coresight-csr.o coresight-tmc.o coresight-tpiu.o coresight-etb.o coresight-funnel.o coresight-replicator.o coresight-stm.o coresight-etm.o coresight-etm-cp14.o
diff --git a/drivers/coresight/control_trace.c b/drivers/coresight/control_trace.c
new file mode 100644
index 0000000..aa8bfc5
--- /dev/null
+++ b/drivers/coresight/control_trace.c
@@ -0,0 +1,71 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * DLKM to register a callback with a ftrace event
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/tracepoint.h>
+#include <linux/coresight.h>
+
+#include <trace/events/exception.h>
+
+static void abort_coresight_tracing(void *ignore, struct task_struct *task,\
+ unsigned long addr, unsigned int fsr)
+{
+ coresight_abort();
+ pr_debug("control_trace: task_name: %s, addr: %lu, fsr:%u",\
+ (char *)task->comm, addr, fsr);
+}
+
+static void abort_tracing_undef_instr(void *ignore, struct pt_regs *regs,\
+ void *pc)
+{
+ if (user_mode(regs)) {
+ coresight_abort();
+ pr_debug("control_trace: pc: %p", pc);
+ }
+}
+
+static int __init control_trace_init(void)
+{
+ int ret_user_fault, ret_undef_instr;
+ ret_user_fault = register_trace_user_fault(abort_coresight_tracing,\
+ NULL);
+ ret_undef_instr = register_trace_undef_instr(abort_tracing_undef_instr,\
+ NULL);
+ if (ret_user_fault != 0 || ret_undef_instr != 0) {
+ pr_info("control_trace: Module Not Registered\n");
+ return (ret_user_fault < 0 ?\
+ ret_user_fault : ret_undef_instr);
+ }
+ pr_info("control_trace: Module Registered\n");
+ return 0;
+}
+
+module_init(control_trace_init);
+
+static void __exit control_trace_exit(void)
+{
+ unregister_trace_user_fault(abort_coresight_tracing, NULL);
+ unregister_trace_undef_instr(abort_tracing_undef_instr, NULL);
+ pr_info("control_trace: Module Removed\n");
+}
+
+module_exit(control_trace_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Kernel Module to abort tracing");
diff --git a/drivers/coresight/coresight-etm-cp14.c b/drivers/coresight/coresight-etm-cp14.c
new file mode 100644
index 0000000..9a6c13a
--- /dev/null
+++ b/drivers/coresight/coresight-etm-cp14.c
@@ -0,0 +1,510 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <asm/hardware/cp14.h>
+
+static unsigned int etm_read_reg(uint32_t reg)
+{
+ switch (reg) {
+ case 0x0:
+ return etm_read(ETMCR);
+ case 0x1:
+ return etm_read(ETMCCR);
+ case 0x2:
+ return etm_read(ETMTRIGGER);
+ case 0x4:
+ return etm_read(ETMSR);
+ case 0x5:
+ return etm_read(ETMSCR);
+ case 0x6:
+ return etm_read(ETMTSSCR);
+ case 0x8:
+ return etm_read(ETMTEEVR);
+ case 0x9:
+ return etm_read(ETMTECR1);
+ case 0xB:
+ return etm_read(ETMFFLR);
+ case 0x10:
+ return etm_read(ETMACVR0);
+ case 0x11:
+ return etm_read(ETMACVR1);
+ case 0x12:
+ return etm_read(ETMACVR2);
+ case 0x13:
+ return etm_read(ETMACVR3);
+ case 0x14:
+ return etm_read(ETMACVR4);
+ case 0x15:
+ return etm_read(ETMACVR5);
+ case 0x16:
+ return etm_read(ETMACVR6);
+ case 0x17:
+ return etm_read(ETMACVR7);
+ case 0x18:
+ return etm_read(ETMACVR8);
+ case 0x19:
+ return etm_read(ETMACVR9);
+ case 0x1A:
+ return etm_read(ETMACVR10);
+ case 0x1B:
+ return etm_read(ETMACVR11);
+ case 0x1C:
+ return etm_read(ETMACVR12);
+ case 0x1D:
+ return etm_read(ETMACVR13);
+ case 0x1E:
+ return etm_read(ETMACVR14);
+ case 0x1F:
+ return etm_read(ETMACVR15);
+ case 0x20:
+ return etm_read(ETMACTR0);
+ case 0x21:
+ return etm_read(ETMACTR1);
+ case 0x22:
+ return etm_read(ETMACTR2);
+ case 0x23:
+ return etm_read(ETMACTR3);
+ case 0x24:
+ return etm_read(ETMACTR4);
+ case 0x25:
+ return etm_read(ETMACTR5);
+ case 0x26:
+ return etm_read(ETMACTR6);
+ case 0x27:
+ return etm_read(ETMACTR7);
+ case 0x28:
+ return etm_read(ETMACTR8);
+ case 0x29:
+ return etm_read(ETMACTR9);
+ case 0x2A:
+ return etm_read(ETMACTR10);
+ case 0x2B:
+ return etm_read(ETMACTR11);
+ case 0x2C:
+ return etm_read(ETMACTR12);
+ case 0x2D:
+ return etm_read(ETMACTR13);
+ case 0x2E:
+ return etm_read(ETMACTR14);
+ case 0x2F:
+ return etm_read(ETMACTR15);
+ case 0x50:
+ return etm_read(ETMCNTRLDVR0);
+ case 0x51:
+ return etm_read(ETMCNTRLDVR1);
+ case 0x52:
+ return etm_read(ETMCNTRLDVR2);
+ case 0x53:
+ return etm_read(ETMCNTRLDVR3);
+ case 0x54:
+ return etm_read(ETMCNTENR0);
+ case 0x55:
+ return etm_read(ETMCNTENR1);
+ case 0x56:
+ return etm_read(ETMCNTENR2);
+ case 0x57:
+ return etm_read(ETMCNTENR3);
+ case 0x58:
+ return etm_read(ETMCNTRLDEVR0);
+ case 0x59:
+ return etm_read(ETMCNTRLDEVR1);
+ case 0x5A:
+ return etm_read(ETMCNTRLDEVR2);
+ case 0x5B:
+ return etm_read(ETMCNTRLDEVR3);
+ case 0x5C:
+ return etm_read(ETMCNTVR0);
+ case 0x5D:
+ return etm_read(ETMCNTVR1);
+ case 0x5E:
+ return etm_read(ETMCNTVR2);
+ case 0x5F:
+ return etm_read(ETMCNTVR3);
+ case 0x60:
+ return etm_read(ETMSQ12EVR);
+ case 0x61:
+ return etm_read(ETMSQ21EVR);
+ case 0x62:
+ return etm_read(ETMSQ23EVR);
+ case 0x63:
+ return etm_read(ETMSQ31EVR);
+ case 0x64:
+ return etm_read(ETMSQ32EVR);
+ case 0x65:
+ return etm_read(ETMSQ13EVR);
+ case 0x67:
+ return etm_read(ETMSQR);
+ case 0x68:
+ return etm_read(ETMEXTOUTEVR0);
+ case 0x69:
+ return etm_read(ETMEXTOUTEVR1);
+ case 0x6A:
+ return etm_read(ETMEXTOUTEVR2);
+ case 0x6B:
+ return etm_read(ETMEXTOUTEVR3);
+ case 0x6C:
+ return etm_read(ETMCIDCVR0);
+ case 0x6D:
+ return etm_read(ETMCIDCVR1);
+ case 0x6E:
+ return etm_read(ETMCIDCVR2);
+ case 0x6F:
+ return etm_read(ETMCIDCMR);
+ case 0x70:
+ return etm_read(ETMIMPSPEC0);
+ case 0x71:
+ return etm_read(ETMIMPSPEC1);
+ case 0x72:
+ return etm_read(ETMIMPSPEC2);
+ case 0x73:
+ return etm_read(ETMIMPSPEC3);
+ case 0x74:
+ return etm_read(ETMIMPSPEC4);
+ case 0x75:
+ return etm_read(ETMIMPSPEC5);
+ case 0x76:
+ return etm_read(ETMIMPSPEC6);
+ case 0x77:
+ return etm_read(ETMIMPSPEC7);
+ case 0x78:
+ return etm_read(ETMSYNCFR);
+ case 0x79:
+ return etm_read(ETMIDR);
+ case 0x7A:
+ return etm_read(ETMCCER);
+ case 0x7B:
+ return etm_read(ETMEXTINSELR);
+ case 0x7C:
+ return etm_read(ETMTESSEICR);
+ case 0x7D:
+ return etm_read(ETMEIBCR);
+ case 0x7E:
+ return etm_read(ETMTSEVR);
+ case 0x7F:
+ return etm_read(ETMAUXCR);
+ case 0x80:
+ return etm_read(ETMTRACEIDR);
+ case 0x90:
+ return etm_read(ETMVMIDCVR);
+ case 0xC1:
+ return etm_read(ETMOSLSR);
+ case 0xC2:
+ return etm_read(ETMOSSRR);
+ case 0xC4:
+ return etm_read(ETMPDCR);
+ case 0xC5:
+ return etm_read(ETMPDSR);
+ default:
+ WARN(1, "invalid CP14 access to ETM reg: %lx",
+ (unsigned long)reg);
+ return 0;
+ }
+}
+
+static void etm_write_reg(uint32_t val, uint32_t reg)
+{
+ switch (reg) {
+ case 0x0:
+ etm_write(val, ETMCR);
+ return;
+ case 0x2:
+ etm_write(val, ETMTRIGGER);
+ return;
+ case 0x4:
+ etm_write(val, ETMSR);
+ return;
+ case 0x6:
+ etm_write(val, ETMTSSCR);
+ return;
+ case 0x8:
+ etm_write(val, ETMTEEVR);
+ return;
+ case 0x9:
+ etm_write(val, ETMTECR1);
+ return;
+ case 0xB:
+ etm_write(val, ETMFFLR);
+ return;
+ case 0x10:
+ etm_write(val, ETMACVR0);
+ return;
+ case 0x11:
+ etm_write(val, ETMACVR1);
+ return;
+ case 0x12:
+ etm_write(val, ETMACVR2);
+ return;
+ case 0x13:
+ etm_write(val, ETMACVR3);
+ return;
+ case 0x14:
+ etm_write(val, ETMACVR4);
+ return;
+ case 0x15:
+ etm_write(val, ETMACVR5);
+ return;
+ case 0x16:
+ etm_write(val, ETMACVR6);
+ return;
+ case 0x17:
+ etm_write(val, ETMACVR7);
+ return;
+ case 0x18:
+ etm_write(val, ETMACVR8);
+ return;
+ case 0x19:
+ etm_write(val, ETMACVR9);
+ return;
+ case 0x1A:
+ etm_write(val, ETMACVR10);
+ return;
+ case 0x1B:
+ etm_write(val, ETMACVR11);
+ return;
+ case 0x1C:
+ etm_write(val, ETMACVR12);
+ return;
+ case 0x1D:
+ etm_write(val, ETMACVR13);
+ return;
+ case 0x1E:
+ etm_write(val, ETMACVR14);
+ return;
+ case 0x1F:
+ etm_write(val, ETMACVR15);
+ return;
+ case 0x20:
+ etm_write(val, ETMACTR0);
+ return;
+ case 0x21:
+ etm_write(val, ETMACTR1);
+ return;
+ case 0x22:
+ etm_write(val, ETMACTR2);
+ return;
+ case 0x23:
+ etm_write(val, ETMACTR3);
+ return;
+ case 0x24:
+ etm_write(val, ETMACTR4);
+ return;
+ case 0x25:
+ etm_write(val, ETMACTR5);
+ return;
+ case 0x26:
+ etm_write(val, ETMACTR6);
+ return;
+ case 0x27:
+ etm_write(val, ETMACTR7);
+ return;
+ case 0x28:
+ etm_write(val, ETMACTR8);
+ return;
+ case 0x29:
+ etm_write(val, ETMACTR9);
+ return;
+ case 0x2A:
+ etm_write(val, ETMACTR10);
+ return;
+ case 0x2B:
+ etm_write(val, ETMACTR11);
+ return;
+ case 0x2C:
+ etm_write(val, ETMACTR12);
+ return;
+ case 0x2D:
+ etm_write(val, ETMACTR13);
+ return;
+ case 0x2E:
+ etm_write(val, ETMACTR14);
+ return;
+ case 0x2F:
+ etm_write(val, ETMACTR15);
+ return;
+ case 0x50:
+ etm_write(val, ETMCNTRLDVR0);
+ return;
+ case 0x51:
+ etm_write(val, ETMCNTRLDVR1);
+ return;
+ case 0x52:
+ etm_write(val, ETMCNTRLDVR2);
+ return;
+ case 0x53:
+ etm_write(val, ETMCNTRLDVR3);
+ return;
+ case 0x54:
+ etm_write(val, ETMCNTENR0);
+ return;
+ case 0x55:
+ etm_write(val, ETMCNTENR1);
+ return;
+ case 0x56:
+ etm_write(val, ETMCNTENR2);
+ return;
+ case 0x57:
+ etm_write(val, ETMCNTENR3);
+ return;
+ case 0x58:
+ etm_write(val, ETMCNTRLDEVR0);
+ return;
+ case 0x59:
+ etm_write(val, ETMCNTRLDEVR1);
+ return;
+ case 0x5A:
+ etm_write(val, ETMCNTRLDEVR2);
+ return;
+ case 0x5B:
+ etm_write(val, ETMCNTRLDEVR3);
+ return;
+ case 0x5C:
+ etm_write(val, ETMCNTVR0);
+ return;
+ case 0x5D:
+ etm_write(val, ETMCNTVR1);
+ return;
+ case 0x5E:
+ etm_write(val, ETMCNTVR2);
+ return;
+ case 0x5F:
+ etm_write(val, ETMCNTVR3);
+ return;
+ case 0x60:
+ etm_write(val, ETMSQ12EVR);
+ return;
+ case 0x61:
+ etm_write(val, ETMSQ21EVR);
+ return;
+ case 0x62:
+ etm_write(val, ETMSQ23EVR);
+ return;
+ case 0x63:
+ etm_write(val, ETMSQ31EVR);
+ return;
+ case 0x64:
+ etm_write(val, ETMSQ32EVR);
+ return;
+ case 0x65:
+ etm_write(val, ETMSQ13EVR);
+ return;
+ case 0x67:
+ etm_write(val, ETMSQR);
+ return;
+ case 0x68:
+ etm_write(val, ETMEXTOUTEVR0);
+ return;
+ case 0x69:
+ etm_write(val, ETMEXTOUTEVR1);
+ return;
+ case 0x6A:
+ etm_write(val, ETMEXTOUTEVR2);
+ return;
+ case 0x6B:
+ etm_write(val, ETMEXTOUTEVR3);
+ return;
+ case 0x6C:
+ etm_write(val, ETMCIDCVR0);
+ return;
+ case 0x6D:
+ etm_write(val, ETMCIDCVR1);
+ return;
+ case 0x6E:
+ etm_write(val, ETMCIDCVR2);
+ return;
+ case 0x6F:
+ etm_write(val, ETMCIDCMR);
+ return;
+ case 0x70:
+ etm_write(val, ETMIMPSPEC0);
+ return;
+ case 0x71:
+ etm_write(val, ETMIMPSPEC1);
+ return;
+ case 0x72:
+ etm_write(val, ETMIMPSPEC2);
+ return;
+ case 0x73:
+ etm_write(val, ETMIMPSPEC3);
+ return;
+ case 0x74:
+ etm_write(val, ETMIMPSPEC4);
+ return;
+ case 0x75:
+ etm_write(val, ETMIMPSPEC5);
+ return;
+ case 0x76:
+ etm_write(val, ETMIMPSPEC6);
+ return;
+ case 0x77:
+ etm_write(val, ETMIMPSPEC7);
+ return;
+ case 0x78:
+ etm_write(val, ETMSYNCFR);
+ return;
+ case 0x7B:
+ etm_write(val, ETMEXTINSELR);
+ return;
+ case 0x7C:
+ etm_write(val, ETMTESSEICR);
+ return;
+ case 0x7D:
+ etm_write(val, ETMEIBCR);
+ return;
+ case 0x7E:
+ etm_write(val, ETMTSEVR);
+ return;
+ case 0x7F:
+ etm_write(val, ETMAUXCR);
+ return;
+ case 0x80:
+ etm_write(val, ETMTRACEIDR);
+ return;
+ case 0x90:
+ etm_write(val, ETMVMIDCVR);
+ return;
+ case 0xC0:
+ etm_write(val, ETMOSLAR);
+ return;
+ case 0xC2:
+ etm_write(val, ETMOSSRR);
+ return;
+ case 0xC4:
+ etm_write(val, ETMPDCR);
+ return;
+ case 0xC5:
+ etm_write(val, ETMPDSR);
+ return;
+ default:
+ WARN(1, "invalid CP14 access to ETM reg: %lx",
+ (unsigned long)reg);
+ return;
+ }
+}
+
+static inline uint32_t offset_to_reg_num(uint32_t off)
+{
+ return off >> 2;
+}
+
+unsigned int etm_readl_cp14(uint32_t off)
+{
+ uint32_t reg = offset_to_reg_num(off);
+ return etm_read_reg(reg);
+}
+
+void etm_writel_cp14(uint32_t val, uint32_t off)
+{
+ uint32_t reg = offset_to_reg_num(off);
+ etm_write_reg(val, reg);
+}
diff --git a/drivers/coresight/coresight-etm.c b/drivers/coresight/coresight-etm.c
index f4c4d08..50bae55 100644
--- a/drivers/coresight/coresight-etm.c
+++ b/drivers/coresight/coresight-etm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -35,20 +35,45 @@
#include "coresight-priv.h"
-#define etm_writel(drvdata, val, off) \
+#define etm_writel_mm(drvdata, val, off) \
__raw_writel((val), drvdata->base + off)
-#define etm_readl(drvdata, off) \
+#define etm_readl_mm(drvdata, off) \
__raw_readl(drvdata->base + off)
+#define etm_writel(drvdata, val, off) \
+({ \
+ if (cpu_is_krait_v3()) \
+ etm_writel_cp14(val, off); \
+ else \
+ etm_writel_mm(drvdata, val, off); \
+})
+#define etm_readl(drvdata, off) \
+({ \
+ uint32_t val; \
+ if (cpu_is_krait_v3()) \
+ val = etm_readl_cp14(off); \
+ else \
+ val = etm_readl_mm(drvdata, off); \
+ val; \
+})
+
#define ETM_LOCK(drvdata) \
do { \
+ /* recommended by spec to ensure ETM writes are committed prior
+ * to resuming execution
+ */ \
mb(); \
- etm_writel(drvdata, 0x0, CORESIGHT_LAR); \
+ isb(); \
+ etm_writel_mm(drvdata, 0x0, CORESIGHT_LAR); \
} while (0)
#define ETM_UNLOCK(drvdata) \
do { \
- etm_writel(drvdata, CORESIGHT_UNLOCK, CORESIGHT_LAR); \
+ etm_writel_mm(drvdata, CORESIGHT_UNLOCK, CORESIGHT_LAR); \
+ /* ensure unlock and any pending writes are committed prior to
+ * programming ETM registers
+ */ \
mb(); \
+ isb(); \
} while (0)
/*
@@ -152,6 +177,15 @@
boot_enable, boot_enable, int, S_IRUGO
);
+#ifdef CONFIG_MSM_QDSS_ETM_PCSAVE_DEFAULT_ENABLE
+static int boot_pcsave_enable = 1;
+#else
+static int boot_pcsave_enable;
+#endif
+module_param_named(
+ boot_pcsave_enable, boot_pcsave_enable, int, S_IRUGO
+);
+
struct etm_drvdata {
void __iomem *base;
struct device *dev;
@@ -169,6 +203,7 @@
uint8_t reset;
uint32_t mode;
uint32_t ctrl;
+ uint8_t ctrl_pwrdwn;
uint32_t trigger_event;
uint32_t startstop_ctrl;
uint32_t enable_event;
@@ -195,12 +230,16 @@
uint32_t ctxid_mask;
uint32_t sync_freq;
uint32_t timestamp_event;
+ uint8_t pdcr_pwrup;
+ bool pcsave_impl;
+ bool pcsave_enable;
};
static struct etm_drvdata *etm0drvdata;
-/* ETM clock is derived from the processor clock and gets enabled on a
- * logical OR of below items on Krait (pass2 onwards):
+/*
+ * ETM clock is derived from the processor clock and gets enabled on a
+ * logical OR of below items on Krait (v2 onwards):
* 1.CPMR[ETMCLKEN] is 1
* 2.ETMCR[PD] is 0
* 3.ETMPDCR[PU] is 1
@@ -210,14 +249,17 @@
* 1., 2. and 3. above are permanent enables whereas 4. and 5. are temporary
* enables
*
- * We rely on 5. to be able to access ETMCR and then use 2. above for ETM
- * clock vote in the driver and the save-restore code uses 1. above
+ * We rely on 5. to be able to access ETMCR/ETMPDCR and then use 2./3. above
+ * for ETM clock vote in the driver and the save-restore code uses 1. above
* for its vote
*/
static void etm_set_pwrdwn(struct etm_drvdata *drvdata)
{
uint32_t etmcr;
+ /* ensure pending cp14 accesses complete before setting pwrdwn */
+ mb();
+ isb();
etmcr = etm_readl(drvdata, ETMCR);
etmcr |= BIT(0);
etm_writel(drvdata, etmcr, ETMCR);
@@ -230,6 +272,33 @@
etmcr = etm_readl(drvdata, ETMCR);
etmcr &= ~BIT(0);
etm_writel(drvdata, etmcr, ETMCR);
+ /* ensure pwrup completes before subsequent cp14 accesses */
+ mb();
+ isb();
+}
+
+static void etm_set_pwrup(struct etm_drvdata *drvdata)
+{
+ uint32_t etmpdcr;
+
+ etmpdcr = etm_readl_mm(drvdata, ETMPDCR);
+ etmpdcr |= BIT(3);
+ etm_writel_mm(drvdata, etmpdcr, ETMPDCR);
+ /* ensure pwrup completes before subsequent cp14 accesses */
+ mb();
+ isb();
+}
+
+static void etm_clr_pwrup(struct etm_drvdata *drvdata)
+{
+ uint32_t etmpdcr;
+
+ /* ensure pending cp14 accesses complete before clearing pwrup */
+ mb();
+ isb();
+ etmpdcr = etm_readl_mm(drvdata, ETMPDCR);
+ etmpdcr &= ~BIT(3);
+ etm_writel_mm(drvdata, etmpdcr, ETMPDCR);
}
static void etm_set_prog(struct etm_drvdata *drvdata)
@@ -240,6 +309,10 @@
etmcr = etm_readl(drvdata, ETMCR);
etmcr |= BIT(10);
etm_writel(drvdata, etmcr, ETMCR);
+ /* recommended by spec for cp14 accesses to ensure etmcr write is
+ * complete before polling etmsr
+ */
+ isb();
for (count = TIMEOUT_US; BVAL(etm_readl(drvdata, ETMSR), 1) != 1
&& count > 0; count--)
udelay(1);
@@ -255,6 +328,10 @@
etmcr = etm_readl(drvdata, ETMCR);
etmcr &= ~BIT(10);
etm_writel(drvdata, etmcr, ETMCR);
+ /* recommended by spec for cp14 accesses to ensure etmcr write is
+ * complete before polling etmsr
+ */
+ isb();
for (count = TIMEOUT_US; BVAL(etm_readl(drvdata, ETMSR), 1) != 0
&& count > 0; count--)
udelay(1);
@@ -262,17 +339,94 @@
etm_readl(drvdata, ETMSR));
}
-static void __etm_enable(void *info)
+static void etm_save_pwrdwn(struct etm_drvdata *drvdata)
{
- int i;
+ drvdata->ctrl_pwrdwn = BVAL(etm_readl(drvdata, ETMCR), 0);
+}
+
+static void etm_restore_pwrdwn(struct etm_drvdata *drvdata)
+{
+ uint32_t etmcr;
+
+ etmcr = etm_readl(drvdata, ETMCR);
+ etmcr = (etmcr & ~BIT(0)) | drvdata->ctrl_pwrdwn;
+ etm_writel(drvdata, etmcr, ETMCR);
+}
+
+static void etm_save_pwrup(struct etm_drvdata *drvdata)
+{
+ drvdata->pdcr_pwrup = BVAL(etm_readl_mm(drvdata, ETMPDCR), 3);
+}
+
+static void etm_restore_pwrup(struct etm_drvdata *drvdata)
+{
+ uint32_t etmpdcr;
+
+ etmpdcr = etm_readl_mm(drvdata, ETMPDCR);
+ etmpdcr = (etmpdcr & ~BIT(3)) | (drvdata->pdcr_pwrup << 3);
+ etm_writel_mm(drvdata, etmpdcr, ETMPDCR);
+}
+
+static void etm_enable_pcsave(void *info)
+{
struct etm_drvdata *drvdata = info;
ETM_UNLOCK(drvdata);
- /* Vote for ETM power/clock enable */
+
+ etm_save_pwrup(drvdata);
+ /*
+ * ETMPDCR is only accessible via memory mapped interface and so use
+ * it first to enable power/clock to allow subsequent cp14 accesses.
+ */
+ etm_set_pwrup(drvdata);
+ etm_clr_pwrdwn(drvdata);
+ etm_restore_pwrup(drvdata);
+
+ ETM_LOCK(drvdata);
+}
+
+static void etm_disable_pcsave(void *info)
+{
+ struct etm_drvdata *drvdata = info;
+
+ ETM_UNLOCK(drvdata);
+
+ etm_save_pwrup(drvdata);
+ /*
+ * ETMPDCR is only accessible via memory mapped interface and so use
+ * it first to enable power/clock to allow subsequent cp14 accesses.
+ */
+ etm_set_pwrup(drvdata);
+ etm_set_pwrdwn(drvdata);
+ etm_restore_pwrup(drvdata);
+
+ ETM_LOCK(drvdata);
+}
+
+static void __etm_enable(void *info)
+{
+ int i;
+ uint32_t etmcr;
+ struct etm_drvdata *drvdata = info;
+
+ ETM_UNLOCK(drvdata);
+ /*
+ * Vote for ETM power/clock enable. ETMPDCR is only accessible via
+ * memory mapped interface and so use it first to enable power/clock
+ * to allow subsequent cp14 accesses.
+ */
+ etm_set_pwrup(drvdata);
+ etm_save_pwrdwn(drvdata);
+ /*
+ * Clear power down bit since when this bit is set writes to
+ * certain registers might be ignored.
+ */
etm_clr_pwrdwn(drvdata);
etm_set_prog(drvdata);
- etm_writel(drvdata, drvdata->ctrl | BIT(10), ETMCR);
+ etmcr = etm_readl(drvdata, ETMCR);
+ etmcr &= (BIT(10) | BIT(0));
+ etm_writel(drvdata, drvdata->ctrl | etmcr, ETMCR);
etm_writel(drvdata, drvdata->trigger_event, ETMTRIGGER);
etm_writel(drvdata, drvdata->startstop_ctrl, ETMTSSCR);
etm_writel(drvdata, drvdata->enable_event, ETMTEEVR);
@@ -309,6 +463,7 @@
etm_writel(drvdata, 0x00000000, ETMVMIDCVR);
etm_clr_prog(drvdata);
+ etm_restore_pwrdwn(drvdata);
ETM_LOCK(drvdata);
dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu);
@@ -346,13 +501,20 @@
struct etm_drvdata *drvdata = info;
ETM_UNLOCK(drvdata);
+ etm_save_pwrdwn(drvdata);
+ /*
+ * Clear power down bit since when this bit is set writes to
+ * certain registers might be ignored.
+ */
+ etm_clr_pwrdwn(drvdata);
etm_set_prog(drvdata);
/* program trace enable to low by using always false event */
etm_writel(drvdata, 0x6F | BIT(14), ETMTEEVR);
+ etm_restore_pwrdwn(drvdata);
/* Vote for ETM power/clock disable */
- etm_set_pwrdwn(drvdata);
+ etm_clr_pwrup(drvdata);
ETM_LOCK(drvdata);
dev_dbg(drvdata->dev, "cpu: %d disable smp call done\n", drvdata->cpu);
@@ -1307,6 +1469,7 @@
{
struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
unsigned long val = drvdata->sync_freq;
+
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
}
@@ -1352,6 +1515,60 @@
static DEVICE_ATTR(timestamp_event, S_IRUGO | S_IWUSR, etm_show_timestamp_event,
etm_store_timestamp_event);
+static ssize_t etm_show_pcsave(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+
+ val = drvdata->pcsave_enable;
+ return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
+}
+
+static int __etm_store_pcsave(struct etm_drvdata *drvdata, unsigned long val)
+{
+ int ret;
+
+ ret = clk_prepare_enable(drvdata->clk);
+ if (ret)
+ return ret;
+
+ mutex_lock(&drvdata->mutex);
+ if (val) {
+ smp_call_function_single(drvdata->cpu, etm_enable_pcsave,
+ drvdata, 1);
+ drvdata->pcsave_enable = true;
+ } else {
+ smp_call_function_single(drvdata->cpu, etm_disable_pcsave,
+ drvdata, 1);
+ drvdata->pcsave_enable = false;
+ }
+ mutex_unlock(&drvdata->mutex);
+
+ clk_disable_unprepare(drvdata->clk);
+ return 0;
+}
+
+static ssize_t etm_store_pcsave(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t size)
+{
+ struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
+ unsigned long val;
+ int ret;
+
+ if (sscanf(buf, "%lx", &val) != 1)
+ return -EINVAL;
+
+ ret = __etm_store_pcsave(drvdata, val);
+ if (ret)
+ return ret;
+
+ return size;
+}
+static DEVICE_ATTR(pcsave, S_IRUGO | S_IWUSR, etm_show_pcsave,
+ etm_store_pcsave);
+
static struct attribute *etm_attrs[] = {
&dev_attr_nr_addr_cmp.attr,
&dev_attr_nr_cntr.attr,
@@ -1416,16 +1633,32 @@
return true;
}
-static void __devinit etm_init_arch_data(struct etm_drvdata *drvdata)
+static void __devinit etm_prepare_arch(struct etm_drvdata *drvdata)
+{
+ /* Unlock OS lock first to allow memory mapped reads and writes. This
+ * is required for Krait pass1
+ * */
+ etm_os_unlock(NULL);
+ smp_call_function(etm_os_unlock, NULL, 1);
+}
+
+static void __devinit etm_init_arch_data(void *info)
{
uint32_t etmidr;
uint32_t etmccr;
+ struct etm_drvdata *drvdata = info;
- /* Unlock OS lock first to allow memory mapped reads and writes */
- etm_os_unlock(NULL);
- smp_call_function(etm_os_unlock, NULL, 1);
ETM_UNLOCK(drvdata);
- /* Vote for ETM power/clock enable */
+ /*
+ * Vote for ETM power/clock enable. ETMPDCR is only accessible via
+ * memory mapped interface and so use it first to enable power/clock
+ * to allow subsequent cp14 accesses.
+ */
+ etm_set_pwrup(drvdata);
+ /*
+ * Clear power down bit since when this bit is set writes to
+ * certain registers might be ignored.
+ */
etm_clr_pwrdwn(drvdata);
/* Set prog bit. It will be set from reset but this is included to
* ensure it is set
@@ -1443,8 +1676,9 @@
drvdata->nr_ext_out = BMVAL(etmccr, 20, 22);
drvdata->nr_ctxid_cmp = BMVAL(etmccr, 24, 25);
- /* Vote for ETM power/clock disable */
etm_set_pwrdwn(drvdata);
+ /* Vote for ETM power/clock disable */
+ etm_clr_pwrup(drvdata);
ETM_LOCK(drvdata);
}
@@ -1518,12 +1752,6 @@
struct msm_client_dump dump;
struct coresight_desc *desc;
- /* Fail probe for Krait pass3 until supported */
- if (cpu_is_krait_v3()) {
- dev_info(dev, "ETM: failing probe for Krait pass3\n");
- return -EINVAL;
- }
-
if (pdev->dev.of_node) {
pdata = of_get_coresight_platform_data(dev, pdev->dev.of_node);
if (IS_ERR(pdata))
@@ -1569,7 +1797,9 @@
* ETMs copy it over from ETM0.
*/
if (drvdata->cpu == 0) {
- etm_init_arch_data(drvdata);
+ etm_prepare_arch(drvdata);
+ smp_call_function_single(drvdata->cpu, etm_init_arch_data,
+ drvdata, 1);
etm0drvdata = drvdata;
} else {
etm_copy_arch_data(drvdata);
@@ -1615,11 +1845,24 @@
goto err0;
}
+ if (pdev->dev.of_node)
+ drvdata->pcsave_impl = of_property_read_bool(pdev->dev.of_node,
+ "qcom,pc-save");
+ if (drvdata->pcsave_impl) {
+ ret = device_create_file(&drvdata->csdev->dev,
+ &dev_attr_pcsave);
+ if (ret)
+ dev_err(dev, "ETM pcsave dev node creation failed\n");
+ }
+
dev_info(dev, "ETM initialized\n");
if (boot_enable)
coresight_enable(drvdata->csdev);
+ if (drvdata->pcsave_impl && boot_pcsave_enable)
+ __etm_store_pcsave(drvdata, true);
+
return 0;
err1:
clk_disable_unprepare(drvdata->clk);
@@ -1633,6 +1876,7 @@
{
struct etm_drvdata *drvdata = platform_get_drvdata(pdev);
+ device_remove_file(&drvdata->csdev->dev, &dev_attr_pcsave);
coresight_unregister(drvdata->csdev);
wake_lock_destroy(&drvdata->wake_lock);
mutex_destroy(&drvdata->mutex);
diff --git a/drivers/coresight/coresight-priv.h b/drivers/coresight/coresight-priv.h
index 2b00242..0cf2b3d 100644
--- a/drivers/coresight/coresight-priv.h
+++ b/drivers/coresight/coresight-priv.h
@@ -39,9 +39,13 @@
#ifdef CONFIG_MSM_QDSS
extern void msm_qdss_csr_enable_bam_to_usb(void);
extern void msm_qdss_csr_disable_bam_to_usb(void);
+extern unsigned int etm_readl_cp14(uint32_t off);
+extern void etm_writel_cp14(uint32_t val, uint32_t off);
#else
static inline void msm_qdss_csr_enable_bam_to_usb(void) {}
static inline void msm_qdss_csr_disable_bam_to_usb(void) {}
+static inline unsigned int etm_readl_cp14(uint32_t off) { return 0; }
+static inline void etm_writel_cp14(uint32_t val, uint32_t off) {}
#endif
#endif
diff --git a/drivers/coresight/coresight-stm.c b/drivers/coresight/coresight-stm.c
index 70b2c43..f6a948b 100644
--- a/drivers/coresight/coresight-stm.c
+++ b/drivers/coresight/coresight-stm.c
@@ -724,6 +724,13 @@
dev_info(drvdata->dev, "STM initialized\n");
+ /*
+ * Enable and disable STM to undo the temporary default STM enable
+ * done by RPM.
+ */
+ coresight_enable(drvdata->csdev);
+ coresight_disable(drvdata->csdev);
+
if (boot_enable)
coresight_enable(drvdata->csdev);
diff --git a/drivers/coresight/coresight-tmc.c b/drivers/coresight/coresight-tmc.c
index 0be5882..13f69cd 100644
--- a/drivers/coresight/coresight-tmc.c
+++ b/drivers/coresight/coresight-tmc.c
@@ -1060,6 +1060,7 @@
goto err0;
}
memset(drvdata->vaddr, 0, drvdata->size);
+ drvdata->buf = drvdata->vaddr;
drvdata->out_mode = TMC_ETR_OUT_MODE_MEM;
ret = tmc_etr_bam_init(pdev, drvdata);
diff --git a/drivers/coresight/coresight.c b/drivers/coresight/coresight.c
index cccb5a7..3974f2e 100644
--- a/drivers/coresight/coresight.c
+++ b/drivers/coresight/coresight.c
@@ -377,8 +377,10 @@
list_for_each_entry(cd, &coresight_devs, dev_link) {
if (cd->id == curr_sink) {
- if (cd->enable && cd->ops->sink_ops->abort)
+ if (cd->enable && cd->ops->sink_ops->abort) {
cd->ops->sink_ops->abort(cd);
+ cd->enable = false;
+ }
}
}
out:
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 03fdc5a..c799c1f 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -556,7 +556,6 @@
PMICs through RPC.
config GPIO_QPNP_PIN
- depends on ARCH_MSM8974
depends on SPMI
depends on OF_SPMI
depends on MSM_QPNP_INT
diff --git a/drivers/gpio/gpio-msm-common.c b/drivers/gpio/gpio-msm-common.c
index 46f6460..800c376 100644
--- a/drivers/gpio/gpio-msm-common.c
+++ b/drivers/gpio/gpio-msm-common.c
@@ -300,9 +300,11 @@
spin_lock_irqsave(&tlmm_lock, irq_flags);
__set_bit(gpio, msm_gpio.enabled_irqs);
- __msm_gpio_set_intr_status(gpio);
- __msm_gpio_set_intr_cfg_enable(gpio, 1);
- mb();
+ if (!__msm_gpio_get_intr_cfg_enable(gpio)) {
+ __msm_gpio_set_intr_status(gpio);
+ __msm_gpio_set_intr_cfg_enable(gpio, 1);
+ mb();
+ }
spin_unlock_irqrestore(&tlmm_lock, irq_flags);
if (msm_gpio_irq_extn.irq_mask)
diff --git a/drivers/gpio/gpio-msm-common.h b/drivers/gpio/gpio-msm-common.h
index c9ea3da..b1590ef 100644
--- a/drivers/gpio/gpio-msm-common.h
+++ b/drivers/gpio/gpio-msm-common.h
@@ -21,6 +21,7 @@
unsigned __msm_gpio_get_intr_status(unsigned gpio);
void __msm_gpio_set_intr_status(unsigned gpio);
unsigned __msm_gpio_get_intr_config(unsigned gpio);
+unsigned __msm_gpio_get_intr_cfg_enable(unsigned gpio);
void __msm_gpio_set_intr_cfg_enable(unsigned gpio, unsigned val);
void __msm_gpio_set_intr_cfg_type(unsigned gpio, unsigned type);
void __gpio_tlmm_config(unsigned config);
diff --git a/drivers/gpio/gpio-msm-v2.c b/drivers/gpio/gpio-msm-v2.c
index 943a4a2..592391e 100644
--- a/drivers/gpio/gpio-msm-v2.c
+++ b/drivers/gpio/gpio-msm-v2.c
@@ -155,6 +155,11 @@
}
}
+unsigned __msm_gpio_get_intr_cfg_enable(unsigned gpio)
+{
+ return __msm_gpio_get_intr_config(gpio) & INTR_ENABLE;
+}
+
void __msm_gpio_set_intr_cfg_type(unsigned gpio, unsigned type)
{
unsigned cfg;
diff --git a/drivers/gpio/gpio-msm-v3.c b/drivers/gpio/gpio-msm-v3.c
index 26716a0..1da276f 100644
--- a/drivers/gpio/gpio-msm-v3.c
+++ b/drivers/gpio/gpio-msm-v3.c
@@ -163,6 +163,11 @@
__raw_writel(cfg, GPIO_INTR_CFG(gpio));
}
+unsigned __msm_gpio_get_intr_cfg_enable(unsigned gpio)
+{
+ return __msm_gpio_get_intr_config(gpio) & INTR_ENABLE;
+}
+
void __msm_gpio_set_intr_cfg_type(unsigned gpio, unsigned type)
{
unsigned cfg;
diff --git a/drivers/gpu/ion/ion.c b/drivers/gpu/ion/ion.c
index 98254b5..a48e6b2 100644
--- a/drivers/gpu/ion/ion.c
+++ b/drivers/gpu/ion/ion.c
@@ -107,24 +107,6 @@
static void ion_iommu_release(struct kref *kref);
-static int ion_validate_buffer_flags(struct ion_buffer *buffer,
- unsigned long flags)
-{
- if (buffer->kmap_cnt || buffer->dmap_cnt || buffer->umap_cnt ||
- buffer->iommu_map_cnt) {
- if (buffer->flags != flags) {
- pr_err("%s: buffer was already mapped with flags %lx,"
- " cannot map with flags %lx\n", __func__,
- buffer->flags, flags);
- return 1;
- }
-
- } else {
- buffer->flags = flags;
- }
- return 0;
-}
-
/* this function should only be called while dev->lock is held */
static void ion_buffer_add(struct ion_device *dev,
struct ion_buffer *buffer)
@@ -232,6 +214,7 @@
buffer->dev = dev;
buffer->size = len;
+ buffer->flags = flags;
table = buffer->heap->ops->map_dma(buffer->heap, buffer);
if (IS_ERR_OR_NULL(table)) {
@@ -412,7 +395,8 @@
}
struct ion_handle *ion_alloc(struct ion_client *client, size_t len,
- size_t align, unsigned int flags)
+ size_t align, unsigned int heap_mask,
+ unsigned int flags)
{
struct rb_node *n;
struct ion_handle *handle;
@@ -443,10 +427,11 @@
if (!((1 << heap->type) & client->heap_mask))
continue;
/* if the caller didn't specify this heap type */
- if (!((1 << heap->id) & flags))
+ if (!((1 << heap->id) & heap_mask))
continue;
/* Do not allow un-secure heap if secure is specified */
- if (secure_allocation && (heap->type != ION_HEAP_TYPE_CP))
+ if (secure_allocation &&
+ (heap->type != (enum ion_heap_type) ION_HEAP_TYPE_CP))
continue;
buffer = ion_buffer_create(heap, dev, len, align, flags);
if (!IS_ERR_OR_NULL(buffer))
@@ -773,8 +758,7 @@
}
EXPORT_SYMBOL(ion_unmap_iommu);
-void *ion_map_kernel(struct ion_client *client, struct ion_handle *handle,
- unsigned long flags)
+void *ion_map_kernel(struct ion_client *client, struct ion_handle *handle)
{
struct ion_buffer *buffer;
void *vaddr;
@@ -796,11 +780,6 @@
return ERR_PTR(-ENODEV);
}
- if (ion_validate_buffer_flags(buffer, flags)) {
- mutex_unlock(&client->lock);
- return ERR_PTR(-EEXIST);
- }
-
mutex_lock(&buffer->lock);
vaddr = ion_handle_kmap_get(handle);
mutex_unlock(&buffer->lock);
@@ -887,7 +866,7 @@
if (type == ION_HEAP_TYPE_SYSTEM_CONTIG ||
type == ION_HEAP_TYPE_CARVEOUT ||
- type == ION_HEAP_TYPE_CP)
+ type == (enum ion_heap_type) ION_HEAP_TYPE_CP)
seq_printf(s, " : %12lx", handle->buffer->priv_phys);
else
seq_printf(s, " : %12s", "N/A");
@@ -1228,36 +1207,6 @@
.kunmap = ion_dma_buf_kunmap,
};
-static int ion_share_set_flags(struct ion_client *client,
- struct ion_handle *handle,
- unsigned long flags)
-{
- struct ion_buffer *buffer;
- bool valid_handle;
- unsigned long ion_flags = ION_SET_CACHE(CACHED);
- if (flags & O_DSYNC)
- ion_flags = ION_SET_CACHE(UNCACHED);
-
- mutex_lock(&client->lock);
- valid_handle = ion_handle_validate(client, handle);
- mutex_unlock(&client->lock);
- if (!valid_handle) {
- WARN(1, "%s: invalid handle passed to set_flags.\n", __func__);
- return -EINVAL;
- }
-
- buffer = handle->buffer;
-
- mutex_lock(&buffer->lock);
- if (ion_validate_buffer_flags(buffer, ion_flags)) {
- mutex_unlock(&buffer->lock);
- return -EEXIST;
- }
- mutex_unlock(&buffer->lock);
- return 0;
-}
-
-
int ion_share_dma_buf(struct ion_client *client, struct ion_handle *handle)
{
struct ion_buffer *buffer;
@@ -1337,7 +1286,7 @@
if (copy_from_user(&data, (void __user *)arg, sizeof(data)))
return -EFAULT;
data.handle = ion_alloc(client, data.len, data.align,
- data.flags);
+ data.heap_mask, data.flags);
if (IS_ERR(data.handle))
return PTR_ERR(data.handle);
@@ -1368,14 +1317,9 @@
case ION_IOC_SHARE:
{
struct ion_fd_data data;
- int ret;
if (copy_from_user(&data, (void __user *)arg, sizeof(data)))
return -EFAULT;
- ret = ion_share_set_flags(client, data.handle, filp->f_flags);
- if (ret)
- return ret;
-
data.fd = ion_share_dma_buf(client, data.handle);
if (copy_to_user((void __user *)arg, &data, sizeof(data)))
return -EFAULT;
@@ -1391,8 +1335,10 @@
sizeof(struct ion_fd_data)))
return -EFAULT;
data.handle = ion_import_dma_buf(client, data.fd);
- if (IS_ERR(data.handle))
+ if (IS_ERR(data.handle)) {
+ ret = PTR_ERR(data.handle);
data.handle = NULL;
+ }
if (copy_to_user((void __user *)arg, &data,
sizeof(struct ion_fd_data)))
return -EFAULT;
@@ -1711,7 +1657,7 @@
mutex_lock(&dev->lock);
for (n = rb_first(&dev->heaps); n != NULL; n = rb_next(n)) {
struct ion_heap *heap = rb_entry(n, struct ion_heap, node);
- if (heap->type != ION_HEAP_TYPE_CP)
+ if (heap->type != (enum ion_heap_type) ION_HEAP_TYPE_CP)
continue;
if (ION_HEAP(heap->id) != heap_id)
continue;
@@ -1739,7 +1685,7 @@
mutex_lock(&dev->lock);
for (n = rb_first(&dev->heaps); n != NULL; n = rb_next(n)) {
struct ion_heap *heap = rb_entry(n, struct ion_heap, node);
- if (heap->type != ION_HEAP_TYPE_CP)
+ if (heap->type != (enum ion_heap_type) ION_HEAP_TYPE_CP)
continue;
if (ION_HEAP(heap->id) != heap_id)
continue;
diff --git a/drivers/gpu/ion/ion_cp_heap.c b/drivers/gpu/ion/ion_cp_heap.c
index 9f33859..2070abf 100644
--- a/drivers/gpu/ion/ion_cp_heap.c
+++ b/drivers/gpu/ion/ion_cp_heap.c
@@ -930,7 +930,7 @@
cp_heap->kmap_uncached_count = 0;
cp_heap->total_size = heap_data->size;
cp_heap->heap.ops = &cp_heap_ops;
- cp_heap->heap.type = ION_HEAP_TYPE_CP;
+ cp_heap->heap.type = (enum ion_heap_type) ION_HEAP_TYPE_CP;
cp_heap->heap_protected = HEAP_NOT_PROTECTED;
cp_heap->secure_base = cp_heap->base;
cp_heap->secure_size = heap_data->size;
diff --git a/drivers/gpu/ion/ion_heap.c b/drivers/gpu/ion/ion_heap.c
index 165a7bf..4c83d75 100644
--- a/drivers/gpu/ion/ion_heap.c
+++ b/drivers/gpu/ion/ion_heap.c
@@ -24,7 +24,7 @@
{
struct ion_heap *heap = NULL;
- switch (heap_data->type) {
+ switch ((int) heap_data->type) {
case ION_HEAP_TYPE_SYSTEM_CONTIG:
heap = ion_system_contig_heap_create(heap_data);
break;
@@ -63,7 +63,7 @@
if (!heap)
return;
- switch (heap->type) {
+ switch ((int) heap->type) {
case ION_HEAP_TYPE_SYSTEM_CONTIG:
ion_system_contig_heap_destroy(heap);
break;
diff --git a/drivers/gpu/ion/msm/msm_ion.c b/drivers/gpu/ion/msm/msm_ion.c
index 4c9be1d..deff514 100644
--- a/drivers/gpu/ion/msm/msm_ion.c
+++ b/drivers/gpu/ion/msm/msm_ion.c
@@ -264,7 +264,7 @@
if (!heap->base && heap->extra_data) {
unsigned int align = 0;
- switch (heap->type) {
+ switch ((int) heap->type) {
case ION_HEAP_TYPE_CARVEOUT:
align =
((struct ion_co_heap_pdata *) heap->extra_data)->align;
@@ -346,7 +346,7 @@
{
int ret = 0;
- switch (heap->type) {
+ switch ((int) heap->type) {
case ION_HEAP_TYPE_CP:
{
heap->extra_data = kzalloc(sizeof(struct ion_cp_heap_pdata),
@@ -414,7 +414,7 @@
int ret = of_property_read_u32(node, "qcom,heap-align", &val);
if (!ret) {
- switch (heap->type) {
+ switch ((int) heap->type) {
case ION_HEAP_TYPE_CP:
{
struct ion_cp_heap_pdata *extra =
diff --git a/drivers/gpu/msm/Makefile b/drivers/gpu/msm/Makefile
index c7ed329..aacd355 100644
--- a/drivers/gpu/msm/Makefile
+++ b/drivers/gpu/msm/Makefile
@@ -17,6 +17,7 @@
msm_kgsl_core-$(CONFIG_MSM_SCM) += kgsl_pwrscale_trustzone.o
msm_kgsl_core-$(CONFIG_MSM_SLEEP_STATS_DEVICE) += kgsl_pwrscale_idlestats.o
msm_kgsl_core-$(CONFIG_MSM_DCVS) += kgsl_pwrscale_msm.o
+msm_kgsl_core-$(CONFIG_SYNC) += kgsl_sync.o
msm_adreno-y += \
adreno_ringbuffer.o \
diff --git a/drivers/gpu/msm/a3xx_reg.h b/drivers/gpu/msm/a3xx_reg.h
index 05c7967..6a010a9 100644
--- a/drivers/gpu/msm/a3xx_reg.h
+++ b/drivers/gpu/msm/a3xx_reg.h
@@ -65,13 +65,17 @@
#define A3XX_RBBM_INT_CLEAR_CMD 0x061
#define A3XX_RBBM_INT_0_MASK 0x063
#define A3XX_RBBM_INT_0_STATUS 0x064
+#define A3XX_RBBM_PERFCTR_CTL 0x80
#define A3XX_RBBM_GPU_BUSY_MASKED 0x88
+#define A3XX_RBBM_PERFCTR_SP_7_LO 0xE0
+#define A3XX_RBBM_PERFCTR_SP_7_HI 0xE1
#define A3XX_RBBM_RBBM_CTL 0x100
#define A3XX_RBBM_RBBM_CTL 0x100
#define A3XX_RBBM_PERFCTR_PWR_1_LO 0x0EC
#define A3XX_RBBM_PERFCTR_PWR_1_HI 0x0ED
#define A3XX_RBBM_DEBUG_BUS_CTL 0x111
#define A3XX_RBBM_DEBUG_BUS_DATA_STATUS 0x112
+
/* Following two are same as on A2XX, just in a different place */
#define A3XX_CP_PFP_UCODE_ADDR 0x1C9
#define A3XX_CP_PFP_UCODE_DATA 0x1CA
@@ -160,6 +164,7 @@
#define A3XX_VPC_VPC_DEBUG_RAM_READ 0xE62
#define A3XX_UCHE_CACHE_MODE_CONTROL_REG 0xE82
#define A3XX_UCHE_CACHE_INVALIDATE0_REG 0xEA0
+#define A3XX_SP_PERFCOUNTER7_SELECT 0xECB
#define A3XX_GRAS_CL_CLIP_CNTL 0x2040
#define A3XX_GRAS_CL_GB_CLIP_ADJ 0x2044
#define A3XX_GRAS_CL_VPORT_XOFFSET 0x2048
@@ -528,4 +533,7 @@
/* RBBM_CLOCK_CTL default value */
#define A3XX_RBBM_CLOCK_CTL_DEFAULT 0xBFFFFFFF
+/* COUNTABLE FOR SP PERFCOUNTER */
+#define SP_FS_FULL_ALU_INSTRUCTIONS 0x0E
+
#endif
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 0145023..573e0a6 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -127,6 +127,8 @@
REG_CP_IB1_BUFSZ,
REG_CP_IB2_BASE,
REG_CP_IB2_BUFSZ,
+ 0,
+ 0
};
const unsigned int hang_detect_regs_count = ARRAY_SIZE(hang_detect_regs);
@@ -1286,6 +1288,12 @@
*/
hang_detect_regs[0] = adreno_dev->gpudev->reg_rbbm_status;
+ /* Add A3XX specific registers for hang detection */
+ if (adreno_is_a3xx(adreno_dev)) {
+ hang_detect_regs[6] = A3XX_RBBM_PERFCTR_SP_7_LO;
+ hang_detect_regs[7] = A3XX_RBBM_PERFCTR_SP_7_HI;
+ }
+
status = kgsl_mmu_start(device);
if (status)
goto error_clk_off;
@@ -2208,7 +2216,14 @@
if (!adreno_dev->fast_hang_detect)
return 0;
+ if (device->ftbl->isidle(device))
+ return 0;
+
for (i = 0; i < hang_detect_regs_count; i++) {
+
+ if (hang_detect_regs[i] == 0)
+ continue;
+
adreno_regread(device, hang_detect_regs[i],
&curr_reg_val[i]);
if (curr_reg_val[i] != prev_reg_val[i]) {
diff --git a/drivers/gpu/msm/adreno_a2xx.c b/drivers/gpu/msm/adreno_a2xx.c
index 1f32e54..8de2c70 100644
--- a/drivers/gpu/msm/adreno_a2xx.c
+++ b/drivers/gpu/msm/adreno_a2xx.c
@@ -1574,8 +1574,6 @@
return;
}
- KGSL_CTXT_INFO(device, "context flags %08x\n", context->flags);
-
cmds[0] = cp_nop_packet(1);
cmds[1] = KGSL_CONTEXT_TO_MEM_IDENTIFIER;
cmds[2] = cp_type3_packet(CP_MEM_WRITE, 2);
@@ -1710,18 +1708,24 @@
if (status & CP_INT_CNTL__RB_INT_MASK) {
/* signal intr completion event */
- unsigned int context_id;
- kgsl_sharedmem_readl(&device->memstore,
- &context_id,
+ unsigned int context_id, timestamp;
+ kgsl_sharedmem_readl(&device->memstore, &context_id,
KGSL_MEMSTORE_OFFSET(KGSL_MEMSTORE_GLOBAL,
current_context));
+
+ kgsl_sharedmem_readl(&device->memstore, ×tamp,
+ KGSL_MEMSTORE_OFFSET(context_id,
+ eoptimestamp));
+
if (context_id < KGSL_MEMSTORE_MAX) {
kgsl_sharedmem_writel(&rb->device->memstore,
KGSL_MEMSTORE_OFFSET(context_id,
ts_cmp_enable), 0);
wmb();
}
- KGSL_CMD_WARN(rb->device, "ringbuffer rb interrupt\n");
+
+ KGSL_CMD_WARN(device, "<%d:0x%x> ringbuffer interrupt\n",
+ context_id, timestamp);
}
for (i = 0; i < ARRAY_SIZE(kgsl_cp_error_irqs); i++) {
@@ -1743,12 +1747,8 @@
adreno_regwrite(device, REG_CP_INT_ACK, status);
if (status & (CP_INT_CNTL__IB1_INT_MASK | CP_INT_CNTL__RB_INT_MASK)) {
- KGSL_CMD_WARN(rb->device, "ringbuffer ib1/rb interrupt\n");
queue_work(device->work_queue, &device->ts_expired_ws);
wake_up_interruptible_all(&device->wait_queue);
- atomic_notifier_call_chain(&(device->ts_notifier_list),
- device->id,
- NULL);
}
}
diff --git a/drivers/gpu/msm/adreno_a3xx.c b/drivers/gpu/msm/adreno_a3xx.c
index d89e882..104baf8 100644
--- a/drivers/gpu/msm/adreno_a3xx.c
+++ b/drivers/gpu/msm/adreno_a3xx.c
@@ -2409,8 +2409,6 @@
return;
}
- KGSL_CTXT_INFO(device, "context flags %08x\n", context->flags);
-
cmds[0] = cp_nop_packet(1);
cmds[1] = KGSL_CONTEXT_TO_MEM_IDENTIFIER;
cmds[2] = cp_type3_packet(CP_MEM_WRITE, 2);
@@ -2565,26 +2563,30 @@
struct kgsl_device *device = &adreno_dev->dev;
if (irq == A3XX_INT_CP_RB_INT) {
- unsigned int context_id;
+ unsigned int context_id, timestamp;
kgsl_sharedmem_readl(&device->memstore, &context_id,
KGSL_MEMSTORE_OFFSET(KGSL_MEMSTORE_GLOBAL,
current_context));
+
+ kgsl_sharedmem_readl(&device->memstore, ×tamp,
+ KGSL_MEMSTORE_OFFSET(context_id,
+ eoptimestamp));
+
if (context_id < KGSL_MEMSTORE_MAX) {
kgsl_sharedmem_writel(&device->memstore,
KGSL_MEMSTORE_OFFSET(context_id,
ts_cmp_enable), 0);
wmb();
}
- KGSL_CMD_WARN(device, "ringbuffer rb interrupt\n");
+
+ KGSL_CMD_WARN(device, "<%d:0x%x> ringbuffer interrupt\n",
+ context_id, timestamp);
}
wake_up_interruptible_all(&device->wait_queue);
/* Schedule work to free mem and issue ibs */
queue_work(device->work_queue, &device->ts_expired_ws);
-
- atomic_notifier_call_chain(&device->ts_notifier_list,
- device->id, NULL);
}
#define A3XX_IRQ_CALLBACK(_c) { .func = _c }
@@ -2701,62 +2703,100 @@
return val;
}
+struct a3xx_vbif_data {
+ unsigned int reg;
+ unsigned int val;
+};
+
+/* VBIF registers start after 0x3000 so use 0x0 as end of list marker */
+static struct a3xx_vbif_data a305_vbif[] = {
+ /* Set up 16 deep read/write request queues */
+ { A3XX_VBIF_IN_RD_LIM_CONF0, 0x10101010 },
+ { A3XX_VBIF_IN_RD_LIM_CONF1, 0x10101010 },
+ { A3XX_VBIF_OUT_RD_LIM_CONF0, 0x10101010 },
+ { A3XX_VBIF_OUT_WR_LIM_CONF0, 0x10101010 },
+ { A3XX_VBIF_DDR_OUT_MAX_BURST, 0x0000303 },
+ { A3XX_VBIF_IN_WR_LIM_CONF0, 0x10101010 },
+ { A3XX_VBIF_IN_WR_LIM_CONF1, 0x10101010 },
+ /* Enable WR-REQ */
+ { A3XX_VBIF_GATE_OFF_WRREQ_EN, 0x0000FF },
+ /* Set up round robin arbitration between both AXI ports */
+ { A3XX_VBIF_ARB_CTL, 0x00000030 },
+ /* Set up AOOO */
+ { A3XX_VBIF_OUT_AXI_AOOO_EN, 0x0000003C },
+ { A3XX_VBIF_OUT_AXI_AOOO, 0x003C003C },
+ {0, 0},
+};
+
+static struct a3xx_vbif_data a320_vbif[] = {
+ /* Set up 16 deep read/write request queues */
+ { A3XX_VBIF_IN_RD_LIM_CONF0, 0x10101010 },
+ { A3XX_VBIF_IN_RD_LIM_CONF1, 0x10101010 },
+ { A3XX_VBIF_OUT_RD_LIM_CONF0, 0x10101010 },
+ { A3XX_VBIF_OUT_WR_LIM_CONF0, 0x10101010 },
+ { A3XX_VBIF_DDR_OUT_MAX_BURST, 0x0000303 },
+ { A3XX_VBIF_IN_WR_LIM_CONF0, 0x10101010 },
+ { A3XX_VBIF_IN_WR_LIM_CONF1, 0x10101010 },
+ /* Enable WR-REQ */
+ { A3XX_VBIF_GATE_OFF_WRREQ_EN, 0x0000FF },
+ /* Set up round robin arbitration between both AXI ports */
+ { A3XX_VBIF_ARB_CTL, 0x00000030 },
+ /* Set up AOOO */
+ { A3XX_VBIF_OUT_AXI_AOOO_EN, 0x0000003C },
+ { A3XX_VBIF_OUT_AXI_AOOO, 0x003C003C },
+ /* Enable 1K sort */
+ { A3XX_VBIF_ABIT_SORT, 0x000000FF },
+ { A3XX_VBIF_ABIT_SORT_CONF, 0x000000A4 },
+ {0, 0},
+};
+
+static struct a3xx_vbif_data a330_vbif[] = {
+ /* Set up 16 deep read/write request queues */
+ { A3XX_VBIF_IN_RD_LIM_CONF0, 0x18181818 },
+ { A3XX_VBIF_IN_RD_LIM_CONF1, 0x18181818 },
+ { A3XX_VBIF_OUT_RD_LIM_CONF0, 0x18181818 },
+ { A3XX_VBIF_OUT_WR_LIM_CONF0, 0x18181818 },
+ { A3XX_VBIF_DDR_OUT_MAX_BURST, 0x0000303 },
+ { A3XX_VBIF_IN_WR_LIM_CONF0, 0x18181818 },
+ { A3XX_VBIF_IN_WR_LIM_CONF1, 0x18181818 },
+ /* Enable WR-REQ */
+ { A3XX_VBIF_GATE_OFF_WRREQ_EN, 0x00003F },
+ /* Set up round robin arbitration between both AXI ports */
+ { A3XX_VBIF_ARB_CTL, 0x00000030 },
+ /* Set up VBIF_ROUND_ROBIN_QOS_ARB */
+ { A3XX_VBIF_ROUND_ROBIN_QOS_ARB, 0x0001 },
+ /* Set up AOOO */
+ { A3XX_VBIF_OUT_AXI_AOOO_EN, 0x0000FFFF },
+ { A3XX_VBIF_OUT_AXI_AOOO, 0xFFFFFFFF },
+ /* Enable 1K sort */
+ { A3XX_VBIF_ABIT_SORT, 0x1FFFF },
+ { A3XX_VBIF_ABIT_SORT_CONF, 0x000000A4 },
+ /* Disable VBIF clock gating. This is to enable AXI running
+ * higher frequency than GPU.
+ */
+ { A3XX_VBIF_CLKON, 1 },
+ {0, 0},
+};
+
static void a3xx_start(struct adreno_device *adreno_dev)
{
struct kgsl_device *device = &adreno_dev->dev;
+ struct a3xx_vbif_data *vbif = NULL;
- /* Set up 16 deep read/write request queues */
- if (adreno_is_a330(adreno_dev)) {
- adreno_regwrite(device, A3XX_VBIF_IN_RD_LIM_CONF0, 0x18181818);
- adreno_regwrite(device, A3XX_VBIF_IN_RD_LIM_CONF1, 0x18181818);
- adreno_regwrite(device, A3XX_VBIF_OUT_RD_LIM_CONF0, 0x18181818);
- adreno_regwrite(device, A3XX_VBIF_OUT_WR_LIM_CONF0, 0x18181818);
- adreno_regwrite(device, A3XX_VBIF_DDR_OUT_MAX_BURST, 0x0000303);
- adreno_regwrite(device, A3XX_VBIF_IN_WR_LIM_CONF0, 0x18181818);
- adreno_regwrite(device, A3XX_VBIF_IN_WR_LIM_CONF1, 0x18181818);
- /* Enable WR-REQ */
- adreno_regwrite(device, A3XX_VBIF_GATE_OFF_WRREQ_EN, 0x00003F);
+ if (adreno_is_a305(adreno_dev))
+ vbif = a305_vbif;
+ else if (adreno_is_a320(adreno_dev))
+ vbif = a320_vbif;
+ else if (adreno_is_a330(adreno_dev))
+ vbif = a330_vbif;
- /* Set up round robin arbitration between both AXI ports */
- adreno_regwrite(device, A3XX_VBIF_ARB_CTL, 0x00000030);
- /* Set up VBIF_ROUND_ROBIN_QOS_ARB */
- adreno_regwrite(device, A3XX_VBIF_ROUND_ROBIN_QOS_ARB, 0x0001);
+ BUG_ON(vbif == NULL);
- /* Set up AOOO */
- adreno_regwrite(device, A3XX_VBIF_OUT_AXI_AOOO_EN, 0x0000FFFF);
- adreno_regwrite(device, A3XX_VBIF_OUT_AXI_AOOO, 0xFFFFFFFF);
-
- /* Enable 1K sort */
- adreno_regwrite(device, A3XX_VBIF_ABIT_SORT, 0x1FFFF);
- adreno_regwrite(device, A3XX_VBIF_ABIT_SORT_CONF, 0x000000A4);
-
- /* Diable VBIF clock gating. This is to enable AXI running
- * higher frequency than GPU.
- */
- adreno_regwrite(device, A3XX_VBIF_CLKON, 1);
- } else {
- adreno_regwrite(device, A3XX_VBIF_IN_RD_LIM_CONF0, 0x10101010);
- adreno_regwrite(device, A3XX_VBIF_IN_RD_LIM_CONF1, 0x10101010);
- adreno_regwrite(device, A3XX_VBIF_OUT_RD_LIM_CONF0, 0x10101010);
- adreno_regwrite(device, A3XX_VBIF_OUT_WR_LIM_CONF0, 0x10101010);
- adreno_regwrite(device, A3XX_VBIF_DDR_OUT_MAX_BURST, 0x0000303);
- adreno_regwrite(device, A3XX_VBIF_IN_WR_LIM_CONF0, 0x10101010);
- adreno_regwrite(device, A3XX_VBIF_IN_WR_LIM_CONF1, 0x10101010);
- /* Enable WR-REQ */
- adreno_regwrite(device, A3XX_VBIF_GATE_OFF_WRREQ_EN, 0x0000FF);
-
- /* Set up round robin arbitration between both AXI ports */
- adreno_regwrite(device, A3XX_VBIF_ARB_CTL, 0x00000030);
- /* Set up AOOO */
- adreno_regwrite(device, A3XX_VBIF_OUT_AXI_AOOO_EN, 0x0000003C);
- adreno_regwrite(device, A3XX_VBIF_OUT_AXI_AOOO, 0x003C003C);
+ while (vbif->reg != 0) {
+ adreno_regwrite(device, vbif->reg, vbif->val);
+ vbif++;
}
- if (cpu_is_apq8064()) {
- /* Enable 1K sort */
- adreno_regwrite(device, A3XX_VBIF_ABIT_SORT, 0x000000FF);
- adreno_regwrite(device, A3XX_VBIF_ABIT_SORT_CONF, 0x000000A4);
- }
/* Make all blocks contribute to the GPU BUSY perf counter */
adreno_regwrite(device, A3XX_RBBM_GPU_BUSY_MASKED, 0xFFFFFFFF);
@@ -2793,6 +2833,17 @@
adreno_regwrite(device, A3XX_RB_GMEM_BASE_ADDR,
(unsigned int)(adreno_dev->ocmem_base >> 14));
}
+
+ /* Turn on performance counters */
+ adreno_regwrite(device, A3XX_RBBM_PERFCTR_CTL, 0x01);
+
+ /*
+ * Set SP perfcounter 7 to count SP_FS_FULL_ALU_INSTRUCTIONS
+ * we will use this to augment our hang detection
+ */
+
+ adreno_regwrite(device, A3XX_SP_PERFCOUNTER7_SELECT,
+ SP_FS_FULL_ALU_INSTRUCTIONS);
}
/* Defined in adreno_a3xx_snapshot.c */
diff --git a/drivers/gpu/msm/adreno_drawctxt.c b/drivers/gpu/msm/adreno_drawctxt.c
index b51342f..7cbc7a8 100644
--- a/drivers/gpu/msm/adreno_drawctxt.c
+++ b/drivers/gpu/msm/adreno_drawctxt.c
@@ -226,7 +226,8 @@
adreno_drawctxt_switch(adreno_dev, NULL, 0);
}
- adreno_idle(device);
+ if (device->state != KGSL_STATE_HUNG)
+ adreno_idle(device);
kgsl_sharedmem_free(&drawctxt->gpustate);
kgsl_sharedmem_free(&drawctxt->context_gmem_shadow.gmemshadow);
@@ -288,8 +289,10 @@
return;
}
- KGSL_CTXT_INFO(device, "from %p to %p flags %d\n",
- adreno_dev->drawctxt_active, drawctxt, flags);
+ KGSL_CTXT_INFO(device, "from %d to %d flags %d\n",
+ adreno_dev->drawctxt_active ?
+ adreno_dev->drawctxt_active->id : 0,
+ drawctxt ? drawctxt->id : 0, flags);
/* Save the old context */
adreno_dev->gpudev->ctxt_save(adreno_dev, adreno_dev->drawctxt_active);
diff --git a/drivers/gpu/msm/adreno_postmortem.c b/drivers/gpu/msm/adreno_postmortem.c
index 620b82c..daa78ed 100644
--- a/drivers/gpu/msm/adreno_postmortem.c
+++ b/drivers/gpu/msm/adreno_postmortem.c
@@ -50,6 +50,7 @@
{CP_DRAW_INDX, "DRW_NDX_"},
{CP_DRAW_INDX_BIN, "DRW_NDXB"},
{CP_EVENT_WRITE, "EVENT_WT"},
+ {CP_MEM_WRITE, "MEM_WRIT"},
{CP_IM_LOAD, "IN__LOAD"},
{CP_IM_LOAD_IMMEDIATE, "IM_LOADI"},
{CP_IM_STORE, "IM_STORE"},
diff --git a/drivers/gpu/msm/adreno_ringbuffer.c b/drivers/gpu/msm/adreno_ringbuffer.c
index db913a5..0dd140b 100644
--- a/drivers/gpu/msm/adreno_ringbuffer.c
+++ b/drivers/gpu/msm/adreno_ringbuffer.c
@@ -503,7 +503,7 @@
* support, we must use the global timestamp since issueibcmds
* will be returning that one.
*/
- if (context->flags & CTXT_FLAGS_PER_CONTEXT_TS)
+ if (context && context->flags & CTXT_FLAGS_PER_CONTEXT_TS)
context_id = context->id;
/* reserve space to temporarily turn off protected mode
@@ -518,7 +518,7 @@
total_sizedwords += 7;
total_sizedwords += 2; /* scratchpad ts for recovery */
- if (context->flags & CTXT_FLAGS_PER_CONTEXT_TS) {
+ if (context && context->flags & CTXT_FLAGS_PER_CONTEXT_TS) {
total_sizedwords += 3; /* sop timestamp */
total_sizedwords += 4; /* eop timestamp */
total_sizedwords += 3; /* global timestamp without cache
@@ -591,7 +591,7 @@
GSL_RB_WRITE(ringcmds, rcmd_gpu, 0x00);
}
- if (context->flags & CTXT_FLAGS_PER_CONTEXT_TS) {
+ if (context && context->flags & CTXT_FLAGS_PER_CONTEXT_TS) {
/* start-of-pipeline timestamp */
GSL_RB_WRITE(ringcmds, rcmd_gpu,
cp_type3_packet(CP_MEM_WRITE, 2));
@@ -902,6 +902,7 @@
unsigned int i;
struct adreno_context *drawctxt;
unsigned int start_index = 0;
+ int ret;
if (device->state & KGSL_STATE_HUNG)
return -EBUSY;
@@ -948,9 +949,15 @@
if (unlikely(adreno_dev->ib_check_level >= 1 &&
!_parse_ibs(dev_priv, ibdesc[i].gpuaddr,
ibdesc[i].sizedwords))) {
- kfree(link);
- return -EINVAL;
+ ret = -EINVAL;
+ goto done;
}
+
+ if (ibdesc[i].sizedwords == 0) {
+ ret = -EINVAL;
+ goto done;
+ }
+
*cmds++ = CP_HDR_INDIRECT_BUFFER_PFD;
*cmds++ = ibdesc[i].gpuaddr;
*cmds++ = ibdesc[i].sizedwords;
@@ -969,10 +976,9 @@
drawctxt, 0,
&link[0], (cmds - link));
- KGSL_CMD_INFO(device, "ctxt %d g %08x numibs %d ts %d\n",
- context->id, (unsigned int)ibdesc, numibs, *timestamp);
+ KGSL_CMD_INFO(device, "<%d:0x%x> g %08x numibs %d\n",
+ context->id, *timestamp, (unsigned int)ibdesc, numibs);
- kfree(link);
#ifdef CONFIG_MSM_KGSL_CFF_DUMP
/*
@@ -982,13 +988,16 @@
*/
adreno_idle(device);
#endif
+
/* If context hung and recovered then return error so that the
* application may handle it */
- if (drawctxt->flags & CTXT_FLAGS_GPU_HANG_RECOVERED)
- return -EDEADLK;
- else
- return 0;
+ ret = (drawctxt->flags & CTXT_FLAGS_GPU_HANG_RECOVERED) ?
+ -EDEADLK : 0;
+
+done:
+ kfree(link);
+ return ret;
}
static int _find_start_of_cmd_seq(struct adreno_ringbuffer *rb,
diff --git a/drivers/gpu/msm/adreno_snapshot.c b/drivers/gpu/msm/adreno_snapshot.c
index 08a01b0..93be980 100644
--- a/drivers/gpu/msm/adreno_snapshot.c
+++ b/drivers/gpu/msm/adreno_snapshot.c
@@ -328,8 +328,8 @@
ret = kgsl_snapshot_get_object(device, ptbase,
sp_vs_pvt_mem_addr, 8192,
SNAPSHOT_GPU_OBJECT_GENERIC);
-
snapshot_frozen_objsize += ret;
+ sp_vs_pvt_mem_addr = 0;
}
if (sp_fs_pvt_mem_addr) {
@@ -337,6 +337,7 @@
sp_fs_pvt_mem_addr, 8192,
SNAPSHOT_GPU_OBJECT_GENERIC);
snapshot_frozen_objsize += ret;
+ sp_fs_pvt_mem_addr = 0;
}
/* Finally: VBOs */
@@ -359,7 +360,13 @@
0, SNAPSHOT_GPU_OBJECT_GENERIC);
snapshot_frozen_objsize += ret;
}
+
+ vbo[i].base = 0;
+ vbo[i].stride = 0;
}
+
+ vfd_control_0 = 0;
+ vfd_index_max = 0;
}
/*
@@ -473,21 +480,33 @@
unsigned int gpuaddr, unsigned int dwords)
{
int i, ret, rem = dwords;
- unsigned int *src = (unsigned int *) adreno_convertaddr(device, ptbase,
- gpuaddr, dwords << 2);
+ unsigned int *src;
+
+ /*
+ * If the object is already in the list, we don't need to parse it again
+ */
+
+ if (kgsl_snapshot_have_object(device, ptbase, gpuaddr, dwords << 2))
+ return;
+
+ src = (unsigned int *) adreno_convertaddr(device, ptbase, gpuaddr,
+ dwords << 2);
if (src == NULL)
return;
- for (i = 0; rem != 0; rem--, i++) {
+ for (i = 0; rem > 0; rem--, i++) {
int pktsize;
+ /* If the packet isn't a type 1 or a type 3, then don't bother
+ * parsing it - it is likely corrupted */
+
if (!pkt_is_type0(src[i]) && !pkt_is_type3(src[i]))
- continue;
+ break;
pktsize = type3_pkt_size(src[i]);
- if ((pktsize + 1) > rem)
+ if (!pktsize || (pktsize + 1) > rem)
break;
if (pkt_is_type3(src[i])) {
@@ -650,27 +669,11 @@
*data = rbptr[index];
/*
- * Sometimes the rptr is located in the middle of a packet.
- * try to adust for that by modifying the rptr to match a
- * packet boundary. Unfortunately for us, it is hard to tell
- * which dwords are legitimate type0 header and which are just
- * random data so only do the adjustments for type3 packets
- */
-
- if (pkt_is_type3(rbptr[index])) {
- unsigned int pktsize =
- type3_pkt_size(rbptr[index]);
- if (index + pktsize > rptr)
- rptr = (index + pktsize) %
- rb->sizedwords;
- }
-
- /*
* Only parse IBs between the start and the rptr or the next
* context switch, whichever comes first
*/
- if (index == ib_parse_start)
+ if (parse_ibs == 0 && index == ib_parse_start)
parse_ibs = 1;
else if (index == rptr || adreno_rb_ctxtswitch(&rbptr[index]))
parse_ibs = 0;
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index f630f2a..5ba844a 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -36,6 +36,7 @@
#include "kgsl_sharedmem.h"
#include "kgsl_device.h"
#include "kgsl_trace.h"
+#include "kgsl_sync.h"
#undef MODULE_PARAM_PREFIX
#define MODULE_PARAM_PREFIX "kgsl."
@@ -356,7 +357,7 @@
/* MAX - 1, there is one memdesc in memstore for device info */
if (id >= KGSL_MEMSTORE_MAX) {
- KGSL_DRV_ERR(dev_priv->device, "cannot have more than %d "
+ KGSL_DRV_INFO(dev_priv->device, "cannot have more than %d "
"ctxts due to memstore limitation\n",
KGSL_MEMSTORE_MAX);
idr_remove(&dev_priv->device->context_idr, id);
@@ -368,6 +369,12 @@
context->id = id;
context->dev_priv = dev_priv;
+ if (kgsl_sync_timeline_create(context)) {
+ idr_remove(&dev_priv->device->context_idr, id);
+ kfree(context);
+ return NULL;
+ }
+
return context;
}
@@ -412,6 +419,7 @@
{
struct kgsl_context *context = container_of(kref, struct kgsl_context,
refcount);
+ kgsl_sync_timeline_destroy(context);
kfree(context);
}
@@ -499,24 +507,6 @@
return ret;
}
-int kgsl_register_ts_notifier(struct kgsl_device *device,
- struct notifier_block *nb)
-{
- BUG_ON(device == NULL);
- return atomic_notifier_chain_register(&device->ts_notifier_list,
- nb);
-}
-EXPORT_SYMBOL(kgsl_register_ts_notifier);
-
-int kgsl_unregister_ts_notifier(struct kgsl_device *device,
- struct notifier_block *nb)
-{
- BUG_ON(device == NULL);
- return atomic_notifier_chain_unregister(&device->ts_notifier_list,
- nb);
-}
-EXPORT_SYMBOL(kgsl_unregister_ts_notifier);
-
int kgsl_check_timestamp(struct kgsl_device *device,
struct kgsl_context *context, unsigned int timestamp)
{
@@ -1072,11 +1062,8 @@
int result;
context = kgsl_find_context(dev_priv, param->context_id);
- if (context == NULL) {
- KGSL_DRV_ERR(dev_priv->device, "invalid context_id %d\n",
- param->context_id);
+ if (context == NULL)
return -EINVAL;
- }
/*
* A reference count is needed here, because waittimestamp may
* block with the device mutex unlocked and userspace could
@@ -1100,20 +1087,11 @@
context = kgsl_find_context(dev_priv, param->drawctxt_id);
if (context == NULL) {
result = -EINVAL;
- KGSL_DRV_ERR(dev_priv->device,
- "invalid context_id %d\n",
- param->drawctxt_id);
goto done;
}
if (param->flags & KGSL_CONTEXT_SUBMIT_IB_LIST) {
- KGSL_DRV_INFO(dev_priv->device,
- "Using IB list mode for ib submission, numibs: %d\n",
- param->numibs);
if (!param->numibs) {
- KGSL_DRV_ERR(dev_priv->device,
- "Invalid numibs as parameter: %d\n",
- param->numibs);
result = -EINVAL;
goto done;
}
@@ -1124,9 +1102,6 @@
*/
if (param->numibs > 10000) {
- KGSL_DRV_ERR(dev_priv->device,
- "Too many IBs submitted. count: %d max 10000\n",
- param->numibs);
result = -EINVAL;
goto done;
}
@@ -1213,11 +1188,8 @@
struct kgsl_context *context;
context = kgsl_find_context(dev_priv, param->context_id);
- if (context == NULL) {
- KGSL_DRV_ERR(dev_priv->device, "invalid context_id %d\n",
- param->context_id);
+ if (context == NULL)
return -EINVAL;
- }
return _cmdstream_readtimestamp(dev_priv, context,
param->type, ¶m->timestamp);
@@ -1282,11 +1254,8 @@
struct kgsl_context *context;
context = kgsl_find_context(dev_priv, param->context_id);
- if (context == NULL) {
- KGSL_DRV_ERR(dev_priv->device,
- "invalid drawctxt context_id %d\n", param->context_id);
+ if (context == NULL)
return -EINVAL;
- }
return _cmdstream_freememontimestamp(dev_priv, param->gpuaddr,
context, param->timestamp, param->type);
@@ -1438,42 +1407,43 @@
if (ret)
return ret;
- if (phys == 0) {
- ret = -EINVAL;
+ ret = -ERANGE;
+
+ if (phys == 0)
+ goto err;
+
+ /* Make sure the length of the region, the offset and the desired
+ * size are all page aligned or bail
+ */
+ if ((len & ~PAGE_MASK) ||
+ (offset & ~PAGE_MASK) ||
+ (size & ~PAGE_MASK)) {
+ KGSL_CORE_ERR("length offset or size is not page aligned\n");
goto err;
}
- if (offset >= len) {
- ret = -EINVAL;
+ /* The size or offset can never be greater than the PMEM length */
+ if (offset >= len || size > len)
goto err;
- }
+ /* If size is 0, then adjust it to default to the size of the region
+ * minus the offset. If size isn't zero, then make sure that it will
+ * fit inside of the region.
+ */
if (size == 0)
- size = len;
+ size = len - offset;
- /* Adjust the size of the region to account for the offset */
- size += offset & ~PAGE_MASK;
-
- size = ALIGN(size, PAGE_SIZE);
-
- if (_check_region(offset & PAGE_MASK, size, len)) {
- KGSL_CORE_ERR("Offset (%ld) + size (%d) is larger"
- "than pmem region length %ld\n",
- offset & PAGE_MASK, size, len);
- ret = -EINVAL;
+ else if (_check_region(offset, size, len))
goto err;
- }
-
entry->priv_data = filep;
entry->memdesc.pagetable = pagetable;
entry->memdesc.size = size;
- entry->memdesc.physaddr = phys + (offset & PAGE_MASK);
- entry->memdesc.hostptr = (void *) (virt + (offset & PAGE_MASK));
+ entry->memdesc.physaddr = phys + offset;
+ entry->memdesc.hostptr = (void *) (virt + offset);
- ret = memdesc_sg_phys(&entry->memdesc,
- phys + (offset & PAGE_MASK), size);
+ ret = memdesc_sg_phys(&entry->memdesc, phys + offset, size);
if (ret)
goto err;
@@ -1782,6 +1752,8 @@
if (result)
goto error;
+ entry->memdesc.priv |= param->flags & KGSL_MEMTYPE_MASK;
+
result = kgsl_mmu_map(private->pagetable,
&entry->memdesc,
GSL_PT_PAGE_RV | GSL_PT_PAGE_WV);
@@ -2019,6 +1991,11 @@
param->context_id, param->timestamp, param->priv,
param->len, dev_priv);
break;
+ case KGSL_TIMESTAMP_EVENT_FENCE:
+ ret = kgsl_add_fence_event(dev_priv->device,
+ param->context_id, param->timestamp, param->priv,
+ param->len, dev_priv);
+ break;
default:
ret = -EINVAL;
}
@@ -2095,6 +2072,8 @@
cmd = IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP;
else if (cmd == IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_OLD)
cmd = IOCTL_KGSL_CMDSTREAM_READTIMESTAMP;
+ else if (cmd == IOCTL_KGSL_TIMESTAMP_EVENT_OLD)
+ cmd = IOCTL_KGSL_TIMESTAMP_EVENT;
nr = _IOC_NR(cmd);
diff --git a/drivers/gpu/msm/kgsl_device.h b/drivers/gpu/msm/kgsl_device.h
index 2a2e916..dc597f5 100644
--- a/drivers/gpu/msm/kgsl_device.h
+++ b/drivers/gpu/msm/kgsl_device.h
@@ -22,6 +22,7 @@
#include "kgsl_pwrctrl.h"
#include "kgsl_log.h"
#include "kgsl_pwrscale.h"
+#include <linux/sync.h>
#define KGSL_TIMEOUT_NONE 0
#define KGSL_TIMEOUT_DEFAULT 0xFFFFFFFF
@@ -154,7 +155,6 @@
struct kgsl_pwrctrl pwrctrl;
int open_count;
- struct atomic_notifier_head ts_notifier_list;
struct mutex mutex;
uint32_t state;
uint32_t requested_state;
@@ -209,7 +209,6 @@
.hwaccess_gate = COMPLETION_INITIALIZER((_dev).hwaccess_gate),\
.suspend_gate = COMPLETION_INITIALIZER((_dev).suspend_gate),\
.recovery_gate = COMPLETION_INITIALIZER((_dev).recovery_gate),\
- .ts_notifier_list = ATOMIC_NOTIFIER_INIT((_dev).ts_notifier_list),\
.idle_check_ws = __WORK_INITIALIZER((_dev).idle_check_ws,\
kgsl_idle_check),\
.ts_expired_ws = __WORK_INITIALIZER((_dev).ts_expired_ws,\
@@ -236,6 +235,12 @@
* context was responsible for causing it
*/
unsigned int reset_status;
+
+ /*
+ * Timeline used to create fences that can be signaled when a
+ * sync_pt timestamp expires.
+ */
+ struct sync_timeline *timeline;
};
struct kgsl_process_private {
@@ -367,12 +372,6 @@
int kgsl_check_timestamp(struct kgsl_device *device,
struct kgsl_context *context, unsigned int timestamp);
-int kgsl_register_ts_notifier(struct kgsl_device *device,
- struct notifier_block *nb);
-
-int kgsl_unregister_ts_notifier(struct kgsl_device *device,
- struct notifier_block *nb);
-
int kgsl_device_platform_probe(struct kgsl_device *device);
void kgsl_device_platform_remove(struct kgsl_device *device);
diff --git a/drivers/gpu/msm/kgsl_mmu.c b/drivers/gpu/msm/kgsl_mmu.c
index dee889d..54ba5ad 100644
--- a/drivers/gpu/msm/kgsl_mmu.c
+++ b/drivers/gpu/msm/kgsl_mmu.c
@@ -320,7 +320,7 @@
if (KGSL_MMU_TYPE_GPU == kgsl_mmu_type)
return CONFIG_MSM_KGSL_PAGE_TABLE_SIZE;
else if (KGSL_MMU_TYPE_IOMMU == kgsl_mmu_type)
- return SZ_2G;
+ return SZ_2G - KGSL_PAGETABLE_BASE;
else
return 0;
}
@@ -729,7 +729,8 @@
return 0;
gpuaddr = memdesc->gpuaddr;
- memdesc->priv |= KGSL_MEMFLAGS_GLOBAL;
+ memdesc->priv |= KGSL_MEMFLAGS_GLOBAL
+ | (KGSL_MEMTYPE_KERNEL << KGSL_MEMTYPE_SHIFT);
result = kgsl_mmu_map(pagetable, memdesc, protflags);
if (result)
diff --git a/drivers/gpu/msm/kgsl_sharedmem.c b/drivers/gpu/msm/kgsl_sharedmem.c
index c2ce5c7..bdc5686 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.c
+++ b/drivers/gpu/msm/kgsl_sharedmem.c
@@ -540,7 +540,6 @@
memdesc->size = size;
memdesc->pagetable = pagetable;
- memdesc->priv = KGSL_MEMFLAGS_CACHED;
memdesc->ops = &kgsl_page_alloc_ops;
memdesc->sg = kgsl_sg_alloc(sglen);
diff --git a/drivers/gpu/msm/kgsl_sharedmem.h b/drivers/gpu/msm/kgsl_sharedmem.h
index de89ac1..5a6c4c2 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.h
+++ b/drivers/gpu/msm/kgsl_sharedmem.h
@@ -27,8 +27,6 @@
#define KGSL_CACHE_OP_FLUSH 0x02
#define KGSL_CACHE_OP_CLEAN 0x03
-/** Set if the memdesc describes cached memory */
-#define KGSL_MEMFLAGS_CACHED 0x00000001
/** Set if the memdesc is mapped into all pagetables */
#define KGSL_MEMFLAGS_GLOBAL 0x00000002
@@ -136,6 +134,7 @@
{
if (kgsl_mmu_get_mmutype() == KGSL_MMU_TYPE_NONE)
return kgsl_sharedmem_ebimem(memdesc, pagetable, size);
+ memdesc->priv |= (KGSL_MEMTYPE_KERNEL << KGSL_MEMTYPE_SHIFT);
return kgsl_sharedmem_page_alloc(memdesc, pagetable, size);
}
@@ -144,10 +143,17 @@
struct kgsl_pagetable *pagetable,
size_t size, unsigned int flags)
{
+ int ret;
+ unsigned int mask = (KGSL_MEMTYPE_MASK | KGSL_MEMFLAGS_GPUREADONLY);
if (kgsl_mmu_get_mmutype() == KGSL_MMU_TYPE_NONE)
- return kgsl_sharedmem_ebimem_user(memdesc, pagetable, size,
+ ret = kgsl_sharedmem_ebimem_user(memdesc, pagetable, size,
flags);
- return kgsl_sharedmem_page_alloc_user(memdesc, pagetable, size, flags);
+ else
+ ret = kgsl_sharedmem_page_alloc_user(memdesc, pagetable, size,
+ flags);
+ if (ret == 0)
+ memdesc->priv |= flags & mask;
+ return ret;
}
static inline int
diff --git a/drivers/gpu/msm/kgsl_snapshot.c b/drivers/gpu/msm/kgsl_snapshot.c
index a2ab5b1..0bfcfd8 100644
--- a/drivers/gpu/msm/kgsl_snapshot.c
+++ b/drivers/gpu/msm/kgsl_snapshot.c
@@ -289,6 +289,32 @@
kfree(obj);
}
+/* ksgl_snapshot_have_object - Return 1 if the object has been processed
+ *@device - the device that is being snapshotted
+ * @ptbase - the pagetable base of the object to freeze
+ * @gpuaddr - The gpu address of the object to freeze
+ * @size - the size of the object (may not always be the size of the region)
+ *
+ * Return 1 if the object is already in the list - this can save us from
+ * having to parse the sme thing over again.
+*/
+int kgsl_snapshot_have_object(struct kgsl_device *device, unsigned int ptbase,
+ unsigned int gpuaddr, unsigned int size)
+{
+ struct kgsl_snapshot_object *obj;
+
+ list_for_each_entry(obj, &device->snapshot_obj_list, node) {
+ if (obj->ptbase != ptbase)
+ continue;
+
+ if ((gpuaddr >= obj->gpuaddr) &&
+ ((gpuaddr + size) <= (obj->gpuaddr + obj->size)))
+ return 1;
+ }
+
+ return 0;
+}
+
/* kgsl_snapshot_get_object - Mark a GPU buffer to be frozen
* @device - the device that is being snapshotted
* @ptbase - the pagetable base of the object to freeze
diff --git a/drivers/gpu/msm/kgsl_snapshot.h b/drivers/gpu/msm/kgsl_snapshot.h
index 6d81bcf..bc29863 100644
--- a/drivers/gpu/msm/kgsl_snapshot.h
+++ b/drivers/gpu/msm/kgsl_snapshot.h
@@ -311,5 +311,8 @@
int kgsl_snapshot_get_object(struct kgsl_device *device, unsigned int ptbase,
unsigned int gpuaddr, unsigned int size, unsigned int type);
+int kgsl_snapshot_have_object(struct kgsl_device *device, unsigned int ptbase,
+ unsigned int gpuaddr, unsigned int size);
+
#endif
#endif
diff --git a/drivers/gpu/msm/kgsl_sync.c b/drivers/gpu/msm/kgsl_sync.c
new file mode 100644
index 0000000..a2dfe3b
--- /dev/null
+++ b/drivers/gpu/msm/kgsl_sync.c
@@ -0,0 +1,214 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/file.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+
+#include "kgsl_sync.h"
+
+struct sync_pt *kgsl_sync_pt_create(struct sync_timeline *timeline,
+ unsigned int timestamp)
+{
+ struct sync_pt *pt;
+ pt = sync_pt_create(timeline, (int) sizeof(struct kgsl_sync_pt));
+ if (pt) {
+ struct kgsl_sync_pt *kpt = (struct kgsl_sync_pt *) pt;
+ kpt->timestamp = timestamp;
+ }
+ return pt;
+}
+
+/*
+ * This should only be called on sync_pts which have been created but
+ * not added to a fence.
+ */
+void kgsl_sync_pt_destroy(struct sync_pt *pt)
+{
+ sync_pt_free(pt);
+}
+
+static struct sync_pt *kgsl_sync_pt_dup(struct sync_pt *pt)
+{
+ struct kgsl_sync_pt *kpt = (struct kgsl_sync_pt *) pt;
+ return kgsl_sync_pt_create(pt->parent, kpt->timestamp);
+}
+
+static int kgsl_sync_pt_has_signaled(struct sync_pt *pt)
+{
+ struct kgsl_sync_pt *kpt = (struct kgsl_sync_pt *) pt;
+ struct kgsl_sync_timeline *ktimeline =
+ (struct kgsl_sync_timeline *) pt->parent;
+ unsigned int ts = kpt->timestamp;
+ unsigned int last_ts = ktimeline->last_timestamp;
+ if (timestamp_cmp(last_ts, ts) >= 0) {
+ /* signaled */
+ return 1;
+ }
+ return 0;
+}
+
+static int kgsl_sync_pt_compare(struct sync_pt *a, struct sync_pt *b)
+{
+ struct kgsl_sync_pt *kpt_a = (struct kgsl_sync_pt *) a;
+ struct kgsl_sync_pt *kpt_b = (struct kgsl_sync_pt *) b;
+ unsigned int ts_a = kpt_a->timestamp;
+ unsigned int ts_b = kpt_b->timestamp;
+ return timestamp_cmp(ts_a, ts_b);
+}
+
+struct kgsl_fence_event_priv {
+ struct kgsl_context *context;
+};
+
+/**
+ * kgsl_fence_event_cb - Event callback for a fence timestamp event
+ * @device - The KGSL device that expired the timestamp
+ * @priv - private data for the event
+ * @context_id - the context id that goes with the timestamp
+ * @timestamp - the timestamp that triggered the event
+ *
+ * Signal a fence following the expiration of a timestamp
+ */
+
+static inline void kgsl_fence_event_cb(struct kgsl_device *device,
+ void *priv, u32 context_id, u32 timestamp)
+{
+ struct kgsl_fence_event_priv *ev = priv;
+ kgsl_sync_timeline_signal(ev->context->timeline, timestamp);
+ kgsl_context_put(ev->context);
+ kfree(ev);
+}
+
+/**
+ * kgsl_add_fence_event - Create a new fence event
+ * @device - KGSL device to create the event on
+ * @timestamp - Timestamp to trigger the event
+ * @data - Return fence fd stored in struct kgsl_timestamp_event_fence
+ * @len - length of the fence event
+ * @owner - driver instance that owns this event
+ * @returns 0 on success or error code on error
+ *
+ * Create a fence and register an event to signal the fence when
+ * the timestamp expires
+ */
+
+int kgsl_add_fence_event(struct kgsl_device *device,
+ u32 context_id, u32 timestamp, void __user *data, int len,
+ struct kgsl_device_private *owner)
+{
+ struct kgsl_fence_event_priv *event;
+ struct kgsl_timestamp_event_fence priv;
+ struct kgsl_context *context;
+ struct sync_pt *pt;
+ struct sync_fence *fence = NULL;
+ int ret = -EINVAL;
+
+ if (len != sizeof(priv))
+ return -EINVAL;
+
+ context = kgsl_find_context(owner, context_id);
+ if (context == NULL)
+ return -EINVAL;
+
+ event = kzalloc(sizeof(*event), GFP_KERNEL);
+ if (event == NULL)
+ return -ENOMEM;
+ event->context = context;
+ kgsl_context_get(context);
+
+ pt = kgsl_sync_pt_create(context->timeline, timestamp);
+ if (pt == NULL) {
+ KGSL_DRV_ERR(device, "kgsl_sync_pt_create failed\n");
+ ret = -ENOMEM;
+ goto fail_pt;
+ }
+
+ fence = sync_fence_create("kgsl-fence", pt);
+ if (fence == NULL) {
+ /* only destroy pt when not added to fence */
+ kgsl_sync_pt_destroy(pt);
+ KGSL_DRV_ERR(device, "sync_fence_create failed\n");
+ ret = -ENOMEM;
+ goto fail_fence;
+ }
+
+ priv.fence_fd = get_unused_fd_flags(0);
+ if (priv.fence_fd < 0) {
+ KGSL_DRV_ERR(device, "invalid fence fd\n");
+ ret = -EINVAL;
+ goto fail_fd;
+ }
+ sync_fence_install(fence, priv.fence_fd);
+
+ if (copy_to_user(data, &priv, sizeof(priv))) {
+ ret = -EFAULT;
+ goto fail_copy_fd;
+ }
+
+ ret = kgsl_add_event(device, context_id, timestamp,
+ kgsl_fence_event_cb, event, owner);
+ if (ret)
+ goto fail_event;
+
+ return 0;
+
+fail_event:
+fail_copy_fd:
+ /* clean up sync_fence_install */
+ sync_fence_put(fence);
+ put_unused_fd(priv.fence_fd);
+fail_fd:
+ /* clean up sync_fence_create */
+ sync_fence_put(fence);
+fail_fence:
+fail_pt:
+ kgsl_context_put(context);
+ kfree(event);
+ return ret;
+}
+
+static const struct sync_timeline_ops kgsl_sync_timeline_ops = {
+ .dup = kgsl_sync_pt_dup,
+ .has_signaled = kgsl_sync_pt_has_signaled,
+ .compare = kgsl_sync_pt_compare,
+};
+
+int kgsl_sync_timeline_create(struct kgsl_context *context)
+{
+ struct kgsl_sync_timeline *ktimeline;
+
+ context->timeline = sync_timeline_create(&kgsl_sync_timeline_ops,
+ (int) sizeof(struct kgsl_sync_timeline), "kgsl-timeline");
+ if (context->timeline == NULL)
+ return -EINVAL;
+
+ ktimeline = (struct kgsl_sync_timeline *) context->timeline;
+ ktimeline->last_timestamp = 0;
+
+ return 0;
+}
+
+void kgsl_sync_timeline_signal(struct sync_timeline *timeline,
+ unsigned int timestamp)
+{
+ struct kgsl_sync_timeline *ktimeline =
+ (struct kgsl_sync_timeline *) timeline;
+ ktimeline->last_timestamp = timestamp;
+ sync_timeline_signal(timeline);
+}
+
+void kgsl_sync_timeline_destroy(struct kgsl_context *context)
+{
+ sync_timeline_destroy(context->timeline);
+}
diff --git a/drivers/gpu/msm/kgsl_sync.h b/drivers/gpu/msm/kgsl_sync.h
new file mode 100644
index 0000000..06b3ad0
--- /dev/null
+++ b/drivers/gpu/msm/kgsl_sync.h
@@ -0,0 +1,75 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef __KGSL_SYNC_H
+#define __KGSL_SYNC_H
+
+#include <linux/sync.h>
+#include "kgsl_device.h"
+
+struct kgsl_sync_timeline {
+ struct sync_timeline timeline;
+ unsigned int last_timestamp;
+};
+
+struct kgsl_sync_pt {
+ struct sync_pt pt;
+ unsigned int timestamp;
+};
+
+#if defined(CONFIG_SYNC)
+struct sync_pt *kgsl_sync_pt_create(struct sync_timeline *timeline,
+ unsigned int timestamp);
+void kgsl_sync_pt_destroy(struct sync_pt *pt);
+int kgsl_add_fence_event(struct kgsl_device *device,
+ u32 context_id, u32 timestamp, void __user *data, int len,
+ struct kgsl_device_private *owner);
+int kgsl_sync_timeline_create(struct kgsl_context *context);
+void kgsl_sync_timeline_signal(struct sync_timeline *timeline,
+ unsigned int timestamp);
+void kgsl_sync_timeline_destroy(struct kgsl_context *context);
+#else
+static inline struct sync_pt
+*kgsl_sync_pt_create(struct sync_timeline *timeline, unsigned int timestamp)
+{
+ return NULL;
+}
+
+static inline void kgsl_sync_pt_destroy(struct sync_pt *pt)
+{
+}
+
+static inline int kgsl_add_fence_event(struct kgsl_device *device,
+ u32 context_id, u32 timestamp, void __user *data, int len,
+ struct kgsl_device_private *owner)
+{
+ return -EINVAL;
+}
+
+static int kgsl_sync_timeline_create(struct kgsl_context *context)
+{
+ context->timeline = NULL;
+ return 0;
+}
+
+static inline void
+kgsl_sync_timeline_signal(struct sync_timeline *timeline,
+ unsigned int timestamp)
+{
+}
+
+static inline void kgsl_sync_timeline_destroy(struct kgsl_context *context)
+{
+}
+#endif
+
+#endif /* __KGSL_SYNC_H */
diff --git a/drivers/gpu/msm/kgsl_trace.h b/drivers/gpu/msm/kgsl_trace.h
index 81ab3fb..bba06bc 100644
--- a/drivers/gpu/msm/kgsl_trace.h
+++ b/drivers/gpu/msm/kgsl_trace.h
@@ -315,16 +315,18 @@
TP_STRUCT__entry(
__field(unsigned int, gpuaddr)
__field(unsigned int, size)
+ __field(unsigned int, tgid)
),
TP_fast_assign(
__entry->gpuaddr = mem_entry->memdesc.gpuaddr;
__entry->size = mem_entry->memdesc.size;
+ __entry->tgid = mem_entry->priv->pid;
),
TP_printk(
- "gpuaddr=0x%08x size=%d",
- __entry->gpuaddr, __entry->size
+ "gpuaddr=0x%08x size=%d tgid=%d",
+ __entry->gpuaddr, __entry->size, __entry->tgid
)
);
@@ -339,6 +341,7 @@
__field(unsigned int, size)
__field(int, fd)
__field(int, type)
+ __field(unsigned int, tgid)
),
TP_fast_assign(
@@ -346,12 +349,13 @@
__entry->size = mem_entry->memdesc.size;
__entry->fd = fd;
__entry->type = mem_entry->memtype;
+ __entry->tgid = mem_entry->priv->pid;
),
TP_printk(
- "gpuaddr=0x%08x size=%d type=%d fd=%d",
+ "gpuaddr=0x%08x size=%d type=%d fd=%d tgid=%d",
__entry->gpuaddr, __entry->size,
- __entry->type, __entry->fd
+ __entry->type, __entry->fd, __entry->tgid
)
);
@@ -366,17 +370,20 @@
__field(unsigned int, size)
__field(int, type)
__field(int, fd)
+ __field(unsigned int, tgid)
),
TP_fast_assign(
__entry->gpuaddr = mem_entry->memdesc.gpuaddr;
__entry->size = mem_entry->memdesc.size;
__entry->type = mem_entry->memtype;
+ __entry->tgid = mem_entry->priv->pid;
),
TP_printk(
- "gpuaddr=0x%08x size=%d type=%d",
- __entry->gpuaddr, __entry->size, __entry->type
+ "gpuaddr=0x%08x size=%d type=%d tgid=%d",
+ __entry->gpuaddr, __entry->size, __entry->type,
+ __entry->tgid
)
);
diff --git a/drivers/gpu/msm/z180.c b/drivers/gpu/msm/z180.c
index 8ddc991..712bc60 100644
--- a/drivers/gpu/msm/z180.c
+++ b/drivers/gpu/msm/z180.c
@@ -212,10 +212,6 @@
queue_work(device->work_queue, &device->ts_expired_ws);
wake_up_interruptible(&device->wait_queue);
-
- atomic_notifier_call_chain(
- &(device->ts_notifier_list),
- device->id, NULL);
}
}
diff --git a/drivers/hwmon/epm_adc.c b/drivers/hwmon/epm_adc.c
index 3969319..368aac4 100644
--- a/drivers/hwmon/epm_adc.c
+++ b/drivers/hwmon/epm_adc.c
@@ -99,11 +99,20 @@
#define EPM_GLOBAL_ENABLE_MIN_DELAY 5000
#define EPM_GLOBAL_ENABLE_MAX_DELAY 5100
+#define EPM_AVG_BUF_MASK1 0xfff00000
+#define EPM_AVG_BUF_MASK2 0xfff00
+#define EPM_AVG_BUF_MASK3 0xff
+#define EPM_AVG_BUF_MASK4 0xf0000000
+#define EPM_AVG_BUF_MASK5 0xfff0000
+#define EPM_AVG_BUF_MASK6 0xfff0
+#define EPM_AVG_BUF_MASK7 0xf
+#define EPM_AVG_BUF_MASK8 0xff000000
+#define EPM_AVG_BUF_MASK9 0xfff000
+#define EPM_AVG_BUF_MASK10 0xfff
+
#define EPM_PSOC_BUFFERED_DATA_LENGTH 48
#define EPM_PSOC_BUFFERED_DATA_LENGTH2 54
-#define EPM_SPI_NOR_CS_N_GPIO 53
-
struct epm_adc_drv {
struct platform_device *pdev;
struct device *hwmon;
@@ -111,6 +120,7 @@
struct mutex conv_lock;
uint32_t bus_id;
struct miscdevice misc;
+ uint32_t channel_mask;
struct epm_chan_properties epm_psoc_ch_prop[0];
};
@@ -172,14 +182,6 @@
{
int rc = 0;
- rc = gpio_request(EPM_SPI_NOR_CS_N_GPIO, "SPI_NOR_CS_N");
- if (!rc)
- gpio_direction_output(EPM_SPI_NOR_CS_N_GPIO, 1);
- else {
- pr_err("Configure spi nor Failed\n");
- return -EINVAL;
- }
-
if (epm_adc_first_request) {
rc = gpio_request(GPIO_EPM_GLOBAL_ENABLE, "EPM_GLOBAL_EN");
if (!rc) {
@@ -521,27 +523,27 @@
struct epm_adc_platform_data *pdata = epm_adc->pdev->dev.platform_data;
uint32_t chan_idx = (conv->device_idx * pdata->chan_per_adc) +
conv->channel_idx;
- int64_t *adc_scaled_data = 0;
+ int64_t adc_scaled_data = 0;
/* Get the channel number */
channel_num = (adc_raw_data[0] & EPM_ADC_ADS_CHANNEL_DATA_CHID);
sign_bit = 1;
/* This is the 16-bit raw data */
- *adc_scaled_data = ((adc_raw_data[1] << 8) | adc_raw_data[2]);
+ adc_scaled_data = ((adc_raw_data[1] << 8) | adc_raw_data[2]);
/* Obtain the internal system reading */
if (channel_num == EPM_ADC_ADS_CHANNEL_VCC) {
- *adc_scaled_data *= EPM_ADC_SCALE_MILLI;
- do_div(*adc_scaled_data, EPM_ADC_SCALE_CODE_VOLTS);
+ adc_scaled_data *= EPM_ADC_SCALE_MILLI;
+ do_div(adc_scaled_data, EPM_ADC_SCALE_CODE_VOLTS);
} else if (channel_num == EPM_ADC_ADS_CHANNEL_GAIN) {
- do_div(*adc_scaled_data, EPM_ADC_SCALE_CODE_GAIN);
+ do_div(adc_scaled_data, EPM_ADC_SCALE_CODE_GAIN);
} else if (channel_num == EPM_ADC_ADS_CHANNEL_REF) {
- *adc_scaled_data *= EPM_ADC_SCALE_MILLI;
- do_div(*adc_scaled_data, EPM_ADC_SCALE_CODE_VOLTS);
+ adc_scaled_data *= EPM_ADC_SCALE_MILLI;
+ do_div(adc_scaled_data, EPM_ADC_SCALE_CODE_VOLTS);
} else if (channel_num == EPM_ADC_ADS_CHANNEL_TEMP) {
/* Convert Code to micro-volts */
/* Use this formula to get the temperature reading */
- *adc_scaled_data -= EPM_ADC_TEMP_TO_DEGC_COEFF;
- do_div(*adc_scaled_data, EPM_ADC_TEMP_SENSOR_COEFF);
+ adc_scaled_data -= EPM_ADC_TEMP_TO_DEGC_COEFF;
+ do_div(adc_scaled_data, EPM_ADC_TEMP_SENSOR_COEFF);
} else if (channel_num == EPM_ADC_ADS_CHANNEL_OFFSET) {
/* The offset should be zero */
pr_debug("%s: ADC Channel Offset\n", __func__);
@@ -553,45 +555,50 @@
* mvVRef is in milli-volts and resistorvalue is in micro-ohms.
* Hence, I = V/R gives us current in kilo-amps.
*/
- if (*adc_scaled_data & EPM_ADC_MAX_NEGATIVE_SCALE_CODE) {
+ if (adc_scaled_data & EPM_ADC_MAX_NEGATIVE_SCALE_CODE) {
sign_bit = -1;
- *adc_scaled_data = (~*adc_scaled_data
+ adc_scaled_data = (~adc_scaled_data
& EPM_ADC_NEG_LSB_CODE);
}
- if (*adc_scaled_data != 0) {
- *adc_scaled_data *= EPM_ADC_SCALE_FACTOR;
+ if (adc_scaled_data != 0) {
+ adc_scaled_data *= EPM_ADC_SCALE_FACTOR;
/* Device is calibrated for 1LSB = VREF/7800h.*/
- *adc_scaled_data *= EPM_ADC_MILLI_VOLTS_SOURCE;
- do_div(*adc_scaled_data, EPM_ADC_VREF_CODE);
+ adc_scaled_data *= EPM_ADC_MILLI_VOLTS_SOURCE;
+ do_div(adc_scaled_data, EPM_ADC_VREF_CODE);
/* Data will now be in micro-volts.*/
- *adc_scaled_data *= EPM_ADC_SCALE_MILLI;
+ adc_scaled_data *= EPM_ADC_SCALE_MILLI;
/* Divide by amplifier gain value.*/
- do_div(*adc_scaled_data, pdata->channel[chan_idx].gain);
+ do_div(adc_scaled_data, pdata->channel[chan_idx].gain);
/* Data will now be in nano-volts.*/
- do_div(*adc_scaled_data, EPM_ADC_SCALE_FACTOR);
- *adc_scaled_data *= EPM_ADC_SCALE_MILLI;
+ do_div(adc_scaled_data, EPM_ADC_SCALE_FACTOR);
+ adc_scaled_data *= EPM_ADC_SCALE_MILLI;
/* Data is now in micro-amps.*/
- do_div(*adc_scaled_data,
+ do_div(adc_scaled_data,
pdata->channel[chan_idx].resistorvalue);
/* Set the sign bit for lekage current. */
- *adc_scaled_data *= sign_bit;
+ adc_scaled_data *= sign_bit;
}
}
- conv->physical = (int32_t) *adc_scaled_data;
+
+ conv->physical = (int32_t) adc_scaled_data;
return 0;
}
-static int epm_psoc_scale_result(uint16_t *adc_raw_data, uint32_t index)
+static int epm_psoc_scale_result(uint32_t result, uint32_t index)
{
struct epm_adc_drv *epm_adc = epm_adc_drv;
+ int32_t result_cur;
+
/* result = 2.048V/(32767 * gain * rsense) */
- *adc_raw_data = (EPM_PSOC_VREF_VOLTAGE/EPM_PSOC_MAX_ADC_CODE_16_BIT)
- * (*adc_raw_data);
- *adc_raw_data = *adc_raw_data/
+ result_cur = (((EPM_PSOC_VREF_VOLTAGE * result)/
+ EPM_PSOC_MAX_ADC_CODE_16_BIT) * 1000);
+
+ result_cur = (result_cur/
(epm_adc->epm_psoc_ch_prop[index].gain *
- epm_adc->epm_psoc_ch_prop[index].resistorvalue);
- return 0;
+ epm_adc->epm_psoc_ch_prop[index].resistorvalue));
+
+ return result_cur;
}
static int epm_adc_blocking_conversion(struct epm_adc_drv *epm_adc,
@@ -712,6 +719,9 @@
if (rc)
return rc;
+ rc = spi_sync(epm_adc->epm_spi_client, &m);
+ if (rc)
+ return rc;
init_resp->cmd = rx_buf[0];
init_resp->version = rx_buf[1];
init_resp->compatible_ver = rx_buf[2];
@@ -767,7 +777,6 @@
chan_num = rx_buf[2] << 24 | (rx_buf[3] << 16) | (rx_buf[4] << 8) |
rx_buf[5];
psoc_chan_configure->channel_num = chan_num;
- pr_debug("dev_num:%d, chan_num:%d\n", rx_buf[1], chan_num);
return rc;
}
@@ -959,7 +968,7 @@
struct spi_message m;
struct spi_transfer t;
char tx_buf[64], rx_buf[64];
- int rc = 0, i;
+ int rc = 0, i = 0, j = 0, z = 0;
spi_setup(epm_adc->epm_spi_client);
@@ -996,6 +1005,57 @@
for (i = 0; i < EPM_PSOC_BUFFERED_DATA_LENGTH2; i++)
psoc_get_meas->avg_data[i] = rx_buf[10 + i];
+ i = j = 0;
+ for (z = 0; z < 4; z++) {
+ psoc_get_meas->data[i].channel = i;
+ psoc_get_meas->data[i].avg_buffer_sample =
+ rx_buf[10 + j] & EPM_AVG_BUF_MASK1;
+ i++;
+ j++;
+ psoc_get_meas->data[i].avg_buffer_sample =
+ rx_buf[10 + j] & EPM_AVG_BUF_MASK2;
+ i++;
+ j++;
+ psoc_get_meas->data[i].avg_buffer_sample =
+ rx_buf[10 + j] & EPM_AVG_BUF_MASK3;
+ psoc_get_meas->data[i].avg_buffer_sample <<= 8;
+ j++;
+ psoc_get_meas->data[i].avg_buffer_sample =
+ psoc_get_meas->data[i].avg_buffer_sample |
+ (rx_buf[10 + j] & EPM_AVG_BUF_MASK4);
+ i++;
+ j++;
+ psoc_get_meas->data[i].avg_buffer_sample =
+ rx_buf[10 + j] & EPM_AVG_BUF_MASK5;
+ i++;
+ j++;
+ psoc_get_meas->data[i].avg_buffer_sample =
+ rx_buf[10 + j] & EPM_AVG_BUF_MASK6;
+ i++;
+ j++;
+ psoc_get_meas->data[i].avg_buffer_sample =
+ rx_buf[10 + j] & EPM_AVG_BUF_MASK7;
+ psoc_get_meas->data[i].avg_buffer_sample <<= 4;
+ j++;
+ psoc_get_meas->data[i].avg_buffer_sample =
+ psoc_get_meas->data[i].avg_buffer_sample |
+ (rx_buf[10 + j] & EPM_AVG_BUF_MASK8);
+ i++;
+ j++;
+ psoc_get_meas->data[i].avg_buffer_sample =
+ rx_buf[10 + j] & EPM_AVG_BUF_MASK9;
+ i++;
+ j++;
+ psoc_get_meas->data[i].avg_buffer_sample =
+ rx_buf[10 + j] & EPM_AVG_BUF_MASK10;
+ }
+
+ for (z = 0; z < 32; z++) {
+ if (psoc_get_meas->data[z].avg_buffer_sample != 0)
+ psoc_get_meas->data[z].result = epm_psoc_scale_result(
+ psoc_get_meas->data[z].avg_buffer_sample, z);
+ }
+
return rc;
}
@@ -1417,7 +1477,6 @@
struct epm_psoc_init_resp init_resp;
struct epm_psoc_channel_configure psoc_chan_configure;
struct epm_psoc_get_data psoc_get_meas;
- int16_t *adc_code = 0;
int rc = 0;
rc = epm_adc_psoc_gpio_init(true);
@@ -1431,15 +1490,16 @@
init_resp.cmd = EPM_PSOC_INIT_CMD;
rc = epm_psoc_init(epm_adc, &init_resp);
if (rc) {
- pr_info("PSOC init failed %d\n", rc);
+ pr_err("PSOC init failed %d\n", rc);
return 0;
}
+
psoc_chan_configure.channel_num = (1 << attr->index);
psoc_chan_configure.cmd = EPM_PSOC_CHANNEL_ENABLE_DISABLE_CMD;
rc = epm_psoc_channel_configure(epm_adc, &psoc_chan_configure);
if (rc) {
- pr_info("PSOC channel configure failed\n");
+ pr_err("PSOC channel configure failed\n");
return 0;
}
@@ -1451,20 +1511,13 @@
psoc_get_meas.chan_num = attr->index;
rc = epm_psoc_get_data(epm_adc, &psoc_get_meas);
if (rc) {
- pr_info("PSOC get data failed\n");
+ pr_err("PSOC get data failed\n");
return 0;
}
- *adc_code = psoc_get_meas.reading_value;
-
- rc = epm_psoc_scale_result(adc_code,
- psoc_chan_configure.channel_num);
- if (rc) {
- pr_info("Scale result failed\n");
- return 0;
- }
-
- psoc_get_meas.reading_value = *adc_code;
+ psoc_get_meas.reading_value = epm_psoc_scale_result(
+ psoc_get_meas.reading_value,
+ attr->index);
rc = epm_adc_psoc_gpio_init(false);
if (rc) {
@@ -1513,7 +1566,7 @@
static int __devinit epm_adc_psoc_init_hwmon(struct spi_device *spi,
struct epm_adc_drv *epm_adc)
{
- int i, rc, num_chans = 15;
+ int i, rc, num_chans = 31;
for (i = 0; i < num_chans; i++) {
rc = device_create_file(&spi->dev,
@@ -1531,8 +1584,8 @@
{
const struct device_node *node = spi->dev.of_node;
struct epm_adc_drv *epm_adc;
- int32_t *epm_ch_gain, *epm_ch_rsense;
- u32 rc = 0, epm_num_channels, i;
+ u32 *epm_ch_gain, *epm_ch_rsense;
+ u32 rc = 0, epm_num_channels, i, channel_mask;
if (!node)
return -EINVAL;
@@ -1545,14 +1598,14 @@
}
epm_ch_gain = devm_kzalloc(&spi->dev,
- epm_num_channels, GFP_KERNEL);
+ epm_num_channels * sizeof(u32), GFP_KERNEL);
if (!epm_ch_gain) {
dev_err(&spi->dev, "cannot allocate gain\n");
return -ENOMEM;
}
epm_ch_rsense = devm_kzalloc(&spi->dev,
- epm_num_channels, GFP_KERNEL);
+ epm_num_channels * sizeof(u32), GFP_KERNEL);
if (!epm_ch_rsense) {
dev_err(&spi->dev, "cannot allocate rsense\n");
return -ENOMEM;
@@ -1572,6 +1625,13 @@
return rc;
}
+ rc = of_property_read_u32(node,
+ "qcom,channel-type", &channel_mask);
+ if (rc) {
+ dev_err(&spi->dev, "missing channel mask\n");
+ return -ENODEV;
+ }
+
epm_adc = devm_kzalloc(&spi->dev,
sizeof(struct epm_adc_drv) +
(epm_num_channels *
@@ -1589,6 +1649,7 @@
epm_ch_gain[i];
}
+ epm_adc->channel_mask = channel_mask;
epm_adc_drv = epm_adc;
return 0;
@@ -1596,20 +1657,22 @@
static int __devinit epm_adc_psoc_spi_probe(struct spi_device *spi)
{
+
struct epm_adc_drv *epm_adc;
struct device_node *node = spi->dev.of_node;
int rc = 0;
- if (!node) {
- dev_err(&spi->dev, "no platform data?\n");
- pr_info("Error in the probe\n");
- return -EINVAL;
- }
-
- if (node)
+ if (node) {
rc = get_device_tree_data(spi);
- else
- return -ENODEV;
+ if (rc)
+ return rc;
+ } else {
+ epm_adc = epm_adc_drv;
+ epm_adc_drv->epm_spi_client = spi;
+ epm_adc_drv->epm_spi_client->bits_per_word =
+ EPM_ADC_ADS_SPI_BITS_PER_WORD;
+ return rc;
+ }
epm_adc = epm_adc_drv;
epm_adc->misc.name = EPM_ADC_DRIVER_NAME;
@@ -1630,7 +1693,6 @@
}
mutex_init(&epm_adc->conv_lock);
-
return rc;
}
@@ -1667,8 +1729,9 @@
conv.device_idx = attr->index / pdata->chan_per_adc;
conv.channel_idx = attr->index % pdata->chan_per_adc;
conv.physical = 0;
- pr_debug("%s: device_idx=%d channel_idx=%d", __func__, conv.device_idx,
+ pr_info("%s: device_idx=%d channel_idx=%d", __func__, conv.device_idx,
conv.channel_idx);
+
if (!epm_adc_expander_register) {
rc = epm_adc_i2c_expander_register();
if (rc) {
@@ -1691,6 +1754,7 @@
__func__, rc);
return 0;
}
+
rc = epm_adc_hw_deinit(epm_adc);
if (rc) {
pr_err("%s: epm_adc_hw_deinit() failed, rc = %d",
diff --git a/drivers/hwmon/pm8xxx-adc.c b/drivers/hwmon/pm8xxx-adc.c
index 8e35252..181a97e 100644
--- a/drivers/hwmon/pm8xxx-adc.c
+++ b/drivers/hwmon/pm8xxx-adc.c
@@ -31,6 +31,7 @@
#include <linux/mfd/pm8xxx/core.h>
#include <linux/regulator/consumer.h>
#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
+#include <mach/msm_xo.h>
/* User Bank register set */
#define PM8XXX_ADC_ARB_USRP_CNTRL1 0x197
@@ -141,6 +142,7 @@
struct work_struct cool_work;
uint32_t mpp_base;
struct device *hwmon;
+ struct msm_xo_voter *adc_voter;
int msm_suspend_check;
struct pm8xxx_adc_amux_properties *conv;
struct pm8xxx_adc_arb_btm_param batt;
@@ -290,14 +292,34 @@
return rc;
}
+static int32_t pm8xxx_adc_xo_vote(bool on)
+{
+ struct pm8xxx_adc *adc_pmic = pmic_adc;
+
+ if (on)
+ msm_xo_mode_vote(adc_pmic->adc_voter, MSM_XO_MODE_ON);
+ else
+ msm_xo_mode_vote(adc_pmic->adc_voter, MSM_XO_MODE_OFF);
+
+ return 0;
+}
+
static int32_t pm8xxx_adc_channel_power_enable(uint32_t channel,
bool power_cntrl)
{
int rc = 0;
- switch (channel)
+ switch (channel) {
case ADC_MPP_1_AMUX8:
rc = pm8xxx_adc_patherm_power(power_cntrl);
+ break;
+ case CHANNEL_DIE_TEMP:
+ case CHANNEL_MUXOFF:
+ rc = pm8xxx_adc_xo_vote(power_cntrl);
+ break;
+ default:
+ break;
+ }
return rc;
}
@@ -1147,6 +1169,7 @@
struct pm8xxx_adc *adc_pmic = pmic_adc;
int i;
+ msm_xo_put(adc_pmic->adc_voter);
platform_set_drvdata(pdev, NULL);
pmic_adc = NULL;
if (!pa_therm) {
@@ -1265,6 +1288,14 @@
}
adc_pmic->hwmon = hwmon_device_register(adc_pmic->dev);
+ if (adc_pmic->adc_voter == NULL) {
+ adc_pmic->adc_voter = msm_xo_get(MSM_XO_TCXO_D0, "pmic_xoadc");
+ if (IS_ERR(adc_pmic->adc_voter)) {
+ dev_err(&pdev->dev, "Failed to get XO vote\n");
+ return PTR_ERR(adc_pmic->adc_voter);
+ }
+ }
+
pa_therm = regulator_get(adc_pmic->dev, "pa_therm");
if (IS_ERR(pa_therm)) {
rc = PTR_ERR(pa_therm);
diff --git a/drivers/input/misc/pmic8xxx-pwrkey.c b/drivers/input/misc/pmic8xxx-pwrkey.c
index 9f64cec..775e95d 100644
--- a/drivers/input/misc/pmic8xxx-pwrkey.c
+++ b/drivers/input/misc/pmic8xxx-pwrkey.c
@@ -178,10 +178,22 @@
pwrkey->key_press_irq = key_press_irq;
pwrkey->key_release_irq = key_release_irq;
pwrkey->pwr = pwr;
- pwrkey->press = false;
platform_set_drvdata(pdev, pwrkey);
+ /* check power key status during boot */
+ err = pm8xxx_read_irq_stat(pdev->dev.parent, key_press_irq);
+ if (err < 0) {
+ dev_err(&pdev->dev, "reading irq status failed\n");
+ goto unreg_input_dev;
+ }
+ pwrkey->press = !!err;
+
+ if (pwrkey->press) {
+ input_report_key(pwrkey->pwr, KEY_POWER, 1);
+ input_sync(pwrkey->pwr);
+ }
+
err = request_any_context_irq(key_press_irq, pwrkey_press_irq,
IRQF_TRIGGER_RISING, "pmic8xxx_pwrkey_press", pwrkey);
if (err < 0) {
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c b/drivers/input/touchscreen/atmel_mxt_ts.c
index f10f433..f671806 100644
--- a/drivers/input/touchscreen/atmel_mxt_ts.c
+++ b/drivers/input/touchscreen/atmel_mxt_ts.c
@@ -1389,7 +1389,8 @@
}
data->t9_max_reportid = t9_object->max_reportid;
data->t9_min_reportid = t9_object->max_reportid -
- t9_object->num_report_ids + 1;
+ (t9_object->num_report_ids *
+ (t9_object->instances + 1)) + 1;
if (data->pdata->key_codes) {
t15_object = mxt_get_object(data, MXT_TOUCH_KEYARRAY_T15);
@@ -1398,7 +1399,8 @@
else {
data->t15_max_reportid = t15_object->max_reportid;
data->t15_min_reportid = t15_object->max_reportid -
- t15_object->num_report_ids + 1;
+ (t15_object->num_report_ids *
+ (t15_object->instances + 1)) + 1;
}
}
@@ -1409,7 +1411,8 @@
else {
data->t42_max_reportid = t42_object->max_reportid;
data->t42_min_reportid = t42_object->max_reportid -
- t42_object->num_report_ids + 1;
+ (t42_object->num_report_ids *
+ (t42_object->instances + 1)) + 1;
}
return 0;
@@ -2231,6 +2234,14 @@
}
}
+ /* calibrate */
+ if (data->pdata->need_calibration) {
+ error = mxt_write_object(data, MXT_GEN_COMMAND_T6,
+ MXT_COMMAND_CALIBRATE, 1);
+ if (error < 0)
+ dev_dbg(dev, "sending calibration command failed\n");
+ }
+
mutex_unlock(&input_dev->mutex);
return 0;
@@ -2447,6 +2458,9 @@
return -EINVAL;
}
+ /* need calibration during wakeup? */
+ pdata->need_calibration = of_property_read_bool(np,
+ "atmel,need-calibration");
/* config array size */
pdata->config_array_size = 0;
temp = NULL;
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index f867dcb..ec3429b 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -16,7 +16,7 @@
# MSM IOMMU support
config MSM_IOMMU
bool "MSM IOMMU Support"
- depends on ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_APQ8064 || ARCH_MSM8974
+ depends on ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_APQ8064 || ARCH_MSM8974 || ARCH_MPQ8092
select IOMMU_API
help
Support for the IOMMUs found on certain Qualcomm SOCs.
diff --git a/drivers/iommu/msm_iommu-v2.c b/drivers/iommu/msm_iommu-v2.c
index c7f6b82..f49d009 100644
--- a/drivers/iommu/msm_iommu-v2.c
+++ b/drivers/iommu/msm_iommu-v2.c
@@ -169,8 +169,10 @@
mb();
}
-static void __program_iommu(void __iomem *base, int smt_size)
+static void __program_iommu(void __iomem *base, int smt_size,
+ struct msm_iommu_bfb_settings *bfb_settings)
{
+ int i;
__reset_iommu(base, smt_size);
SET_CR0_SMCFCFG(base, 1);
@@ -181,6 +183,12 @@
SET_CR0_GFIE(base, 1);
SET_CR0_GFRE(base, 1);
SET_CR0_CLIENTPD(base, 0);
+
+ if (bfb_settings)
+ for (i = 0; i < bfb_settings->length; i++)
+ SET_GLOBAL_REG(base, bfb_settings->regs[i],
+ bfb_settings->data[i]);
+
mb(); /* Make sure writes complete before returning */
}
@@ -200,6 +208,17 @@
mb();
}
+static void __release_smg(void __iomem *base, int ctx, int smt_size)
+{
+ int i;
+
+ /* Invalidate any SMGs associated with this context */
+ for (i = 0; i < smt_size; i++)
+ if (GET_SMR_VALID(base, i) &&
+ GET_S2CR_CBNDX(base, i) == ctx)
+ SET_SMR_VALID(base, i, 0);
+}
+
static void __program_context(void __iomem *base, int ctx, int ncb,
phys_addr_t pgtable, int redirect,
u32 *sids, int len, int smt_size)
@@ -416,7 +435,8 @@
}
if (!msm_iommu_ctx_attached(dev->parent))
- __program_iommu(iommu_drvdata->base, iommu_drvdata->nsmr);
+ __program_iommu(iommu_drvdata->base, iommu_drvdata->nsmr,
+ iommu_drvdata->bfb_settings);
__program_context(iommu_drvdata->base, ctx_drvdata->num,
iommu_drvdata->ncb, __pa(priv->pt.fl_table),
@@ -458,6 +478,9 @@
GET_CB_CONTEXTIDR_ASID(iommu_drvdata->base, ctx_drvdata->num));
__reset_context(iommu_drvdata->base, ctx_drvdata->num);
+ __release_smg(iommu_drvdata->base, ctx_drvdata->num,
+ iommu_drvdata->nsmr);
+
__disable_clocks(iommu_drvdata);
regulator_disable(iommu_drvdata->gdsc);
diff --git a/drivers/iommu/msm_iommu_dev-v2.c b/drivers/iommu/msm_iommu_dev-v2.c
index 8c26f95..237d601 100644
--- a/drivers/iommu/msm_iommu_dev-v2.c
+++ b/drivers/iommu/msm_iommu_dev-v2.c
@@ -29,6 +29,66 @@
#include <mach/iommu_hw-v2.h>
#include <mach/iommu.h>
+static int msm_iommu_parse_bfb_settings(struct platform_device *pdev,
+ struct msm_iommu_drvdata *drvdata)
+{
+ struct msm_iommu_bfb_settings *bfb_settings;
+ u32 nreg, nval;
+ int ret, i;
+
+ /*
+ * It is not valid for a device to have the qcom,iommu-bfb-regs
+ * property but not the qcom,iommu-bfb-data property, and vice versa.
+ */
+ if (!of_get_property(pdev->dev.of_node, "qcom,iommu-bfb-regs", &nreg)) {
+ if (of_get_property(pdev->dev.of_node, "qcom,iommu-bfb-data",
+ &nval))
+ return -EINVAL;
+ return 0;
+ }
+
+ if (!of_get_property(pdev->dev.of_node, "qcom,iommu-bfb-data", &nval))
+ return -EINVAL;
+
+ if (nreg >= sizeof(bfb_settings->regs))
+ return -EINVAL;
+
+ if (nval >= sizeof(bfb_settings->data))
+ return -EINVAL;
+
+ if (nval != nreg)
+ return -EINVAL;
+
+ bfb_settings = devm_kzalloc(&pdev->dev, sizeof(*bfb_settings),
+ GFP_KERNEL);
+ if (!bfb_settings)
+ return -ENOMEM;
+
+ ret = of_property_read_u32_array(pdev->dev.of_node,
+ "qcom,iommu-bfb-regs",
+ bfb_settings->regs,
+ nreg / sizeof(*bfb_settings->regs));
+ if (ret)
+ return ret;
+
+ ret = of_property_read_u32_array(pdev->dev.of_node,
+ "qcom,iommu-bfb-data",
+ bfb_settings->data,
+ nval / sizeof(*bfb_settings->data));
+ if (ret)
+ return ret;
+
+ bfb_settings->length = nreg / sizeof(*bfb_settings->regs);
+
+ for (i = 0; i < bfb_settings->length; i++)
+ if (bfb_settings->regs[i] < IMPLDEF_OFFSET ||
+ bfb_settings->regs[i] >= IMPLDEF_OFFSET + IMPLDEF_LENGTH)
+ return -EINVAL;
+
+ drvdata->bfb_settings = bfb_settings;
+ return 0;
+}
+
static int msm_iommu_parse_dt(struct platform_device *pdev,
struct msm_iommu_drvdata *drvdata)
{
@@ -40,6 +100,10 @@
if (ret)
goto fail;
+ ret = msm_iommu_parse_bfb_settings(pdev, drvdata);
+ if (ret)
+ goto fail;
+
ret = of_property_read_u32(pdev->dev.of_node, "qcom,iommu-smt-size",
&nsmr);
if (ret)
diff --git a/drivers/leds/leds-qpnp.c b/drivers/leds/leds-qpnp.c
index f42fb5e..13493b8 100644
--- a/drivers/leds/leds-qpnp.c
+++ b/drivers/leds/leds-qpnp.c
@@ -17,6 +17,7 @@
#include <linux/slab.h>
#include <linux/leds.h>
#include <linux/err.h>
+#include <linux/spinlock.h>
#include <linux/of_platform.h>
#include <linux/of_device.h>
#include <linux/spmi.h>
@@ -163,7 +164,7 @@
int id;
u16 base;
u8 reg;
- struct mutex lock;
+ spinlock_t lock;
struct wled_config_data *wled_cfg;
int max_current;
bool default_on;
@@ -299,7 +300,7 @@
return;
}
- mutex_lock(&led->lock);
+ spin_lock(&led->lock);
led->cdev.brightness = value;
switch (led->id) {
@@ -313,7 +314,7 @@
dev_err(led->cdev.dev, "Invalid LED(%d)\n", led->id);
break;
}
- mutex_unlock(&led->lock);
+ spin_unlock(&led->lock);
}
static int __devinit qpnp_led_set_max_brightness(struct qpnp_led_data *led)
@@ -653,7 +654,7 @@
return -EINVAL;
}
- mutex_init(&led->lock);
+ spin_lock_init(&led->lock);
rc = qpnp_led_initialize(led);
if (rc < 0)
@@ -680,7 +681,6 @@
return 0;
fail_id_check:
- mutex_destroy(&led->lock);
led_classdev_unregister(&led->cdev);
return rc;
}
@@ -689,7 +689,6 @@
{
struct qpnp_led_data *led = dev_get_drvdata(&spmi->dev);
- mutex_destroy(&led->lock);
led_classdev_unregister(&led->cdev);
return 0;
diff --git a/drivers/media/dvb/dvb-core/demux.h b/drivers/media/dvb/dvb-core/demux.h
index 071d209..7190af8 100644
--- a/drivers/media/dvb/dvb-core/demux.h
+++ b/drivers/media/dvb/dvb-core/demux.h
@@ -109,6 +109,24 @@
};
};
+/*
+ * struct data_buffer: Parameters of buffer allocated by
+ * demux device for input/output. Can be used to directly map the
+ * demux-device buffer to HW output if HW supports it.
+ */
+struct data_buffer {
+ /* dvb_ringbuffer managed by demux-device */
+ const struct dvb_ringbuffer *ringbuff;
+
+
+ /*
+ * Private handle returned by kernel demux when
+ * map_buffer is called in case external buffer
+ * is used. NULL if buffer is allocated internally.
+ */
+ void *priv_handle;
+};
+
/*--------------------------------------------------------------------------*/
/* TS packet reception */
/*--------------------------------------------------------------------------*/
@@ -168,7 +186,7 @@
struct dmx_ts_feed {
int is_filtering; /* Set to non-zero when filtering in progress */
struct dmx_demux *parent; /* Back-pointer */
- const struct dvb_ringbuffer *buffer;
+ struct data_buffer buffer;
void *priv; /* Pointer to private data of the API client */
int (*set) (struct dmx_ts_feed *feed,
u16 pid,
@@ -198,7 +216,7 @@
u8 filter_mask [DMX_MAX_FILTER_SIZE];
u8 filter_mode [DMX_MAX_FILTER_SIZE];
struct dmx_section_feed* parent; /* Back-pointer */
- const struct dvb_ringbuffer *buffer;
+ struct data_buffer buffer;
void* priv; /* Pointer to private data of the API client */
};
@@ -316,6 +334,8 @@
u32 capabilities; /* Bitfield of capability flags */
struct dmx_frontend* frontend; /* Front-end connected to the demux */
void* priv; /* Pointer to private data of the API client */
+ struct data_buffer dvr_input; /* DVR input buffer */
+
int (*open) (struct dmx_demux* demux);
int (*close) (struct dmx_demux* demux);
int (*write) (struct dmx_demux *demux, const char *buf, size_t count);
@@ -359,6 +379,13 @@
int (*get_stc) (struct dmx_demux* demux, unsigned int num,
u64 *stc, unsigned int *base);
+
+ int (*map_buffer) (struct dmx_demux *demux,
+ struct dmx_buffer *dmx_buffer,
+ void **priv_handle, void **mem);
+
+ int (*unmap_buffer) (struct dmx_demux *demux,
+ void *priv_handle);
};
#endif /* #ifndef __DEMUX_H */
diff --git a/drivers/media/dvb/dvb-core/dmxdev.c b/drivers/media/dvb/dvb-core/dmxdev.c
index 8353f6f..d9f62ad 100644
--- a/drivers/media/dvb/dvb-core/dmxdev.c
+++ b/drivers/media/dvb/dvb-core/dmxdev.c
@@ -490,6 +490,8 @@
dvb_ringbuffer_init(&dmxdev->dvr_buffer, mem, DVR_BUFFER_SIZE);
dvb_dmxdev_flush_events(&dmxdev->dvr_output_events);
dmxdev->dvr_feeds_count = 0;
+ dmxdev->dvr_buffer_mode = DMX_BUFFER_MODE_INTERNAL;
+ dmxdev->dvr_priv_buff_handle = NULL;
dvbdev->readers--;
} else if (!dvbdev->writers) {
@@ -517,10 +519,14 @@
dmxdev->demux->disconnect_frontend(dmxdev->demux);
dmxdev->demux->connect_frontend(dmxdev->demux, front);
+ dmxdev->dvr_input_buffer_mode = DMX_BUFFER_MODE_INTERNAL;
dvb_ringbuffer_init(&dmxdev->dvr_input_buffer,
mem,
DVR_BUFFER_SIZE);
+
+ dmxdev->demux->dvr_input.priv_handle = NULL;
+ dmxdev->demux->dvr_input.ringbuff = &dmxdev->dvr_input_buffer;
dvbdev->writers--;
}
@@ -545,7 +551,16 @@
dmxdev->dvr_buffer.data = NULL;
spin_unlock_irq(&dmxdev->lock);
wake_up_all(&dmxdev->dvr_buffer.queue);
- vfree(mem);
+
+ if (dmxdev->dvr_buffer_mode == DMX_BUFFER_MODE_INTERNAL)
+ vfree(mem);
+ }
+
+ if ((dmxdev->dvr_buffer_mode == DMX_BUFFER_MODE_EXTERNAL) &&
+ dmxdev->dvr_priv_buff_handle) {
+ dmxdev->demux->unmap_buffer(dmxdev->demux,
+ dmxdev->dvr_priv_buff_handle);
+ dmxdev->dvr_priv_buff_handle = NULL;
}
} else {
int i;
@@ -589,7 +604,17 @@
spin_lock_irq(&dmxdev->dvr_in_lock);
dmxdev->dvr_input_buffer.data = NULL;
spin_unlock_irq(&dmxdev->dvr_in_lock);
- vfree(mem);
+
+ if (dmxdev->dvr_buffer_mode == DMX_BUFFER_MODE_INTERNAL)
+ vfree(mem);
+ }
+
+ if ((dmxdev->dvr_input_buffer_mode ==
+ DMX_BUFFER_MODE_EXTERNAL) &&
+ (dmxdev->demux->dvr_input.priv_handle)) {
+ dmxdev->demux->unmap_buffer(dmxdev->demux,
+ dmxdev->demux->dvr_input.priv_handle);
+ dmxdev->demux->dvr_input.priv_handle = NULL;
}
}
/* TODO */
@@ -611,6 +636,7 @@
struct dvb_device *dvbdev = filp->private_data;
struct dmxdev *dmxdev = dvbdev->priv;
struct dvb_ringbuffer *buffer;
+ enum dmx_buffer_mode buffer_mode;
int vma_size;
int buffer_size;
int ret;
@@ -627,10 +653,18 @@
return -ENODEV;
}
- if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
+ if ((filp->f_flags & O_ACCMODE) == O_RDONLY) {
buffer = &dmxdev->dvr_buffer;
- else
+ buffer_mode = dmxdev->dvr_buffer_mode;
+ } else {
buffer = &dmxdev->dvr_input_buffer;
+ buffer_mode = dmxdev->dvr_input_buffer_mode;
+ }
+
+ if (buffer_mode == DMX_BUFFER_MODE_EXTERNAL) {
+ mutex_unlock(&dmxdev->mutex);
+ return -EINVAL;
+ }
vma_size = vma->vm_end - vma->vm_start;
@@ -669,7 +703,8 @@
if (!dmxdev->demux->write)
return -EOPNOTSUPP;
- if ((file->f_flags & O_ACCMODE) == O_RDONLY)
+ if (((file->f_flags & O_ACCMODE) == O_RDONLY) ||
+ (!src->data))
return -EINVAL;
if ((file->f_flags & O_NONBLOCK) &&
@@ -859,20 +894,23 @@
void *newmem;
void *oldmem;
spinlock_t *lock;
+ enum dmx_buffer_mode buffer_mode;
dprintk("function : %s\n", __func__);
if ((f_flags & O_ACCMODE) == O_RDONLY) {
buf = &dmxdev->dvr_buffer;
lock = &dmxdev->lock;
+ buffer_mode = dmxdev->dvr_buffer_mode;
} else {
buf = &dmxdev->dvr_input_buffer;
lock = &dmxdev->dvr_in_lock;
+ buffer_mode = dmxdev->dvr_input_buffer_mode;
}
if (buf->size == size)
return 0;
- if (!size)
+ if ((!size) || (buffer_mode == DMX_BUFFER_MODE_EXTERNAL))
return -EINVAL;
newmem = vmalloc_user(size);
@@ -903,6 +941,72 @@
return 0;
}
+static int dvb_dvr_set_buffer_mode(struct dmxdev *dmxdev,
+ unsigned int f_flags, enum dmx_buffer_mode mode)
+{
+ if ((mode != DMX_BUFFER_MODE_INTERNAL) &&
+ (mode != DMX_BUFFER_MODE_EXTERNAL))
+ return -EINVAL;
+
+ if ((mode == DMX_BUFFER_MODE_INTERNAL) &&
+ (dmxdev->capabilities & DMXDEV_CAP_EXTERNAL_BUFFS_ONLY))
+ return -EINVAL;
+
+ if ((mode == DMX_BUFFER_MODE_EXTERNAL) &&
+ (!dmxdev->demux->map_buffer || !dmxdev->demux->unmap_buffer))
+ return -EINVAL;
+
+ if ((f_flags & O_ACCMODE) == O_RDONLY)
+ dmxdev->dvr_buffer_mode = mode;
+ else
+ dmxdev->dvr_input_buffer_mode = mode;
+
+ return 0;
+}
+
+static int dvb_dvr_set_buffer(struct dmxdev *dmxdev,
+ unsigned int f_flags, struct dmx_buffer *dmx_buffer)
+{
+ struct dvb_ringbuffer *buf;
+ spinlock_t *lock;
+ enum dmx_buffer_mode buffer_mode;
+ void **buff_handle;
+ void *newmem;
+ void *oldmem;
+
+ if ((f_flags & O_ACCMODE) == O_RDONLY) {
+ buf = &dmxdev->dvr_buffer;
+ lock = &dmxdev->lock;
+ buffer_mode = dmxdev->dvr_buffer_mode;
+ buff_handle = &dmxdev->dvr_priv_buff_handle;
+ } else {
+ buf = &dmxdev->dvr_input_buffer;
+ lock = &dmxdev->dvr_in_lock;
+ buffer_mode = dmxdev->dvr_input_buffer_mode;
+ buff_handle = &dmxdev->demux->dvr_input.priv_handle;
+ }
+
+ if ((!dmx_buffer->size) ||
+ (buffer_mode == DMX_BUFFER_MODE_INTERNAL))
+ return -EINVAL;
+
+ oldmem = *buff_handle;
+ if (dmxdev->demux->map_buffer(dmxdev->demux, dmx_buffer,
+ buff_handle, &newmem))
+ return -ENOMEM;
+
+ spin_lock_irq(lock);
+ buf->data = newmem;
+ buf->size = dmx_buffer->size;
+ dvb_ringbuffer_reset(buf);
+ spin_unlock_irq(lock);
+
+ if (oldmem)
+ dmxdev->demux->unmap_buffer(dmxdev->demux, oldmem);
+
+ return 0;
+}
+
static int dvb_dvr_get_event(struct dmxdev *dmxdev,
unsigned int f_flags,
struct dmx_filter_event *event)
@@ -1058,7 +1162,7 @@
if (buf->size == size)
return 0;
- if (!size)
+ if ((!size) || (dmxdevfilter->buffer_mode == DMX_BUFFER_MODE_EXTERNAL))
return -EINVAL;
if (dmxdevfilter->state >= DMXDEV_STATE_GO)
return -EBUSY;
@@ -1081,6 +1185,85 @@
return 0;
}
+static int dvb_dmxdev_set_buffer_mode(struct dmxdev_filter *dmxdevfilter,
+ enum dmx_buffer_mode mode)
+{
+ struct dvb_ringbuffer *buf = &dmxdevfilter->buffer;
+ struct dmxdev *dmxdev = dmxdevfilter->dev;
+ void *oldmem;
+
+ if (dmxdevfilter->state >= DMXDEV_STATE_GO)
+ return -EBUSY;
+
+ if ((mode != DMX_BUFFER_MODE_INTERNAL) &&
+ (mode != DMX_BUFFER_MODE_EXTERNAL))
+ return -EINVAL;
+
+ if ((mode == DMX_BUFFER_MODE_INTERNAL) &&
+ (dmxdev->capabilities & DMXDEV_CAP_EXTERNAL_BUFFS_ONLY))
+ return -EINVAL;
+
+ if ((mode == DMX_BUFFER_MODE_EXTERNAL) &&
+ (!dmxdev->demux->map_buffer || !dmxdev->demux->unmap_buffer))
+ return -EINVAL;
+
+ if (mode == dmxdevfilter->buffer_mode)
+ return 0;
+
+ oldmem = buf->data;
+ spin_lock_irq(&dmxdevfilter->dev->lock);
+ buf->data = NULL;
+ spin_unlock_irq(&dmxdevfilter->dev->lock);
+
+ dmxdevfilter->buffer_mode = mode;
+
+ if (mode == DMX_BUFFER_MODE_INTERNAL) {
+ /* switched from external to internal */
+ if (dmxdevfilter->priv_buff_handle) {
+ dmxdev->demux->unmap_buffer(dmxdev->demux,
+ dmxdevfilter->priv_buff_handle);
+ dmxdevfilter->priv_buff_handle = NULL;
+ }
+ } else if (oldmem) {
+ /* switched from internal to external */
+ vfree(oldmem);
+ }
+
+ return 0;
+}
+
+static int dvb_dmxdev_set_buffer(struct dmxdev_filter *dmxdevfilter,
+ struct dmx_buffer *buffer)
+{
+ struct dvb_ringbuffer *buf = &dmxdevfilter->buffer;
+ struct dmxdev *dmxdev = dmxdevfilter->dev;
+ void *newmem;
+ void *oldmem;
+
+ if (dmxdevfilter->state >= DMXDEV_STATE_GO)
+ return -EBUSY;
+
+ if ((!buffer->size) ||
+ (dmxdevfilter->buffer_mode == DMX_BUFFER_MODE_INTERNAL))
+ return -EINVAL;
+
+ oldmem = dmxdevfilter->priv_buff_handle;
+ if (dmxdev->demux->map_buffer(dmxdev->demux, buffer,
+ &dmxdevfilter->priv_buff_handle, &newmem))
+ return -ENOMEM;
+
+ spin_lock_irq(&dmxdevfilter->dev->lock);
+ buf->data = newmem;
+ buf->size = buffer->size;
+ dvb_ringbuffer_reset(buf);
+ spin_unlock_irq(&dmxdevfilter->dev->lock);
+
+ if (oldmem)
+ dmxdev->demux->unmap_buffer(dmxdev->demux, oldmem);
+
+ return 0;
+}
+
static int dvb_dmxdev_set_pes_buffer_size(struct dmxdev_filter *dmxdevfilter,
unsigned long size)
{
@@ -1962,12 +2145,14 @@
tsfeed->priv = filter;
if (filter->params.pes.output == DMX_OUT_TS_TAP) {
- tsfeed->buffer = &dmxdev->dvr_buffer;
+ tsfeed->buffer.ringbuff = &dmxdev->dvr_buffer;
+ tsfeed->buffer.priv_handle = dmxdev->dvr_priv_buff_handle;
if (!dmxdev->dvr_feeds_count)
dmxdev->dvr_feed = filter;
dmxdev->dvr_feeds_count++;
} else {
- tsfeed->buffer = &filter->buffer;
+ tsfeed->buffer.ringbuff = &filter->buffer;
+ tsfeed->buffer.priv_handle = filter->priv_buff_handle;
}
if (tsfeed->data_ready_cb) {
@@ -2028,6 +2213,9 @@
dvb_dmxdev_filter_stop(filter);
if (!filter->buffer.data) {
+ if ((filter->buffer_mode == DMX_BUFFER_MODE_EXTERNAL) ||
+ (dmxdev->capabilities & DMXDEV_CAP_EXTERNAL_BUFFS_ONLY))
+ return -ENOMEM;
mem = vmalloc_user(filter->buffer.size);
if (!mem)
return -ENOMEM;
@@ -2105,7 +2293,8 @@
}
(*secfilter)->priv = filter;
- (*secfilter)->buffer = &filter->buffer;
+ (*secfilter)->buffer.ringbuff = &filter->buffer;
+ (*secfilter)->buffer.priv_handle = filter->priv_buff_handle;
memcpy(&((*secfilter)->filter_value[3]),
&(para->filter.filter[1]), DMX_FILTER_SIZE - 1);
@@ -2182,6 +2371,8 @@
mutex_init(&dmxdevfilter->mutex);
file->private_data = dmxdevfilter;
+ dmxdevfilter->buffer_mode = DMX_BUFFER_MODE_INTERNAL;
+ dmxdevfilter->priv_buff_handle = NULL;
dvb_ringbuffer_init(&dmxdevfilter->buffer, NULL, 8192);
dvb_dmxdev_flush_events(&dmxdevfilter->events);
@@ -2212,7 +2403,15 @@
spin_lock_irq(&dmxdev->lock);
dmxdevfilter->buffer.data = NULL;
spin_unlock_irq(&dmxdev->lock);
- vfree(mem);
+ if (dmxdevfilter->buffer_mode == DMX_BUFFER_MODE_INTERNAL)
+ vfree(mem);
+ }
+
+ if ((dmxdevfilter->buffer_mode == DMX_BUFFER_MODE_EXTERNAL) &&
+ (dmxdevfilter->priv_buff_handle)) {
+ dmxdev->demux->unmap_buffer(dmxdev->demux,
+ dmxdevfilter->priv_buff_handle);
+ dmxdevfilter->priv_buff_handle = NULL;
}
dvb_dmxdev_filter_state_set(dmxdevfilter, DMXDEV_STATE_FREE);
@@ -2487,6 +2686,25 @@
mutex_unlock(&dmxdevfilter->mutex);
break;
+ case DMX_SET_BUFFER_MODE:
+ if (mutex_lock_interruptible(&dmxdevfilter->mutex)) {
+ mutex_unlock(&dmxdev->mutex);
+ return -ERESTARTSYS;
+ }
+ ret = dvb_dmxdev_set_buffer_mode(dmxdevfilter,
+ *(enum dmx_buffer_mode *)parg);
+ mutex_unlock(&dmxdevfilter->mutex);
+ break;
+
+ case DMX_SET_BUFFER:
+ if (mutex_lock_interruptible(&dmxdevfilter->mutex)) {
+ mutex_unlock(&dmxdev->mutex);
+ return -ERESTARTSYS;
+ }
+ ret = dvb_dmxdev_set_buffer(dmxdevfilter, parg);
+ mutex_unlock(&dmxdevfilter->mutex);
+ break;
+
case DMX_GET_BUFFER_STATUS:
if (mutex_lock_interruptible(&dmxdevfilter->mutex)) {
mutex_unlock(&dmxdev->mutex);
@@ -2679,7 +2897,8 @@
return -ERESTARTSYS;
}
- if (!dmxdevfilter->buffer.data) {
+ if ((!dmxdevfilter->buffer.data) ||
+ (dmxdevfilter->buffer_mode == DMX_BUFFER_MODE_EXTERNAL)) {
mutex_unlock(&dmxdevfilter->mutex);
mutex_unlock(&dmxdev->mutex);
return -EINVAL;
@@ -2767,6 +2986,15 @@
ret = dvb_dvr_set_buffer_size(dmxdev, file->f_flags, arg);
break;
+ case DMX_SET_BUFFER_MODE:
+ ret = dvb_dvr_set_buffer_mode(dmxdev, file->f_flags,
+ *(enum dmx_buffer_mode *)parg);
+ break;
+
+ case DMX_SET_BUFFER:
+ ret = dvb_dvr_set_buffer(dmxdev, file->f_flags, parg);
+ break;
+
case DMX_GET_BUFFER_STATUS:
ret = dvb_dvr_get_buffer_status(dmxdev, file->f_flags, parg);
break;
diff --git a/drivers/media/dvb/dvb-core/dmxdev.h b/drivers/media/dvb/dvb-core/dmxdev.h
index 9fd900e..e30c2c3 100644
--- a/drivers/media/dvb/dvb-core/dmxdev.h
+++ b/drivers/media/dvb/dvb-core/dmxdev.h
@@ -113,6 +113,8 @@
enum dmxdev_state state;
struct dmxdev *dev;
struct dvb_ringbuffer buffer;
+ void *priv_buff_handle;
+ enum dmx_buffer_mode buffer_mode;
u32 flush_data_len;
struct mutex mutex;
@@ -139,9 +141,10 @@
int filternum;
int capabilities;
-#define DMXDEV_CAP_DUPLEX 0x1
-#define DMXDEV_CAP_PULL_MODE 0x2
-#define DMXDEV_CAP_INDEXING 0x4
+#define DMXDEV_CAP_DUPLEX 0x01
+#define DMXDEV_CAP_PULL_MODE 0x02
+#define DMXDEV_CAP_INDEXING 0x04
+#define DMXDEV_CAP_EXTERNAL_BUFFS_ONLY 0x08
enum dmx_playback_mode_t playback_mode;
dmx_source_t source;
@@ -153,12 +156,15 @@
struct dmx_frontend *dvr_orig_fe;
struct dvb_ringbuffer dvr_buffer;
+ void *dvr_priv_buff_handle;
+ enum dmx_buffer_mode dvr_buffer_mode;
struct dmxdev_events_queue dvr_output_events;
struct dmxdev_filter *dvr_feed;
u32 dvr_flush_data_len;
int dvr_feeds_count;
struct dvb_ringbuffer dvr_input_buffer;
+ enum dmx_buffer_mode dvr_input_buffer_mode;
struct workqueue_struct *dvr_input_workqueue;
#define DVR_BUFFER_SIZE (10*188*1024)
diff --git a/drivers/media/dvb/dvb-core/dvb_demux.c b/drivers/media/dvb/dvb-core/dvb_demux.c
index df71f76..de7b28d 100644
--- a/drivers/media/dvb/dvb-core/dvb_demux.c
+++ b/drivers/media/dvb/dvb-core/dvb_demux.c
@@ -1794,6 +1794,8 @@
dmx->release_ts_feed = dvbdmx_release_ts_feed;
dmx->allocate_section_feed = dvbdmx_allocate_section_feed;
dmx->release_section_feed = dvbdmx_release_section_feed;
+ dmx->map_buffer = NULL;
+ dmx->unmap_buffer = NULL;
dmx->add_frontend = dvbdmx_add_frontend;
dmx->remove_frontend = dvbdmx_remove_frontend;
diff --git a/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_common.c b/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_common.c
index a01cf5b..18c3767 100644
--- a/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_common.c
+++ b/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_common.c
@@ -595,7 +595,7 @@
* for decoder's buffers.
*/
mpq_dmx_info.ion_client =
- msm_ion_client_create(UINT_MAX, "demux client");
+ msm_ion_client_create(UINT_MAX, "demux_client");
if (IS_ERR_OR_NULL(mpq_dmx_info.ion_client)) {
MPQ_DVB_ERR_PRINT(
@@ -603,6 +603,8 @@
__func__);
result = PTR_ERR(mpq_dmx_info.ion_client);
+ if (!result)
+ result = -ENOMEM;
mpq_dmx_info.ion_client = NULL;
goto init_failed_free_demux_devices;
}
@@ -683,7 +685,7 @@
if (mpq_dmx_info.devices != NULL) {
for (i = 0; i < mpq_demux_device_num; i++) {
- mpq_demux = mpq_dmx_info.devices+i;
+ mpq_demux = mpq_dmx_info.devices + i;
if (mpq_demux->is_initialized) {
mpq_demux->demux.dmx.remove_frontend(
@@ -764,6 +766,107 @@
}
EXPORT_SYMBOL(mpq_dmx_set_source);
+int mpq_dmx_map_buffer(struct dmx_demux *demux, struct dmx_buffer *dmx_buffer,
+ void **priv_handle, void **kernel_mem)
+{
+ struct dvb_demux *dvb_demux = demux->priv;
+ struct mpq_demux *mpq_demux;
+ struct ion_handle *ion_handle;
+ unsigned long ionflag = 0;
+ int ret;
+
+ if ((mpq_dmx_info.devices == NULL) || (dvb_demux == NULL) ||
+ (priv_handle == NULL) || (kernel_mem == NULL)) {
+ MPQ_DVB_ERR_PRINT("%s: invalid parameters\n", __func__);
+ return -EINVAL;
+ }
+
+ mpq_demux = dvb_demux->priv;
+ if (mpq_demux == NULL) {
+ MPQ_DVB_ERR_PRINT("%s: invalid parameters\n", __func__);
+ return -EINVAL;
+ }
+
+ ion_handle = ion_import_dma_buf(mpq_demux->ion_client,
+ dmx_buffer->handle);
+ if (IS_ERR_OR_NULL(ion_handle)) {
+ ret = PTR_ERR(ion_handle);
+ if (!ret)
+ ret = -ENOMEM;
+
+ MPQ_DVB_ERR_PRINT("%s: ion_import_dma_buf failed %d\n",
+ __func__, ret);
+ goto map_buffer_failed;
+ }
+
+ ret = ion_handle_get_flags(mpq_demux->ion_client, ion_handle, &ionflag);
+ if (ret) {
+ MPQ_DVB_ERR_PRINT("%s: ion_handle_get_flags failed %d\n",
+ __func__, ret);
+ goto map_buffer_failed_free_buff;
+ }
+
+ if (ionflag & ION_SECURE) {
+ MPQ_DVB_DBG_PRINT("%s: secured buffer\n", __func__);
+ /* TBD: Set buffer as secured */
+ *kernel_mem = NULL;
+ } else {
+ *kernel_mem = ion_map_kernel(mpq_demux->ion_client,
+ ion_handle);
+ if (*kernel_mem == NULL) {
+ MPQ_DVB_ERR_PRINT("%s: ion_map_kernel failed\n",
+ __func__);
+ ret = -ENOMEM;
+ goto map_buffer_failed_free_buff;
+ }
+ }
+
+ *priv_handle = (void *)ion_handle;
+ return 0;
+
+map_buffer_failed_free_buff:
+ ion_free(mpq_demux->ion_client, ion_handle);
+map_buffer_failed:
+ return ret;
+}
+EXPORT_SYMBOL(mpq_dmx_map_buffer);
+
+int mpq_dmx_unmap_buffer(struct dmx_demux *demux,
+ void *priv_handle)
+{
+ struct dvb_demux *dvb_demux = demux->priv;
+ struct ion_handle *ion_handle = priv_handle;
+ struct mpq_demux *mpq_demux;
+ unsigned long ionflag = 0;
+ int ret;
+
+ if ((mpq_dmx_info.devices == NULL) || (dvb_demux == NULL) ||
+ (priv_handle == NULL)) {
+ MPQ_DVB_ERR_PRINT("%s: invalid parameters\n", __func__);
+ return -EINVAL;
+ }
+
+ mpq_demux = dvb_demux->priv;
+ if (mpq_demux == NULL) {
+ MPQ_DVB_ERR_PRINT("%s: invalid parameters\n", __func__);
+ return -EINVAL;
+ }
+
+ ret = ion_handle_get_flags(mpq_demux->ion_client, ion_handle, &ionflag);
+ if (ret) {
+ MPQ_DVB_ERR_PRINT("%s: ion_handle_get_flags failed %d\n",
+ __func__, ret);
+ return -EINVAL;
+ }
+
+ if (!(ionflag & ION_SECURE))
+ ion_unmap_kernel(mpq_demux->ion_client, ion_handle);
+
+ ion_free(mpq_demux->ion_client, ion_handle);
+
+ return 0;
+}
+EXPORT_SYMBOL(mpq_dmx_unmap_buffer);
int mpq_dmx_init_video_feed(struct dvb_demux_feed *feed)
{
@@ -829,32 +932,34 @@
ion_alloc(mpq_demux->ion_client,
actual_buffer_size,
SZ_4K,
- (ION_HEAP(ION_CP_MM_HEAP_ID) | CACHED));
+ ION_HEAP(ION_CP_MM_HEAP_ID),
+ ION_FLAG_CACHED);
if (IS_ERR_OR_NULL(feed_data->payload_buff_handle)) {
ret = PTR_ERR(feed_data->payload_buff_handle);
MPQ_DVB_ERR_PRINT(
"%s: FAILED to allocate payload buffer %d\n",
- __func__,
- ret);
+ __func__, ret);
+ if (!ret)
+ ret = -ENOMEM;
goto init_failed_free_packet_buffer;
}
payload_buffer =
ion_map_kernel(mpq_demux->ion_client,
- feed_data->payload_buff_handle,
- 0);
+ feed_data->payload_buff_handle);
if (IS_ERR_OR_NULL(payload_buffer)) {
ret = PTR_ERR(payload_buffer);
MPQ_DVB_ERR_PRINT(
"%s: FAILED to map payload buffer %d\n",
- __func__,
- ret);
+ __func__, ret);
+ if (!ret)
+ ret = -ENOMEM;
goto init_failed_free_payload_buffer;
}
@@ -922,8 +1027,7 @@
MPQ_DVB_ERR_PRINT(
"%s: mpq_adapter_register_stream_if failed, "
"err = %d\n",
- __func__,
- ret);
+ __func__, ret);
goto init_failed_unmap_payload_buffer;
}
@@ -991,8 +1095,7 @@
wake_up_all(&feed_data->video_buffer->raw_data.queue);
- mpq_adapter_unregister_stream_if(
- feed_data->stream_interface);
+ mpq_adapter_unregister_stream_if(feed_data->stream_interface);
vfree(feed_data->video_buffer->packet_data.data);
diff --git a/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_common.h b/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_common.h
index 893273d..3500eda 100644
--- a/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_common.h
+++ b/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_common.h
@@ -332,7 +332,7 @@
* them to the dvb adapter.
*
* @dmx_init_func: Pointer to the function to be used
- * to initialize demux of the udnerlying HW plugin.
+ * to initialize demux of the underlying HW plugin.
*
* Return error code
*
@@ -361,6 +361,38 @@
int mpq_dmx_set_source(struct dmx_demux *demux, const dmx_source_t *src);
/**
+ * mpq_dmx_map_buffer - map user-space buffer into kernel space.
+ *
+ * @demux: The demux device.
+ * @dmx_buffer: The demux buffer from user-space, assumes that
+ * buffer handle is ION file-handle.
+ * @priv_handle: Saves ION-handle of the buffer imported by this function.
+ * @kernel_mem: Saves kernel mapped address of the buffer.
+ *
+ * Return error code
+ *
+ * The function maps the buffer into kernel memory only if the buffer
+ * was not allocated with secure flag, otherwise the returned kernel
+ * memory address is set to NULL.
+ */
+int mpq_dmx_map_buffer(struct dmx_demux *demux, struct dmx_buffer *dmx_buffer,
+ void **priv_handle, void **kernel_mem);
+
+/**
+ * mpq_dmx_unmap_buffer - unmap user-space buffer from kernel space memory.
+ *
+ * @demux: The demux device.
+ * @priv_handle: ION-handle of the buffer returned from mpq_dmx_map_buffer.
+ *
+ * Return error code
+ *
+ * The function unmaps the buffer from kernel memory only if the buffer
+ * was not allocated with secure flag.
+ */
+int mpq_dmx_unmap_buffer(struct dmx_demux *demux,
+ void *priv_handle);
+
+/**
* mpq_dmx_init_video_feed - Initializes video feed
* used to pass data to decoder directly.
*
@@ -396,8 +428,7 @@
*
* Return error code.
*/
-int mpq_dmx_decoder_fullness_init(
- struct dvb_demux_feed *feed);
+int mpq_dmx_decoder_fullness_init(struct dvb_demux_feed *feed);
/**
* mpq_dmx_decoder_fullness_wait - Checks whether decoder buffer
@@ -408,8 +439,7 @@
*
* Return error code.
*/
-int mpq_dmx_decoder_fullness_wait(
- struct dvb_demux_feed *feed,
+int mpq_dmx_decoder_fullness_wait(struct dvb_demux_feed *feed,
size_t required_space);
/**
@@ -422,8 +452,7 @@
*
* Return error code.
*/
-int mpq_dmx_decoder_fullness_abort(
- struct dvb_demux_feed *feed);
+int mpq_dmx_decoder_fullness_abort(struct dvb_demux_feed *feed);
/**
* mpq_dmx_decoder_buffer_status - Returns the
@@ -452,9 +481,7 @@
* the packet and does not write them to the output buffer.
* Scrambled packets are bypassed.
*/
-int mpq_dmx_process_video_packet(
- struct dvb_demux_feed *feed,
- const u8 *buf);
+int mpq_dmx_process_video_packet(struct dvb_demux_feed *feed, const u8 *buf);
/**
* mpq_dmx_process_pcr_packet - Extract PCR/STC pairs from
@@ -475,9 +502,7 @@
* The function callbacks dmxdev after extraction of the pcr/stc
* pair.
*/
-int mpq_dmx_process_pcr_packet(
- struct dvb_demux_feed *feed,
- const u8 *buf);
+int mpq_dmx_process_pcr_packet(struct dvb_demux_feed *feed, const u8 *buf);
/**
* mpq_dmx_is_video_feed - Returns whether the PES feed
diff --git a/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_tsif.c b/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_tsif.c
index 74a0dbe..627c5a2 100644
--- a/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_tsif.c
+++ b/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_tsif.c
@@ -579,6 +579,24 @@
caps->max_bitrate = 144;
caps->demod_input_max_bitrate = 72;
caps->memory_input_max_bitrate = 72;
+ caps->section.flags = 0;
+ caps->section.max_size = 0xFFFFFFFF;
+ caps->section.size_alignment = 0;
+ caps->pes.flags = 0;
+ caps->pes.max_size = 0xFFFFFFFF;
+ caps->pes.size_alignment = 0;
+ caps->recording_188_tsp.flags = 0;
+ caps->recording_188_tsp.max_size = 0xFFFFFFFF;
+ caps->recording_188_tsp.size_alignment = 0;
+ caps->recording_192_tsp.flags = 0;
+ caps->recording_192_tsp.max_size = 0xFFFFFFFF;
+ caps->recording_192_tsp.size_alignment = 0;
+ caps->playback_188_tsp.flags = 0;
+ caps->playback_188_tsp.max_size = 0xFFFFFFFF;
+ caps->playback_188_tsp.size_alignment = 0;
+ caps->playback_192_tsp.flags = 0;
+ caps->playback_192_tsp.max_size = 0xFFFFFFFF;
+ caps->playback_192_tsp.size_alignment = 0;
return 0;
}
@@ -645,6 +663,8 @@
mpq_demux->dmxdev.demux->set_source = mpq_dmx_set_source;
mpq_demux->dmxdev.demux->get_caps = mpq_tsif_dmx_get_caps;
+ mpq_demux->dmxdev.demux->map_buffer = mpq_dmx_map_buffer;
+ mpq_demux->dmxdev.demux->unmap_buffer = mpq_dmx_unmap_buffer;
result = dvb_dmxdev_init(&mpq_demux->dmxdev, mpq_adapter);
if (result < 0) {
diff --git a/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_tspp_v1.c b/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_tspp_v1.c
index c1d1462..e4f00c0 100644
--- a/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_tspp_v1.c
+++ b/drivers/media/dvb/mpq/demux/mpq_dmx_plugin_tspp_v1.c
@@ -708,6 +708,24 @@
caps->max_bitrate = 144;
caps->demod_input_max_bitrate = 72;
caps->memory_input_max_bitrate = 72;
+ caps->section.flags = 0;
+ caps->section.max_size = 0xFFFFFFFF;
+ caps->section.size_alignment = 0;
+ caps->pes.flags = 0;
+ caps->pes.max_size = 0xFFFFFFFF;
+ caps->pes.size_alignment = 0;
+ caps->recording_188_tsp.flags = 0;
+ caps->recording_188_tsp.max_size = 0xFFFFFFFF;
+ caps->recording_188_tsp.size_alignment = 0;
+ caps->recording_192_tsp.flags = 0;
+ caps->recording_192_tsp.max_size = 0xFFFFFFFF;
+ caps->recording_192_tsp.size_alignment = 0;
+ caps->playback_188_tsp.flags = 0;
+ caps->playback_188_tsp.max_size = 0xFFFFFFFF;
+ caps->playback_188_tsp.size_alignment = 0;
+ caps->playback_192_tsp.flags = 0;
+ caps->playback_192_tsp.max_size = 0xFFFFFFFF;
+ caps->playback_192_tsp.size_alignment = 0;
return 0;
}
@@ -766,6 +784,8 @@
mpq_demux->dmxdev.demux->set_source = mpq_dmx_set_source;
mpq_demux->dmxdev.demux->get_caps = mpq_tspp_dmx_get_caps;
+ mpq_demux->dmxdev.demux->map_buffer = mpq_dmx_map_buffer;
+ mpq_demux->dmxdev.demux->unmap_buffer = mpq_dmx_unmap_buffer;
result = dvb_dmxdev_init(&mpq_demux->dmxdev, mpq_adapter);
if (result < 0) {
diff --git a/drivers/media/dvb/mpq/video/mpq_dvb_video.c b/drivers/media/dvb/mpq/video/mpq_dvb_video.c
index 68653ba..bd8c4a4 100644
--- a/drivers/media/dvb/mpq/video/mpq_dvb_video.c
+++ b/drivers/media/dvb/mpq/video/mpq_dvb_video.c
@@ -55,6 +55,8 @@
static int mpq_int_vid_dec_decode_frame(struct video_client_ctx *client_ctx,
struct video_data_buffer *input_frame);
+static int mpq_int_vid_dec_get_buffer_req(struct video_client_ctx *client_ctx,
+ struct video_buffer_req *vdec_buf_req);
static struct mpq_dvb_video_dev *mpq_dvb_video_device;
@@ -570,7 +572,7 @@
ion_flag = vidc_get_fd_info(client_ctx, BUFFER_TYPE_OUTPUT,
pmem_fd, kernel_vaddr, buffer_index,
&buff_handle);
- if (ion_flag == CACHED && buff_handle) {
+ if (ion_flag == ION_FLAG_CACHED && buff_handle) {
msm_ion_do_cache_op(
client_ctx->user_ion_client,
buff_handle,
@@ -819,11 +821,32 @@
return 0;
}
+static int mpq_int_set_out_buffer_req(struct video_client_ctx *client_ctx,
+ struct video_buffer_req *vdec_buf_req)
+{
+ struct vcd_buffer_requirement buffer_req;
+ u32 vcd_status = VCD_ERR_FAIL;
+
+ buffer_req.actual_count = vdec_buf_req->num_output_buffers;
+ buffer_req.align = vdec_buf_req->output_buf_prop.alignment;
+ buffer_req.max_count = vdec_buf_req->num_output_buffers;
+ buffer_req.min_count = vdec_buf_req->num_output_buffers;
+ buffer_req.sz = vdec_buf_req->output_buf_prop.buf_size;
+
+ vcd_status = vcd_set_buffer_requirements(client_ctx->vcd_handle,
+ VCD_BUFFER_OUTPUT, &buffer_req);
+ if (vcd_status)
+ return -EFAULT;
+ else
+ return 0;
+}
+
static int mpq_int_set_full_hd_frame_resolution(
struct video_client_ctx *client_ctx)
{
struct vdec_picsize pic_res;
int rc;
+ struct video_buffer_req vdec_buf_req;
pic_res.frame_height = 1080;
pic_res.frame_width = 1920;
@@ -841,6 +864,15 @@
DBG("Failed in mpq_int_vid_dec_set_cont_on_reconfig : %d\n",\
rc);
+ rc = mpq_int_vid_dec_get_buffer_req(client_ctx, &vdec_buf_req);
+ if (rc)
+ DBG("Failed in mpq_int_vid_dec_get_buffer_req : %d\n", rc);
+
+ vdec_buf_req.num_output_buffers = 12;
+ rc = mpq_int_set_out_buffer_req(client_ctx, &vdec_buf_req);
+ if (rc)
+ DBG("Failed in mpq_int_set_out_buffer_req (15) : %d\n", rc);
+
return rc;
}
@@ -1101,8 +1133,7 @@
}
vcd_h264_mv_buffer->kernel_virtual_addr =
(u8 *) ion_map_kernel(client_ctx->user_ion_client,
- client_ctx->h264_mv_ion_handle,
- ionflag);
+ client_ctx->h264_mv_ion_handle);
if (!vcd_h264_mv_buffer->kernel_virtual_addr) {
DBG("%s(): get_ION_kernel virtual addr failed\n",
__func__);
@@ -1114,7 +1145,7 @@
VIDEO_DOMAIN, VIDEO_MAIN_POOL,
SZ_4K, 0, (unsigned long *)&iova,
(unsigned long *)&buffer_size,
- UNCACHED, 0);
+ 0, 0);
if (rc) {
DBG("%s():get_ION_kernel physical addr fail\n",
__func__);
@@ -1471,7 +1502,7 @@
kernel_vaddr,
buffer_index,
&buff_handle);
- if (ion_flag == CACHED && buff_handle) {
+ if (ion_flag == ION_FLAG_CACHED && buff_handle) {
msm_ion_do_cache_op(
client_ctx->user_ion_client,
buff_handle,
diff --git a/drivers/media/radio/radio-tavarua.c b/drivers/media/radio/radio-tavarua.c
index af4c2c9..eb16f2d 100644
--- a/drivers/media/radio/radio-tavarua.c
+++ b/drivers/media/radio/radio-tavarua.c
@@ -1940,7 +1940,7 @@
}
/* Check for Bahama V2 variant*/
- if (bahama_version == 0x09) {
+ if ((bahama_version == 0x09) || (bahama_version == 0x0a)) {
/* In case of Bahama v2, forcefully enable the
* internal analog and digital voltage controllers
@@ -2179,7 +2179,8 @@
/* Set the index based on the bt status*/
index = bt_status ? 1 : 0;
/* Check for Bahama's existance and Bahama V2 variant*/
- if (bahama_present && (bahama_version == 0x09)) {
+ if (bahama_present
+ && (bahama_version == 0x09 || bahama_version == 0x0a)) {
radio->marimba->mod_id = SLAVE_ID_BAHAMA;
/* actual value itself used as mask*/
retval = marimba_write_bit_mask(radio->marimba,
@@ -4149,7 +4150,7 @@
/* use xfr for interrupt setup */
if (radio->chipID == MARIMBA_2_1 || radio->chipID == BAHAMA_1_0
- || radio->chipID == BAHAMA_2_0) {
+ || radio->chipID == BAHAMA_2_0 || radio->chipID == BAHAMA_2_1) {
FMDBG("Setting interrupts\n");
retval = sync_write_xfr(radio, INT_CTRL, int_ctrl);
/* use register write to setup interrupts */
@@ -4175,7 +4176,8 @@
* registers and it is not valid for MBA 2.1
*/
if ((radio->chipID != MARIMBA_2_1) && (radio->chipID != BAHAMA_1_0)
- && (radio->chipID != BAHAMA_2_0))
+ && (radio->chipID != BAHAMA_2_0)
+ && (radio->chipID != BAHAMA_2_1))
tavarua_handle_interrupts(radio);
return retval;
@@ -4208,7 +4210,7 @@
/* use xfr for interrupt setup */
wait_timeout = 100;
if (radio->chipID == MARIMBA_2_1 || radio->chipID == BAHAMA_1_0
- || radio->chipID == BAHAMA_2_0)
+ || radio->chipID == BAHAMA_2_0 || radio->chipID == BAHAMA_2_1)
retval = sync_write_xfr(radio, INT_CTRL, lpm_buf);
/* use register write to setup interrupts */
else
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index ae020e8..0d2d91c 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -1262,3 +1262,4 @@
endif # V4L_MEM2MEM_DRIVERS
source "drivers/media/video/msm_vidc/Kconfig"
+source "drivers/media/video/msm_wfd/Kconfig"
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
index 082ee3d..fd736c3 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@ -215,7 +215,7 @@
obj-$(CONFIG_MSM_CAMERA) += msm/
obj-$(CONFIG_ARCH_OMAP) += omap/
obj-$(CONFIG_MSM_VIDC_V4L2) += msm_vidc/
-obj-$(CONFIG_FB_MSM_WRITEBACK_MSM_PANEL) += msm_wfd/
+obj-$(CONFIG_MSM_WFD) += msm_wfd/
ccflags-y += -I$(srctree)/drivers/media/dvb/dvb-core
ccflags-y += -I$(srctree)/drivers/media/dvb/frontends
diff --git a/drivers/media/video/msm/csi/msm_csi2_register.c b/drivers/media/video/msm/csi/msm_csi2_register.c
index aa539ff..5f2183b 100644
--- a/drivers/media/video/msm/csi/msm_csi2_register.c
+++ b/drivers/media/video/msm/csi/msm_csi2_register.c
@@ -16,18 +16,21 @@
#include "msm_csi_register.h"
int msm_csi_register_subdevs(struct msm_cam_media_controller *p_mctl,
- int core_index, struct msm_cam_server_dev *server_dev)
+ uint8_t csiphy_code_index, uint8_t csid_core_index,
+ struct msm_cam_server_dev *server_dev)
{
int rc = -ENODEV;
+ CDBG("%s csiphy sel %d csid sel %d\n", __func__, csiphy_code_index,
+ csid_core_index);
/* register csiphy subdev */
- p_mctl->csiphy_sdev = server_dev->csiphy_device[core_index];
+ p_mctl->csiphy_sdev = server_dev->csiphy_device[csiphy_code_index];
if (!p_mctl->csiphy_sdev)
goto out;
v4l2_set_subdev_hostdata(p_mctl->csiphy_sdev, p_mctl);
/* register csid subdev */
- p_mctl->csid_sdev = server_dev->csid_device[core_index];
+ p_mctl->csid_sdev = server_dev->csid_device[csid_core_index];
if (!p_mctl->csid_sdev)
goto out;
v4l2_set_subdev_hostdata(p_mctl->csid_sdev, p_mctl);
diff --git a/drivers/media/video/msm/csi/msm_csi_register.h b/drivers/media/video/msm/csi/msm_csi_register.h
index ebb001c..4214feb 100644
--- a/drivers/media/video/msm/csi/msm_csi_register.h
+++ b/drivers/media/video/msm/csi/msm_csi_register.h
@@ -12,5 +12,5 @@
*/
int msm_csi_register_subdevs(struct msm_cam_media_controller *p_mctl,
- int core_index,
+ uint8_t csiphy_code_index, uint8_t csid_core_index,
struct msm_cam_server_dev *server_dev);
diff --git a/drivers/media/video/msm/csi/msm_csic_register.c b/drivers/media/video/msm/csi/msm_csic_register.c
index dc3641a..af50101 100644
--- a/drivers/media/video/msm/csi/msm_csic_register.c
+++ b/drivers/media/video/msm/csi/msm_csic_register.c
@@ -16,11 +16,12 @@
#include "msm_csi_register.h"
int msm_csi_register_subdevs(struct msm_cam_media_controller *p_mctl,
- int core_index, struct msm_cam_server_dev *server_dev)
+ uint8_t csiphy_code_index, uint8_t csid_core_index,
+ struct msm_cam_server_dev *server_dev)
{
int rc = -ENODEV;
- p_mctl->csic_sdev = server_dev->csic_device[core_index];
+ p_mctl->csic_sdev = server_dev->csic_device[csid_core_index];
if (!p_mctl->csic_sdev)
goto out;
v4l2_set_subdev_hostdata(p_mctl->csic_sdev, p_mctl);
diff --git a/drivers/media/video/msm/gemini/msm_gemini_platform.c b/drivers/media/video/msm/gemini/msm_gemini_platform.c
index 28d2439..111402b 100644
--- a/drivers/media/video/msm/gemini/msm_gemini_platform.c
+++ b/drivers/media/video/msm/gemini/msm_gemini_platform.c
@@ -52,7 +52,7 @@
return 0;
rc = ion_map_iommu(gemini_client, *ionhandle, CAMERA_DOMAIN, GEN_POOL,
- SZ_4K, 0, &paddr, (unsigned long *)&size, UNCACHED, 0);
+ SZ_4K, 0, &paddr, (unsigned long *)&size, 0, 0);
#elif CONFIG_ANDROID_PMEM
unsigned long kvstart;
rc = get_pmem_file(fd, &paddr, &kvstart, &size, file_p);
diff --git a/drivers/media/video/msm/io/msm_camera_i2c.c b/drivers/media/video/msm/io/msm_camera_i2c.c
index 27ebac5..9e4fcd1 100644
--- a/drivers/media/video/msm/io/msm_camera_i2c.c
+++ b/drivers/media/video/msm/io/msm_camera_i2c.c
@@ -376,81 +376,67 @@
{
int i;
int32_t rc = -EFAULT;
- if (client->cci_client) {
- struct msm_camera_cci_ctrl cci_ctrl;
- cci_ctrl.cmd = MSM_CCI_I2C_WRITE;
- cci_ctrl.cci_info = client->cci_client;
- cci_ctrl.cfg.cci_i2c_write_cfg.reg_conf_tbl = reg_conf_tbl;
- cci_ctrl.cfg.cci_i2c_write_cfg.data_type = data_type;
- cci_ctrl.cfg.cci_i2c_write_cfg.addr_type = client->addr_type;
- cci_ctrl.cfg.cci_i2c_write_cfg.size = size;
- rc = v4l2_subdev_call(client->cci_client->cci_subdev,
- core, ioctl, VIDIOC_MSM_CCI_CFG, &cci_ctrl);
- CDBG("%s line %d rc = %d\n", __func__, __LINE__, rc);
- rc = cci_ctrl.status;
- } else {
- for (i = 0; i < size; i++) {
- enum msm_camera_i2c_data_type dt;
- if (reg_conf_tbl->cmd_type == MSM_CAMERA_I2C_CMD_POLL) {
- rc = msm_camera_i2c_poll(client,
+ for (i = 0; i < size; i++) {
+ enum msm_camera_i2c_data_type dt;
+ if (reg_conf_tbl->cmd_type == MSM_CAMERA_I2C_CMD_POLL) {
+ rc = msm_camera_i2c_poll(client,
+ reg_conf_tbl->reg_addr,
+ reg_conf_tbl->reg_data,
+ reg_conf_tbl->dt);
+ } else {
+ if (reg_conf_tbl->dt == 0)
+ dt = data_type;
+ else
+ dt = reg_conf_tbl->dt;
+ switch (dt) {
+ case MSM_CAMERA_I2C_BYTE_DATA:
+ case MSM_CAMERA_I2C_WORD_DATA:
+ rc = msm_camera_i2c_write(
+ client,
+ reg_conf_tbl->reg_addr,
+ reg_conf_tbl->reg_data, dt);
+ break;
+ case MSM_CAMERA_I2C_SET_BYTE_MASK:
+ rc = msm_camera_i2c_set_mask(client,
reg_conf_tbl->reg_addr,
reg_conf_tbl->reg_data,
- reg_conf_tbl->dt);
- } else {
- if (reg_conf_tbl->dt == 0)
- dt = data_type;
- else
- dt = reg_conf_tbl->dt;
- switch (dt) {
- case MSM_CAMERA_I2C_BYTE_DATA:
- case MSM_CAMERA_I2C_WORD_DATA:
- rc = msm_camera_i2c_write(
- client,
- reg_conf_tbl->reg_addr,
- reg_conf_tbl->reg_data, dt);
- break;
- case MSM_CAMERA_I2C_SET_BYTE_MASK:
- rc = msm_camera_i2c_set_mask(client,
- reg_conf_tbl->reg_addr,
- reg_conf_tbl->reg_data,
- MSM_CAMERA_I2C_BYTE_DATA, 1);
- break;
- case MSM_CAMERA_I2C_UNSET_BYTE_MASK:
- rc = msm_camera_i2c_set_mask(client,
- reg_conf_tbl->reg_addr,
- reg_conf_tbl->reg_data,
- MSM_CAMERA_I2C_BYTE_DATA, 0);
- break;
- case MSM_CAMERA_I2C_SET_WORD_MASK:
- rc = msm_camera_i2c_set_mask(client,
- reg_conf_tbl->reg_addr,
- reg_conf_tbl->reg_data,
- MSM_CAMERA_I2C_WORD_DATA, 1);
- break;
- case MSM_CAMERA_I2C_UNSET_WORD_MASK:
- rc = msm_camera_i2c_set_mask(client,
- reg_conf_tbl->reg_addr,
- reg_conf_tbl->reg_data,
- MSM_CAMERA_I2C_WORD_DATA, 0);
- break;
- case MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA:
- rc = msm_camera_i2c_set_write_mask_data(
- client,
- reg_conf_tbl->reg_addr,
- reg_conf_tbl->reg_data,
- reg_conf_tbl->mask,
- MSM_CAMERA_I2C_BYTE_DATA);
- break;
- default:
- pr_err("%s: Unsupport data type: %d\n",
- __func__, dt);
- break;
- }
- }
- if (rc < 0)
+ MSM_CAMERA_I2C_BYTE_DATA, 1);
break;
- reg_conf_tbl++;
+ case MSM_CAMERA_I2C_UNSET_BYTE_MASK:
+ rc = msm_camera_i2c_set_mask(client,
+ reg_conf_tbl->reg_addr,
+ reg_conf_tbl->reg_data,
+ MSM_CAMERA_I2C_BYTE_DATA, 0);
+ break;
+ case MSM_CAMERA_I2C_SET_WORD_MASK:
+ rc = msm_camera_i2c_set_mask(client,
+ reg_conf_tbl->reg_addr,
+ reg_conf_tbl->reg_data,
+ MSM_CAMERA_I2C_WORD_DATA, 1);
+ break;
+ case MSM_CAMERA_I2C_UNSET_WORD_MASK:
+ rc = msm_camera_i2c_set_mask(client,
+ reg_conf_tbl->reg_addr,
+ reg_conf_tbl->reg_data,
+ MSM_CAMERA_I2C_WORD_DATA, 0);
+ break;
+ case MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA:
+ rc = msm_camera_i2c_set_write_mask_data(
+ client,
+ reg_conf_tbl->reg_addr,
+ reg_conf_tbl->reg_data,
+ reg_conf_tbl->mask,
+ MSM_CAMERA_I2C_BYTE_DATA);
+ break;
+ default:
+ pr_err("%s: Unsupport data type: %d\n",
+ __func__, dt);
+ break;
+ }
}
+ if (rc < 0)
+ break;
+ reg_conf_tbl++;
}
return rc;
}
diff --git a/drivers/media/video/msm/io/msm_io_7x27a_v4l2.c b/drivers/media/video/msm/io/msm_io_7x27a_v4l2.c
index 9549dcc..9e7ede4 100644
--- a/drivers/media/video/msm/io/msm_io_7x27a_v4l2.c
+++ b/drivers/media/video/msm/io/msm_io_7x27a_v4l2.c
@@ -139,19 +139,16 @@
switch (perf_setting) {
case S_INIT:
add_axi_qos();
- break;
- case S_PREVIEW:
update_axi_qos(MSM_AXI_QOS_PREVIEW);
axi_allocate(AXI_FLOW_VIEWFINDER_HI);
break;
+ case S_PREVIEW:
+ break;
case S_VIDEO:
- update_axi_qos(MSM_AXI_QOS_RECORDING);
break;
case S_CAPTURE:
- update_axi_qos(MSM_AXI_QOS_SNAPSHOT);
break;
case S_DEFAULT:
- update_axi_qos(PM_QOS_DEFAULT_VALUE);
break;
case S_EXIT:
axi_free(AXI_FLOW_VIEWFINDER_HI);
diff --git a/drivers/media/video/msm/jpeg_10/msm_jpeg_common.h b/drivers/media/video/msm/jpeg_10/msm_jpeg_common.h
index 88ec1ad..04af6b6 100644
--- a/drivers/media/video/msm/jpeg_10/msm_jpeg_common.h
+++ b/drivers/media/video/msm/jpeg_10/msm_jpeg_common.h
@@ -14,12 +14,13 @@
#define MSM_JPEG_COMMON_H
#ifdef MSM_JPEG_DEBUG
-#define JPEG_DBG(fmt, args...) printk(fmt, ##args)
+#define JPEG_DBG(fmt, args...) pr_info(fmt, ##args)
#else
#define JPEG_DBG(fmt, args...) do { } while (0)
#endif
#define JPEG_PR_ERR pr_err
+#define JPEG_DBG_HIGH pr_err
enum JPEG_MODE {
JPEG_MODE_DISABLE,
diff --git a/drivers/media/video/msm/jpeg_10/msm_jpeg_core.c b/drivers/media/video/msm/jpeg_10/msm_jpeg_core.c
index 7905ff3..b67245c 100644
--- a/drivers/media/video/msm/jpeg_10/msm_jpeg_core.c
+++ b/drivers/media/video/msm/jpeg_10/msm_jpeg_core.c
@@ -17,122 +17,130 @@
#include "msm_jpeg_platform.h"
#include "msm_jpeg_common.h"
-static struct msm_jpeg_hw_pingpong fe_pingpong_buf;
-static struct msm_jpeg_hw_pingpong we_pingpong_buf;
-static int we_pingpong_index;
-static int reset_done_ack;
-static spinlock_t reset_lock;
-static wait_queue_head_t reset_wait;
-
-int msm_jpeg_core_reset(uint8_t op_mode, void *base, int size)
-{
+int msm_jpeg_core_reset(struct msm_jpeg_device *pgmn_dev, uint8_t op_mode,
+ void *base, int size) {
unsigned long flags;
int rc = 0;
int tm = 500; /*500ms*/
- memset(&fe_pingpong_buf, 0, sizeof(fe_pingpong_buf));
- fe_pingpong_buf.is_fe = 1;
- we_pingpong_index = 0;
- memset(&we_pingpong_buf, 0, sizeof(we_pingpong_buf));
- spin_lock_irqsave(&reset_lock, flags);
- reset_done_ack = 0;
+ JPEG_DBG("%s:%d] reset", __func__, __LINE__);
+ memset(&pgmn_dev->fe_pingpong_buf, 0,
+ sizeof(pgmn_dev->fe_pingpong_buf));
+ pgmn_dev->fe_pingpong_buf.is_fe = 1;
+ memset(&pgmn_dev->we_pingpong_buf, 0,
+ sizeof(pgmn_dev->we_pingpong_buf));
+ spin_lock_irqsave(&pgmn_dev->reset_lock, flags);
+ pgmn_dev->reset_done_ack = 0;
msm_jpeg_hw_reset(base, size);
- spin_unlock_irqrestore(&reset_lock, flags);
+ spin_unlock_irqrestore(&pgmn_dev->reset_lock, flags);
rc = wait_event_interruptible_timeout(
- reset_wait,
- reset_done_ack,
+ pgmn_dev->reset_wait,
+ pgmn_dev->reset_done_ack,
msecs_to_jiffies(tm));
- if (!reset_done_ack) {
+ if (!pgmn_dev->reset_done_ack) {
JPEG_DBG("%s: reset ACK failed %d", __func__, rc);
return -EBUSY;
}
JPEG_DBG("%s: reset_done_ack rc %d", __func__, rc);
- spin_lock_irqsave(&reset_lock, flags);
- reset_done_ack = 0;
- spin_unlock_irqrestore(&reset_lock, flags);
+ spin_lock_irqsave(&pgmn_dev->reset_lock, flags);
+ pgmn_dev->reset_done_ack = 0;
+ spin_unlock_irqrestore(&pgmn_dev->reset_lock, flags);
return 0;
}
-void msm_jpeg_core_release(int release_buf, int domain_num)
-{
+void msm_jpeg_core_release(struct msm_jpeg_device *pgmn_dev,
+ int domain_num) {
int i = 0;
for (i = 0; i < 2; i++) {
- if (we_pingpong_buf.buf_status[i] && release_buf)
- msm_jpeg_platform_p2v(we_pingpong_buf.buf[i].file,
- &we_pingpong_buf.buf[i].handle, domain_num);
- we_pingpong_buf.buf_status[i] = 0;
+ if (pgmn_dev->we_pingpong_buf.buf_status[i] &&
+ pgmn_dev->release_buf)
+ msm_jpeg_platform_p2v(pgmn_dev,
+ pgmn_dev->we_pingpong_buf.buf[i].file,
+ &pgmn_dev->we_pingpong_buf.buf[i].handle,
+ domain_num);
+ pgmn_dev->we_pingpong_buf.buf_status[i] = 0;
}
}
-void msm_jpeg_core_init(void)
+void msm_jpeg_core_init(struct msm_jpeg_device *pgmn_dev)
{
- init_waitqueue_head(&reset_wait);
- spin_lock_init(&reset_lock);
+ init_waitqueue_head(&pgmn_dev->reset_wait);
+ spin_lock_init(&pgmn_dev->reset_lock);
}
-int msm_jpeg_core_fe_start(void)
+int msm_jpeg_core_fe_start(struct msm_jpeg_device *pgmn_dev)
{
- msm_jpeg_hw_fe_start();
+ msm_jpeg_hw_fe_start(pgmn_dev->base);
return 0;
}
/* fetch engine */
-int msm_jpeg_core_fe_buf_update(struct msm_jpeg_core_buf *buf)
+int msm_jpeg_core_fe_buf_update(struct msm_jpeg_device *pgmn_dev,
+ struct msm_jpeg_core_buf *buf)
{
+ if (0 == buf->cbcr_len)
+ buf->cbcr_buffer_addr = 0x0;
JPEG_DBG("%s:%d] 0x%08x %d 0x%08x %d\n", __func__, __LINE__,
(int) buf->y_buffer_addr, buf->y_len,
(int) buf->cbcr_buffer_addr, buf->cbcr_len);
- return msm_jpeg_hw_pingpong_update(&fe_pingpong_buf, buf);
+ return msm_jpeg_hw_pingpong_update(&pgmn_dev->fe_pingpong_buf, buf,
+ pgmn_dev->base);
}
-void *msm_jpeg_core_fe_pingpong_irq(int jpeg_irq_status, void *context)
+void *msm_jpeg_core_fe_pingpong_irq(int jpeg_irq_status,
+ struct msm_jpeg_device *pgmn_dev)
{
- return msm_jpeg_hw_pingpong_irq(&fe_pingpong_buf);
+ return msm_jpeg_hw_pingpong_irq(&pgmn_dev->fe_pingpong_buf);
}
/* write engine */
-int msm_jpeg_core_we_buf_update(struct msm_jpeg_core_buf *buf)
-{
+int msm_jpeg_core_we_buf_update(struct msm_jpeg_device *pgmn_dev,
+ struct msm_jpeg_core_buf *buf) {
JPEG_DBG("%s:%d] 0x%08x 0x%08x %d\n", __func__, __LINE__,
(int) buf->y_buffer_addr, (int) buf->cbcr_buffer_addr,
buf->y_len);
- we_pingpong_buf.buf[0] = *buf;
- we_pingpong_buf.buf_status[0] = 1;
+ pgmn_dev->we_pingpong_buf.buf[0] = *buf;
+ pgmn_dev->we_pingpong_buf.buf_status[0] = 1;
msm_jpeg_hw_we_buffer_update(
- &we_pingpong_buf.buf[0], 0);
+ &pgmn_dev->we_pingpong_buf.buf[0], 0, pgmn_dev->base);
return 0;
}
-int msm_jpeg_core_we_buf_reset(struct msm_jpeg_hw_buf *buf)
+int msm_jpeg_core_we_buf_reset(struct msm_jpeg_device *pgmn_dev,
+ struct msm_jpeg_hw_buf *buf)
{
int i = 0;
for (i = 0; i < 2; i++) {
- if (we_pingpong_buf.buf[i].y_buffer_addr
- == buf->y_buffer_addr)
- we_pingpong_buf.buf_status[i] = 0;
+ if (pgmn_dev->we_pingpong_buf.buf[i].y_buffer_addr
+ == buf->y_buffer_addr)
+ pgmn_dev->we_pingpong_buf.buf_status[i] = 0;
}
return 0;
}
-void *msm_jpeg_core_we_pingpong_irq(int jpeg_irq_status, void *context)
+void *msm_jpeg_core_we_pingpong_irq(int jpeg_irq_status,
+ struct msm_jpeg_device *pgmn_dev)
{
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
- return msm_jpeg_hw_pingpong_irq(&we_pingpong_buf);
+ return msm_jpeg_hw_pingpong_irq(&pgmn_dev->we_pingpong_buf);
}
-void *msm_jpeg_core_framedone_irq(int jpeg_irq_status, void *context)
+void *msm_jpeg_core_framedone_irq(int jpeg_irq_status,
+ struct msm_jpeg_device *pgmn_dev)
{
struct msm_jpeg_hw_buf *buf_p;
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
- buf_p = msm_jpeg_hw_pingpong_active_buffer(&we_pingpong_buf);
- if (buf_p) {
- buf_p->framedone_len = msm_jpeg_hw_encode_output_size();
+ buf_p = msm_jpeg_hw_pingpong_active_buffer(
+ &pgmn_dev->we_pingpong_buf);
+ if (buf_p && !pgmn_dev->decode_flag) {
+ buf_p->framedone_len =
+ msm_jpeg_hw_encode_output_size(pgmn_dev->base);
JPEG_DBG("%s:%d] framedone_len %d\n", __func__, __LINE__,
buf_p->framedone_len);
}
@@ -140,14 +148,16 @@
return buf_p;
}
-void *msm_jpeg_core_reset_ack_irq(int jpeg_irq_status, void *context)
+void *msm_jpeg_core_reset_ack_irq(int jpeg_irq_status,
+ struct msm_jpeg_device *pgmn_dev)
{
/* @todo return the status back to msm_jpeg_core_reset */
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
return NULL;
}
-void *msm_jpeg_core_err_irq(int jpeg_irq_status, void *context)
+void *msm_jpeg_core_err_irq(int jpeg_irq_status,
+ struct msm_jpeg_device *pgmn_dev)
{
JPEG_PR_ERR("%s:%d]\n", __func__, jpeg_irq_status);
return NULL;
@@ -155,15 +165,32 @@
static int (*msm_jpeg_irq_handler) (int, void *, void *);
+void msm_jpeg_core_return_buffers(struct msm_jpeg_device *pgmn_dev,
+ int jpeg_irq_status)
+{
+ void *data = NULL;
+ data = msm_jpeg_core_fe_pingpong_irq(jpeg_irq_status,
+ pgmn_dev);
+ if (msm_jpeg_irq_handler)
+ msm_jpeg_irq_handler(MSM_JPEG_HW_MASK_COMP_FE,
+ pgmn_dev, data);
+ data = msm_jpeg_core_we_pingpong_irq(jpeg_irq_status,
+ pgmn_dev);
+ if (msm_jpeg_irq_handler)
+ msm_jpeg_irq_handler(MSM_JPEG_HW_MASK_COMP_WE,
+ pgmn_dev, data);
+}
+
irqreturn_t msm_jpeg_core_irq(int irq_num, void *context)
{
void *data = NULL;
unsigned long flags;
int jpeg_irq_status;
+ struct msm_jpeg_device *pgmn_dev = (struct msm_jpeg_device *)context;
JPEG_DBG("%s:%d] irq_num = %d\n", __func__, __LINE__, irq_num);
- jpeg_irq_status = msm_jpeg_hw_irq_get_status();
+ jpeg_irq_status = msm_jpeg_hw_irq_get_status(pgmn_dev->base);
JPEG_DBG("%s:%d] jpeg_irq_status = %0x\n", __func__, __LINE__,
jpeg_irq_status);
@@ -171,18 +198,26 @@
/*For reset and framedone IRQs, clear all bits*/
if (jpeg_irq_status & 0x10000000) {
msm_jpeg_hw_irq_clear(JPEG_IRQ_CLEAR_BMSK,
- JPEG_IRQ_CLEAR_ALL);
+ JPEG_IRQ_CLEAR_ALL, pgmn_dev->base);
} else if (jpeg_irq_status & 0x1) {
msm_jpeg_hw_irq_clear(JPEG_IRQ_CLEAR_BMSK,
- JPEG_IRQ_CLEAR_ALL);
+ JPEG_IRQ_CLEAR_ALL, pgmn_dev->base);
+ if (pgmn_dev->decode_flag)
+ msm_jpeg_decode_status(pgmn_dev->base);
} else {
msm_jpeg_hw_irq_clear(JPEG_IRQ_CLEAR_BMSK,
- jpeg_irq_status);
+ jpeg_irq_status, pgmn_dev->base);
}
if (msm_jpeg_hw_irq_is_frame_done(jpeg_irq_status)) {
+ /* send fe ping pong irq */
+ data = msm_jpeg_core_fe_pingpong_irq(jpeg_irq_status,
+ pgmn_dev);
+ if (msm_jpeg_irq_handler)
+ msm_jpeg_irq_handler(MSM_JPEG_HW_MASK_COMP_FE,
+ context, data);
data = msm_jpeg_core_framedone_irq(jpeg_irq_status,
- context);
+ pgmn_dev);
if (msm_jpeg_irq_handler)
msm_jpeg_irq_handler(
MSM_JPEG_HW_MASK_COMP_FRAMEDONE,
@@ -190,11 +225,11 @@
}
if (msm_jpeg_hw_irq_is_reset_ack(jpeg_irq_status)) {
data = msm_jpeg_core_reset_ack_irq(jpeg_irq_status,
- context);
- spin_lock_irqsave(&reset_lock, flags);
- reset_done_ack = 1;
- spin_unlock_irqrestore(&reset_lock, flags);
- wake_up(&reset_wait);
+ pgmn_dev);
+ spin_lock_irqsave(&pgmn_dev->reset_lock, flags);
+ pgmn_dev->reset_done_ack = 1;
+ spin_unlock_irqrestore(&pgmn_dev->reset_lock, flags);
+ wake_up(&pgmn_dev->reset_wait);
if (msm_jpeg_irq_handler)
msm_jpeg_irq_handler(
MSM_JPEG_HW_MASK_COMP_RESET_ACK,
@@ -203,7 +238,10 @@
/* Unexpected/unintended HW interrupt */
if (msm_jpeg_hw_irq_is_err(jpeg_irq_status)) {
- data = msm_jpeg_core_err_irq(jpeg_irq_status, context);
+ if (pgmn_dev->decode_flag)
+ msm_jpeg_decode_status(pgmn_dev->base);
+ msm_jpeg_core_return_buffers(pgmn_dev, jpeg_irq_status);
+ data = msm_jpeg_core_err_irq(jpeg_irq_status, pgmn_dev);
if (msm_jpeg_irq_handler)
msm_jpeg_irq_handler(MSM_JPEG_HW_MASK_COMP_ERR,
context, data);
diff --git a/drivers/media/video/msm/jpeg_10/msm_jpeg_core.h b/drivers/media/video/msm/jpeg_10/msm_jpeg_core.h
index b5c725c..212eaff 100644
--- a/drivers/media/video/msm/jpeg_10/msm_jpeg_core.h
+++ b/drivers/media/video/msm/jpeg_10/msm_jpeg_core.h
@@ -15,6 +15,7 @@
#include <linux/interrupt.h>
#include "msm_jpeg_hw.h"
+#include "msm_jpeg_sync.h"
#define msm_jpeg_core_buf msm_jpeg_hw_buf
@@ -23,13 +24,17 @@
void msm_jpeg_core_irq_install(int (*irq_handler) (int, void *, void *));
void msm_jpeg_core_irq_remove(void);
-int msm_jpeg_core_fe_buf_update(struct msm_jpeg_core_buf *buf);
-int msm_jpeg_core_we_buf_update(struct msm_jpeg_core_buf *buf);
-int msm_jpeg_core_we_buf_reset(struct msm_jpeg_hw_buf *buf);
+int msm_jpeg_core_fe_buf_update(struct msm_jpeg_device *pgmn_dev,
+ struct msm_jpeg_core_buf *buf);
+int msm_jpeg_core_we_buf_update(struct msm_jpeg_device *pgmn_dev,
+ struct msm_jpeg_core_buf *buf);
+int msm_jpeg_core_we_buf_reset(struct msm_jpeg_device *pgmn_dev,
+ struct msm_jpeg_hw_buf *buf);
-int msm_jpeg_core_reset(uint8_t op_mode, void *base, int size);
-int msm_jpeg_core_fe_start(void);
+int msm_jpeg_core_reset(struct msm_jpeg_device *pgmn_dev, uint8_t op_mode,
+ void *base, int size);
+int msm_jpeg_core_fe_start(struct msm_jpeg_device *);
-void msm_jpeg_core_release(int, int);
-void msm_jpeg_core_init(void);
+void msm_jpeg_core_release(struct msm_jpeg_device *, int);
+void msm_jpeg_core_init(struct msm_jpeg_device *);
#endif /* MSM_JPEG_CORE_H */
diff --git a/drivers/media/video/msm/jpeg_10/msm_jpeg_dev.c b/drivers/media/video/msm/jpeg_10/msm_jpeg_dev.c
index 45a9a38..0662f54 100644
--- a/drivers/media/video/msm/jpeg_10/msm_jpeg_dev.c
+++ b/drivers/media/video/msm/jpeg_10/msm_jpeg_dev.c
@@ -31,9 +31,7 @@
#include "msm_jpeg_common.h"
#define MSM_JPEG_NAME "jpeg"
-#define MSM_JPEGE1_NAME "jpege1"
-#define MSM_JPEGD_NAME "jpegd"
-
+#define DEV_NAME_LEN 10
static int msm_jpeg_open(struct inode *inode, struct file *filp)
{
@@ -146,7 +144,7 @@
int rc = -1;
struct device *dev;
struct msm_jpeg_device *msm_jpeg_device_p;
- char devname[10];
+ char devname[DEV_NAME_LEN];
msm_jpeg_device_p = kzalloc(sizeof(struct msm_jpeg_device), GFP_ATOMIC);
if (!msm_jpeg_device_p) {
@@ -158,7 +156,7 @@
if (pdev->dev.of_node)
of_property_read_u32((&pdev->dev)->of_node, "cell-index",
- &pdev->id);
+ &pdev->id);
snprintf(devname, sizeof(devname), "%s%d", MSM_JPEG_NAME, pdev->id);
diff --git a/drivers/media/video/msm/jpeg_10/msm_jpeg_hw.c b/drivers/media/video/msm/jpeg_10/msm_jpeg_hw.c
index 0bfb6a8..e311e4c 100644
--- a/drivers/media/video/msm/jpeg_10/msm_jpeg_hw.c
+++ b/drivers/media/video/msm/jpeg_10/msm_jpeg_hw.c
@@ -17,11 +17,8 @@
#include <linux/io.h>
-static void *jpeg_region_base;
-static uint32_t jpeg_region_size;
-
int msm_jpeg_hw_pingpong_update(struct msm_jpeg_hw_pingpong *pingpong_hw,
- struct msm_jpeg_hw_buf *buf)
+ struct msm_jpeg_hw_buf *buf, void *base)
{
int buf_free_index = -1;
@@ -41,11 +38,13 @@
if (pingpong_hw->is_fe) {
/* it is fe */
msm_jpeg_hw_fe_buffer_update(
- &pingpong_hw->buf[buf_free_index], buf_free_index);
+ &pingpong_hw->buf[buf_free_index], buf_free_index,
+ base);
} else {
/* it is we */
msm_jpeg_hw_we_buffer_update(
- &pingpong_hw->buf[buf_free_index], buf_free_index);
+ &pingpong_hw->buf[buf_free_index], buf_free_index,
+ base);
}
return 0;
}
@@ -81,12 +80,10 @@
JPEG_IRQ_STATUS_BMSK, {0} },
};
-int msm_jpeg_hw_irq_get_status(void)
+int msm_jpeg_hw_irq_get_status(void *base)
{
uint32_t n_irq_status = 0;
- rmb();
- n_irq_status = msm_jpeg_hw_read(&hw_cmd_irq_get_status[0]);
- rmb();
+ n_irq_status = msm_jpeg_hw_read(&hw_cmd_irq_get_status[0], base);
return n_irq_status;
}
@@ -97,11 +94,12 @@
JPEG_ENCODE_OUTPUT_SIZE_STATUS_BMSK, {0} } ,
};
-long msm_jpeg_hw_encode_output_size(void)
+long msm_jpeg_hw_encode_output_size(void *base)
{
uint32_t encode_output_size = 0;
- encode_output_size = msm_jpeg_hw_read(&hw_cmd_encode_output_size[0]);
+ encode_output_size = msm_jpeg_hw_read(&hw_cmd_encode_output_size[0],
+ base);
return encode_output_size;
}
@@ -112,12 +110,12 @@
JPEG_IRQ_CLEAR_BMSK, {JPEG_IRQ_CLEAR_ALL} },
};
-void msm_jpeg_hw_irq_clear(uint32_t mask, uint32_t data)
+void msm_jpeg_hw_irq_clear(uint32_t mask, uint32_t data, void *base)
{
JPEG_DBG("%s:%d] mask %0x data %0x", __func__, __LINE__, mask, data);
hw_cmd_irq_clear[0].mask = mask;
hw_cmd_irq_clear[0].data = data;
- msm_jpeg_hw_write(&hw_cmd_irq_clear[0]);
+ msm_jpeg_hw_write(&hw_cmd_irq_clear[0], base);
}
struct msm_jpeg_hw_cmd hw_cmd_fe_ping_update[] = {
@@ -137,26 +135,26 @@
};
void msm_jpeg_hw_fe_buffer_update(struct msm_jpeg_hw_buf *p_input,
- uint8_t pingpong_index)
+ uint8_t pingpong_index, void *base)
{
struct msm_jpeg_hw_cmd *hw_cmd_p;
if (pingpong_index == 0) {
hw_cmd_p = &hw_cmd_fe_ping_update[0];
wmb();
- msm_jpeg_hw_write(hw_cmd_p++);
+ msm_jpeg_hw_write(hw_cmd_p++, base);
wmb();
- msm_jpeg_hw_write(hw_cmd_p++);
+ msm_jpeg_hw_write(hw_cmd_p++, base);
wmb();
- msm_jpeg_hw_write(hw_cmd_p++);
+ msm_jpeg_hw_write(hw_cmd_p++, base);
wmb();
hw_cmd_p->data = p_input->y_buffer_addr;
- msm_jpeg_hw_write(hw_cmd_p++);
+ msm_jpeg_hw_write(hw_cmd_p++, base);
wmb();
- msm_jpeg_hw_write(hw_cmd_p++);
+ msm_jpeg_hw_write(hw_cmd_p++, base);
wmb();
hw_cmd_p->data = p_input->cbcr_buffer_addr;
- msm_jpeg_hw_write(hw_cmd_p++);
+ msm_jpeg_hw_write(hw_cmd_p++, base);
wmb();
}
@@ -169,9 +167,9 @@
JPEG_CMD_BMSK, {JPEG_OFFLINE_CMD_START} },
};
-void msm_jpeg_hw_fe_start(void)
+void msm_jpeg_hw_fe_start(void *base)
{
- msm_jpeg_hw_write(&hw_cmd_fe_start[0]);
+ msm_jpeg_hw_write(&hw_cmd_fe_start[0], base);
return;
}
@@ -180,20 +178,46 @@
/* type, repeat n times, offset, mask, data or pdata */
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_PLN0_WR_PNTR_ADDR,
JPEG_PLN0_WR_PNTR_BMSK, {0} },
+ {MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_PLN1_WR_PNTR_ADDR,
+ JPEG_PLN0_WR_PNTR_BMSK, {0} },
+ {MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_PLN2_WR_PNTR_ADDR,
+ JPEG_PLN0_WR_PNTR_BMSK, {0} },
};
+void msm_jpeg_decode_status(void *base)
+{
+ uint32_t data;
+ data = readl_relaxed(base + JPEG_DECODE_MCUS_DECODED_STATUS);
+ JPEG_DBG_HIGH("Decode MCUs decode status %u", data);
+ data = readl_relaxed(base + JPEG_DECODE_BITS_CONSUMED_STATUS);
+ JPEG_DBG_HIGH("Decode bits consumed status %u", data);
+ data = readl_relaxed(base + JPEG_DECODE_PRED_Y_STATE);
+ JPEG_DBG_HIGH("Decode prediction Y state %u", data);
+ data = readl_relaxed(base + JPEG_DECODE_PRED_C_STATE);
+ JPEG_DBG_HIGH("Decode prediction C state %u", data);
+ data = readl_relaxed(base + JPEG_DECODE_RSM_STATE);
+ JPEG_DBG_HIGH("Decode prediction RSM state %u", data);
+}
+
+
void msm_jpeg_hw_we_buffer_update(struct msm_jpeg_hw_buf *p_input,
- uint8_t pingpong_index)
+ uint8_t pingpong_index, void *base)
{
struct msm_jpeg_hw_cmd *hw_cmd_p;
if (pingpong_index == 0) {
hw_cmd_p = &hw_cmd_we_ping_update[0];
hw_cmd_p->data = p_input->y_buffer_addr;
- JPEG_PR_ERR("%s Output buffer address is %x\n", __func__,
- p_input->y_buffer_addr);
- msm_jpeg_hw_write(hw_cmd_p++);
-
+ JPEG_PR_ERR("%s Output pln0 buffer address is %x\n", __func__,
+ p_input->y_buffer_addr);
+ msm_jpeg_hw_write(hw_cmd_p++, base);
+ hw_cmd_p->data = p_input->cbcr_buffer_addr;
+ JPEG_PR_ERR("%s Output pln1 buffer address is %x\n", __func__,
+ p_input->cbcr_buffer_addr);
+ msm_jpeg_hw_write(hw_cmd_p++, base);
+ JPEG_PR_ERR("%s Output pln2 buffer address is %x\n", __func__,
+ p_input->pln2_addr);
+ msm_jpeg_hw_write(hw_cmd_p++, base);
}
return;
}
@@ -210,31 +234,26 @@
JPEG_RESET_CMD_RMSK, {JPEG_RESET_DEFAULT} },
};
-void msm_jpeg_hw_init(void *base, int size)
-{
- jpeg_region_base = base;
- jpeg_region_size = size;
-}
-
void msm_jpeg_hw_reset(void *base, int size)
{
struct msm_jpeg_hw_cmd *hw_cmd_p;
hw_cmd_p = &hw_cmd_reset[0];
wmb();
- msm_jpeg_hw_write(hw_cmd_p++);
+ msm_jpeg_hw_write(hw_cmd_p++, base);
wmb();
- msm_jpeg_hw_write(hw_cmd_p++);
+ msm_jpeg_hw_write(hw_cmd_p++, base);
wmb();
- msm_jpeg_hw_write(hw_cmd_p++);
+ msm_jpeg_hw_write(hw_cmd_p++, base);
wmb();
- msm_jpeg_hw_write(hw_cmd_p);
+ msm_jpeg_hw_write(hw_cmd_p, base);
wmb();
return;
}
-uint32_t msm_jpeg_hw_read(struct msm_jpeg_hw_cmd *hw_cmd_p)
+uint32_t msm_jpeg_hw_read(struct msm_jpeg_hw_cmd *hw_cmd_p,
+ void *jpeg_region_base)
{
uint32_t *paddr;
uint32_t data;
@@ -247,7 +266,8 @@
return data;
}
-void msm_jpeg_hw_write(struct msm_jpeg_hw_cmd *hw_cmd_p)
+void msm_jpeg_hw_write(struct msm_jpeg_hw_cmd *hw_cmd_p,
+ void *jpeg_region_base)
{
uint32_t *paddr;
uint32_t old_data, new_data;
@@ -266,17 +286,18 @@
writel_relaxed(new_data, paddr);
}
-int msm_jpeg_hw_wait(struct msm_jpeg_hw_cmd *hw_cmd_p, int m_us)
+int msm_jpeg_hw_wait(struct msm_jpeg_hw_cmd *hw_cmd_p, int m_us,
+ void *base)
{
int tm = hw_cmd_p->n;
uint32_t data;
uint32_t wait_data = hw_cmd_p->data & hw_cmd_p->mask;
- data = msm_jpeg_hw_read(hw_cmd_p);
+ data = msm_jpeg_hw_read(hw_cmd_p, base);
if (data != wait_data) {
while (tm) {
udelay(m_us);
- data = msm_jpeg_hw_read(hw_cmd_p);
+ data = msm_jpeg_hw_read(hw_cmd_p, base);
if (data == wait_data)
break;
tm--;
@@ -295,41 +316,42 @@
}
}
-int msm_jpeg_hw_exec_cmds(struct msm_jpeg_hw_cmd *hw_cmd_p, int m_cmds)
+int msm_jpeg_hw_exec_cmds(struct msm_jpeg_hw_cmd *hw_cmd_p, int m_cmds,
+ uint32_t max_size, void *base)
{
int is_copy_to_user = -1;
uint32_t data;
while (m_cmds--) {
- if (hw_cmd_p->offset > jpeg_region_size) {
+ if (hw_cmd_p->offset > max_size) {
JPEG_PR_ERR("%s:%d] %d exceed hw region %d\n", __func__,
- __LINE__, hw_cmd_p->offset, jpeg_region_size);
+ __LINE__, hw_cmd_p->offset, max_size);
return -EFAULT;
}
switch (hw_cmd_p->type) {
case MSM_JPEG_HW_CMD_TYPE_READ:
- hw_cmd_p->data = msm_jpeg_hw_read(hw_cmd_p);
+ hw_cmd_p->data = msm_jpeg_hw_read(hw_cmd_p, base);
is_copy_to_user = 1;
break;
case MSM_JPEG_HW_CMD_TYPE_WRITE:
- msm_jpeg_hw_write(hw_cmd_p);
+ msm_jpeg_hw_write(hw_cmd_p, base);
break;
case MSM_JPEG_HW_CMD_TYPE_WRITE_OR:
- data = msm_jpeg_hw_read(hw_cmd_p);
+ data = msm_jpeg_hw_read(hw_cmd_p, base);
hw_cmd_p->data = (hw_cmd_p->data & hw_cmd_p->mask) |
data;
- msm_jpeg_hw_write(hw_cmd_p);
+ msm_jpeg_hw_write(hw_cmd_p, base);
break;
case MSM_JPEG_HW_CMD_TYPE_UWAIT:
- msm_jpeg_hw_wait(hw_cmd_p, 1);
+ msm_jpeg_hw_wait(hw_cmd_p, 1, base);
break;
case MSM_JPEG_HW_CMD_TYPE_MWAIT:
- msm_jpeg_hw_wait(hw_cmd_p, 1000);
+ msm_jpeg_hw_wait(hw_cmd_p, 1000, base);
break;
case MSM_JPEG_HW_CMD_TYPE_UDELAY:
@@ -350,15 +372,14 @@
return is_copy_to_user;
}
-void msm_jpeg_io_dump(int size)
+void msm_jpeg_io_dump(void *base, int size)
{
char line_str[128], *p_str;
- void __iomem *addr = jpeg_region_base;
+ void __iomem *addr = (void __iomem *)base;
int i;
u32 *p = (u32 *) addr;
u32 data;
- JPEG_PR_ERR("%s: %p %d reg_size %d\n", __func__, addr, size,
- jpeg_region_size);
+ JPEG_DBG_HIGH("%s:%d] %p %d", __func__, __LINE__, addr, size);
line_str[0] = '\0';
p_str = line_str;
for (i = 0; i < size/4; i++) {
@@ -370,11 +391,12 @@
snprintf(p_str, 12, "%08x ", data);
p_str += 9;
if ((i + 1) % 4 == 0) {
- JPEG_PR_ERR("%s\n", line_str);
+ JPEG_DBG_HIGH("%s\n", line_str);
line_str[0] = '\0';
p_str = line_str;
}
}
if (line_str[0] != '\0')
- JPEG_PR_ERR("%s\n", line_str);
+ JPEG_DBG_HIGH("%s\n", line_str);
}
+
diff --git a/drivers/media/video/msm/jpeg_10/msm_jpeg_hw.h b/drivers/media/video/msm/jpeg_10/msm_jpeg_hw.h
index 73a0e27..e90b941 100644
--- a/drivers/media/video/msm/jpeg_10/msm_jpeg_hw.h
+++ b/drivers/media/video/msm/jpeg_10/msm_jpeg_hw.h
@@ -28,6 +28,8 @@
uint32_t cbcr_len;
uint32_t num_of_mcu_rows;
struct ion_handle *handle;
+ uint32_t pln2_addr;
+ uint32_t pln2_offset;
};
struct msm_jpeg_hw_pingpong {
@@ -38,14 +40,14 @@
};
int msm_jpeg_hw_pingpong_update(struct msm_jpeg_hw_pingpong *pingpong_hw,
- struct msm_jpeg_hw_buf *buf);
+ struct msm_jpeg_hw_buf *buf, void *);
void *msm_jpeg_hw_pingpong_irq(struct msm_jpeg_hw_pingpong *pingpong_hw);
void *msm_jpeg_hw_pingpong_active_buffer(struct msm_jpeg_hw_pingpong
*pingpong_hw);
-void msm_jpeg_hw_irq_clear(uint32_t, uint32_t);
-int msm_jpeg_hw_irq_get_status(void);
-long msm_jpeg_hw_encode_output_size(void);
+void msm_jpeg_hw_irq_clear(uint32_t, uint32_t, void *);
+int msm_jpeg_hw_irq_get_status(void *);
+long msm_jpeg_hw_encode_output_size(void *);
#define MSM_JPEG_HW_MASK_COMP_FRAMEDONE \
MSM_JPEG_HW_IRQ_STATUS_FRAMEDONE_MASK
#define MSM_JPEG_HW_MASK_COMP_FE \
@@ -56,13 +58,14 @@
#define MSM_JPEG_HW_MASK_COMP_RESET_ACK \
MSM_JPEG_HW_IRQ_STATUS_RESET_ACK_MASK
#define MSM_JPEG_HW_MASK_COMP_ERR \
- (MSM_JPEG_HW_IRQ_STATUS_FE_RTOVF_MASK | \
- MSM_JPEG_HW_IRQ_STATUS_FE_VFE_OVERFLOW_MASK | \
- MSM_JPEG_HW_IRQ_STATUS_WE_Y_BUFFER_OVERFLOW_MASK | \
- MSM_JPEG_HW_IRQ_STATUS_WE_CBCR_BUFFER_OVERFLOW_MASK | \
- MSM_JPEG_HW_IRQ_STATUS_WE_CH0_DATAFIFO_OVERFLOW_MASK | \
- MSM_JPEG_HW_IRQ_STATUS_WE_CH1_DATAFIFO_OVERFLOW_MASK | \
- MSM_JPEG_HW_IRQ_STATUS_BUS_ERROR_MASK | \
+ (MSM_JPEG_HW_IRQ_STATUS_DCD_UNESCAPED_FF | \
+ MSM_JPEG_HW_IRQ_STATUS_DCD_HUFFMAN_ERROR | \
+ MSM_JPEG_HW_IRQ_STATUS_DCD_COEFFICIENT_ERR | \
+ MSM_JPEG_HW_IRQ_STATUS_DCD_MISSING_BIT_STUFF | \
+ MSM_JPEG_HW_IRQ_STATUS_DCD_SCAN_UNDERFLOW | \
+ MSM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM | \
+ MSM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM_SEQ | \
+ MSM_JPEG_HW_IRQ_STATUS_DCD_MISSING_RSM | \
MSM_JPEG_HW_IRQ_STATUS_VIOLATION_MASK)
#define msm_jpeg_hw_irq_is_frame_done(jpeg_irq_status) \
@@ -77,25 +80,26 @@
(jpeg_irq_status & MSM_JPEG_HW_MASK_COMP_ERR)
void msm_jpeg_hw_fe_buffer_update(struct msm_jpeg_hw_buf *p_input,
- uint8_t pingpong_index);
+ uint8_t pingpong_index, void *);
void msm_jpeg_hw_we_buffer_update(struct msm_jpeg_hw_buf *p_input,
- uint8_t pingpong_index);
+ uint8_t pingpong_index, void *);
void msm_jpeg_hw_we_buffer_cfg(uint8_t is_realtime);
-void msm_jpeg_hw_fe_start(void);
+void msm_jpeg_hw_fe_start(void *);
void msm_jpeg_hw_clk_cfg(void);
void msm_jpeg_hw_reset(void *base, int size);
void msm_jpeg_hw_irq_cfg(void);
-void msm_jpeg_hw_init(void *base, int size);
-uint32_t msm_jpeg_hw_read(struct msm_jpeg_hw_cmd *hw_cmd_p);
-void msm_jpeg_hw_write(struct msm_jpeg_hw_cmd *hw_cmd_p);
-int msm_jpeg_hw_wait(struct msm_jpeg_hw_cmd *hw_cmd_p, int m_us);
-void msm_jpeg_hw_delay(struct msm_jpeg_hw_cmd *hw_cmd_p, int m_us);
-int msm_jpeg_hw_exec_cmds(struct msm_jpeg_hw_cmd *hw_cmd_p, int m_cmds);
+uint32_t msm_jpeg_hw_read(struct msm_jpeg_hw_cmd *, void *);
+void msm_jpeg_hw_write(struct msm_jpeg_hw_cmd *, void *);
+int msm_jpeg_hw_wait(struct msm_jpeg_hw_cmd *, int, void *);
+void msm_jpeg_hw_delay(struct msm_jpeg_hw_cmd *, int);
+int msm_jpeg_hw_exec_cmds(struct msm_jpeg_hw_cmd *, int ,
+ uint32_t , void *);
void msm_jpeg_hw_region_dump(int size);
-void msm_jpeg_io_dump(int size);
+void msm_jpeg_io_dump(void *base, int size);
+void msm_jpeg_decode_status(void *base);
#endif /* MSM_JPEG_HW_H */
diff --git a/drivers/media/video/msm/jpeg_10/msm_jpeg_hw_reg.h b/drivers/media/video/msm/jpeg_10/msm_jpeg_hw_reg.h
index ae64c32..928d59e 100644
--- a/drivers/media/video/msm/jpeg_10/msm_jpeg_hw_reg.h
+++ b/drivers/media/video/msm/jpeg_10/msm_jpeg_hw_reg.h
@@ -37,30 +37,25 @@
#define MSM_JPEG_HW_IRQ_STATUS_WE_CBCR_PINGPONG_MASK 0x00000020
#define MSM_JPEG_HW_IRQ_STATUS_WE_CBCR_PINGPONG_SHIFT 0x00000005
-#define MSM_JPEG_HW_IRQ_STATUS_WE_Y_BUFFER_OVERFLOW_MASK 0x00000040
-#define MSM_JPEG_HW_IRQ_STATUS_WE_Y_BUFFER_OVERFLOW_SHIFT 0x00000006
-
-#define MSM_JPEG_HW_IRQ_STATUS_WE_CBCR_BUFFER_OVERFLOW_MASK 0x00000080
-#define MSM_JPEG_HW_IRQ_STATUS_WE_CBCR_BUFFER_OVERFLOW_SHIFT 0x00000007
-
-#define MSM_JPEG_HW_IRQ_STATUS_WE_CH0_DATAFIFO_OVERFLOW_MASK 0x00000100
-#define MSM_JPEG_HW_IRQ_STATUS_WE_CH0_DATAFIFO_OVERFLOW_SHIFT 0x00000008
-
-#define MSM_JPEG_HW_IRQ_STATUS_WE_CH1_DATAFIFO_OVERFLOW_MASK 0x00000200
-#define MSM_JPEG_HW_IRQ_STATUS_WE_CH1_DATAFIFO_OVERFLOW_SHIFT 0x00000009
-
#define MSM_JPEG_HW_IRQ_STATUS_RESET_ACK_MASK 0x10000000
#define MSM_JPEG_HW_IRQ_STATUS_RESET_ACK_SHIFT 0x0000000a
#define MSM_JPEG_HW_IRQ_STATUS_BUS_ERROR_MASK 0x00000800
#define MSM_JPEG_HW_IRQ_STATUS_BUS_ERROR_SHIFT 0x0000000b
-#define MSM_JPEG_HW_IRQ_STATUS_VIOLATION_MASK 0x00001000
-#define MSM_JPEG_HW_IRQ_STATUS_VIOLATION_SHIFT 0x0000000c
+#define MSM_JPEG_HW_IRQ_STATUS_DCD_UNESCAPED_FF (0x1<<19)
+#define MSM_JPEG_HW_IRQ_STATUS_DCD_HUFFMAN_ERROR (0x1<<20)
+#define MSM_JPEG_HW_IRQ_STATUS_DCD_COEFFICIENT_ERR (0x1<<21)
+#define MSM_JPEG_HW_IRQ_STATUS_DCD_MISSING_BIT_STUFF (0x1<<22)
+#define MSM_JPEG_HW_IRQ_STATUS_DCD_SCAN_UNDERFLOW (0x1<<23)
+#define MSM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM (0x1<<24)
+#define MSM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM_SEQ (0x1<<25)
+#define MSM_JPEG_HW_IRQ_STATUS_DCD_MISSING_RSM (0x1<<26)
+#define MSM_JPEG_HW_IRQ_STATUS_VIOLATION_MASK (0x1<<29)
#define JPEG_OFFLINE_CMD_START 0x00000001
-#define JPEG_RESET_DEFAULT 0x00000003 /* cfff? */
+#define JPEG_RESET_DEFAULT 0x00020000
#define JPEG_IRQ_DISABLE_ALL 0x00000000
#define JPEG_IRQ_CLEAR_ALL 0xFFFFFFFF
@@ -87,6 +82,9 @@
#define JPEG_PLN1_WR_PNTR_ADDR (JPEG_REG_BASE + 0x000000D0)
#define JPEG_PLN1_WR_PNTR_BMSK 0xFFFFFFFF
+#define JPEG_PLN2_WR_PNTR_ADDR (JPEG_REG_BASE + 0x000000D4)
+#define JPEG_PLN2_WR_PNTR_BMSK 0xFFFFFFFF
+
#define JPEG_IRQ_MASK_ADDR (JPEG_REG_BASE + 0x00000018)
#define JPEG_IRQ_MASK_BMSK 0xFFFFFFFF
#define JPEG_IRQ_ALLSOURCES_ENABLE 0xFFFFFFFF
@@ -103,6 +101,11 @@
#define JPEG_ENCODE_OUTPUT_SIZE_STATUS_ADDR (JPEG_REG_BASE + 0x00000180)
#define JPEG_ENCODE_OUTPUT_SIZE_STATUS_BMSK 0x1FFFFFFF
+#define JPEG_DECODE_MCUS_DECODED_STATUS (JPEG_REG_BASE + 0x00000258)
+#define JPEG_DECODE_BITS_CONSUMED_STATUS (JPEG_REG_BASE + 0x0000025C)
+#define JPEG_DECODE_PRED_Y_STATE (JPEG_REG_BASE + 0x00000260)
+#define JPEG_DECODE_PRED_C_STATE (JPEG_REG_BASE + 0x00000264)
+#define JPEG_DECODE_RSM_STATE (JPEG_REG_BASE + 0x00000268)
#define VBIF_BASE_ADDRESS 0xFDA60000
#define VBIF_REGION_SIZE 0xC30
diff --git a/drivers/media/video/msm/jpeg_10/msm_jpeg_platform.c b/drivers/media/video/msm/jpeg_10/msm_jpeg_platform.c
index 981c56c..06135ec 100644
--- a/drivers/media/video/msm/jpeg_10/msm_jpeg_platform.c
+++ b/drivers/media/video/msm/jpeg_10/msm_jpeg_platform.c
@@ -26,36 +26,32 @@
#include "msm_jpeg_common.h"
#include "msm_jpeg_hw.h"
-/* AXI rate in KHz */
-struct ion_client *jpeg_client;
-static void *jpeg_vbif;
-
-void msm_jpeg_platform_p2v(struct file *file,
- struct ion_handle **ionhandle, int domain_num)
+void msm_jpeg_platform_p2v(struct msm_jpeg_device *pgmn_dev, struct file *file,
+ struct ion_handle **ionhandle, int domain_num)
{
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
- ion_unmap_iommu(jpeg_client, *ionhandle, domain_num, 0);
- ion_free(jpeg_client, *ionhandle);
+ ion_unmap_iommu(pgmn_dev->jpeg_client, *ionhandle, domain_num, 0);
+ ion_free(pgmn_dev->jpeg_client, *ionhandle);
*ionhandle = NULL;
#elif CONFIG_ANDROID_PMEM
put_pmem_file(file);
#endif
}
-uint32_t msm_jpeg_platform_v2p(int fd, uint32_t len, struct file **file_p,
- struct ion_handle **ionhandle, int domain_num)
-{
+uint32_t msm_jpeg_platform_v2p(struct msm_jpeg_device *pgmn_dev, int fd,
+ uint32_t len, struct file **file_p, struct ion_handle **ionhandle,
+ int domain_num) {
unsigned long paddr;
unsigned long size;
int rc;
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
- *ionhandle = ion_import_dma_buf(jpeg_client, fd);
+ *ionhandle = ion_import_dma_buf(pgmn_dev->jpeg_client, fd);
if (IS_ERR_OR_NULL(*ionhandle))
return 0;
- rc = ion_map_iommu(jpeg_client, *ionhandle, domain_num, 0,
- SZ_4K, 0, &paddr, (unsigned long *)&size, UNCACHED, 0);
- JPEG_DBG("%s:%d] addr 0x%x size %ld", __func__, __LINE__,
+ rc = ion_map_iommu(pgmn_dev->jpeg_client, *ionhandle, domain_num, 0,
+ SZ_4K, 0, &paddr, (unsigned long *)&size, 0,
+0); JPEG_DBG("%s:%d] addr 0x%x size %ld", __func__, __LINE__,
(uint32_t)paddr, size);
#elif CONFIG_ANDROID_PMEM
@@ -81,7 +77,7 @@
return paddr;
error1:
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
- ion_free(jpeg_client, *ionhandle);
+ ion_free(pgmn_dev->jpeg_client, *ionhandle);
#endif
return 0;
}
@@ -149,10 +145,10 @@
}
jpeg_irq = jpeg_irq_res->start;
JPEG_DBG("%s base address: 0x%x, jpeg irq number: %d\n", __func__,
- jpeg_mem->start, jpeg_irq);
+ jpeg_mem->start, jpeg_irq);
jpeg_io = request_mem_region(jpeg_mem->start,
- resource_size(jpeg_mem), pdev->name);
+ resource_size(jpeg_mem), pdev->name);
if (!jpeg_io) {
JPEG_PR_ERR("%s: region already claimed\n", __func__);
return -EBUSY;
@@ -165,14 +161,14 @@
goto fail1;
}
- jpeg_vbif = ioremap(VBIF_BASE_ADDRESS, VBIF_REGION_SIZE);
- if (!jpeg_vbif) {
+ pgmn_dev->jpeg_vbif = ioremap(VBIF_BASE_ADDRESS, VBIF_REGION_SIZE);
+ if (!pgmn_dev->jpeg_vbif) {
rc = -ENOMEM;
JPEG_PR_ERR("%s:%d] ioremap failed\n", __func__, __LINE__);
goto fail1;
}
JPEG_DBG("%s:%d] jpeg_vbif 0x%x", __func__, __LINE__,
- (uint32_t)jpeg_vbif);
+ (uint32_t)pgmn_dev->jpeg_vbif);
pgmn_dev->jpeg_fs = regulator_get(&pgmn_dev->pdev->dev, "vdd");
rc = regulator_enable(pgmn_dev->jpeg_fs);
@@ -202,9 +198,8 @@
(uint32_t)pgmn_dev->iommu_ctx_arr[i]);
}
#endif
- set_vbif_params(jpeg_vbif);
+ set_vbif_params(pgmn_dev->jpeg_vbif);
- msm_jpeg_hw_init(jpeg_base, resource_size(jpeg_mem));
rc = request_irq(jpeg_irq, handler, IRQF_TRIGGER_RISING, "jpeg",
context);
if (rc) {
@@ -218,7 +213,7 @@
*irq = jpeg_irq;
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
- jpeg_client = msm_ion_client_create(-1, "camera/jpeg");
+ pgmn_dev->jpeg_client = msm_ion_client_create(-1, "camera/jpeg");
#endif
JPEG_DBG("%s:%d] success\n", __func__, __LINE__);
@@ -276,11 +271,11 @@
regulator_disable(pgmn_dev->jpeg_fs);
pgmn_dev->jpeg_fs = NULL;
}
- iounmap(jpeg_vbif);
+ iounmap(pgmn_dev->jpeg_vbif);
iounmap(base);
release_mem_region(mem->start, resource_size(mem));
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
- ion_client_destroy(jpeg_client);
+ ion_client_destroy(pgmn_dev->jpeg_client);
#endif
JPEG_DBG("%s:%d] success\n", __func__, __LINE__);
return result;
diff --git a/drivers/media/video/msm/jpeg_10/msm_jpeg_platform.h b/drivers/media/video/msm/jpeg_10/msm_jpeg_platform.h
index 8a37cef..cd80d2e 100644
--- a/drivers/media/video/msm/jpeg_10/msm_jpeg_platform.h
+++ b/drivers/media/video/msm/jpeg_10/msm_jpeg_platform.h
@@ -18,12 +18,13 @@
#include <linux/ion.h>
#include <linux/iommu.h>
#include <mach/iommu.h>
+#include "msm_jpeg_sync.h"
-
-void msm_jpeg_platform_p2v(struct file *file,
- struct ion_handle **ionhandle, int domain_num);
-uint32_t msm_jpeg_platform_v2p(int fd, uint32_t len, struct file **file,
- struct ion_handle **ionhandle, int domain_num);
+void msm_jpeg_platform_p2v(struct msm_jpeg_device *pgmn_dev, struct file *file,
+ struct ion_handle **ionhandle, int domain_num);
+uint32_t msm_jpeg_platform_v2p(struct msm_jpeg_device *pgmn_dev, int fd,
+ uint32_t len, struct file **file, struct ion_handle **ionhandle,
+ int domain_num);
int msm_jpeg_platform_clk_enable(void);
int msm_jpeg_platform_clk_disable(void);
diff --git a/drivers/media/video/msm/jpeg_10/msm_jpeg_sync.c b/drivers/media/video/msm/jpeg_10/msm_jpeg_sync.c
index 6ac4a5e..a0aaf03 100644
--- a/drivers/media/video/msm/jpeg_10/msm_jpeg_sync.c
+++ b/drivers/media/video/msm/jpeg_10/msm_jpeg_sync.c
@@ -22,7 +22,9 @@
#include "msm_jpeg_platform.h"
#include "msm_jpeg_common.h"
-static int release_buf;
+#define JPEG_REG_SIZE 0x308
+#define JPEG_DEV_CNT 3
+#define JPEG_DEC_ID 2
inline void msm_jpeg_q_init(char const *name, struct msm_jpeg_q *q_p)
{
@@ -143,15 +145,15 @@
return 0;
}
-inline void msm_jpeg_outbuf_q_cleanup(struct msm_jpeg_q *q_p,
- int domain_num)
+inline void msm_jpeg_outbuf_q_cleanup(struct msm_jpeg_device *pgmn_dev,
+ struct msm_jpeg_q *q_p, int domain_num)
{
struct msm_jpeg_core_buf *buf_p;
JPEG_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
do {
buf_p = msm_jpeg_q_out(q_p);
if (buf_p) {
- msm_jpeg_platform_p2v(buf_p->file,
+ msm_jpeg_platform_p2v(pgmn_dev, buf_p->file,
&buf_p->handle, domain_num);
JPEG_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
kfree(buf_p);
@@ -289,10 +291,10 @@
if (buf_out) {
JPEG_DBG("%s:%d] 0x%08x %d\n", __func__, __LINE__,
(int) buf_out->y_buffer_addr, buf_out->y_len);
- rc = msm_jpeg_core_we_buf_update(buf_out);
+ rc = msm_jpeg_core_we_buf_update(pgmn_dev, buf_out);
kfree(buf_out);
} else {
- msm_jpeg_core_we_buf_reset(buf_in);
+ msm_jpeg_core_we_buf_reset(pgmn_dev, buf_in);
JPEG_DBG("%s:%d] no output buffer\n", __func__, __LINE__);
rc = -2;
}
@@ -320,7 +322,7 @@
}
buf_cmd = buf_p->vbuf;
- msm_jpeg_platform_p2v(buf_p->file, &buf_p->handle,
+ msm_jpeg_platform_p2v(pgmn_dev, buf_p->file, &buf_p->handle,
pgmn_dev->domain_num);
kfree(buf_p);
@@ -347,6 +349,7 @@
{
struct msm_jpeg_buf buf_cmd;
struct msm_jpeg_core_buf *buf_p;
+ memset(&buf_cmd, 0x0, sizeof(struct msm_jpeg_buf));
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
if (copy_from_user(&buf_cmd, arg, sizeof(struct msm_jpeg_buf))) {
@@ -364,7 +367,7 @@
__func__, __LINE__, (int) buf_cmd.vaddr, buf_cmd.y_len,
buf_cmd.fd);
- buf_p->y_buffer_addr = msm_jpeg_platform_v2p(buf_cmd.fd,
+ buf_p->y_buffer_addr = msm_jpeg_platform_v2p(pgmn_dev, buf_cmd.fd,
buf_cmd.y_len, &buf_p->file, &buf_p->handle,
pgmn_dev->domain_num);
if (!buf_p->y_buffer_addr) {
@@ -372,9 +375,18 @@
kfree(buf_p);
return -EFAULT;
}
- JPEG_DBG("%s:%d]After v2p y_address =0x%08x, handle = %p\n",
- __func__, __LINE__, buf_p->y_buffer_addr, buf_p->handle);
+
+ if (buf_cmd.cbcr_len)
+ buf_p->cbcr_buffer_addr = buf_p->y_buffer_addr +
+ buf_cmd.y_len;
+ else
+ buf_p->cbcr_buffer_addr = 0x0;
+
+ JPEG_DBG("%s:%d] After v2p pln0_addr =0x%x,pln0_len %d pl1_len %d",
+ __func__, __LINE__, buf_p->y_buffer_addr,
+ buf_cmd.y_len, buf_cmd.cbcr_len);
buf_p->y_len = buf_cmd.y_len;
+ buf_p->cbcr_len = buf_cmd.cbcr_len;
buf_p->vbuf = buf_cmd;
msm_jpeg_q_in(&pgmn_dev->output_buf_q, buf_p);
@@ -403,9 +415,9 @@
buf_out = msm_jpeg_q_out(&pgmn_dev->input_buf_q);
if (buf_out) {
- rc = msm_jpeg_core_fe_buf_update(buf_out);
+ rc = msm_jpeg_core_fe_buf_update(pgmn_dev, buf_out);
kfree(buf_out);
- msm_jpeg_core_fe_start();
+ msm_jpeg_core_fe_start(pgmn_dev);
} else {
JPEG_DBG("%s:%d] no input buffer\n", __func__, __LINE__);
rc = -EFAULT;
@@ -433,8 +445,8 @@
}
buf_cmd = buf_p->vbuf;
- msm_jpeg_platform_p2v(buf_p->file, &buf_p->handle,
- pgmn_dev->domain_num);
+ msm_jpeg_platform_p2v(pgmn_dev, buf_p->file, &buf_p->handle,
+ pgmn_dev->domain_num);
kfree(buf_p);
JPEG_DBG("%s:%d] 0x%08x %d\n", __func__, __LINE__,
@@ -460,6 +472,7 @@
{
struct msm_jpeg_core_buf *buf_p;
struct msm_jpeg_buf buf_cmd;
+ memset(&buf_cmd, 0x0, sizeof(struct msm_jpeg_buf));
if (copy_from_user(&buf_cmd, arg, sizeof(struct msm_jpeg_buf))) {
JPEG_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
@@ -475,20 +488,26 @@
JPEG_DBG("%s:%d] 0x%08x %d\n", __func__, __LINE__,
(int) buf_cmd.vaddr, buf_cmd.y_len);
- buf_p->y_buffer_addr = msm_jpeg_platform_v2p(buf_cmd.fd,
+ buf_p->y_buffer_addr = msm_jpeg_platform_v2p(pgmn_dev, buf_cmd.fd,
buf_cmd.y_len + buf_cmd.cbcr_len, &buf_p->file,
&buf_p->handle, pgmn_dev->domain_num) + buf_cmd.offset
+ buf_cmd.y_off;
buf_p->y_len = buf_cmd.y_len;
- buf_p->cbcr_buffer_addr = buf_p->y_buffer_addr + buf_cmd.y_len
- + buf_cmd.cbcr_off;
buf_p->cbcr_len = buf_cmd.cbcr_len;
buf_p->num_of_mcu_rows = buf_cmd.num_of_mcu_rows;
+ buf_p->y_len = buf_cmd.y_len;
+ buf_p->cbcr_len = buf_cmd.cbcr_len;
+ if (buf_cmd.cbcr_len)
+ buf_p->cbcr_buffer_addr = buf_p->y_buffer_addr + buf_cmd.y_len
+ + buf_cmd.cbcr_off;
+ else
+ buf_p->cbcr_buffer_addr = 0x0;
+
JPEG_DBG("%s: y_addr=%x, y_len=%x, cbcr_addr=%x, cbcr_len=%x, fd =%d\n",
__func__, buf_p->y_buffer_addr, buf_p->y_len,
buf_p->cbcr_buffer_addr, buf_p->cbcr_len, buf_cmd.fd);
- if (!buf_p->y_buffer_addr || !buf_p->cbcr_buffer_addr) {
+ if (!buf_p->y_buffer_addr) {
JPEG_PR_ERR("%s:%d] v2p wrong\n", __func__, __LINE__);
kfree(buf_p);
return -EFAULT;
@@ -559,13 +578,15 @@
JPEG_DBG("%s:%d] platform resources - mem %p, base %p, irq %d\n",
__func__, __LINE__,
pgmn_dev->mem, pgmn_dev->base, pgmn_dev->irq);
+ pgmn_dev->res_size = resource_size(pgmn_dev->mem);
msm_jpeg_q_cleanup(&pgmn_dev->evt_q);
msm_jpeg_q_cleanup(&pgmn_dev->output_rtn_q);
- msm_jpeg_outbuf_q_cleanup(&pgmn_dev->output_buf_q,
- pgmn_dev->domain_num); msm_jpeg_q_cleanup(&pgmn_dev->input_rtn_q);
+ msm_jpeg_outbuf_q_cleanup(pgmn_dev, &pgmn_dev->output_buf_q,
+ pgmn_dev->domain_num);
+ msm_jpeg_q_cleanup(&pgmn_dev->input_rtn_q);
msm_jpeg_q_cleanup(&pgmn_dev->input_buf_q);
- msm_jpeg_core_init();
+ msm_jpeg_core_init(pgmn_dev);
JPEG_DBG("%s:%d] success\n", __func__, __LINE__);
return rc;
@@ -583,13 +604,14 @@
pgmn_dev->open_count--;
mutex_unlock(&pgmn_dev->lock);
- msm_jpeg_core_release(release_buf, pgmn_dev->domain_num);
+ msm_jpeg_core_release(pgmn_dev, pgmn_dev->domain_num);
msm_jpeg_q_cleanup(&pgmn_dev->evt_q);
msm_jpeg_q_cleanup(&pgmn_dev->output_rtn_q);
- msm_jpeg_outbuf_q_cleanup(&pgmn_dev->output_buf_q,
- pgmn_dev->domain_num);
+ msm_jpeg_outbuf_q_cleanup(pgmn_dev, &pgmn_dev->output_buf_q,
+ pgmn_dev->domain_num);
msm_jpeg_q_cleanup(&pgmn_dev->input_rtn_q);
- msm_jpeg_outbuf_q_cleanup(&pgmn_dev->input_buf_q, pgmn_dev->domain_num);
+ msm_jpeg_outbuf_q_cleanup(pgmn_dev, &pgmn_dev->input_buf_q,
+ pgmn_dev->domain_num);
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
if (pgmn_dev->open_count)
@@ -598,6 +620,7 @@
msm_jpeg_platform_release(pgmn_dev->mem, pgmn_dev->base,
pgmn_dev->irq, pgmn_dev);
+ JPEG_DBG("%s:%d]\n", __func__, __LINE__);
return 0;
}
@@ -612,7 +635,8 @@
return -EFAULT;
}
- is_copy_to_user = msm_jpeg_hw_exec_cmds(&hw_cmd, 1);
+ is_copy_to_user = msm_jpeg_hw_exec_cmds(&hw_cmd, 1,
+ pgmn_dev->res_size, pgmn_dev->base);
JPEG_DBG("%s:%d] type %d, n %d, offset %d, mask %x, data %x,pdata %x\n",
__func__, __LINE__, hw_cmd.type, hw_cmd.n, hw_cmd.offset,
hw_cmd.mask, hw_cmd.data, (int) hw_cmd.pdata);
@@ -657,7 +681,8 @@
hw_cmd_p = (struct msm_jpeg_hw_cmd *) &(hw_cmds_p->hw_cmd);
- is_copy_to_user = msm_jpeg_hw_exec_cmds(hw_cmd_p, m);
+ is_copy_to_user = msm_jpeg_hw_exec_cmds(hw_cmd_p, m,
+ pgmn_dev->res_size, pgmn_dev->base);
if (is_copy_to_user >= 0) {
if (copy_to_user(arg, hw_cmds_p, len)) {
@@ -678,12 +703,12 @@
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
- release_buf = 1;
+ pgmn_dev->release_buf = 1;
for (i = 0; i < 2; i++) {
buf_out = msm_jpeg_q_out(&pgmn_dev->input_buf_q);
if (buf_out) {
- msm_jpeg_core_fe_buf_update(buf_out);
+ msm_jpeg_core_fe_buf_update(pgmn_dev, buf_out);
kfree(buf_out);
} else {
JPEG_DBG("%s:%d] no input buffer\n", __func__,
@@ -696,8 +721,8 @@
buf_out_free[i] = msm_jpeg_q_out(&pgmn_dev->output_buf_q);
if (buf_out_free[i]) {
- msm_jpeg_core_we_buf_update(buf_out_free[i]);
- release_buf = 0;
+ msm_jpeg_core_we_buf_update(pgmn_dev, buf_out_free[i]);
+ pgmn_dev->release_buf = 0;
} else {
JPEG_DBG("%s:%d] no output buffer\n",
__func__, __LINE__);
@@ -708,6 +733,7 @@
for (i = 0; i < 2; i++)
kfree(buf_out_free[i]);
+ msm_jpeg_io_dump(pgmn_dev->base, JPEG_REG_SIZE);
rc = msm_jpeg_ioctl_hw_cmds(pgmn_dev, arg);
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
return rc;
@@ -727,7 +753,7 @@
pgmn_dev->op_mode = ctrl_cmd.type;
- rc = msm_jpeg_core_reset(pgmn_dev->op_mode, pgmn_dev->base,
+ rc = msm_jpeg_core_reset(pgmn_dev, pgmn_dev->op_mode, pgmn_dev->base,
resource_size(pgmn_dev->mem));
return rc;
}
@@ -736,7 +762,7 @@
unsigned long arg)
{
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
- msm_jpeg_io_dump(arg);
+ msm_jpeg_io_dump(pgmn_dev->base, JPEG_REG_SIZE);
return 0;
}
@@ -836,9 +862,10 @@
int __msm_jpeg_init(struct msm_jpeg_device *pgmn_dev)
{
- int rc = 0, i = 0;
+ int rc = 0, i = 0, j = 0;
int idx = 0;
- char *iommu_name[3] = {"jpeg_enc0", "jpeg_enc1", "jpeg_dec"};
+ char *iommu_name[JPEG_DEV_CNT] = {"jpeg_enc0", "jpeg_enc1",
+ "jpeg_dec"};
mutex_init(&pgmn_dev->lock);
@@ -847,6 +874,7 @@
idx = pgmn_dev->pdev->id;
pgmn_dev->idx = idx;
pgmn_dev->iommu_cnt = 1;
+ pgmn_dev->decode_flag = (idx == JPEG_DEC_ID);
msm_jpeg_q_init("evt_q", &pgmn_dev->evt_q);
msm_jpeg_q_init("output_rtn_q", &pgmn_dev->output_rtn_q);
@@ -855,21 +883,23 @@
msm_jpeg_q_init("input_buf_q", &pgmn_dev->input_buf_q);
#ifdef CONFIG_MSM_IOMMU
-/*get device context for IOMMU*/
+ j = (pgmn_dev->iommu_cnt <= 1) ? idx : 0;
+ /*get device context for IOMMU*/
for (i = 0; i < pgmn_dev->iommu_cnt; i++) {
- pgmn_dev->iommu_ctx_arr[i] = msm_iommu_get_ctx(iommu_name[i]);
- JPEG_DBG("%s:%d] name %s", __func__, __LINE__, iommu_name[i]);
+ pgmn_dev->iommu_ctx_arr[i] = msm_iommu_get_ctx(iommu_name[j]);
+ JPEG_DBG("%s:%d] name %s", __func__, __LINE__, iommu_name[j]);
JPEG_DBG("%s:%d] ctx 0x%x", __func__, __LINE__,
- (uint32_t)pgmn_dev->iommu_ctx_arr[i]);
+ (uint32_t)pgmn_dev->iommu_ctx_arr[i]);
if (!pgmn_dev->iommu_ctx_arr[i]) {
JPEG_PR_ERR("%s: No iommu fw context found\n",
__func__);
goto error;
}
+ j++;
}
pgmn_dev->domain_num = camera_register_domain();
JPEG_DBG("%s:%d] dom_num 0x%x", __func__, __LINE__,
- pgmn_dev->domain_num);
+ pgmn_dev->domain_num);
if (pgmn_dev->domain_num < 0) {
JPEG_PR_ERR("%s: could not register domain\n", __func__);
goto error;
diff --git a/drivers/media/video/msm/jpeg_10/msm_jpeg_sync.h b/drivers/media/video/msm/jpeg_10/msm_jpeg_sync.h
index 1d82060..1ac4838 100644
--- a/drivers/media/video/msm/jpeg_10/msm_jpeg_sync.h
+++ b/drivers/media/video/msm/jpeg_10/msm_jpeg_sync.h
@@ -21,7 +21,7 @@
#include <linux/platform_device.h>
#include <media/v4l2-device.h>
#include <media/v4l2-subdev.h>
-#include "msm_jpeg_core.h"
+#include "msm_jpeg_hw.h"
#define JPEG_7X 0x1
#define JPEG_8X60 (0x1 << 1)
@@ -88,6 +88,17 @@
struct iommu_domain *domain;
struct device *iommu_ctx_arr[3];
int iommu_cnt;
+ int decode_flag;
+ struct ion_client *jpeg_client;
+ void *jpeg_vbif;
+ int release_buf;
+ struct msm_jpeg_hw_pingpong fe_pingpong_buf;
+ struct msm_jpeg_hw_pingpong we_pingpong_buf;
+ int we_pingpong_index;
+ int reset_done_ack;
+ spinlock_t reset_lock;
+ wait_queue_head_t reset_wait;
+ uint32_t res_size;
};
int __msm_jpeg_open(struct msm_jpeg_device *pgmn_dev);
diff --git a/drivers/media/video/msm/mercury/msm_mercury_platform.c b/drivers/media/video/msm/mercury/msm_mercury_platform.c
index e90c63c..3dc7f4b 100644
--- a/drivers/media/video/msm/mercury/msm_mercury_platform.c
+++ b/drivers/media/video/msm/mercury/msm_mercury_platform.c
@@ -58,7 +58,7 @@
rc = ion_map_iommu(mercury_client, *ionhandle, CAMERA_DOMAIN,
GEN_POOL, SZ_4K, 0, &paddr,
- (unsigned long *)&size, UNCACHED, 0);
+ (unsigned long *)&size, 0, 0);
#elif CONFIG_ANDROID_PMEM
unsigned long kvstart;
rc = get_pmem_file(fd, &paddr, &kvstart, &size, file_p);
diff --git a/drivers/media/video/msm/msm.h b/drivers/media/video/msm/msm.h
index cb59d68..17303dd 100644
--- a/drivers/media/video/msm/msm.h
+++ b/drivers/media/video/msm/msm.h
@@ -210,11 +210,13 @@
int dirty;
int node_type;
struct timeval timestamp;
+ uint32_t frame_id;
};
struct msm_cam_timestamp {
uint8_t present;
struct timeval timestamp;
+ uint32_t frame_id;
};
struct msm_cam_buf_map_info {
@@ -720,7 +722,7 @@
int msm_cam_register_subdev_node(struct v4l2_subdev *sd,
struct msm_cam_subdev_info *sd_info);
int msm_mctl_find_sensor_subdevs(struct msm_cam_media_controller *p_mctl,
- int core_index);
+ uint8_t csiphy_core_index, uint8_t csid_core_index);
int msm_server_open_client(int *p_qidx);
int msm_server_send_ctrl(struct msm_ctrl_cmd *out, int ctrl_id);
int msm_server_close_client(int idx);
diff --git a/drivers/media/video/msm/msm_isp.c b/drivers/media/video/msm/msm_isp.c
index 2613986..77922e2 100644
--- a/drivers/media/video/msm/msm_isp.c
+++ b/drivers/media/video/msm/msm_isp.c
@@ -148,6 +148,8 @@
image_mode = MSM_V4L2_EXT_CAPTURE_MODE_RDI1;
else
image_mode = -1;
+ } else if (VFE_MSG_V2X_LIVESHOT_PRIMARY == vfe_msg) {
+ image_mode = MSM_V4L2_EXT_CAPTURE_MODE_V2X_LIVESHOT;
} else
image_mode = -1;
@@ -555,6 +557,7 @@
case CMD_AXI_CFG_PRIM_ALL_CHNLS|CMD_AXI_CFG_SEC:
case CMD_AXI_START:
case CMD_AXI_STOP:
+ case CMD_AXI_RESET:
case CMD_AXI_CFG_TERT1:
case CMD_AXI_CFG_TERT2:
/* Dont need to pass buffer information.
@@ -708,8 +711,12 @@
int rc = -EINVAL;
void __user *argp = (void __user *)arg;
- struct v4l2_subdev *sd = pmctl->vfe_sdev;
-
+ struct v4l2_subdev *sd;
+ if (!pmctl->vfe_sdev) {
+ pr_err("%s vfe subdev is NULL\n", __func__);
+ return -ENXIO;
+ }
+ sd = pmctl->vfe_sdev;
D("%s: cmd %d\n", __func__, _IOC_NR(cmd));
switch (cmd) {
case MSM_CAM_IOCTL_CONFIG_VFE:
diff --git a/drivers/media/video/msm/msm_mctl.c b/drivers/media/video/msm/msm_mctl.c
index c94da2a..3b678c4 100644
--- a/drivers/media/video/msm/msm_mctl.c
+++ b/drivers/media/video/msm/msm_mctl.c
@@ -267,6 +267,11 @@
core, ioctl, VIDIOC_MSM_SENSOR_CFG, argp);
break;
+ case MSM_CAM_IOCTL_OEM:
+ rc = v4l2_subdev_call(p_mctl->sensor_sdev,
+ core, ioctl, VIDIOC_MSM_SENSOR_CFG, argp);
+ break;
+
case MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL: {
struct v4l2_control v4l2_ctrl;
CDBG("subdev call\n");
@@ -529,7 +534,8 @@
wake_lock(&p_mctl->wake_lock);
csid_core = camdev->csid_core;
- rc = msm_mctl_find_sensor_subdevs(p_mctl, csid_core);
+ rc = msm_mctl_find_sensor_subdevs(p_mctl, camdev->csiphy_core,
+ csid_core);
if (rc < 0) {
pr_err("%s: msm_mctl_find_sensor_subdevs failed:%d\n",
__func__, rc);
diff --git a/drivers/media/video/msm/msm_mctl_buf.c b/drivers/media/video/msm/msm_mctl_buf.c
index 953f042..2919d23 100644
--- a/drivers/media/video/msm/msm_mctl_buf.c
+++ b/drivers/media/video/msm/msm_mctl_buf.c
@@ -434,7 +434,11 @@
D("%s Copying timestamp as %ld.%ld", __func__,
cam_ts->timestamp.tv_sec, cam_ts->timestamp.tv_usec);
buf->vidbuf.v4l2_buf.timestamp = cam_ts->timestamp;
+ buf->vidbuf.v4l2_buf.sequence = cam_ts->frame_id;
}
+ D("%s Notify user about buffer %d image_mode %d frame_id %d", __func__,
+ buf->vidbuf.v4l2_buf.index, pcam_inst->image_mode,
+ buf->vidbuf.v4l2_buf.sequence);
vb2_buffer_done(&buf->vidbuf, VB2_BUF_STATE_DONE);
return 0;
}
@@ -557,37 +561,53 @@
struct msm_cam_v4l2_device *pcam = pmctl->pcam_ptr;
int idx;
- /* Valid image mode. Search the mctl node first.
- * If mctl node doesnt have the instance, then
- * search in the user's video node */
- if (pmctl->vfe_output_mode == VFE_OUTPUTS_MAIN_AND_THUMB
- || pmctl->vfe_output_mode == VFE_OUTPUTS_THUMB_AND_MAIN
- || pmctl->vfe_output_mode == VFE_OUTPUTS_MAIN_AND_PREVIEW) {
- if (pcam->mctl_node.dev_inst_map[img_mode]
- && is_buffer_queued(pcam, img_mode)) {
- idx = pcam->mctl_node.dev_inst_map[img_mode]->my_index;
- pcam_inst = pcam->mctl_node.dev_inst[idx];
- D("%s Found instance %p in mctl node device\n",
+ /* Valid image mode. Search the mctl node first.
+ * If mctl node doesnt have the instance, then
+ * search in the user's video node */
+ if (pmctl->vfe_output_mode == VFE_OUTPUTS_MAIN_AND_THUMB
+ || pmctl->vfe_output_mode == VFE_OUTPUTS_THUMB_AND_MAIN) {
+ if (pcam->mctl_node.dev_inst_map[img_mode]
+ && is_buffer_queued(pcam, img_mode)) {
+ idx = pcam->mctl_node.dev_inst_map[img_mode]
+ ->my_index;
+ pcam_inst = pcam->mctl_node.dev_inst[idx];
+ D("%s Found instance %p in mctl node device\n",
+ __func__, pcam_inst);
+ } else if (pcam->dev_inst_map[img_mode]) {
+ idx = pcam->dev_inst_map[img_mode]->my_index;
+ pcam_inst = pcam->dev_inst[idx];
+ D("%s Found instance %p in video device\n",
__func__, pcam_inst);
- } else if (pcam->dev_inst_map[img_mode]) {
- idx = pcam->dev_inst_map[img_mode]->my_index;
- pcam_inst = pcam->dev_inst[idx];
- D("%s Found instance %p in video device\n",
+ }
+ } else if (img_mode == MSM_V4L2_EXT_CAPTURE_MODE_V2X_LIVESHOT) {
+ img_mode = MSM_V4L2_EXT_CAPTURE_MODE_MAIN;
+ if (pcam->mctl_node.dev_inst_map[img_mode] &&
+ is_buffer_queued(pcam, img_mode)) {
+ idx = pcam->mctl_node.dev_inst_map[img_mode]
+ ->my_index;
+ pcam_inst = pcam->mctl_node.dev_inst[idx];
+ D("%s Found instance %p in mctl node device\n",
+ __func__, pcam_inst);
+ } else if (pcam->dev_inst_map[img_mode]) {
+ idx = pcam->dev_inst_map[img_mode]->my_index;
+ pcam_inst = pcam->dev_inst[idx];
+ D("%s Found instance %p in video device\n",
__func__, pcam_inst);
+ }
+ } else {
+ if (pcam->mctl_node.dev_inst_map[img_mode]) {
+ idx = pcam->mctl_node.dev_inst_map[img_mode]
+ ->my_index;
+ pcam_inst = pcam->mctl_node.dev_inst[idx];
+ D("%s Found instance %p in mctl node device\n",
+ __func__, pcam_inst);
+ } else if (pcam->dev_inst_map[img_mode]) {
+ idx = pcam->dev_inst_map[img_mode]->my_index;
+ pcam_inst = pcam->dev_inst[idx];
+ D("%s Found instance %p in video device\n",
+ __func__, pcam_inst);
+ }
}
- } else {
- if (pcam->mctl_node.dev_inst_map[img_mode]) {
- idx = pcam->mctl_node.dev_inst_map[img_mode]->my_index;
- pcam_inst = pcam->mctl_node.dev_inst[idx];
- D("%s Found instance %p in mctl node device\n",
- __func__, pcam_inst);
- } else if (pcam->dev_inst_map[img_mode]) {
- idx = pcam->dev_inst_map[img_mode]->my_index;
- pcam_inst = pcam->dev_inst[idx];
- D("%s Found instance %p in video device\n",
- __func__, pcam_inst);
- }
- }
return pcam_inst;
}
@@ -805,6 +825,7 @@
__func__, pcam_inst, frame->ch_paddr[0], ret_frame->dirty);
cam_ts.present = 1;
cam_ts.timestamp = ret_frame->timestamp;
+ cam_ts.frame_id = ret_frame->frame_id;
if (ret_frame->dirty)
/* the frame is dirty, not going to disptach to app */
rc = msm_mctl_release_free_buf(pmctl, pcam_inst, frame);
@@ -898,7 +919,7 @@
meta_frame->map[i].handle);
if (ion_map_iommu(client, meta_frame->map[i].handle,
domain_num, 0, SZ_4K,
- 0, &paddr, &len, UNCACHED, 0) < 0) {
+ 0, &paddr, &len, 0, 0) < 0) {
pr_err("%s: cannot map address plane %d", __func__, i);
ion_free(client, meta_frame->map[i].handle);
/* Roll back previous plane mappings, if any */
diff --git a/drivers/media/video/msm/msm_mctl_pp.c b/drivers/media/video/msm/msm_mctl_pp.c
index a114b37..105426e 100644
--- a/drivers/media/video/msm/msm_mctl_pp.c
+++ b/drivers/media/video/msm/msm_mctl_pp.c
@@ -636,6 +636,9 @@
ret_frame.dirty = dirty;
ret_frame.node_type = 0;
ret_frame.timestamp = frame.timestamp;
+ ret_frame.frame_id = frame.frame_id;
+ D("%s frame_id: %d buffer idx %d\n", __func__,
+ frame.frame_id, frame.buf_idx);
rc = msm_mctl_buf_done_pp(p_mctl, &buf_handle, &buf, &ret_frame);
return rc;
}
diff --git a/drivers/media/video/msm/msm_mem.c b/drivers/media/video/msm/msm_mem.c
index 5136d9d..1875df2 100644
--- a/drivers/media/video/msm/msm_mem.c
+++ b/drivers/media/video/msm/msm_mem.c
@@ -136,7 +136,7 @@
if (IS_ERR_OR_NULL(region->handle))
goto out1;
if (ion_map_iommu(client, region->handle, domain_num, 0,
- SZ_4K, 0, &paddr, &len, UNCACHED, 0) < 0)
+ SZ_4K, 0, &paddr, &len, 0, 0) < 0)
goto out2;
#elif CONFIG_ANDROID_PMEM
rc = get_pmem_file(info->fd, &paddr, &kvstart, &len, &file);
diff --git a/drivers/media/video/msm/sensors/imx091.h b/drivers/media/video/msm/sensors/imx091.h
index 3618b4c..411b90c 100644
--- a/drivers/media/video/msm/sensors/imx091.h
+++ b/drivers/media/video/msm/sensors/imx091.h
@@ -82,6 +82,7 @@
.sensor_power_up = msm_sensor_bayer_power_up,
.sensor_power_down = msm_sensor_bayer_power_down,
.sensor_get_csi_params = msm_sensor_bayer_get_csi_params,
+ .sensor_read_eeprom = msm_sensor_bayer_eeprom_read,
};
static struct msm_sensor_ctrl_t imx091_s_ctrl = {
diff --git a/drivers/media/video/msm/sensors/msm_sensor.c b/drivers/media/video/msm/sensors/msm_sensor.c
index 999783e..63cf38e 100644
--- a/drivers/media/video/msm/sensors/msm_sensor.c
+++ b/drivers/media/video/msm/sensors/msm_sensor.c
@@ -402,7 +402,8 @@
csi_lane_assign;
sensor_output_info->csi_lane_mask = csi_lane_params->
csi_lane_mask;
- sensor_output_info->csi_phy_sel = csi_lane_params->csi_phy_sel;
+ sensor_output_info->csi_phy_sel =
+ s_ctrl->sensordata->pdata->csiphy_core;
}
sensor_output_info->csi_if = s_ctrl->sensordata->csi_if;
for (index = 0; index < sensor_output_info->csi_if; index++)
@@ -1142,18 +1143,6 @@
sensordata->pdata[i].csid_core);
}
- rc = of_property_read_u32_array(of_node, "qcom,is-vpe", val_array,
- count);
- if (rc < 0) {
- pr_err("%s failed %d\n", __func__, __LINE__);
- goto ERROR2;
- }
- for (i = 0; i < count; i++) {
- sensordata->pdata[i].is_vpe = val_array[i];
- CDBG("%s csi_data[%d].is_vpe = %d\n", __func__, i,
- sensordata->pdata[i].is_vpe);
- }
-
pinfo->csi_lane_params = kzalloc(
sizeof(struct msm_camera_csi_lane_params), GFP_KERNEL);
if (!pinfo->csi_lane_params) {
@@ -1184,8 +1173,7 @@
pr_err("%s failed %d\n", __func__, __LINE__);
goto ERROR3;
}
- pinfo->csi_lane_params->csi_phy_sel = val;
-
+ sensordata->pdata->csiphy_core = val;
kfree(val_array);
return rc;
ERROR3:
@@ -1762,6 +1750,8 @@
s_ctrl->sensor_i2c_addr >> 1;
s_ctrl->sensor_i2c_client->cci_client->retries = 3;
s_ctrl->sensor_i2c_client->cci_client->id_map = 0;
+ if (!s_ctrl->wait_num_frames)
+ s_ctrl->wait_num_frames = 1 * Q10;
rc = s_ctrl->func_tbl->sensor_power_up(s_ctrl);
if (rc < 0) {
@@ -1777,6 +1767,8 @@
if (rc < 0)
goto probe_fail;
+ pr_err("%s %s probe succeeded\n", __func__,
+ s_ctrl->sensordata->sensor_name);
v4l2_subdev_init(&s_ctrl->sensor_v4l2_subdev,
s_ctrl->sensor_v4l2_subdev_ops);
snprintf(s_ctrl->sensor_v4l2_subdev.name,
diff --git a/drivers/media/video/msm/sensors/msm_sensor_bayer.c b/drivers/media/video/msm/sensors/msm_sensor_bayer.c
index c867867..31313d2 100644
--- a/drivers/media/video/msm/sensors/msm_sensor_bayer.c
+++ b/drivers/media/video/msm/sensors/msm_sensor_bayer.c
@@ -332,7 +332,7 @@
}
case CFG_GET_EEPROM_DATA: {
if (copy_to_user((void *)cdata.cfg.eeprom_data.eeprom_data,
- &s_ctrl->eeprom_data, s_ctrl->eeprom_data.length)) {
+ &s_ctrl->eeprom_data.data, s_ctrl->eeprom_data.length)){
pr_err("%s:%d failed\n", __func__, __LINE__);
rc = -EFAULT;
}
@@ -658,7 +658,7 @@
return rc;
}
-static int32_t msm_sensor_bayer_eeprom_read(struct msm_sensor_ctrl_t *s_ctrl)
+int32_t msm_sensor_bayer_eeprom_read(struct msm_sensor_ctrl_t *s_ctrl)
{
uint32_t reg_addr = 0;
uint8_t *data = s_ctrl->eeprom_data.data;
@@ -749,7 +749,10 @@
msm_sensor_register(&s_ctrl->sensor_v4l2_subdev);
s_ctrl->sensor_v4l2_subdev.entity.revision =
s_ctrl->sensor_v4l2_subdev.devnode->num;
- msm_sensor_bayer_eeprom_read(s_ctrl);
+ if (s_ctrl->func_tbl->sensor_read_eeprom != NULL)
+ s_ctrl->func_tbl->sensor_read_eeprom(s_ctrl);
+ else
+ msm_sensor_bayer_eeprom_read(s_ctrl);
goto power_down;
probe_fail:
pr_err("%s %s_i2c_probe failed\n", __func__, client->name);
diff --git a/drivers/media/video/msm/sensors/msm_sensor_bayer.h b/drivers/media/video/msm/sensors/msm_sensor_bayer.h
index d12244b..34e654b 100644
--- a/drivers/media/video/msm/sensors/msm_sensor_bayer.h
+++ b/drivers/media/video/msm/sensors/msm_sensor_bayer.h
@@ -65,6 +65,8 @@
int32_t msm_sensor_bayer_get_csi_params(struct msm_sensor_ctrl_t *s_ctrl,
struct csi_lane_params_t *sensor_output_info);
+int32_t msm_sensor_bayer_eeprom_read(struct msm_sensor_ctrl_t *s_ctrl);
+
#define VIDIOC_MSM_SENSOR_CFG \
_IOWR('V', BASE_VIDIOC_PRIVATE + 4, void __user *)
diff --git a/drivers/media/video/msm/sensors/msm_sensor_common.h b/drivers/media/video/msm/sensors/msm_sensor_common.h
index 79fe52e..1f34a0f 100644
--- a/drivers/media/video/msm/sensors/msm_sensor_common.h
+++ b/drivers/media/video/msm/sensors/msm_sensor_common.h
@@ -156,6 +156,7 @@
void (*sensor_adjust_frame_lines) (struct msm_sensor_ctrl_t *s_ctrl);
int32_t (*sensor_get_csi_params)(struct msm_sensor_ctrl_t *,
struct csi_lane_params_t *);
+ int32_t (*sensor_read_eeprom)(struct msm_sensor_ctrl_t *);
};
struct msm_sensor_csi_info {
diff --git a/drivers/media/video/msm/sensors/mt9m114_v4l2.c b/drivers/media/video/msm/sensors/mt9m114_v4l2.c
index cba9538..c952f7b 100644
--- a/drivers/media/video/msm/sensors/mt9m114_v4l2.c
+++ b/drivers/media/video/msm/sensors/mt9m114_v4l2.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1219,11 +1219,52 @@
.addr_type = MSM_CAMERA_I2C_WORD_ADDR,
};
+static const struct of_device_id mt9m114_dt_match[] = {
+ {.compatible = "qcom,mt9m114", .data = &mt9m114_s_ctrl},
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, mt9m114_dt_match);
+
+static struct platform_driver mt9m114_platform_driver = {
+ .driver = {
+ .name = "qcom,mt9m114",
+ .owner = THIS_MODULE,
+ .of_match_table = mt9m114_dt_match,
+ },
+};
+
+static int32_t mt9m114_platform_probe(struct platform_device *pdev)
+{
+ int32_t rc = 0;
+ const struct of_device_id *match;
+ match = of_match_device(mt9m114_dt_match, &pdev->dev);
+ rc = msm_sensor_platform_probe(pdev, match->data);
+ return rc;
+}
+
static int __init msm_sensor_init_module(void)
{
+ int32_t rc = 0;
+ rc = platform_driver_probe(&mt9m114_platform_driver,
+ mt9m114_platform_probe);
+ if (!rc)
+ return rc;
return i2c_add_driver(&mt9m114_i2c_driver);
}
+
+static void __exit msm_sensor_exit_module(void)
+{
+ if (mt9m114_s_ctrl.pdev) {
+ msm_sensor_free_sensor_data(&mt9m114_s_ctrl);
+ platform_driver_unregister(&mt9m114_platform_driver);
+ } else {
+ i2c_del_driver(&mt9m114_i2c_driver);
+ }
+ return;
+}
+
static struct v4l2_subdev_core_ops mt9m114_subdev_core_ops = {
.s_ctrl = msm_sensor_v4l2_s_ctrl,
.queryctrl = msm_sensor_v4l2_query_ctrl,
@@ -1286,5 +1327,6 @@
};
module_init(msm_sensor_init_module);
+module_exit(msm_sensor_exit_module);
MODULE_DESCRIPTION("Aptina 1.26MP YUV sensor driver");
MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/video/msm/sensors/ov5647_v4l2.c b/drivers/media/video/msm/sensors/ov5647_v4l2.c
index eb6a8b0..f6cf427 100644
--- a/drivers/media/video/msm/sensors/ov5647_v4l2.c
+++ b/drivers/media/video/msm/sensors/ov5647_v4l2.c
@@ -23,6 +23,8 @@
static struct msm_camera_i2c_reg_conf ov5647_start_settings[] = {
{0x4202, 0x00}, /* streaming on */
+ {0x0100, 0x01},
+ {0x4800, 0x04},
};
static struct msm_camera_i2c_reg_conf ov5647_stop_settings[] = {
diff --git a/drivers/media/video/msm/sensors/s5k3l1yx.c b/drivers/media/video/msm/sensors/s5k3l1yx.c
index 6a2372e..0bd625c 100644
--- a/drivers/media/video/msm/sensors/s5k3l1yx.c
+++ b/drivers/media/video/msm/sensors/s5k3l1yx.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -442,6 +442,43 @@
{0x0B00, 0x00},
};
+static struct msm_camera_i2c_reg_conf s5k3l1yx_19mhz_prev_settings[] = {
+ {0x0501, 0x00}, /* compression_algorithim_L(1d) */
+ {0x0112, 0x0A}, /* CCP_data_format_H */
+ {0x0113, 0x0A}, /* CCP_data_format_L raw8=0808 ,DCPM10 -->8= 0A08 */
+ {0x0306, 0x00}, /* pll_multiplier */
+ {0x0307, 0xCE}, /* pll_multiplier */
+ {0x0202, 0x06}, /* coarse_integration_time */
+ {0x0203, 0x00}, /* coarse_integration_time */
+ {0x0340, 0x09}, /* frame_length_lines */
+ {0x0341, 0x6C}, /* frame_length_lines */
+ {0x0342, 0x11}, /* line_length_pck */
+ {0x0343, 0x80}, /* line_length_pck */
+ {0x0344, 0x00}, /* x_addr_start */
+ {0x0345, 0x18}, /* x_addr_start */
+ {0x0346, 0x00}, /* y_addr_start */
+ {0x0347, 0x00}, /* y_addr_start */
+ {0x0348, 0x0F}, /* x_addr_end */
+ {0x0349, 0x97}, /* x_addr_end */
+ {0x034A, 0x0B}, /* y_addr_end */
+ {0x034B, 0xC7}, /* y_addr_end */
+ {0x034C, 0x07}, /* x_output_size */
+ {0x034D, 0xC0}, /* x_output_size */
+ {0x034E, 0x05}, /* y_output_size */
+ {0x034F, 0xE4}, /* y_output_size */
+ {0x0380, 0x00}, /* x_even_inc */
+ {0x0381, 0x01}, /* x_even_inc */
+ {0x0382, 0x00}, /* x_odd_inc */
+ {0x0383, 0x03}, /* x_odd_inc */
+ {0x0384, 0x00}, /* y_even_inc */
+ {0x0385, 0x01}, /* y_even_inc */
+ {0x0386, 0x00}, /* y_odd_inc */
+ {0x0387, 0x03}, /* y_odd_inc */
+ {0x0900, 0x01}, /* binning_mode */
+ {0x0901, 0x22}, /* binning_type */
+ {0x0902, 0x01}, /* binning_weighting */
+};
+
static struct v4l2_subdev_info s5k3l1yx_subdev_info[] = {
{
.code = V4L2_MBUS_FMT_SBGGR10_1X10,
@@ -471,6 +508,8 @@
MSM_CAMERA_I2C_BYTE_DATA},
{&s5k3l1yx_dpcm_settings[0],
ARRAY_SIZE(s5k3l1yx_dpcm_settings), 0, MSM_CAMERA_I2C_BYTE_DATA},
+ {&s5k3l1yx_19mhz_prev_settings[0],
+ ARRAY_SIZE(s5k3l1yx_19mhz_prev_settings), 0, MSM_CAMERA_I2C_BYTE_DATA},
};
static struct msm_sensor_output_info_t s5k3l1yx_dimensions[] = {
@@ -534,6 +573,16 @@
.op_pixel_clk = 320000000,
.binning_factor = 1,
},
+ /* 30 fps preview with 19.2 input clock*/
+ {
+ .x_output = 1984,
+ .y_output = 1508,
+ .line_length_pclk = 4480,
+ .frame_length_lines = 2412,
+ .vt_pixel_clk = 330000000,
+ .op_pixel_clk = 264000000,
+ .binning_factor = 1,
+ },
};
static struct msm_sensor_output_reg_addr_t s5k3l1yx_reg_addr = {
diff --git a/drivers/media/video/msm/server/msm_cam_server.c b/drivers/media/video/msm/server/msm_cam_server.c
index bb9a9b7..84aaa69 100644
--- a/drivers/media/video/msm/server/msm_cam_server.c
+++ b/drivers/media/video/msm/server/msm_cam_server.c
@@ -311,7 +311,7 @@
if (command->length > 0) {
command->value =
g_server_dev.server_queue[command->queue_idx].ctrl_data;
- if (command->length > max_control_command_size) {
+ if (command->length > MAX_SERVER_PAYLOAD_LENGTH) {
pr_err("%s: user data %d is too big (max %d)\n",
__func__, command->length,
max_control_command_size);
@@ -476,20 +476,22 @@
struct msm_camera_v4l2_ioctl_t *ioctl_ptr)
{
struct msm_ctrl_cmd ctrlcmd;
- void *temp_data;
+ void *temp_data = NULL;
int rc;
- temp_data = kzalloc(ioctl_ptr->len, GFP_KERNEL);
- if (!temp_data) {
- pr_err("%s could not allocate memory\n", __func__);
- rc = -ENOMEM;
- goto end;
- }
- if (copy_from_user((void *)temp_data,
- (void __user *)ioctl_ptr->ioctl_ptr,
- ioctl_ptr->len)) {
- ERR_COPY_FROM_USER();
- rc = -EFAULT;
- goto copy_from_user_failed;
+ if (ioctl_ptr->len > 0) {
+ temp_data = kzalloc(ioctl_ptr->len, GFP_KERNEL);
+ if (!temp_data) {
+ pr_err("%s could not allocate memory\n", __func__);
+ rc = -ENOMEM;
+ goto end;
+ }
+ if (copy_from_user((void *)temp_data,
+ (void __user *)ioctl_ptr->ioctl_ptr,
+ ioctl_ptr->len)) {
+ ERR_COPY_FROM_USER();
+ rc = -EFAULT;
+ goto copy_from_user_failed;
+ }
}
mutex_lock(&pcam->vid_lock);
@@ -505,6 +507,16 @@
rc = msm_server_control(&g_server_dev, 0, &ctrlcmd);
if (rc < 0)
pr_err("%s: send event failed\n", __func__);
+ else {
+ if (ioctl_ptr->len > 0) {
+ if (copy_to_user((void __user *)ioctl_ptr->ioctl_ptr,
+ (void *)temp_data,
+ ioctl_ptr->len)) {
+ ERR_COPY_TO_USER();
+ rc = -EFAULT;
+ }
+ }
+ }
mutex_unlock(&pcam->vid_lock);
kfree(temp_data);
@@ -1519,7 +1531,12 @@
pcam->server_queue_idx = server_q_idx;
queue = &g_server_dev.server_queue[server_q_idx];
queue->ctrl_data = kzalloc(sizeof(uint8_t) *
- max_control_command_size, GFP_KERNEL);
+ MAX_SERVER_PAYLOAD_LENGTH, GFP_KERNEL);
+ if (queue->ctrl_data == NULL) {
+ pr_err("%s: Could not allocate memory\n", __func__);
+ rc = -ENOMEM;
+ goto error;
+ }
msm_queue_init(&queue->ctrl_q, "control");
msm_queue_init(&queue->eventData_q, "eventdata");
queue->queue_active = 1;
@@ -1643,6 +1660,10 @@
rp = (struct msm_vfe_resp *)arg;
frame_info = rp->evt_msg.data;
+ if (!frame_info) {
+ interface = PIX_0;
+ break;
+ }
if (frame_info->inst_handle) {
vnode_id = GET_DEVID_MODE(frame_info->inst_handle);
if (vnode_id < MAX_NUM_ACTIVE_CAMERA &&
@@ -1797,13 +1818,14 @@
}
int msm_mctl_find_sensor_subdevs(struct msm_cam_media_controller *p_mctl,
- int core_index)
+ uint8_t csiphy_core_index, uint8_t csid_core_index)
{
int rc = -ENODEV;
v4l2_set_subdev_hostdata(p_mctl->sensor_sdev, p_mctl);
- rc = msm_csi_register_subdevs(p_mctl, core_index, &g_server_dev);
+ rc = msm_csi_register_subdevs(p_mctl, csiphy_core_index,
+ csid_core_index, &g_server_dev);
if (rc < 0)
pr_err("%s: Could not find sensor subdevs\n", __func__);
@@ -2518,7 +2540,11 @@
*p_qidx = server_q_idx;
queue = &g_server_dev.server_queue[server_q_idx];
queue->ctrl_data = kzalloc(sizeof(uint8_t) *
- max_control_command_size, GFP_KERNEL);
+ MAX_SERVER_PAYLOAD_LENGTH, GFP_KERNEL);
+ if (!queue->ctrl_data) {
+ pr_err("%s: Could not find memory\n", __func__);
+ return -ENOMEM;
+ }
msm_queue_init(&queue->ctrl_q, "control");
msm_queue_init(&queue->eventData_q, "eventdata");
queue->queue_active = 1;
diff --git a/drivers/media/video/msm/vfe/msm_vfe32.c b/drivers/media/video/msm/vfe/msm_vfe32.c
index 6e22388..db0db36 100644
--- a/drivers/media/video/msm/vfe/msm_vfe32.c
+++ b/drivers/media/video/msm/vfe/msm_vfe32.c
@@ -587,6 +587,25 @@
atomic_set(&share_ctrl->handle_common_irq, 1);
}
+static void axi_clear_all_interrupts(struct vfe_share_ctrl_t *share_ctrl)
+{
+ atomic_set(&share_ctrl->handle_common_irq, 0);
+ msm_camera_io_w(VFE_DISABLE_ALL_IRQS,
+ share_ctrl->vfebase + VFE_IRQ_MASK_0);
+ msm_camera_io_w(VFE_DISABLE_ALL_IRQS,
+ share_ctrl->vfebase + VFE_IRQ_MASK_1);
+
+ /* clear all pending interrupts*/
+ msm_camera_io_w(VFE_CLEAR_ALL_IRQS,
+ share_ctrl->vfebase + VFE_IRQ_CLEAR_0);
+ msm_camera_io_w(VFE_CLEAR_ALL_IRQS,
+ share_ctrl->vfebase + VFE_IRQ_CLEAR_1);
+ /* Ensure the write order while writing
+ *to the command register using the barrier */
+ msm_camera_io_w_mb(1,
+ share_ctrl->vfebase + VFE_IRQ_CMD);
+}
+
static void axi_disable_irq(struct vfe_share_ctrl_t *share_ctrl,
uint32_t mode)
{
@@ -632,24 +651,6 @@
msm_camera_io_w(irq_mask, share_ctrl->vfebase +
VFE_IRQ_MASK_0);
}
- /*Dont Disable for concurrent*/
- if (share_ctrl->axi_ref_cnt == 1) {
- atomic_set(&share_ctrl->handle_common_irq, 0);
- msm_camera_io_w(VFE_DISABLE_ALL_IRQS,
- share_ctrl->vfebase + VFE_IRQ_MASK_0);
- msm_camera_io_w(VFE_DISABLE_ALL_IRQS,
- share_ctrl->vfebase + VFE_IRQ_MASK_1);
-
- /* clear all pending interrupts*/
- msm_camera_io_w(VFE_CLEAR_ALL_IRQS,
- share_ctrl->vfebase + VFE_IRQ_CLEAR_0);
- msm_camera_io_w(VFE_CLEAR_ALL_IRQS,
- share_ctrl->vfebase + VFE_IRQ_CLEAR_1);
- /* Ensure the write order while writing
- *to the command register using the barrier */
- msm_camera_io_w_mb(1,
- share_ctrl->vfebase + VFE_IRQ_CMD);
- }
}
static void vfe32_stop(struct vfe32_ctrl_type *vfe32_ctrl)
@@ -5554,6 +5555,8 @@
axi_ctrl->share_ctrl->axi_ref_cnt--;
if (axi_ctrl->share_ctrl->axi_ref_cnt > 0)
return;
+
+ axi_clear_all_interrupts(axi_ctrl->share_ctrl);
axi_ctrl->share_ctrl->dual_enabled = 0;
disable_irq(axi_ctrl->vfeirq->start);
tasklet_kill(&axi_ctrl->vfe32_tasklet);
diff --git a/drivers/media/video/msm/vfe/msm_vfe7x27a_v4l2.c b/drivers/media/video/msm/vfe/msm_vfe7x27a_v4l2.c
index 15c38af..6440b8e 100644
--- a/drivers/media/video/msm/vfe/msm_vfe7x27a_v4l2.c
+++ b/drivers/media/video/msm/vfe/msm_vfe7x27a_v4l2.c
@@ -836,7 +836,12 @@
kfree(data);
return;
}
- free_buf = vfe2x_check_free_buffer(
+ if (vfe2x_ctrl->liveshot_enabled)
+ free_buf = vfe2x_check_free_buffer(
+ VFE_MSG_OUTPUT_IRQ,
+ VFE_MSG_V2X_LIVESHOT_PRIMARY);
+ else
+ free_buf = vfe2x_check_free_buffer(
VFE_MSG_OUTPUT_IRQ,
VFE_MSG_OUTPUT_PRIMARY);
CDBG("free_buf = %x\n",
@@ -1353,12 +1358,14 @@
vfe2x_subdev_notify(id, path);
if (op_mode & SNAPSHOT_MASK_MODE) {
- if (path == VFE_MSG_OUTPUT_PRIMARY)
+ if (path == VFE_MSG_OUTPUT_PRIMARY ||
+ path == VFE_MSG_V2X_LIVESHOT_PRIMARY)
outch = &vfe2x_ctrl->snap;
else if (path == VFE_MSG_OUTPUT_SECONDARY)
outch = &vfe2x_ctrl->thumb;
} else {
- if (path == VFE_MSG_OUTPUT_PRIMARY) {
+ if (path == VFE_MSG_OUTPUT_PRIMARY ||
+ path == VFE_MSG_V2X_LIVESHOT_PRIMARY) {
if (vfe2x_ctrl->zsl_mode)
outch = &vfe2x_ctrl->zsl_prim;
else
@@ -1380,12 +1387,14 @@
vfe2x_subdev_notify(id, path);
CDBG("Opmode = %d\n", op_mode);
if (op_mode & SNAPSHOT_MASK_MODE) {
- if (path == VFE_MSG_OUTPUT_PRIMARY)
+ if (path == VFE_MSG_OUTPUT_PRIMARY ||
+ path == VFE_MSG_V2X_LIVESHOT_PRIMARY)
outch = &vfe2x_ctrl->snap;
else if (path == VFE_MSG_OUTPUT_SECONDARY)
outch = &vfe2x_ctrl->thumb;
} else {
- if (path == VFE_MSG_OUTPUT_PRIMARY) {
+ if (path == VFE_MSG_OUTPUT_PRIMARY ||
+ path == VFE_MSG_V2X_LIVESHOT_PRIMARY) {
if (vfe2x_ctrl->zsl_mode)
outch = &vfe2x_ctrl->zsl_prim;
else
@@ -1413,10 +1422,12 @@
if (op_mode & SNAPSHOT_MASK_MODE) {
if (path == VFE_MSG_OUTPUT_SECONDARY)
ch = &vfe2x_ctrl->thumb;
- else if (path == VFE_MSG_OUTPUT_PRIMARY)
+ else if (path == VFE_MSG_OUTPUT_PRIMARY ||
+ path == VFE_MSG_V2X_LIVESHOT_PRIMARY)
ch = &vfe2x_ctrl->snap;
} else {
- if (path == VFE_MSG_OUTPUT_PRIMARY) {
+ if (path == VFE_MSG_OUTPUT_PRIMARY ||
+ path == VFE_MSG_V2X_LIVESHOT_PRIMARY) {
if (vfe2x_ctrl->zsl_mode)
ch = &vfe2x_ctrl->zsl_prim;
else
@@ -1561,6 +1572,11 @@
}
return 0;
+ case CMD_AXI_START:
+ case CMD_AXI_STOP:
+ case CMD_AXI_RESET:
+ return 0;
+
case CMD_CONFIG_FREE_BUF_ADDR: {
int path = *((int *)cmd->value);
struct buf_info *outch = vfe2x_get_ch(path);
@@ -1853,9 +1869,6 @@
flags);
if (op_mode & SNAPSHOT_MASK_MODE) {
vfe2x_ctrl->stop_pending = 0;
- vfe2x_send_isp_msg(vfe2x_ctrl,
- msgs_map[MSG_STOP_ACK].
- isp_id);
spin_unlock_irqrestore(
&vfe2x_ctrl->table_lock,
flags);
diff --git a/drivers/media/video/msm/vfe/msm_vfe_stats_buf.c b/drivers/media/video/msm/vfe/msm_vfe_stats_buf.c
index a813e09..36f8b11 100644
--- a/drivers/media/video/msm/vfe/msm_vfe_stats_buf.c
+++ b/drivers/media/video/msm/vfe/msm_vfe_stats_buf.c
@@ -221,7 +221,7 @@
}
if (ion_map_iommu(client, stats_buf->handle,
domain_num, 0, SZ_4K,
- 0, &paddr, &len, UNCACHED, 0) < 0) {
+ 0, &paddr, &len, 0, 0) < 0) {
rc = -EINVAL;
pr_err("%s: cannot map address", __func__);
goto out2;
diff --git a/drivers/media/video/msm_vidc/msm_smem.c b/drivers/media/video/msm_vidc/msm_smem.c
index 156a721..3dd2193 100644
--- a/drivers/media/video/msm_vidc/msm_smem.c
+++ b/drivers/media/video/msm_vidc/msm_smem.c
@@ -24,7 +24,7 @@
static int get_device_address(struct ion_client *clnt,
struct ion_handle *hndl, int domain_num, int partition_num,
unsigned long align, unsigned long *iova,
- unsigned long *buffer_size, unsigned long flags)
+ unsigned long *buffer_size)
{
int rc;
if (!iova || !buffer_size || !hndl || !clnt) {
@@ -37,7 +37,7 @@
dprintk(VIDC_DBG, "domain: %d, partition: %d\n",
domain_num, partition_num);
rc = ion_map_iommu(clnt, hndl, domain_num, partition_num, align,
- 0, iova, buffer_size, UNCACHED, 0);
+ 0, iova, buffer_size, 0, 0);
if (rc)
dprintk(VIDC_ERR,
"ion_map_iommu failed(%d).domain: %d,partition: %d\n",
@@ -57,7 +57,6 @@
struct msm_smem *mem)
{
struct ion_handle *hndl;
- unsigned long ionflag;
unsigned long iova = 0;
unsigned long buffer_size = 0;
int rc = 0;
@@ -68,16 +67,11 @@
rc = -ENOMEM;
goto fail_import_fd;
}
- rc = ion_handle_get_flags(client->clnt, hndl, &ionflag);
- if (rc) {
- dprintk(VIDC_ERR, "Failed to get ion flags: %d", rc);
- goto fail_map;
- }
mem->kvaddr = NULL;
mem->domain = domain;
mem->partition_num = partition;
rc = get_device_address(client->clnt, hndl, mem->domain,
- mem->partition_num, 4096, &iova, &buffer_size, ionflag);
+ mem->partition_num, 4096, &iova, &buffer_size);
if (rc) {
dprintk(VIDC_ERR, "Failed to get device address: %d\n", rc);
goto fail_device_address;
@@ -92,7 +86,6 @@
return rc;
fail_device_address:
ion_unmap_kernel(client->clnt, hndl);
-fail_map:
ion_free(client->clnt, hndl);
fail_import_fd:
return rc;
@@ -106,19 +99,20 @@
unsigned long iova = 0;
unsigned long buffer_size = 0;
unsigned long ionflags = 0;
+ unsigned long heap_mask = 0;
int rc = 0;
if (flags == SMEM_CACHED)
- ionflags |= ION_SET_CACHE(CACHED);
+ ionflags = ION_SET_CACHED(ionflags);
else
- ionflags |= ION_SET_CACHE(UNCACHED);
+ ionflags = ION_SET_UNCACHED(ionflags);
- ionflags = ionflags | ION_HEAP(ION_CP_MM_HEAP_ID);
+ heap_mask = ION_HEAP(ION_CP_MM_HEAP_ID);
if (align < 4096)
align = 4096;
size = (size + 4095) & (~4095);
dprintk(VIDC_DBG, "domain: %d, partition: %d\n",
domain, partition);
- hndl = ion_alloc(client->clnt, size, align, ionflags);
+ hndl = ion_alloc(client->clnt, size, align, heap_mask, ionflags);
if (IS_ERR_OR_NULL(hndl)) {
dprintk(VIDC_ERR,
"Failed to allocate shared memory = %p, %d, %d, 0x%lx\n",
@@ -131,7 +125,7 @@
mem->domain = domain;
mem->partition_num = partition;
if (map_kernel) {
- mem->kvaddr = ion_map_kernel(client->clnt, hndl, 0);
+ mem->kvaddr = ion_map_kernel(client->clnt, hndl);
if (!mem->kvaddr) {
dprintk(VIDC_ERR,
"Failed to map shared mem in kernel\n");
@@ -142,7 +136,7 @@
mem->kvaddr = NULL;
rc = get_device_address(client->clnt, hndl, mem->domain,
- mem->partition_num, align, &iova, &buffer_size, UNCACHED);
+ mem->partition_num, align, &iova, &buffer_size);
if (rc) {
dprintk(VIDC_ERR, "Failed to get device address: %d\n",
rc);
diff --git a/drivers/media/video/msm_vidc/msm_v4l2_vidc.c b/drivers/media/video/msm_vidc/msm_v4l2_vidc.c
index 170322c..fda03de 100644
--- a/drivers/media/video/msm_vidc/msm_v4l2_vidc.c
+++ b/drivers/media/video/msm_vidc/msm_v4l2_vidc.c
@@ -31,7 +31,6 @@
#include "msm_smem.h"
#define BASE_DEVICE_NUMBER 32
-#define MAX_EVENTS 30
#define SHARED_QSIZE 0x1000000
static struct msm_bus_vectors enc_ocmem_init_vectors[] = {
@@ -451,7 +450,7 @@
};
struct msm_v4l2_vid_inst {
- struct msm_vidc_inst vidc_inst;
+ struct msm_vidc_inst *vidc_inst;
void *mem_client;
struct list_head registered_bufs;
};
@@ -468,22 +467,7 @@
struct msm_vidc_inst *vidc_inst;
vidc_inst = container_of(filp->private_data,
struct msm_vidc_inst, event_handler);
- return container_of((void *)vidc_inst,
- struct msm_v4l2_vid_inst, vidc_inst);
-}
-
-static int msm_vidc_v4l2_setup_event_queue(void *inst,
- struct video_device *pvdev)
-{
- int rc = 0;
- struct msm_vidc_inst *vidc_inst = (struct msm_vidc_inst *)inst;
- spin_lock_init(&pvdev->fh_lock);
- INIT_LIST_HEAD(&pvdev->fh_list);
-
- v4l2_fh_init(&vidc_inst->event_handler, pvdev);
- v4l2_fh_add(&vidc_inst->event_handler);
-
- return rc;
+ return (struct msm_v4l2_vid_inst *)vidc_inst->priv;
}
struct buffer_info *get_registered_buf(struct list_head *list,
@@ -556,7 +540,8 @@
rc = -ENOMEM;
goto fail_mem_client;
}
- rc = msm_vidc_open(&v4l2_inst->vidc_inst, core->id, vid_dev->type);
+
+ v4l2_inst->vidc_inst = msm_vidc_open(core->id, vid_dev->type);
if (rc) {
dprintk(VIDC_ERR,
"Failed to create video instance, core: %d, type = %d\n",
@@ -565,9 +550,9 @@
goto fail_open;
}
INIT_LIST_HEAD(&v4l2_inst->registered_bufs);
- rc = msm_vidc_v4l2_setup_event_queue(&v4l2_inst->vidc_inst, vdev);
+ v4l2_inst->vidc_inst->priv = v4l2_inst;
clear_bit(V4L2_FL_USES_V4L2_FH, &vdev->flags);
- filp->private_data = &(v4l2_inst->vidc_inst.event_handler);
+ filp->private_data = &(v4l2_inst->vidc_inst->event_handler);
return rc;
fail_open:
msm_smem_delete_client(v4l2_inst->mem_client);
@@ -576,22 +561,69 @@
fail_nomem:
return rc;
}
+static int msm_v4l2_release_output_buffers(struct msm_v4l2_vid_inst *v4l2_inst)
+{
+ struct list_head *ptr, *next;
+ struct buffer_info *bi;
+ struct v4l2_buffer buffer_info;
+ struct v4l2_plane plane;
+ int rc = 0;
+ list_for_each_safe(ptr, next, &v4l2_inst->registered_bufs) {
+ bi = list_entry(ptr, struct buffer_info, list);
+ if (bi->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
+ buffer_info.type = bi->type;
+ plane.reserved[0] = bi->fd;
+ plane.reserved[1] = bi->buff_off;
+ plane.length = bi->size;
+ plane.m.userptr = bi->device_addr;
+ buffer_info.m.planes = &plane;
+ buffer_info.length = 1;
+ dprintk(VIDC_DBG,
+ "Releasing buffer: %d, %d, %d\n",
+ buffer_info.m.planes[0].reserved[0],
+ buffer_info.m.planes[0].reserved[1],
+ buffer_info.m.planes[0].length);
+ rc = msm_vidc_release_buf(v4l2_inst->vidc_inst,
+ &buffer_info);
+ if (rc)
+ dprintk(VIDC_ERR,
+ "Failed Release buffer: %d, %d, %d\n",
+ buffer_info.m.planes[0].reserved[0],
+ buffer_info.m.planes[0].reserved[1],
+ buffer_info.m.planes[0].length);
+ list_del(&bi->list);
+ if (bi->handle)
+ msm_smem_free(v4l2_inst->mem_client,
+ bi->handle);
+ kfree(bi);
+ }
+ }
+ return rc;
+}
static int msm_v4l2_close(struct file *filp)
{
- int rc;
+ int rc = 0;
struct list_head *ptr, *next;
- struct buffer_info *binfo;
+ struct buffer_info *bi;
struct msm_vidc_inst *vidc_inst;
struct msm_v4l2_vid_inst *v4l2_inst;
vidc_inst = get_vidc_inst(filp, NULL);
v4l2_inst = get_v4l2_inst(filp, NULL);
+ rc = msm_v4l2_release_output_buffers(v4l2_inst);
+ if (rc)
+ dprintk(VIDC_WARN,
+ "Failed in %s for release output buffers\n", __func__);
rc = msm_vidc_close(vidc_inst);
list_for_each_safe(ptr, next, &v4l2_inst->registered_bufs) {
- binfo = list_entry(ptr, struct buffer_info, list);
- list_del(&binfo->list);
- msm_smem_free(v4l2_inst->mem_client, binfo->handle);
- kfree(binfo);
+ bi = list_entry(ptr, struct buffer_info, list);
+ if (bi->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
+ list_del(&bi->list);
+ if (bi->handle)
+ msm_smem_free(v4l2_inst->mem_client,
+ bi->handle);
+ kfree(bi);
+ }
}
msm_smem_delete_client(v4l2_inst->mem_client);
kfree(v4l2_inst);
@@ -645,38 +677,13 @@
{
struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh);
struct msm_v4l2_vid_inst *v4l2_inst;
- struct list_head *ptr, *next;
- int rc;
- struct buffer_info *bi;
- struct v4l2_buffer buffer_info;
- struct v4l2_plane plane;
+ int rc = 0;
v4l2_inst = get_v4l2_inst(file, NULL);
- if (b->count == 0) {
- list_for_each_safe(ptr, next, &v4l2_inst->registered_bufs) {
- bi = list_entry(ptr, struct buffer_info, list);
- if (bi->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
- buffer_info.type = bi->type;
- plane.reserved[0] = bi->fd;
- plane.reserved[1] = bi->buff_off;
- plane.length = bi->size;
- plane.m.userptr = bi->device_addr;
- buffer_info.m.planes = &plane;
- buffer_info.length = 1;
- dprintk(VIDC_DBG,
- "Releasing buffer: %d, %d, %d\n",
- buffer_info.m.planes[0].reserved[0],
- buffer_info.m.planes[0].reserved[1],
- buffer_info.m.planes[0].length);
- rc = msm_vidc_release_buf(&v4l2_inst->vidc_inst,
- &buffer_info);
- list_del(&bi->list);
- if (bi->handle)
- msm_smem_free(v4l2_inst->mem_client,
- bi->handle);
- kfree(bi);
- }
- }
- }
+ if (b->count == 0)
+ rc = msm_v4l2_release_output_buffers(v4l2_inst);
+ if (rc)
+ dprintk(VIDC_WARN,
+ "Failed in %s for release output buffers\n", __func__);
return msm_vidc_reqbufs((void *)vidc_inst, b);
}
@@ -752,7 +759,7 @@
list_add_tail(&binfo->list, &v4l2_inst->registered_bufs);
b->m.planes[i].m.userptr = binfo->device_addr;
}
- rc = msm_vidc_prepare_buf(&v4l2_inst->vidc_inst, b);
+ rc = msm_vidc_prepare_buf(v4l2_inst->vidc_inst, b);
exit:
return rc;
}
@@ -794,7 +801,7 @@
}
}
}
- rc = msm_vidc_qbuf(&v4l2_inst->vidc_inst, b);
+ rc = msm_vidc_qbuf(v4l2_inst->vidc_inst, b);
err_invalid_buff:
return rc;
}
@@ -823,23 +830,31 @@
static int msm_v4l2_subscribe_event(struct v4l2_fh *fh,
struct v4l2_event_subscription *sub)
{
- int rc = 0;
- rc = v4l2_event_subscribe(fh, sub, MAX_EVENTS);
- return rc;
+ struct msm_vidc_inst *vidc_inst = container_of(fh,
+ struct msm_vidc_inst, event_handler);
+ return msm_vidc_subscribe_event((void *)vidc_inst, sub);
}
static int msm_v4l2_unsubscribe_event(struct v4l2_fh *fh,
struct v4l2_event_subscription *sub)
{
- int rc = 0;
- rc = v4l2_event_unsubscribe(fh, sub);
- return rc;
+ struct msm_vidc_inst *vidc_inst = container_of(fh,
+ struct msm_vidc_inst, event_handler);
+ return msm_vidc_unsubscribe_event((void *)vidc_inst, sub);
}
static int msm_v4l2_decoder_cmd(struct file *file, void *fh,
struct v4l2_decoder_cmd *dec)
{
+ struct msm_v4l2_vid_inst *v4l2_inst;
struct msm_vidc_inst *vidc_inst = get_vidc_inst(file, fh);
+ int rc = 0;
+ v4l2_inst = get_v4l2_inst(file, NULL);
+ if (dec->cmd == V4L2_DEC_CMD_STOP)
+ rc = msm_v4l2_release_output_buffers(v4l2_inst);
+ if (rc)
+ dprintk(VIDC_WARN,
+ "Failed in %s for release output buffers\n", __func__);
return msm_vidc_decoder_cmd((void *)vidc_inst, dec);
}
@@ -936,7 +951,7 @@
struct msm_iova_layout layout;
int rc = 0;
int i;
- struct iommu_info *io_map = core->resources.io_map;
+ struct msm_vidc_iommu_info *io_map = core->resources.io_map;
strlcpy(io_map[CP_MAP].name, "vidc-cp-map",
sizeof(io_map[CP_MAP].name));
strlcpy(io_map[CP_MAP].ctx, "venus_cp",
diff --git a/drivers/media/video/msm_vidc/msm_vdec.c b/drivers/media/video/msm_vidc/msm_vdec.c
index 8240890..d843d87 100644
--- a/drivers/media/video/msm_vidc/msm_vdec.c
+++ b/drivers/media/video/msm_vidc/msm_vdec.c
@@ -229,6 +229,14 @@
.type = OUTPUT_PORT,
},
{
+ .name = "VC1 SP",
+ .description = "VC-1 compressed format G",
+ .fourcc = V4L2_PIX_FMT_VC1_ANNEX_L,
+ .num_planes = 1,
+ .get_frame_size = get_frame_size_compressed,
+ .type = OUTPUT_PORT,
+ },
+ {
.name = "H264",
.description = "H264 compressed format",
.fourcc = V4L2_PIX_FMT_H264,
@@ -273,7 +281,7 @@
int msm_vdec_streamon(struct msm_vidc_inst *inst, enum v4l2_buf_type i)
{
int rc = 0;
- struct vb2_queue *q;
+ struct buf_queue *q;
q = msm_comm_get_vb2q(inst, i);
if (!q) {
dprintk(VIDC_ERR,
@@ -281,7 +289,9 @@
return -EINVAL;
}
dprintk(VIDC_DBG, "Calling streamon\n");
- rc = vb2_streamon(q, i);
+ mutex_lock(&q->lock);
+ rc = vb2_streamon(&q->vb2_bufq, i);
+ mutex_unlock(&q->lock);
if (rc)
dprintk(VIDC_ERR, "streamon failed on port: %d\n", i);
return rc;
@@ -290,7 +300,7 @@
int msm_vdec_streamoff(struct msm_vidc_inst *inst, enum v4l2_buf_type i)
{
int rc = 0;
- struct vb2_queue *q;
+ struct buf_queue *q;
q = msm_comm_get_vb2q(inst, i);
if (!q) {
@@ -299,7 +309,9 @@
return -EINVAL;
}
dprintk(VIDC_DBG, "Calling streamoff\n");
- rc = vb2_streamoff(q, i);
+ mutex_lock(&q->lock);
+ rc = vb2_streamoff(&q->vb2_bufq, i);
+ mutex_unlock(&q->lock);
if (rc)
dprintk(VIDC_ERR, "streamoff failed on port: %d\n", i);
return rc;
@@ -395,7 +407,7 @@
int msm_vdec_qbuf(struct msm_vidc_inst *inst, struct v4l2_buffer *b)
{
- struct vb2_queue *q = NULL;
+ struct buf_queue *q = NULL;
int rc = 0;
q = msm_comm_get_vb2q(inst, b->type);
if (!q) {
@@ -403,14 +415,16 @@
, b->type);
return -EINVAL;
}
- rc = vb2_qbuf(q, b);
+ mutex_lock(&q->lock);
+ rc = vb2_qbuf(&q->vb2_bufq, b);
+ mutex_unlock(&q->lock);
if (rc)
dprintk(VIDC_ERR, "Failed to qbuf, %d\n", rc);
return rc;
}
int msm_vdec_dqbuf(struct msm_vidc_inst *inst, struct v4l2_buffer *b)
{
- struct vb2_queue *q = NULL;
+ struct buf_queue *q = NULL;
int rc = 0;
q = msm_comm_get_vb2q(inst, b->type);
if (!q) {
@@ -418,7 +432,9 @@
, b->type);
return -EINVAL;
}
- rc = vb2_dqbuf(q, b, true);
+ mutex_lock(&q->lock);
+ rc = vb2_dqbuf(&q->vb2_bufq, b, true);
+ mutex_unlock(&q->lock);
if (rc)
dprintk(VIDC_WARN, "Failed to dqbuf, %d\n", rc);
return rc;
@@ -426,7 +442,7 @@
int msm_vdec_reqbufs(struct msm_vidc_inst *inst, struct v4l2_requestbuffers *b)
{
- struct vb2_queue *q = NULL;
+ struct buf_queue *q = NULL;
int rc = 0;
if (!inst || !b) {
dprintk(VIDC_ERR,
@@ -440,7 +456,9 @@
return -EINVAL;
}
- rc = vb2_reqbufs(q, b);
+ mutex_lock(&q->lock);
+ rc = vb2_reqbufs(&q->vb2_bufq, b);
+ mutex_unlock(&q->lock);
if (rc)
dprintk(VIDC_ERR, "Failed to get reqbufs, %d\n", rc);
return rc;
@@ -524,6 +542,8 @@
goto err_invalid_fmt;
}
} else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
+ inst->prop.width = f->fmt.pix_mp.width;
+ inst->prop.height = f->fmt.pix_mp.height;
fmt = msm_comm_get_pixel_fmt_fourcc(vdec_formats,
ARRAY_SIZE(vdec_formats), f->fmt.pix_mp.pixelformat,
OUTPUT_PORT);
@@ -737,6 +757,16 @@
return rc;
}
+static inline int stop_streaming(struct msm_vidc_inst *inst)
+{
+ int rc = 0;
+ rc = msm_comm_try_state(inst, MSM_VIDC_RELEASE_RESOURCES_DONE);
+ if (rc)
+ dprintk(VIDC_ERR,
+ "Failed to move inst: %p to start done state\n", inst);
+ return rc;
+}
+
static int msm_vdec_start_streaming(struct vb2_queue *q, unsigned int count)
{
struct msm_vidc_inst *inst;
@@ -750,11 +780,11 @@
"Streamon called on: %d capability\n", q->type);
switch (q->type) {
case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
- if (inst->vb2_bufq[CAPTURE_PORT].streaming)
+ if (inst->bufq[CAPTURE_PORT].vb2_bufq.streaming)
rc = start_streaming(inst);
break;
case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
- if (inst->vb2_bufq[OUTPUT_PORT].streaming)
+ if (inst->bufq[OUTPUT_PORT].vb2_bufq.streaming)
rc = start_streaming(inst);
break;
default:
@@ -777,14 +807,12 @@
dprintk(VIDC_DBG, "Streamoff called on: %d capability\n", q->type);
switch (q->type) {
case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
- if (!inst->vb2_bufq[CAPTURE_PORT].streaming)
- rc = msm_comm_try_state(inst,
- MSM_VIDC_RELEASE_RESOURCES_DONE);
+ if (!inst->bufq[CAPTURE_PORT].vb2_bufq.streaming)
+ rc = stop_streaming(inst);
break;
case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
- if (!inst->vb2_bufq[OUTPUT_PORT].streaming)
- rc = msm_comm_try_state(inst,
- MSM_VIDC_RELEASE_RESOURCES_DONE);
+ if (!inst->bufq[OUTPUT_PORT].vb2_bufq.streaming)
+ rc = stop_streaming(inst);
break;
default:
dprintk(VIDC_ERR,
@@ -820,6 +848,12 @@
rc = msm_comm_flush(inst, dec->flags);
break;
case V4L2_DEC_CMD_STOP:
+ rc = msm_comm_release_scratch_buffers(inst);
+ if (rc)
+ pr_err("Failed to release scratch buffers: %d\n", rc);
+ rc = msm_comm_release_persist_buffers(inst);
+ if (rc)
+ pr_err("Failed to release persist buffers: %d\n", rc);
rc = msm_comm_try_state(inst, MSM_VIDC_CLOSE_DONE);
break;
default:
diff --git a/drivers/media/video/msm_vidc/msm_venc.c b/drivers/media/video/msm_vidc/msm_venc.c
index 6c0f224..948676a 100644
--- a/drivers/media/video/msm_vidc/msm_venc.c
+++ b/drivers/media/video/msm_vidc/msm_venc.c
@@ -95,7 +95,7 @@
.type = V4L2_CTRL_TYPE_INTEGER,
.minimum = MIN_FRAME_RATE,
.maximum = MAX_FRAME_RATE,
- .default_value = DEFAULT_FRAME_RATE,
+ .default_value = MIN_FRAME_RATE,
.step = 1,
.menu_skip_mask = 0,
.qmenu = NULL,
@@ -444,6 +444,17 @@
(1 << L_MODE)
),
},
+ {
+ .id = V4L2_CID_QCOM_VIDEO_SYNC_FRAME_SEQ_HDR,
+ .name = "CodecConfig with sync frame",
+ .type = V4L2_CTRL_TYPE_BOOLEAN,
+ .minimum = 0,
+ .maximum = 1,
+ .default_value = 1,
+ .step = 1,
+ .menu_skip_mask = 0,
+ .qmenu = NULL,
+ },
};
#define NUM_CTRLS ARRAY_SIZE(msm_venc_ctrls)
@@ -625,7 +636,6 @@
sizes[i] = inst->fmts[OUTPUT_PORT]->get_frame_size(
i, inst->prop.height, inst->prop.width);
}
-
break;
default:
dprintk(VIDC_ERR, "Invalid q type = %d\n", q->type);
@@ -641,6 +651,7 @@
unsigned long flags;
struct vb2_buf_entry *temp;
struct list_head *ptr, *next;
+
rc = msm_comm_try_get_bufreqs(inst);
if (rc) {
dprintk(VIDC_ERR,
@@ -700,11 +711,11 @@
dprintk(VIDC_DBG, "Streamon called on: %d capability\n", q->type);
switch (q->type) {
case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
- if (inst->vb2_bufq[CAPTURE_PORT].streaming)
+ if (inst->bufq[CAPTURE_PORT].vb2_bufq.streaming)
rc = start_streaming(inst);
break;
case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
- if (inst->vb2_bufq[OUTPUT_PORT].streaming)
+ if (inst->bufq[OUTPUT_PORT].vb2_bufq.streaming)
rc = start_streaming(inst);
break;
default:
@@ -785,6 +796,7 @@
struct hal_intra_refresh intra_refresh;
struct hal_multi_slice_control multi_slice_control;
struct hal_h264_db_control h264_db_control;
+ struct hal_enable enable;
u32 property_id = 0;
u32 property_val = 0;
void *pdata;
@@ -1204,6 +1216,12 @@
h264_db_control.slice_beta_offset = control.value;
pdata = &h264_db_control;
break;
+ case V4L2_CID_QCOM_VIDEO_SYNC_FRAME_SEQ_HDR:
+ property_id =
+ HAL_PARAM_VENC_SYNC_FRAME_SEQUENCE_HEADER;
+ enable.enable = control.value;
+ pdata = &enable;
+ break;
default:
break;
}
@@ -1419,7 +1437,7 @@
int msm_venc_reqbufs(struct msm_vidc_inst *inst, struct v4l2_requestbuffers *b)
{
- struct vb2_queue *q = NULL;
+ struct buf_queue *q = NULL;
int rc = 0;
if (!inst || !b) {
dprintk(VIDC_ERR,
@@ -1433,7 +1451,9 @@
return -EINVAL;
}
- rc = vb2_reqbufs(q, b);
+ mutex_lock(&q->lock);
+ rc = vb2_reqbufs(&q->vb2_bufq, b);
+ mutex_unlock(&q->lock);
if (rc)
dprintk(VIDC_ERR, "Failed to get reqbufs, %d\n", rc);
return rc;
@@ -1479,7 +1499,7 @@
int msm_venc_qbuf(struct msm_vidc_inst *inst, struct v4l2_buffer *b)
{
- struct vb2_queue *q = NULL;
+ struct buf_queue *q = NULL;
int rc = 0;
q = msm_comm_get_vb2q(inst, b->type);
if (!q) {
@@ -1487,7 +1507,9 @@
"Failed to find buffer queue for type = %d\n", b->type);
return -EINVAL;
}
- rc = vb2_qbuf(q, b);
+ mutex_lock(&q->lock);
+ rc = vb2_qbuf(&q->vb2_bufq, b);
+ mutex_unlock(&q->lock);
if (rc)
dprintk(VIDC_ERR, "Failed to qbuf, %d\n", rc);
return rc;
@@ -1495,7 +1517,7 @@
int msm_venc_dqbuf(struct msm_vidc_inst *inst, struct v4l2_buffer *b)
{
- struct vb2_queue *q = NULL;
+ struct buf_queue *q = NULL;
int rc = 0;
q = msm_comm_get_vb2q(inst, b->type);
if (!q) {
@@ -1503,7 +1525,9 @@
"Failed to find buffer queue for type = %d\n", b->type);
return -EINVAL;
}
- rc = vb2_dqbuf(q, b, true);
+ mutex_lock(&q->lock);
+ rc = vb2_dqbuf(&q->vb2_bufq, b, true);
+ mutex_unlock(&q->lock);
if (rc)
dprintk(VIDC_DBG, "Failed to dqbuf, %d\n", rc);
return rc;
@@ -1512,7 +1536,7 @@
int msm_venc_streamon(struct msm_vidc_inst *inst, enum v4l2_buf_type i)
{
int rc = 0;
- struct vb2_queue *q;
+ struct buf_queue *q;
q = msm_comm_get_vb2q(inst, i);
if (!q) {
dprintk(VIDC_ERR,
@@ -1520,7 +1544,9 @@
return -EINVAL;
}
dprintk(VIDC_DBG, "Calling streamon\n");
- rc = vb2_streamon(q, i);
+ mutex_lock(&q->lock);
+ rc = vb2_streamon(&q->vb2_bufq, i);
+ mutex_unlock(&q->lock);
if (rc)
dprintk(VIDC_ERR, "streamon failed on port: %d\n", i);
return rc;
@@ -1529,7 +1555,7 @@
int msm_venc_streamoff(struct msm_vidc_inst *inst, enum v4l2_buf_type i)
{
int rc = 0;
- struct vb2_queue *q;
+ struct buf_queue *q;
q = msm_comm_get_vb2q(inst, i);
if (!q) {
dprintk(VIDC_ERR,
@@ -1537,7 +1563,9 @@
return -EINVAL;
}
dprintk(VIDC_DBG, "Calling streamoff on port: %d\n", i);
- rc = vb2_streamoff(q, i);
+ mutex_lock(&q->lock);
+ rc = vb2_streamoff(&q->vb2_bufq, i);
+ mutex_unlock(&q->lock);
if (rc)
dprintk(VIDC_ERR, "streamoff failed on port: %d\n", i);
return rc;
diff --git a/drivers/media/video/msm_vidc/msm_vidc.c b/drivers/media/video/msm_vidc/msm_vidc.c
index 449dab2..8ff7714 100644
--- a/drivers/media/video/msm_vidc/msm_vidc.c
+++ b/drivers/media/video/msm_vidc/msm_vidc.c
@@ -11,6 +11,7 @@
*
*/
+#include <linux/sched.h>
#include <linux/slab.h>
#include <media/msm_vidc.h>
#include "msm_vidc_internal.h"
@@ -21,21 +22,21 @@
#include "msm_smem.h"
#include <linux/delay.h>
-int msm_vidc_poll(void *instance, struct file *filp,
- struct poll_table_struct *wait)
+#define MAX_EVENTS 30
+
+static int get_poll_flags(void *instance)
{
- int rc = 0;
struct msm_vidc_inst *inst = instance;
- struct vb2_queue *outq = &inst->vb2_bufq[OUTPUT_PORT];
- struct vb2_queue *capq = &inst->vb2_bufq[CAPTURE_PORT];
+ struct vb2_queue *outq = &inst->bufq[OUTPUT_PORT].vb2_bufq;
+ struct vb2_queue *capq = &inst->bufq[CAPTURE_PORT].vb2_bufq;
struct vb2_buffer *out_vb = NULL;
struct vb2_buffer *cap_vb = NULL;
unsigned long flags;
- poll_wait(filp, &inst->event_handler.wait, wait);
- poll_wait(filp, &capq->done_wq, wait);
- poll_wait(filp, &outq->done_wq, wait);
+ int rc = 0;
+
if (v4l2_event_pending(&inst->event_handler))
rc |= POLLPRI;
+
spin_lock_irqsave(&capq->done_lock, flags);
if (!list_empty(&capq->done_list))
cap_vb = list_first_entry(&capq->done_list, struct vb2_buffer,
@@ -44,6 +45,7 @@
|| cap_vb->state == VB2_BUF_STATE_ERROR))
rc |= POLLIN | POLLRDNORM;
spin_unlock_irqrestore(&capq->done_lock, flags);
+
spin_lock_irqsave(&outq->done_lock, flags);
if (!list_empty(&outq->done_list))
out_vb = list_first_entry(&outq->done_list, struct vb2_buffer,
@@ -52,12 +54,55 @@
|| out_vb->state == VB2_BUF_STATE_ERROR))
rc |= POLLOUT | POLLWRNORM;
spin_unlock_irqrestore(&outq->done_lock, flags);
+
return rc;
}
+int msm_vidc_poll(void *instance, struct file *filp,
+ struct poll_table_struct *wait)
+{
+ struct msm_vidc_inst *inst = instance;
+ struct vb2_queue *outq = &inst->bufq[OUTPUT_PORT].vb2_bufq;
+ struct vb2_queue *capq = &inst->bufq[CAPTURE_PORT].vb2_bufq;
+
+ poll_wait(filp, &inst->event_handler.wait, wait);
+ poll_wait(filp, &capq->done_wq, wait);
+ poll_wait(filp, &outq->done_wq, wait);
+ return get_poll_flags(inst);
+}
+
+/* Kernel client alternative for msm_vidc_poll */
+int msm_vidc_wait(void *instance)
+{
+ struct msm_vidc_inst *inst = instance;
+ int rc = 0;
+
+ wait_event(inst->kernel_event_queue, (rc = get_poll_flags(inst)));
+ return rc;
+}
+
+int msm_vidc_get_iommu_maps(void *instance,
+ struct msm_vidc_iommu_info maps[MAX_MAP])
+{
+ struct msm_vidc_inst *inst = instance;
+ int c = 0;
+
+ if (!inst || !maps)
+ return -EINVAL;
+
+ for (c = 0; c < MAX_MAP; ++c)
+ maps[c] = inst->core->resources.io_map[c];
+
+ return 0;
+}
+
int msm_vidc_querycap(void *instance, struct v4l2_capability *cap)
{
struct msm_vidc_inst *inst = instance;
+
+ if (!inst || !cap)
+ return -EINVAL;
+
if (inst->session_type == MSM_VIDC_DECODER)
return msm_vdec_querycap(instance, cap);
else if (inst->session_type == MSM_VIDC_ENCODER)
@@ -67,6 +112,10 @@
int msm_vidc_enum_fmt(void *instance, struct v4l2_fmtdesc *f)
{
struct msm_vidc_inst *inst = instance;
+
+ if (!inst || !f)
+ return -EINVAL;
+
if (inst->session_type == MSM_VIDC_DECODER)
return msm_vdec_enum_fmt(instance, f);
else if (inst->session_type == MSM_VIDC_ENCODER)
@@ -76,6 +125,10 @@
int msm_vidc_s_fmt(void *instance, struct v4l2_format *f)
{
struct msm_vidc_inst *inst = instance;
+
+ if (!inst || !f)
+ return -EINVAL;
+
if (inst->session_type == MSM_VIDC_DECODER)
return msm_vdec_s_fmt(instance, f);
if (inst->session_type == MSM_VIDC_ENCODER)
@@ -85,6 +138,10 @@
int msm_vidc_g_fmt(void *instance, struct v4l2_format *f)
{
struct msm_vidc_inst *inst = instance;
+
+ if (!inst || !f)
+ return -EINVAL;
+
if (inst->session_type == MSM_VIDC_DECODER)
return msm_vdec_g_fmt(instance, f);
else if (inst->session_type == MSM_VIDC_ENCODER)
@@ -94,6 +151,10 @@
int msm_vidc_s_ctrl(void *instance, struct v4l2_control *control)
{
struct msm_vidc_inst *inst = instance;
+
+ if (!inst || !control)
+ return -EINVAL;
+
if (inst->session_type == MSM_VIDC_DECODER)
return msm_vdec_s_ctrl(instance, control);
if (inst->session_type == MSM_VIDC_ENCODER)
@@ -103,6 +164,10 @@
int msm_vidc_g_ctrl(void *instance, struct v4l2_control *control)
{
struct msm_vidc_inst *inst = instance;
+
+ if (!inst || !control)
+ return -EINVAL;
+
if (inst->session_type == MSM_VIDC_DECODER)
return msm_vdec_g_ctrl(instance, control);
if (inst->session_type == MSM_VIDC_ENCODER)
@@ -112,6 +177,10 @@
int msm_vidc_reqbufs(void *instance, struct v4l2_requestbuffers *b)
{
struct msm_vidc_inst *inst = instance;
+
+ if (!inst || !b)
+ return -EINVAL;
+
if (inst->session_type == MSM_VIDC_DECODER)
return msm_vdec_reqbufs(instance, b);
if (inst->session_type == MSM_VIDC_ENCODER)
@@ -122,6 +191,10 @@
int msm_vidc_prepare_buf(void *instance, struct v4l2_buffer *b)
{
struct msm_vidc_inst *inst = instance;
+
+ if (!inst || !b)
+ return -EINVAL;
+
if (inst->session_type == MSM_VIDC_DECODER)
return msm_vdec_prepare_buf(instance, b);
if (inst->session_type == MSM_VIDC_ENCODER)
@@ -132,6 +205,10 @@
int msm_vidc_release_buf(void *instance, struct v4l2_buffer *b)
{
struct msm_vidc_inst *inst = instance;
+
+ if (!inst || !b)
+ return -EINVAL;
+
if (inst->session_type == MSM_VIDC_DECODER)
return msm_vdec_release_buf(instance, b);
return -EINVAL;
@@ -156,6 +233,10 @@
int msm_vidc_qbuf(void *instance, struct v4l2_buffer *b)
{
struct msm_vidc_inst *inst = instance;
+
+ if (!inst || !b)
+ return -EINVAL;
+
if (inst->session_type == MSM_VIDC_DECODER)
return msm_vdec_qbuf(instance, b);
if (inst->session_type == MSM_VIDC_ENCODER)
@@ -166,6 +247,10 @@
int msm_vidc_dqbuf(void *instance, struct v4l2_buffer *b)
{
struct msm_vidc_inst *inst = instance;
+
+ if (!inst || !b)
+ return -EINVAL;
+
if (inst->session_type == MSM_VIDC_DECODER)
return msm_vdec_dqbuf(instance, b);
if (inst->session_type == MSM_VIDC_ENCODER)
@@ -176,6 +261,10 @@
int msm_vidc_streamon(void *instance, enum v4l2_buf_type i)
{
struct msm_vidc_inst *inst = instance;
+
+ if (!inst)
+ return -EINVAL;
+
if (inst->session_type == MSM_VIDC_DECODER)
return msm_vdec_streamon(instance, i);
if (inst->session_type == MSM_VIDC_ENCODER)
@@ -186,6 +275,10 @@
int msm_vidc_streamoff(void *instance, enum v4l2_buf_type i)
{
struct msm_vidc_inst *inst = instance;
+
+ if (!inst)
+ return -EINVAL;
+
if (inst->session_type == MSM_VIDC_DECODER)
return msm_vdec_streamoff(instance, i);
if (inst->session_type == MSM_VIDC_ENCODER)
@@ -193,13 +286,13 @@
return -EINVAL;
}
-void *vidc_get_userptr(void *alloc_ctx, unsigned long vaddr,
+static void *vidc_get_userptr(void *alloc_ctx, unsigned long vaddr,
unsigned long size, int write)
{
return (void *)0xdeadbeef;
}
-void vidc_put_userptr(void *buf_priv)
+static void vidc_put_userptr(void *buf_priv)
{
}
@@ -213,9 +306,9 @@
{
struct vb2_queue *q = NULL;
if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
- q = &inst->vb2_bufq[CAPTURE_PORT];
+ q = &inst->bufq[CAPTURE_PORT].vb2_bufq;
} else if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
- q = &inst->vb2_bufq[OUTPUT_PORT];
+ q = &inst->bufq[OUTPUT_PORT].vb2_bufq;
} else {
dprintk(VIDC_ERR, "buf_type = %d not recognised\n", type);
return -EINVAL;
@@ -232,9 +325,60 @@
return vb2_queue_init(q);
}
-int msm_vidc_open(void *vidc_inst, int core_id, int session_type)
+static int setup_event_queue(void *inst,
+ struct video_device *pvdev)
{
- struct msm_vidc_inst *inst = (struct msm_vidc_inst *)vidc_inst;
+ int rc = 0;
+ struct msm_vidc_inst *vidc_inst = (struct msm_vidc_inst *)inst;
+ spin_lock_init(&pvdev->fh_lock);
+ INIT_LIST_HEAD(&pvdev->fh_list);
+
+ v4l2_fh_init(&vidc_inst->event_handler, pvdev);
+ v4l2_fh_add(&vidc_inst->event_handler);
+
+ return rc;
+}
+
+int msm_vidc_subscribe_event(void *inst, struct v4l2_event_subscription *sub)
+{
+ int rc = 0;
+ struct msm_vidc_inst *vidc_inst = (struct msm_vidc_inst *)inst;
+
+ if (!inst || !sub)
+ return -EINVAL;
+
+ rc = v4l2_event_subscribe(&vidc_inst->event_handler, sub, MAX_EVENTS);
+ return rc;
+}
+
+
+int msm_vidc_unsubscribe_event(void *inst, struct v4l2_event_subscription *sub)
+{
+ int rc = 0;
+ struct msm_vidc_inst *vidc_inst = (struct msm_vidc_inst *)inst;
+
+ if (!inst || !sub)
+ return -EINVAL;
+
+ rc = v4l2_event_unsubscribe(&vidc_inst->event_handler, sub);
+ return rc;
+}
+
+int msm_vidc_dqevent(void *inst, struct v4l2_event *event)
+{
+ int rc = 0;
+ struct msm_vidc_inst *vidc_inst = (struct msm_vidc_inst *)inst;
+
+ if (!inst || !event)
+ return -EINVAL;
+
+ rc = v4l2_event_dequeue(&vidc_inst->event_handler, event, false);
+ return rc;
+}
+
+void *msm_vidc_open(int core_id, int session_type)
+{
+ struct msm_vidc_inst *inst = NULL;
struct msm_vidc_core *core = NULL;
unsigned long flags;
int rc = 0;
@@ -252,14 +396,25 @@
goto err_invalid_core;
}
+ inst = kzalloc(sizeof(*inst), GFP_KERNEL);
+ if (!inst) {
+ pr_err("Failed to allocate memory\n") ;
+ rc = -ENOMEM;
+ goto err_invalid_core;
+ }
+
mutex_init(&inst->sync_lock);
+ mutex_init(&inst->bufq[CAPTURE_PORT].lock);
+ mutex_init(&inst->bufq[OUTPUT_PORT].lock);
spin_lock_init(&inst->lock);
inst->session_type = session_type;
INIT_LIST_HEAD(&inst->pendingq);
INIT_LIST_HEAD(&inst->internalbufs);
INIT_LIST_HEAD(&inst->persistbufs);
+ init_waitqueue_head(&inst->kernel_event_queue);
inst->state = MSM_VIDC_CORE_UNINIT_DONE;
inst->core = core;
+
for (i = SESSION_MSG_INDEX(SESSION_MSG_START);
i <= SESSION_MSG_INDEX(SESSION_MSG_END); i++) {
init_completion(&inst->completions[i]);
@@ -276,6 +431,7 @@
msm_venc_inst_init(inst);
msm_venc_ctrl_init(inst);
}
+
rc = vb2_bufq_init(inst, V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
session_type);
if (rc) {
@@ -298,17 +454,20 @@
}
inst->debugfs_root =
msm_vidc_debugfs_init_inst(inst, core->debugfs_root);
+
+ setup_event_queue(inst, &core->vdev[core_id].vdev);
+
spin_lock_irqsave(&core->lock, flags);
list_add_tail(&inst->list, &core->instances);
spin_unlock_irqrestore(&core->lock, flags);
- return rc;
+ return inst;
fail_init:
msm_smem_delete_client(inst->mem_client);
fail_mem_client:
kfree(inst);
inst = NULL;
err_invalid_core:
- return rc;
+ return inst;
}
static void cleanup_instance(struct msm_vidc_inst *inst)
@@ -332,8 +491,10 @@
buf = list_entry(ptr, struct internal_buf,
list);
list_del(&buf->list);
+ spin_unlock_irqrestore(&inst->lock, flags);
msm_smem_free(inst->mem_client, buf->handle);
kfree(buf);
+ spin_lock_irqsave(&inst->lock, flags);
}
}
if (!list_empty(&inst->persistbufs)) {
@@ -341,12 +502,17 @@
buf = list_entry(ptr, struct internal_buf,
list);
list_del(&buf->list);
+ spin_unlock_irqrestore(&inst->lock, flags);
msm_smem_free(inst->mem_client, buf->handle);
kfree(buf);
+ spin_lock_irqsave(&inst->lock, flags);
}
}
- if (inst->extradata_handle)
+ if (inst->extradata_handle) {
+ spin_unlock_irqrestore(&inst->lock, flags);
msm_smem_free(inst->mem_client, inst->extradata_handle);
+ spin_lock_irqsave(&inst->lock, flags);
+ }
spin_unlock_irqrestore(&inst->lock, flags);
msm_smem_delete_client(inst->mem_client);
debugfs_remove_recursive(inst->debugfs_root);
@@ -360,6 +526,10 @@
struct msm_vidc_core *core;
struct list_head *ptr, *next;
int rc = 0;
+
+ if (!inst)
+ return -EINVAL;
+
core = inst->core;
mutex_lock(&core->sync_lock);
list_for_each_safe(ptr, next, &core->instances) {
@@ -373,6 +543,7 @@
dprintk(VIDC_ERR,
"Failed to move video instance to uninit state\n");
cleanup_instance(inst);
+ kfree(inst);
dprintk(VIDC_DBG, "Closed the instance\n");
return 0;
}
diff --git a/drivers/media/video/msm_vidc/msm_vidc_common.c b/drivers/media/video/msm_vidc/msm_vidc_common.c
index 5b83cfb..1cad40f 100644
--- a/drivers/media/video/msm_vidc/msm_vidc_common.c
+++ b/drivers/media/video/msm_vidc/msm_vidc_common.c
@@ -166,7 +166,7 @@
int rc;
struct iommu_domain *domain;
int i;
- struct iommu_info *io_map;
+ struct msm_vidc_iommu_info *io_map;
struct device *dev;
for (i = 0; i < MAX_MAP; i++) {
io_map = &core->resources.io_map[i];
@@ -202,7 +202,7 @@
{
struct device *dev;
struct iommu_domain *domain;
- struct iommu_info *io_map;
+ struct msm_vidc_iommu_info *io_map;
int i;
if (!core) {
dprintk(VIDC_ERR, "Invalid paramter: %p\n", core);
@@ -258,13 +258,13 @@
return &fmt[i];
}
-struct vb2_queue *msm_comm_get_vb2q(
+struct buf_queue *msm_comm_get_vb2q(
struct msm_vidc_inst *inst, enum v4l2_buf_type type)
{
if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
- return &inst->vb2_bufq[CAPTURE_PORT];
+ return &inst->bufq[CAPTURE_PORT];
if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
- return &inst->vb2_bufq[OUTPUT_PORT];
+ return &inst->bufq[OUTPUT_PORT];
return NULL;
}
@@ -408,6 +408,7 @@
inst->reconfig_width = event_notify->width;
inst->in_reconfig = true;
v4l2_event_queue_fh(&inst->event_handler, &dqevent);
+ wake_up(&inst->kernel_event_queue);
return;
} else {
dprintk(VIDC_ERR,
@@ -501,6 +502,7 @@
dqevent.type = V4L2_EVENT_MSM_VIDC_FLUSH_DONE;
dqevent.id = 0;
v4l2_event_queue_fh(&inst->event_handler, &dqevent);
+ wake_up(&inst->kernel_event_queue);
} else {
dprintk(VIDC_ERR, "Failed to get valid response for flush\n");
}
@@ -518,27 +520,32 @@
dqevent.type = V4L2_EVENT_MSM_VIDC_CLOSE_DONE;
dqevent.id = 0;
v4l2_event_queue_fh(&inst->event_handler, &dqevent);
+ wake_up(&inst->kernel_event_queue);
} else {
dprintk(VIDC_ERR,
"Failed to get valid response for session close\n");
}
}
-static struct vb2_buffer *get_vb_from_device_addr(struct vb2_queue *q,
+static struct vb2_buffer *get_vb_from_device_addr(struct buf_queue *bufq,
u32 dev_addr)
{
struct vb2_buffer *vb = NULL;
+ struct vb2_queue *q = NULL;
int found = 0;
- if (!q) {
+ if (!bufq) {
dprintk(VIDC_ERR, "Invalid parameter\n");
return NULL;
}
+ q = &bufq->vb2_bufq;
+ mutex_lock(&bufq->lock);
list_for_each_entry(vb, &q->queued_list, queued_entry) {
if (vb->v4l2_planes[0].m.userptr == dev_addr) {
found = 1;
break;
}
}
+ mutex_unlock(&bufq->lock);
if (!found) {
dprintk(VIDC_ERR,
"Failed to find the buffer in queued list: %d, %d\n",
@@ -552,13 +559,19 @@
{
struct msm_vidc_cb_data_done *response = data;
struct vb2_buffer *vb;
+ struct msm_vidc_inst *inst;
if (!response) {
dprintk(VIDC_ERR, "Invalid response from vidc_hal\n");
return;
}
vb = response->clnt_data;
- if (vb)
+ inst = (struct msm_vidc_inst *)response->session_id;
+ if (vb) {
+ mutex_lock(&inst->bufq[OUTPUT_PORT].lock);
vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
+ mutex_unlock(&inst->bufq[OUTPUT_PORT].lock);
+ wake_up(&inst->kernel_event_queue);
+ }
}
static void handle_fbd(enum command_response cmd, void *data)
@@ -573,7 +586,7 @@
}
inst = (struct msm_vidc_inst *)response->session_id;
fill_buf_done = (struct vidc_hal_fbd *)&response->output_done;
- vb = get_vb_from_device_addr(&inst->vb2_bufq[CAPTURE_PORT],
+ vb = get_vb_from_device_addr(&inst->bufq[CAPTURE_PORT],
(u32)fill_buf_done->packet_buffer1);
if (vb) {
vb->v4l2_planes[0].bytesused = fill_buf_done->filled_len1;
@@ -593,10 +606,8 @@
vb->v4l2_buf.flags |= V4L2_BUF_FLAG_EOS;
if (fill_buf_done->flags1 & HAL_BUFFERFLAG_CODECCONFIG)
vb->v4l2_buf.flags &= ~V4L2_QCOM_BUF_FLAG_CODECCONFIG;
-
- if (!inst->fbd_count)
- vb->v4l2_buf.flags = V4L2_BUF_FLAG_KEYFRAME;
- ++inst->fbd_count;
+ if (fill_buf_done->flags1 & HAL_BUFFERFLAG_SYNCFRAME)
+ vb->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
switch (fill_buf_done->picture_type) {
case HAL_PICTURE_IDR:
@@ -621,7 +632,10 @@
dprintk(VIDC_DBG, "Filled length = %d; flags %x\n",
vb->v4l2_planes[0].bytesused,
vb->v4l2_buf.flags);
+ mutex_lock(&inst->bufq[CAPTURE_PORT].lock);
vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
+ mutex_unlock(&inst->bufq[CAPTURE_PORT].lock);
+ wake_up(&inst->kernel_event_queue);
} else {
/*
* FIXME:
@@ -637,18 +651,19 @@
*/
if (fill_buf_done->flags1 & HAL_BUFFERFLAG_EOS
&& fill_buf_done->filled_len1 == 0) {
- struct vb2_queue *q = &inst->vb2_bufq[CAPTURE_PORT];
+ struct buf_queue *q = &inst->bufq[CAPTURE_PORT];
- if (!list_empty(&q->queued_list)) {
- vb = list_first_entry(&q->queued_list,
+ if (!list_empty(&q->vb2_bufq.queued_list)) {
+ vb = list_first_entry(&q->vb2_bufq.queued_list,
struct vb2_buffer, queued_entry);
vb->v4l2_planes[0].bytesused = 0;
vb->v4l2_buf.flags |= V4L2_BUF_FLAG_EOS;
+ mutex_lock(&q->lock);
vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
+ mutex_unlock(&q->lock);
}
}
-
}
}
@@ -664,7 +679,7 @@
}
inst = (struct msm_vidc_inst *)response->session_id;
fill_buf_done = (struct vidc_hal_fbd *)&response->output_done;
- vb = get_vb_from_device_addr(&inst->vb2_bufq[CAPTURE_PORT],
+ vb = get_vb_from_device_addr(&inst->bufq[CAPTURE_PORT],
(u32)fill_buf_done->packet_buffer1);
if (vb)
vb->v4l2_planes[0].bytesused = fill_buf_done->filled_len1;
@@ -674,7 +689,9 @@
dprintk(VIDC_DBG, "Filled length = %d; flags %x\n",
vb->v4l2_planes[0].bytesused,
vb->v4l2_buf.flags);
+ mutex_lock(&inst->bufq[CAPTURE_PORT].lock);
vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
+ mutex_unlock(&inst->bufq[CAPTURE_PORT].lock);
}
void handle_cmd_response(enum command_response cmd, void *data)
@@ -737,7 +754,7 @@
dprintk(VIDC_ERR, "Invalid args: %p\n", core);
return -EINVAL;
}
- num_mbs_per_sec = 2 * msm_comm_get_load(core, MSM_VIDC_ENCODER);
+ num_mbs_per_sec = msm_comm_get_load(core, MSM_VIDC_ENCODER);
num_mbs_per_sec += msm_comm_get_load(core, MSM_VIDC_DECODER);
dprintk(VIDC_INFO, "num_mbs_per_sec = %d\n", num_mbs_per_sec);
rc = clk_set_rate(core->resources.clock[VCODEC_CLK].clk,
@@ -1195,7 +1212,6 @@
goto exit;
}
inst->ftb_count = 0;
- inst->fbd_count = 0;
change_inst_state(inst, MSM_VIDC_OPEN);
exit:
return rc;
@@ -1558,12 +1574,83 @@
return rc;
}
+int msm_comm_release_scratch_buffers(struct msm_vidc_inst *inst)
+{
+ struct msm_smem *handle;
+ struct list_head *ptr, *next;
+ struct internal_buf *buf;
+ struct vidc_buffer_addr_info buffer_info;
+ int rc = 0;
+ unsigned long flags;
+ spin_lock_irqsave(&inst->lock, flags);
+ if (!list_empty(&inst->internalbufs)) {
+ list_for_each_safe(ptr, next, &inst->internalbufs) {
+ buf = list_entry(ptr, struct internal_buf,
+ list);
+ handle = buf->handle;
+ buffer_info.buffer_size = handle->size;
+ buffer_info.buffer_type = HAL_BUFFER_INTERNAL_SCRATCH;
+ buffer_info.num_buffers = 1;
+ buffer_info.align_device_addr = handle->device_addr;
+ rc = vidc_hal_session_release_buffers(
+ (void *) inst->session, &buffer_info);
+ if (rc)
+ dprintk(VIDC_WARN,
+ "Failed to release scratch buffer: 0x%x, %d",
+ buffer_info.align_device_addr,
+ buffer_info.buffer_size);
+ list_del(&buf->list);
+ spin_unlock_irqrestore(&inst->lock, flags);
+ msm_smem_free(inst->mem_client, buf->handle);
+ kfree(buf);
+ spin_lock_irqsave(&inst->lock, flags);
+ }
+ }
+ spin_unlock_irqrestore(&inst->lock, flags);
+ return rc;
+}
+
+int msm_comm_release_persist_buffers(struct msm_vidc_inst *inst)
+{
+ struct msm_smem *handle;
+ struct list_head *ptr, *next;
+ struct internal_buf *buf;
+ struct vidc_buffer_addr_info buffer_info;
+ int rc = 0;
+ unsigned long flags;
+ spin_lock_irqsave(&inst->lock, flags);
+ if (!list_empty(&inst->persistbufs)) {
+ list_for_each_safe(ptr, next, &inst->persistbufs) {
+ buf = list_entry(ptr, struct internal_buf,
+ list);
+ handle = buf->handle;
+ buffer_info.buffer_size = handle->size;
+ buffer_info.buffer_type = HAL_BUFFER_INTERNAL_PERSIST;
+ buffer_info.num_buffers = 1;
+ buffer_info.align_device_addr = handle->device_addr;
+ rc = vidc_hal_session_release_buffers(
+ (void *) inst->session, &buffer_info);
+ if (rc)
+ dprintk(VIDC_WARN,
+ "Failed to release persist buffer 0x%x, %d\n",
+ buffer_info.align_device_addr,
+ buffer_info.buffer_size);
+ list_del(&buf->list);
+ spin_unlock_irqrestore(&inst->lock, flags);
+ msm_smem_free(inst->mem_client, buf->handle);
+ kfree(buf);
+ spin_lock_irqsave(&inst->lock, flags);
+ }
+ }
+ spin_unlock_irqrestore(&inst->lock, flags);
+ return rc;
+}
+
int msm_comm_set_scratch_buffers(struct msm_vidc_inst *inst)
{
int rc = 0;
struct msm_smem *handle;
struct internal_buf *binfo;
- struct list_head *ptr, *next;
struct vidc_buffer_addr_info buffer_info;
unsigned long flags;
struct hal_buffer_requirements *scratch_buf =
@@ -1573,17 +1660,9 @@
"scratch: num = %d, size = %d\n",
scratch_buf->buffer_count_actual,
scratch_buf->buffer_size);
- spin_lock_irqsave(&inst->lock, flags);
- if (!list_empty(&inst->internalbufs)) {
- list_for_each_safe(ptr, next, &inst->internalbufs) {
- binfo = list_entry(ptr, struct internal_buf,
- list);
- list_del(&binfo->list);
- msm_smem_free(inst->mem_client, binfo->handle);
- kfree(binfo);
- }
- }
- spin_unlock_irqrestore(&inst->lock, flags);
+ if (msm_comm_release_scratch_buffers(inst))
+ dprintk(VIDC_WARN, "Failed to release scratch buffers\n");
+
if (scratch_buf->buffer_size) {
for (i = 0; i < scratch_buf->buffer_count_actual;
i++) {
diff --git a/drivers/media/video/msm_vidc/msm_vidc_common.h b/drivers/media/video/msm_vidc/msm_vidc_common.h
index 69aa53a..0708724 100644
--- a/drivers/media/video/msm_vidc/msm_vidc_common.h
+++ b/drivers/media/video/msm_vidc/msm_vidc_common.h
@@ -23,7 +23,7 @@
const struct msm_vidc_format fmt[], int size, int index, int fmt_type);
const struct msm_vidc_format *msm_comm_get_pixel_fmt_fourcc(
const struct msm_vidc_format fmt[], int size, int fourcc, int fmt_type);
-struct vb2_queue *msm_comm_get_vb2q(
+struct buf_queue *msm_comm_get_vb2q(
struct msm_vidc_inst *inst, enum v4l2_buf_type type);
int msm_comm_try_state(struct msm_vidc_inst *inst, int state);
int msm_comm_try_get_bufreqs(struct msm_vidc_inst *inst);
@@ -32,6 +32,8 @@
int msm_comm_qbuf(struct vb2_buffer *vb);
int msm_comm_scale_clocks(struct msm_vidc_core *core, enum session_type type);
int msm_comm_flush(struct msm_vidc_inst *inst, u32 flags);
+int msm_comm_release_scratch_buffers(struct msm_vidc_inst *inst);
+int msm_comm_release_persist_buffers(struct msm_vidc_inst *inst);
#define IS_PRIV_CTRL(idx) (\
(V4L2_CTRL_ID2CLASS(idx) == V4L2_CTRL_CLASS_MPEG) && \
V4L2_CTRL_DRIVER_PRIV(idx))
diff --git a/drivers/media/video/msm_vidc/msm_vidc_internal.h b/drivers/media/video/msm_vidc/msm_vidc_internal.h
index 55aec74..1ea92fc 100644
--- a/drivers/media/video/msm_vidc/msm_vidc_internal.h
+++ b/drivers/media/video/msm_vidc/msm_vidc_internal.h
@@ -19,6 +19,7 @@
#include <linux/types.h>
#include <linux/completion.h>
#include <linux/clk.h>
+#include <linux/wait.h>
#include <mach/msm_bus.h>
#include <mach/msm_bus_board.h>
#include <mach/ocmem.h>
@@ -141,20 +142,6 @@
void *cookie;
};
-struct iommu_info {
- u32 addr_range[2];
- char name[MAX_NAME_LENGTH];
- char ctx[MAX_NAME_LENGTH];
- int domain;
- int partition;
-};
-
-enum io_maps {
- CP_MAP,
- NS_MAP,
- MAX_MAP
-};
-
enum vidc_clocks {
VCODEC_CLK,
VCODEC_AHB_CLK,
@@ -188,7 +175,7 @@
struct msm_vidc_resources {
struct msm_vidc_fw fw;
- struct iommu_info io_map[MAX_MAP];
+ struct msm_vidc_iommu_info io_map[MAX_MAP];
struct core_clock clock[VCODEC_MAX_CLKS];
struct vidc_bus_info bus_info;
struct on_chip_mem ocmem;
@@ -201,6 +188,11 @@
u32 bitrate;
};
+struct buf_queue {
+ struct vb2_queue vb2_bufq;
+ struct mutex lock;
+};
+
struct msm_vidc_core {
struct list_head list;
struct mutex sync_lock;
@@ -229,7 +221,7 @@
struct session_prop prop;
int state;
const struct msm_vidc_format *fmts[MAX_PORT_NUM];
- struct vb2_queue vb2_bufq[MAX_PORT_NUM];
+ struct buf_queue bufq[MAX_PORT_NUM];
spinlock_t lock;
struct list_head pendingq;
struct list_head internalbufs;
@@ -240,13 +232,14 @@
struct completion completions[SESSION_MSG_END - SESSION_MSG_START + 1];
struct v4l2_fh event_handler;
struct msm_smem *extradata_handle;
+ wait_queue_head_t kernel_event_queue;
bool in_reconfig;
u32 reconfig_width;
u32 reconfig_height;
struct dentry *debugfs_root;
u32 ftb_count;
- u32 fbd_count;
struct vb2_buffer *vb2_seq_hdr;
+ void *priv;
};
extern struct msm_vidc_drv *vidc_driver;
diff --git a/drivers/media/video/msm_vidc/vidc_hal.c b/drivers/media/video/msm_vidc/vidc_hal.c
index 12ba874..f0d0e73 100644
--- a/drivers/media/video/msm_vidc/vidc_hal.c
+++ b/drivers/media/video/msm_vidc/vidc_hal.c
@@ -177,7 +177,7 @@
new_write_idx -= queue->qhdr_q_size;
memcpy(write_ptr, packet, (packet_size_in_words -
new_write_idx) << 2);
- memcpy((void *)queue->qhdr_start_addr,
+ memcpy((void *)qinfo->q_array.align_virtual_addr,
packet + ((packet_size_in_words - new_write_idx) << 2),
new_write_idx << 2);
}
@@ -285,8 +285,9 @@
memcpy(packet, read_ptr,
(packet_size_in_words - new_read_idx) << 2);
memcpy(packet + ((packet_size_in_words -
- new_read_idx) << 2),
- (u8 *)queue->qhdr_start_addr, new_read_idx << 2);
+ new_read_idx) << 2),
+ (u8 *)qinfo->q_array.align_virtual_addr,
+ new_read_idx << 2);
}
queue->qhdr_read_idx = new_read_idx;
@@ -608,6 +609,9 @@
static void set_vbif_registers(struct hal_device *device)
{
+ /*Disable Dynamic clock gating for Venus VBIF*/
+ write_register(device->hal_data->register_base_addr,
+ VIDC_VENUS_VBIF_CLK_ON, 1, 0);
write_register(device->hal_data->register_base_addr,
VIDC_VBIF_OUT_AXI_AOOO_EN, 0x00000FFF, 0);
write_register(device->hal_data->register_base_addr,
@@ -636,6 +640,8 @@
VIDC_VBIF_OUT_WR_LIM_CONF0, 0x00001010, 0);
write_register(device->hal_data->register_base_addr,
VIDC_VBIF_ARB_CTL, 0x00000030, 0);
+ write_register(device->hal_data->register_base_addr,
+ VIDC_VENUS0_WRAPPER_VBIF_REQ_PRIORITY, 0x5555556, 0);
}
int vidc_hal_core_init(void *device, int domain)
@@ -654,10 +660,6 @@
INIT_LIST_HEAD(&dev->sess_head);
spin_lock_init(&dev->read_lock);
spin_lock_init(&dev->write_lock);
-
- /*Disable Dynamic clock gating for Venus VBIF*/
- write_register(dev->hal_data->register_base_addr,
- VIDC_VENUS_VBIF_CLK_ON, 1, 0);
set_vbif_registers(dev);
if (!dev->hal_client) {
dev->hal_client = msm_smem_new_client(SMEM_ION);
@@ -1168,6 +1170,16 @@
pkt->size += sizeof(u32) * 2;
break;
}
+ case HAL_PARAM_VENC_SYNC_FRAME_SEQUENCE_HEADER:
+ {
+ struct hfi_enable *hfi;
+ pkt->rg_property_data[0] =
+ HFI_PROPERTY_PARAM_VENC_SYNC_FRAME_SEQUENCE_HEADER;
+ hfi = (struct hfi_enable *) &pkt->rg_property_data[1];
+ hfi->enable = ((struct hfi_enable *) pdata)->enable;
+ pkt->size += sizeof(u32) * 2;
+ break;
+ }
case HAL_CONFIG_VENC_REQUEST_IFRAME:
pkt->rg_property_data[0] =
HFI_PROPERTY_CONFIG_VENC_REQUEST_SYNC_FRAME;
diff --git a/drivers/media/video/msm_vidc/vidc_hal_api.h b/drivers/media/video/msm_vidc/vidc_hal_api.h
index c77ae12..659cf7e 100644
--- a/drivers/media/video/msm_vidc/vidc_hal_api.h
+++ b/drivers/media/video/msm_vidc/vidc_hal_api.h
@@ -137,6 +137,7 @@
HAL_PARAM_VENC_MULTI_SLICE_INFO,
HAL_CONFIG_VENC_TIMESTAMP_SCALE,
HAL_PARAM_VENC_LOW_LATENCY,
+ HAL_PARAM_VENC_SYNC_FRAME_SEQUENCE_HEADER,
};
enum hal_domain {
diff --git a/drivers/media/video/msm_vidc/vidc_hal_io.h b/drivers/media/video/msm_vidc/vidc_hal_io.h
index c4b1e0c..b85e015 100644
--- a/drivers/media/video/msm_vidc/vidc_hal_io.h
+++ b/drivers/media/video/msm_vidc/vidc_hal_io.h
@@ -124,9 +124,9 @@
#define VIDC_VBIF_AT_NEW_BASE (VIDC_VBIF_BASE_OFFS + 0xC10)
#define VIDC_VBIF_AT_NEW_HIGH (VIDC_VBIF_BASE_OFFS + 0xC18)
-#define VIDC_VENUS0_VENUS_WRAPPER_VBIF_REQ_PRIORITY \
+#define VIDC_VENUS0_WRAPPER_VBIF_REQ_PRIORITY \
(VIDC_WRAPPER_BASE_OFFS + 0x20)
-#define VIDC_VENUS0_VENUS_WRAPPER_VBIF_PRIORITY_LEVEL \
+#define VIDC_VENUS0_WRAPPER_VBIF_PRIORITY_LEVEL \
(VIDC_WRAPPER_BASE_OFFS + 0x24)
#define VIDC_VENUS_VBIF_REQ_PRIORITY (VIDC_WRAPPER_BASE_OFFS + 0x20)
#define VIDC_VENUS_VBIF_PRIORITY_LEVEL (VIDC_WRAPPER_BASE_OFFS + 0x24)
diff --git a/drivers/media/video/msm_wfd/Kconfig b/drivers/media/video/msm_wfd/Kconfig
new file mode 100644
index 0000000..6050d73
--- /dev/null
+++ b/drivers/media/video/msm_wfd/Kconfig
@@ -0,0 +1,6 @@
+menuconfig MSM_WFD
+ bool "Qualcomm MSM Wifi Display Driver"
+ depends on (MSM_VIDC_1080P || MSM_VIDC_V4L2)
+ ---help---
+ Enables the Wifi Display driver.
+
diff --git a/drivers/media/video/msm_wfd/Makefile b/drivers/media/video/msm_wfd/Makefile
index 5decaca..813bc64 100644
--- a/drivers/media/video/msm_wfd/Makefile
+++ b/drivers/media/video/msm_wfd/Makefile
@@ -1,5 +1,14 @@
-obj-y += mdp-subdev.o
-obj-y += enc-subdev.o
-obj-y += vsg-subdev.o
-obj-y += wfd-ioctl.o
-obj-y += wfd-util.o
+ifeq ($(CONFIG_MSM_WFD),y)
+ obj-y += wfd-ioctl.o
+ obj-y += wfd-util.o
+ obj-y += vsg-subdev.o
+ ifeq ($(CONFIG_FB_MSM_WRITEBACK_MSM_PANEL),y)
+ obj-y += mdp-4-subdev.o
+ else ifeq ($(CONFIG_FB_MSM_MDSS_WRITEBACK),y)
+ obj-y += mdp-5-subdev.o
+ else
+ obj-y += mdp-dummy-subdev.o
+ endif
+ obj-$(CONFIG_MSM_VIDC_1080P) += enc-mfc-subdev.o
+ obj-$(CONFIG_MSM_VIDC_V4L2) += enc-venus-subdev.o
+endif
diff --git a/drivers/media/video/msm_wfd/enc-subdev.c b/drivers/media/video/msm_wfd/enc-mfc-subdev.c
similarity index 94%
rename from drivers/media/video/msm_wfd/enc-subdev.c
rename to drivers/media/video/msm_wfd/enc-mfc-subdev.c
index e1cabf9..09a5e32 100644
--- a/drivers/media/video/msm_wfd/enc-subdev.c
+++ b/drivers/media/video/msm_wfd/enc-mfc-subdev.c
@@ -227,7 +227,7 @@
BUFFER_TYPE_OUTPUT, pmem_fd,
kvaddr, buffer_index, &ion_handle);
else
- WFD_MSG_ERR("Got an output buffer that we "
+ WFD_MSG_ERR("Got an output buffer that we " \
"couldn't recognize!\n");
if (msm_ion_do_cache_op(client_ctx->user_ion_client,
@@ -547,8 +547,8 @@
if (vcd_property_level.level < VCD_LEVEL_MPEG4_0
|| vcd_property_level.level > VCD_LEVEL_MPEG4_X) {
- WFD_MSG_ERR("Level (%d) out of range"
- "for codec (%d)\n", level, codec);
+ WFD_MSG_ERR("Level (%d) out of range for codec (%d)\n",
+ level, codec);
rc = -EINVAL;
goto err;
@@ -558,8 +558,8 @@
if (vcd_property_level.level < VCD_LEVEL_H264_1
|| vcd_property_level.level > VCD_LEVEL_H264_5p1) {
- WFD_MSG_ERR("Level (%d) out of range"
- "for codec (%d)\n", level, codec);
+ WFD_MSG_ERR("Level (%d) out of range for codec (%d)\n",
+ level, codec);
rc = -EINVAL;
goto err;
@@ -678,9 +678,9 @@
vcd_property_profile.profile = VCD_PROFILE_MPEG4_ASP;
break;
default:
- WFD_MSG_ERR("Profile %d not supported,"
- "defaulting to simple (%d)",
- profile, VCD_PROFILE_MPEG4_SP);
+ WFD_MSG_ERR("Profile %d not supported, defaulting " \
+ "to simple (%d)", profile,
+ VCD_PROFILE_MPEG4_SP);
vcd_property_profile.profile = VCD_PROFILE_MPEG4_SP;
break;
}
@@ -697,17 +697,16 @@
vcd_property_profile.profile = VCD_PROFILE_H264_HIGH;
break;
default:
- WFD_MSG_ERR("Profile %d not supported,"
- "defaulting to baseline (%d)",
- profile, VCD_PROFILE_H264_BASELINE);
+ WFD_MSG_ERR("Profile %d not supported, defaulting " \
+ "to baseline (%d)", profile,
+ VCD_PROFILE_H264_BASELINE);
vcd_property_profile.profile =
VCD_PROFILE_H264_BASELINE;
break;
}
} else {
- WFD_MSG_ERR("Codec (%d) not supported,"
- "not setting profile (%d)",
- codec, profile);
+ WFD_MSG_ERR("Codec (%d) not supported, not "\
+ "setting profile (%d)", codec, profile);
rc = -ENOTSUPP;
goto err_set_profile;
}
@@ -1353,6 +1352,48 @@
err_set_perf_level:
return rc;
}
+
+static long venc_set_avc_delimiter(struct video_client_ctx *client_ctx,
+ __s32 flag)
+{
+ struct vcd_property_hdr vcd_property_hdr;
+ struct vcd_property_avc_delimiter_enable delimiter_flag;
+ if (!client_ctx)
+ return -EINVAL;
+
+ vcd_property_hdr.prop_id = VCD_I_ENABLE_DELIMITER_FLAG;
+ vcd_property_hdr.sz =
+ sizeof(struct vcd_property_avc_delimiter_enable);
+ delimiter_flag.avc_delimiter_enable_flag = flag;
+ return vcd_set_property(client_ctx->vcd_handle,
+ &vcd_property_hdr, &delimiter_flag);
+}
+
+static long venc_get_avc_delimiter(struct video_client_ctx *client_ctx,
+ __s32 *flag)
+{
+ struct vcd_property_hdr vcd_property_hdr;
+ struct vcd_property_avc_delimiter_enable delimiter_flag;
+ int rc = 0;
+
+ if (!client_ctx || !flag)
+ return -EINVAL;
+
+ vcd_property_hdr.prop_id = VCD_I_ENABLE_DELIMITER_FLAG;
+ vcd_property_hdr.sz =
+ sizeof(struct vcd_property_avc_delimiter_enable);
+ rc = vcd_get_property(client_ctx->vcd_handle,
+ &vcd_property_hdr, &delimiter_flag);
+
+ if (rc < 0) {
+ WFD_MSG_ERR("Failed getting property for delimiter");
+ return rc;
+ }
+
+ *flag = delimiter_flag.avc_delimiter_enable_flag;
+ return rc;
+}
+
static long venc_set_header_mode(struct video_client_ctx *client_ctx,
__s32 mode)
{
@@ -1933,7 +1974,7 @@
struct vcd_property_enc_recon_buffer *ctrl = NULL;
unsigned long phy_addr;
int i = 0;
- int flags = 0;
+ int heap_mask = 0;
u32 len;
control.width = inst->width;
control.height = inst->height;
@@ -1946,8 +1987,8 @@
WFD_MSG_ERR("Failed to get recon buf size\n");
goto err;
}
- flags = ION_HEAP(ION_CP_MM_HEAP_ID);
- flags |= inst->secure ? ION_SECURE : ION_HEAP(ION_IOMMU_HEAP_ID);
+ heap_mask = ION_HEAP(ION_CP_MM_HEAP_ID);
+ heap_mask |= inst->secure ? ION_SECURE : ION_HEAP(ION_IOMMU_HEAP_ID);
if (vcd_get_ion_status()) {
for (i = 0; i < 4; ++i) {
@@ -1958,11 +1999,11 @@
ctrl->user_virtual_addr = (void *)i;
client_ctx->recon_buffer_ion_handle[i]
= ion_alloc(client_ctx->user_ion_client,
- control.size, SZ_8K, flags);
+ control.size, SZ_8K, heap_mask, 0);
ctrl->kernel_virtual_addr = ion_map_kernel(
client_ctx->user_ion_client,
- client_ctx->recon_buffer_ion_handle[i], 0);
+ client_ctx->recon_buffer_ion_handle[i]);
if (IS_ERR_OR_NULL(ctrl->kernel_virtual_addr)) {
WFD_MSG_ERR("ion map kernel failed\n");
@@ -2158,7 +2199,7 @@
if (rc)
WFD_MSG_ERR("Failed to free recon buffer\n");
- if (IS_ERR_OR_NULL(
+ if (!IS_ERR_OR_NULL(
client_ctx->recon_buffer_ion_handle[i])) {
if (!inst->secure) {
ion_unmap_iommu(
@@ -2233,6 +2274,9 @@
case V4L2_CID_MPEG_QCOM_SET_PERF_LEVEL:
rc = venc_set_max_perf_level(client_ctx, ctrl->value);
break;
+ case V4L2_CID_MPEG_VIDC_VIDEO_H264_AU_DELIMITER:
+ rc = venc_set_avc_delimiter(client_ctx, ctrl->value);
+ break;
case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE:
rc = venc_set_entropy_mode(client_ctx, ctrl->value);
break;
@@ -2304,6 +2348,9 @@
case V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB:
rc = venc_get_cyclic_intra_refresh_mb(client_ctx, &ctrl->value);
break;
+ case V4L2_CID_MPEG_VIDC_VIDEO_H264_AU_DELIMITER:
+ rc = venc_get_avc_delimiter(client_ctx, &ctrl->value);
+ break;
default:
WFD_MSG_ERR("Get property not suported: %d\n", ctrl->id);
rc = -ENOTSUPP;
@@ -2312,6 +2359,73 @@
return rc;
}
+long venc_mmap(struct v4l2_subdev *sd, void *arg)
+{
+ struct venc_inst *inst = sd->dev_priv;
+ struct mem_region_map *mmap = arg;
+ struct mem_region *mregion = NULL;
+ unsigned long rc = 0, size = 0;
+ void *paddr = NULL;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ return -EINVAL;
+ } else if (!mmap || !mmap->mregion) {
+ WFD_MSG_ERR("Memregion required for %s\n", __func__);
+ return -EINVAL;
+ }
+
+ mregion = mmap->mregion;
+ if (mregion->size % SZ_4K != 0) {
+ WFD_MSG_ERR("Memregion not aligned to %d\n", SZ_4K);
+ return -EINVAL;
+ }
+
+ if (inst->secure) {
+ rc = ion_phys(mmap->ion_client, mregion->ion_handle,
+ (unsigned long *)&paddr,
+ (size_t *)&size);
+ } else {
+ rc = ion_map_iommu(mmap->ion_client, mregion->ion_handle,
+ VIDEO_DOMAIN, VIDEO_MAIN_POOL, SZ_4K,
+ 0, (unsigned long *)&paddr,
+ &size, 0, 0);
+ }
+
+ if (rc) {
+ WFD_MSG_ERR("Failed to get physical addr\n");
+ paddr = NULL;
+ } else if (size < mregion->size) {
+ WFD_MSG_ERR("Failed to map enough memory\n");
+ rc = -ENOMEM;
+ }
+
+ mregion->paddr = paddr;
+ return rc;
+}
+
+long venc_munmap(struct v4l2_subdev *sd, void *arg)
+{
+ struct venc_inst *inst = sd->dev_priv;
+ struct mem_region_map *mmap = arg;
+ struct mem_region *mregion = NULL;
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ return -EINVAL;
+ } else if (!mregion) {
+ WFD_MSG_ERR("Memregion required for %s\n", __func__);
+ return -EINVAL;
+ }
+
+ mregion = mmap->mregion;
+ if (!inst->secure) {
+ ion_unmap_iommu(mmap->ion_client, mregion->ion_handle,
+ VIDEO_DOMAIN, VIDEO_MAIN_POOL);
+ }
+
+ return 0;
+}
+
long venc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
{
long rc = 0;
@@ -2375,6 +2489,12 @@
case ENCODE_FLUSH:
rc = venc_flush_buffers(sd, arg);
break;
+ case ENC_MMAP:
+ rc = venc_mmap(sd, arg);
+ break;
+ case ENC_MUNMAP:
+ rc = venc_munmap(sd, arg);
+ break;
default:
rc = -1;
break;
diff --git a/drivers/media/video/msm_wfd/enc-subdev.h b/drivers/media/video/msm_wfd/enc-subdev.h
index 00eb6da..c6c854e 100644
--- a/drivers/media/video/msm_wfd/enc-subdev.h
+++ b/drivers/media/video/msm_wfd/enc-subdev.h
@@ -14,6 +14,7 @@
#ifndef _WFD_ENC_SUBDEV_
#define _WFD_ENC_SUBDEV_
+#include <linux/list.h>
#include <linux/msm_ion.h>
#include <media/v4l2-subdev.h>
#include <media/videobuf2-core.h>
@@ -29,6 +30,15 @@
u32 cookie;
struct ion_handle *ion_handle;
};
+
+/* FIXME: need to come with a less stupid name */
+struct mem_region_map {
+ struct mem_region *mregion;
+ struct ion_client *ion_client;
+ uint32_t flags;
+ void *cookie;
+};
+
struct bufreq {
u32 count;
u32 height;
@@ -44,13 +54,27 @@
struct venc_msg_ops {
void *cookie;
void *cbdata;
- int secure;
+ bool secure;
void (*op_buffer_done)(void *cookie, u32 status,
struct vb2_buffer *buf);
void (*ip_buffer_done)(void *cookie, u32 status,
struct mem_region *mregion);
};
+static inline bool mem_region_equals(struct mem_region *a,
+ struct mem_region *b)
+{
+ if (a == b)
+ return true;
+ else if (a->fd || b->fd)
+ return (a->fd == b->fd) &&
+ (a->offset == b->offset);
+ else if (a->kvaddr || b->kvaddr)
+ return a->kvaddr == b->kvaddr;
+ else
+ return false;
+}
+
#define OPEN _IOR('V', 1, void *)
#define CLOSE _IO('V', 2)
#define ENCODE_START _IO('V', 3)
@@ -75,6 +99,8 @@
#define FREE_INPUT_BUFFER _IOWR('V', 22, struct mem_region *)
#define FREE_RECON_BUFFERS _IO('V', 23)
#define ENCODE_FLUSH _IO('V', 24)
+#define ENC_MMAP _IOWR('V', 25, struct mem_region_map *)
+#define ENC_MUNMAP _IOWR('V', 26, struct mem_region_map *)
extern int venc_init(struct v4l2_subdev *sd, u32 val);
extern int venc_load_fw(struct v4l2_subdev *sd);
diff --git a/drivers/media/video/msm_wfd/enc-venus-subdev.c b/drivers/media/video/msm_wfd/enc-venus-subdev.c
new file mode 100644
index 0000000..89ad6c7
--- /dev/null
+++ b/drivers/media/video/msm_wfd/enc-venus-subdev.c
@@ -0,0 +1,1218 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License version 2 and
+* only version 2 as published by the Free Software Foundation.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+*/
+
+#include <linux/bitmap.h>
+#include <linux/completion.h>
+#include <linux/ion.h>
+#include <linux/kthread.h>
+#include <linux/list.h>
+#include <linux/mutex.h>
+#include <linux/wait.h>
+#include <mach/iommu_domains.h>
+#include <media/msm_vidc.h>
+#include <media/v4l2-subdev.h>
+#include "enc-subdev.h"
+#include "wfd-util.h"
+
+#define BUF_TYPE_OUTPUT V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE
+#define BUF_TYPE_INPUT V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE
+
+static struct ion_client *venc_ion_client;
+
+struct index_bitmap {
+ unsigned long *bitmap;
+ int size;
+ int size_bits; /*Size in bits, not necessarily size/8 */
+};
+
+struct venc_inst {
+ void *vidc_context;
+ struct mutex lock;
+ struct venc_msg_ops vmops;
+ struct mem_region registered_input_bufs, registered_output_bufs;
+ struct index_bitmap free_input_indices, free_output_indices;
+ int num_output_planes, num_input_planes;
+ struct task_struct *callback_thread;
+ bool callback_thread_running;
+ struct completion dq_complete, cmd_complete;
+ bool secure;
+ int domain;
+};
+
+int venc_load_fw(struct v4l2_subdev *sd)
+{
+ /*No need to explicitly load the fw */
+ return 0;
+}
+
+int venc_init(struct v4l2_subdev *sd, u32 val)
+{
+ if (!venc_ion_client)
+ venc_ion_client = msm_ion_client_create(-1, "wfd_enc_subdev");
+
+ return venc_ion_client ? 0 : -ENOMEM;
+}
+
+static int next_free_index(struct index_bitmap *index_bitmap)
+{
+ int index = find_first_zero_bit(index_bitmap->bitmap,
+ index_bitmap->size_bits);
+
+ return (index >= index_bitmap->size_bits) ?
+ -1 : index;
+}
+
+static int mark_index_busy(struct index_bitmap *index_bitmap, int index)
+{
+ if (index > index_bitmap->size_bits) {
+ WFD_MSG_WARN("Marking unknown index as busy\n");
+ return -EINVAL;
+ }
+ set_bit(index, index_bitmap->bitmap);
+ return 0;
+}
+
+static int mark_index_free(struct index_bitmap *index_bitmap, int index)
+{
+ if (index > index_bitmap->size_bits) {
+ WFD_MSG_WARN("Marking unknown index as free\n");
+ return -EINVAL;
+ }
+ clear_bit(index, index_bitmap->bitmap);
+ return 0;
+}
+
+static int get_list_len(struct mem_region *list)
+{
+ struct mem_region *curr = NULL;
+ int index = 0;
+ list_for_each_entry(curr, &list->list, list) {
+ ++index;
+ }
+
+ return index;
+}
+
+static struct mem_region *get_registered_mregion(struct mem_region *list,
+ struct mem_region *mregion)
+{
+ struct mem_region *curr = NULL;
+ list_for_each_entry(curr, &list->list, list) {
+ if (unlikely(mem_region_equals(curr, mregion)))
+ return curr;
+ }
+
+ return NULL;
+}
+
+static int venc_vidc_callback_thread(void *data)
+{
+ struct venc_inst *inst = data;
+ WFD_MSG_DBG("Starting callback thread\n");
+ while (!kthread_should_stop()) {
+ bool dequeue_buf = false;
+ struct v4l2_buffer buffer = {0};
+ struct v4l2_event event = {0};
+ int num_planes = 0;
+ int flags = msm_vidc_wait(inst->vidc_context);
+
+ if (flags & POLLERR) {
+ WFD_MSG_ERR("Encoder reported error\n");
+ break;
+ }
+
+ if (flags & POLLPRI) {
+ bool bail_out = false;
+
+ msm_vidc_dqevent(inst->vidc_context, &event);
+ if (event.type == V4L2_EVENT_MSM_VIDC_CLOSE_DONE) {
+ WFD_MSG_ERR("enc callback thread shutting " \
+ "down normally\n");
+ bail_out = true;
+ } else {
+ WFD_MSG_ERR("Got unknown event %d, ignoring\n",
+ event.id);
+ }
+
+ complete_all(&inst->cmd_complete);
+ if (bail_out)
+ break;
+ }
+
+ if (flags & POLLIN || flags & POLLRDNORM) {
+ buffer.type = BUF_TYPE_OUTPUT;
+ dequeue_buf = true;
+ num_planes = inst->num_output_planes;
+ WFD_MSG_DBG("Output buffer ready!\n");
+ }
+
+ if (flags & POLLOUT || flags & POLLWRNORM) {
+ buffer.type = BUF_TYPE_INPUT;
+ dequeue_buf = true;
+ num_planes = inst->num_input_planes;
+ WFD_MSG_DBG("Input buffer ready!\n");
+ }
+
+ if (dequeue_buf) {
+ int rc = 0;
+ struct v4l2_plane *planes = NULL;
+ struct mem_region *curr = NULL, *mregion = NULL;
+ struct list_head *reg_bufs = NULL;
+ struct index_bitmap *bitmap = NULL;
+
+ planes = kzalloc(sizeof(*planes) * num_planes,
+ GFP_KERNEL);
+ buffer.m.planes = planes;
+ buffer.length = 1;
+ buffer.memory = V4L2_MEMORY_USERPTR;
+ rc = msm_vidc_dqbuf(inst->vidc_context, &buffer);
+
+ if (rc) {
+ WFD_MSG_ERR("Error dequeuing buffer" \
+ "from vidc: %d", rc);
+ goto abort_dequeue;
+ }
+
+ reg_bufs = buffer.type == BUF_TYPE_OUTPUT ?
+ &inst->registered_output_bufs.list :
+ &inst->registered_input_bufs.list;
+
+ bitmap = buffer.type == BUF_TYPE_OUTPUT ?
+ &inst->free_output_indices :
+ &inst->free_input_indices;
+
+ list_for_each_entry(curr, reg_bufs, list) {
+ if ((u32)curr->paddr ==
+ buffer.m.planes[0].m.userptr) {
+ mregion = curr;
+ break;
+ }
+ }
+
+ if (!mregion) {
+ WFD_MSG_ERR("Got done msg for unknown buf\n");
+ goto abort_dequeue;
+ }
+
+ if (buffer.type == BUF_TYPE_OUTPUT &&
+ inst->vmops.op_buffer_done) {
+ struct vb2_buffer *vb =
+ (struct vb2_buffer *)mregion->cookie;
+
+ vb->v4l2_buf.flags = buffer.flags;
+ vb->v4l2_buf.timestamp = buffer.timestamp;
+ vb->v4l2_planes[0].bytesused =
+ buffer.m.planes[0].bytesused;
+
+ inst->vmops.op_buffer_done(
+ inst->vmops.cbdata, 0, vb);
+ } else if (buffer.type == BUF_TYPE_INPUT &&
+ inst->vmops.ip_buffer_done) {
+ inst->vmops.ip_buffer_done(
+ inst->vmops.cbdata,
+ 0, mregion);
+ }
+
+ complete_all(&inst->dq_complete);
+ mutex_lock(&inst->lock);
+ mark_index_free(bitmap, buffer.index);
+ mutex_unlock(&inst->lock);
+abort_dequeue:
+ kfree(planes);
+ }
+ }
+
+
+ WFD_MSG_DBG("Exiting callback thread\n");
+ mutex_lock(&inst->lock);
+ inst->callback_thread_running = false;
+ mutex_unlock(&inst->lock);
+ return 0;
+}
+
+static long venc_open(struct v4l2_subdev *sd, void *arg)
+{
+ struct venc_inst *inst = NULL;
+ struct venc_msg_ops *vmops = arg;
+ struct v4l2_event_subscription event = {0};
+ struct msm_vidc_iommu_info maps[MAX_MAP];
+ int rc = 0;
+
+ if (!vmops) {
+ WFD_MSG_ERR("Callbacks required for %s\n", __func__);
+ rc = -EINVAL;
+ goto venc_open_fail;
+ } else if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ rc = -EINVAL;
+ goto venc_open_fail;
+ }
+
+ inst = kzalloc(sizeof(*inst), GFP_KERNEL);
+ if (!inst) {
+ WFD_MSG_ERR("Failed to allocate memory\n");
+ rc = -EINVAL;
+ goto venc_open_fail;
+ }
+
+ inst->secure = false;
+ inst->vmops = *vmops;
+ INIT_LIST_HEAD(&inst->registered_output_bufs.list);
+ INIT_LIST_HEAD(&inst->registered_input_bufs.list);
+ init_completion(&inst->dq_complete);
+ init_completion(&inst->cmd_complete);
+ mutex_init(&inst->lock);
+ inst->vidc_context = msm_vidc_open(MSM_VIDC_CORE_0, MSM_VIDC_ENCODER);
+ if (!inst->vidc_context) {
+ WFD_MSG_ERR("Failed to create vidc context\n");
+ rc = -ENXIO;
+ goto vidc_open_fail;
+ }
+
+ event.type = V4L2_EVENT_MSM_VIDC_CLOSE_DONE;
+ rc = msm_vidc_subscribe_event(inst->vidc_context, &event);
+ if (rc) {
+ WFD_MSG_ERR("Failed to subscribe to CLOSE_DONE event\n");
+ goto vidc_subscribe_fail;
+ }
+
+ event.type = V4L2_EVENT_MSM_VIDC_FLUSH_DONE;
+ rc = msm_vidc_subscribe_event(inst->vidc_context, &event);
+ if (rc) {
+ WFD_MSG_ERR("Failed to subscribe to FLUSH_DONE event\n");
+ goto vidc_subscribe_fail;
+ }
+
+ rc = msm_vidc_get_iommu_maps(inst->vidc_context, maps);
+ if (rc) {
+ WFD_MSG_ERR("Failed to retreive domain mappings\n");
+ rc = -ENODATA;
+ goto vidc_subscribe_fail;
+ }
+
+ inst->domain = maps[inst->secure ? CP_MAP : NS_MAP].domain;
+
+ inst->callback_thread = kthread_run(venc_vidc_callback_thread, inst,
+ "venc_vidc_callback_thread");
+ if (IS_ERR(inst->callback_thread)) {
+ WFD_MSG_ERR("Failed to create callback thread\n");
+ rc = PTR_ERR(inst->callback_thread);
+ inst->callback_thread = NULL;
+ goto vidc_kthread_create_fail;
+ }
+ inst->callback_thread_running = true;
+
+ sd->dev_priv = inst;
+ vmops->cookie = inst;
+ return 0;
+vidc_kthread_create_fail:
+ event.type = V4L2_EVENT_MSM_VIDC_CLOSE_DONE;
+ msm_vidc_unsubscribe_event(inst->vidc_context, &event);
+
+ event.type = V4L2_EVENT_MSM_VIDC_FLUSH_DONE;
+ msm_vidc_unsubscribe_event(inst->vidc_context, &event);
+vidc_subscribe_fail:
+ msm_vidc_close(inst->vidc_context);
+vidc_open_fail:
+ kfree(inst);
+venc_open_fail:
+ return rc;
+}
+
+static long venc_close(struct v4l2_subdev *sd, void *arg)
+{
+ struct venc_inst *inst = NULL;
+ struct v4l2_event_subscription event = {0};
+ struct v4l2_encoder_cmd enc_cmd = {0};
+ int rc = 0;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ rc = -EINVAL;
+ goto venc_close_fail;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+ enc_cmd.cmd = V4L2_ENC_CMD_STOP;
+ msm_vidc_encoder_cmd(inst->vidc_context, &enc_cmd);
+
+ wait_for_completion(&inst->cmd_complete);
+
+ if (inst->callback_thread && inst->callback_thread_running)
+ kthread_stop(inst->callback_thread);
+
+ event.type = V4L2_EVENT_MSM_VIDC_CLOSE_DONE;
+ rc = msm_vidc_unsubscribe_event(inst->vidc_context, &event);
+ if (rc)
+ WFD_MSG_WARN("Failed to unsubscribe close event\n");
+
+ event.type = V4L2_EVENT_MSM_VIDC_FLUSH_DONE;
+ rc = msm_vidc_unsubscribe_event(inst->vidc_context, &event);
+ if (rc)
+ WFD_MSG_WARN("Failed to unsubscribe flush event\n");
+
+ rc = msm_vidc_close(inst->vidc_context);
+ if (rc)
+ WFD_MSG_WARN("Failed to close vidc context\n");
+
+ kfree(inst);
+ sd->dev_priv = inst = NULL;
+venc_close_fail:
+ return rc;
+}
+
+static long venc_get_buffer_req(struct v4l2_subdev *sd, void *arg)
+{
+ int rc = 0;
+ struct venc_inst *inst = NULL;
+ struct bufreq *bufreq = arg;
+ struct v4l2_requestbuffers v4l2_bufreq = {0};
+ struct v4l2_format v4l2_format = {0};
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ rc = -EINVAL;
+ goto venc_buf_req_fail;
+ } else if (!arg) {
+ WFD_MSG_ERR("Invalid buffer requirements\n");
+ rc = -EINVAL;
+ goto venc_buf_req_fail;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+ /* Get buffer count */
+ v4l2_bufreq = (struct v4l2_requestbuffers) {
+ .count = bufreq->count,
+ .type = BUF_TYPE_OUTPUT,
+ .memory = V4L2_MEMORY_USERPTR,
+ };
+
+ rc = msm_vidc_reqbufs(inst->vidc_context, &v4l2_bufreq);
+ if (rc) {
+ WFD_MSG_ERR("Failed getting buffer requirements\n");
+ goto venc_buf_req_fail;
+ }
+
+ /* Get buffer size */
+ v4l2_format.type = BUF_TYPE_OUTPUT;
+ rc = msm_vidc_g_fmt(inst->vidc_context, &v4l2_format);
+ if (rc) {
+ WFD_MSG_ERR("Failed getting OP buffer size\n");
+ goto venc_buf_req_fail;
+ }
+
+ bufreq->count = v4l2_bufreq.count;
+ bufreq->size = v4l2_format.fmt.pix_mp.plane_fmt[0].sizeimage;
+
+ inst->free_output_indices.size_bits = bufreq->count;
+ inst->free_output_indices.size = roundup(bufreq->count,
+ sizeof(unsigned long)) / sizeof(unsigned long);
+ inst->free_output_indices.bitmap = kzalloc(inst->free_output_indices.
+ size, GFP_KERNEL);
+venc_buf_req_fail:
+ return rc;
+}
+
+static long venc_set_buffer_req(struct v4l2_subdev *sd, void *arg)
+{
+ int rc = 0;
+ struct venc_inst *inst = NULL;
+ struct bufreq *bufreq = arg;
+ struct v4l2_requestbuffers v4l2_bufreq = {0};
+ struct v4l2_format v4l2_format = {0};
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ rc = -EINVAL;
+ goto venc_buf_req_fail;
+ } else if (!arg) {
+ WFD_MSG_ERR("Invalid buffer requirements\n");
+ rc = -EINVAL;
+ goto venc_buf_req_fail;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+
+ /* Attempt to set buffer count */
+ v4l2_bufreq = (struct v4l2_requestbuffers) {
+ .count = bufreq->count,
+ .type = BUF_TYPE_INPUT,
+ .memory = V4L2_MEMORY_USERPTR,
+ };
+
+ rc = msm_vidc_reqbufs(inst->vidc_context, &v4l2_bufreq);
+ if (rc) {
+ WFD_MSG_ERR("Failed getting buffer requirements");
+ goto venc_buf_req_fail;
+ }
+
+ /* Get buffer size */
+ v4l2_format.type = BUF_TYPE_INPUT;
+ rc = msm_vidc_g_fmt(inst->vidc_context, &v4l2_format);
+ if (rc) {
+ WFD_MSG_ERR("Failed getting OP buffer size\n");
+ goto venc_buf_req_fail;
+ }
+
+ bufreq->count = v4l2_bufreq.count;
+ bufreq->size = v4l2_format.fmt.pix_mp.plane_fmt[0].sizeimage;
+
+ inst->free_input_indices.size_bits = bufreq->count;
+ inst->free_input_indices.size = roundup(bufreq->count,
+ sizeof(unsigned long)) / sizeof(unsigned long);
+ inst->free_input_indices.bitmap = kzalloc(inst->free_input_indices.
+ size, GFP_KERNEL);
+venc_buf_req_fail:
+ return rc;
+}
+
+static long venc_start(struct v4l2_subdev *sd)
+{
+ struct venc_inst *inst = NULL;
+ int rc = 0;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ rc = -EINVAL;
+ goto venc_start_fail;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+
+ rc = msm_vidc_streamon(inst->vidc_context, BUF_TYPE_OUTPUT);
+ if (rc) {
+ WFD_MSG_ERR("Failed to streamon vidc's output port");
+ goto venc_start_fail;
+ }
+
+ rc = msm_vidc_streamon(inst->vidc_context, BUF_TYPE_INPUT);
+ if (rc) {
+ WFD_MSG_ERR("Failed to streamon vidc's input port");
+ goto venc_start_fail;
+ }
+
+venc_start_fail:
+ return rc;
+}
+
+static long venc_stop(struct v4l2_subdev *sd)
+{
+ struct venc_inst *inst = NULL;
+ int rc = 0;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ rc = -EINVAL;
+ goto venc_stop_fail;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+
+ rc = msm_vidc_streamoff(inst->vidc_context, BUF_TYPE_INPUT);
+ if (rc) {
+ WFD_MSG_ERR("Failed to streamoff vidc's input port");
+ goto venc_stop_fail;
+ }
+
+ rc = msm_vidc_streamoff(inst->vidc_context, BUF_TYPE_OUTPUT);
+ if (rc) {
+ WFD_MSG_ERR("Failed to streamoff vidc's output port");
+ goto venc_stop_fail;
+ }
+
+venc_stop_fail:
+ return rc;
+}
+
+static long venc_set_input_buffer(struct v4l2_subdev *sd, void *arg)
+{
+ int rc = 0;
+ struct venc_inst *inst = NULL;
+ struct v4l2_buffer buf = {0};
+ struct v4l2_plane plane = {0};
+ struct mem_region *mregion = arg;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ rc = -EINVAL;
+ goto set_input_buffer_fail;
+ } else if (!arg) {
+ WFD_MSG_ERR("Invalid input buffer\n");
+ rc = -EINVAL;
+ goto set_input_buffer_fail;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+ if (get_registered_mregion(&inst->registered_input_bufs, mregion)) {
+ WFD_MSG_ERR("Duplicate input buffer\n");
+ rc = -EEXIST;
+ goto set_input_buffer_fail;
+ }
+
+ mregion = kzalloc(sizeof(*mregion), GFP_KERNEL);
+ *mregion = *(struct mem_region *)arg;
+
+ plane = (struct v4l2_plane) {
+ .length = mregion->size,
+ .m.userptr = (u32)mregion->paddr,
+ };
+
+ buf = (struct v4l2_buffer) {
+ .index = get_list_len(&inst->registered_input_bufs),
+ .type = BUF_TYPE_INPUT,
+ .bytesused = 0,
+ .memory = V4L2_MEMORY_USERPTR,
+ .m.planes = &plane,
+ .length = 1,
+ };
+
+ WFD_MSG_DBG("Prepare %p with index, %d",
+ (void *)buf.m.planes[0].m.userptr, buf.index);
+ rc = msm_vidc_prepare_buf(inst->vidc_context, &buf);
+ if (rc) {
+ WFD_MSG_ERR("Failed to prepare input buffer\n");
+ goto set_input_buffer_fail;
+ }
+
+ list_add_tail(&mregion->list, &inst->registered_input_bufs.list);
+ return 0;
+set_input_buffer_fail:
+ kfree(mregion);
+ return rc;
+}
+
+static int venc_map_user_to_kernel(struct venc_inst *inst,
+ struct mem_region *mregion)
+{
+ int rc = 0;
+ unsigned long flags = 0, size = 0;
+ if (!mregion) {
+ rc = -EINVAL;
+ goto venc_map_fail;
+ }
+
+ mregion->ion_handle = ion_import_dma_buf(venc_ion_client, mregion->fd);
+ if (IS_ERR_OR_NULL(mregion->ion_handle)) {
+ rc = PTR_ERR(mregion->ion_handle);
+ WFD_MSG_ERR("Failed to get handle: %p, %d, %d, %d\n",
+ venc_ion_client, mregion->fd, mregion->offset, rc);
+ mregion->ion_handle = NULL;
+ goto venc_map_fail;
+ }
+
+ rc = ion_handle_get_flags(venc_ion_client, mregion->ion_handle, &flags);
+ if (rc) {
+ WFD_MSG_ERR("Failed to get ion flags %d\n", rc);
+ goto venc_map_fail;
+ }
+
+ mregion->kvaddr = ion_map_kernel(venc_ion_client,
+ mregion->ion_handle);
+
+ if (IS_ERR_OR_NULL(mregion->kvaddr)) {
+ WFD_MSG_ERR("Failed to map buffer into kernel\n");
+ rc = PTR_ERR(mregion->kvaddr);
+ mregion->kvaddr = NULL;
+ goto venc_map_fail;
+ }
+
+ rc = ion_map_iommu(venc_ion_client, mregion->ion_handle,
+ inst->domain, 0, SZ_4K, 0,
+ (unsigned long *)&mregion->paddr, &size, flags, 0);
+
+ if (rc) {
+ WFD_MSG_ERR("Failed to map into iommu\n");
+ goto venc_map_iommu_map_fail;
+ } else if (size < mregion->size) {
+ WFD_MSG_ERR("Failed to iommu map the correct size\n");
+ goto venc_map_iommu_size_fail;
+ }
+
+ return 0;
+venc_map_iommu_size_fail:
+ ion_unmap_iommu(venc_ion_client, mregion->ion_handle,
+ inst->domain, 0);
+venc_map_iommu_map_fail:
+ ion_unmap_kernel(venc_ion_client, mregion->ion_handle);
+venc_map_fail:
+ return rc;
+}
+
+static int venc_unmap_user_to_kernel(struct venc_inst *inst,
+ struct mem_region *mregion)
+{
+ if (!mregion || !mregion->ion_handle)
+ return 0;
+
+ if (mregion->paddr) {
+ ion_unmap_iommu(venc_ion_client, mregion->ion_handle,
+ inst->domain, 0);
+ mregion->paddr = NULL;
+ }
+
+ if (mregion->kvaddr) {
+ ion_unmap_kernel(venc_ion_client, mregion->ion_handle);
+ mregion->kvaddr = NULL;
+ }
+
+
+ return 0;
+}
+
+static long venc_set_output_buffer(struct v4l2_subdev *sd, void *arg)
+{
+ int rc = 0;
+ struct venc_inst *inst = NULL;
+ struct v4l2_buffer buf = {0};
+ struct v4l2_plane plane = {0};
+ struct mem_region *mregion = arg;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ rc = -EINVAL;
+ goto venc_set_output_buffer_fail;
+ } else if (!mregion) {
+ WFD_MSG_ERR("Invalid output buffer\n");
+ rc = -EINVAL;
+ goto venc_set_output_buffer_fail;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+
+ /* Check if buf already registered */
+ if (get_registered_mregion(&inst->registered_output_bufs, mregion)) {
+ WFD_MSG_ERR("Duplicate output buffer\n");
+ rc = -EEXIST;
+ goto venc_set_output_buffer_fail;
+ }
+
+ mregion = kzalloc(sizeof(*mregion), GFP_KERNEL);
+
+ if (!mregion) {
+ WFD_MSG_ERR("Failed to allocate memory\n");
+ goto venc_set_output_buffer_fail;
+ }
+
+ *mregion = *(struct mem_region *)arg;
+ INIT_LIST_HEAD(&mregion->list);
+
+ rc = venc_map_user_to_kernel(inst, mregion);
+ if (rc) {
+ WFD_MSG_ERR("Failed to map output buffer\n");
+ goto venc_set_output_buffer_map_fail;
+ }
+
+ plane = (struct v4l2_plane) {
+ .length = mregion->size,
+ .m.userptr = (u32)mregion->paddr,
+ };
+
+ buf = (struct v4l2_buffer) {
+ .index = get_list_len(&inst->registered_output_bufs),
+ .type = BUF_TYPE_OUTPUT,
+ .bytesused = 0,
+ .memory = V4L2_MEMORY_USERPTR,
+ .m.planes = &plane,
+ .length = 1,
+ };
+
+ WFD_MSG_DBG("Prepare %p with index, %d",
+ (void *)buf.m.planes[0].m.userptr, buf.index);
+ rc = msm_vidc_prepare_buf(inst->vidc_context, &buf);
+ if (rc) {
+ WFD_MSG_ERR("Failed to prepare output buffer\n");
+ goto venc_set_output_buffer_prepare_fail;
+ }
+
+ list_add_tail(&mregion->list, &inst->registered_output_bufs.list);
+ return rc;
+venc_set_output_buffer_prepare_fail:
+ venc_unmap_user_to_kernel(inst, mregion);
+venc_set_output_buffer_map_fail:
+ kfree(mregion);
+venc_set_output_buffer_fail:
+ return rc;
+}
+
+static long venc_set_format(struct v4l2_subdev *sd, void *arg)
+{
+ struct venc_inst *inst = NULL;
+ struct v4l2_format *fmt = arg, temp;
+ int rc = 0;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ rc = -EINVAL;
+ goto venc_set_format_fail;
+ } else if (!fmt) {
+ WFD_MSG_ERR("Invalid format\n");
+ rc = -EINVAL;
+ goto venc_set_format_fail;
+ } else if (fmt->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) {
+ WFD_MSG_ERR("Invalid buffer type %d\n", fmt->type);
+ rc = -ENOTSUPP;
+ goto venc_set_format_fail;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+ temp = (struct v4l2_format) {
+ .type = BUF_TYPE_OUTPUT,
+ .fmt.pix_mp = (struct v4l2_pix_format_mplane) {
+ .width = fmt->fmt.pix.width,
+ .height = fmt->fmt.pix.height,
+ .pixelformat = fmt->fmt.pix.pixelformat,
+ },
+ };
+
+ rc = msm_vidc_s_fmt(inst->vidc_context, &temp);
+
+ if (rc) {
+ WFD_MSG_ERR("Failed to format for output port\n");
+ goto venc_set_format_fail;
+ } else if (!temp.fmt.pix_mp.num_planes) {
+ WFD_MSG_ERR("No. of planes for output buffers make no sense\n");
+ rc = -EINVAL;
+ goto venc_set_format_fail;
+ }
+ fmt->fmt.pix.sizeimage = temp.fmt.pix_mp.plane_fmt[0].sizeimage;
+ inst->num_output_planes = temp.fmt.pix_mp.num_planes;
+
+ temp.type = BUF_TYPE_INPUT;
+ temp.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12;
+ rc = msm_vidc_s_fmt(inst->vidc_context, &temp);
+ inst->num_input_planes = temp.fmt.pix_mp.num_planes;
+
+ if (rc) {
+ WFD_MSG_ERR("Failed to format for input port\n");
+ goto venc_set_format_fail;
+ }
+venc_set_format_fail:
+ return rc;
+}
+
+static long venc_set_framerate(struct v4l2_subdev *sd, void *arg)
+{
+ struct venc_inst *inst = NULL;
+ struct v4l2_control ctrl = {0};
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ return -EINVAL;
+ } else if (!arg) {
+ WFD_MSG_ERR("Invalid framerate\n");
+ return -EINVAL;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+ ctrl.id = V4L2_CID_MPEG_VIDC_VIDEO_FRAME_RATE;
+ ctrl.value = 30;
+ return msm_vidc_s_ctrl(inst->vidc_context, &ctrl);
+}
+
+static long venc_fill_outbuf(struct v4l2_subdev *sd, void *arg)
+{
+ struct venc_inst *inst = NULL;
+ struct mem_region *mregion = NULL;
+ struct v4l2_buffer buffer = {0};
+ struct v4l2_plane plane = {0};
+ int index = 0, rc = 0;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ return -EINVAL;
+ } else if (!arg) {
+ WFD_MSG_ERR("Invalid output buffer ot fill\n");
+ return -EINVAL;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+ mregion = get_registered_mregion(&inst->registered_output_bufs, arg);
+
+ if (!mregion) {
+ WFD_MSG_ERR("Output buffer not registered\n");
+ return -ENOENT;
+ }
+
+ plane = (struct v4l2_plane) {
+ .length = mregion->size,
+ .m.userptr = (u32)mregion->paddr,
+ };
+
+ while (true) {
+ mutex_lock(&inst->lock);
+ index = next_free_index(&inst->free_output_indices);
+ mutex_unlock(&inst->lock);
+
+ if (index < 0)
+ wait_for_completion(&inst->dq_complete);
+ else
+ break;
+ }
+
+ buffer = (struct v4l2_buffer) {
+ .index = index,
+ .type = BUF_TYPE_OUTPUT,
+ .memory = V4L2_MEMORY_USERPTR,
+ .m.planes = &plane,
+ .length = 1,
+ };
+
+ WFD_MSG_DBG("Fill buffer %p with index, %d",
+ (void *)buffer.m.planes[0].m.userptr, buffer.index);
+ rc = msm_vidc_qbuf(inst->vidc_context, &buffer);
+ if (!rc) {
+ mutex_lock(&inst->lock);
+ mark_index_busy(&inst->free_output_indices, index);
+ mutex_unlock(&inst->lock);
+ }
+ return rc;
+
+}
+
+static long venc_encode_frame(struct v4l2_subdev *sd, void *arg)
+{
+ struct venc_inst *inst = NULL;
+ struct venc_buf_info *venc_buf = arg;
+ struct mem_region *mregion = NULL;
+ struct v4l2_buffer buffer = {0};
+ struct v4l2_plane plane = {0};
+ int index = 0, rc = 0;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ return -EINVAL;
+ } else if (!venc_buf) {
+ WFD_MSG_ERR("Invalid output buffer ot fill\n");
+ return -EINVAL;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+ mregion = venc_buf->mregion;
+
+ plane = (struct v4l2_plane) {
+ .length = mregion->size,
+ .m.userptr = (u32)mregion->paddr,
+ .bytesused = mregion->size,
+ };
+
+ while (true) {
+ mutex_lock(&inst->lock);
+ index = next_free_index(&inst->free_input_indices);
+ mutex_unlock(&inst->lock);
+
+ if (index < 0)
+ wait_for_completion(&inst->dq_complete);
+ else
+ break;
+ }
+
+ buffer = (struct v4l2_buffer) {
+ .index = index,
+ .type = BUF_TYPE_INPUT,
+ .timestamp = ns_to_timeval(venc_buf->timestamp),
+ .memory = V4L2_MEMORY_USERPTR,
+ .m.planes = &plane,
+ .length = 1,
+ };
+
+ WFD_MSG_DBG("Encode buffer %p with index, %d",
+ (void *)buffer.m.planes[0].m.userptr, buffer.index);
+ rc = msm_vidc_qbuf(inst->vidc_context, &buffer);
+ if (!rc) {
+ mutex_lock(&inst->lock);
+ mark_index_busy(&inst->free_input_indices, index);
+ mutex_unlock(&inst->lock);
+ }
+ return rc;
+}
+
+static long venc_alloc_recon_buffers(struct v4l2_subdev *sd, void *arg)
+{
+ /* vidc driver allocates internally on streamon */
+ return 0;
+}
+
+static long venc_free_buffer(struct venc_inst *inst, int type,
+ struct mem_region *to_free, bool unmap_user_buffer)
+{
+ struct mem_region *mregion = NULL;
+ struct mem_region *buf_list = NULL;
+
+ if (type == BUF_TYPE_OUTPUT) {
+ buf_list = &inst->registered_output_bufs;
+ } else if (type == BUF_TYPE_INPUT) {
+ buf_list = &inst->registered_input_bufs;
+ } else {
+ WFD_MSG_ERR("Trying to free a buffer of unknown type\n");
+ return -EINVAL;
+ }
+
+ mregion = get_registered_mregion(buf_list, to_free);
+
+ if (!mregion) {
+ WFD_MSG_ERR("Buffer not registered, cannot free\n");
+ return -ENOENT;
+ }
+
+ if (unmap_user_buffer) {
+ int rc = venc_unmap_user_to_kernel(inst, mregion);
+ if (rc)
+ WFD_MSG_WARN("Unable to unmap user buffer\n");
+ }
+
+ list_del(&mregion->list);
+ kfree(mregion);
+ return 0;
+}
+static long venc_free_output_buffer(struct v4l2_subdev *sd, void *arg)
+{
+ int rc = 0;
+ struct venc_inst *inst = NULL;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ rc = -EINVAL;
+ goto venc_free_output_buffer_fail;
+ } else if (!arg) {
+ WFD_MSG_ERR("Invalid output buffer\n");
+ rc = -EINVAL;
+ goto venc_free_output_buffer_fail;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+ return venc_free_buffer(inst, BUF_TYPE_OUTPUT, arg, true);
+venc_free_output_buffer_fail:
+ return rc;
+}
+
+static long venc_flush_buffers(struct v4l2_subdev *sd, void *arg)
+{
+ struct venc_inst *inst = NULL;
+ struct v4l2_encoder_cmd enc_cmd = {0};
+ int rc = 0;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ rc = -EINVAL;
+ goto venc_flush_buffers_fail;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+
+ enc_cmd.cmd = V4L2_ENC_QCOM_CMD_FLUSH;
+ enc_cmd.flags = BUF_TYPE_INPUT | BUF_TYPE_OUTPUT;
+ msm_vidc_encoder_cmd(inst->vidc_context, &enc_cmd);
+
+ wait_for_completion(&inst->cmd_complete);
+venc_flush_buffers_fail:
+ return rc;
+}
+
+static long venc_free_input_buffer(struct v4l2_subdev *sd, void *arg)
+{
+ int rc = 0;
+ struct venc_inst *inst = NULL;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ rc = -EINVAL;
+ goto venc_free_input_buffer_fail;
+ } else if (!arg) {
+ WFD_MSG_ERR("Invalid output buffer\n");
+ rc = -EINVAL;
+ goto venc_free_input_buffer_fail;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+ return venc_free_buffer(inst, BUF_TYPE_INPUT, arg, false);
+venc_free_input_buffer_fail:
+ return rc;
+}
+
+static long venc_free_recon_buffers(struct v4l2_subdev *sd, void *arg)
+{
+ /* vidc driver takes care of this */
+ return 0;
+}
+
+static long venc_set_property(struct v4l2_subdev *sd, void *arg)
+{
+ struct venc_inst *inst = NULL;
+ struct v4l2_control *ctrl = arg;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ return -EINVAL;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+ if (ctrl->id == V4L2_CID_MPEG_VIDEO_HEADER_MODE) {
+ /* XXX: We don't support this yet, but to prevent unncessary
+ * target specific code for the client, we'll not error out.
+ * The client ideally shouldn't notice this */
+ return 0;
+ }
+
+ return msm_vidc_s_ctrl(inst->vidc_context, (struct v4l2_control *)arg);
+}
+
+static long venc_get_property(struct v4l2_subdev *sd, void *arg)
+{
+ struct venc_inst *inst = NULL;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ return -EINVAL;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+ return msm_vidc_g_ctrl(inst->vidc_context, (struct v4l2_control *)arg);
+}
+
+long venc_mmap(struct v4l2_subdev *sd, void *arg)
+{
+ struct mem_region_map *mmap = arg;
+ struct mem_region *mregion = NULL;
+ unsigned long rc = 0, size = 0;
+ void *paddr = NULL;
+ struct venc_inst *inst = NULL;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ return -EINVAL;
+ } else if (!mmap || !mmap->mregion) {
+ WFD_MSG_ERR("Memregion required for %s\n", __func__);
+ return -EINVAL;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+ mregion = mmap->mregion;
+ if (mregion->size % SZ_4K != 0) {
+ WFD_MSG_ERR("Memregion not aligned to %d\n", SZ_4K);
+ return -EINVAL;
+ }
+
+ rc = ion_map_iommu(mmap->ion_client, mregion->ion_handle,
+ inst->domain, 0, SZ_4K, 0, (unsigned long *)&paddr,
+ &size, 0, 0);
+
+ if (rc) {
+ WFD_MSG_ERR("Failed to get physical addr\n");
+ paddr = NULL;
+ } else if (size < mregion->size) {
+ WFD_MSG_ERR("Failed to map enough memory\n");
+ rc = -ENOMEM;
+ }
+
+ mregion->paddr = paddr;
+ return rc;
+}
+
+long venc_munmap(struct v4l2_subdev *sd, void *arg)
+{
+ struct mem_region_map *mmap = arg;
+ struct mem_region *mregion = NULL;
+ struct venc_inst *inst = NULL;
+
+ if (!sd) {
+ WFD_MSG_ERR("Subdevice required for %s\n", __func__);
+ return -EINVAL;
+ } else if (!mmap || !mmap->mregion) {
+ WFD_MSG_ERR("Memregion required for %s\n", __func__);
+ return -EINVAL;
+ }
+
+ inst = (struct venc_inst *)sd->dev_priv;
+ mregion = mmap->mregion;
+
+ ion_unmap_iommu(mmap->ion_client, mregion->ion_handle,
+ inst->domain, 0);
+ return 0;
+}
+
+long venc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
+{
+ long rc = 0;
+ switch (cmd) {
+ case OPEN:
+ rc = venc_open(sd, arg);
+ break;
+ case CLOSE:
+ rc = venc_close(sd, arg);
+ break;
+ case ENCODE_START:
+ rc = venc_start(sd);
+ break;
+ case ENCODE_FRAME:
+ venc_encode_frame(sd, arg);
+ break;
+ case ENCODE_STOP:
+ rc = venc_stop(sd);
+ break;
+ case SET_PROP:
+ rc = venc_set_property(sd, arg);
+ break;
+ case GET_PROP:
+ rc = venc_get_property(sd, arg);
+ break;
+ case GET_BUFFER_REQ:
+ rc = venc_get_buffer_req(sd, arg);
+ break;
+ case SET_BUFFER_REQ:
+ rc = venc_set_buffer_req(sd, arg);
+ break;
+ case FREE_BUFFER:
+ break;
+ case FILL_OUTPUT_BUFFER:
+ rc = venc_fill_outbuf(sd, arg);
+ break;
+ case SET_FORMAT:
+ rc = venc_set_format(sd, arg);
+ break;
+ case SET_FRAMERATE:
+ rc = venc_set_framerate(sd, arg);
+ break;
+ case SET_INPUT_BUFFER:
+ rc = venc_set_input_buffer(sd, arg);
+ break;
+ case SET_OUTPUT_BUFFER:
+ rc = venc_set_output_buffer(sd, arg);
+ break;
+ case ALLOC_RECON_BUFFERS:
+ rc = venc_alloc_recon_buffers(sd, arg);
+ break;
+ case FREE_OUTPUT_BUFFER:
+ rc = venc_free_output_buffer(sd, arg);
+ break;
+ case FREE_INPUT_BUFFER:
+ rc = venc_free_input_buffer(sd, arg);
+ break;
+ case FREE_RECON_BUFFERS:
+ rc = venc_free_recon_buffers(sd, arg);
+ break;
+ case ENCODE_FLUSH:
+ rc = venc_flush_buffers(sd, arg);
+ break;
+ case ENC_MMAP:
+ rc = venc_mmap(sd, arg);
+ break;
+ case ENC_MUNMAP:
+ rc = venc_munmap(sd, arg);
+ break;
+ default:
+ WFD_MSG_ERR("Unknown ioctl %d to enc-subdev\n", cmd);
+ rc = -ENOTSUPP;
+ break;
+ }
+ return rc;
+}
diff --git a/drivers/media/video/msm_wfd/mdp-subdev.c b/drivers/media/video/msm_wfd/mdp-4-subdev.c
similarity index 67%
copy from drivers/media/video/msm_wfd/mdp-subdev.c
copy to drivers/media/video/msm_wfd/mdp-4-subdev.c
index 886b0ba..c68d5d4 100644
--- a/drivers/media/video/msm_wfd/mdp-subdev.c
+++ b/drivers/media/video/msm_wfd/mdp-4-subdev.c
@@ -10,53 +10,66 @@
* GNU General Public License for more details.
*
*/
+#include <linux/msm_mdp.h>
+#include <mach/iommu_domains.h>
+#include <media/videobuf2-core.h>
+#include "enc-subdev.h"
#include "mdp-subdev.h"
#include "wfd-util.h"
-#include <media/videobuf2-core.h>
-#include <linux/msm_mdp.h>
struct mdp_instance {
struct fb_info *mdp;
u32 height;
u32 width;
+ bool secure;
+ bool uses_iommu_split_domain;
};
int mdp_init(struct v4l2_subdev *sd, u32 val)
{
return 0;
}
+
int mdp_open(struct v4l2_subdev *sd, void *arg)
{
struct mdp_instance *inst = kzalloc(sizeof(struct mdp_instance),
GFP_KERNEL);
- void **cookie = (void **)arg;
+ struct mdp_msg_ops *mops = arg;
int rc = 0;
struct fb_info *fbi = NULL;
if (!inst) {
WFD_MSG_ERR("Out of memory\n");
- return -ENOMEM;
+ rc = -ENOMEM;
+ goto mdp_open_fail;
+ } else if (!mops) {
+ WFD_MSG_ERR("Invalid arguments\n");
+ rc = -EINVAL;
+ goto mdp_open_fail;
}
fbi = msm_fb_get_writeback_fb();
if (!fbi) {
WFD_MSG_ERR("Failed to acquire mdp instance\n");
rc = -ENODEV;
- goto exit;
+ goto mdp_open_fail;
}
/*Tell HDMI daemon to open fb2*/
rc = kobject_uevent(&fbi->dev->kobj, KOBJ_ADD);
if (rc) {
WFD_MSG_ERR("Failed add to kobj");
- goto exit;
+ goto mdp_open_fail;
}
msm_fb_writeback_init(fbi);
inst->mdp = fbi;
- *cookie = inst;
+ inst->secure = mops->secure;
+ inst->uses_iommu_split_domain = mops->iommu_split_domain;
+
+ mops->cookie = inst;
return rc;
-exit:
+mdp_open_fail:
kfree(inst);
return rc;
}
@@ -134,8 +147,8 @@
fbdata.flags = 0;
fbdata.priv = (uint32_t)binfo->cookie;
- WFD_MSG_INFO("queue buffer to mdp with offset = %u,"
- "fd = %u, priv = %p, iova = %p\n",
+ WFD_MSG_INFO("queue buffer to mdp with offset = %u, fd = %u, "\
+ "priv = %p, iova = %p\n",
fbdata.offset, fbdata.memory_id,
(void *)fbdata.priv, (void *)fbdata.iova);
rc = msm_fb_writeback_queue_buffer(inst->mdp, &fbdata);
@@ -179,6 +192,84 @@
inst->width = prop->width;
return 0;
}
+
+int mdp_mmap(struct v4l2_subdev *sd, void *arg)
+{
+ int rc = 0, domain = -1;
+ struct mem_region_map *mmap = arg;
+ struct mem_region *mregion;
+ bool use_iommu = true;
+ struct mdp_instance *inst = NULL;
+
+ if (!mmap || !mmap->mregion || !mmap->cookie) {
+ WFD_MSG_ERR("Invalid argument\n");
+ return -EINVAL;
+ }
+
+ inst = mmap->cookie;
+ mregion = mmap->mregion;
+ if (mregion->size % SZ_4K != 0) {
+ WFD_MSG_ERR("Memregion not aligned to %d\n", SZ_4K);
+ return -EINVAL;
+ }
+
+ if (inst->uses_iommu_split_domain) {
+ if (inst->secure)
+ use_iommu = false;
+ else
+ domain = DISPLAY_WRITE_DOMAIN;
+ } else {
+ domain = DISPLAY_READ_DOMAIN;
+ }
+
+ if (use_iommu) {
+ rc = ion_map_iommu(mmap->ion_client, mregion->ion_handle,
+ domain, GEN_POOL, SZ_4K, 0,
+ (unsigned long *)&mregion->paddr,
+ (unsigned long *)&mregion->size,
+ 0, 0);
+ } else {
+ rc = ion_phys(mmap->ion_client, mregion->ion_handle,
+ (unsigned long *)&mregion->paddr,
+ (size_t *)&mregion->size);
+ }
+
+ return rc;
+}
+
+int mdp_munmap(struct v4l2_subdev *sd, void *arg)
+{
+ struct mem_region_map *mmap = arg;
+ struct mem_region *mregion;
+ bool use_iommu = false;
+ int domain = -1;
+ struct mdp_instance *inst = NULL;
+
+ if (!mmap || !mmap->mregion || !mmap->cookie) {
+ WFD_MSG_ERR("Invalid argument\n");
+ return -EINVAL;
+ }
+
+ inst = mmap->cookie;
+ mregion = mmap->mregion;
+
+ if (inst->uses_iommu_split_domain) {
+ if (inst->secure)
+ use_iommu = false;
+ else
+ domain = DISPLAY_WRITE_DOMAIN;
+ } else {
+ domain = DISPLAY_READ_DOMAIN;
+ }
+
+ if (use_iommu)
+ ion_unmap_iommu(mmap->ion_client,
+ mregion->ion_handle,
+ domain, GEN_POOL);
+
+ return 0;
+}
+
long mdp_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
{
int rc = 0;
@@ -208,6 +299,12 @@
case MDP_CLOSE:
rc = mdp_close(sd, arg);
break;
+ case MDP_MMAP:
+ rc = mdp_mmap(sd, arg);
+ break;
+ case MDP_MUNMAP:
+ rc = mdp_munmap(sd, arg);
+ break;
default:
WFD_MSG_ERR("IOCTL: %u not supported\n", cmd);
rc = -EINVAL;
diff --git a/drivers/media/video/msm_wfd/mdp-subdev.c b/drivers/media/video/msm_wfd/mdp-5-subdev.c
similarity index 72%
rename from drivers/media/video/msm_wfd/mdp-subdev.c
rename to drivers/media/video/msm_wfd/mdp-5-subdev.c
index 886b0ba..4f29389 100644
--- a/drivers/media/video/msm_wfd/mdp-subdev.c
+++ b/drivers/media/video/msm_wfd/mdp-5-subdev.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -10,53 +10,63 @@
* GNU General Public License for more details.
*
*/
+#include <linux/msm_mdp.h>
+#include <mach/iommu_domains.h>
+#include <media/videobuf2-core.h>
+#include "enc-subdev.h"
#include "mdp-subdev.h"
#include "wfd-util.h"
-#include <media/videobuf2-core.h>
-#include <linux/msm_mdp.h>
+
struct mdp_instance {
struct fb_info *mdp;
u32 height;
u32 width;
+ bool secure;
};
int mdp_init(struct v4l2_subdev *sd, u32 val)
{
return 0;
}
+
int mdp_open(struct v4l2_subdev *sd, void *arg)
{
struct mdp_instance *inst = kzalloc(sizeof(struct mdp_instance),
GFP_KERNEL);
- void **cookie = (void **)arg;
+ struct mdp_msg_ops *mops = arg;
int rc = 0;
struct fb_info *fbi = NULL;
if (!inst) {
WFD_MSG_ERR("Out of memory\n");
- return -ENOMEM;
+ rc = -ENOMEM;
+ goto mdp_open_fail;
+ } else if (!mops) {
+ WFD_MSG_ERR("Invalid arguments\n");
+ rc = -EINVAL;
+ goto mdp_open_fail;
}
fbi = msm_fb_get_writeback_fb();
if (!fbi) {
WFD_MSG_ERR("Failed to acquire mdp instance\n");
rc = -ENODEV;
- goto exit;
+ goto mdp_open_fail;
}
/*Tell HDMI daemon to open fb2*/
rc = kobject_uevent(&fbi->dev->kobj, KOBJ_ADD);
- if (rc) {
+ if (rc)
WFD_MSG_ERR("Failed add to kobj");
- goto exit;
- }
msm_fb_writeback_init(fbi);
inst->mdp = fbi;
- *cookie = inst;
+ inst->secure = mops->secure;
+
+ mops->cookie = inst;
return rc;
-exit:
+mdp_open_fail:
kfree(inst);
return rc;
}
@@ -85,6 +95,7 @@
exit:
return rc;
}
+
int mdp_stop(struct v4l2_subdev *sd, void *arg)
{
struct mdp_instance *inst = arg;
@@ -134,8 +145,8 @@
fbdata.flags = 0;
fbdata.priv = (uint32_t)binfo->cookie;
- WFD_MSG_INFO("queue buffer to mdp with offset = %u,"
- "fd = %u, priv = %p, iova = %p\n",
+ WFD_MSG_DBG("queue buffer to mdp with offset = %u, fd = %u, "\
+ "priv = %p, iova = %p\n",
fbdata.offset, fbdata.memory_id,
(void *)fbdata.priv, (void *)fbdata.iova);
rc = msm_fb_writeback_queue_buffer(inst->mdp, &fbdata);
@@ -179,6 +190,58 @@
inst->width = prop->width;
return 0;
}
+
+int mdp_mmap(struct v4l2_subdev *sd, void *arg)
+{
+ int rc = 0;
+ struct mem_region_map *mmap = arg;
+ struct mem_region *mregion;
+ bool domain = -1;
+ struct mdp_instance *inst = NULL;
+
+ if (!mmap || !mmap->mregion || !mmap->cookie) {
+ WFD_MSG_ERR("Invalid argument\n");
+ return -EINVAL;
+ }
+
+ inst = mmap->cookie;
+ mregion = mmap->mregion;
+ if (mregion->size % SZ_4K != 0) {
+ WFD_MSG_ERR("Memregion not aligned to %d\n", SZ_4K);
+ return -EINVAL;
+ }
+
+ domain = msm_fb_get_iommu_domain();
+ rc = ion_map_iommu(mmap->ion_client, mregion->ion_handle,
+ domain, 0, SZ_4K, 0,
+ (unsigned long *)&mregion->paddr,
+ (unsigned long *)&mregion->size,
+ 0, 0);
+ return rc;
+}
+
+int mdp_munmap(struct v4l2_subdev *sd, void *arg)
+{
+ struct mem_region_map *mmap = arg;
+ struct mem_region *mregion;
+ bool domain = -1;
+ struct mdp_instance *inst = NULL;
+
+ if (!mmap || !mmap->mregion || !mmap->cookie) {
+ WFD_MSG_ERR("Invalid argument\n");
+ return -EINVAL;
+ }
+
+ inst = mmap->cookie;
+ mregion = mmap->mregion;
+
+ domain = msm_fb_get_iommu_domain();
+ ion_unmap_iommu(mmap->ion_client,
+ mregion->ion_handle,
+ domain, 0);
+ return 0;
+}
+
long mdp_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
{
int rc = 0;
@@ -208,6 +271,12 @@
case MDP_CLOSE:
rc = mdp_close(sd, arg);
break;
+ case MDP_MMAP:
+ rc = mdp_mmap(sd, arg);
+ break;
+ case MDP_MUNMAP:
+ rc = mdp_munmap(sd, arg);
+ break;
default:
WFD_MSG_ERR("IOCTL: %u not supported\n", cmd);
rc = -EINVAL;
diff --git a/drivers/media/video/msm_wfd/mdp-dummy-subdev.c b/drivers/media/video/msm_wfd/mdp-dummy-subdev.c
new file mode 100644
index 0000000..b2db208
--- /dev/null
+++ b/drivers/media/video/msm_wfd/mdp-dummy-subdev.c
@@ -0,0 +1,187 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License version 2 and
+* only version 2 as published by the Free Software Foundation.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+*/
+#include <linux/list.h>
+#include <linux/msm_mdp.h>
+#include <media/videobuf2-core.h>
+
+#include "enc-subdev.h"
+#include "mdp-subdev.h"
+#include "wfd-util.h"
+
+struct mdp_buf_queue {
+ struct mdp_buf_info mdp_buf_info;
+ struct list_head node;
+};
+
+struct mdp_instance {
+ struct mdp_buf_queue mdp_bufs;
+ struct mutex mutex;
+};
+
+int mdp_init(struct v4l2_subdev *sd, u32 val)
+{
+ return 0;
+}
+int mdp_open(struct v4l2_subdev *sd, void *arg)
+{
+ struct mdp_instance *inst = kzalloc(sizeof(struct mdp_instance),
+ GFP_KERNEL);
+ void **cookie = (void **)arg;
+ int rc = 0;
+
+ if (!inst) {
+ WFD_MSG_ERR("Out of memory\n");
+ return -ENOMEM;
+ }
+
+ INIT_LIST_HEAD(&inst->mdp_bufs.node);
+ mutex_init(&inst->mutex);
+ *cookie = inst;
+ return rc;
+}
+
+int mdp_start(struct v4l2_subdev *sd, void *arg)
+{
+ return 0;
+}
+int mdp_stop(struct v4l2_subdev *sd, void *arg)
+{
+ return 0;
+}
+int mdp_close(struct v4l2_subdev *sd, void *arg)
+{
+ return 0;
+}
+int mdp_q_buffer(struct v4l2_subdev *sd, void *arg)
+{
+ static int foo;
+ int rc = 0;
+ struct mdp_buf_info *binfo = arg;
+ struct mdp_instance *inst = NULL;
+
+ if (!binfo || !binfo->inst || !binfo->cookie) {
+ WFD_MSG_ERR("Invalid argument\n");
+ return -EINVAL;
+ }
+
+
+ inst = binfo->inst;
+ if (binfo->kvaddr) {
+ struct mdp_buf_queue *new_entry = kzalloc(sizeof(*new_entry),
+ GFP_KERNEL);
+ memset((void *)binfo->kvaddr, foo++, 1024);
+ new_entry->mdp_buf_info = *binfo;
+ mutex_lock(&inst->mutex);
+ list_add_tail(&new_entry->node, &inst->mdp_bufs.node);
+ mutex_unlock(&inst->mutex);
+ WFD_MSG_DBG("Queue %p with cookie %p\n",
+ (void *)binfo->paddr, (void *)binfo->cookie);
+ } else {
+ rc = -EINVAL;
+ }
+
+ return rc;
+}
+int mdp_dq_buffer(struct v4l2_subdev *sd, void *arg)
+{
+ struct mdp_buf_info *binfo = arg;
+ struct mdp_buf_queue *head = NULL;
+ struct mdp_instance *inst = NULL;
+
+ inst = binfo->inst;
+
+ while (head == NULL) {
+ mutex_lock(&inst->mutex);
+ if (!list_empty(&inst->mdp_bufs.node))
+ head = list_first_entry(&inst->mdp_bufs.node,
+ struct mdp_buf_queue, node);
+ mutex_unlock(&inst->mutex);
+ }
+
+ if (head == NULL)
+ return -ENOBUFS;
+
+ mutex_lock(&inst->mutex);
+ list_del(&head->node);
+ mutex_unlock(&inst->mutex);
+
+ *binfo = head->mdp_buf_info;
+ WFD_MSG_DBG("Dequeue %p with cookie %p\n",
+ (void *)binfo->paddr, (void *)binfo->cookie);
+ return 0;
+
+}
+int mdp_set_prop(struct v4l2_subdev *sd, void *arg)
+{
+ return 0;
+}
+
+int mdp_mmap(struct v4l2_subdev *sd, void *arg)
+{
+ int rc = 0;
+ struct mem_region_map *mmap = arg;
+ struct mem_region *mregion;
+
+ mregion = mmap->mregion;
+ mregion->paddr = mregion->kvaddr;
+ return rc;
+}
+
+int mdp_munmap(struct v4l2_subdev *sd, void *arg)
+{
+ /* Whatever */
+ return 0;
+}
+
+long mdp_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
+{
+ int rc = 0;
+ if (!sd) {
+ WFD_MSG_ERR("Invalid arguments\n");
+ return -EINVAL;
+ }
+ switch (cmd) {
+ case MDP_Q_BUFFER:
+ rc = mdp_q_buffer(sd, arg);
+ break;
+ case MDP_DQ_BUFFER:
+ rc = mdp_dq_buffer(sd, arg);
+ break;
+ case MDP_OPEN:
+ rc = mdp_open(sd, arg);
+ break;
+ case MDP_START:
+ rc = mdp_start(sd, arg);
+ break;
+ case MDP_STOP:
+ rc = mdp_stop(sd, arg);
+ break;
+ case MDP_SET_PROP:
+ rc = mdp_set_prop(sd, arg);
+ break;
+ case MDP_CLOSE:
+ rc = mdp_close(sd, arg);
+ break;
+ case MDP_MMAP:
+ rc = mdp_mmap(sd, arg);
+ break;
+ case MDP_MUNMAP:
+ rc = mdp_munmap(sd, arg);
+ break;
+ default:
+ WFD_MSG_ERR("IOCTL: %u not supported\n", cmd);
+ rc = -EINVAL;
+ break;
+ }
+ return rc;
+}
diff --git a/drivers/media/video/msm_wfd/mdp-subdev.h b/drivers/media/video/msm_wfd/mdp-subdev.h
index 081fead..5e81e3c 100644
--- a/drivers/media/video/msm_wfd/mdp-subdev.h
+++ b/drivers/media/video/msm_wfd/mdp-subdev.h
@@ -34,6 +34,12 @@
u32 width;
};
+struct mdp_msg_ops {
+ void *cookie;
+ bool secure;
+ bool iommu_split_domain;
+};
+
static inline bool mdp_buf_info_equals(struct mdp_buf_info *a,
struct mdp_buf_info *b)
{
@@ -51,6 +57,10 @@
#define MDP_CLOSE _IOR(MDP_MAGIC_IOCTL, 5, void *)
#define MDP_START _IOR(MDP_MAGIC_IOCTL, 6, void *)
#define MDP_STOP _IOR(MDP_MAGIC_IOCTL, 7, void *)
+#define MDP_MMAP _IOR(MDP_MAGIC_IOCTL, 8, struct mem_region_map *)
+#define MDP_MUNMAP _IOR(MDP_MAGIC_IOCTL, 9, struct mem_region_map *)
+
+
extern int mdp_init(struct v4l2_subdev *sd, u32 val);
extern long mdp_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg);
diff --git a/drivers/media/video/msm_wfd/wfd-ioctl.c b/drivers/media/video/msm_wfd/wfd-ioctl.c
index 8981c1a..04b787a 100644
--- a/drivers/media/video/msm_wfd/wfd-ioctl.c
+++ b/drivers/media/video/msm_wfd/wfd-ioctl.c
@@ -10,7 +10,6 @@
* GNU General Public License for more details.
*
*/
-
#include <linux/module.h>
#include <linux/types.h>
#include <linux/list.h>
@@ -40,8 +39,8 @@
#define WFD_NUM_DEVICES 2
#define WFD_DEVICE_NUMBER_BASE 38
#define WFD_DEVICE_SECURE (WFD_DEVICE_NUMBER_BASE + 1)
-#define DEFAULT_WFD_WIDTH 640
-#define DEFAULT_WFD_HEIGHT 480
+#define DEFAULT_WFD_WIDTH 1280
+#define DEFAULT_WFD_HEIGHT 720
#define VENC_INPUT_BUFFERS 4
struct wfd_device {
@@ -152,17 +151,16 @@
static int wfd_allocate_ion_buffer(struct ion_client *client,
bool secure, struct mem_region *mregion)
{
- struct ion_handle *handle;
- void *kvaddr = NULL, *phys_addr = NULL;
- unsigned long size;
+ struct ion_handle *handle = NULL;
+ void *kvaddr = NULL;
unsigned int alloc_regions = 0;
- int rc;
+ int rc = 0;
alloc_regions = ION_HEAP(ION_CP_MM_HEAP_ID);
alloc_regions |= secure ? ION_SECURE :
ION_HEAP(ION_IOMMU_HEAP_ID);
handle = ion_alloc(client,
- mregion->size, SZ_4K, alloc_regions);
+ mregion->size, SZ_4K, alloc_regions, 0);
if (IS_ERR_OR_NULL(handle)) {
WFD_MSG_ERR("Failed to allocate input buffer\n");
@@ -170,7 +168,7 @@
goto alloc_fail;
}
- kvaddr = ion_map_kernel(client, handle, secure ? UNCACHED : CACHED);
+ kvaddr = ion_map_kernel(client, handle);
if (IS_ERR_OR_NULL(kvaddr)) {
WFD_MSG_ERR("Failed to get virtual addr\n");
@@ -178,32 +176,7 @@
goto alloc_fail;
}
- if (secure) {
- WFD_MSG_INFO("%s: calling ion_phys", __func__);
- rc = ion_phys(client,
- handle,
- (unsigned long *)&phys_addr, (size_t *)&size);
- } else {
- WFD_MSG_INFO("%s: calling ion_map_iommu", __func__);
- rc = ion_map_iommu(client, handle,
- VIDEO_DOMAIN, VIDEO_MAIN_POOL, SZ_4K,
- 0, (unsigned long *)&phys_addr,
- &size, 0, 0);
- }
-
- if (rc || !phys_addr) {
- WFD_MSG_ERR(
- "Failed to get physical addr, rc = %d, phys_addr = 0x%p\n",
- rc, phys_addr);
- goto alloc_fail;
- } else if (size < mregion->size) {
- WFD_MSG_ERR("Failed to map enough memory\n");
- rc = -ENOMEM;
- goto alloc_fail;
- }
-
mregion->kvaddr = kvaddr;
- mregion->paddr = phys_addr;
mregion->ion_handle = handle;
return rc;
@@ -273,6 +246,7 @@
spin_unlock_irqrestore(&inst->inst_lock, flags);
for (i = 0; i < VENC_INPUT_BUFFERS; ++i) {
+ struct mem_region_map mmap_context = {0};
mpair = kzalloc(sizeof(*mpair), GFP_KERNEL);
enc_mregion = kzalloc(sizeof(*enc_mregion), GFP_KERNEL);
mdp_mregion = kzalloc(sizeof(*enc_mregion), GFP_KERNEL);
@@ -281,12 +255,20 @@
rc = wfd_allocate_ion_buffer(wfd_dev->ion_client,
wfd_dev->secure_device, enc_mregion);
if (rc) {
- WFD_MSG_ERR("Failed to allocate input memory."
- " This error causes memory leak!!!\n");
+ WFD_MSG_ERR("Failed to allocate input memory\n");
goto alloc_fail;
}
- WFD_MSG_DBG("NOTE: enc paddr = %p, kvaddr = %p\n",
+ mmap_context.mregion = enc_mregion;
+ mmap_context.ion_client = wfd_dev->ion_client;
+ rc = v4l2_subdev_call(&wfd_dev->enc_sdev, core, ioctl,
+ ENC_MMAP, &mmap_context);
+ if (rc || !enc_mregion->paddr) {
+ WFD_MSG_ERR("Failed to map input memory\n");
+ goto alloc_fail;
+ }
+
+ WFD_MSG_ERR("NOTE: enc paddr = %p, kvaddr = %p\n",
enc_mregion->paddr,
enc_mregion->kvaddr);
@@ -301,27 +283,12 @@
mdp_mregion->cookie = 0;
mdp_mregion->ion_handle = enc_mregion->ion_handle;
- if (wfd_dev->mdp_iommu_split_domain) {
- if (wfd_dev->secure_device) {
- rc = ion_phys(wfd_dev->ion_client,
- mdp_mregion->ion_handle,
- (unsigned long *)&mdp_mregion->paddr,
- (size_t *)&mdp_mregion->size);
- } else {
- rc = ion_map_iommu(wfd_dev->ion_client,
- mdp_mregion->ion_handle,
- DISPLAY_WRITE_DOMAIN, GEN_POOL, SZ_4K,
- 0, (unsigned long *)&mdp_mregion->paddr,
- (unsigned long *)&mdp_mregion->size,
- 0, 0);
- }
- } else {
- rc = ion_map_iommu(wfd_dev->ion_client,
- mdp_mregion->ion_handle,
- DISPLAY_READ_DOMAIN, GEN_POOL, SZ_4K,
- 0, (unsigned long *)&mdp_mregion->paddr,
- (unsigned long *)&mdp_mregion->size, 0, 0);
- }
+ memset(&mmap_context, 0, sizeof(mmap_context));
+ mmap_context.mregion = mdp_mregion;
+ mmap_context.ion_client = wfd_dev->ion_client;
+ mmap_context.cookie = inst->mdp_inst;
+ rc = v4l2_subdev_call(&wfd_dev->mdp_sdev, core, ioctl,
+ MDP_MMAP, (void *)&mmap_context);
if (rc || !mdp_mregion->paddr) {
WFD_MSG_ERR(
@@ -401,24 +368,24 @@
"from encoder\n");
if (mpair->mdp->paddr) {
- if (wfd_dev->mdp_iommu_split_domain) {
- if (!wfd_dev->secure_device)
- ion_unmap_iommu(wfd_dev->
- ion_client,
- mpair->mdp->ion_handle,
- DISPLAY_WRITE_DOMAIN,
- GEN_POOL);
- } else {
- ion_unmap_iommu(wfd_dev->ion_client,
- mpair->mdp->ion_handle,
- DISPLAY_READ_DOMAIN, GEN_POOL);
- }
+ struct mem_region_map temp = {0};
+
+ temp.ion_client = wfd_dev->ion_client;
+ temp.mregion = mpair->mdp;
+ temp.cookie = inst->mdp_inst;
+
+ v4l2_subdev_call(&wfd_dev->mdp_sdev, core,
+ ioctl, MDP_MUNMAP,
+ (void *)&temp);
}
- if (mpair->enc->paddr && !wfd_dev->secure_device)
- ion_unmap_iommu(wfd_dev->ion_client,
- mpair->enc->ion_handle,
- VIDEO_DOMAIN, VIDEO_MAIN_POOL);
+ if (mpair->enc->paddr) {
+ struct mem_region_map temp = {0};
+ temp.ion_client = wfd_dev->ion_client;
+ temp.mregion = mpair->enc;
+ v4l2_subdev_call(&wfd_dev->enc_sdev,
+ core, ioctl, ENC_MUNMAP, &temp);
+ }
wfd_free_ion_buffer(wfd_dev->ion_client, mpair->enc);
list_del(&mpair->list);
@@ -884,7 +851,7 @@
list_add_tail(&minfo_entry->list, &inst->minfo_list);
spin_unlock_irqrestore(&inst->inst_lock, flags);
} else
- WFD_MSG_INFO("Buffer already registered\n");
+ WFD_MSG_DBG("Buffer already registered\n");
return 0;
}
@@ -970,7 +937,7 @@
struct wfd_inst *inst = filp->private_data;
int rc;
- WFD_MSG_INFO("Waiting to dequeue buffer\n");
+ WFD_MSG_DBG("Waiting to dequeue buffer\n");
rc = vb2_dqbuf(&inst->vid_bufq, b, 0);
if (rc)
@@ -1306,6 +1273,7 @@
struct wfd_inst *inst = NULL;
struct wfd_device *wfd_dev = NULL;
struct venc_msg_ops enc_mops;
+ struct mdp_msg_ops mdp_mops;
struct vsg_msg_ops vsg_mops;
WFD_MSG_DBG("wfd_open: E\n");
@@ -1339,12 +1307,15 @@
wfd_stats_init(&inst->stats, MINOR(filp->f_dentry->d_inode->i_rdev));
+ mdp_mops.secure = wfd_dev->secure_device;
+ mdp_mops.iommu_split_domain = wfd_dev->mdp_iommu_split_domain;
rc = v4l2_subdev_call(&wfd_dev->mdp_sdev, core, ioctl, MDP_OPEN,
- (void *)&inst->mdp_inst);
+ (void *)&mdp_mops);
if (rc) {
WFD_MSG_ERR("Failed to open mdp subdevice: %d\n", rc);
goto err_mdp_open;
}
+ inst->mdp_inst = mdp_mops.cookie;
rc = v4l2_subdev_call(&wfd_dev->enc_sdev, core, load_fw);
if (rc) {
@@ -1625,12 +1596,21 @@
kfree(wfd_dev);
return 0;
}
+
+static const struct of_device_id msm_wfd_dt_match[] = {
+ {.compatible = "qcom,msm-wfd"},
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, msm_vidc_dt_match);
+
static struct platform_driver wfd_driver = {
.probe = __wfd_probe,
.remove = __wfd_remove,
.driver = {
.name = "msm_wfd",
.owner = THIS_MODULE,
+ .of_match_table = msm_wfd_dt_match,
}
};
diff --git a/drivers/media/video/msm_wfd/wfd-util.h b/drivers/media/video/msm_wfd/wfd-util.h
index b6bb245..2fe7360 100644
--- a/drivers/media/video/msm_wfd/wfd-util.h
+++ b/drivers/media/video/msm_wfd/wfd-util.h
@@ -21,16 +21,11 @@
/*#define DEBUG_WFD*/
#define WFD_TAG "wfd: "
-#ifdef DEBUG_WFD
- #define WFD_MSG_INFO(fmt...) pr_info(WFD_TAG fmt)
- #define WFD_MSG_WARN(fmt...) pr_warning(WFD_TAG fmt)
-#else
- #define WFD_MSG_INFO(fmt...)
- #define WFD_MSG_WARN(fmt...)
-#endif
- #define WFD_MSG_ERR(fmt...) pr_err(KERN_ERR WFD_TAG fmt)
- #define WFD_MSG_CRIT(fmt...) pr_crit(KERN_CRIT WFD_TAG fmt)
- #define WFD_MSG_DBG(fmt...) pr_debug(WFD_TAG fmt)
+#define WFD_MSG_INFO(fmt...) pr_info(WFD_TAG fmt)
+#define WFD_MSG_WARN(fmt...) pr_warning(WFD_TAG fmt)
+#define WFD_MSG_ERR(fmt...) pr_err(KERN_ERR WFD_TAG fmt)
+#define WFD_MSG_CRIT(fmt...) pr_crit(KERN_CRIT WFD_TAG fmt)
+#define WFD_MSG_DBG(fmt...) pr_debug(WFD_TAG fmt)
struct wfd_stats_encode_sample {
diff --git a/drivers/media/video/v4l2-ctrls.c b/drivers/media/video/v4l2-ctrls.c
index 7da4657..47b36ae 100644
--- a/drivers/media/video/v4l2-ctrls.c
+++ b/drivers/media/video/v4l2-ctrls.c
@@ -577,6 +577,8 @@
case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL: return "MPEG4 Level";
case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE: return "MPEG4 Profile";
case V4L2_CID_MPEG_VIDEO_MPEG4_QPEL: return "Quarter Pixel Search Enable";
+ case V4L2_CID_QCOM_VIDEO_SYNC_FRAME_SEQ_HDR:
+ return "CodecConfig with sync frame";
case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES: return "Maximum Bytes in a Slice";
case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB: return "Number of MBs in a Slice";
case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE: return "Slice Partitioning Method";
@@ -795,6 +797,11 @@
*type = V4L2_CTRL_TYPE_INTEGER64;
*flags |= V4L2_CTRL_FLAG_READ_ONLY | V4L2_CTRL_FLAG_VOLATILE;
break;
+ case V4L2_CID_QCOM_VIDEO_SYNC_FRAME_SEQ_HDR:
+ *type = V4L2_CTRL_TYPE_BOOLEAN;
+ *min = 0;
+ *max = *step = 1;
+ break;
default:
*type = V4L2_CTRL_TYPE_INTEGER;
break;
diff --git a/drivers/media/video/vcap_v4l2.c b/drivers/media/video/vcap_v4l2.c
index 28abb36..753171c 100644
--- a/drivers/media/video/vcap_v4l2.c
+++ b/drivers/media/video/vcap_v4l2.c
@@ -257,6 +257,8 @@
rc = config_gpios(1, dev->vcap_pdata);
if (rc < 0)
goto gpio_failed;
+ writel_relaxed(0x00030003, VCAP_OFFSET(0xD78));
+ writel_relaxed(0x00030003, VCAP_OFFSET(0xD7C));
return 0;
gpio_failed:
@@ -340,6 +342,8 @@
return -EINVAL;
}
+ vb->v4l2_buf.timestamp = b->timestamp;
+ vb->v4l2_buf.field = b->field;
list_add_tail(&vb->queued_entry, &q->queued_list);
vb->state = VB2_BUF_STATE_QUEUED;
@@ -1261,6 +1265,9 @@
}
rate = c_data->vc_format.clk_freq / 100 * 102;
+ if ((c_data->vc_format.hactive_end -
+ c_data->vc_format.hactive_start) > 539)
+ rate = 200000000;
rate_rc = clk_round_rate(dev->vcap_clk, rate);
if (rate_rc <= 0) {
pr_err("%s: Failed core rnd_rate\n", __func__);
@@ -1950,8 +1957,10 @@
/* init video device*/
vfd = video_device_alloc();
- if (!vfd)
+ if (!vfd) {
+ ret = -ENOMEM;
goto deinit_vc;
+ }
*vfd = vcap_template;
vfd->v4l2_dev = &dev->v4l2_dev;
@@ -1965,6 +1974,7 @@
dev->vcap_wq = create_workqueue("vcap");
if (!dev->vcap_wq) {
+ ret = -ENOMEM;
pr_err("Could not create workqueue");
goto rel_vdev;
}
@@ -1972,6 +1982,8 @@
dev->ion_client = msm_ion_client_create(-1, "vcap");
if (IS_ERR((void *)dev->ion_client)) {
pr_err("could not get ion client");
+ ret = PTR_ERR(dev->ion_client);
+ dev->ion_client = NULL;
goto rel_vcap_wq;
}
diff --git a/drivers/media/video/vcap_vc.c b/drivers/media/video/vcap_vc.c
index 78e108f..572c272 100644
--- a/drivers/media/video/vcap_vc.c
+++ b/drivers/media/video/vcap_vc.c
@@ -122,6 +122,17 @@
return 0;
}
+static struct timeval interpolate_ts(struct timeval tv, uint32_t delta)
+{
+ if (tv.tv_usec < delta) {
+ tv.tv_sec--;
+ tv.tv_usec += VCAP_USEC - delta;
+ } else {
+ tv.tv_usec -= delta;
+ }
+ return tv;
+}
+
irqreturn_t vc_handler(struct vcap_dev *dev)
{
uint32_t irq, timestamp;
@@ -194,6 +205,10 @@
done_count++;
}
+ /* Assign field value in case somehow got out of sync */
+ if (c_data->vc_format.mode == HAL_VCAP_MODE_INT && done_count == 1)
+ c_data->vc_action.top_field = !(irq & 0x1);
+
/* Double check expected buffers are done */
buf_num = c_data->vc_action.buf_num;
tot = c_data->vc_action.tot_buf;
@@ -212,6 +227,20 @@
/* If here we know which buffers are done */
timestamp = readl_relaxed(VCAP_VC_TIMESTAMP);
+ if (timestamp < c_data->vc_action.last_ts) {
+ c_data->vc_action.vc_ts.tv_usec +=
+ (0xFFFFFFFF - c_data->vc_action.last_ts) +
+ timestamp + 1;
+ } else {
+ c_data->vc_action.vc_ts.tv_usec +=
+ timestamp - c_data->vc_action.last_ts;
+ }
+
+ c_data->vc_action.vc_ts.tv_sec +=
+ c_data->vc_action.vc_ts.tv_usec / VCAP_USEC;
+ c_data->vc_action.vc_ts.tv_usec =
+ c_data->vc_action.vc_ts.tv_usec % VCAP_USEC;
+ c_data->vc_action.last_ts = timestamp;
c_data->vc_action.buf_num = (buf_num + done_count) % tot;
for (i = 0; i < done_count; i++) {
@@ -223,6 +252,8 @@
v4l2_evt.type = V4L2_EVENT_PRIVATE_START +
VCAP_VC_BUF_OVERWRITE_EVENT;
v4l2_event_queue(dev->vfd, &v4l2_evt);
+ c_data->vc_action.top_field =
+ !c_data->vc_action.top_field;
continue;
}
buf = list_entry(c_data->vc_action.active.next,
@@ -232,9 +263,18 @@
/* Config vc with this new buffer */
config_buffer(c_data, buf, VCAP_VC_Y_ADDR_1 + 0x8 * idx,
VCAP_VC_C_ADDR_1 + 0x8 * idx);
- vb->v4l2_buf.timestamp.tv_usec = timestamp -
+ vb->v4l2_buf.timestamp = interpolate_ts(
+ c_data->vc_action.vc_ts,
1000000 / c_data->vc_format.frame_rate *
- (done_count - 1 - i);
+ (done_count - 1 - i));
+ if (c_data->vc_format.mode == HAL_VCAP_MODE_INT) {
+ if (c_data->vc_action.top_field)
+ vb->v4l2_buf.field = V4L2_FIELD_TOP;
+ else
+ vb->v4l2_buf.field = V4L2_FIELD_BOTTOM;
+ c_data->vc_action.top_field =
+ !c_data->vc_action.top_field;
+ }
vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
work_todo = true;
c_data->vc_action.buf[idx] = buf;
@@ -298,6 +338,12 @@
VCAP_VC_C_ADDR_1 + i * 8);
}
+ c_data->vc_action.last_ts = readl_relaxed(VCAP_VC_TIMESTAMP);
+ c_data->vc_action.vc_ts.tv_sec =
+ c_data->vc_action.last_ts / VCAP_USEC;
+ c_data->vc_action.vc_ts.tv_usec =
+ c_data->vc_action.last_ts % VCAP_USEC;
+
rc = 0;
for (i = 0; i < c_data->vc_action.tot_buf; i++)
rc = rc << 1 | 0x2;
diff --git a/drivers/media/video/vcap_vp.c b/drivers/media/video/vcap_vp.c
index 139de28..a017cf2 100644
--- a/drivers/media/video/vcap_vp.c
+++ b/drivers/media/video/vcap_vp.c
@@ -200,9 +200,7 @@
unsigned long flags = 0;
uint32_t irq;
int rc;
-#ifndef TOP_FIELD_FIX
- bool top_field;
-#endif
+ bool top_field = 0;
if (vp_work && vp_work->cd && vp_work->cd->dev)
dev = vp_work->cd->dev;
@@ -233,14 +231,15 @@
queue_work(dev->vcap_wq, &dev->vp_to_vc_work.work);
}
+ if (vp_act->bufT0 != NULL && vp_act->vp_state == VP_NORMAL) {
+ vp_act->bufOut->vb.v4l2_buf.timestamp =
+ vp_act->bufT0->vb.v4l2_buf.timestamp;
+ }
vb2_buffer_done(&vp_act->bufOut->vb, VB2_BUF_STATE_DONE);
/* Cycle to next state */
if (vp_act->vp_state != VP_NORMAL)
vp_act->vp_state++;
-#ifdef TOP_FIELD_FIX
- vp_act->top_field = !vp_act->top_field;
-#endif
/* Cycle Buffers*/
if (dev->nr_param.mode) {
@@ -273,18 +272,11 @@
}
/* Config VP */
-#ifndef TOP_FIELD_FIX
if (vp_act->bufT2->vb.v4l2_buf.field == V4L2_FIELD_TOP)
top_field = 1;
-#endif
-#ifdef TOP_FIELD_FIX
- writel_iowmb(0x00000000 | vp_act->top_field << 0, VCAP_VP_CTRL);
- writel_iowmb(0x00010000 | vp_act->top_field << 0, VCAP_VP_CTRL);
-#else
writel_iowmb(0x00000000 | top_field, VCAP_VP_CTRL);
writel_iowmb(0x00010000 | top_field, VCAP_VP_CTRL);
-#endif
enable_irq(dev->vpirq->start);
writel_iowmb(irq, VCAP_VP_INT_CLEAR);
}
@@ -312,7 +304,7 @@
}
if (irq & 0x01000000) {
v4l2_evt.type = V4L2_EVENT_PRIVATE_START +
- VCAP_VC_LINE_ERR_EVENT;
+ VCAP_VP_REG_W_ERR_EVENT;
v4l2_event_queue(dev->vfd, &v4l2_evt);
}
if (irq & 0x00020000) {
@@ -472,7 +464,7 @@
}
handle = ion_alloc(dev->ion_client, size, SZ_4K,
- ION_HEAP(ION_CP_MM_HEAP_ID));
+ ION_HEAP(ION_CP_MM_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
pr_err("%s: ion_alloc failed\n", __func__);
return -ENOMEM;
@@ -491,7 +483,7 @@
return rc;
}
- vaddr = ion_map_kernel(dev->ion_client, handle, ionflag);
+ vaddr = ion_map_kernel(dev->ion_client, handle);
if (IS_ERR(vaddr)) {
pr_err("%s: Map motion buffer failed\n", __func__);
ion_free(dev->ion_client, handle);
@@ -543,7 +535,7 @@
tot_size = frame_size / 2 * 3;
handle = ion_alloc(dev->ion_client, tot_size, SZ_4K,
- ION_HEAP(ION_CP_MM_HEAP_ID));
+ ION_HEAP(ION_CP_MM_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
pr_err("%s: ion_alloc failed\n", __func__);
return -ENOMEM;
@@ -673,7 +665,7 @@
dprintk(2, "%s: Start VP dummy event\n", __func__);
handle = ion_alloc(dev->ion_client, 0x1200, SZ_4K,
- ION_HEAP(ION_CP_MM_HEAP_ID));
+ ION_HEAP(ION_CP_MM_HEAP_ID), 0);
if (IS_ERR_OR_NULL(handle)) {
pr_err("%s: ion_alloc failed\n", __func__);
return -ENOMEM;
@@ -742,9 +734,7 @@
unsigned long flags = 0;
unsigned int chroma_fmt = 0;
int size;
-#ifndef TOP_FIELD_FIX
- bool top_field;
-#endif
+ bool top_field = 0;
if (!c_data->streaming)
return -ENOEXEC;
@@ -817,21 +807,12 @@
chroma_fmt << 11 | 0x1 << 4, VCAP_VP_OUT_CONFIG);
/* Enable Interrupt */
-#ifdef TOP_FIELD_FIX
- vp_act->top_field = 1;
-#else
if (vp_act->bufT2->vb.v4l2_buf.field == V4L2_FIELD_TOP)
top_field = 1;
-#endif
vp_act->vp_state = VP_FRAME2;
writel_relaxed(0x01100001, VCAP_VP_INTERRUPT_ENABLE);
-#ifdef TOP_FIELD_FIX
- writel_iowmb(0x00000000 | vp_act->top_field << 0, VCAP_VP_CTRL);
- writel_iowmb(0x00010000 | vp_act->top_field << 0, VCAP_VP_CTRL);
-#else
writel_iowmb(0x00000000 | top_field, VCAP_VP_CTRL);
writel_iowmb(0x00010000 | top_field, VCAP_VP_CTRL);
-#endif
atomic_set(&c_data->dev->vp_enabled, 1);
enable_irq(dev->vpirq->start);
return 0;
@@ -842,9 +823,7 @@
struct vcap_dev *dev;
struct vp_action *vp_act;
int rc;
-#ifndef TOP_FIELD_FIX
- bool top_field;
-#endif
+ bool top_field = 0;
dprintk(2, "Start Continue\n");
dev = c_data->dev;
@@ -865,20 +844,13 @@
if (rc < 0)
return rc;
-#ifndef TOP_FIELD_FIX
if (vp_act->bufT2->vb.v4l2_buf.field == V4L2_FIELD_TOP)
top_field = 1;
-#endif
/* Config VP & Enable Interrupt */
writel_relaxed(0x01100001, VCAP_VP_INTERRUPT_ENABLE);
-#ifdef TOP_FIELD_FIX
- writel_iowmb(0x00000000 | vp_act->top_field << 0, VCAP_VP_CTRL);
- writel_iowmb(0x00010000 | vp_act->top_field << 0, VCAP_VP_CTRL);
-#else
writel_iowmb(0x00000000 | top_field, VCAP_VP_CTRL);
writel_iowmb(0x00010000 | top_field, VCAP_VP_CTRL);
-#endif
atomic_set(&c_data->dev->vp_enabled, 1);
enable_irq(dev->vpirq->start);
diff --git a/drivers/media/video/videobuf2-core.c b/drivers/media/video/videobuf2-core.c
index a7d13a8..668cc73 100644
--- a/drivers/media/video/videobuf2-core.c
+++ b/drivers/media/video/videobuf2-core.c
@@ -1330,14 +1330,11 @@
return -EINVAL;
}
- mutex_lock(&q->q_lock);
ret = __vb2_get_done_vb(q, &vb, nonblocking);
if (ret < 0) {
dprintk(1, "dqbuf: error getting next done buffer\n");
- mutex_unlock(&q->q_lock);
return ret;
}
- mutex_unlock(&q->q_lock);
ret = call_qop(q, buf_finish, vb);
if (ret) {
dprintk(1, "dqbuf: buffer finish failed\n");
@@ -1449,17 +1446,14 @@
/*
* Let driver notice that streaming state has been enabled.
*/
- mutex_lock(&q->q_lock);
ret = call_qop(q, start_streaming, q, atomic_read(&q->queued_count));
if (ret) {
dprintk(1, "streamon: driver refused to start streaming\n");
__vb2_queue_cancel(q);
- mutex_unlock(&q->q_lock);
return ret;
}
q->streaming = 1;
- mutex_unlock(&q->q_lock);
dprintk(3, "Streamon successful\n");
return 0;
}
@@ -1733,7 +1727,6 @@
INIT_LIST_HEAD(&q->queued_list);
INIT_LIST_HEAD(&q->done_list);
spin_lock_init(&q->done_lock);
- mutex_init(&q->q_lock);
init_waitqueue_head(&q->done_wq);
if (q->buf_struct_size == 0)
diff --git a/drivers/media/video/videobuf2-msm-mem.c b/drivers/media/video/videobuf2-msm-mem.c
index c1a392e2..97bc7c3 100644
--- a/drivers/media/video/videobuf2-msm-mem.c
+++ b/drivers/media/video/videobuf2-msm-mem.c
@@ -56,7 +56,7 @@
goto client_failed;
}
mem->ion_handle = ion_alloc(mem->client, mem->size, SZ_4K,
- (0x1 << ION_CP_MM_HEAP_ID | 0x1 << ION_IOMMU_HEAP_ID));
+ (0x1 << ION_CP_MM_HEAP_ID | 0x1 << ION_IOMMU_HEAP_ID), 0);
if (IS_ERR((void *)mem->ion_handle)) {
pr_err("%s Could not allocate\n", __func__);
goto alloc_failed;
@@ -64,7 +64,7 @@
rc = ion_map_iommu(mem->client, mem->ion_handle,
-1, 0, SZ_4K, 0,
(unsigned long *)&phyaddr,
- (unsigned long *)&len, UNCACHED, 0);
+ (unsigned long *)&len, 0, 0);
if (rc < 0) {
pr_err("%s Could not get physical address\n", __func__);
goto phys_failed;
@@ -192,7 +192,7 @@
return PTR_ERR(mem->ion_handle);
}
rc = ion_map_iommu(client, mem->ion_handle, domain_num, 0,
- SZ_4K, 0, (unsigned long *)&mem->phyaddr, &len, UNCACHED, 0);
+ SZ_4K, 0, (unsigned long *)&mem->phyaddr, &len, 0, 0);
if (rc < 0)
ion_free(client, mem->ion_handle);
#elif CONFIG_ANDROID_PMEM
diff --git a/drivers/mfd/marimba-core.c b/drivers/mfd/marimba-core.c
index 70ec2ec..6a8ea6e 100644
--- a/drivers/mfd/marimba-core.c
+++ b/drivers/mfd/marimba-core.c
@@ -76,12 +76,16 @@
rc = marimba_read_bit_mask(marimba, 0x00, &bahama_version, 1, 0x1F);
if (rc < 0)
return rc;
+ pr_debug("%s: Bahama version: 0x%x\n", __func__, bahama_version);
switch (bahama_version) {
case 0x08: /* varient of bahama v1 */
case 0x10:
case 0x00:
return BAHAMA_VER_1_0;
case 0x09: /* variant of bahama v2 */
+ case 0x0a: /* variant of bahama v2.1 */
+ /* Falling through because initialization */
+ /* and configuration for 2.0 and 2.1 are same */
return BAHAMA_VER_2_0;
default:
return BAHAMA_VER_UNSUPPORTED;
diff --git a/drivers/misc/qseecom.c b/drivers/misc/qseecom.c
index d6d209b..bc8eccf 100644
--- a/drivers/misc/qseecom.c
+++ b/drivers/misc/qseecom.c
@@ -142,7 +142,6 @@
static DEFINE_MUTEX(pil_access_lock);
static DEFINE_MUTEX(qsee_bw_mutex);
-static DEFINE_MUTEX(qsee_sfpb_bw_mutex);
static DEFINE_MUTEX(app_access_lock);
static int qsee_bw_count;
@@ -254,7 +253,6 @@
struct qseecom_register_listener_req *listener)
{
int ret = 0;
- unsigned int flags = 0;
struct qseecom_register_listener_ireq req;
struct qseecom_command_scm_resp resp;
ion_phys_addr_t pa;
@@ -271,8 +269,7 @@
ret = ion_phys(qseecom.ion_clnt, svc->ihandle, &pa, &svc->sb_length);
/* Populate the structure for sending scm call to load image */
- svc->sb_virt = (char *) ion_map_kernel(qseecom.ion_clnt,
- svc->ihandle, flags);
+ svc->sb_virt = (char *) ion_map_kernel(qseecom.ion_clnt, svc->ihandle);
svc->sb_phys = pa;
if (qseecom.qseos_version == QSEOS_VERSION_14) {
@@ -494,7 +491,6 @@
{
ion_phys_addr_t pa;
int32_t ret;
- unsigned int flags = 0;
struct qseecom_set_sb_mem_param_req req;
uint32_t len;
@@ -513,8 +509,7 @@
ret = ion_phys(qseecom.ion_clnt, data->client.ihandle, &pa, &len);
/* Populate the structure for sending scm call to load image */
data->client.sb_virt = (char *) ion_map_kernel(qseecom.ion_clnt,
- data->client.ihandle,
- flags);
+ data->client.ihandle);
data->client.sb_phys = pa;
data->client.sb_length = req.sb_len;
data->client.user_virt_sb_base = req.virt_sb_base;
@@ -1202,28 +1197,41 @@
case CLK_DFAB:
mutex_lock(&qsee_bw_mutex);
if (!qsee_bw_count) {
- ret = msm_bus_scale_client_update_request(
- qsee_perf_client, 1);
+ if (qsee_sfpb_bw_count > 0)
+ ret = msm_bus_scale_client_update_request(
+ qsee_perf_client, 3);
+ else
+ ret = msm_bus_scale_client_update_request(
+ qsee_perf_client, 1);
if (ret)
pr_err("DFAB Bandwidth req failed (%d)\n",
ret);
else
qsee_bw_count++;
+ } else {
+ qsee_bw_count++;
}
mutex_unlock(&qsee_bw_mutex);
break;
case CLK_SFPB:
- mutex_lock(&qsee_sfpb_bw_mutex);
+ mutex_lock(&qsee_bw_mutex);
if (!qsee_sfpb_bw_count) {
- ret = msm_bus_scale_client_update_request(
- qsee_perf_client, 2);
+ if (qsee_bw_count > 0)
+ ret = msm_bus_scale_client_update_request(
+ qsee_perf_client, 3);
+ else
+ ret = msm_bus_scale_client_update_request(
+ qsee_perf_client, 2);
+
if (ret)
pr_err("SFPB Bandwidth req failed (%d)\n",
ret);
else
qsee_sfpb_bw_count++;
+ } else {
+ qsee_sfpb_bw_count++;
}
- mutex_unlock(&qsee_sfpb_bw_mutex);
+ mutex_unlock(&qsee_bw_mutex);
break;
default:
pr_err("Clock type not defined\n");
@@ -1242,29 +1250,44 @@
switch (clk_type) {
case CLK_DFAB:
mutex_lock(&qsee_bw_mutex);
- if (qsee_bw_count > 0) {
- if (qsee_bw_count-- == 1) {
+ if (qsee_bw_count == 0) {
+ pr_err("Client error.Extra call to disable DFAB clk\n");
+ mutex_unlock(&qsee_bw_mutex);
+ return;
+ }
+
+ if ((qsee_bw_count > 0) && (qsee_bw_count-- == 1)) {
+ if (qsee_sfpb_bw_count > 0)
+ ret = msm_bus_scale_client_update_request(
+ qsee_perf_client, 2);
+ else
ret = msm_bus_scale_client_update_request(
qsee_perf_client, 0);
- if (ret)
- pr_err("SFPB Bandwidth req fail (%d)\n",
+ if (ret)
+ pr_err("SFPB Bandwidth req fail (%d)\n",
ret);
- }
}
mutex_unlock(&qsee_bw_mutex);
break;
case CLK_SFPB:
- mutex_lock(&qsee_sfpb_bw_mutex);
- if (qsee_sfpb_bw_count > 0) {
- if (qsee_sfpb_bw_count-- == 1) {
+ mutex_lock(&qsee_bw_mutex);
+ if (qsee_sfpb_bw_count == 0) {
+ pr_err("Client error.Extra call to disable SFPB clk\n");
+ mutex_unlock(&qsee_bw_mutex);
+ return;
+ }
+ if ((qsee_sfpb_bw_count > 0) && (qsee_sfpb_bw_count-- == 1)) {
+ if (qsee_bw_count > 0)
+ ret = msm_bus_scale_client_update_request(
+ qsee_perf_client, 1);
+ else
ret = msm_bus_scale_client_update_request(
qsee_perf_client, 0);
- if (ret)
- pr_err("SFPB Bandwidth req fail (%d)\n",
+ if (ret)
+ pr_err("SFPB Bandwidth req fail (%d)\n",
ret);
- }
}
- mutex_unlock(&qsee_sfpb_bw_mutex);
+ mutex_unlock(&qsee_bw_mutex);
break;
default:
pr_err("Clock type not defined\n");
@@ -1701,7 +1724,6 @@
mutex_unlock(&pil_access_lock);
}
kfree(data);
- qsee_disable_clock_vote(CLK_DFAB);
return ret;
}
diff --git a/drivers/mmc/card/Kconfig b/drivers/mmc/card/Kconfig
index 15254fb..ebb4afe 100644
--- a/drivers/mmc/card/Kconfig
+++ b/drivers/mmc/card/Kconfig
@@ -76,14 +76,3 @@
This driver is only of interest to those developing or
testing a host driver. Most people should say N here.
-
-config MMC_BLOCK_TEST
- tristate "MMC block test"
- depends on MMC_BLOCK && IOSCHED_TEST
- default m
- help
- MMC block test can be used with test iosched to test the MMC block
- device.
- Currently used to test eMMC 4.5 features (packed commands, sanitize,
- BKOPs).
-
diff --git a/drivers/mmc/card/Makefile b/drivers/mmc/card/Makefile
index d55107f..c73b406 100644
--- a/drivers/mmc/card/Makefile
+++ b/drivers/mmc/card/Makefile
@@ -8,4 +8,3 @@
obj-$(CONFIG_SDIO_UART) += sdio_uart.o
-obj-$(CONFIG_MMC_BLOCK_TEST) += mmc_block_test.o
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index c785a7e..a9f1b53 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -59,16 +59,12 @@
#define INAND_CMD38_ARG_SECTRIM2 0x88
#define MMC_SANITIZE_REQ_TIMEOUT 240000 /* msec */
+
#define mmc_req_rel_wr(req) (((req->cmd_flags & REQ_FUA) || \
(req->cmd_flags & REQ_META)) && \
(rq_data_dir(req) == WRITE))
#define PACKED_CMD_VER 0x01
#define PACKED_CMD_WR 0x02
-#define MMC_BLK_UPDATE_STOP_REASON(stats, reason) \
- do { \
- if (stats->enabled) \
- stats->pack_stop_reason[reason]++; \
- } while (0)
static DEFINE_MUTEX(block_mutex);
@@ -120,15 +116,25 @@
struct device_attribute force_ro;
struct device_attribute power_ro_lock;
int area_type;
- struct device_attribute num_wr_reqs_to_start_packing;
};
static DEFINE_MUTEX(open_lock);
+enum mmc_blk_status {
+ MMC_BLK_SUCCESS = 0,
+ MMC_BLK_PARTIAL,
+ MMC_BLK_CMD_ERR,
+ MMC_BLK_RETRY,
+ MMC_BLK_ABORT,
+ MMC_BLK_DATA_ERR,
+ MMC_BLK_ECC_ERR,
+ MMC_BLK_NOMEDIUM,
+};
+
enum {
- MMC_PACKED_N_IDX = -1,
- MMC_PACKED_N_ZERO,
- MMC_PACKED_N_SINGLE,
+ MMC_PACKED_N_IDX = -1,
+ MMC_PACKED_N_ZERO,
+ MMC_PACKED_N_SINGLE,
};
module_param(perdev_minors, int, 0444);
@@ -136,8 +142,8 @@
static inline void mmc_blk_clear_packed(struct mmc_queue_req *mqrq)
{
- mqrq->packed_cmd = MMC_PACKED_NONE;
- mqrq->packed_num = MMC_PACKED_N_ZERO;
+ mqrq->packed_cmd = MMC_PACKED_NONE;
+ mqrq->packed_num = MMC_PACKED_N_ZERO;
}
static struct mmc_blk_data *mmc_blk_get(struct gendisk *disk)
@@ -273,38 +279,6 @@
return ret;
}
-static ssize_t
-num_wr_reqs_to_start_packing_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct mmc_blk_data *md = mmc_blk_get(dev_to_disk(dev));
- int num_wr_reqs_to_start_packing;
- int ret;
-
- num_wr_reqs_to_start_packing = md->queue.num_wr_reqs_to_start_packing;
-
- ret = snprintf(buf, PAGE_SIZE, "%d\n", num_wr_reqs_to_start_packing);
-
- mmc_blk_put(md);
- return ret;
-}
-
-static ssize_t
-num_wr_reqs_to_start_packing_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
-{
- int value;
- struct mmc_blk_data *md = mmc_blk_get(dev_to_disk(dev));
-
- sscanf(buf, "%d", &value);
- if (value >= 0)
- md->queue.num_wr_reqs_to_start_packing = value;
-
- mmc_blk_put(md);
- return count;
-}
-
static int mmc_blk_open(struct block_device *bdev, fmode_t mode)
{
struct mmc_blk_data *md = mmc_blk_get(bdev->bd_disk);
@@ -1162,6 +1136,7 @@
int err, check, status;
u8 ext_csd[512];
+ mq_rq->packed_retries--;
check = mmc_blk_err_check(card, areq);
err = get_card_status(card, &status, 0);
if (err) {
@@ -1170,7 +1145,7 @@
return MMC_BLK_ABORT;
}
- if (status & R1_EXP_EVENT) {
+ if (status & R1_EXCEPTION_EVENT) {
err = mmc_send_ext_csd(card, ext_csd);
if (err) {
pr_err("%s: error %d sending ext_csd\n",
@@ -1349,136 +1324,6 @@
mmc_queue_bounce_pre(mqrq);
}
-static void mmc_blk_write_packing_control(struct mmc_queue *mq,
- struct request *req)
-{
- struct mmc_host *host = mq->card->host;
- int data_dir;
-
- if (!(host->caps2 & MMC_CAP2_PACKED_WR))
- return;
-
- /*
- * In case the packing control is not supported by the host, it should
- * not have an effect on the write packing. Therefore we have to enable
- * the write packing
- */
- if (!(host->caps2 & MMC_CAP2_PACKED_WR_CONTROL)) {
- mq->wr_packing_enabled = true;
- return;
- }
-
- if (!req || (req && (req->cmd_flags & REQ_FLUSH))) {
- if (mq->num_of_potential_packed_wr_reqs >
- mq->num_wr_reqs_to_start_packing)
- mq->wr_packing_enabled = true;
- mq->num_of_potential_packed_wr_reqs = 0;
- return;
- }
-
- data_dir = rq_data_dir(req);
-
- if (data_dir == READ) {
- mq->num_of_potential_packed_wr_reqs = 0;
- mq->wr_packing_enabled = false;
- return;
- } else if (data_dir == WRITE) {
- mq->num_of_potential_packed_wr_reqs++;
- }
-
- if (mq->num_of_potential_packed_wr_reqs >
- mq->num_wr_reqs_to_start_packing)
- mq->wr_packing_enabled = true;
-
-}
-
-struct mmc_wr_pack_stats *mmc_blk_get_packed_statistics(struct mmc_card *card)
-{
- if (!card)
- return NULL;
-
- return &card->wr_pack_stats;
-}
-EXPORT_SYMBOL(mmc_blk_get_packed_statistics);
-
-void mmc_blk_init_packed_statistics(struct mmc_card *card)
-{
- int max_num_of_packed_reqs = 0;
-
- if (!card || !card->wr_pack_stats.packing_events)
- return;
-
- max_num_of_packed_reqs = card->ext_csd.max_packed_writes;
-
- spin_lock(&card->wr_pack_stats.lock);
- memset(card->wr_pack_stats.packing_events, 0,
- (max_num_of_packed_reqs + 1) *
- sizeof(*card->wr_pack_stats.packing_events));
- memset(&card->wr_pack_stats.pack_stop_reason, 0,
- sizeof(card->wr_pack_stats.pack_stop_reason));
- card->wr_pack_stats.enabled = true;
- spin_unlock(&card->wr_pack_stats.lock);
-}
-EXPORT_SYMBOL(mmc_blk_init_packed_statistics);
-
-void print_mmc_packing_stats(struct mmc_card *card)
-{
- int i;
- int max_num_of_packed_reqs = 0;
-
- if ((!card) || (!card->wr_pack_stats.packing_events))
- return;
-
- max_num_of_packed_reqs = card->ext_csd.max_packed_writes;
-
- spin_lock(&card->wr_pack_stats.lock);
-
- pr_info("%s: write packing statistics:\n",
- mmc_hostname(card->host));
-
- for (i = 1 ; i <= max_num_of_packed_reqs ; ++i) {
- if (card->wr_pack_stats.packing_events[i] != 0)
- pr_info("%s: Packed %d reqs - %d times\n",
- mmc_hostname(card->host), i,
- card->wr_pack_stats.packing_events[i]);
- }
-
- pr_info("%s: stopped packing due to the following reasons:\n",
- mmc_hostname(card->host));
-
- if (card->wr_pack_stats.pack_stop_reason[EXCEEDS_SEGMENTS])
- pr_info("%s: %d times: exceedmax num of segments\n",
- mmc_hostname(card->host),
- card->wr_pack_stats.pack_stop_reason[EXCEEDS_SEGMENTS]);
- if (card->wr_pack_stats.pack_stop_reason[EXCEEDS_SECTORS])
- pr_info("%s: %d times: exceeding the max num of sectors\n",
- mmc_hostname(card->host),
- card->wr_pack_stats.pack_stop_reason[EXCEEDS_SECTORS]);
- if (card->wr_pack_stats.pack_stop_reason[WRONG_DATA_DIR])
- pr_info("%s: %d times: wrong data direction\n",
- mmc_hostname(card->host),
- card->wr_pack_stats.pack_stop_reason[WRONG_DATA_DIR]);
- if (card->wr_pack_stats.pack_stop_reason[FLUSH_OR_DISCARD])
- pr_info("%s: %d times: flush or discard\n",
- mmc_hostname(card->host),
- card->wr_pack_stats.pack_stop_reason[FLUSH_OR_DISCARD]);
- if (card->wr_pack_stats.pack_stop_reason[EMPTY_QUEUE])
- pr_info("%s: %d times: empty queue\n",
- mmc_hostname(card->host),
- card->wr_pack_stats.pack_stop_reason[EMPTY_QUEUE]);
- if (card->wr_pack_stats.pack_stop_reason[REL_WRITE])
- pr_info("%s: %d times: rel write\n",
- mmc_hostname(card->host),
- card->wr_pack_stats.pack_stop_reason[REL_WRITE]);
- if (card->wr_pack_stats.pack_stop_reason[THRESHOLD])
- pr_info("%s: %d times: Threshold\n",
- mmc_hostname(card->host),
- card->wr_pack_stats.pack_stop_reason[THRESHOLD]);
-
- spin_unlock(&card->wr_pack_stats.lock);
-}
-EXPORT_SYMBOL(print_mmc_packing_stats);
-
static u8 mmc_blk_prep_packed_list(struct mmc_queue *mq, struct request *req)
{
struct request_queue *q = mq->queue;
@@ -1491,7 +1336,6 @@
u8 put_back = 0;
u8 max_packed_rw = 0;
u8 reqs = 0;
- struct mmc_wr_pack_stats *stats = &card->wr_pack_stats;
mmc_blk_clear_packed(mq->mqrq_cur);
@@ -1499,9 +1343,6 @@
!card->ext_csd.packed_event_en)
goto no_packed;
- if (!mq->wr_packing_enabled)
- goto no_packed;
-
if ((rq_data_dir(cur) == WRITE) &&
(card->host->caps2 & MMC_CAP2_PACKED_WR))
max_packed_rw = card->ext_csd.max_packed_writes;
@@ -1511,9 +1352,12 @@
if (mmc_req_rel_wr(cur) &&
(md->flags & MMC_BLK_REL_WR) &&
- !en_rel_wr) {
+ !en_rel_wr)
goto no_packed;
- }
+
+ if (mmc_large_sec(card) &&
+ !IS_ALIGNED(blk_rq_sectors(cur), 8))
+ goto no_packed;
max_blk_count = min(card->host->max_blk_count,
card->host->max_req_size >> 9);
@@ -1529,26 +1373,26 @@
phys_segments++;
}
- spin_lock(&stats->lock);
-
while (reqs < max_packed_rw - 1) {
spin_lock_irq(q->queue_lock);
next = blk_fetch_request(q);
spin_unlock_irq(q->queue_lock);
- if (!next) {
- MMC_BLK_UPDATE_STOP_REASON(stats, EMPTY_QUEUE);
+ if (!next)
+ break;
+
+ if (mmc_large_sec(card) &&
+ !IS_ALIGNED(blk_rq_sectors(next), 8)) {
+ put_back = 1;
break;
}
if (next->cmd_flags & REQ_DISCARD ||
next->cmd_flags & REQ_FLUSH) {
- MMC_BLK_UPDATE_STOP_REASON(stats, FLUSH_OR_DISCARD);
put_back = 1;
break;
}
if (rq_data_dir(cur) != rq_data_dir(next)) {
- MMC_BLK_UPDATE_STOP_REASON(stats, WRONG_DATA_DIR);
put_back = 1;
break;
}
@@ -1556,28 +1400,22 @@
if (mmc_req_rel_wr(next) &&
(md->flags & MMC_BLK_REL_WR) &&
!en_rel_wr) {
- MMC_BLK_UPDATE_STOP_REASON(stats, REL_WRITE);
put_back = 1;
break;
}
req_sectors += blk_rq_sectors(next);
if (req_sectors > max_blk_count) {
- if (stats->enabled)
- stats->pack_stop_reason[EXCEEDS_SECTORS]++;
put_back = 1;
break;
}
phys_segments += next->nr_phys_segments;
if (phys_segments > max_phys_segs) {
- MMC_BLK_UPDATE_STOP_REASON(stats, EXCEEDS_SEGMENTS);
put_back = 1;
break;
}
- if (rq_data_dir(next) == WRITE)
- mq->num_of_potential_packed_wr_reqs++;
list_add_tail(&next->queuelist, &mq->mqrq_cur->packed_list);
cur = next;
reqs++;
@@ -1589,18 +1427,10 @@
spin_unlock_irq(q->queue_lock);
}
- if (stats->enabled) {
- if (reqs + 1 <= card->ext_csd.max_packed_writes)
- stats->packing_events[reqs + 1]++;
- if (reqs + 1 == max_packed_rw)
- MMC_BLK_UPDATE_STOP_REASON(stats, THRESHOLD);
- }
-
- spin_unlock(&stats->lock);
-
if (reqs > 0) {
list_add(&req->queuelist, &mq->mqrq_cur->packed_list);
mq->mqrq_cur->packed_num = ++reqs;
+ mq->mqrq_cur->packed_retries = reqs;
return reqs;
}
@@ -1617,7 +1447,7 @@
struct request *req = mqrq->req;
struct request *prq;
struct mmc_blk_data *md = mq->data;
- bool do_rel_wr;
+ bool do_rel_wr, do_data_tag;
u32 *packed_cmd_hdr = mqrq->packed_cmd_hdr;
u8 i = 1;
@@ -1634,9 +1464,15 @@
*/
list_for_each_entry(prq, &mqrq->packed_list, queuelist) {
do_rel_wr = mmc_req_rel_wr(prq) && (md->flags & MMC_BLK_REL_WR);
- /* Argument of CMD23*/
+ do_data_tag = (card->ext_csd.data_tag_unit_size) &&
+ (prq->cmd_flags & REQ_META) &&
+ (rq_data_dir(prq) == WRITE) &&
+ ((brq->data.blocks * brq->data.blksz) >=
+ card->ext_csd.data_tag_unit_size);
+ /* Argument of CMD23 */
packed_cmd_hdr[(i * 2)] =
(do_rel_wr ? MMC_CMD23_ARG_REL_WR : 0) |
+ (do_data_tag ? MMC_CMD23_ARG_TAG_REQ : 0) |
blk_rq_sectors(prq);
/* Argument of CMD18 or CMD25 */
packed_cmd_hdr[((i * 2)) + 1] =
@@ -1665,7 +1501,6 @@
brq->data.blksz = 512;
brq->data.blocks = mqrq->packed_blocks + 1;
brq->data.flags |= MMC_DATA_WRITE;
- brq->data.fault_injected = false;
brq->stop.opcode = MMC_STOP_TRANSMISSION;
brq->stop.arg = 0;
@@ -1677,18 +1512,7 @@
brq->data.sg_len = mmc_queue_map_sg(mq, mqrq);
mqrq->mmc_active.mrq = &brq->mrq;
-
- /*
- * This is intended for packed commands tests usage - in case these
- * functions are not in use the respective pointers are NULL
- */
- if (mq->err_check_fn)
- mqrq->mmc_active.err_check = mq->err_check_fn;
- else
- mqrq->mmc_active.err_check = mmc_blk_packed_err_check;
-
- if (mq->packed_test_fn)
- mq->packed_test_fn(mq->queue, mqrq);
+ mqrq->mmc_active.err_check = mmc_blk_packed_err_check;
mmc_queue_bounce_pre(mqrq);
}
@@ -1717,15 +1541,13 @@
} else
ret = blk_end_request(req, 0, brq->data.bytes_xfered);
} else {
- if (mq_rq->packed_cmd == MMC_PACKED_NONE) {
+ if (mq_rq->packed_cmd == MMC_PACKED_NONE)
ret = blk_end_request(req, 0, brq->data.bytes_xfered);
- }
}
return ret;
}
-static int mmc_blk_end_packed_req(struct mmc_queue *mq,
- struct mmc_queue_req *mq_rq)
+static int mmc_blk_end_packed_req(struct mmc_queue_req *mq_rq)
{
struct request *prq;
int idx = mq_rq->packed_fail_idx, i = 0;
@@ -1753,6 +1575,39 @@
mmc_blk_clear_packed(mq_rq);
return ret;
}
+static void mmc_blk_abort_packed_req(struct mmc_queue_req *mq_rq)
+{
+ struct request *prq;
+
+ while (!list_empty(&mq_rq->packed_list)) {
+ prq = list_entry_rq(mq_rq->packed_list.next);
+ list_del_init(&prq->queuelist);
+ blk_end_request(prq, -EIO, blk_rq_bytes(prq));
+ }
+
+ mmc_blk_clear_packed(mq_rq);
+}
+
+static void mmc_blk_revert_packed_req(struct mmc_queue *mq,
+ struct mmc_queue_req *mq_rq)
+{
+ struct request *prq;
+ struct request_queue *q = mq->queue;
+
+ while (!list_empty(&mq_rq->packed_list)) {
+ prq = list_entry_rq(mq_rq->packed_list.prev);
+ if (prq->queuelist.prev != &mq_rq->packed_list) {
+ list_del_init(&prq->queuelist);
+ spin_lock_irq(q->queue_lock);
+ blk_requeue_request(mq->queue, prq);
+ spin_unlock_irq(q->queue_lock);
+ } else {
+ list_del_init(&prq->queuelist);
+ }
+ }
+
+ mmc_blk_clear_packed(mq_rq);
+}
static int mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *rqc)
{
@@ -1762,7 +1617,7 @@
int ret = 1, disable_multi = 0, retry = 0, type;
enum mmc_blk_status status;
struct mmc_queue_req *mq_rq;
- struct request *req, *prq;
+ struct request *req;
struct mmc_async_req *areq;
const u8 packed_num = 2;
u8 reqs = 0;
@@ -1793,13 +1648,6 @@
type = rq_data_dir(req) == READ ? MMC_BLK_READ : MMC_BLK_WRITE;
mmc_queue_bounce_post(mq_rq);
- /*
- * Check BKOPS urgency from each R1 response
- */
- if (mmc_card_mmc(card) &&
- (brq->cmd.resp[0] & R1_EXCEPTION_EVENT))
- mmc_card_set_check_bkops(card);
-
switch (status) {
case MMC_BLK_SUCCESS:
case MMC_BLK_PARTIAL:
@@ -1809,7 +1657,7 @@
mmc_blk_reset_success(md, type);
if (mq_rq->packed_cmd != MMC_PACKED_NONE) {
- ret = mmc_blk_end_packed_req(mq, mq_rq);
+ ret = mmc_blk_end_packed_req(mq_rq);
break;
} else {
ret = blk_end_request(req, 0,
@@ -1886,6 +1734,8 @@
mmc_start_req(card->host,
&mq_rq->mmc_active, NULL);
} else {
+ if (!mq_rq->packed_retries)
+ goto cmd_abort;
mmc_blk_packed_hdr_wrq_prep(mq_rq, card, mq);
mmc_start_req(card->host,
&mq_rq->mmc_active, NULL);
@@ -1903,12 +1753,7 @@
ret = blk_end_request(req, -EIO,
blk_rq_cur_bytes(req));
} else {
- while (!list_empty(&mq_rq->packed_list)) {
- prq = list_entry_rq(mq_rq->packed_list.next);
- list_del_init(&prq->queuelist);
- blk_end_request(prq, -EIO, blk_rq_bytes(prq));
- }
- mmc_blk_clear_packed(mq_rq);
+ mmc_blk_abort_packed_req(mq_rq);
}
start_new_req:
@@ -1916,22 +1761,9 @@
/*
* If current request is packed, it needs to put back.
*/
- if (mq->mqrq_cur->packed_cmd != MMC_PACKED_NONE) {
- while (!list_empty(&mq->mqrq_cur->packed_list)) {
- prq = list_entry_rq(
- mq->mqrq_cur->packed_list.prev);
- if (prq->queuelist.prev !=
- &mq->mqrq_cur->packed_list) {
- list_del_init(&prq->queuelist);
- spin_lock_irq(mq->queue->queue_lock);
- blk_requeue_request(mq->queue, prq);
- spin_unlock_irq(mq->queue->queue_lock);
- } else {
- list_del_init(&prq->queuelist);
- }
- }
- mmc_blk_clear_packed(mq->mqrq_cur);
- }
+ if (mq->mqrq_cur->packed_cmd != MMC_PACKED_NONE)
+ mmc_blk_revert_packed_req(mq, mq->mqrq_cur);
+
mmc_blk_rw_rq_prep(mq->mqrq_cur, card, 0, mq);
mmc_start_req(card->host, &mq->mqrq_cur->mmc_active, NULL);
}
@@ -1965,8 +1797,6 @@
goto out;
}
- mmc_blk_write_packing_control(mq, req);
-
if (req && req->cmd_flags & REQ_SANITIZE) {
/* complete ongoing async transfer before issuing sanitize */
if (card->host && card->host->areq)
@@ -2198,8 +2028,6 @@
if (md) {
card = md->queue.card;
- device_remove_file(disk_to_dev(md->disk),
- &md->num_wr_reqs_to_start_packing);
if (md->disk->flags & GENHD_FL_UP) {
device_remove_file(disk_to_dev(md->disk), &md->force_ro);
if ((md->area_type & MMC_BLK_DATA_AREA_BOOT) &&
@@ -2267,16 +2095,6 @@
goto power_ro_lock_fail;
}
- md->num_wr_reqs_to_start_packing.show =
- num_wr_reqs_to_start_packing_show;
- md->num_wr_reqs_to_start_packing.store =
- num_wr_reqs_to_start_packing_store;
- sysfs_attr_init(&md->num_wr_reqs_to_start_packing.attr);
- md->num_wr_reqs_to_start_packing.attr.name =
- "num_wr_reqs_to_start_packing";
- md->num_wr_reqs_to_start_packing.attr.mode = S_IRUGO | S_IWUSR;
- ret = device_create_file(disk_to_dev(md->disk),
- &md->num_wr_reqs_to_start_packing);
if (ret)
goto power_ro_lock_fail;
diff --git a/drivers/mmc/card/mmc_block_test.c b/drivers/mmc/card/mmc_block_test.c
deleted file mode 100644
index 871675c..0000000
--- a/drivers/mmc/card/mmc_block_test.c
+++ /dev/null
@@ -1,2068 +0,0 @@
-
-/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-/* MMC block test */
-
-#include <linux/module.h>
-#include <linux/blkdev.h>
-#include <linux/debugfs.h>
-#include <linux/mmc/card.h>
-#include <linux/mmc/host.h>
-#include <linux/delay.h>
-#include <linux/test-iosched.h>
-#include "queue.h"
-
-#define MODULE_NAME "mmc_block_test"
-#define TEST_MAX_SECTOR_RANGE (600*1024*1024) /* 600 MB */
-#define TEST_MAX_BIOS_PER_REQ 120
-#define CMD23_PACKED_BIT (1 << 30)
-#define LARGE_PRIME_1 1103515367
-#define LARGE_PRIME_2 35757
-#define PACKED_HDR_VER_MASK 0x000000FF
-#define PACKED_HDR_RW_MASK 0x0000FF00
-#define PACKED_HDR_NUM_REQS_MASK 0x00FF0000
-#define PACKED_HDR_BITS_16_TO_29_SET 0x3FFF0000
-#define SECTOR_SIZE 512
-#define NUM_OF_SECTORS_PER_BIO ((BIO_U32_SIZE * 4) / SECTOR_SIZE)
-#define BIO_TO_SECTOR(x) (x * NUM_OF_SECTORS_PER_BIO)
-
-#define test_pr_debug(fmt, args...) pr_debug("%s: "fmt"\n", MODULE_NAME, args)
-#define test_pr_info(fmt, args...) pr_info("%s: "fmt"\n", MODULE_NAME, args)
-#define test_pr_err(fmt, args...) pr_err("%s: "fmt"\n", MODULE_NAME, args)
-
-#define SANITIZE_TEST_TIMEOUT 240000
-
-enum is_random {
- NON_RANDOM_TEST,
- RANDOM_TEST,
-};
-
-enum mmc_block_test_testcases {
- /* Start of send write packing test group */
- SEND_WRITE_PACKING_MIN_TESTCASE,
- TEST_STOP_DUE_TO_READ = SEND_WRITE_PACKING_MIN_TESTCASE,
- TEST_STOP_DUE_TO_READ_AFTER_MAX_REQS,
- TEST_STOP_DUE_TO_FLUSH,
- TEST_STOP_DUE_TO_FLUSH_AFTER_MAX_REQS,
- TEST_STOP_DUE_TO_EMPTY_QUEUE,
- TEST_STOP_DUE_TO_MAX_REQ_NUM,
- TEST_STOP_DUE_TO_THRESHOLD,
- SEND_WRITE_PACKING_MAX_TESTCASE = TEST_STOP_DUE_TO_THRESHOLD,
-
- /* Start of err check test group */
- ERR_CHECK_MIN_TESTCASE,
- TEST_RET_ABORT = ERR_CHECK_MIN_TESTCASE,
- TEST_RET_PARTIAL_FOLLOWED_BY_SUCCESS,
- TEST_RET_PARTIAL_FOLLOWED_BY_ABORT,
- TEST_RET_PARTIAL_MULTIPLE_UNTIL_SUCCESS,
- TEST_RET_PARTIAL_MAX_FAIL_IDX,
- TEST_RET_RETRY,
- TEST_RET_CMD_ERR,
- TEST_RET_DATA_ERR,
- ERR_CHECK_MAX_TESTCASE = TEST_RET_DATA_ERR,
-
- /* Start of send invalid test group */
- INVALID_CMD_MIN_TESTCASE,
- TEST_HDR_INVALID_VERSION = INVALID_CMD_MIN_TESTCASE,
- TEST_HDR_WRONG_WRITE_CODE,
- TEST_HDR_INVALID_RW_CODE,
- TEST_HDR_DIFFERENT_ADDRESSES,
- TEST_HDR_REQ_NUM_SMALLER_THAN_ACTUAL,
- TEST_HDR_REQ_NUM_LARGER_THAN_ACTUAL,
- TEST_HDR_CMD23_PACKED_BIT_SET,
- TEST_CMD23_MAX_PACKED_WRITES,
- TEST_CMD23_ZERO_PACKED_WRITES,
- TEST_CMD23_PACKED_BIT_UNSET,
- TEST_CMD23_REL_WR_BIT_SET,
- TEST_CMD23_BITS_16TO29_SET,
- TEST_CMD23_HDR_BLK_NOT_IN_COUNT,
- INVALID_CMD_MAX_TESTCASE = TEST_CMD23_HDR_BLK_NOT_IN_COUNT,
-
- /*
- * Start of packing control test group.
- * in these next testcases the abbreviation FB = followed by
- */
- PACKING_CONTROL_MIN_TESTCASE,
- TEST_PACKING_EXP_ONE_OVER_TRIGGER_FB_READ =
- PACKING_CONTROL_MIN_TESTCASE,
- TEST_PACKING_EXP_N_OVER_TRIGGER,
- TEST_PACKING_EXP_N_OVER_TRIGGER_FB_READ,
- TEST_PACKING_EXP_N_OVER_TRIGGER_FLUSH_N,
- TEST_PACKING_EXP_THRESHOLD_OVER_TRIGGER,
- TEST_PACKING_NOT_EXP_LESS_THAN_TRIGGER_REQUESTS,
- TEST_PACKING_NOT_EXP_TRIGGER_REQUESTS,
- TEST_PACKING_NOT_EXP_TRIGGER_READ_TRIGGER,
- TEST_PACKING_NOT_EXP_TRIGGER_FLUSH_TRIGGER,
- TEST_PACK_MIX_PACKED_NO_PACKED_PACKED,
- TEST_PACK_MIX_NO_PACKED_PACKED_NO_PACKED,
- PACKING_CONTROL_MAX_TESTCASE = TEST_PACK_MIX_NO_PACKED_PACKED_NO_PACKED,
-
- TEST_WRITE_DISCARD_SANITIZE_READ,
-};
-
-enum mmc_block_test_group {
- TEST_NO_GROUP,
- TEST_GENERAL_GROUP,
- TEST_SEND_WRITE_PACKING_GROUP,
- TEST_ERR_CHECK_GROUP,
- TEST_SEND_INVALID_GROUP,
- TEST_PACKING_CONTROL_GROUP,
-};
-
-struct mmc_block_test_debug {
- struct dentry *send_write_packing_test;
- struct dentry *err_check_test;
- struct dentry *send_invalid_packed_test;
- struct dentry *random_test_seed;
- struct dentry *packing_control_test;
- struct dentry *discard_sanitize_test;
-};
-
-struct mmc_block_test_data {
- /* The number of write requests that the test will issue */
- int num_requests;
- /* The expected write packing statistics for the current test */
- struct mmc_wr_pack_stats exp_packed_stats;
- /*
- * A user-defined seed for random choices of number of bios written in
- * a request, and of number of requests issued in a test
- * This field is randomly updated after each use
- */
- unsigned int random_test_seed;
- /* A retry counter used in err_check tests */
- int err_check_counter;
- /* Can be one of the values of enum test_group */
- enum mmc_block_test_group test_group;
- /*
- * Indicates if the current testcase is running with random values of
- * num_requests and num_bios (in each request)
- */
- int is_random;
- /* Data structure for debugfs dentrys */
- struct mmc_block_test_debug debug;
- /*
- * Data structure containing individual test information, including
- * self-defined specific data
- */
- struct test_info test_info;
- /* mmc block device test */
- struct blk_dev_test_type bdt;
-};
-
-static struct mmc_block_test_data *mbtd;
-
-/*
- * A callback assigned to the packed_test_fn field.
- * Called from block layer in mmc_blk_packed_hdr_wrq_prep.
- * Here we alter the packed header or CMD23 in order to send an invalid
- * packed command to the card.
- */
-static void test_invalid_packed_cmd(struct request_queue *q,
- struct mmc_queue_req *mqrq)
-{
- struct mmc_queue *mq = q->queuedata;
- u32 *packed_cmd_hdr = mqrq->packed_cmd_hdr;
- struct request *req = mqrq->req;
- struct request *second_rq;
- struct test_request *test_rq;
- struct mmc_blk_request *brq = &mqrq->brq;
- int num_requests;
- int max_packed_reqs;
-
- if (!mq) {
- test_pr_err("%s: NULL mq", __func__);
- return;
- }
-
- test_rq = (struct test_request *)req->elv.priv[0];
- if (!test_rq) {
- test_pr_err("%s: NULL test_rq", __func__);
- return;
- }
- max_packed_reqs = mq->card->ext_csd.max_packed_writes;
-
- switch (mbtd->test_info.testcase) {
- case TEST_HDR_INVALID_VERSION:
- test_pr_info("%s: set invalid header version", __func__);
- /* Put 0 in header version field (1 byte, offset 0 in header) */
- packed_cmd_hdr[0] = packed_cmd_hdr[0] & ~PACKED_HDR_VER_MASK;
- break;
- case TEST_HDR_WRONG_WRITE_CODE:
- test_pr_info("%s: wrong write code", __func__);
- /* Set R/W field with R value (1 byte, offset 1 in header) */
- packed_cmd_hdr[0] = packed_cmd_hdr[0] & ~PACKED_HDR_RW_MASK;
- packed_cmd_hdr[0] = packed_cmd_hdr[0] | 0x00000100;
- break;
- case TEST_HDR_INVALID_RW_CODE:
- test_pr_info("%s: invalid r/w code", __func__);
- /* Set R/W field with invalid value */
- packed_cmd_hdr[0] = packed_cmd_hdr[0] & ~PACKED_HDR_RW_MASK;
- packed_cmd_hdr[0] = packed_cmd_hdr[0] | 0x00000400;
- break;
- case TEST_HDR_DIFFERENT_ADDRESSES:
- test_pr_info("%s: different addresses", __func__);
- second_rq = list_entry(req->queuelist.next, struct request,
- queuelist);
- test_pr_info("%s: test_rq->sector=%ld, second_rq->sector=%ld",
- __func__, (long)req->__sector,
- (long)second_rq->__sector);
- /*
- * Put start sector of second write request in the first write
- * request's cmd25 argument in the packed header
- */
- packed_cmd_hdr[3] = second_rq->__sector;
- break;
- case TEST_HDR_REQ_NUM_SMALLER_THAN_ACTUAL:
- test_pr_info("%s: request num smaller than actual" , __func__);
- num_requests = (packed_cmd_hdr[0] & PACKED_HDR_NUM_REQS_MASK)
- >> 16;
- /* num of entries is decremented by 1 */
- num_requests = (num_requests - 1) << 16;
- /*
- * Set number of requests field in packed write header to be
- * smaller than the actual number (1 byte, offset 2 in header)
- */
- packed_cmd_hdr[0] = (packed_cmd_hdr[0] &
- ~PACKED_HDR_NUM_REQS_MASK) + num_requests;
- break;
- case TEST_HDR_REQ_NUM_LARGER_THAN_ACTUAL:
- test_pr_info("%s: request num larger than actual" , __func__);
- num_requests = (packed_cmd_hdr[0] & PACKED_HDR_NUM_REQS_MASK)
- >> 16;
- /* num of entries is incremented by 1 */
- num_requests = (num_requests + 1) << 16;
- /*
- * Set number of requests field in packed write header to be
- * larger than the actual number (1 byte, offset 2 in header).
- */
- packed_cmd_hdr[0] = (packed_cmd_hdr[0] &
- ~PACKED_HDR_NUM_REQS_MASK) + num_requests;
- break;
- case TEST_HDR_CMD23_PACKED_BIT_SET:
- test_pr_info("%s: header CMD23 packed bit set" , __func__);
- /*
- * Set packed bit (bit 30) in cmd23 argument of first and second
- * write requests in packed write header.
- * These are located at bytes 2 and 4 in packed write header
- */
- packed_cmd_hdr[2] = packed_cmd_hdr[2] | CMD23_PACKED_BIT;
- packed_cmd_hdr[4] = packed_cmd_hdr[4] | CMD23_PACKED_BIT;
- break;
- case TEST_CMD23_MAX_PACKED_WRITES:
- test_pr_info("%s: CMD23 request num > max_packed_reqs",
- __func__);
- /*
- * Set the individual packed cmd23 request num to
- * max_packed_reqs + 1
- */
- brq->sbc.arg = MMC_CMD23_ARG_PACKED | (max_packed_reqs + 1);
- break;
- case TEST_CMD23_ZERO_PACKED_WRITES:
- test_pr_info("%s: CMD23 request num = 0", __func__);
- /* Set the individual packed cmd23 request num to zero */
- brq->sbc.arg = MMC_CMD23_ARG_PACKED;
- break;
- case TEST_CMD23_PACKED_BIT_UNSET:
- test_pr_info("%s: CMD23 packed bit unset", __func__);
- /*
- * Set the individual packed cmd23 packed bit to 0,
- * although there is a packed write request
- */
- brq->sbc.arg &= ~CMD23_PACKED_BIT;
- break;
- case TEST_CMD23_REL_WR_BIT_SET:
- test_pr_info("%s: CMD23 REL WR bit set", __func__);
- /* Set the individual packed cmd23 reliable write bit */
- brq->sbc.arg = MMC_CMD23_ARG_PACKED | MMC_CMD23_ARG_REL_WR;
- break;
- case TEST_CMD23_BITS_16TO29_SET:
- test_pr_info("%s: CMD23 bits [16-29] set", __func__);
- brq->sbc.arg = MMC_CMD23_ARG_PACKED |
- PACKED_HDR_BITS_16_TO_29_SET;
- break;
- case TEST_CMD23_HDR_BLK_NOT_IN_COUNT:
- test_pr_info("%s: CMD23 hdr not in block count", __func__);
- brq->sbc.arg = MMC_CMD23_ARG_PACKED |
- ((rq_data_dir(req) == READ) ? 0 : mqrq->packed_blocks);
- break;
- default:
- test_pr_err("%s: unexpected testcase %d",
- __func__, mbtd->test_info.testcase);
- break;
- }
-}
-
-/*
- * A callback assigned to the err_check_fn field of the mmc_request by the
- * MMC/card/block layer.
- * Called upon request completion by the MMC/core layer.
- * Here we emulate an error return value from the card.
- */
-static int test_err_check(struct mmc_card *card, struct mmc_async_req *areq)
-{
- struct mmc_queue_req *mq_rq = container_of(areq, struct mmc_queue_req,
- mmc_active);
- struct request_queue *req_q = test_iosched_get_req_queue();
- struct mmc_queue *mq;
- int max_packed_reqs;
- int ret = 0;
-
- if (req_q)
- mq = req_q->queuedata;
- else {
- test_pr_err("%s: NULL request_queue", __func__);
- return 0;
- }
-
- if (!mq) {
- test_pr_err("%s: %s: NULL mq", __func__,
- mmc_hostname(card->host));
- return 0;
- }
-
- max_packed_reqs = mq->card->ext_csd.max_packed_writes;
-
- if (!mq_rq) {
- test_pr_err("%s: %s: NULL mq_rq", __func__,
- mmc_hostname(card->host));
- return 0;
- }
-
- switch (mbtd->test_info.testcase) {
- case TEST_RET_ABORT:
- test_pr_info("%s: return abort", __func__);
- ret = MMC_BLK_ABORT;
- break;
- case TEST_RET_PARTIAL_FOLLOWED_BY_SUCCESS:
- test_pr_info("%s: return partial followed by success",
- __func__);
- /*
- * Since in this testcase num_requests is always >= 2,
- * we can be sure that packed_fail_idx is always >= 1
- */
- mq_rq->packed_fail_idx = (mbtd->num_requests / 2);
- test_pr_info("%s: packed_fail_idx = %d"
- , __func__, mq_rq->packed_fail_idx);
- mq->err_check_fn = NULL;
- ret = MMC_BLK_PARTIAL;
- break;
- case TEST_RET_PARTIAL_FOLLOWED_BY_ABORT:
- if (!mbtd->err_check_counter) {
- test_pr_info("%s: return partial followed by abort",
- __func__);
- mbtd->err_check_counter++;
- /*
- * Since in this testcase num_requests is always >= 3,
- * we have that packed_fail_idx is always >= 1
- */
- mq_rq->packed_fail_idx = (mbtd->num_requests / 2);
- test_pr_info("%s: packed_fail_idx = %d"
- , __func__, mq_rq->packed_fail_idx);
- ret = MMC_BLK_PARTIAL;
- break;
- }
- mbtd->err_check_counter = 0;
- mq->err_check_fn = NULL;
- ret = MMC_BLK_ABORT;
- break;
- case TEST_RET_PARTIAL_MULTIPLE_UNTIL_SUCCESS:
- test_pr_info("%s: return partial multiple until success",
- __func__);
- if (++mbtd->err_check_counter >= (mbtd->num_requests)) {
- mq->err_check_fn = NULL;
- mbtd->err_check_counter = 0;
- ret = MMC_BLK_PARTIAL;
- break;
- }
- mq_rq->packed_fail_idx = 1;
- ret = MMC_BLK_PARTIAL;
- break;
- case TEST_RET_PARTIAL_MAX_FAIL_IDX:
- test_pr_info("%s: return partial max fail_idx", __func__);
- mq_rq->packed_fail_idx = max_packed_reqs - 1;
- mq->err_check_fn = NULL;
- ret = MMC_BLK_PARTIAL;
- break;
- case TEST_RET_RETRY:
- test_pr_info("%s: return retry", __func__);
- ret = MMC_BLK_RETRY;
- break;
- case TEST_RET_CMD_ERR:
- test_pr_info("%s: return cmd err", __func__);
- ret = MMC_BLK_CMD_ERR;
- break;
- case TEST_RET_DATA_ERR:
- test_pr_info("%s: return data err", __func__);
- ret = MMC_BLK_DATA_ERR;
- break;
- default:
- test_pr_err("%s: unexpected testcase %d",
- __func__, mbtd->test_info.testcase);
- }
-
- return ret;
-}
-
-/*
- * This is a specific implementation for the get_test_case_str_fn function
- * pointer in the test_info data structure. Given a valid test_data instance,
- * the function returns a string resembling the test name, based on the testcase
- */
-static char *get_test_case_str(struct test_data *td)
-{
- if (!td) {
- test_pr_err("%s: NULL td", __func__);
- return NULL;
- }
-
- switch (td->test_info.testcase) {
- case TEST_STOP_DUE_TO_FLUSH:
- return "Test stop due to flush";
- case TEST_STOP_DUE_TO_FLUSH_AFTER_MAX_REQS:
- return "Test stop due to flush after max-1 reqs";
- case TEST_STOP_DUE_TO_READ:
- return "Test stop due to read";
- case TEST_STOP_DUE_TO_READ_AFTER_MAX_REQS:
- return "Test stop due to read after max-1 reqs";
- case TEST_STOP_DUE_TO_EMPTY_QUEUE:
- return "Test stop due to empty queue";
- case TEST_STOP_DUE_TO_MAX_REQ_NUM:
- return "Test stop due to max req num";
- case TEST_STOP_DUE_TO_THRESHOLD:
- return "Test stop due to exceeding threshold";
- case TEST_RET_ABORT:
- return "Test err_check return abort";
- case TEST_RET_PARTIAL_FOLLOWED_BY_SUCCESS:
- return "Test err_check return partial followed by success";
- case TEST_RET_PARTIAL_FOLLOWED_BY_ABORT:
- return "Test err_check return partial followed by abort";
- case TEST_RET_PARTIAL_MULTIPLE_UNTIL_SUCCESS:
- return "Test err_check return partial multiple until success";
- case TEST_RET_PARTIAL_MAX_FAIL_IDX:
- return "Test err_check return partial max fail index";
- case TEST_RET_RETRY:
- return "Test err_check return retry";
- case TEST_RET_CMD_ERR:
- return "Test err_check return cmd error";
- case TEST_RET_DATA_ERR:
- return "Test err_check return data error";
- case TEST_HDR_INVALID_VERSION:
- return "Test invalid - wrong header version";
- case TEST_HDR_WRONG_WRITE_CODE:
- return "Test invalid - wrong write code";
- case TEST_HDR_INVALID_RW_CODE:
- return "Test invalid - wrong R/W code";
- case TEST_HDR_DIFFERENT_ADDRESSES:
- return "Test invalid - header different addresses";
- case TEST_HDR_REQ_NUM_SMALLER_THAN_ACTUAL:
- return "Test invalid - header req num smaller than actual";
- case TEST_HDR_REQ_NUM_LARGER_THAN_ACTUAL:
- return "Test invalid - header req num larger than actual";
- case TEST_HDR_CMD23_PACKED_BIT_SET:
- return "Test invalid - header cmd23 packed bit set";
- case TEST_CMD23_MAX_PACKED_WRITES:
- return "Test invalid - cmd23 max packed writes";
- case TEST_CMD23_ZERO_PACKED_WRITES:
- return "Test invalid - cmd23 zero packed writes";
- case TEST_CMD23_PACKED_BIT_UNSET:
- return "Test invalid - cmd23 packed bit unset";
- case TEST_CMD23_REL_WR_BIT_SET:
- return "Test invalid - cmd23 rel wr bit set";
- case TEST_CMD23_BITS_16TO29_SET:
- return "Test invalid - cmd23 bits [16-29] set";
- case TEST_CMD23_HDR_BLK_NOT_IN_COUNT:
- return "Test invalid - cmd23 header block not in count";
- case TEST_PACKING_EXP_N_OVER_TRIGGER:
- return "\nTest packing control - pack n";
- case TEST_PACKING_EXP_N_OVER_TRIGGER_FB_READ:
- return "\nTest packing control - pack n followed by read";
- case TEST_PACKING_EXP_N_OVER_TRIGGER_FLUSH_N:
- return "\nTest packing control - pack n followed by flush";
- case TEST_PACKING_EXP_ONE_OVER_TRIGGER_FB_READ:
- return "\nTest packing control - pack one followed by read";
- case TEST_PACKING_EXP_THRESHOLD_OVER_TRIGGER:
- return "\nTest packing control - pack threshold";
- case TEST_PACKING_NOT_EXP_LESS_THAN_TRIGGER_REQUESTS:
- return "\nTest packing control - no packing";
- case TEST_PACKING_NOT_EXP_TRIGGER_REQUESTS:
- return "\nTest packing control - no packing, trigger requests";
- case TEST_PACKING_NOT_EXP_TRIGGER_READ_TRIGGER:
- return "\nTest packing control - no pack, trigger-read-trigger";
- case TEST_PACKING_NOT_EXP_TRIGGER_FLUSH_TRIGGER:
- return "\nTest packing control- no pack, trigger-flush-trigger";
- case TEST_PACK_MIX_PACKED_NO_PACKED_PACKED:
- return "\nTest packing control - mix: pack -> no pack -> pack";
- case TEST_PACK_MIX_NO_PACKED_PACKED_NO_PACKED:
- return "\nTest packing control - mix: no pack->pack->no pack";
- case TEST_WRITE_DISCARD_SANITIZE_READ:
- return "\nTest write, discard, sanitize";
- default:
- return "Unknown testcase";
- }
-
- return NULL;
-}
-
-/*
- * Compare individual testcase's statistics to the expected statistics:
- * Compare stop reason and number of packing events
- */
-static int check_wr_packing_statistics(struct test_data *td)
-{
- struct mmc_wr_pack_stats *mmc_packed_stats;
- struct mmc_queue *mq = td->req_q->queuedata;
- int max_packed_reqs = mq->card->ext_csd.max_packed_writes;
- int i;
- struct mmc_card *card = mq->card;
- struct mmc_wr_pack_stats expected_stats;
- int *stop_reason;
- int ret = 0;
-
- if (!mq) {
- test_pr_err("%s: NULL mq", __func__);
- return -EINVAL;
- }
-
- expected_stats = mbtd->exp_packed_stats;
-
- mmc_packed_stats = mmc_blk_get_packed_statistics(card);
- if (!mmc_packed_stats) {
- test_pr_err("%s: NULL mmc_packed_stats", __func__);
- return -EINVAL;
- }
-
- if (!mmc_packed_stats->packing_events) {
- test_pr_err("%s: NULL packing_events", __func__);
- return -EINVAL;
- }
-
- spin_lock(&mmc_packed_stats->lock);
-
- if (!mmc_packed_stats->enabled) {
- test_pr_err("%s write packing statistics are not enabled",
- __func__);
- ret = -EINVAL;
- goto exit_err;
- }
-
- stop_reason = mmc_packed_stats->pack_stop_reason;
-
- for (i = 1; i <= max_packed_reqs; ++i) {
- if (mmc_packed_stats->packing_events[i] !=
- expected_stats.packing_events[i]) {
- test_pr_err(
- "%s: Wrong pack stats in index %d, got %d, expected %d",
- __func__, i, mmc_packed_stats->packing_events[i],
- expected_stats.packing_events[i]);
- if (td->fs_wr_reqs_during_test)
- goto cancel_round;
- ret = -EINVAL;
- goto exit_err;
- }
- }
-
- if (mmc_packed_stats->pack_stop_reason[EXCEEDS_SEGMENTS] !=
- expected_stats.pack_stop_reason[EXCEEDS_SEGMENTS]) {
- test_pr_err(
- "%s: Wrong pack stop reason EXCEEDS_SEGMENTS %d, expected %d",
- __func__, stop_reason[EXCEEDS_SEGMENTS],
- expected_stats.pack_stop_reason[EXCEEDS_SEGMENTS]);
- if (td->fs_wr_reqs_during_test)
- goto cancel_round;
- ret = -EINVAL;
- goto exit_err;
- }
-
- if (mmc_packed_stats->pack_stop_reason[EXCEEDS_SECTORS] !=
- expected_stats.pack_stop_reason[EXCEEDS_SECTORS]) {
- test_pr_err(
- "%s: Wrong pack stop reason EXCEEDS_SECTORS %d, expected %d",
- __func__, stop_reason[EXCEEDS_SECTORS],
- expected_stats.pack_stop_reason[EXCEEDS_SECTORS]);
- if (td->fs_wr_reqs_during_test)
- goto cancel_round;
- ret = -EINVAL;
- goto exit_err;
- }
-
- if (mmc_packed_stats->pack_stop_reason[WRONG_DATA_DIR] !=
- expected_stats.pack_stop_reason[WRONG_DATA_DIR]) {
- test_pr_err(
- "%s: Wrong pack stop reason WRONG_DATA_DIR %d, expected %d",
- __func__, stop_reason[WRONG_DATA_DIR],
- expected_stats.pack_stop_reason[WRONG_DATA_DIR]);
- if (td->fs_wr_reqs_during_test)
- goto cancel_round;
- ret = -EINVAL;
- goto exit_err;
- }
-
- if (mmc_packed_stats->pack_stop_reason[FLUSH_OR_DISCARD] !=
- expected_stats.pack_stop_reason[FLUSH_OR_DISCARD]) {
- test_pr_err(
- "%s: Wrong pack stop reason FLUSH_OR_DISCARD %d, expected %d",
- __func__, stop_reason[FLUSH_OR_DISCARD],
- expected_stats.pack_stop_reason[FLUSH_OR_DISCARD]);
- if (td->fs_wr_reqs_during_test)
- goto cancel_round;
- ret = -EINVAL;
- goto exit_err;
- }
-
- if (mmc_packed_stats->pack_stop_reason[EMPTY_QUEUE] !=
- expected_stats.pack_stop_reason[EMPTY_QUEUE]) {
- test_pr_err(
- "%s: Wrong pack stop reason EMPTY_QUEUE %d, expected %d",
- __func__, stop_reason[EMPTY_QUEUE],
- expected_stats.pack_stop_reason[EMPTY_QUEUE]);
- if (td->fs_wr_reqs_during_test)
- goto cancel_round;
- ret = -EINVAL;
- goto exit_err;
- }
-
- if (mmc_packed_stats->pack_stop_reason[REL_WRITE] !=
- expected_stats.pack_stop_reason[REL_WRITE]) {
- test_pr_err(
- "%s: Wrong pack stop reason REL_WRITE %d, expected %d",
- __func__, stop_reason[REL_WRITE],
- expected_stats.pack_stop_reason[REL_WRITE]);
- if (td->fs_wr_reqs_during_test)
- goto cancel_round;
- ret = -EINVAL;
- goto exit_err;
- }
-
-exit_err:
- spin_unlock(&mmc_packed_stats->lock);
- if (ret && mmc_packed_stats->enabled)
- print_mmc_packing_stats(card);
- return ret;
-cancel_round:
- spin_unlock(&mmc_packed_stats->lock);
- test_iosched_set_ignore_round(true);
- return 0;
-}
-
-/*
- * Pseudo-randomly choose a seed based on the last seed, and update it in
- * seed_number. then return seed_number (mod max_val), or min_val.
- */
-static unsigned int pseudo_random_seed(unsigned int *seed_number,
- unsigned int min_val,
- unsigned int max_val)
-{
- int ret = 0;
-
- if (!seed_number)
- return 0;
-
- *seed_number = ((unsigned int)(((unsigned long)*seed_number *
- (unsigned long)LARGE_PRIME_1) + LARGE_PRIME_2));
- ret = (unsigned int)((*seed_number) % max_val);
-
- return (ret > min_val ? ret : min_val);
-}
-
-/*
- * Given a pseudo-random seed, find a pseudo-random num_of_bios.
- * Make sure that num_of_bios is not larger than TEST_MAX_SECTOR_RANGE
- */
-static void pseudo_rnd_num_of_bios(unsigned int *num_bios_seed,
- unsigned int *num_of_bios)
-{
- do {
- *num_of_bios = pseudo_random_seed(num_bios_seed, 1,
- TEST_MAX_BIOS_PER_REQ);
- if (!(*num_of_bios))
- *num_of_bios = 1;
- } while ((*num_of_bios) * BIO_U32_SIZE * 4 > TEST_MAX_SECTOR_RANGE);
-}
-
-/* Add a single read request to the given td's request queue */
-static int prepare_request_add_read(struct test_data *td)
-{
- int ret;
- int start_sec;
-
- if (td)
- start_sec = td->start_sector;
- else {
- test_pr_err("%s: NULL td", __func__);
- return 0;
- }
-
- test_pr_info("%s: Adding a read request, first req_id=%d", __func__,
- td->wr_rd_next_req_id);
-
- ret = test_iosched_add_wr_rd_test_req(0, READ, start_sec, 2,
- TEST_PATTERN_5A, NULL);
- if (ret) {
- test_pr_err("%s: failed to add a read request", __func__);
- return ret;
- }
-
- return 0;
-}
-
-/* Add a single flush request to the given td's request queue */
-static int prepare_request_add_flush(struct test_data *td)
-{
- int ret;
-
- if (!td) {
- test_pr_err("%s: NULL td", __func__);
- return 0;
- }
-
- test_pr_info("%s: Adding a flush request, first req_id=%d", __func__,
- td->unique_next_req_id);
- ret = test_iosched_add_unique_test_req(0, REQ_UNIQUE_FLUSH,
- 0, 0, NULL);
- if (ret) {
- test_pr_err("%s: failed to add a flush request", __func__);
- return ret;
- }
-
- return ret;
-}
-
-/*
- * Add num_requets amount of write requests to the given td's request queue.
- * If random test mode is chosen we pseudo-randomly choose the number of bios
- * for each write request, otherwise add between 1 to 5 bio per request.
- */
-static int prepare_request_add_write_reqs(struct test_data *td,
- int num_requests, int is_err_expected,
- int is_random)
-{
- int i;
- unsigned int start_sec;
- int num_bios;
- int ret = 0;
- unsigned int *bio_seed = &mbtd->random_test_seed;
-
- if (td)
- start_sec = td->start_sector;
- else {
- test_pr_err("%s: NULL td", __func__);
- return ret;
- }
-
- test_pr_info("%s: Adding %d write requests, first req_id=%d", __func__,
- num_requests, td->wr_rd_next_req_id);
-
- for (i = 1; i <= num_requests; i++) {
- start_sec = td->start_sector + 4096 * td->num_of_write_bios;
- if (is_random)
- pseudo_rnd_num_of_bios(bio_seed, &num_bios);
- else
- /*
- * For the non-random case, give num_bios a value
- * between 1 and 5, to keep a small number of BIOs
- */
- num_bios = (i%5)+1;
-
- ret = test_iosched_add_wr_rd_test_req(is_err_expected, WRITE,
- start_sec, num_bios, TEST_PATTERN_5A, NULL);
-
- if (ret) {
- test_pr_err("%s: failed to add a write request",
- __func__);
- return ret;
- }
- }
- return 0;
-}
-
-/*
- * Prepare the write, read and flush requests for a generic packed commands
- * testcase
- */
-static int prepare_packed_requests(struct test_data *td, int is_err_expected,
- int num_requests, int is_random)
-{
- int ret = 0;
- struct mmc_queue *mq;
- int max_packed_reqs;
- struct request_queue *req_q;
-
- if (!td) {
- pr_err("%s: NULL td", __func__);
- return -EINVAL;
- }
-
- req_q = td->req_q;
-
- if (!req_q) {
- pr_err("%s: NULL request queue", __func__);
- return -EINVAL;
- }
-
- mq = req_q->queuedata;
- if (!mq) {
- test_pr_err("%s: NULL mq", __func__);
- return -EINVAL;
- }
-
- max_packed_reqs = mq->card->ext_csd.max_packed_writes;
-
- if (mbtd->random_test_seed <= 0) {
- mbtd->random_test_seed =
- (unsigned int)(get_jiffies_64() & 0xFFFF);
- test_pr_info("%s: got seed from jiffies %d",
- __func__, mbtd->random_test_seed);
- }
-
- mmc_blk_init_packed_statistics(mq->card);
-
- ret = prepare_request_add_write_reqs(td, num_requests, is_err_expected,
- is_random);
- if (ret)
- return ret;
-
- /* Avoid memory corruption in upcoming stats set */
- if (td->test_info.testcase == TEST_STOP_DUE_TO_THRESHOLD)
- num_requests--;
-
- memset((void *)mbtd->exp_packed_stats.pack_stop_reason, 0,
- sizeof(mbtd->exp_packed_stats.pack_stop_reason));
- memset(mbtd->exp_packed_stats.packing_events, 0,
- (max_packed_reqs + 1) * sizeof(u32));
- if (num_requests <= max_packed_reqs)
- mbtd->exp_packed_stats.packing_events[num_requests] = 1;
-
- switch (td->test_info.testcase) {
- case TEST_STOP_DUE_TO_FLUSH:
- case TEST_STOP_DUE_TO_FLUSH_AFTER_MAX_REQS:
- ret = prepare_request_add_flush(td);
- if (ret)
- return ret;
-
- mbtd->exp_packed_stats.pack_stop_reason[FLUSH_OR_DISCARD] = 1;
- break;
- case TEST_STOP_DUE_TO_READ:
- case TEST_STOP_DUE_TO_READ_AFTER_MAX_REQS:
- ret = prepare_request_add_read(td);
- if (ret)
- return ret;
-
- mbtd->exp_packed_stats.pack_stop_reason[WRONG_DATA_DIR] = 1;
- break;
- case TEST_STOP_DUE_TO_THRESHOLD:
- mbtd->exp_packed_stats.packing_events[num_requests] = 1;
- mbtd->exp_packed_stats.packing_events[1] = 1;
- mbtd->exp_packed_stats.pack_stop_reason[THRESHOLD] = 1;
- mbtd->exp_packed_stats.pack_stop_reason[EMPTY_QUEUE] = 1;
- break;
- case TEST_STOP_DUE_TO_MAX_REQ_NUM:
- case TEST_RET_PARTIAL_MAX_FAIL_IDX:
- mbtd->exp_packed_stats.pack_stop_reason[THRESHOLD] = 1;
- break;
- default:
- mbtd->exp_packed_stats.pack_stop_reason[EMPTY_QUEUE] = 1;
- }
- mbtd->num_requests = num_requests;
-
- return 0;
-}
-
-/*
- * Prepare the write, read and flush requests for the packing control
- * testcases
- */
-static int prepare_packed_control_tests_requests(struct test_data *td,
- int is_err_expected, int num_requests, int is_random)
-{
- int ret = 0;
- struct mmc_queue *mq;
- int max_packed_reqs;
- int temp_num_req = num_requests;
- struct request_queue *req_q;
- int test_packed_trigger;
- int num_packed_reqs;
-
- if (!td) {
- test_pr_err("%s: NULL td\n", __func__);
- return -EINVAL;
- }
-
- req_q = td->req_q;
-
- if (!req_q) {
- test_pr_err("%s: NULL request queue\n", __func__);
- return -EINVAL;
- }
-
- mq = req_q->queuedata;
- if (!mq) {
- test_pr_err("%s: NULL mq", __func__);
- return -EINVAL;
- }
-
- max_packed_reqs = mq->card->ext_csd.max_packed_writes;
- test_packed_trigger = mq->num_wr_reqs_to_start_packing;
- num_packed_reqs = num_requests - test_packed_trigger;
-
- if (mbtd->random_test_seed == 0) {
- mbtd->random_test_seed =
- (unsigned int)(get_jiffies_64() & 0xFFFF);
- test_pr_info("%s: got seed from jiffies %d",
- __func__, mbtd->random_test_seed);
- }
-
- mmc_blk_init_packed_statistics(mq->card);
-
- if (td->test_info.testcase ==
- TEST_PACK_MIX_NO_PACKED_PACKED_NO_PACKED) {
- temp_num_req = num_requests;
- num_requests = test_packed_trigger - 1;
- }
-
- /* Verify that the packing is disabled before starting the test */
- mq->wr_packing_enabled = false;
- mq->num_of_potential_packed_wr_reqs = 0;
-
- if (td->test_info.testcase == TEST_PACK_MIX_PACKED_NO_PACKED_PACKED) {
- mq->num_of_potential_packed_wr_reqs = test_packed_trigger + 1;
- mq->wr_packing_enabled = true;
- num_requests = test_packed_trigger + 2;
- }
-
- ret = prepare_request_add_write_reqs(td, num_requests, is_err_expected,
- is_random);
- if (ret)
- goto exit;
-
- if (td->test_info.testcase == TEST_PACK_MIX_NO_PACKED_PACKED_NO_PACKED)
- num_requests = temp_num_req;
-
- memset((void *)mbtd->exp_packed_stats.pack_stop_reason, 0,
- sizeof(mbtd->exp_packed_stats.pack_stop_reason));
- memset(mbtd->exp_packed_stats.packing_events, 0,
- (max_packed_reqs + 1) * sizeof(u32));
-
- switch (td->test_info.testcase) {
- case TEST_PACKING_EXP_N_OVER_TRIGGER_FB_READ:
- case TEST_PACKING_EXP_ONE_OVER_TRIGGER_FB_READ:
- ret = prepare_request_add_read(td);
- if (ret)
- goto exit;
-
- mbtd->exp_packed_stats.pack_stop_reason[WRONG_DATA_DIR] = 1;
- mbtd->exp_packed_stats.packing_events[num_packed_reqs] = 1;
- break;
- case TEST_PACKING_EXP_N_OVER_TRIGGER_FLUSH_N:
- ret = prepare_request_add_flush(td);
- if (ret)
- goto exit;
-
- ret = prepare_request_add_write_reqs(td, num_packed_reqs,
- is_err_expected, is_random);
- if (ret)
- goto exit;
-
- mbtd->exp_packed_stats.pack_stop_reason[EMPTY_QUEUE] = 1;
- mbtd->exp_packed_stats.pack_stop_reason[FLUSH_OR_DISCARD] = 1;
- mbtd->exp_packed_stats.packing_events[num_packed_reqs] = 2;
- break;
- case TEST_PACKING_NOT_EXP_TRIGGER_READ_TRIGGER:
- ret = prepare_request_add_read(td);
- if (ret)
- goto exit;
-
- ret = prepare_request_add_write_reqs(td, test_packed_trigger,
- is_err_expected, is_random);
- if (ret)
- goto exit;
-
- mbtd->exp_packed_stats.packing_events[num_packed_reqs] = 1;
- break;
- case TEST_PACKING_NOT_EXP_TRIGGER_FLUSH_TRIGGER:
- ret = prepare_request_add_flush(td);
- if (ret)
- goto exit;
-
- ret = prepare_request_add_write_reqs(td, test_packed_trigger,
- is_err_expected, is_random);
- if (ret)
- goto exit;
-
- mbtd->exp_packed_stats.packing_events[num_packed_reqs] = 1;
- break;
- case TEST_PACK_MIX_PACKED_NO_PACKED_PACKED:
- ret = prepare_request_add_read(td);
- if (ret)
- goto exit;
-
- ret = prepare_request_add_write_reqs(td, test_packed_trigger-1,
- is_err_expected, is_random);
- if (ret)
- goto exit;
-
- ret = prepare_request_add_write_reqs(td, num_requests,
- is_err_expected, is_random);
- if (ret)
- goto exit;
-
- mbtd->exp_packed_stats.packing_events[num_requests] = 1;
- mbtd->exp_packed_stats.packing_events[num_requests-1] = 1;
- mbtd->exp_packed_stats.pack_stop_reason[WRONG_DATA_DIR] = 1;
- mbtd->exp_packed_stats.pack_stop_reason[EMPTY_QUEUE] = 1;
- break;
- case TEST_PACK_MIX_NO_PACKED_PACKED_NO_PACKED:
- ret = prepare_request_add_read(td);
- if (ret)
- goto exit;
-
- ret = prepare_request_add_write_reqs(td, num_requests,
- is_err_expected, is_random);
- if (ret)
- goto exit;
-
- ret = prepare_request_add_read(td);
- if (ret)
- goto exit;
-
- ret = prepare_request_add_write_reqs(td, test_packed_trigger-1,
- is_err_expected, is_random);
- if (ret)
- goto exit;
-
- mbtd->exp_packed_stats.pack_stop_reason[WRONG_DATA_DIR] = 1;
- mbtd->exp_packed_stats.packing_events[num_packed_reqs] = 1;
- break;
- case TEST_PACKING_NOT_EXP_LESS_THAN_TRIGGER_REQUESTS:
- case TEST_PACKING_NOT_EXP_TRIGGER_REQUESTS:
- mbtd->exp_packed_stats.packing_events[num_packed_reqs] = 1;
- break;
- default:
- mbtd->exp_packed_stats.pack_stop_reason[EMPTY_QUEUE] = 1;
- mbtd->exp_packed_stats.packing_events[num_packed_reqs] = 1;
- }
- mbtd->num_requests = num_requests;
-
-exit:
- return ret;
-}
-
-/*
- * Prepare requests for the TEST_RET_PARTIAL_FOLLOWED_BY_ABORT testcase.
- * In this testcase we have mixed error expectations from different
- * write requests, hence the special prepare function.
- */
-static int prepare_partial_followed_by_abort(struct test_data *td,
- int num_requests)
-{
- int i, start_address;
- int is_err_expected = 0;
- int ret = 0;
- struct mmc_queue *mq = test_iosched_get_req_queue()->queuedata;
- int max_packed_reqs;
-
- if (!mq) {
- test_pr_err("%s: NULL mq", __func__);
- return -EINVAL;
- }
-
- max_packed_reqs = mq->card->ext_csd.max_packed_writes;
-
- mmc_blk_init_packed_statistics(mq->card);
-
- for (i = 1; i <= num_requests; i++) {
- if (i > (num_requests / 2))
- is_err_expected = 1;
-
- start_address = td->start_sector + 4096 * td->num_of_write_bios;
- ret = test_iosched_add_wr_rd_test_req(is_err_expected, WRITE,
- start_address, (i % 5) + 1, TEST_PATTERN_5A,
- NULL);
- if (ret) {
- test_pr_err("%s: failed to add a write request",
- __func__);
- return ret;
- }
- }
-
- memset((void *)&mbtd->exp_packed_stats.pack_stop_reason, 0,
- sizeof(mbtd->exp_packed_stats.pack_stop_reason));
- memset(mbtd->exp_packed_stats.packing_events, 0,
- (max_packed_reqs + 1) * sizeof(u32));
- mbtd->exp_packed_stats.packing_events[num_requests] = 1;
- mbtd->exp_packed_stats.pack_stop_reason[EMPTY_QUEUE] = 1;
-
- mbtd->num_requests = num_requests;
-
- return ret;
-}
-
-/*
- * Get number of write requests for current testcase. If random test mode was
- * chosen, pseudo-randomly choose the number of requests, otherwise set to
- * two less than the packing threshold.
- */
-static int get_num_requests(struct test_data *td)
-{
- int *seed = &mbtd->random_test_seed;
- struct request_queue *req_q;
- struct mmc_queue *mq;
- int max_num_requests;
- int num_requests;
- int min_num_requests = 2;
- int is_random = mbtd->is_random;
- int max_for_double;
- int test_packed_trigger;
-
- req_q = test_iosched_get_req_queue();
- if (req_q)
- mq = req_q->queuedata;
- else {
- test_pr_err("%s: NULL request queue", __func__);
- return 0;
- }
-
- if (!mq) {
- test_pr_err("%s: NULL mq", __func__);
- return -EINVAL;
- }
-
- max_num_requests = mq->card->ext_csd.max_packed_writes;
- num_requests = max_num_requests - 2;
- test_packed_trigger = mq->num_wr_reqs_to_start_packing;
-
- /*
- * Here max_for_double is intended for packed control testcases
- * in which we issue many write requests. It's purpose is to prevent
- * exceeding max number of req_queue requests.
- */
- max_for_double = max_num_requests - 10;
-
- if (td->test_info.testcase ==
- TEST_PACKING_NOT_EXP_LESS_THAN_TRIGGER_REQUESTS)
- /* Don't expect packing, so issue up to trigger-1 reqs */
- num_requests = test_packed_trigger - 1;
-
- if (is_random) {
- if (td->test_info.testcase ==
- TEST_RET_PARTIAL_FOLLOWED_BY_ABORT)
- /*
- * Here we don't want num_requests to be less than 1
- * as a consequence of division by 2.
- */
- min_num_requests = 3;
-
- if (td->test_info.testcase ==
- TEST_PACKING_NOT_EXP_LESS_THAN_TRIGGER_REQUESTS)
- /* Don't expect packing, so issue up to trigger reqs */
- max_num_requests = test_packed_trigger;
-
- num_requests = pseudo_random_seed(seed, min_num_requests,
- max_num_requests - 1);
- }
-
- if (td->test_info.testcase ==
- TEST_PACKING_NOT_EXP_LESS_THAN_TRIGGER_REQUESTS)
- num_requests -= test_packed_trigger;
-
- if (td->test_info.testcase == TEST_PACKING_EXP_N_OVER_TRIGGER_FLUSH_N)
- num_requests =
- num_requests > max_for_double ? max_for_double : num_requests;
-
- if (mbtd->test_group == TEST_PACKING_CONTROL_GROUP)
- num_requests += test_packed_trigger;
-
- if (td->test_info.testcase == TEST_PACKING_NOT_EXP_TRIGGER_REQUESTS)
- num_requests = test_packed_trigger;
-
- return num_requests;
-}
-
-/*
- * An implementation for the prepare_test_fn pointer in the test_info
- * data structure. According to the testcase we add the right number of requests
- * and decide if an error is expected or not.
- */
-static int prepare_test(struct test_data *td)
-{
- struct mmc_queue *mq = test_iosched_get_req_queue()->queuedata;
- int max_num_requests;
- int num_requests = 0;
- int ret = 0;
- int is_random = mbtd->is_random;
- int test_packed_trigger = mq->num_wr_reqs_to_start_packing;
-
- if (!mq) {
- test_pr_err("%s: NULL mq", __func__);
- return -EINVAL;
- }
-
- max_num_requests = mq->card->ext_csd.max_packed_writes;
-
- if (is_random && mbtd->random_test_seed == 0) {
- mbtd->random_test_seed =
- (unsigned int)(get_jiffies_64() & 0xFFFF);
- test_pr_info("%s: got seed from jiffies %d",
- __func__, mbtd->random_test_seed);
- }
-
- num_requests = get_num_requests(td);
-
- if (mbtd->test_group == TEST_SEND_INVALID_GROUP)
- mq->packed_test_fn =
- test_invalid_packed_cmd;
-
- if (mbtd->test_group == TEST_ERR_CHECK_GROUP)
- mq->err_check_fn = test_err_check;
-
- switch (td->test_info.testcase) {
- case TEST_STOP_DUE_TO_FLUSH:
- case TEST_STOP_DUE_TO_READ:
- case TEST_RET_PARTIAL_FOLLOWED_BY_SUCCESS:
- case TEST_RET_PARTIAL_MULTIPLE_UNTIL_SUCCESS:
- case TEST_STOP_DUE_TO_EMPTY_QUEUE:
- case TEST_CMD23_PACKED_BIT_UNSET:
- ret = prepare_packed_requests(td, 0, num_requests, is_random);
- break;
- case TEST_STOP_DUE_TO_FLUSH_AFTER_MAX_REQS:
- case TEST_STOP_DUE_TO_READ_AFTER_MAX_REQS:
- ret = prepare_packed_requests(td, 0, max_num_requests - 1,
- is_random);
- break;
- case TEST_RET_PARTIAL_FOLLOWED_BY_ABORT:
- ret = prepare_partial_followed_by_abort(td, num_requests);
- break;
- case TEST_STOP_DUE_TO_MAX_REQ_NUM:
- case TEST_RET_PARTIAL_MAX_FAIL_IDX:
- ret = prepare_packed_requests(td, 0, max_num_requests,
- is_random);
- break;
- case TEST_STOP_DUE_TO_THRESHOLD:
- ret = prepare_packed_requests(td, 0, max_num_requests + 1,
- is_random);
- break;
- case TEST_RET_ABORT:
- case TEST_RET_RETRY:
- case TEST_RET_CMD_ERR:
- case TEST_RET_DATA_ERR:
- case TEST_HDR_INVALID_VERSION:
- case TEST_HDR_WRONG_WRITE_CODE:
- case TEST_HDR_INVALID_RW_CODE:
- case TEST_HDR_DIFFERENT_ADDRESSES:
- case TEST_HDR_REQ_NUM_SMALLER_THAN_ACTUAL:
- case TEST_HDR_REQ_NUM_LARGER_THAN_ACTUAL:
- case TEST_CMD23_MAX_PACKED_WRITES:
- case TEST_CMD23_ZERO_PACKED_WRITES:
- case TEST_CMD23_REL_WR_BIT_SET:
- case TEST_CMD23_BITS_16TO29_SET:
- case TEST_CMD23_HDR_BLK_NOT_IN_COUNT:
- case TEST_HDR_CMD23_PACKED_BIT_SET:
- ret = prepare_packed_requests(td, 1, num_requests, is_random);
- break;
- case TEST_PACKING_EXP_N_OVER_TRIGGER:
- case TEST_PACKING_EXP_N_OVER_TRIGGER_FB_READ:
- case TEST_PACKING_NOT_EXP_TRIGGER_REQUESTS:
- case TEST_PACKING_NOT_EXP_LESS_THAN_TRIGGER_REQUESTS:
- case TEST_PACK_MIX_PACKED_NO_PACKED_PACKED:
- case TEST_PACK_MIX_NO_PACKED_PACKED_NO_PACKED:
- ret = prepare_packed_control_tests_requests(td, 0, num_requests,
- is_random);
- break;
- case TEST_PACKING_EXP_THRESHOLD_OVER_TRIGGER:
- ret = prepare_packed_control_tests_requests(td, 0,
- max_num_requests, is_random);
- break;
- case TEST_PACKING_EXP_ONE_OVER_TRIGGER_FB_READ:
- ret = prepare_packed_control_tests_requests(td, 0,
- test_packed_trigger + 1,
- is_random);
- break;
- case TEST_PACKING_EXP_N_OVER_TRIGGER_FLUSH_N:
- ret = prepare_packed_control_tests_requests(td, 0, num_requests,
- is_random);
- break;
- case TEST_PACKING_NOT_EXP_TRIGGER_READ_TRIGGER:
- case TEST_PACKING_NOT_EXP_TRIGGER_FLUSH_TRIGGER:
- ret = prepare_packed_control_tests_requests(td, 0,
- test_packed_trigger, is_random);
- break;
- default:
- test_pr_info("%s: Invalid test case...", __func__);
- return -EINVAL;
- }
-
- return ret;
-}
-
-/*
- * An implementation for the post_test_fn in the test_info data structure.
- * In our case we just reset the function pointers in the mmc_queue in order for
- * the FS to be able to dispatch it's requests correctly after the test is
- * finished.
- */
-static int post_test(struct test_data *td)
-{
- struct mmc_queue *mq;
-
- if (!td)
- return -EINVAL;
-
- mq = td->req_q->queuedata;
-
- if (!mq) {
- test_pr_err("%s: NULL mq", __func__);
- return -EINVAL;
- }
-
- mq->packed_test_fn = NULL;
- mq->err_check_fn = NULL;
-
- return 0;
-}
-
-/*
- * This function checks, based on the current test's test_group, that the
- * packed commands capability and control are set right. In addition, we check
- * if the card supports the packed command feature.
- */
-static int validate_packed_commands_settings(void)
-{
- struct request_queue *req_q;
- struct mmc_queue *mq;
- int max_num_requests;
- struct mmc_host *host;
-
- req_q = test_iosched_get_req_queue();
- if (!req_q) {
- test_pr_err("%s: test_iosched_get_req_queue failed", __func__);
- test_iosched_set_test_result(TEST_FAILED);
- return -EINVAL;
- }
-
- mq = req_q->queuedata;
- if (!mq) {
- test_pr_err("%s: NULL mq", __func__);
- return -EINVAL;
- }
-
- max_num_requests = mq->card->ext_csd.max_packed_writes;
- host = mq->card->host;
-
- if (!(host->caps2 && MMC_CAP2_PACKED_WR)) {
- test_pr_err("%s: Packed Write capability disabled, exit test",
- __func__);
- test_iosched_set_test_result(TEST_NOT_SUPPORTED);
- return -EINVAL;
- }
-
- if (max_num_requests == 0) {
- test_pr_err(
- "%s: no write packing support, ext_csd.max_packed_writes=%d",
- __func__, mq->card->ext_csd.max_packed_writes);
- test_iosched_set_test_result(TEST_NOT_SUPPORTED);
- return -EINVAL;
- }
-
- test_pr_info("%s: max number of packed requests supported is %d ",
- __func__, max_num_requests);
-
- switch (mbtd->test_group) {
- case TEST_SEND_WRITE_PACKING_GROUP:
- case TEST_ERR_CHECK_GROUP:
- case TEST_SEND_INVALID_GROUP:
- /* disable the packing control */
- host->caps2 &= ~MMC_CAP2_PACKED_WR_CONTROL;
- break;
- case TEST_PACKING_CONTROL_GROUP:
- host->caps2 |= MMC_CAP2_PACKED_WR_CONTROL;
- break;
- default:
- break;
- }
-
- return 0;
-}
-
-static void pseudo_rnd_sector_and_size(unsigned int *seed,
- unsigned int min_start_sector,
- unsigned int *start_sector,
- unsigned int *num_of_bios)
-{
- unsigned int max_sec = min_start_sector + TEST_MAX_SECTOR_RANGE;
- do {
- *start_sector = pseudo_random_seed(seed,
- 1, max_sec);
- *num_of_bios = pseudo_random_seed(seed,
- 1, TEST_MAX_BIOS_PER_REQ);
- if (!(*num_of_bios))
- *num_of_bios = 1;
- } while ((*start_sector < min_start_sector) ||
- (*start_sector + (*num_of_bios * BIO_U32_SIZE * 4)) > max_sec);
-}
-
-/* sanitize test functions */
-static int prepare_write_discard_sanitize_read(struct test_data *td)
-{
- unsigned int start_sector;
- unsigned int num_of_bios = 0;
- static unsigned int total_bios;
- unsigned int *num_bios_seed;
- int i = 0;
-
- if (mbtd->random_test_seed == 0) {
- mbtd->random_test_seed =
- (unsigned int)(get_jiffies_64() & 0xFFFF);
- test_pr_info("%s: got seed from jiffies %d",
- __func__, mbtd->random_test_seed);
- }
- num_bios_seed = &mbtd->random_test_seed;
-
- do {
- pseudo_rnd_sector_and_size(num_bios_seed, td->start_sector,
- &start_sector, &num_of_bios);
-
- /* DISCARD */
- total_bios += num_of_bios;
- test_pr_info("%s: discard req: id=%d, startSec=%d, NumBios=%d",
- __func__, td->unique_next_req_id, start_sector,
- num_of_bios);
- test_iosched_add_unique_test_req(0, REQ_UNIQUE_DISCARD,
- start_sector, BIO_TO_SECTOR(num_of_bios),
- NULL);
-
- } while (++i < (BLKDEV_MAX_RQ-10));
-
- test_pr_info("%s: total discard bios = %d", __func__, total_bios);
-
- test_pr_info("%s: add sanitize req", __func__);
- test_iosched_add_unique_test_req(0, REQ_UNIQUE_SANITIZE, 0, 0, NULL);
-
- return 0;
-}
-
-static bool message_repeat;
-static int test_open(struct inode *inode, struct file *file)
-{
- file->private_data = inode->i_private;
- message_repeat = 1;
- return 0;
-}
-
-/* send_packing TEST */
-static ssize_t send_write_packing_test_write(struct file *file,
- const char __user *buf,
- size_t count,
- loff_t *ppos)
-{
- int ret = 0;
- int i = 0;
- int number = -1;
- int j = 0;
-
- test_pr_info("%s: -- send_write_packing TEST --", __func__);
-
- sscanf(buf, "%d", &number);
-
- if (number <= 0)
- number = 1;
-
-
- mbtd->test_group = TEST_SEND_WRITE_PACKING_GROUP;
-
- if (validate_packed_commands_settings())
- return count;
-
- if (mbtd->random_test_seed > 0)
- test_pr_info("%s: Test seed: %d", __func__,
- mbtd->random_test_seed);
-
- memset(&mbtd->test_info, 0, sizeof(struct test_info));
-
- mbtd->test_info.data = mbtd;
- mbtd->test_info.prepare_test_fn = prepare_test;
- mbtd->test_info.check_test_result_fn = check_wr_packing_statistics;
- mbtd->test_info.get_test_case_str_fn = get_test_case_str;
- mbtd->test_info.post_test_fn = post_test;
-
- for (i = 0; i < number; ++i) {
- test_pr_info("%s: Cycle # %d / %d", __func__, i+1, number);
- test_pr_info("%s: ====================", __func__);
-
- for (j = SEND_WRITE_PACKING_MIN_TESTCASE;
- j <= SEND_WRITE_PACKING_MAX_TESTCASE; j++) {
-
- mbtd->test_info.testcase = j;
- mbtd->is_random = RANDOM_TEST;
- ret = test_iosched_start_test(&mbtd->test_info);
- if (ret)
- break;
- /* Allow FS requests to be dispatched */
- msleep(1000);
- mbtd->test_info.testcase = j;
- mbtd->is_random = NON_RANDOM_TEST;
- ret = test_iosched_start_test(&mbtd->test_info);
- if (ret)
- break;
- /* Allow FS requests to be dispatched */
- msleep(1000);
- }
- }
-
- test_pr_info("%s: Completed all the test cases.", __func__);
-
- return count;
-}
-
-static ssize_t send_write_packing_test_read(struct file *file,
- char __user *buffer,
- size_t count,
- loff_t *offset)
-{
- memset((void *)buffer, 0, count);
-
- snprintf(buffer, count,
- "\nsend_write_packing_test\n"
- "=========\n"
- "Description:\n"
- "This test checks the following scenarios\n"
- "- Pack due to FLUSH message\n"
- "- Pack due to FLUSH after threshold writes\n"
- "- Pack due to READ message\n"
- "- Pack due to READ after threshold writes\n"
- "- Pack due to empty queue\n"
- "- Pack due to threshold writes\n"
- "- Pack due to one over threshold writes\n");
-
- if (message_repeat == 1) {
- message_repeat = 0;
- return strnlen(buffer, count);
- } else {
- return 0;
- }
-}
-
-const struct file_operations send_write_packing_test_ops = {
- .open = test_open,
- .write = send_write_packing_test_write,
- .read = send_write_packing_test_read,
-};
-
-/* err_check TEST */
-static ssize_t err_check_test_write(struct file *file,
- const char __user *buf,
- size_t count,
- loff_t *ppos)
-{
- int ret = 0;
- int i = 0;
- int number = -1;
- int j = 0;
-
- test_pr_info("%s: -- err_check TEST --", __func__);
-
- sscanf(buf, "%d", &number);
-
- if (number <= 0)
- number = 1;
-
- mbtd->test_group = TEST_ERR_CHECK_GROUP;
-
- if (validate_packed_commands_settings())
- return count;
-
- if (mbtd->random_test_seed > 0)
- test_pr_info("%s: Test seed: %d", __func__,
- mbtd->random_test_seed);
-
- memset(&mbtd->test_info, 0, sizeof(struct test_info));
-
- mbtd->test_info.data = mbtd;
- mbtd->test_info.prepare_test_fn = prepare_test;
- mbtd->test_info.check_test_result_fn = check_wr_packing_statistics;
- mbtd->test_info.get_test_case_str_fn = get_test_case_str;
- mbtd->test_info.post_test_fn = post_test;
-
- for (i = 0; i < number; ++i) {
- test_pr_info("%s: Cycle # %d / %d", __func__, i+1, number);
- test_pr_info("%s: ====================", __func__);
-
- for (j = ERR_CHECK_MIN_TESTCASE;
- j <= ERR_CHECK_MAX_TESTCASE ; j++) {
- mbtd->test_info.testcase = j;
- mbtd->is_random = RANDOM_TEST;
- ret = test_iosched_start_test(&mbtd->test_info);
- if (ret)
- break;
- /* Allow FS requests to be dispatched */
- msleep(1000);
- mbtd->test_info.testcase = j;
- mbtd->is_random = NON_RANDOM_TEST;
- ret = test_iosched_start_test(&mbtd->test_info);
- if (ret)
- break;
- /* Allow FS requests to be dispatched */
- msleep(1000);
- }
- }
-
- test_pr_info("%s: Completed all the test cases.", __func__);
-
- return count;
-}
-
-static ssize_t err_check_test_read(struct file *file,
- char __user *buffer,
- size_t count,
- loff_t *offset)
-{
- memset((void *)buffer, 0, count);
-
- snprintf(buffer, count,
- "\nerr_check_TEST\n"
- "=========\n"
- "Description:\n"
- "This test checks the following scenarios\n"
- "- Return ABORT\n"
- "- Return PARTIAL followed by success\n"
- "- Return PARTIAL followed by abort\n"
- "- Return PARTIAL multiple times until success\n"
- "- Return PARTIAL with fail index = threshold\n"
- "- Return RETRY\n"
- "- Return CMD_ERR\n"
- "- Return DATA_ERR\n");
-
- if (message_repeat == 1) {
- message_repeat = 0;
- return strnlen(buffer, count);
- } else {
- return 0;
- }
-}
-
-const struct file_operations err_check_test_ops = {
- .open = test_open,
- .write = err_check_test_write,
- .read = err_check_test_read,
-};
-
-/* send_invalid_packed TEST */
-static ssize_t send_invalid_packed_test_write(struct file *file,
- const char __user *buf,
- size_t count,
- loff_t *ppos)
-{
- int ret = 0;
- int i = 0;
- int number = -1;
- int j = 0;
- int num_of_failures = 0;
-
- test_pr_info("%s: -- send_invalid_packed TEST --", __func__);
-
- sscanf(buf, "%d", &number);
-
- if (number <= 0)
- number = 1;
-
- mbtd->test_group = TEST_SEND_INVALID_GROUP;
-
- if (validate_packed_commands_settings())
- return count;
-
- if (mbtd->random_test_seed > 0)
- test_pr_info("%s: Test seed: %d", __func__,
- mbtd->random_test_seed);
-
- memset(&mbtd->test_info, 0, sizeof(struct test_info));
-
- mbtd->test_info.data = mbtd;
- mbtd->test_info.prepare_test_fn = prepare_test;
- mbtd->test_info.check_test_result_fn = check_wr_packing_statistics;
- mbtd->test_info.get_test_case_str_fn = get_test_case_str;
- mbtd->test_info.post_test_fn = post_test;
-
- for (i = 0; i < number; ++i) {
- test_pr_info("%s: Cycle # %d / %d", __func__, i+1, number);
- test_pr_info("%s: ====================", __func__);
-
- for (j = INVALID_CMD_MIN_TESTCASE;
- j <= INVALID_CMD_MAX_TESTCASE ; j++) {
-
- mbtd->test_info.testcase = j;
- mbtd->is_random = RANDOM_TEST;
- ret = test_iosched_start_test(&mbtd->test_info);
- if (ret)
- num_of_failures++;
- /* Allow FS requests to be dispatched */
- msleep(1000);
-
- mbtd->test_info.testcase = j;
- mbtd->is_random = NON_RANDOM_TEST;
- ret = test_iosched_start_test(&mbtd->test_info);
- if (ret)
- num_of_failures++;
- /* Allow FS requests to be dispatched */
- msleep(1000);
- }
- }
-
- test_pr_info("%s: Completed all the test cases.", __func__);
-
- if (num_of_failures > 0) {
- test_iosched_set_test_result(TEST_FAILED);
- test_pr_err(
- "There were %d failures during the test, TEST FAILED",
- num_of_failures);
- }
- return count;
-}
-
-static ssize_t send_invalid_packed_test_read(struct file *file,
- char __user *buffer,
- size_t count,
- loff_t *offset)
-{
- memset((void *)buffer, 0, count);
-
- snprintf(buffer, count,
- "\nsend_invalid_packed_TEST\n"
- "=========\n"
- "Description:\n"
- "This test checks the following scenarios\n"
- "- Send an invalid header version\n"
- "- Send the wrong write code\n"
- "- Send an invalid R/W code\n"
- "- Send wrong start address in header\n"
- "- Send header with block_count smaller than actual\n"
- "- Send header with block_count larger than actual\n"
- "- Send header CMD23 packed bit set\n"
- "- Send CMD23 with block count over threshold\n"
- "- Send CMD23 with block_count equals zero\n"
- "- Send CMD23 packed bit unset\n"
- "- Send CMD23 reliable write bit set\n"
- "- Send CMD23 bits [16-29] set\n"
- "- Send CMD23 header block not in block_count\n");
-
- if (message_repeat == 1) {
- message_repeat = 0;
- return strnlen(buffer, count);
- } else {
- return 0;
- }
-}
-
-const struct file_operations send_invalid_packed_test_ops = {
- .open = test_open,
- .write = send_invalid_packed_test_write,
- .read = send_invalid_packed_test_read,
-};
-
-/* packing_control TEST */
-static ssize_t write_packing_control_test_write(struct file *file,
- const char __user *buf,
- size_t count,
- loff_t *ppos)
-{
- int ret = 0;
- int i = 0;
- int number = -1;
- int j = 0;
- struct mmc_queue *mq = test_iosched_get_req_queue()->queuedata;
- int max_num_requests = mq->card->ext_csd.max_packed_writes;
- int test_successful = 1;
-
- test_pr_info("%s: -- write_packing_control TEST --", __func__);
-
- sscanf(buf, "%d", &number);
-
- if (number <= 0)
- number = 1;
-
- test_pr_info("%s: max_num_requests = %d ", __func__,
- max_num_requests);
-
- memset(&mbtd->test_info, 0, sizeof(struct test_info));
- mbtd->test_group = TEST_PACKING_CONTROL_GROUP;
-
- if (validate_packed_commands_settings())
- return count;
-
- mbtd->test_info.data = mbtd;
- mbtd->test_info.prepare_test_fn = prepare_test;
- mbtd->test_info.check_test_result_fn = check_wr_packing_statistics;
- mbtd->test_info.get_test_case_str_fn = get_test_case_str;
-
- for (i = 0; i < number; ++i) {
- test_pr_info("%s: Cycle # %d / %d", __func__, i+1, number);
- test_pr_info("%s: ====================", __func__);
-
- for (j = PACKING_CONTROL_MIN_TESTCASE;
- j <= PACKING_CONTROL_MAX_TESTCASE; j++) {
-
- test_successful = 1;
- mbtd->test_info.testcase = j;
- mbtd->is_random = RANDOM_TEST;
- ret = test_iosched_start_test(&mbtd->test_info);
- if (ret) {
- test_successful = 0;
- break;
- }
- /* Allow FS requests to be dispatched */
- msleep(1000);
-
- mbtd->test_info.testcase = j;
- mbtd->is_random = NON_RANDOM_TEST;
- ret = test_iosched_start_test(&mbtd->test_info);
- if (ret) {
- test_successful = 0;
- break;
- }
- /* Allow FS requests to be dispatched */
- msleep(1000);
- }
-
- if (!test_successful)
- break;
- }
-
- test_pr_info("%s: Completed all the test cases.", __func__);
-
- return count;
-}
-
-static ssize_t write_packing_control_test_read(struct file *file,
- char __user *buffer,
- size_t count,
- loff_t *offset)
-{
- memset((void *)buffer, 0, count);
-
- snprintf(buffer, count,
- "\nwrite_packing_control_test\n"
- "=========\n"
- "Description:\n"
- "This test checks the following scenarios\n"
- "- Packing expected - one over trigger\n"
- "- Packing expected - N over trigger\n"
- "- Packing expected - N over trigger followed by read\n"
- "- Packing expected - N over trigger followed by flush\n"
- "- Packing expected - threshold over trigger FB by flush\n"
- "- Packing not expected - less than trigger\n"
- "- Packing not expected - trigger requests\n"
- "- Packing not expected - trigger, read, trigger\n"
- "- Mixed state - packing -> no packing -> packing\n"
- "- Mixed state - no packing -> packing -> no packing\n");
-
- if (message_repeat == 1) {
- message_repeat = 0;
- return strnlen(buffer, count);
- } else {
- return 0;
- }
-}
-
-const struct file_operations write_packing_control_test_ops = {
- .open = test_open,
- .write = write_packing_control_test_write,
- .read = write_packing_control_test_read,
-};
-
-static ssize_t write_discard_sanitize_test_write(struct file *file,
- const char __user *buf,
- size_t count,
- loff_t *ppos)
-{
- int ret = 0;
- int i = 0;
- int number = -1;
-
- sscanf(buf, "%d", &number);
- if (number <= 0)
- number = 1;
-
- test_pr_info("%s: -- write_discard_sanitize TEST --\n", __func__);
-
- memset(&mbtd->test_info, 0, sizeof(struct test_info));
-
- mbtd->test_group = TEST_GENERAL_GROUP;
-
- mbtd->test_info.data = mbtd;
- mbtd->test_info.prepare_test_fn = prepare_write_discard_sanitize_read;
- mbtd->test_info.get_test_case_str_fn = get_test_case_str;
- mbtd->test_info.timeout_msec = SANITIZE_TEST_TIMEOUT;
-
- for (i = 0 ; i < number ; ++i) {
- test_pr_info("%s: Cycle # %d / %d\n", __func__, i+1, number);
- test_pr_info("%s: ===================", __func__);
-
- mbtd->test_info.testcase = TEST_WRITE_DISCARD_SANITIZE_READ;
- ret = test_iosched_start_test(&mbtd->test_info);
-
- if (ret)
- break;
- }
-
- return count;
-}
-
-const struct file_operations write_discard_sanitize_test_ops = {
- .open = test_open,
- .write = write_discard_sanitize_test_write,
-};
-
-static void mmc_block_test_debugfs_cleanup(void)
-{
- debugfs_remove(mbtd->debug.random_test_seed);
- debugfs_remove(mbtd->debug.send_write_packing_test);
- debugfs_remove(mbtd->debug.err_check_test);
- debugfs_remove(mbtd->debug.send_invalid_packed_test);
- debugfs_remove(mbtd->debug.packing_control_test);
- debugfs_remove(mbtd->debug.discard_sanitize_test);
-}
-
-static int mmc_block_test_debugfs_init(void)
-{
- struct dentry *utils_root, *tests_root;
-
- utils_root = test_iosched_get_debugfs_utils_root();
- tests_root = test_iosched_get_debugfs_tests_root();
-
- if (!utils_root || !tests_root)
- return -EINVAL;
-
- mbtd->debug.random_test_seed = debugfs_create_u32(
- "random_test_seed",
- S_IRUGO | S_IWUGO,
- utils_root,
- &mbtd->random_test_seed);
-
- if (!mbtd->debug.random_test_seed)
- goto err_nomem;
-
- mbtd->debug.send_write_packing_test =
- debugfs_create_file("send_write_packing_test",
- S_IRUGO | S_IWUGO,
- tests_root,
- NULL,
- &send_write_packing_test_ops);
-
- if (!mbtd->debug.send_write_packing_test)
- goto err_nomem;
-
- mbtd->debug.err_check_test =
- debugfs_create_file("err_check_test",
- S_IRUGO | S_IWUGO,
- tests_root,
- NULL,
- &err_check_test_ops);
-
- if (!mbtd->debug.err_check_test)
- goto err_nomem;
-
- mbtd->debug.send_invalid_packed_test =
- debugfs_create_file("send_invalid_packed_test",
- S_IRUGO | S_IWUGO,
- tests_root,
- NULL,
- &send_invalid_packed_test_ops);
-
- if (!mbtd->debug.send_invalid_packed_test)
- goto err_nomem;
-
- mbtd->debug.packing_control_test = debugfs_create_file(
- "packing_control_test",
- S_IRUGO | S_IWUGO,
- tests_root,
- NULL,
- &write_packing_control_test_ops);
-
- if (!mbtd->debug.packing_control_test)
- goto err_nomem;
-
- mbtd->debug.discard_sanitize_test =
- debugfs_create_file("write_discard_sanitize_test",
- S_IRUGO | S_IWUGO,
- tests_root,
- NULL,
- &write_discard_sanitize_test_ops);
- if (!mbtd->debug.discard_sanitize_test) {
- mmc_block_test_debugfs_cleanup();
- return -ENOMEM;
- }
-
- return 0;
-
-err_nomem:
- mmc_block_test_debugfs_cleanup();
- return -ENOMEM;
-}
-
-static void mmc_block_test_probe(void)
-{
- struct request_queue *q = test_iosched_get_req_queue();
- struct mmc_queue *mq;
- int max_packed_reqs;
-
- if (!q) {
- test_pr_err("%s: NULL request queue", __func__);
- return;
- }
-
- mq = q->queuedata;
- if (!mq) {
- test_pr_err("%s: NULL mq", __func__);
- return;
- }
-
- max_packed_reqs = mq->card->ext_csd.max_packed_writes;
- mbtd->exp_packed_stats.packing_events =
- kzalloc((max_packed_reqs + 1) *
- sizeof(*mbtd->exp_packed_stats.packing_events),
- GFP_KERNEL);
-
- mmc_block_test_debugfs_init();
-}
-
-static void mmc_block_test_remove(void)
-{
- mmc_block_test_debugfs_cleanup();
-}
-
-static int __init mmc_block_test_init(void)
-{
- mbtd = kzalloc(sizeof(struct mmc_block_test_data), GFP_KERNEL);
- if (!mbtd) {
- test_pr_err("%s: failed to allocate mmc_block_test_data",
- __func__);
- return -ENODEV;
- }
-
- mbtd->bdt.init_fn = mmc_block_test_probe;
- mbtd->bdt.exit_fn = mmc_block_test_remove;
- INIT_LIST_HEAD(&mbtd->bdt.list);
- test_iosched_register(&mbtd->bdt);
-
- return 0;
-}
-
-static void __exit mmc_block_test_exit(void)
-{
- test_iosched_unregister(&mbtd->bdt);
- kfree(mbtd);
-}
-
-module_init(mmc_block_test_init);
-module_exit(mmc_block_test_exit);
-
-MODULE_LICENSE("GPL v2");
-MODULE_DESCRIPTION("MMC block test");
diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c
index ebcf7ed..d818fc4 100644
--- a/drivers/mmc/card/queue.c
+++ b/drivers/mmc/card/queue.c
@@ -25,13 +25,6 @@
#define MMC_QUEUE_SUSPENDED (1 << 0)
/*
- * Based on benchmark tests the default num of requests to trigger the write
- * packing was determined, to keep the read latency as low as possible and
- * manage to keep the high write throughput.
- */
-#define DEFAULT_NUM_REQS_TO_START_PACK 17
-
-/*
* Prepare a MMC request. This just filters out odd stuff.
*/
static int mmc_prep_request(struct request_queue *q, struct request *req)
@@ -74,9 +67,6 @@
spin_unlock_irq(q->queue_lock);
if (req || mq->mqrq_prev->req) {
- if (mmc_card_doing_bkops(mq->card))
- mmc_interrupt_bkops(mq->card);
-
set_current_state(TASK_RUNNING);
mq->issue_fn(mq, req);
} else {
@@ -84,8 +74,6 @@
set_current_state(TASK_RUNNING);
break;
}
-
- mmc_start_bkops(mq->card);
up(&mq->thread_sem);
schedule();
down(&mq->thread_sem);
@@ -193,14 +181,14 @@
if (!mq->queue)
return -ENOMEM;
- memset(&mq->mqrq_cur, 0, sizeof(mq->mqrq_cur));
- memset(&mq->mqrq_prev, 0, sizeof(mq->mqrq_prev));
INIT_LIST_HEAD(&mqrq_cur->packed_list);
INIT_LIST_HEAD(&mqrq_prev->packed_list);
+
+ memset(&mq->mqrq_cur, 0, sizeof(mq->mqrq_cur));
+ memset(&mq->mqrq_prev, 0, sizeof(mq->mqrq_prev));
mq->mqrq_cur = mqrq_cur;
mq->mqrq_prev = mqrq_prev;
mq->queue->queuedata = mq;
- mq->num_wr_reqs_to_start_packing = DEFAULT_NUM_REQS_TO_START_PACK;
blk_queue_prep_rq(mq->queue, mmc_prep_request);
queue_flag_set_unlocked(QUEUE_FLAG_NONROT, mq->queue);
diff --git a/drivers/mmc/card/queue.h b/drivers/mmc/card/queue.h
index ec3d6d2..5e04938 100644
--- a/drivers/mmc/card/queue.h
+++ b/drivers/mmc/card/queue.h
@@ -12,17 +12,6 @@
struct mmc_data data;
};
-enum mmc_blk_status {
- MMC_BLK_SUCCESS = 0,
- MMC_BLK_PARTIAL,
- MMC_BLK_CMD_ERR,
- MMC_BLK_RETRY,
- MMC_BLK_ABORT,
- MMC_BLK_DATA_ERR,
- MMC_BLK_ECC_ERR,
- MMC_BLK_NOMEDIUM,
-};
-
enum mmc_packed_cmd {
MMC_PACKED_NONE = 0,
MMC_PACKED_WRITE,
@@ -40,6 +29,7 @@
u32 packed_cmd_hdr[128];
unsigned int packed_blocks;
enum mmc_packed_cmd packed_cmd;
+ int packed_retries;
int packed_fail_idx;
u8 packed_num;
};
@@ -55,11 +45,6 @@
struct mmc_queue_req mqrq[2];
struct mmc_queue_req *mqrq_cur;
struct mmc_queue_req *mqrq_prev;
- bool wr_packing_enabled;
- int num_of_potential_packed_wr_reqs;
- int num_wr_reqs_to_start_packing;
- int (*err_check_fn) (struct mmc_card *, struct mmc_async_req *);
- void (*packed_test_fn) (struct request_queue *, struct mmc_queue_req *);
};
extern int mmc_init_queue(struct mmc_queue *, struct mmc_card *, spinlock_t *,
@@ -73,6 +58,4 @@
extern void mmc_queue_bounce_pre(struct mmc_queue_req *);
extern void mmc_queue_bounce_post(struct mmc_queue_req *);
-extern void print_mmc_packing_stats(struct mmc_card *card);
-
#endif
diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c
index 0592f9d..33f7d29 100644
--- a/drivers/mmc/core/bus.c
+++ b/drivers/mmc/core/bus.c
@@ -254,8 +254,6 @@
card->dev.release = mmc_release_card;
card->dev.type = type;
- spin_lock_init(&card->wr_pack_stats.lock);
-
return card;
}
@@ -358,8 +356,6 @@
device_del(&card->dev);
}
- kfree(card->wr_pack_stats.packing_events);
-
put_device(&card->dev);
}
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index e4d0fc1..9b316bb 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -28,6 +28,7 @@
#include <linux/random.h>
#include <linux/wakelock.h>
#include <linux/pm.h>
+#include <linux/slab.h>
#include <linux/mmc/card.h>
#include <linux/mmc/host.h>
@@ -44,10 +45,10 @@
#include "sdio_ops.h"
/*
- * The Background operations can take a long time, depends on the house keeping
- * operations the card has to perform
+ * Background operations can take a long time, depending on the housekeeping
+ * operations the card has to perform.
*/
-#define MMC_BKOPS_MAX_TIMEOUT (4 * 60 * 1000) /* max time to wait in ms */
+#define MMC_BKOPS_MAX_TIMEOUT (4 * 60 * 1000) /* max time to wait in ms */
static struct workqueue_struct *workqueue;
@@ -281,66 +282,62 @@
/**
* mmc_start_bkops - start BKOPS for supported cards
* @card: MMC card to start BKOPS
+ * @form_exception: A flag to indicate if this function was
+ * called due to an exception raised by the card
*
* Start background operations whenever requested.
- * when the urgent BKOPS bit is set in a R1 command response
+ * When the urgent BKOPS bit is set in a R1 command response
* then background operations should be started immediately.
*/
-void mmc_start_bkops(struct mmc_card *card)
+void mmc_start_bkops(struct mmc_card *card, bool from_exception)
{
int err;
- unsigned long flags;
int timeout;
+ bool use_busy_signal;
BUG_ON(!card);
- if (!card->ext_csd.bkops_en || !(card->host->caps2 & MMC_CAP2_BKOPS))
+
+ if (!card->ext_csd.bkops_en || mmc_card_doing_bkops(card))
return;
- if (mmc_card_check_bkops(card)) {
- spin_lock_irqsave(&card->host->lock, flags);
- mmc_card_clr_check_bkops(card);
- spin_unlock_irqrestore(&card->host->lock, flags);
- if (mmc_is_exception_event(card, EXT_CSD_URGENT_BKOPS))
- if (card->ext_csd.raw_bkops_status)
- mmc_card_set_need_bkops(card);
+ err = mmc_read_bkops_status(card);
+ if (err) {
+ pr_err("%s: Failed to read bkops status: %d\n",
+ mmc_hostname(card->host), err);
+ return;
}
- /*
- * If card is already doing bkops or need for
- * bkops flag is not set, then do nothing just
- * return
- */
- if (mmc_card_doing_bkops(card) || !mmc_card_need_bkops(card))
+ if (!card->ext_csd.raw_bkops_status)
+ return;
+
+ if (card->ext_csd.raw_bkops_status < EXT_CSD_BKOPS_LEVEL_2 &&
+ from_exception)
return;
mmc_claim_host(card->host);
-
- timeout = (card->ext_csd.raw_bkops_status >= EXT_CSD_BKOPS_LEVEL_2) ?
- MMC_BKOPS_MAX_TIMEOUT : 0;
-
- err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
- EXT_CSD_BKOPS_START, 1, timeout);
- if (err) {
- pr_warning("%s: error %d starting bkops\n",
- mmc_hostname(card->host), err);
- mmc_card_clr_need_bkops(card);
- goto out;
+ if (card->ext_csd.raw_bkops_status >= EXT_CSD_BKOPS_LEVEL_2) {
+ timeout = MMC_BKOPS_MAX_TIMEOUT;
+ use_busy_signal = true;
+ } else {
+ timeout = 0;
+ use_busy_signal = false;
}
- spin_lock_irqsave(&card->host->lock, flags);
- mmc_card_clr_need_bkops(card);
+ err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_BKOPS_START, 1, timeout, use_busy_signal);
+ if (err) {
+ pr_warn("%s: Error %d starting bkops\n",
+ mmc_hostname(card->host), err);
+ goto out;
+ }
/*
* For urgent bkops status (LEVEL_2 and more)
* bkops executed synchronously, otherwise
* the operation is in progress
*/
- if (card->ext_csd.raw_bkops_status >= EXT_CSD_BKOPS_LEVEL_2)
- mmc_card_set_check_bkops(card);
- else
+ if (!use_busy_signal)
mmc_card_set_doing_bkops(card);
-
- spin_unlock_irqrestore(&card->host->lock, flags);
out:
mmc_release_host(card->host);
}
@@ -455,6 +452,14 @@
if (host->areq) {
mmc_wait_for_req_done(host, host->areq->mrq);
err = host->areq->err_check(host->card, host->areq);
+ /*
+ * Check BKOPS urgency for each R1 response
+ */
+ if (host->card && mmc_card_mmc(host->card) &&
+ ((mmc_resp_type(host->areq->mrq->cmd) == MMC_RSP_R1) ||
+ (mmc_resp_type(host->areq->mrq->cmd) == MMC_RSP_R1B)) &&
+ (host->areq->mrq->cmd->resp[0] & R1_EXCEPTION_EVENT))
+ mmc_start_bkops(host->card, true);
}
if (!err && areq)
@@ -499,7 +504,7 @@
* @card: the MMC card associated with the HPI transfer
*
* Issued High Priority Interrupt, and check for card status
- * util out-of prg-state.
+ * until out-of prg-state.
*/
int mmc_interrupt_hpi(struct mmc_card *card)
{
@@ -581,68 +586,63 @@
EXPORT_SYMBOL(mmc_wait_for_cmd);
/**
- * mmc_interrupt_bkops - interrupt ongoing BKOPS
+ * mmc_stop_bkops - stop ongoing BKOPS
* @card: MMC card to check BKOPS
*
- * Send HPI command to interrupt ongoing background operations,
- * to allow rapid servicing of foreground operations,e.g. read/
+ * Send HPI command to stop ongoing background operations to
+ * allow rapid servicing of foreground operations, e.g. read/
* writes. Wait until the card comes out of the programming state
* to avoid errors in servicing read/write requests.
*/
-int mmc_interrupt_bkops(struct mmc_card *card)
+int mmc_stop_bkops(struct mmc_card *card)
{
int err = 0;
- unsigned long flags;
BUG_ON(!card);
-
err = mmc_interrupt_hpi(card);
- spin_lock_irqsave(&card->host->lock, flags);
- mmc_card_clr_doing_bkops(card);
- spin_unlock_irqrestore(&card->host->lock, flags);
+ /*
+ * If err is EINVAL, we can't issue an HPI.
+ * It should complete the BKOPS.
+ */
+ if (!err || (err == -EINVAL)) {
+ mmc_card_clr_doing_bkops(card);
+ err = 0;
+ }
return err;
}
-EXPORT_SYMBOL(mmc_interrupt_bkops);
+EXPORT_SYMBOL(mmc_stop_bkops);
int mmc_read_bkops_status(struct mmc_card *card)
{
int err;
- u8 ext_csd[512];
+ u8 *ext_csd;
+
+ /*
+ * In future work, we should consider storing the entire ext_csd.
+ */
+ ext_csd = kmalloc(512, GFP_KERNEL);
+ if (!ext_csd) {
+ pr_err("%s: could not allocate buffer to receive the ext_csd.\n",
+ mmc_hostname(card->host));
+ return -ENOMEM;
+ }
mmc_claim_host(card->host);
err = mmc_send_ext_csd(card, ext_csd);
mmc_release_host(card->host);
if (err)
- return err;
+ goto out;
card->ext_csd.raw_bkops_status = ext_csd[EXT_CSD_BKOPS_STATUS];
card->ext_csd.raw_exception_status = ext_csd[EXT_CSD_EXP_EVENTS_STATUS];
-
- return 0;
+out:
+ kfree(ext_csd);
+ return err;
}
EXPORT_SYMBOL(mmc_read_bkops_status);
-int mmc_is_exception_event(struct mmc_card *card, unsigned int value)
-{
- int err;
-
- err = mmc_read_bkops_status(card);
- if (err) {
- pr_err("%s: Didn't read bkops status : %d\n",
- mmc_hostname(card->host), err);
- return 0;
- }
-
- /* In eMMC 4.41, R1_EXCEPTION_EVENT is URGENT_BKOPS */
- if (card->ext_csd.rev == 5)
- return 1;
-
- return (card->ext_csd.raw_exception_status & value) ? 1 : 0;
-}
-EXPORT_SYMBOL(mmc_is_exception_event);
-
/**
* mmc_set_data_timeout - set the timeout for a data command
* @data: data phase for command
@@ -1297,7 +1297,7 @@
bit = fls(host->ocr_avail) - 1;
host->ios.vdd = bit;
- if (mmc_host_is_spi(host))
+ if (mmc_host_is_spi(host))
host->ios.chip_select = MMC_CS_HIGH;
else {
host->ios.chip_select = MMC_CS_DONTCARE;
@@ -1334,7 +1334,7 @@
host->ios.clock = 0;
host->ios.vdd = 0;
-
+
/*
* Reset ocr mask to be the highest possible voltage supported for
@@ -2508,9 +2508,11 @@
if (!err) {
if (host->bus_ops->suspend) {
- if (mmc_card_doing_bkops(host->card))
- mmc_interrupt_bkops(host->card);
-
+ if (mmc_card_doing_bkops(host->card)) {
+ err = mmc_stop_bkops(host->card);
+ if (err)
+ goto stop_bkops_err;
+ }
err = host->bus_ops->suspend(host);
}
if (!(host->card && mmc_card_sdio(host->card)))
@@ -2542,6 +2544,10 @@
out:
return err;
+stop_bkops_err:
+ if (!(host->card && mmc_card_sdio(host->card)))
+ mmc_release_host(host);
+ return err;
}
EXPORT_SYMBOL(mmc_suspend_host);
@@ -2604,11 +2610,21 @@
struct mmc_host *host = container_of(
notify_block, struct mmc_host, pm_notify);
unsigned long flags;
-
+ int err = 0;
switch (mode) {
case PM_HIBERNATION_PREPARE:
case PM_SUSPEND_PREPARE:
+ if (host->card && mmc_card_mmc(host->card) &&
+ mmc_card_doing_bkops(host->card)) {
+ err = mmc_stop_bkops(host->card);
+ if (err) {
+ pr_err("%s: didn't stop bkops\n",
+ mmc_hostname(host));
+ return err;
+ }
+ mmc_card_clr_doing_bkops(host->card);
+ }
spin_lock_irqsave(&host->lock, flags);
if (mmc_bus_needs_resume(host)) {
diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
index 898e358..9ab5b17 100644
--- a/drivers/mmc/core/debugfs.c
+++ b/drivers/mmc/core/debugfs.c
@@ -318,164 +318,6 @@
.llseek = default_llseek,
};
-static int mmc_wr_pack_stats_open(struct inode *inode, struct file *filp)
-{
- struct mmc_card *card = inode->i_private;
-
- filp->private_data = card;
- card->wr_pack_stats.print_in_read = 1;
- return 0;
-}
-
-#define TEMP_BUF_SIZE 256
-static ssize_t mmc_wr_pack_stats_read(struct file *filp, char __user *ubuf,
- size_t cnt, loff_t *ppos)
-{
- struct mmc_card *card = filp->private_data;
- struct mmc_wr_pack_stats *pack_stats;
- int i;
- int max_num_of_packed_reqs = 0;
- char *temp_buf;
-
- if (!card)
- return cnt;
-
- if (!card->wr_pack_stats.print_in_read)
- return 0;
-
- if (!card->wr_pack_stats.enabled) {
- pr_info("%s: write packing statistics are disabled\n",
- mmc_hostname(card->host));
- goto exit;
- }
-
- pack_stats = &card->wr_pack_stats;
-
- if (!pack_stats->packing_events) {
- pr_info("%s: NULL packing_events\n", mmc_hostname(card->host));
- goto exit;
- }
-
- max_num_of_packed_reqs = card->ext_csd.max_packed_writes;
-
- temp_buf = kmalloc(TEMP_BUF_SIZE, GFP_KERNEL);
- if (!temp_buf)
- goto exit;
-
- spin_lock(&pack_stats->lock);
-
- snprintf(temp_buf, TEMP_BUF_SIZE, "%s: write packing statistics:\n",
- mmc_hostname(card->host));
- strlcat(ubuf, temp_buf, cnt);
-
- for (i = 1 ; i <= max_num_of_packed_reqs ; ++i) {
- if (pack_stats->packing_events[i]) {
- snprintf(temp_buf, TEMP_BUF_SIZE,
- "%s: Packed %d reqs - %d times\n",
- mmc_hostname(card->host), i,
- pack_stats->packing_events[i]);
- strlcat(ubuf, temp_buf, cnt);
- }
- }
-
- snprintf(temp_buf, TEMP_BUF_SIZE,
- "%s: stopped packing due to the following reasons:\n",
- mmc_hostname(card->host));
- strlcat(ubuf, temp_buf, cnt);
-
- if (pack_stats->pack_stop_reason[EXCEEDS_SEGMENTS]) {
- snprintf(temp_buf, TEMP_BUF_SIZE,
- "%s: %d times: exceed max num of segments\n",
- mmc_hostname(card->host),
- pack_stats->pack_stop_reason[EXCEEDS_SEGMENTS]);
- strlcat(ubuf, temp_buf, cnt);
- }
- if (pack_stats->pack_stop_reason[EXCEEDS_SECTORS]) {
- snprintf(temp_buf, TEMP_BUF_SIZE,
- "%s: %d times: exceed max num of sectors\n",
- mmc_hostname(card->host),
- pack_stats->pack_stop_reason[EXCEEDS_SECTORS]);
- strlcat(ubuf, temp_buf, cnt);
- }
- if (pack_stats->pack_stop_reason[WRONG_DATA_DIR]) {
- snprintf(temp_buf, TEMP_BUF_SIZE,
- "%s: %d times: wrong data direction\n",
- mmc_hostname(card->host),
- pack_stats->pack_stop_reason[WRONG_DATA_DIR]);
- strlcat(ubuf, temp_buf, cnt);
- }
- if (pack_stats->pack_stop_reason[FLUSH_OR_DISCARD]) {
- snprintf(temp_buf, TEMP_BUF_SIZE,
- "%s: %d times: flush or discard\n",
- mmc_hostname(card->host),
- pack_stats->pack_stop_reason[FLUSH_OR_DISCARD]);
- strlcat(ubuf, temp_buf, cnt);
- }
- if (pack_stats->pack_stop_reason[EMPTY_QUEUE]) {
- snprintf(temp_buf, TEMP_BUF_SIZE,
- "%s: %d times: empty queue\n",
- mmc_hostname(card->host),
- pack_stats->pack_stop_reason[EMPTY_QUEUE]);
- strlcat(ubuf, temp_buf, cnt);
- }
- if (pack_stats->pack_stop_reason[REL_WRITE]) {
- snprintf(temp_buf, TEMP_BUF_SIZE,
- "%s: %d times: rel write\n",
- mmc_hostname(card->host),
- pack_stats->pack_stop_reason[REL_WRITE]);
- strlcat(ubuf, temp_buf, cnt);
- }
- if (pack_stats->pack_stop_reason[THRESHOLD]) {
- snprintf(temp_buf, TEMP_BUF_SIZE,
- "%s: %d times: Threshold\n",
- mmc_hostname(card->host),
- pack_stats->pack_stop_reason[THRESHOLD]);
- strlcat(ubuf, temp_buf, cnt);
- }
-
- spin_unlock(&pack_stats->lock);
-
- kfree(temp_buf);
-
- pr_info("%s", ubuf);
-
-exit:
- if (card->wr_pack_stats.print_in_read == 1) {
- card->wr_pack_stats.print_in_read = 0;
- return strnlen(ubuf, cnt);
- }
-
- return 0;
-}
-
-static ssize_t mmc_wr_pack_stats_write(struct file *filp,
- const char __user *ubuf, size_t cnt,
- loff_t *ppos)
-{
- struct mmc_card *card = filp->private_data;
- int value;
-
- if (!card)
- return cnt;
-
- sscanf(ubuf, "%d", &value);
- if (value) {
- mmc_blk_init_packed_statistics(card);
- } else {
- spin_lock(&card->wr_pack_stats.lock);
- card->wr_pack_stats.enabled = false;
- spin_unlock(&card->wr_pack_stats.lock);
- }
-
- return cnt;
-}
-
-static const struct file_operations mmc_dbg_wr_pack_stats_fops = {
- .open = mmc_wr_pack_stats_open,
- .read = mmc_wr_pack_stats_read,
- .write = mmc_wr_pack_stats_write,
-};
-
void mmc_add_card_debugfs(struct mmc_card *card)
{
struct mmc_host *host = card->host;
@@ -508,12 +350,6 @@
&mmc_dbg_ext_csd_fops))
goto err;
- if (mmc_card_mmc(card) && (card->ext_csd.rev >= 6) &&
- (card->host->caps2 & MMC_CAP2_PACKED_WR))
- if (!debugfs_create_file("wr_pack_stats", S_IRUSR, root, card,
- &mmc_dbg_wr_pack_stats_fops))
- goto err;
-
return;
err:
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index b1b8892..e2172c5 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -463,7 +463,7 @@
}
if (card->ext_csd.rev >= 5) {
- /* check whether the eMMC card support BKOPS */
+ /* check whether the eMMC card supports BKOPS */
if (ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1) {
card->ext_csd.bkops = 1;
card->ext_csd.bkops_en = ext_csd[EXT_CSD_BKOPS_EN];
@@ -474,11 +474,14 @@
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
EXT_CSD_BKOPS_EN, 1, 0);
if (err)
- pr_warning("%s: Enabling BKOPS failed\n",
+ pr_warn("%s: Enabling BKOPS failed\n",
mmc_hostname(card->host));
else
card->ext_csd.bkops_en = 1;
}
+ if (!card->ext_csd.bkops_en)
+ pr_info("%s: BKOPS_EN bit is not set\n",
+ mmc_hostname(card->host));
}
/* check whether the eMMC card supports HPI */
@@ -534,6 +537,7 @@
} else {
card->ext_csd.data_tag_unit_size = 0;
}
+
card->ext_csd.max_packed_writes =
ext_csd[EXT_CSD_MAX_PACKED_WRITES];
card->ext_csd.max_packed_reads =
@@ -1275,9 +1279,10 @@
}
}
- if ((host->caps2 & MMC_CAP2_PACKED_CMD) &&
- (card->ext_csd.max_packed_writes > 0) &&
- (card->ext_csd.max_packed_reads > 0)) {
+ if ((host->caps2 & MMC_CAP2_PACKED_WR &&
+ card->ext_csd.max_packed_writes > 0) ||
+ (host->caps2 & MMC_CAP2_PACKED_RD &&
+ card->ext_csd.max_packed_reads > 0)) {
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
EXT_CSD_EXP_EVENTS_CTRL,
EXT_CSD_PACKED_EVENT_EN,
@@ -1292,24 +1297,6 @@
} else {
card->ext_csd.packed_event_en = 1;
}
-
- }
-
- if (!oldcard) {
- if ((host->caps2 & MMC_CAP2_PACKED_CMD) &&
- (card->ext_csd.max_packed_writes > 0)) {
- /*
- * We would like to keep the statistics in an index
- * that equals the num of packed requests
- * (1 to max_packed_writes)
- */
- card->wr_pack_stats.packing_events = kzalloc(
- (card->ext_csd.max_packed_writes + 1) *
- sizeof(*card->wr_pack_stats.packing_events),
- GFP_KERNEL);
- if (!card->wr_pack_stats.packing_events)
- goto free_card;
- }
}
if (!oldcard)
diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c
index d82c353..4f46ed1 100644
--- a/drivers/mmc/core/mmc_ops.c
+++ b/drivers/mmc/core/mmc_ops.c
@@ -368,18 +368,19 @@
}
/**
- * mmc_switch - modify EXT_CSD register
+ * __mmc_switch - modify EXT_CSD register
* @card: the MMC card associated with the data transfer
* @set: cmd set values
* @index: EXT_CSD register index
* @value: value to program into EXT_CSD register
* @timeout_ms: timeout (ms) for operation performed by register write,
* timeout of zero implies maximum possible timeout
+ * @use_busy_signal: use the busy signal as response type
*
* Modifies the EXT_CSD register for selected card.
*/
-int mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value,
- unsigned int timeout_ms)
+int __mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value,
+ unsigned int timeout_ms, bool use_busy_signal)
{
int err;
struct mmc_command cmd = {0};
@@ -393,20 +394,21 @@
(index << 16) |
(value << 8) |
set;
- cmd.flags = MMC_CMD_AC;
- if (index == EXT_CSD_BKOPS_START &&
- card->ext_csd.raw_bkops_status < EXT_CSD_BKOPS_LEVEL_2)
- cmd.flags |= MMC_RSP_SPI_R1 | MMC_RSP_R1;
- else
+ cmd.flags = MMC_CMD_AC;
+ if (use_busy_signal)
cmd.flags |= MMC_RSP_SPI_R1B | MMC_RSP_R1B;
+ else
+ cmd.flags |= MMC_RSP_SPI_R1 | MMC_RSP_R1;
+
+
cmd.cmd_timeout_ms = timeout_ms;
err = mmc_wait_for_cmd(card->host, &cmd, MMC_CMD_RETRIES);
if (err)
return err;
- /* No need to check card status in case of BKOPS switch*/
- if (index == EXT_CSD_BKOPS_START)
+ /* No need to check card status in case of unblocking command */
+ if (!use_busy_signal)
return 0;
/* Must check status to be sure of no errors */
@@ -433,6 +435,13 @@
return 0;
}
+EXPORT_SYMBOL_GPL(__mmc_switch);
+
+int mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value,
+ unsigned int timeout_ms)
+{
+ return __mmc_switch(card, set, index, value, timeout_ms, true);
+}
EXPORT_SYMBOL_GPL(mmc_switch);
int mmc_send_status(struct mmc_card *card, u32 *status)
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index 52fd5e8..595bc5d 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -79,7 +79,6 @@
#if defined(CONFIG_DEBUG_FS)
static void msmsdcc_dbg_createhost(struct msmsdcc_host *);
static struct dentry *debugfs_dir;
-static struct dentry *debugfs_file;
static int msmsdcc_dbg_init(void);
#endif
@@ -874,6 +873,10 @@
bool ret = true;
u32 xfer_size = data->blksz * data->blocks;
+ if (host->enforce_pio_mode) {
+ ret = false;
+ goto out;
+ }
if (is_sps_mode(host)) {
/*
* BAM Mode: Fall back on PIO if size is less
@@ -892,7 +895,7 @@
/* PIO Mode */
ret = false;
}
-
+ out:
return ret;
}
@@ -1336,34 +1339,41 @@
msmsdcc_data_err(struct msmsdcc_host *host, struct mmc_data *data,
unsigned int status)
{
- if (status & MCI_DATACRCFAIL) {
- if (!(data->mrq->cmd->opcode == MMC_BUS_TEST_W
- || data->mrq->cmd->opcode == MMC_BUS_TEST_R
- || data->mrq->cmd->opcode ==
- MMC_SEND_TUNING_BLOCK_HS200)) {
- pr_err("%s: Data CRC error\n",
- mmc_hostname(host->mmc));
- pr_err("%s: opcode 0x%.8x\n", __func__,
- data->mrq->cmd->opcode);
- pr_err("%s: blksz %d, blocks %d\n", __func__,
- data->blksz, data->blocks);
- data->error = -EILSEQ;
+ if ((status & MCI_DATACRCFAIL) || (status & MCI_DATATIMEOUT)) {
+ u32 opcode = data->mrq->cmd->opcode;
+
+ if (!((!host->tuning_in_progress && opcode == MMC_BUS_TEST_W)
+ || (opcode == MMC_BUS_TEST_R) ||
+ (host->tuning_in_progress &&
+ (opcode == MMC_SEND_TUNING_BLOCK_HS200 ||
+ opcode == MMC_SEND_TUNING_BLOCK)))) {
+ if (status & MCI_DATACRCFAIL) {
+ pr_err("%s: Data CRC error\n",
+ mmc_hostname(host->mmc));
+ pr_err("%s: opcode 0x%.8x\n", __func__, opcode);
+ pr_err("%s: blksz %d, blocks %d\n", __func__,
+ data->blksz, data->blocks);
+ } else {
+ pr_err("%s: CMD%d: Data timeout. DAT0 => %d\n",
+ mmc_hostname(host->mmc), opcode,
+ (readl_relaxed(host->base
+ + MCI_TEST_INPUT) & 0x2) ? 1 : 0);
+ msmsdcc_dump_sdcc_state(host);
+ }
}
- } else if (status & MCI_DATATIMEOUT) {
- /* CRC is optional for the bus test commands, not all
+
+ /*
+ * CRC is optional for the bus test commands, not all
* cards respond back with CRC. However controller
* waits for the CRC and times out. Hence ignore the
* data timeouts during the Bustest.
*/
- if (!(data->mrq->cmd->opcode == MMC_BUS_TEST_W
- || data->mrq->cmd->opcode == MMC_BUS_TEST_R)) {
- pr_err("%s: CMD%d: Data timeout. DAT0 => %d\n",
- mmc_hostname(host->mmc),
- data->mrq->cmd->opcode,
- (readl_relaxed(host->base
- + MCI_TEST_INPUT) & 0x2) ? 1 : 0);
- data->error = -ETIMEDOUT;
- msmsdcc_dump_sdcc_state(host);
+ if (!((!host->tuning_in_progress && opcode == MMC_BUS_TEST_W)
+ || (opcode == MMC_BUS_TEST_R))) {
+ if (status & MCI_DATACRCFAIL)
+ data->error = -EILSEQ;
+ else
+ data->error = -ETIMEDOUT;
}
} else if (status & MCI_RXOVERRUN) {
pr_err("%s: RX overrun\n", mmc_hostname(host->mmc));
@@ -1769,6 +1779,7 @@
msmsdcc_irq(int irq, void *dev_id)
{
struct msmsdcc_host *host = dev_id;
+ struct mmc_host *mmc = host->mmc;
u32 status;
int ret = 0;
int timer = 0;
@@ -1810,6 +1821,12 @@
*/
wake_lock(&host->sdio_wlock);
} else {
+ if (!mmc->card || !mmc_card_sdio(mmc->card)) {
+ WARN(1, "%s: SDCC core interrupt received for non-SDIO cards when SDCC clocks are off\n",
+ mmc_hostname(mmc));
+ ret = 1;
+ break;
+ }
spin_unlock(&host->lock);
mmc_signal_sdio_irq(host->mmc);
spin_lock(&host->lock);
@@ -1838,6 +1855,12 @@
#endif
if (status & MCI_SDIOINTROPE) {
+ if (!mmc->card || mmc_card_sdio(mmc->card)) {
+ WARN(1, "%s: SDIO interrupt received for non-SDIO card\n",
+ mmc_hostname(mmc));
+ ret = 1;
+ break;
+ }
if (host->sdcc_suspending)
wake_lock(&host->sdio_suspend_wlock);
spin_unlock(&host->lock);
@@ -2387,7 +2410,8 @@
curr_slot = host->plat->vreg_data;
if (!curr_slot) {
- rc = -EINVAL;
+ pr_debug("%s: vreg info unavailable, assuming the slot is powered by always on domain\n",
+ mmc_hostname(host->mmc));
goto out;
}
@@ -2815,6 +2839,14 @@
msmsdcc_set_vdd_io_vol(host, VDD_IO_LOW, 0);
msmsdcc_update_io_pad_pwr_switch(host);
msmsdcc_setup_pins(host, false);
+ /*
+ * Reset the mask to prevent hitting any pending interrupts
+ * after powering up the card again.
+ */
+ if (atomic_read(&host->clks_on)) {
+ writel_relaxed(0, host->base + MMCIMASK0);
+ mb();
+ }
break;
case MMC_POWER_UP:
/* writing PWR_UP bit is redundant */
@@ -3456,7 +3488,6 @@
{
struct device *dev = mmc->parent;
struct msmsdcc_host *host = mmc_priv(mmc);
- unsigned long flags;
int rc = 0;
msmsdcc_pm_qos_update_latency(host, 1);
@@ -3490,7 +3521,6 @@
static int msmsdcc_disable(struct mmc_host *mmc)
{
struct msmsdcc_host *host = mmc_priv(mmc);
- unsigned long flags;
int rc = 0;
msmsdcc_pm_qos_update_latency(host, 0);
@@ -4799,7 +4829,7 @@
struct msmsdcc_host *host = mmc_priv(mmc);
return snprintf(buf, PAGE_SIZE, "%u (Min 5 sec)\n",
- host->idle_tout_ms / 1000);
+ host->idle_tout / 1000);
}
static ssize_t
@@ -4814,7 +4844,7 @@
if (!kstrtou32(buf, 0, &timeout)
&& (timeout > MSM_MMC_DEFAULT_IDLE_TIMEOUT / 1000)) {
spin_lock_irqsave(&host->lock, flags);
- host->idle_tout_ms = timeout * 1000;
+ host->idle_tout = timeout * 1000;
spin_unlock_irqrestore(&host->lock, flags);
}
return count;
@@ -5794,17 +5824,15 @@
mmc->caps |= (MMC_CAP_SET_XPC_330 | MMC_CAP_SET_XPC_300 |
MMC_CAP_SET_XPC_180);
- mmc->caps2 |= MMC_CAP2_PACKED_WR;
- mmc->caps2 |= MMC_CAP2_PACKED_WR_CONTROL;
mmc->caps2 |= (MMC_CAP2_BOOTPART_NOACC | MMC_CAP2_DETECT_ON_ERR);
mmc->caps2 |= MMC_CAP2_SANITIZE;
+ mmc->caps2 |= MMC_CAP2_CACHE_CTRL;
+ mmc->caps2 |= MMC_CAP2_INIT_BKOPS;
if (plat->nonremovable)
mmc->caps |= MMC_CAP_NONREMOVABLE;
mmc->caps |= MMC_CAP_SDIO_IRQ;
- mmc->caps2 |= MMC_CAP2_INIT_BKOPS | MMC_CAP2_BKOPS;
-
if (plat->is_sdio_al_client)
mmc->pm_flags |= MMC_PM_IGNORE_PM_NOTIFY;
@@ -5941,7 +5969,7 @@
pm_runtime_enable(&(pdev)->dev);
}
#endif
- host->idle_tout_ms = MSM_MMC_DEFAULT_IDLE_TIMEOUT;
+ host->idle_tout = MSM_MMC_DEFAULT_IDLE_TIMEOUT;
setup_timer(&host->req_tout_timer, msmsdcc_req_tout_timer_hdlr,
(unsigned long)host);
@@ -6120,6 +6148,16 @@
return ret;
}
+#ifdef CONFIG_DEBUG_FS
+static void msmsdcc_remove_debugfs(struct msmsdcc_host *host)
+{
+ debugfs_remove_recursive(host->debugfs_host_dir);
+ host->debugfs_host_dir = NULL;
+}
+#else
+static void msmsdcc_remove_debugfs(msmsdcc_host *host) {}
+#endif
+
static int msmsdcc_remove(struct platform_device *pdev)
{
struct mmc_host *mmc = mmc_get_drvdata(pdev);
@@ -6146,6 +6184,8 @@
device_remove_file(&pdev->dev, &host->polling);
device_remove_file(&pdev->dev, &host->idle_timeout);
+ msmsdcc_remove_debugfs(host);
+
del_timer_sync(&host->req_tout_timer);
tasklet_kill(&host->dma_tlet);
tasklet_kill(&host->sps.tlet);
@@ -6322,6 +6362,23 @@
}
#endif
+#if CONFIG_DEBUG_FS
+static void msmsdcc_print_pm_stats(struct msmsdcc_host *host, ktime_t start,
+ const char *func)
+{
+ ktime_t diff;
+
+ if (host->print_pm_stats) {
+ diff = ktime_sub(ktime_get(), start);
+ pr_info("%s: %s: Completed in %llu usec\n", func,
+ mmc_hostname(host->mmc), (u64)ktime_to_us(diff));
+ }
+}
+#else
+static void msmsdcc_print_pm_stats(struct msmsdcc_host *host, ktime_t start,
+ const char *func) {}
+#endif
+
static int
msmsdcc_runtime_suspend(struct device *dev)
{
@@ -6329,6 +6386,7 @@
struct msmsdcc_host *host = mmc_priv(mmc);
int rc = 0;
unsigned long flags;
+ ktime_t start = ktime_get();
if (host->plat->is_sdio_al_client) {
rc = 0;
@@ -6385,6 +6443,7 @@
out:
/* set bus bandwidth to 0 immediately */
msmsdcc_msm_bus_cancel_work_and_set_vote(host, NULL);
+ msmsdcc_print_pm_stats(host, start, __func__);
return rc;
}
@@ -6394,9 +6453,10 @@
struct mmc_host *mmc = dev_get_drvdata(dev);
struct msmsdcc_host *host = mmc_priv(mmc);
unsigned long flags;
+ ktime_t start = ktime_get();
if (host->plat->is_sdio_al_client)
- return 0;
+ goto out;
pr_debug("%s: %s: start\n", mmc_hostname(mmc), __func__);
if (mmc) {
@@ -6431,6 +6491,8 @@
}
host->pending_resume = false;
pr_debug("%s: %s: end\n", mmc_hostname(mmc), __func__);
+out:
+ msmsdcc_print_pm_stats(host, start, __func__);
return 0;
}
@@ -6443,7 +6505,7 @@
return 0;
/* Idle timeout is not configurable for now */
- pm_schedule_suspend(dev, host->idle_tout_ms);
+ pm_schedule_suspend(dev, host->idle_tout);
return -EAGAIN;
}
@@ -6453,17 +6515,19 @@
struct mmc_host *mmc = dev_get_drvdata(dev);
struct msmsdcc_host *host = mmc_priv(mmc);
int rc = 0;
+ ktime_t start = ktime_get();
- if (host->plat->is_sdio_al_client)
- return 0;
-
-
+ if (host->plat->is_sdio_al_client) {
+ rc = 0;
+ goto out;
+ }
if (host->plat->status_irq)
disable_irq(host->plat->status_irq);
if (!pm_runtime_suspended(dev))
rc = msmsdcc_runtime_suspend(dev);
-
+ out:
+ msmsdcc_print_pm_stats(host, start, __func__);
return rc;
}
@@ -6496,10 +6560,12 @@
struct mmc_host *mmc = dev_get_drvdata(dev);
struct msmsdcc_host *host = mmc_priv(mmc);
int rc = 0;
+ ktime_t start = ktime_get();
- if (host->plat->is_sdio_al_client)
- return 0;
-
+ if (host->plat->is_sdio_al_client) {
+ rc = 0;
+ goto out;
+ }
if (mmc->card && mmc_card_sdio(mmc->card))
rc = msmsdcc_runtime_resume(dev);
/*
@@ -6515,7 +6581,8 @@
msmsdcc_check_status((unsigned long)host);
enable_irq(host->plat->status_irq);
}
-
+out:
+ msmsdcc_print_pm_stats(host, start, __func__);
return rc;
}
@@ -6589,7 +6656,6 @@
platform_driver_unregister(&msmsdcc_driver);
#if defined(CONFIG_DEBUG_FS)
- debugfs_remove(debugfs_file);
debugfs_remove(debugfs_dir);
#endif
}
@@ -6601,59 +6667,128 @@
MODULE_LICENSE("GPL");
#if defined(CONFIG_DEBUG_FS)
-
-static int
-msmsdcc_dbg_state_open(struct inode *inode, struct file *file)
+static int msmsdcc_dbg_idle_tout_get(void *data, u64 *val)
{
- file->private_data = inode->i_private;
+ struct msmsdcc_host *host = data;
+
+ *val = host->idle_tout / 1000L;
return 0;
}
-static ssize_t
-msmsdcc_dbg_state_read(struct file *file, char __user *ubuf,
- size_t count, loff_t *ppos)
+static int msmsdcc_dbg_idle_tout_set(void *data, u64 val)
{
- struct msmsdcc_host *host = (struct msmsdcc_host *) file->private_data;
- char buf[200];
- int max, i;
+ struct msmsdcc_host *host = data;
+ unsigned long flags;
- i = 0;
- max = sizeof(buf) - 1;
+ spin_lock_irqsave(&host->lock, flags);
+ host->idle_tout = (u32)val * 1000;
+ spin_unlock_irqrestore(&host->lock, flags);
- i += scnprintf(buf + i, max - i, "STAT: %p %p %p\n", host->curr.mrq,
- host->curr.cmd, host->curr.data);
- if (host->curr.cmd) {
- struct mmc_command *cmd = host->curr.cmd;
-
- i += scnprintf(buf + i, max - i, "CMD : %.8x %.8x %.8x\n",
- cmd->opcode, cmd->arg, cmd->flags);
- }
- if (host->curr.data) {
- struct mmc_data *data = host->curr.data;
- i += scnprintf(buf + i, max - i,
- "DAT0: %.8x %.8x %.8x %.8x %.8x %.8x\n",
- data->timeout_ns, data->timeout_clks,
- data->blksz, data->blocks, data->error,
- data->flags);
- i += scnprintf(buf + i, max - i, "DAT1: %.8x %.8x %.8x %p\n",
- host->curr.xfer_size, host->curr.xfer_remain,
- host->curr.data_xfered, host->dma.sg);
- }
-
- return simple_read_from_buffer(ubuf, count, ppos, buf, i);
+ return 0;
}
-static const struct file_operations msmsdcc_dbg_state_ops = {
- .read = msmsdcc_dbg_state_read,
- .open = msmsdcc_dbg_state_open,
-};
+DEFINE_SIMPLE_ATTRIBUTE(msmsdcc_dbg_idle_tout_ops,
+ msmsdcc_dbg_idle_tout_get,
+ msmsdcc_dbg_idle_tout_set,
+ "%llu\n");
+
+static int msmsdcc_dbg_pio_mode_get(void *data, u64 *val)
+{
+ struct msmsdcc_host *host = data;
+
+ *val = (u64) host->enforce_pio_mode;
+ return 0;
+}
+
+static int msmsdcc_dbg_pio_mode_set(void *data, u64 val)
+{
+ struct msmsdcc_host *host = data;
+ unsigned long flags;
+
+ spin_lock_irqsave(&host->lock, flags);
+ host->enforce_pio_mode = !!val;
+ spin_unlock_irqrestore(&host->lock, flags);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(msmsdcc_dbg_pio_mode_ops,
+ msmsdcc_dbg_pio_mode_get,
+ msmsdcc_dbg_pio_mode_set,
+ "%llu\n");
+
+static int msmsdcc_dbg_pm_stats_get(void *data, u64 *val)
+{
+ struct msmsdcc_host *host = data;
+
+ *val = !!host->print_pm_stats;
+ return 0;
+}
+
+static int msmsdcc_dbg_pm_stats_set(void *data, u64 val)
+{
+ struct msmsdcc_host *host = data;
+ unsigned long flags;
+
+ spin_lock_irqsave(&host->lock, flags);
+ host->print_pm_stats = !!val;
+ spin_unlock_irqrestore(&host->lock, flags);
+
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(msmsdcc_dbg_pm_stats_ops,
+ msmsdcc_dbg_pm_stats_get,
+ msmsdcc_dbg_pm_stats_set,
+ "%llu\n");
static void msmsdcc_dbg_createhost(struct msmsdcc_host *host)
{
- if (debugfs_dir) {
- debugfs_file = debugfs_create_file(mmc_hostname(host->mmc),
- 0644, debugfs_dir, host,
- &msmsdcc_dbg_state_ops);
+ int err = 0;
+
+ if (!debugfs_dir)
+ return;
+
+ host->debugfs_host_dir = debugfs_create_dir(
+ mmc_hostname(host->mmc), debugfs_dir);
+ if (IS_ERR(host->debugfs_host_dir)) {
+ err = PTR_ERR(host->debugfs_host_dir);
+ host->debugfs_host_dir = NULL;
+ pr_err("%s: Failed to create debugfs dir for host with err=%d\n",
+ mmc_hostname(host->mmc), err);
+ return;
+ }
+
+ host->debugfs_idle_tout = debugfs_create_file("idle_tout",
+ S_IRUSR | S_IWUSR, host->debugfs_host_dir, host,
+ &msmsdcc_dbg_idle_tout_ops);
+
+ if (IS_ERR(host->debugfs_idle_tout)) {
+ err = PTR_ERR(host->debugfs_idle_tout);
+ host->debugfs_idle_tout = NULL;
+ pr_err("%s: Failed to create idle_tout debugfs entry with err=%d\n",
+ mmc_hostname(host->mmc), err);
+ }
+
+ host->debugfs_pio_mode = debugfs_create_file("pio_mode",
+ S_IRUSR | S_IWUSR, host->debugfs_host_dir, host,
+ &msmsdcc_dbg_pio_mode_ops);
+
+ if (IS_ERR(host->debugfs_pio_mode)) {
+ err = PTR_ERR(host->debugfs_pio_mode);
+ host->debugfs_pio_mode = NULL;
+ pr_err("%s: Failed to create pio_mode debugfs entry with err=%d\n",
+ mmc_hostname(host->mmc), err);
+ }
+
+ host->debugfs_pm_stats = debugfs_create_file("pm_stats",
+ S_IRUSR | S_IWUSR, host->debugfs_host_dir, host,
+ &msmsdcc_dbg_pm_stats_ops);
+ if (IS_ERR(host->debugfs_pm_stats)) {
+ err = PTR_ERR(host->debugfs_pm_stats);
+ host->debugfs_pm_stats = NULL;
+ pr_err("%s: Failed to create pm_stats debugfs entry with err=%d\n",
+ mmc_hostname(host->mmc), err);
}
}
@@ -6661,7 +6796,7 @@
{
int err;
- debugfs_dir = debugfs_create_dir("msmsdcc", 0);
+ debugfs_dir = debugfs_create_dir("msm_sdcc", 0);
if (IS_ERR(debugfs_dir)) {
err = PTR_ERR(debugfs_dir);
debugfs_dir = NULL;
diff --git a/drivers/mmc/host/msm_sdcc.h b/drivers/mmc/host/msm_sdcc.h
index 5779491..c66d1a5 100644
--- a/drivers/mmc/host/msm_sdcc.h
+++ b/drivers/mmc/host/msm_sdcc.h
@@ -414,14 +414,20 @@
bool sdio_wakeupirq_disabled;
struct mutex clk_mutex;
bool pending_resume;
- unsigned int idle_tout_ms; /* Timeout in msecs */
+ unsigned int idle_tout; /* Timeout in msecs */
bool pending_dpsm_reset;
+ bool enforce_pio_mode;
+ bool print_pm_stats;
struct msmsdcc_msm_bus_vote msm_bus_vote;
struct device_attribute max_bus_bw;
struct device_attribute polling;
struct device_attribute idle_timeout;
struct device_attribute auto_cmd19_attr;
struct device_attribute auto_cmd21_attr;
+ struct dentry *debugfs_host_dir;
+ struct dentry *debugfs_idle_tout;
+ struct dentry *debugfs_pio_mode;
+ struct dentry *debugfs_pm_stats;
};
#define MSMSDCC_VERSION_STEP_MASK 0x0000FFFF
@@ -483,7 +489,7 @@
if ((step == 0x18) && (minor >= 3))
host->hw_caps |= MSMSDCC_AUTO_CMD21;
- if (version >= 0x2b) /* SDCC v4 2.1.0 and greater */
+ if (step >= 0x2b) /* SDCC v4 2.1.0 and greater */
host->hw_caps |= MSMSDCC_SW_RST | MSMSDCC_AUTO_CMD21;
}
diff --git a/drivers/net/ethernet/msm/msm_rmnet.c b/drivers/net/ethernet/msm/msm_rmnet.c
index 61df241..41ad8af 100644
--- a/drivers/net/ethernet/msm/msm_rmnet.c
+++ b/drivers/net/ethernet/msm/msm_rmnet.c
@@ -501,16 +501,10 @@
static int __rmnet_close(struct net_device *dev)
{
struct rmnet_private *p = netdev_priv(dev);
- int rc;
- unsigned long flags;
- if (p->ch) {
- rc = smd_close(p->ch);
- spin_lock_irqsave(&p->lock, flags);
- p->ch = 0;
- spin_unlock_irqrestore(&p->lock, flags);
- return rc;
- } else
+ if (p->ch)
+ return 0;
+ else
return -EBADF;
}
@@ -529,12 +523,9 @@
static int rmnet_stop(struct net_device *dev)
{
- struct rmnet_private *p = netdev_priv(dev);
-
DBG0("[%s] rmnet_stop()\n", dev->name);
netif_stop_queue(dev);
- tasklet_kill(&p->tsklt);
/* TODO: unload modem safely,
currently, this causes unnecessary unloads */
diff --git a/drivers/net/ethernet/msm/msm_rmnet_smux.c b/drivers/net/ethernet/msm/msm_rmnet_smux.c
index fbb3489..5f29406 100644
--- a/drivers/net/ethernet/msm/msm_rmnet_smux.c
+++ b/drivers/net/ethernet/msm/msm_rmnet_smux.c
@@ -79,6 +79,7 @@
unsigned long timeout_us;
#endif
spinlock_t lock;
+ spinlock_t tx_queue_lock;
struct tasklet_struct tsklt;
/* IOCTL specified mode (protocol, QoS header) */
u32 operation_mode;
@@ -346,12 +347,15 @@
((struct net_device *)(dev))->name, p->stats.tx_packets,
skb->len, skb->mark);
dev_kfree_skb_any(skb);
+
+ spin_lock_irqsave(&p->tx_queue_lock, flags);
if (netif_queue_stopped(dev) &&
msm_smux_is_ch_low(p->ch_id)) {
DBG0("%s: Low WM hit, waking queue=%p\n",
__func__, skb);
netif_wake_queue(dev);
}
+ spin_unlock_irqrestore(&p->tx_queue_lock, flags);
}
void rmnet_smux_notify(void *priv, int event_type, const void *metadata)
@@ -475,14 +479,20 @@
case SMUX_LOW_WM_HIT:
dev = priv;
+ p = netdev_priv(priv);
DBG0("[%s] Low WM hit dev:%s\n", __func__, dev->name);
+ spin_lock_irqsave(&p->tx_queue_lock, flags);
netif_start_queue(dev);
+ spin_unlock_irqrestore(&p->tx_queue_lock, flags);
break;
case SMUX_HIGH_WM_HIT:
dev = priv;
- DBG0("[%s] Low WM hit dev:%s\n", __func__, dev->name);
+ p = netdev_priv(priv);
+ DBG0("[%s] High WM hit dev:%s\n", __func__, dev->name);
+ spin_lock_irqsave(&p->tx_queue_lock, flags);
netif_stop_queue(dev);
+ spin_unlock_irqrestore(&p->tx_queue_lock, flags);
break;
default:
@@ -573,7 +583,6 @@
static int _rmnet_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct rmnet_private *p = netdev_priv(dev);
- int smux_ret;
struct QMI_QOS_HDR_S *qmih;
u32 opmode;
unsigned long flags;
@@ -593,21 +602,13 @@
dev->trans_start = jiffies;
- /* if write() succeeds, skb access is unsafe in this process */
- smux_ret = msm_smux_write(p->ch_id, skb, skb->data, skb->len);
-
- if (smux_ret != 0 && smux_ret != -EAGAIN) {
- pr_err("[%s] %s: write returned error %d",
- dev->name, __func__, smux_ret);
- return -EPERM;
- }
-
- return smux_ret;
+ return msm_smux_write(p->ch_id, skb, skb->data, skb->len);
}
static int rmnet_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct rmnet_private *p = netdev_priv(dev);
+ unsigned long flags;
int ret = 0;
if (netif_queue_stopped(dev) || (p->device_state == DEVICE_INACTIVE)) {
@@ -616,17 +617,10 @@
return 0;
}
+ spin_lock_irqsave(&p->tx_queue_lock, flags);
ret = _rmnet_xmit(skb, dev);
- if (ret == -EPERM) {
- /* Do not stop the queue here.
- * It will lead to ir-recoverable state.
- */
- ret = NETDEV_TX_BUSY;
- goto exit;
- }
-
- if (msm_smux_is_ch_full(p->ch_id) || (ret == -EAGAIN)) {
+ if (ret == -EAGAIN) {
/*
* EAGAIN means we attempted to overflow the high watermark
* Clearly the queue is not stopped like it should be, so
@@ -636,9 +630,9 @@
*/
netif_stop_queue(dev);
ret = NETDEV_TX_BUSY;
- goto exit;
}
-exit:
+ spin_unlock_irqrestore(&p->tx_queue_lock, flags);
+
return ret;
}
@@ -892,6 +886,7 @@
p->ch_id = n;
p->in_reset = 0;
spin_lock_init(&p->lock);
+ spin_lock_init(&p->tx_queue_lock);
#ifdef CONFIG_MSM_RMNET_DEBUG
p->timeout_us = timeout_us;
p->wakeups_xmit = p->wakeups_rcv = 0;
diff --git a/drivers/net/usb/rmnet_usb_ctrl.c b/drivers/net/usb/rmnet_usb_ctrl.c
index ba16ed9..7ed8ffa 100644
--- a/drivers/net/usb/rmnet_usb_ctrl.c
+++ b/drivers/net/usb/rmnet_usb_ctrl.c
@@ -122,6 +122,55 @@
return 0;
}
+static void get_encap_work(struct work_struct *w)
+{
+ struct usb_device *udev;
+ struct rmnet_ctrl_dev *dev =
+ container_of(w, struct rmnet_ctrl_dev, get_encap_work);
+ int status;
+
+ udev = interface_to_usbdev(dev->intf);
+
+ status = usb_autopm_get_interface(dev->intf);
+ if (status < 0 && status != -EAGAIN && status != -EACCES) {
+ dev->get_encap_failure_cnt++;
+ return;
+ }
+
+ usb_fill_control_urb(dev->rcvurb, udev,
+ usb_rcvctrlpipe(udev, 0),
+ (unsigned char *)dev->in_ctlreq,
+ dev->rcvbuf,
+ DEFAULT_READ_URB_LENGTH,
+ resp_avail_cb, dev);
+
+
+ usb_anchor_urb(dev->rcvurb, &dev->rx_submitted);
+ status = usb_submit_urb(dev->rcvurb, GFP_KERNEL);
+ if (status) {
+ dev->get_encap_failure_cnt++;
+ usb_unanchor_urb(dev->rcvurb);
+ usb_autopm_put_interface(dev->intf);
+ dev_err(dev->devicep,
+ "%s: Error submitting Read URB %d\n", __func__, status);
+ goto resubmit_int_urb;
+ }
+
+ return;
+
+resubmit_int_urb:
+ /*check if it is already submitted in resume*/
+ if (!dev->inturb->anchor) {
+ usb_anchor_urb(dev->inturb, &dev->rx_submitted);
+ status = usb_submit_urb(dev->inturb, GFP_KERNEL);
+ if (status) {
+ usb_unanchor_urb(dev->inturb);
+ dev_err(dev->devicep, "%s: Error re-submitting Int URB %d\n",
+ __func__, status);
+ }
+ }
+}
+
static void notification_available_cb(struct urb *urb)
{
int status;
@@ -133,12 +182,13 @@
switch (urb->status) {
case 0:
+ /*if non zero lenght of data received while unlink*/
+ case -ENOENT:
/*success*/
break;
/*do not resubmit*/
case -ESHUTDOWN:
- case -ENOENT:
case -ECONNRESET:
case -EPROTO:
return;
@@ -156,26 +206,17 @@
goto resubmit_int_urb;
}
+ if (!urb->actual_length)
+ return;
+
ctrl = urb->transfer_buffer;
switch (ctrl->bNotificationType) {
case USB_CDC_NOTIFY_RESPONSE_AVAILABLE:
dev->resp_avail_cnt++;
- usb_fill_control_urb(dev->rcvurb, udev,
- usb_rcvctrlpipe(udev, 0),
- (unsigned char *)dev->in_ctlreq,
- dev->rcvbuf,
- DEFAULT_READ_URB_LENGTH,
- resp_avail_cb, dev);
-
- status = usb_submit_urb(dev->rcvurb, GFP_ATOMIC);
- if (status) {
- dev_err(dev->devicep,
- "%s: Error submitting Read URB %d\n", __func__, status);
- goto resubmit_int_urb;
- }
usb_mark_last_busy(udev);
+ queue_work(dev->wq, &dev->get_encap_work);
if (!dev->resp_available) {
dev->resp_available = true;
@@ -189,10 +230,13 @@
}
resubmit_int_urb:
+ usb_anchor_urb(urb, &dev->rx_submitted);
status = usb_submit_urb(urb, GFP_ATOMIC);
- if (status)
+ if (status) {
+ usb_unanchor_urb(urb);
dev_err(dev->devicep, "%s: Error re-submitting Int URB %d\n",
__func__, status);
+ }
return;
}
@@ -208,6 +252,8 @@
udev = interface_to_usbdev(dev->intf);
+ usb_autopm_put_interface_async(dev->intf);
+
switch (urb->status) {
case 0:
/*success*/
@@ -263,41 +309,41 @@
wake_up(&dev->read_wait_queue);
resubmit_int_urb:
- /*re-submit int urb to check response available*/
- usb_mark_last_busy(udev);
- status = usb_submit_urb(dev->inturb, GFP_ATOMIC);
- if (status)
- dev_err(dev->devicep, "%s: Error re-submitting Int URB %d\n",
- __func__, status);
+ /*check if it is already submitted in resume*/
+ if (!dev->inturb->anchor) {
+ usb_mark_last_busy(udev);
+ usb_anchor_urb(dev->inturb, &dev->rx_submitted);
+ status = usb_submit_urb(dev->inturb, GFP_ATOMIC);
+ if (status) {
+ usb_unanchor_urb(dev->inturb);
+ dev_err(dev->devicep, "%s: Error re-submitting Int URB %d\n",
+ __func__, status);
+ }
+ }
}
int rmnet_usb_ctrl_start_rx(struct rmnet_ctrl_dev *dev)
{
int retval = 0;
+ usb_anchor_urb(dev->inturb, &dev->rx_submitted);
retval = usb_submit_urb(dev->inturb, GFP_KERNEL);
- if (retval < 0)
- dev_err(dev->devicep, "%s Intr submit %d\n", __func__, retval);
+ if (retval < 0) {
+ usb_unanchor_urb(dev->inturb);
+ dev_err(dev->devicep, "%s Intr submit %d\n", __func__,
+ retval);
+ }
return retval;
}
-int rmnet_usb_ctrl_stop_rx(struct rmnet_ctrl_dev *dev)
+int rmnet_usb_ctrl_suspend(struct rmnet_ctrl_dev *dev)
{
- if (!is_dev_connected(dev)) {
- dev_dbg(dev->devicep, "%s: Ctrl device disconnected\n",
- __func__);
- return -ENODEV;
- }
-
- dev_dbg(dev->devicep, "%s\n", __func__);
-
- usb_kill_urb(dev->rcvurb);
- usb_kill_urb(dev->inturb);
+ if (!flush_work_sync(&dev->get_encap_work))
+ usb_kill_anchored_urbs(&dev->rx_submitted);
return 0;
}
-
static int rmnet_usb_ctrl_alloc_rx(struct rmnet_ctrl_dev *dev)
{
int retval = -ENOMEM;
@@ -826,7 +872,6 @@
void rmnet_usb_ctrl_disconnect(struct rmnet_ctrl_dev *dev)
{
- rmnet_usb_ctrl_stop_rx(dev);
mutex_lock(&dev->dev_lock);
@@ -839,13 +884,16 @@
wake_up(&dev->read_wait_queue);
+ cancel_work_sync(&dev->get_encap_work);
+
+ usb_kill_anchored_urbs(&dev->tx_submitted);
+ usb_kill_anchored_urbs(&dev->rx_submitted);
+
usb_free_urb(dev->inturb);
dev->inturb = NULL;
kfree(dev->intbuf);
dev->intbuf = NULL;
-
- usb_kill_anchored_urbs(&dev->tx_submitted);
}
#if defined(CONFIG_DEBUG_FS)
@@ -879,6 +927,7 @@
"cbits_tomdm: %d\n"
"mdm_wait_timeout: %u\n"
"zlp_cnt: %u\n"
+ "get_encap_failure_cnt %u\n"
"dev opened: %s\n",
dev, dev->name,
dev->snd_encap_cmd_cnt,
@@ -890,6 +939,7 @@
dev->cbits_tomdm,
dev->mdm_wait_timeout,
dev->zlp_cnt,
+ dev->get_encap_failure_cnt,
dev->is_opened ? "OPEN" : "CLOSE");
}
@@ -968,12 +1018,21 @@
/*for debug purpose*/
snprintf(dev->name, CTRL_DEV_MAX_LEN, "hsicctl%d", n);
+ dev->wq = create_singlethread_workqueue(dev->name);
+ if (!dev->wq) {
+ pr_err("unable to allocate workqueue");
+ kfree(dev);
+ goto error0;
+ }
+
mutex_init(&dev->dev_lock);
spin_lock_init(&dev->rx_lock);
init_waitqueue_head(&dev->read_wait_queue);
init_waitqueue_head(&dev->open_wait_queue);
INIT_LIST_HEAD(&dev->rx_list);
init_usb_anchor(&dev->tx_submitted);
+ init_usb_anchor(&dev->rx_submitted);
+ INIT_WORK(&dev->get_encap_work, get_encap_work);
status = rmnet_usb_ctrl_alloc_rx(dev);
if (status < 0) {
@@ -1074,6 +1133,7 @@
device_remove_file(ctrl_dev[i]->devicep, &dev_attr_modem_wait);
#endif
cdev_del(&ctrl_dev[i]->cdev);
+ destroy_workqueue(ctrl_dev[i]->wq);
kfree(ctrl_dev[i]);
ctrl_dev[i] = NULL;
device_destroy(ctrldev_classp, MKDEV(MAJOR(ctrldev_num), i));
diff --git a/drivers/net/usb/rmnet_usb_ctrl.h b/drivers/net/usb/rmnet_usb_ctrl.h
index 7a84817..a8f8079 100644
--- a/drivers/net/usb/rmnet_usb_ctrl.h
+++ b/drivers/net/usb/rmnet_usb_ctrl.h
@@ -34,6 +34,7 @@
struct urb *rcvurb;
struct urb *inturb;
struct usb_anchor tx_submitted;
+ struct usb_anchor rx_submitted;
void *rcvbuf;
void *intbuf;
struct usb_ctrlrequest *in_ctlreq;
@@ -44,6 +45,9 @@
wait_queue_head_t read_wait_queue;
wait_queue_head_t open_wait_queue;
+ struct workqueue_struct *wq;
+ struct work_struct get_encap_work;
+
unsigned is_opened;
bool is_connected;
@@ -66,6 +70,7 @@
unsigned int snd_encap_cmd_cnt;
unsigned int get_encap_resp_cnt;
unsigned int resp_avail_cnt;
+ unsigned int get_encap_failure_cnt;
unsigned int set_ctrl_line_state_cnt;
unsigned int tx_ctrl_err_cnt;
unsigned int zlp_cnt;
@@ -74,7 +79,7 @@
extern struct rmnet_ctrl_dev *ctrl_dev[];
extern int rmnet_usb_ctrl_start_rx(struct rmnet_ctrl_dev *);
-extern int rmnet_usb_ctrl_stop_rx(struct rmnet_ctrl_dev *);
+extern int rmnet_usb_ctrl_suspend(struct rmnet_ctrl_dev *dev);
extern int rmnet_usb_ctrl_init(void);
extern void rmnet_usb_ctrl_exit(void);
extern int rmnet_usb_ctrl_probe(struct usb_interface *intf,
diff --git a/drivers/net/usb/rmnet_usb_data.c b/drivers/net/usb/rmnet_usb_data.c
index b8c6140..17ff067 100644
--- a/drivers/net/usb/rmnet_usb_data.c
+++ b/drivers/net/usb/rmnet_usb_data.c
@@ -87,7 +87,6 @@
{
struct usbnet *unet;
struct rmnet_ctrl_dev *dev;
- int time = 0;
int retval = 0;
unet = usb_get_intfdata(iface);
@@ -107,19 +106,12 @@
retval = usbnet_suspend(iface, message);
if (!retval) {
- if (message.event & PM_EVENT_SUSPEND) {
- time = usb_wait_anchor_empty_timeout(&dev->tx_submitted,
- 1000);
- if (!time)
- usb_kill_anchored_urbs(&dev->tx_submitted);
-
- retval = rmnet_usb_ctrl_stop_rx(dev);
- iface->dev.power.power_state.event = message.event;
- }
- /* TBD : do we need to set/clear usbnet->udev->reset_resume*/
- } else
+ retval = rmnet_usb_ctrl_suspend(dev);
+ iface->dev.power.power_state.event = message.event;
+ } else {
dev_dbg(&iface->dev,
"%s: device is busy can not suspend\n", __func__);
+ }
fail:
return retval;
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c
index 1867fe2..6de0a77 100644
--- a/drivers/net/usb/usbnet.c
+++ b/drivers/net/usb/usbnet.c
@@ -1529,6 +1529,7 @@
spin_lock_irq(&dev->txq.lock);
/* don't autosuspend while transmitting */
if (dev->txq.qlen && PMSG_IS_AUTO(message)) {
+ dev->suspend_count--;
spin_unlock_irq(&dev->txq.lock);
return -EBUSY;
} else {
diff --git a/drivers/net/wireless/wcnss/wcnss_wlan.c b/drivers/net/wireless/wcnss/wcnss_wlan.c
index ac0a2fd..2bf857c 100644
--- a/drivers/net/wireless/wcnss/wcnss_wlan.c
+++ b/drivers/net/wireless/wcnss/wcnss_wlan.c
@@ -27,6 +27,7 @@
#include <linux/of_gpio.h>
#include <mach/peripheral-loader.h>
#include <mach/msm_smd.h>
+#include <mach/msm_iomap.h>
#ifdef CONFIG_WCNSS_MEM_PRE_ALLOC
#include "wcnss_prealloc.h"
#endif
@@ -159,6 +160,18 @@
static DEVICE_ATTR(wcnss_version, S_IRUSR,
wcnss_version_show, NULL);
+/* interface to reset Riva by sending the reset interrupt */
+void wcnss_reset_intr(void)
+{
+ if (wcnss_hardware_type() == WCNSS_RIVA_HW) {
+ wmb();
+ __raw_writel(1 << 24, MSM_APCS_GCC_BASE + 0x8);
+ } else {
+ pr_err("%s: reset interrupt not supported\n", __func__);
+ }
+}
+EXPORT_SYMBOL(wcnss_reset_intr);
+
static int wcnss_create_sysfs(struct device *dev)
{
int ret;
diff --git a/drivers/platform/msm/qpnp-power-on.c b/drivers/platform/msm/qpnp-power-on.c
index 996456f..33b12ae 100644
--- a/drivers/platform/msm/qpnp-power-on.c
+++ b/drivers/platform/msm/qpnp-power-on.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -35,6 +35,7 @@
#define QPNP_PON_RESIN_S1_TIMER(base) (base + 0x44)
#define QPNP_PON_RESIN_S2_TIMER(base) (base + 0x45)
#define QPNP_PON_RESIN_S2_CNTL(base) (base + 0x46)
+#define QPNP_PON_PS_HOLD_RST_CTL(base) (base + 0x5A)
#define QPNP_PON_RESIN_PULL_UP BIT(0)
#define QPNP_PON_KPDPWR_PULL_UP BIT(1)
@@ -50,6 +51,10 @@
#define QPNP_PON_RESIN_N_SET BIT(1)
#define QPNP_PON_RESIN_BARK_N_SET BIT(4)
+#define QPNP_PON_RESET_EN BIT(7)
+#define QPNP_PON_WARM_RESET BIT(0)
+#define QPNP_PON_SHUTDOWN BIT(2)
+
/* Ranges */
#define QPNP_PON_S1_TIMER_MAX 10256
#define QPNP_PON_S2_TIMER_MAX 2000
@@ -84,6 +89,8 @@
struct delayed_work bark_work;
};
+static struct qpnp_pon *sys_reset_dev;
+
static u32 s1_delay[PON_S1_COUNT_MAX + 1] = {
0 , 32, 56, 80, 138, 184, 272, 408, 608, 904, 1352, 2048,
3072, 4480, 6720, 10256
@@ -113,6 +120,57 @@
return rc;
}
+/**
+ * qpnp_pon_system_pwr_off - Configure system-reset PMIC for shutdown or reset
+ * @reset: Configures for shutdown if 0, or reset if 1.
+ *
+ * This function will only configure a single PMIC. The other PMICs in the
+ * system are slaved off of it and require no explicit configuration. Once
+ * the system-reset PMIC is configured properly, the MSM can drop PS_HOLD to
+ * activate the specified configuration.
+ */
+int qpnp_pon_system_pwr_off(bool reset)
+{
+ int rc;
+ struct qpnp_pon *pon = sys_reset_dev;
+
+ if (!pon)
+ return -ENODEV;
+
+ rc = qpnp_pon_masked_write(pon, QPNP_PON_PS_HOLD_RST_CTL(pon->base),
+ QPNP_PON_RESET_EN, 0);
+ if (rc)
+ dev_err(&pon->spmi->dev,
+ "Unable to write to addr=%x, rc(%d)\n",
+ QPNP_PON_PS_HOLD_RST_CTL(pon->base), rc);
+
+ /*
+ * We need 10 sleep clock cycles here. But since the clock is
+ * internally generated, we need to add 50% tolerance to be
+ * conservative.
+ */
+ udelay(500);
+
+ rc = qpnp_pon_masked_write(pon, QPNP_PON_PS_HOLD_RST_CTL(pon->base),
+ QPNP_PON_WARM_RESET | QPNP_PON_SHUTDOWN,
+ reset ? QPNP_PON_WARM_RESET : QPNP_PON_SHUTDOWN);
+ if (rc)
+ dev_err(&pon->spmi->dev,
+ "Unable to write to addr=%x, rc(%d)\n",
+ QPNP_PON_PS_HOLD_RST_CTL(pon->base), rc);
+
+ rc = qpnp_pon_masked_write(pon, QPNP_PON_PS_HOLD_RST_CTL(pon->base),
+ QPNP_PON_RESET_EN,
+ QPNP_PON_RESET_EN);
+ if (rc)
+ dev_err(&pon->spmi->dev,
+ "Unable to write to addr=%x, rc(%d)\n",
+ QPNP_PON_PS_HOLD_RST_CTL(pon->base), rc);
+
+ return rc;
+}
+EXPORT_SYMBOL(qpnp_pon_system_pwr_off);
+
static struct qpnp_pon_config *
qpnp_get_cfg(struct qpnp_pon *pon, u32 pon_type)
{
@@ -662,7 +720,7 @@
struct resource *pon_resource;
struct device_node *itr = NULL;
u32 delay = 0;
- int rc = 0;
+ int rc, sys_reset;
pon = devm_kzalloc(&spmi->dev, sizeof(struct qpnp_pon),
GFP_KERNEL);
@@ -671,6 +729,15 @@
return -ENOMEM;
}
+ sys_reset = of_property_read_bool(spmi->dev.of_node,
+ "qcom,system-reset");
+ if (sys_reset && sys_reset_dev) {
+ dev_err(&spmi->dev, "qcom,system-reset property can only be specified for one device on the system\n");
+ return -EINVAL;
+ } else if (sys_reset) {
+ sys_reset_dev = pon;
+ }
+
pon->spmi = spmi;
/* get the total number of pon configurations */
diff --git a/drivers/platform/msm/sps/bam.c b/drivers/platform/msm/sps/bam.c
index eb9e8ee..bcb4cdb 100644
--- a/drivers/platform/msm/sps/bam.c
+++ b/drivers/platform/msm/sps/bam.c
@@ -679,7 +679,7 @@
bam_write_reg_field(base, CTRL, BAM_EN, 1);
#ifdef CONFIG_SPS_SUPPORT_NDP_BAM
- bam_write_reg_field(base, CTRL, CACHE_MISS_ERR_RESP_EN, 1);
+ bam_write_reg_field(base, CTRL, CACHE_MISS_ERR_RESP_EN, 0);
bam_write_reg_field(base, CTRL, LOCAL_CLK_GATING, 1);
#endif
diff --git a/drivers/platform/msm/usb_bam.c b/drivers/platform/msm/usb_bam.c
index 551c0a7..bf78b1c 100644
--- a/drivers/platform/msm/usb_bam.c
+++ b/drivers/platform/msm/usb_bam.c
@@ -258,6 +258,11 @@
struct usb_bam_connect_info *connection = &usb_bam_connections[idx];
int ret;
+ if (!usb_bam_pdev) {
+ pr_err("%s: usb_bam device not found\n", __func__);
+ return -ENODEV;
+ }
+
if (idx >= CONNECTIONS_NUM) {
pr_err("%s: Invalid connection index\n",
__func__);
@@ -715,12 +720,9 @@
usb_bam_show_enable(struct device *dev, struct device_attribute *attr,
char *buf)
{
- struct platform_device *pdev =
- container_of(dev, struct platform_device, dev);
- struct msm_usb_bam_platform_data *pdata =
- usb_bam_pdev->dev.platform_data;
+ struct msm_usb_bam_platform_data *pdata = dev->platform_data;
- if (!pdev || !pdata)
+ if (!pdata)
return 0;
return scnprintf(buf, PAGE_SIZE, "%s\n",
bam_enable_strings[pdata->usb_active_bam]);
@@ -730,13 +732,15 @@
struct device_attribute *attr,
const char *buf, size_t count)
{
- struct platform_device *pdev = container_of(dev,
- struct platform_device, dev);
- struct msm_usb_bam_platform_data *pdata =
- usb_bam_pdev->dev.platform_data;
+ struct msm_usb_bam_platform_data *pdata = dev->platform_data;
char str[10], *pstr;
int ret, i;
+ if (!pdata) {
+ dev_err(dev, "no usb_bam pdata found\n");
+ return -ENODEV;
+ }
+
strlcpy(str, buf, sizeof(str));
pstr = strim(str);
@@ -745,12 +749,12 @@
pdata->usb_active_bam = i;
}
- dev_dbg(&pdev->dev, "active_bam=%s\n",
+ dev_dbg(dev, "active_bam=%s\n",
bam_enable_strings[pdata->usb_active_bam]);
ret = usb_bam_init();
if (ret) {
- dev_err(&pdev->dev, "failed to initialize usb bam\n");
+ dev_err(dev, "failed to initialize usb bam\n");
return ret;
}
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index d8baa29..c474e36 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -395,6 +395,16 @@
help
Say Y here to enable support for pm8921 chip charger subdevice
+config QPNP_CHARGER
+ tristate "QPNP Charger driver"
+ depends on SPMI
+ depends on OF_SPMI
+ help
+ Say Y here to enable the switch mode battery charger
+ and boost device which supports USB detection and charging. The driver
+ also offers relevant information to userspace via the power supply
+ framework.
+
config PM8XXX_CCADC
tristate "PM8XXX battery current adc driver"
depends on MFD_PM8921_CORE
@@ -442,4 +452,13 @@
help
Say Y to enable battery temperature measurements using
thermistor connected on BATCTRL ADC.
+
+config QPNP_BMS
+ tristate "QPNP Battery Monitoring System driver"
+ depends on SPMI
+ depends on MSM_QPNP_INT
+ help
+ Say Y here to enable support for QPNP chip bms device.
+ It registers a fuelgauge bms power supply to report
+ State of Charge.
endif # POWER_SUPPLY
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index f84b527..3521cfd 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -55,7 +55,9 @@
obj-$(CONFIG_SMB137B_CHARGER) += smb137b.o
obj-$(CONFIG_PM8XXX_CCADC) += pm8xxx-ccadc.o
obj-$(CONFIG_PM8921_BMS) += pm8921-bms.o
+obj-$(CONFIG_QPNP_BMS) += qpnp-bms.o
obj-$(CONFIG_PM8921_CHARGER) += pm8921-charger.o
+obj-$(CONFIG_QPNP_CHARGER) += qpnp-charger.o
obj-$(CONFIG_LTC4088_CHARGER) += ltc4088-charger.o
obj-$(CONFIG_CHARGER_SMB347) += smb347-charger.o
obj-$(CONFIG_BATTERY_BCL) += battery_current_limit.o
diff --git a/drivers/power/pm8921-bms.c b/drivers/power/pm8921-bms.c
index b3d31d5..e6e2f30 100644
--- a/drivers/power/pm8921-bms.c
+++ b/drivers/power/pm8921-bms.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -10,8 +10,8 @@
* GNU General Public License for more details.
*
*/
-#define pr_fmt(fmt) "%s: " fmt, __func__
+#define pr_fmt(fmt) "%s: " fmt, __func__
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
@@ -22,6 +22,7 @@
#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
#include <linux/mfd/pm8xxx/pm8921-charger.h>
#include <linux/mfd/pm8xxx/ccadc.h>
+#include <linux/mfd/pm8xxx/batterydata-lib.h>
#include <linux/interrupt.h>
#include <linux/bitops.h>
#include <linux/debugfs.h>
@@ -147,8 +148,9 @@
int ibat_at_cv_ua;
int soc_at_cv;
int prev_chg_soc;
-
struct power_supply *batt_psy;
+ bool low_voltage_wake_lock_held;
+ struct wake_lock low_voltage_wake_lock;
};
/*
@@ -224,7 +226,6 @@
module_param_cb(bms_end_ocv_uv, &bms_ro_param_ops, &bms_end_ocv_uv, 0644);
module_param_cb(bms_end_cc_uah, &bms_ro_param_ops, &bms_end_cc_uah, 0644);
-static int interpolate_fcc(struct pm8921_bms_chip *chip, int batt_temp);
static void readjust_fcc_table(void)
{
struct single_row_lut *temp, *old;
@@ -241,7 +242,7 @@
return;
}
- fcc = interpolate_fcc(the_chip, last_real_fcc_batt_temp);
+ fcc = interpolate_fcc(the_chip->fcc_temp_lut, last_real_fcc_batt_temp);
temp->cols = the_chip->fcc_temp_lut->cols;
for (i = 0; i < the_chip->fcc_temp_lut->cols; i++) {
@@ -583,342 +584,6 @@
return 0;
}
-static int linear_interpolate(int y0, int x0, int y1, int x1, int x)
-{
- if (y0 == y1 || x == x0)
- return y0;
- if (x1 == x0 || x == x1)
- return y1;
-
- return y0 + ((y1 - y0) * (x - x0) / (x1 - x0));
-}
-
-static int interpolate_single_lut(struct single_row_lut *lut, int x)
-{
- int i, result;
-
- if (x < lut->x[0]) {
- pr_debug("x %d less than known range return y = %d lut = %pS\n",
- x, lut->y[0], lut);
- return lut->y[0];
- }
- if (x > lut->x[lut->cols - 1]) {
- pr_debug("x %d more than known range return y = %d lut = %pS\n",
- x, lut->y[lut->cols - 1], lut);
- return lut->y[lut->cols - 1];
- }
-
- for (i = 0; i < lut->cols; i++)
- if (x <= lut->x[i])
- break;
- if (x == lut->x[i]) {
- result = lut->y[i];
- } else {
- result = linear_interpolate(
- lut->y[i - 1],
- lut->x[i - 1],
- lut->y[i],
- lut->x[i],
- x);
- }
- return result;
-}
-
-static int interpolate_fcc(struct pm8921_bms_chip *chip, int batt_temp)
-{
- /* batt_temp is in tenths of degC - convert it to degC for lookups */
- batt_temp = batt_temp/10;
- return interpolate_single_lut(chip->fcc_temp_lut, batt_temp);
-}
-
-static int interpolate_fcc_adjusted(struct pm8921_bms_chip *chip, int batt_temp)
-{
- /* batt_temp is in tenths of degC - convert it to degC for lookups */
- batt_temp = batt_temp/10;
- return interpolate_single_lut(chip->adjusted_fcc_temp_lut, batt_temp);
-}
-
-static int interpolate_scalingfactor_fcc(struct pm8921_bms_chip *chip,
- int cycles)
-{
- /*
- * sf table could be null when no battery aging data is available, in
- * that case return 100%
- */
- if (chip->fcc_sf_lut)
- return interpolate_single_lut(chip->fcc_sf_lut, cycles);
- else
- return 100;
-}
-
-static int interpolate_scalingfactor(struct pm8921_bms_chip *chip,
- struct sf_lut *sf_lut,
- int row_entry, int pc)
-{
- int i, scalefactorrow1, scalefactorrow2, scalefactor;
- int rows, cols;
- int row1 = 0;
- int row2 = 0;
-
- /*
- * sf table could be null when no battery aging data is available, in
- * that case return 100%
- */
- if (!sf_lut)
- return 100;
-
- rows = sf_lut->rows;
- cols = sf_lut->cols;
- if (pc > sf_lut->percent[0]) {
- pr_debug("pc %d greater than known pc ranges for sfd\n", pc);
- row1 = 0;
- row2 = 0;
- }
- if (pc < sf_lut->percent[rows - 1]) {
- pr_debug("pc %d less than known pc ranges for sf", pc);
- row1 = rows - 1;
- row2 = rows - 1;
- }
- for (i = 0; i < rows; i++) {
- if (pc == sf_lut->percent[i]) {
- row1 = i;
- row2 = i;
- break;
- }
- if (pc > sf_lut->percent[i]) {
- row1 = i - 1;
- row2 = i;
- break;
- }
- }
-
- if (row_entry < sf_lut->row_entries[0])
- row_entry = sf_lut->row_entries[0];
- if (row_entry > sf_lut->row_entries[cols - 1])
- row_entry = sf_lut->row_entries[cols - 1];
-
- for (i = 0; i < cols; i++)
- if (row_entry <= sf_lut->row_entries[i])
- break;
- if (row_entry == sf_lut->row_entries[i]) {
- scalefactor = linear_interpolate(
- sf_lut->sf[row1][i],
- sf_lut->percent[row1],
- sf_lut->sf[row2][i],
- sf_lut->percent[row2],
- pc);
- return scalefactor;
- }
-
- scalefactorrow1 = linear_interpolate(
- sf_lut->sf[row1][i - 1],
- sf_lut->row_entries[i - 1],
- sf_lut->sf[row1][i],
- sf_lut->row_entries[i],
- row_entry);
-
- scalefactorrow2 = linear_interpolate(
- sf_lut->sf[row2][i - 1],
- sf_lut->row_entries[i - 1],
- sf_lut->sf[row2][i],
- sf_lut->row_entries[i],
- row_entry);
-
- scalefactor = linear_interpolate(
- scalefactorrow1,
- sf_lut->percent[row1],
- scalefactorrow2,
- sf_lut->percent[row2],
- pc);
-
- return scalefactor;
-}
-
-static int is_between(int left, int right, int value)
-{
- if (left >= right && left >= value && value >= right)
- return 1;
- if (left <= right && left <= value && value <= right)
- return 1;
-
- return 0;
-}
-
-/* get ocv given a soc -- reverse lookup */
-static int interpolate_ocv(struct pm8921_bms_chip *chip,
- int batt_temp_degc, int pc)
-{
- int i, ocvrow1, ocvrow2, ocv;
- int rows, cols;
- int row1 = 0;
- int row2 = 0;
-
- rows = chip->pc_temp_ocv_lut->rows;
- cols = chip->pc_temp_ocv_lut->cols;
- if (pc > chip->pc_temp_ocv_lut->percent[0]) {
- pr_debug("pc %d greater than known pc ranges for sfd\n", pc);
- row1 = 0;
- row2 = 0;
- }
- if (pc < chip->pc_temp_ocv_lut->percent[rows - 1]) {
- pr_debug("pc %d less than known pc ranges for sf\n", pc);
- row1 = rows - 1;
- row2 = rows - 1;
- }
- for (i = 0; i < rows; i++) {
- if (pc == chip->pc_temp_ocv_lut->percent[i]) {
- row1 = i;
- row2 = i;
- break;
- }
- if (pc > chip->pc_temp_ocv_lut->percent[i]) {
- row1 = i - 1;
- row2 = i;
- break;
- }
- }
-
- if (batt_temp_degc < chip->pc_temp_ocv_lut->temp[0])
- batt_temp_degc = chip->pc_temp_ocv_lut->temp[0];
- if (batt_temp_degc > chip->pc_temp_ocv_lut->temp[cols - 1])
- batt_temp_degc = chip->pc_temp_ocv_lut->temp[cols - 1];
-
- for (i = 0; i < cols; i++)
- if (batt_temp_degc <= chip->pc_temp_ocv_lut->temp[i])
- break;
- if (batt_temp_degc == chip->pc_temp_ocv_lut->temp[i]) {
- ocv = linear_interpolate(
- chip->pc_temp_ocv_lut->ocv[row1][i],
- chip->pc_temp_ocv_lut->percent[row1],
- chip->pc_temp_ocv_lut->ocv[row2][i],
- chip->pc_temp_ocv_lut->percent[row2],
- pc);
- return ocv;
- }
-
- ocvrow1 = linear_interpolate(
- chip->pc_temp_ocv_lut->ocv[row1][i - 1],
- chip->pc_temp_ocv_lut->temp[i - 1],
- chip->pc_temp_ocv_lut->ocv[row1][i],
- chip->pc_temp_ocv_lut->temp[i],
- batt_temp_degc);
-
- ocvrow2 = linear_interpolate(
- chip->pc_temp_ocv_lut->ocv[row2][i - 1],
- chip->pc_temp_ocv_lut->temp[i - 1],
- chip->pc_temp_ocv_lut->ocv[row2][i],
- chip->pc_temp_ocv_lut->temp[i],
- batt_temp_degc);
-
- ocv = linear_interpolate(
- ocvrow1,
- chip->pc_temp_ocv_lut->percent[row1],
- ocvrow2,
- chip->pc_temp_ocv_lut->percent[row2],
- pc);
-
- return ocv;
-}
-
-static int interpolate_pc(struct pm8921_bms_chip *chip,
- int batt_temp_degc, int ocv)
-{
- int i, j, pcj, pcj_minus_one, pc;
- int rows = chip->pc_temp_ocv_lut->rows;
- int cols = chip->pc_temp_ocv_lut->cols;
-
-
- if (batt_temp_degc < chip->pc_temp_ocv_lut->temp[0]) {
- pr_debug("batt_temp %d < known temp range\n", batt_temp_degc);
- batt_temp_degc = chip->pc_temp_ocv_lut->temp[0];
- }
- if (batt_temp_degc > chip->pc_temp_ocv_lut->temp[cols - 1]) {
- pr_debug("batt_temp %d > known temp range\n", batt_temp_degc);
- batt_temp_degc = chip->pc_temp_ocv_lut->temp[cols - 1];
- }
-
- for (j = 0; j < cols; j++)
- if (batt_temp_degc <= chip->pc_temp_ocv_lut->temp[j])
- break;
- if (batt_temp_degc == chip->pc_temp_ocv_lut->temp[j]) {
- /* found an exact match for temp in the table */
- if (ocv >= chip->pc_temp_ocv_lut->ocv[0][j])
- return chip->pc_temp_ocv_lut->percent[0];
- if (ocv <= chip->pc_temp_ocv_lut->ocv[rows - 1][j])
- return chip->pc_temp_ocv_lut->percent[rows - 1];
- for (i = 0; i < rows; i++) {
- if (ocv >= chip->pc_temp_ocv_lut->ocv[i][j]) {
- if (ocv == chip->pc_temp_ocv_lut->ocv[i][j])
- return
- chip->pc_temp_ocv_lut->percent[i];
- pc = linear_interpolate(
- chip->pc_temp_ocv_lut->percent[i],
- chip->pc_temp_ocv_lut->ocv[i][j],
- chip->pc_temp_ocv_lut->percent[i - 1],
- chip->pc_temp_ocv_lut->ocv[i - 1][j],
- ocv);
- return pc;
- }
- }
- }
-
- /*
- * batt_temp_degc is within temperature for
- * column j-1 and j
- */
- if (ocv >= chip->pc_temp_ocv_lut->ocv[0][j])
- return chip->pc_temp_ocv_lut->percent[0];
- if (ocv <= chip->pc_temp_ocv_lut->ocv[rows - 1][j - 1])
- return chip->pc_temp_ocv_lut->percent[rows - 1];
-
- pcj_minus_one = 0;
- pcj = 0;
- for (i = 0; i < rows-1; i++) {
- if (pcj == 0
- && is_between(chip->pc_temp_ocv_lut->ocv[i][j],
- chip->pc_temp_ocv_lut->ocv[i+1][j], ocv)) {
- pcj = linear_interpolate(
- chip->pc_temp_ocv_lut->percent[i],
- chip->pc_temp_ocv_lut->ocv[i][j],
- chip->pc_temp_ocv_lut->percent[i + 1],
- chip->pc_temp_ocv_lut->ocv[i+1][j],
- ocv);
- }
-
- if (pcj_minus_one == 0
- && is_between(chip->pc_temp_ocv_lut->ocv[i][j-1],
- chip->pc_temp_ocv_lut->ocv[i+1][j-1], ocv)) {
-
- pcj_minus_one = linear_interpolate(
- chip->pc_temp_ocv_lut->percent[i],
- chip->pc_temp_ocv_lut->ocv[i][j-1],
- chip->pc_temp_ocv_lut->percent[i + 1],
- chip->pc_temp_ocv_lut->ocv[i+1][j-1],
- ocv);
- }
-
- if (pcj && pcj_minus_one) {
- pc = linear_interpolate(
- pcj_minus_one,
- chip->pc_temp_ocv_lut->temp[j-1],
- pcj,
- chip->pc_temp_ocv_lut->temp[j],
- batt_temp_degc);
- return pc;
- }
- }
-
- if (pcj)
- return pcj;
-
- if (pcj_minus_one)
- return pcj_minus_one;
-
- pr_debug("%d ocv wasn't found for temp %d in the LUT returning 100%%",
- ocv, batt_temp_degc);
- return 100;
-}
-
#define BMS_MODE_BIT BIT(6)
#define EN_VBAT_BIT BIT(5)
#define OVERRIDE_MODE_DELAY_MS 20
@@ -1042,7 +707,7 @@
}
/* Convert the batt_temp to DegC from deciDegC */
batt_temp = batt_temp / 10;
- scalefactor = interpolate_scalingfactor(chip, chip->rbatt_sf_lut,
+ scalefactor = interpolate_scalingfactor(chip->rbatt_sf_lut,
batt_temp, soc_rbatt);
pr_debug("rbatt sf = %d for batt_temp = %d, soc_rbatt = %d\n",
scalefactor, batt_temp, soc_rbatt);
@@ -1069,16 +734,18 @@
int initfcc, result, scalefactor = 0;
if (chip->adjusted_fcc_temp_lut == NULL) {
- initfcc = interpolate_fcc(chip, batt_temp);
+ initfcc = interpolate_fcc(chip->fcc_temp_lut, batt_temp);
- scalefactor = interpolate_scalingfactor_fcc(chip, chargecycles);
+ scalefactor = interpolate_scalingfactor_fcc(chip->fcc_sf_lut,
+ chargecycles);
/* Multiply the initial FCC value by the scale factor. */
result = (initfcc * scalefactor * 1000) / 100;
pr_debug("fcc = %d uAh\n", result);
return result;
} else {
- return 1000 * interpolate_fcc_adjusted(chip, batt_temp);
+ return 1000 * interpolate_fcc(chip->adjusted_fcc_temp_lut,
+ batt_temp);
}
}
@@ -1120,17 +787,18 @@
return 0;
}
-static int calculate_pc(struct pm8921_bms_chip *chip, int ocv_uv, int batt_temp,
- int chargecycles)
+static int calculate_pc(struct pm8921_bms_chip *chip, int ocv_uv,
+ int batt_temp, int chargecycles)
{
int pc, scalefactor;
- pc = interpolate_pc(chip, batt_temp / 10, ocv_uv / 1000);
+ pc = interpolate_pc(chip->pc_temp_ocv_lut,
+ batt_temp / 10, ocv_uv / 1000);
pr_debug("pc = %u for ocv = %dmicroVolts batt_temp = %d\n",
pc, ocv_uv, batt_temp);
- scalefactor = interpolate_scalingfactor(chip,
- chip->pc_sf_lut, chargecycles, pc);
+ scalefactor = interpolate_scalingfactor(chip->pc_sf_lut,
+ chargecycles, pc);
pr_debug("scalefactor = %u batt_temp = %d\n", scalefactor, batt_temp);
/* Multiply the initial FCC value by the scale factor. */
@@ -1183,7 +851,8 @@
int uuc_rbatt_uv;
for (i = 0; i <= 100; i++) {
- ocv_mv = interpolate_ocv(chip, batt_temp_degc, i);
+ ocv_mv = interpolate_ocv(chip->pc_temp_ocv_lut,
+ batt_temp_degc, i);
rbatt_mohm = get_rbatt(chip, i, batt_temp);
unusable_uv = (rbatt_mohm * i_ma) + (chip->v_cutoff * 1000);
delta_uv = ocv_mv * 1000 - unusable_uv;
@@ -1239,8 +908,8 @@
new_uuc = (fcc_uah * chip->prev_pc_unusable) / 100;
/* also find update the iavg_ma accordingly */
- new_unusable_mv = interpolate_ocv(chip, batt_temp_degc,
- chip->prev_pc_unusable);
+ new_unusable_mv = interpolate_ocv(chip->pc_temp_ocv_lut,
+ batt_temp_degc, chip->prev_pc_unusable);
if (new_unusable_mv < chip->v_cutoff)
new_unusable_mv = chip->v_cutoff;
@@ -1531,11 +1200,11 @@
pc = DIV_ROUND_CLOSEST((int)rc * 100, fcc_uah);
pc = clamp(pc, 0, 100);
- ocv = interpolate_ocv(chip, batt_temp_degc, pc);
+ ocv = interpolate_ocv(chip->pc_temp_ocv_lut, batt_temp_degc, pc);
pr_debug("s_soc = %d, fcc = %d uuc = %d rc = %d, pc = %d, ocv mv = %d\n",
shutdown_soc, fcc_uah, uuc_uah, (int)rc, pc, ocv);
- new_pc = interpolate_pc(chip, batt_temp_degc, ocv);
+ new_pc = interpolate_pc(chip->pc_temp_ocv_lut, batt_temp_degc, ocv);
pr_debug("test revlookup pc = %d for ocv = %d\n", new_pc, ocv);
while (abs(new_pc - pc) > 1) {
@@ -1545,7 +1214,8 @@
delta_mv = -1 * delta_mv;
ocv = ocv + delta_mv;
- new_pc = interpolate_pc(chip, batt_temp_degc, ocv);
+ new_pc = interpolate_pc(chip->pc_temp_ocv_lut,
+ batt_temp_degc, ocv);
pr_debug("test revlookup pc = %d for ocv = %d\n", new_pc, ocv);
}
@@ -1650,6 +1320,28 @@
return chip->prev_chg_soc;
}
+static void very_low_voltage_check(struct pm8921_bms_chip *chip,
+ int ibat_ua, int vbat_uv)
+{
+ /*
+ * if battery is very low (v_cutoff voltage + 20mv) hold
+ * a wakelock untill soc = 0%
+ */
+ if (vbat_uv <= (chip->v_cutoff + 20) * 1000
+ && !chip->low_voltage_wake_lock_held) {
+ pr_debug("voltage = %d low holding wakelock\n", vbat_uv);
+ wake_lock(&chip->low_voltage_wake_lock);
+ chip->low_voltage_wake_lock_held = 1;
+ }
+
+ if (vbat_uv > (chip->v_cutoff + 20) * 1000
+ && chip->low_voltage_wake_lock_held) {
+ pr_debug("voltage = %d releasing wakelock\n", vbat_uv);
+ chip->low_voltage_wake_lock_held = 0;
+ wake_unlock(&chip->low_voltage_wake_lock);
+ }
+}
+
static int last_soc_est = -EINVAL;
static int adjust_soc(struct pm8921_bms_chip *chip, int soc,
int batt_temp, int chargecycles,
@@ -1674,6 +1366,7 @@
goto out;
}
+ very_low_voltage_check(chip, ibat_ua, vbat_uv);
delta_ocv_uv_limit = DIV_ROUND_CLOSEST(ibat_ua, 1000);
@@ -3228,6 +2921,9 @@
goto free_chip;
}
+ wake_lock_init(&chip->low_voltage_wake_lock,
+ WAKE_LOCK_SUSPEND, "pm8921_bms_low");
+
rc = pm8921_bms_hw_init(chip);
if (rc) {
pr_err("couldn't init hardware rc = %d\n", rc);
@@ -3248,7 +2944,10 @@
check_initial_ocv(chip);
/* start periodic hkadc calibration */
- schedule_delayed_work(&chip->calib_hkadc_delayed_work, 0);
+ calib_hkadc(chip);
+ schedule_delayed_work(&chip->calib_hkadc_delayed_work,
+ round_jiffies_relative(msecs_to_jiffies
+ (HKADC_CALIB_DELAY_MS)));
/* enable the vbatt reading interrupts for scheduling hkadc calib */
pm8921_bms_enable_irq(chip, PM8921_BMS_GOOD_OCV);
@@ -3282,12 +2981,33 @@
return 0;
}
+static int pm8921_bms_resume(struct device *dev)
+{
+ int rc, ibat_ua, vbat_uv;
+
+ rc = pm8921_bms_get_simultaneous_battery_voltage_and_current(
+ &ibat_ua,
+ &vbat_uv);
+ if (rc < 0) {
+ pr_err("simultaneous vbat ibat failed err = %d\n", rc);
+ return 0;
+ }
+
+ very_low_voltage_check(the_chip, ibat_ua, vbat_uv);
+ return 0;
+}
+
+static const struct dev_pm_ops pm8921_bms_pm_ops = {
+ .resume = pm8921_bms_resume,
+};
+
static struct platform_driver pm8921_bms_driver = {
.probe = pm8921_bms_probe,
.remove = __devexit_p(pm8921_bms_remove),
.driver = {
.name = PM8921_BMS_DEV_NAME,
.owner = THIS_MODULE,
+ .pm = &pm8921_bms_pm_ops,
},
};
diff --git a/drivers/power/pm8921-charger.c b/drivers/power/pm8921-charger.c
index 28b641d..19454ca 100644
--- a/drivers/power/pm8921-charger.c
+++ b/drivers/power/pm8921-charger.c
@@ -27,6 +27,7 @@
#include <linux/workqueue.h>
#include <linux/debugfs.h>
#include <linux/slab.h>
+#include <linux/mfd/pm8xxx/batt-alarm.h>
#include <mach/msm_xo.h>
#include <mach/msm_hsusb.h>
@@ -115,6 +116,13 @@
int batt_state;
};
+static int pm8921_battery_gauge_alarm_notify(struct notifier_block *nb,
+ unsigned long status, void *unused);
+
+static struct notifier_block alarm_notifier = {
+ .notifier_call = pm8921_battery_gauge_alarm_notify,
+};
+
static struct fsm_state_to_batt_status map[] = {
{FSM_STATE_OFF_0, POWER_SUPPLY_STATUS_UNKNOWN},
{FSM_STATE_BATFETDET_START_12, POWER_SUPPLY_STATUS_UNKNOWN},
@@ -205,6 +213,8 @@
* @max_voltage_mv: the max volts the batt should be charged up to
* @min_voltage_mv: the min battery voltage before turning the FETon
* @uvd_voltage_mv: (PM8917 only) the falling UVD threshold voltage
+ * @alarm_low_mv: the battery alarm voltage low
+ * @alarm_high_mv: the battery alarm voltage high
* @cool_temp_dc: the cool temp threshold in deciCelcius
* @warm_temp_dc: the warm temp threshold in deciCelcius
* @resume_voltage_delta: the voltage delta from vdd max at which the
@@ -225,6 +235,8 @@
unsigned int max_voltage_mv;
unsigned int min_voltage_mv;
unsigned int uvd_voltage_mv;
+ unsigned int alarm_low_mv;
+ unsigned int alarm_high_mv;
int cool_temp_dc;
int warm_temp_dc;
unsigned int temp_check_period;
@@ -250,6 +262,7 @@
bool ext_charge_done;
bool iusb_fine_res;
bool dc_unplug_check;
+ bool disable_hw_clock_switching;
DECLARE_BITMAP(enabled_irqs, PM_CHG_MAX_INTS);
struct work_struct battery_id_valid_work;
int64_t batt_id_min;
@@ -1852,6 +1865,9 @@
}
if (disable)
pr_warn("current drawn from chg=0, battery provides current\n");
+
+ pm_chg_usb_suspend_enable(the_chip, disable);
+
return pm_chg_charge_dis(the_chip, disable);
}
EXPORT_SYMBOL(pm8921_disable_source_current);
@@ -2000,6 +2016,73 @@
return get_prop_batt_temp(the_chip);
}
+static int pm8921_charger_enable_batt_alarm(struct pm8921_chg_chip *chip)
+{
+ int rc = 0;
+
+ rc = pm8xxx_batt_alarm_disable(PM8XXX_BATT_ALARM_UPPER_COMPARATOR);
+ if (!rc)
+ rc = pm8xxx_batt_alarm_enable(
+ PM8XXX_BATT_ALARM_LOWER_COMPARATOR);
+ if (rc) {
+ pr_err("unable to set batt alarm state rc=%d\n", rc);
+ return rc;
+ }
+
+ return rc;
+}
+static int pm8921_charger_configure_batt_alarm(struct pm8921_chg_chip *chip)
+{
+ int rc = 0;
+
+ rc = pm8xxx_batt_alarm_disable(PM8XXX_BATT_ALARM_UPPER_COMPARATOR);
+ if (!rc)
+ rc = pm8xxx_batt_alarm_disable(
+ PM8XXX_BATT_ALARM_LOWER_COMPARATOR);
+ if (rc) {
+ pr_err("unable to set batt alarm state rc=%d\n", rc);
+ return rc;
+ }
+
+ /*
+ * The batt-alarm driver requires sane values for both min / max,
+ * regardless of whether they're both activated.
+ */
+ rc = pm8xxx_batt_alarm_threshold_set(
+ PM8XXX_BATT_ALARM_LOWER_COMPARATOR,
+ chip->alarm_low_mv);
+ if (!rc)
+ rc = pm8xxx_batt_alarm_threshold_set(
+ PM8XXX_BATT_ALARM_UPPER_COMPARATOR,
+ chip->alarm_high_mv);
+ if (rc) {
+ pr_err("unable to set batt alarm threshold rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = pm8xxx_batt_alarm_hold_time_set(
+ PM8XXX_BATT_ALARM_HOLD_TIME_16_MS);
+ if (rc) {
+ pr_err("unable to set batt alarm hold time rc=%d\n", rc);
+ return rc;
+ }
+
+ /* PWM enabled at 2Hz */
+ rc = pm8xxx_batt_alarm_pwm_rate_set(1, 7, 4);
+ if (rc) {
+ pr_err("unable to set batt alarm pwm rate rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = pm8xxx_batt_alarm_register_notifier(&alarm_notifier);
+ if (rc) {
+ pr_err("unable to register alarm notifier rc=%d\n", rc);
+ return rc;
+ }
+
+ return rc;
+}
+
static void handle_usb_insertion_removal(struct pm8921_chg_chip *chip)
{
int usb_present;
@@ -2135,6 +2218,61 @@
}
}
+static int pm8921_battery_gauge_alarm_notify(struct notifier_block *nb,
+ unsigned long status, void *unused)
+{
+ int rc;
+
+ pr_info("status: %lu\n", status);
+
+ /* Check if called before init */
+
+ switch (status) {
+ case 0:
+ pr_err("spurious interrupt\n");
+ break;
+ /* expected case - trip of low threshold */
+ case 1:
+ if (!the_chip) {
+ pr_err("not initialized\n");
+ return -EINVAL;
+ }
+
+ the_chip->disable_hw_clock_switching = 1;
+
+ rc = pm8xxx_batt_alarm_disable(
+ PM8XXX_BATT_ALARM_LOWER_COMPARATOR);
+ if (!rc)
+ rc = pm8xxx_batt_alarm_enable(
+ PM8XXX_BATT_ALARM_UPPER_COMPARATOR);
+ if (rc)
+ pr_err("unable to set alarm state rc=%d\n", rc);
+ break;
+ case 2:
+ if (!the_chip) {
+ pr_err("not initialized\n");
+ return -EINVAL;
+ }
+
+ the_chip->disable_hw_clock_switching = 0;
+
+ rc = pm8xxx_batt_alarm_disable(
+ PM8XXX_BATT_ALARM_UPPER_COMPARATOR);
+ if (!rc)
+ rc = pm8xxx_batt_alarm_enable(
+ PM8XXX_BATT_ALARM_LOWER_COMPARATOR);
+ if (rc)
+ pr_err("unable to set alarm state rc=%d\n", rc);
+
+ pr_err("trip of high threshold\n");
+ break;
+ default:
+ pr_err("error received\n");
+ };
+
+ return 0;
+}
+
static void turn_on_ovp_fet(struct pm8921_chg_chip *chip, u16 ovptestreg)
{
u8 temp;
@@ -2305,12 +2443,6 @@
return IRQ_HANDLED;
}
-static irqreturn_t usbin_ov_irq_handler(int irq, void *data)
-{
- pr_err("USB OverVoltage\n");
- return IRQ_HANDLED;
-}
-
static irqreturn_t batt_inserted_irq_handler(int irq, void *data)
{
struct pm8921_chg_chip *chip = data;
@@ -2355,12 +2487,6 @@
return IRQ_HANDLED;
}
-static irqreturn_t usbin_uv_irq_handler(int irq, void *data)
-{
- pr_err("USB UnderVoltage\n");
- return IRQ_HANDLED;
-}
-
static irqreturn_t vbat_ov_irq_handler(int irq, void *data)
{
pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
@@ -2495,11 +2621,6 @@
pr_debug("USB charger active\n");
pm_chg_iusbmax_get(chip, &usb_ma);
- if (usb_ma == 500 && !usb_target_ma) {
- pr_debug("Stopping Unplug Check Worker USB == 500mA\n");
- disable_input_voltage_regulation(chip);
- return;
- }
if (usb_ma <= 100) {
pr_debug(
@@ -3052,6 +3173,18 @@
return;
}
+ /* If the disable hw clock switching
+ * flag was set it can now be unset. Also, re-enable
+ * the battery alarm to set the flag again when needed
+ */
+ if (chip->disable_hw_clock_switching) {
+ /* Unset the hw clock switching flag */
+ chip->disable_hw_clock_switching = 0;
+
+ if (pm8921_charger_enable_batt_alarm(chip))
+ pr_err("couldn't set up batt alarm!\n");
+ }
+
if (end == CHG_FINISHED) {
count++;
} else {
@@ -3311,12 +3444,13 @@
{
unsigned long flags;
int fsm_state;
+ int is_fast_chg;
chip->dc_present = !!is_dc_chg_plugged_in(chip);
chip->usb_present = !!is_usb_chg_plugged_in(chip);
notify_usb_of_the_plugin_event(chip->usb_present);
- if (chip->usb_present) {
+ if (chip->usb_present || chip->dc_present) {
schedule_delayed_work(&chip->unplug_check_work,
round_jiffies_relative(msecs_to_jiffies
(UNPLUG_CHECK_WAIT_PERIOD_MS)));
@@ -3327,8 +3461,6 @@
pm8921_chg_enable_irq(chip, USBIN_VALID_IRQ);
pm8921_chg_enable_irq(chip, BATT_REMOVED_IRQ);
pm8921_chg_enable_irq(chip, BATT_INSERTED_IRQ);
- pm8921_chg_enable_irq(chip, USBIN_OV_IRQ);
- pm8921_chg_enable_irq(chip, USBIN_UV_IRQ);
pm8921_chg_enable_irq(chip, DCIN_OV_IRQ);
pm8921_chg_enable_irq(chip, DCIN_UV_IRQ);
pm8921_chg_enable_irq(chip, CHGFAIL_IRQ);
@@ -3340,9 +3472,17 @@
if (usb_chg_current) {
/* reissue a vbus draw call */
__pm8921_charger_vbus_draw(usb_chg_current);
- fastchg_irq_handler(chip->pmic_chg_irq[FASTCHG_IRQ], chip);
}
spin_unlock_irqrestore(&vbus_lock, flags);
+ /*
+ * The bootloader could have started charging, a fastchg interrupt
+ * might not happen. Check the real time status and if it is fast
+ * charging invoke the handler so that the eoc worker could be
+ * started
+ */
+ is_fast_chg = pm_chg_get_rt_status(chip, FASTCHG_IRQ);
+ if (is_fast_chg)
+ fastchg_irq_handler(chip->pmic_chg_irq[FASTCHG_IRQ], chip);
fsm_state = pm_chg_get_fsm_state(chip);
if (is_battery_charging(fsm_state)) {
@@ -3376,13 +3516,10 @@
struct pm_chg_irq_init_data chg_irq_data[] = {
CHG_IRQ(USBIN_VALID_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
usbin_valid_irq_handler),
- CHG_IRQ(USBIN_OV_IRQ, IRQF_TRIGGER_RISING, usbin_ov_irq_handler),
CHG_IRQ(BATT_INSERTED_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
batt_inserted_irq_handler),
CHG_IRQ(VBATDET_LOW_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
vbatdet_low_irq_handler),
- CHG_IRQ(USBIN_UV_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
- usbin_uv_irq_handler),
CHG_IRQ(VBAT_OV_IRQ, IRQF_TRIGGER_RISING, vbat_ov_irq_handler),
CHG_IRQ(CHGWDOG_IRQ, IRQF_TRIGGER_RISING, chgwdog_irq_handler),
CHG_IRQ(VCP_IRQ, IRQF_TRIGGER_RISING, vcp_irq_handler),
@@ -3963,7 +4100,8 @@
rc = pm_chg_masked_write(chip, CHG_CNTRL, VREF_BATT_THERM_FORCE_ON, 0);
if (rc)
pr_err("Failed to Force Vref therm off rc=%d\n", rc);
- pm8921_chg_set_hw_clk_switching(chip);
+ if (!(chip->disable_hw_clock_switching))
+ pm8921_chg_set_hw_clk_switching(chip);
return 0;
}
@@ -4046,6 +4184,8 @@
chip->ttrkl_time = pdata->ttrkl_time;
chip->update_time = pdata->update_time;
chip->max_voltage_mv = pdata->max_voltage;
+ chip->alarm_low_mv = pdata->alarm_low_mv;
+ chip->alarm_high_mv = pdata->alarm_high_mv;
chip->min_voltage_mv = pdata->min_voltage;
chip->uvd_voltage_mv = pdata->uvd_thresh_voltage;
chip->resume_voltage_delta = pdata->resume_voltage_delta;
@@ -4150,8 +4290,7 @@
}
enable_irq_wake(chip->pmic_chg_irq[USBIN_VALID_IRQ]);
- enable_irq_wake(chip->pmic_chg_irq[USBIN_OV_IRQ]);
- enable_irq_wake(chip->pmic_chg_irq[USBIN_UV_IRQ]);
+ enable_irq_wake(chip->pmic_chg_irq[DCIN_VALID_IRQ]);
enable_irq_wake(chip->pmic_chg_irq[BAT_TEMP_OK_IRQ]);
enable_irq_wake(chip->pmic_chg_irq[VBATDET_LOW_IRQ]);
enable_irq_wake(chip->pmic_chg_irq[FASTCHG_IRQ]);
@@ -4167,6 +4306,17 @@
}
}
+ rc = pm8921_charger_configure_batt_alarm(chip);
+ if (rc) {
+ pr_err("Couldn't configure battery alarm! rc=%d\n", rc);
+ goto free_irq;
+ }
+
+ rc = pm8921_charger_enable_batt_alarm(chip);
+ if (rc) {
+ pr_err("Couldn't enable battery alarm! rc=%d\n", rc);
+ goto free_irq;
+ }
create_debugfs_entries(chip);
INIT_WORK(&chip->bms_notify.work, bms_notify);
diff --git a/drivers/power/qpnp-bms.c b/drivers/power/qpnp-bms.c
new file mode 100644
index 0000000..7b4d97e
--- /dev/null
+++ b/drivers/power/qpnp-bms.c
@@ -0,0 +1,353 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define pr_fmt(fmt) "%s: " fmt, __func__
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/power_supply.h>
+#include <linux/spmi.h>
+
+/* Interrupt offsets */
+#define INT_RT_STS(base) (base + 0x10)
+#define INT_SET_TYPE(base) (base + 0x11)
+#define INT_POLARITY_HIGH(base) (base + 0x12)
+#define INT_POLARITY_LOW(base) (base + 0x13)
+#define INT_LATCHED_CLR(base) (base + 0x14)
+#define INT_EN_SET(base) (base + 0x15)
+#define INT_EN_CLR(base) (base + 0x16)
+#define INT_LATCHED_STS(base) (base + 0x18)
+#define INT_PENDING_STS(base) (base + 0x19)
+#define INT_MID_SEL(base) (base + 0x1A)
+#define INT_PRIORITY(base) (base + 0x1B)
+
+/* BMS Register Offsets */
+#define BMS1_REVISION1 0x0
+#define BMS1_REVISION2 0x1
+#define BMS1_STATUS1 0x8
+#define BMS1_MODE_CTL 0X40
+/* Columb counter clear registers */
+#define BMS1_CC_DATA_CTL 0x42
+#define BMS1_CC_CLEAR_CTRL 0x43
+/* OCV limit registers */
+#define BMS1_OCV_USE_LOW_LIMIT_THR0 0x48
+#define BMS1_OCV_USE_LOW_LIMIT_THR1 0x49
+#define BMS1_OCV_USE_HIGH_LIMIT_THR0 0x4A
+#define BMS1_OCV_USE_HIGH_LIMIT_THR1 0x4B
+#define BMS1_OCV_USE_LIMIT_CTL 0x4C
+/* CC interrupt threshold */
+#define BMS1_CC_THR0 0x7A
+#define BMS1_CC_THR1 0x7B
+#define BMS1_CC_THR2 0x7C
+#define BMS1_CC_THR3 0x7D
+#define BMS1_CC_THR4 0x7E
+/* OCV for r registers */
+#define BMS1_OCV_FOR_R_DATA0 0x80
+#define BMS1_OCV_FOR_R_DATA1 0x81
+#define BMS1_VSENSE_FOR_R_DATA0 0x82
+#define BMS1_VSENSE_FOR_R_DATA1 0x83
+/* Columb counter data */
+#define BMS1_CC_DATA0 0x8A
+#define BMS1_CC_DATA1 0x8B
+#define BMS1_CC_DATA2 0x8C
+#define BMS1_CC_DATA3 0x8D
+#define BMS1_CC_DATA4 0x8E
+/* OCV for soc data */
+#define BMS1_OCV_FOR_SOC_DATA0 0x90
+#define BMS1_OCV_FOR_SOC_DATA1 0x91
+#define BMS1_VSENSE_PON_DATA0 0x94
+#define BMS1_VSENSE_PON_DATA1 0x95
+#define BMS1_VBAT_AVG_DATA0 0x9E
+#define BMS1_VBAT_AVG_DATA1 0x9F
+/* Extra bms registers */
+#define BMS1_BMS_DATA_REG_0 0xB0
+#define BMS1_BMS_DATA_REG_1 0xB1
+#define BMS1_BMS_DATA_REG_2 0xB2
+#define BMS1_BMS_DATA_REG_3 0xB3
+
+#define QPNP_BMS_DEV_NAME "qcom,qpnp-bms"
+
+struct qpnp_bms_chip {
+ struct device *dev;
+ struct power_supply bms_psy;
+ struct spmi_device *spmi;
+ u16 base;
+
+ u8 revision1;
+ u8 revision2;
+ int charger_status;
+ bool online;
+ /* platform data */
+ unsigned int r_sense_mohm;
+ unsigned int v_cutoff;
+ unsigned int max_voltage;
+ unsigned int r_conn_mohm;
+ int shutdown_soc_valid_limit;
+ int adjust_soc_low_threshold;
+ int adjust_soc_high_threshold;
+ int chg_term;
+};
+
+static struct of_device_id qpnp_bms_match_table[] = {
+ { .compatible = QPNP_BMS_DEV_NAME },
+ {}
+};
+
+static char *qpnp_bms_supplicants[] = {
+ "battery"
+};
+
+static enum power_supply_property msm_bms_power_props[] = {
+ POWER_SUPPLY_PROP_STATUS,
+ POWER_SUPPLY_PROP_ONLINE,
+ POWER_SUPPLY_PROP_CAPACITY,
+ POWER_SUPPLY_PROP_CURRENT_NOW,
+ POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
+};
+
+static int qpnp_read_wrapper(struct qpnp_bms_chip *chip, u8 *val,
+ u16 base, int count)
+{
+ int rc;
+ struct spmi_device *spmi = chip->spmi;
+
+ rc = spmi_ext_register_readl(spmi->ctrl, spmi->sid, base, val, count);
+ if (rc)
+ pr_err("SPMI read failed rc=%d\n", rc);
+
+ return 0;
+}
+
+/* Returns capacity as a SoC percentage between 0 and 100 */
+static int get_prop_bms_capacity(struct qpnp_bms_chip *chip)
+{
+ /* return 50 until a real algorithm is implemented */
+ return 50;
+}
+
+/* Returns instantaneous current in uA */
+static int get_prop_bms_current_now(struct qpnp_bms_chip *chip)
+{
+ /* temporarily return 0 until a real algorithm is put in */
+ return 0;
+}
+
+/* Returns full charge design in uAh */
+static int get_prop_bms_charge_full_design(struct qpnp_bms_chip *chip)
+{
+ /* temporarily return 0 until a real algorithm is put in */
+ return 0;
+}
+
+static void set_prop_bms_online(struct qpnp_bms_chip *chip, bool online)
+{
+ chip->online = online;
+}
+
+static void set_prop_bms_status(struct qpnp_bms_chip *chip, int status)
+{
+ chip->charger_status = status;
+}
+
+static void qpnp_bms_external_power_changed(struct power_supply *psy)
+{
+}
+
+static int qpnp_bms_power_get_property(struct power_supply *psy,
+ enum power_supply_property psp,
+ union power_supply_propval *val)
+{
+ struct qpnp_bms_chip *chip = container_of(psy, struct qpnp_bms_chip,
+ bms_psy);
+
+ switch (psp) {
+ case POWER_SUPPLY_PROP_CAPACITY:
+ val->intval = get_prop_bms_capacity(chip);
+ break;
+ case POWER_SUPPLY_PROP_CURRENT_NOW:
+ val->intval = get_prop_bms_current_now(chip);
+ break;
+ case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
+ val->intval = get_prop_bms_charge_full_design(chip);
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static int qpnp_bms_power_set_property(struct power_supply *psy,
+ enum power_supply_property psp,
+ const union power_supply_propval *val)
+{
+ struct qpnp_bms_chip *chip = container_of(psy, struct qpnp_bms_chip,
+ bms_psy);
+
+ switch (psp) {
+ case POWER_SUPPLY_PROP_ONLINE:
+ set_prop_bms_online(chip, val->intval);
+ break;
+ case POWER_SUPPLY_PROP_STATUS:
+ set_prop_bms_status(chip, (bool)val->intval);
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
+#define SPMI_PROPERTY_READ(chip_prop, qpnp_spmi_property, retval, errlabel)\
+do { \
+ retval = of_property_read_u32(spmi->dev.of_node, \
+ "qcom,bms-" qpnp_spmi_property, \
+ &chip->chip_prop); \
+ if (retval) { \
+ pr_err("Error reading " #qpnp_spmi_property \
+ " property %d\n", rc); \
+ goto errlabel; \
+ } \
+} while (0)
+
+static int __devinit
+qpnp_bms_probe(struct spmi_device *spmi)
+{
+ struct qpnp_bms_chip *chip;
+ struct resource *bms_resource;
+ int rc;
+
+ chip = kzalloc(sizeof *chip, GFP_KERNEL);
+
+ if (chip == NULL) {
+ pr_err("kzalloc() failed.\n");
+ return -ENOMEM;
+ }
+
+ chip->dev = &(spmi->dev);
+ chip->spmi = spmi;
+
+ bms_resource = spmi_get_resource(spmi, NULL, IORESOURCE_MEM, 0);
+ if (!bms_resource) {
+ dev_err(&spmi->dev, "Unable to get BMS base address\n");
+ return -ENXIO;
+ }
+ chip->base = bms_resource->start;
+
+ rc = qpnp_read_wrapper(chip, &chip->revision1,
+ chip->base + BMS1_REVISION1, 1);
+ if (rc) {
+ pr_err("error reading version register %d\n", rc);
+ goto error_read;
+ }
+
+ rc = qpnp_read_wrapper(chip, &chip->revision2,
+ chip->base + BMS1_REVISION2, 1);
+ if (rc) {
+ pr_err("Error reading version register %d\n", rc);
+ goto error_read;
+ }
+
+ SPMI_PROPERTY_READ(r_sense_mohm, "r-sense-mohm", rc, error_read);
+ SPMI_PROPERTY_READ(v_cutoff, "v-cutoff-uv", rc, error_read);
+ SPMI_PROPERTY_READ(max_voltage, "max-voltage-uv", rc, error_read);
+ SPMI_PROPERTY_READ(r_conn_mohm, "r-conn-mohm", rc, error_read);
+ SPMI_PROPERTY_READ(shutdown_soc_valid_limit,
+ "shutdown-soc-valid-limit", rc, error_read);
+ SPMI_PROPERTY_READ(adjust_soc_low_threshold,
+ "adjust-soc-low-threshold", rc, error_read);
+ SPMI_PROPERTY_READ(adjust_soc_high_threshold,
+ "adjust-soc-high-threshold", rc, error_read);
+ SPMI_PROPERTY_READ(chg_term, "chg-term-ua", rc, error_read);
+
+ pr_debug("dts data: r_sense_mohm:%d, v_cutoff:%d, max_v:%d, r_conn:%d, shutdown_soc: %d, adjust_soc_low:%d, adjust_soc_high:%d, chg_term:%d\n",
+ chip->r_sense_mohm, chip->v_cutoff,
+ chip->max_voltage, chip->r_conn_mohm,
+ chip->shutdown_soc_valid_limit,
+ chip->adjust_soc_low_threshold,
+ chip->adjust_soc_high_threshold,
+ chip->chg_term);
+
+ dev_set_drvdata(&spmi->dev, chip);
+ device_init_wakeup(&spmi->dev, 1);
+
+ /* setup & register the battery power supply */
+ chip->bms_psy.name = "bms";
+ chip->bms_psy.type = POWER_SUPPLY_TYPE_BMS;
+ chip->bms_psy.properties = msm_bms_power_props;
+ chip->bms_psy.num_properties = ARRAY_SIZE(msm_bms_power_props);
+ chip->bms_psy.get_property = qpnp_bms_power_get_property;
+ chip->bms_psy.set_property = qpnp_bms_power_set_property;
+ chip->bms_psy.external_power_changed =
+ qpnp_bms_external_power_changed;
+ chip->bms_psy.supplied_to = qpnp_bms_supplicants;
+ chip->bms_psy.num_supplicants = ARRAY_SIZE(qpnp_bms_supplicants);
+
+ rc = power_supply_register(chip->dev, &chip->bms_psy);
+
+ if (rc < 0) {
+ pr_err("power_supply_register bms failed rc = %d\n", rc);
+ goto unregister_dc;
+ }
+
+ pr_info("probe success\n");
+ return 0;
+
+unregister_dc:
+ power_supply_unregister(&chip->bms_psy);
+ dev_set_drvdata(&spmi->dev, NULL);
+error_read:
+ kfree(chip);
+ return rc;
+}
+
+static int __devexit
+qpnp_bms_remove(struct spmi_device *spmi)
+{
+ struct qpnp_bms_chip *chip = dev_get_drvdata(&spmi->dev);
+
+ dev_set_drvdata(&spmi->dev, NULL);
+ kfree(chip);
+ return 0;
+}
+
+static struct spmi_driver qpnp_bms_driver = {
+ .probe = qpnp_bms_probe,
+ .remove = __devexit_p(qpnp_bms_remove),
+ .driver = {
+ .name = QPNP_BMS_DEV_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = qpnp_bms_match_table,
+ },
+};
+
+static int __init qpnp_bms_init(void)
+{
+ pr_info("QPNP BMS INIT\n");
+ return spmi_driver_register(&qpnp_bms_driver);
+}
+
+static void __exit qpnp_bms_exit(void)
+{
+ pr_info("QPNP BMS EXIT\n");
+ return spmi_driver_unregister(&qpnp_bms_driver);
+}
+
+module_init(qpnp_bms_init);
+module_exit(qpnp_bms_exit);
+
+MODULE_DESCRIPTION("QPNP BMS Driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:" QPNP_BMS_DEV_NAME);
diff --git a/drivers/power/qpnp-charger.c b/drivers/power/qpnp-charger.c
new file mode 100644
index 0000000..dda8976
--- /dev/null
+++ b/drivers/power/qpnp-charger.c
@@ -0,0 +1,1259 @@
+/* Copyright (c) 2012 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#define pr_fmt(fmt) "%s: " fmt, __func__
+
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/spmi.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/radix-tree.h>
+#include <linux/interrupt.h>
+#include <linux/qpnp/qpnp-adc.h>
+#include <linux/power_supply.h>
+#include <linux/bitops.h>
+
+/* Interrupt offsets */
+#define INT_RT_STS(base) (base + 0x10)
+#define INT_SET_TYPE(base) (base + 0x11)
+#define INT_POLARITY_HIGH(base) (base + 0x12)
+#define INT_POLARITY_LOW(base) (base + 0x13)
+#define INT_LATCHED_CLR(base) (base + 0x14)
+#define INT_EN_SET(base) (base + 0x15)
+#define INT_EN_CLR(base) (base + 0x16)
+#define INT_LATCHED_STS(base) (base + 0x18)
+#define INT_PENDING_STS(base) (base + 0x19)
+#define INT_MID_SEL(base) (base + 0x1A)
+#define INT_PRIORITY(base) (base + 0x1B)
+
+/* Peripheral register offsets */
+#define CHGR_CHG_OPTION 0x08
+#define CHGR_ATC_STATUS 0x0A
+#define CHGR_VBAT_STATUS 0x0B
+#define CHGR_IBAT_BMS 0x0C
+#define CHGR_IBAT_STS 0x0D
+#define CHGR_VDD_MAX 0x40
+#define CHGR_VDD_SAFE 0x41
+#define CHGR_VDD_MAX_STEP 0x42
+#define CHGR_IBAT_MAX 0x44
+#define CHGR_IBAT_SAFE 0x45
+#define CHGR_VIN_MIN 0x47
+#define CHGR_VIN_MIN_STEP 0x48
+#define CHGR_CHG_CTRL 0x49
+#define CHGR_CHG_FAILED 0x4A
+#define CHGR_ATC_CTRL 0x4B
+#define CHGR_ATC_FAILED 0x4C
+#define CHGR_VBAT_TRKL 0x50
+#define CHGR_VBAT_WEAK 0x52
+#define CHGR_IBAT_ATC_A 0x54
+#define CHGR_IBAT_ATC_B 0x55
+#define CHGR_IBAT_TERM_CHGR 0x5B
+#define CHGR_IBAT_TERM_BMS 0x5C
+#define CHGR_VBAT_DET 0x5D
+#define CHGR_TTRKL_MAX 0x5F
+#define CHGR_TTRKL_MAX_EN 0x60
+#define CHGR_TCHG_MAX 0x61
+#define CHGR_CHG_WDOG_TIME 0x62
+#define CHGR_CHG_WDOG_DLY 0x63
+#define CHGR_CHG_WDOG_PET 0x64
+#define CHGR_CHG_WDOG_EN 0x65
+#define CHGR_USB_IUSB_MAX 0x44
+#define CHGR_USB_ENUM_T_STOP 0x4E
+#define CHGR_CHG_TEMP_THRESH 0x66
+#define CHGR_BAT_IF_PRES_STATUS 0x08
+#define CHGR_BAT_TEMP_STATUS 0x09
+#define CHGR_BAT_IF_VCP 0x42
+#define CHGR_BAT_IF_BATFET_CTRL1 0x90
+#define CHGR_MISC_BOOT_DONE 0x42
+#define MISC_REVISION2 0x01
+
+/* SMBB peripheral subtype values */
+#define REG_OFFSET_PERP_SUBTYPE 0x05
+#define SMBB_CHGR_SUBTYPE 0x01
+#define SMBB_BUCK_SUBTYPE 0x02
+#define SMBB_BAT_IF_SUBTYPE 0x03
+#define SMBB_USB_CHGPTH_SUBTYPE 0x04
+#define SMBB_DC_CHGPTH_SUBTYPE 0x05
+#define SMBB_BOOST_SUBTYPE 0x06
+#define SMBB_MISC_SUBTYPE 0x07
+
+#define QPNP_CHARGER_DEV_NAME "qcom,qpnp-charger"
+
+/* Interrupt definitions */
+/* smbb_chg_interrupts */
+#define CHG_DONE_IRQ BIT(7)
+#define CHG_FAILED_IRQ BIT(6)
+#define FAST_CHG_ON_IRQ BIT(5)
+#define TRKL_CHG_ON_IRQ BIT(4)
+#define STATE_CHANGE_ON_IR BIT(3)
+#define CHGWDDOG_IRQ BIT(2)
+#define VBAT_DET_HI_IRQ BIT(1)
+#define VBAT_DET_LOW_IRQ BIT(0)
+
+/* smbb_buck_interrupts */
+#define VDD_LOOP_IRQ BIT(6)
+#define IBAT_LOOP_IRQ BIT(5)
+#define ICHG_LOOP_IRQ BIT(4)
+#define VCHG_LOOP_IRQ BIT(3)
+#define OVERTEMP_IRQ BIT(2)
+#define VREF_OV_IRQ BIT(1)
+#define VBAT_OV_IRQ BIT(0)
+
+/* smbb_bat_if_interrupts */
+#define PSI_IRQ BIT(4)
+#define VCP_ON_IRQ BIT(3)
+#define BAT_FET_ON_IRQ BIT(2)
+#define BAT_TEMP_OK_IRQ BIT(1)
+#define BATT_PRES_IRQ BIT(0)
+
+/* smbb_usb_interrupts */
+#define CHG_GONE_IRQ BIT(2)
+#define USBIN_VALID_IRQ BIT(1)
+#define COARSE_DET_USB_IRQ BIT(0)
+
+/* smbb_dc_interrupts */
+#define DCIN_VALID_IRQ BIT(1)
+#define COARSE_DET_DC_IRQ BIT(0)
+
+/* smbb_boost_interrupts */
+#define LIMIT_ERROR_IRQ BIT(1)
+#define BOOST_PWR_OK_IRQ BIT(0)
+
+/* smbb_misc_interrupts */
+#define TFTWDOG_IRQ BIT(0)
+
+/**
+ * struct qpnp_chg_chip - device information
+ * @dev: device pointer to access the parent
+ * @spmi: spmi pointer to access spmi information
+ * @chgr_base: charger peripheral base address
+ * @buck_base: buck peripheral base address
+ * @bat_if_base: battery interface peripheral base address
+ * @usb_chgpth_base: USB charge path peripheral base address
+ * @dc_chgpth_base: DC charge path peripheral base address
+ * @boost_base: boost peripheral base address
+ * @misc_base: misc peripheral base address
+ * @freq_base: freq peripheral base address
+ * @chg_done: indicates that charging is completed
+ * @usb_present: present status of usb
+ * @dc_present: present status of dc
+ * @max_voltage_mv: the max volts the batt should be charged up to
+ * @min_voltage_mv: the min battery voltage before turning the FETon
+ * @term_current: the charging based term current
+ * @revision: PMIC revision
+ * @dc_psy power supply to export information to userspace
+ * @usb_psy power supply to export information to userspace
+ * @bms_psy power supply to export information to userspace
+ * @batt_psy: power supply to export information to userspace
+ *
+ */
+struct qpnp_chg_chip {
+ struct device *dev;
+ struct spmi_device *spmi;
+ u16 chgr_base;
+ u16 buck_base;
+ u16 bat_if_base;
+ u16 usb_chgpth_base;
+ u16 dc_chgpth_base;
+ u16 boost_base;
+ u16 misc_base;
+ u16 freq_base;
+ unsigned int usbin_valid_irq;
+ unsigned int chg_done_irq;
+ unsigned int chg_failed_irq;
+ bool chg_done;
+ bool usb_present;
+ bool dc_present;
+ unsigned int max_bat_chg_current;
+ unsigned int safe_voltage_mv;
+ unsigned int max_voltage_mv;
+ unsigned int min_voltage_mv;
+ unsigned int term_current;
+ unsigned int revision;
+ struct power_supply dc_psy;
+ struct power_supply *usb_psy;
+ struct power_supply *bms_psy;
+ struct power_supply batt_psy;
+};
+
+static struct qpnp_chg_chip *the_chip;
+static int charging_disabled;
+
+static struct of_device_id qpnp_charger_match_table[] = {
+ { .compatible = QPNP_CHARGER_DEV_NAME, },
+ {}
+};
+
+static int
+qpnp_chg_read(struct qpnp_chg_chip *chip, u8 *val,
+ u16 base, int count)
+{
+ int rc;
+ struct spmi_device *spmi = chip->spmi;
+
+ rc = spmi_ext_register_readl(spmi->ctrl, spmi->sid, base, val,
+ count);
+ if (rc) {
+ pr_err("SPMI read failed base=0x%02x sid=0x%02x rc=%d\n", base,
+ spmi->sid, rc);
+ return rc;
+ }
+ return 0;
+}
+
+static int
+qpnp_chg_write(struct qpnp_chg_chip *chip, u8 *val,
+ u16 base, int count)
+{
+ int rc;
+ struct spmi_device *spmi = chip->spmi;
+
+ rc = spmi_ext_register_writel(spmi->ctrl, spmi->sid, base, val,
+ count);
+ if (rc) {
+ pr_err("write failed base=0x%02x sid=0x%02x rc=%d\n",
+ base, spmi->sid, rc);
+ return rc;
+ }
+
+ return 0;
+}
+
+static int
+qpnp_chg_masked_write(struct qpnp_chg_chip *chip, u16 base,
+ u8 mask, u8 val, int count)
+{
+ int rc;
+ u8 reg;
+
+ rc = qpnp_chg_read(chip, ®, base, count);
+ if (rc) {
+ pr_err("spmi read failed: addr=%03X, rc=%d\n", base, rc);
+ return rc;
+ }
+ pr_debug("addr = 0x%x read 0x%x\n", base, reg);
+
+ reg &= ~mask;
+ reg |= val & mask;
+
+ pr_debug("Writing 0x%x\n", reg);
+
+ rc = qpnp_chg_write(chip, ®, base, count);
+ if (rc) {
+ pr_err("spmi write failed: addr=%03X, rc=%d\n", base, rc);
+ return rc;
+ }
+
+ return 0;
+}
+
+static int
+qpnp_chg_is_usb_chg_plugged_in(struct qpnp_chg_chip *chip)
+{
+ u8 usbin_valid_rt_sts;
+ int rc;
+
+ rc = qpnp_chg_read(chip, &usbin_valid_rt_sts,
+ INT_RT_STS(chip->usb_chgpth_base), 1);
+
+ if (rc) {
+ pr_err("spmi read failed: addr=%03X, rc=%d\n",
+ INT_RT_STS(chip->usb_chgpth_base), rc);
+ return rc;
+ }
+ pr_debug("chgr usb sts 0x%x\n", usbin_valid_rt_sts);
+
+ return (usbin_valid_rt_sts & USBIN_VALID_IRQ) ? 1 : 0;
+}
+
+static int
+qpnp_chg_is_dc_chg_plugged_in(struct qpnp_chg_chip *chip)
+{
+ u8 dcin_valid_rt_sts;
+ int rc;
+
+ rc = qpnp_chg_read(chip, &dcin_valid_rt_sts,
+ INT_RT_STS(chip->dc_chgpth_base), 1);
+ if (rc) {
+ pr_err("spmi read failed: addr=%03X, rc=%d\n",
+ INT_RT_STS(chip->dc_chgpth_base), rc);
+ return rc;
+ }
+
+ return (dcin_valid_rt_sts & DCIN_VALID_IRQ) ? 1 : 0;
+}
+
+#define VCP_IUSBMAX_SETTING_MA 2000
+#define QPNP_CHG_IUSB_MAX_MIN_100 100
+#define QPNP_CHG_IUSB_MAX_MIN_150 150
+#define QPNP_CHG_IUSB_MAX_MIN_MA 200
+#define QPNP_CHG_IUSB_MAX_MAX_MA 2500
+#define QPNP_CHG_IUSB_MAX_STEP_MA 100
+static int
+qpnp_chg_iusbmax_set(struct qpnp_chg_chip *chip, int mA)
+{
+ u8 usb_reg = 0;
+
+ if (mA == QPNP_CHG_IUSB_MAX_MIN_100) {
+ usb_reg = 0x00;
+ pr_debug("current=%d setting %02x\n", mA, usb_reg);
+ return qpnp_chg_write(chip, &usb_reg,
+ chip->usb_chgpth_base + CHGR_USB_IUSB_MAX, 1);
+ } else if (mA == QPNP_CHG_IUSB_MAX_MIN_150) {
+ usb_reg = 0x01;
+ pr_debug("current=%d setting %02x\n", mA, usb_reg);
+ return qpnp_chg_write(chip, &usb_reg,
+ chip->usb_chgpth_base + CHGR_USB_IUSB_MAX, 1);
+ }
+
+ if (mA < QPNP_CHG_IUSB_MAX_MIN_MA
+ || mA > QPNP_CHG_IUSB_MAX_MAX_MA) {
+ pr_err("bad mA=%d asked to set\n", mA);
+ return -EINVAL;
+ }
+
+ /* Hack for VCP issue make sure IUSBMAX setting
+ * is at least 2 A to not brown out device */
+ mA = VCP_IUSBMAX_SETTING_MA;
+
+ usb_reg = mA / QPNP_CHG_IUSB_MAX_STEP_MA;
+
+ pr_debug("current=%d setting 0x%x\n", mA, usb_reg);
+ return qpnp_chg_write(chip, &usb_reg,
+ chip->usb_chgpth_base + CHGR_USB_IUSB_MAX, 1);
+ pr_debug("done\n");
+ return 0;
+}
+
+#define ENUM_T_STOP_BIT BIT(0)
+static irqreturn_t
+qpnp_chg_usb_usbin_valid_irq_handler(int irq, void *_chip)
+{
+ struct qpnp_chg_chip *chip = _chip;
+ int usb_present;
+
+ usb_present = qpnp_chg_is_usb_chg_plugged_in(chip);
+ pr_debug("usbin-valid triggered: %d\n", usb_present);
+
+ if (chip->usb_present ^ usb_present) {
+ chip->usb_present = usb_present;
+ power_supply_set_present(chip->usb_psy,
+ chip->usb_present);
+ } else if (!(chip->usb_present && usb_present)) {
+ qpnp_chg_masked_write(chip,
+ chip->usb_chgpth_base + CHGR_USB_ENUM_T_STOP,
+ ENUM_T_STOP_BIT,
+ ENUM_T_STOP_BIT, 1);
+ }
+
+ return IRQ_HANDLED;
+}
+
+#define CHGR_CHG_FAILED_BIT BIT(7)
+static irqreturn_t
+qpnp_chg_chgr_chg_failed_irq_handler(int irq, void *_chip)
+{
+ struct qpnp_chg_chip *chip = _chip;
+ int rc, usb_present;
+
+ rc = qpnp_chg_masked_write(chip,
+ chip->usb_chgpth_base + CHGR_CHG_FAILED,
+ CHGR_CHG_FAILED_BIT,
+ CHGR_CHG_FAILED_BIT, 1);
+ if (rc)
+ pr_err("Failed to write chg_fail clear bit!\n");
+
+ /* Hack: recheck usbin_valid status after chg_fail triggered */
+ usb_present = qpnp_chg_is_usb_chg_plugged_in(chip);
+ pr_debug("usb_status: %d\n", usb_present);
+ if (usb_present)
+ qpnp_chg_usb_usbin_valid_irq_handler(chip->usbin_valid_irq,
+ _chip);
+
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t
+qpnp_chg_chgr_chg_done_irq_handler(int irq, void *_chip)
+{
+ struct qpnp_chg_chip *chip = _chip;
+
+ pr_debug("CHG_DONE IRQ triggered\n");
+ chip->chg_done = true;
+
+ return IRQ_HANDLED;
+}
+
+static enum power_supply_property pm_power_props_mains[] = {
+ POWER_SUPPLY_PROP_PRESENT,
+ POWER_SUPPLY_PROP_ONLINE,
+};
+
+static enum power_supply_property msm_batt_power_props[] = {
+ POWER_SUPPLY_PROP_STATUS,
+ POWER_SUPPLY_PROP_CHARGE_TYPE,
+ POWER_SUPPLY_PROP_HEALTH,
+ POWER_SUPPLY_PROP_PRESENT,
+ POWER_SUPPLY_PROP_TECHNOLOGY,
+ POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
+ POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
+ POWER_SUPPLY_PROP_VOLTAGE_NOW,
+ POWER_SUPPLY_PROP_CAPACITY,
+ POWER_SUPPLY_PROP_CURRENT_NOW,
+ POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
+ POWER_SUPPLY_PROP_TEMP,
+};
+
+static char *pm_power_supplied_to[] = {
+ "battery",
+};
+
+#define USB_WALL_THRESHOLD_MA 500
+static int
+qpnp_power_get_property_mains(struct power_supply *psy,
+ enum power_supply_property psp,
+ union power_supply_propval *val)
+{
+ struct qpnp_chg_chip *chip = container_of(psy, struct qpnp_chg_chip,
+ dc_psy);
+
+ switch (psp) {
+ case POWER_SUPPLY_PROP_PRESENT:
+ case POWER_SUPPLY_PROP_ONLINE:
+ val->intval = 0;
+ if (charging_disabled)
+ return 0;
+
+ val->intval = qpnp_chg_is_dc_chg_plugged_in(chip);
+ break;
+ default:
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static int
+get_prop_battery_voltage_now(struct qpnp_chg_chip *chip)
+{
+ int rc = 0;
+ struct qpnp_vadc_result results;
+
+ if (chip->revision > 0) {
+ rc = qpnp_vadc_read(VBAT_SNS, &results);
+ if (rc) {
+ pr_err("Unable to read vbat rc=%d\n", rc);
+ return 0;
+ }
+ return results.physical;
+ } else {
+ pr_err("vbat reading not supported for 1.0 rc=%d\n", rc);
+ return 0;
+ }
+}
+
+#define BATT_PRES_BIT BIT(7)
+static int
+get_prop_batt_present(struct qpnp_chg_chip *chip)
+{
+ u8 batt_present;
+ int rc;
+
+ rc = qpnp_chg_read(chip, &batt_present,
+ chip->bat_if_base + CHGR_BAT_IF_PRES_STATUS, 1);
+ if (rc) {
+ pr_err("Couldn't read battery status read failed rc=%d\n", rc);
+ return 0;
+ };
+ return (batt_present & BATT_PRES_BIT) ? 1 : 0;
+}
+
+#define BATT_TEMP_HOT BIT(6)
+#define BATT_TEMP_OK BIT(7)
+static int
+get_prop_batt_health(struct qpnp_chg_chip *chip)
+{
+ u8 batt_health;
+ int rc;
+
+ rc = qpnp_chg_read(chip, &batt_health,
+ chip->bat_if_base + CHGR_BAT_TEMP_STATUS, 1);
+ if (rc) {
+ pr_err("Couldn't read battery health read failed rc=%d\n", rc);
+ return POWER_SUPPLY_HEALTH_UNKNOWN;
+ };
+
+ if (BATT_TEMP_OK & batt_health)
+ return POWER_SUPPLY_HEALTH_GOOD;
+ if (BATT_TEMP_HOT & batt_health)
+ return POWER_SUPPLY_HEALTH_OVERHEAT;
+ else
+ return POWER_SUPPLY_HEALTH_COLD;
+}
+
+static int
+get_prop_charge_type(struct qpnp_chg_chip *chip)
+{
+ int rc;
+ u8 chgr_sts;
+
+ if (!get_prop_batt_present(chip))
+ return POWER_SUPPLY_CHARGE_TYPE_NONE;
+
+ rc = qpnp_chg_read(chip, &chgr_sts,
+ INT_RT_STS(chip->chgr_base), 1);
+ if (rc) {
+ pr_err("failed to read interrupt sts %d\n", rc);
+ return POWER_SUPPLY_CHARGE_TYPE_NONE;
+ }
+
+ if (chgr_sts & TRKL_CHG_ON_IRQ)
+ return POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
+ if (chgr_sts & FAST_CHG_ON_IRQ)
+ return POWER_SUPPLY_CHARGE_TYPE_FAST;
+
+ return POWER_SUPPLY_CHARGE_TYPE_NONE;
+}
+
+static int
+get_prop_batt_status(struct qpnp_chg_chip *chip)
+{
+ int rc;
+ u8 chgr_sts;
+
+ rc = qpnp_chg_read(chip, &chgr_sts,
+ INT_RT_STS(chip->chgr_base), 1);
+ if (rc) {
+ pr_err("failed to read interrupt sts %d\n", rc);
+ return POWER_SUPPLY_STATUS_DISCHARGING;
+ }
+
+ pr_debug("chgr sts 0x%x\n", chgr_sts);
+ if (chgr_sts & CHG_DONE_IRQ || chip->chg_done)
+ return POWER_SUPPLY_STATUS_FULL;
+ else
+ chip->chg_done = false;
+
+ if (chgr_sts & TRKL_CHG_ON_IRQ)
+ return POWER_SUPPLY_STATUS_CHARGING;
+ if (chgr_sts & FAST_CHG_ON_IRQ)
+ return POWER_SUPPLY_STATUS_CHARGING;
+
+ return POWER_SUPPLY_STATUS_DISCHARGING;
+}
+
+static int
+get_prop_current_now(struct qpnp_chg_chip *chip)
+{
+ union power_supply_propval ret = {0,};
+
+ if (chip->bms_psy) {
+ chip->bms_psy->get_property(chip->bms_psy,
+ POWER_SUPPLY_PROP_CURRENT_NOW, &ret);
+ return ret.intval;
+ } else {
+ pr_debug("No BMS supply registered return 0\n");
+ }
+
+ return 0;
+}
+
+static int
+get_prop_full_design(struct qpnp_chg_chip *chip)
+{
+ union power_supply_propval ret = {0,};
+
+ if (chip->bms_psy) {
+ chip->bms_psy->get_property(chip->bms_psy,
+ POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN, &ret);
+ return ret.intval;
+ } else {
+ pr_debug("No BMS supply registered return 0\n");
+ }
+
+ return 0;
+}
+
+#define DEFAULT_CAPACITY 50
+static int
+get_prop_capacity(struct qpnp_chg_chip *chip)
+{
+ union power_supply_propval ret = {0,};
+
+ if (chip->bms_psy) {
+ chip->bms_psy->get_property(chip->bms_psy,
+ POWER_SUPPLY_PROP_CAPACITY, &ret);
+ return ret.intval;
+ } else {
+ pr_debug("No BMS supply registered return 50\n");
+ }
+
+ /* return default capacity to avoid userspace
+ * from shutting down unecessarily */
+ return DEFAULT_CAPACITY;
+}
+
+#define DEFAULT_TEMP 25
+#define MAX_TOLERABLE_BATT_TEMP_DDC 680
+static int
+get_prop_batt_temp(struct qpnp_chg_chip *chip)
+{
+ int rc = 0;
+ struct qpnp_vadc_result results;
+
+ if (chip->revision > 0) {
+ rc = qpnp_vadc_read(LR_MUX1_BATT_THERM, &results);
+ if (rc) {
+ pr_debug("Unable to read batt temperature rc=%d\n", rc);
+ return 0;
+ }
+ pr_debug("get_bat_temp %d %lld\n",
+ results.adc_code, results.physical);
+ return (int)results.physical;
+ } else {
+ pr_debug("batt temp not supported for PMIC 1.0 rc=%d\n", rc);
+ }
+
+ /* return default temperature to avoid userspace
+ * from shutting down unecessarily */
+ return DEFAULT_TEMP;
+}
+
+static void
+qpnp_batt_external_power_changed(struct power_supply *psy)
+{
+ struct qpnp_chg_chip *chip = container_of(psy, struct qpnp_chg_chip,
+ batt_psy);
+ union power_supply_propval ret = {0,};
+
+ if (!chip->bms_psy)
+ chip->bms_psy = power_supply_get_by_name("bms");
+
+ chip->usb_psy->get_property(chip->usb_psy,
+ POWER_SUPPLY_PROP_ONLINE, &ret);
+
+ if (ret.intval && qpnp_chg_is_usb_chg_plugged_in(chip)) {
+ chip->usb_psy->get_property(chip->usb_psy,
+ POWER_SUPPLY_PROP_CURRENT_MAX, &ret);
+ qpnp_chg_iusbmax_set(chip, ret.intval / 1000);
+ } else {
+ qpnp_chg_iusbmax_set(chip, QPNP_CHG_IUSB_MAX_MIN_MA);
+ }
+
+ pr_debug("end of power supply changed\n");
+ power_supply_changed(&chip->batt_psy);
+}
+
+static int
+qpnp_batt_power_get_property(struct power_supply *psy,
+ enum power_supply_property psp,
+ union power_supply_propval *val)
+{
+ struct qpnp_chg_chip *chip = container_of(psy, struct qpnp_chg_chip,
+ batt_psy);
+
+ switch (psp) {
+ case POWER_SUPPLY_PROP_STATUS:
+ val->intval = get_prop_batt_status(chip);
+ break;
+ case POWER_SUPPLY_PROP_CHARGE_TYPE:
+ val->intval = get_prop_charge_type(chip);
+ break;
+ case POWER_SUPPLY_PROP_HEALTH:
+ val->intval = get_prop_batt_health(chip);
+ break;
+ case POWER_SUPPLY_PROP_PRESENT:
+ val->intval = get_prop_batt_present(chip);
+ break;
+ case POWER_SUPPLY_PROP_TECHNOLOGY:
+ val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
+ break;
+ case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
+ val->intval = chip->max_voltage_mv * 1000;
+ break;
+ case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
+ val->intval = chip->min_voltage_mv * 1000;
+ break;
+ case POWER_SUPPLY_PROP_VOLTAGE_NOW:
+ val->intval = get_prop_battery_voltage_now(chip);
+ break;
+ case POWER_SUPPLY_PROP_TEMP:
+ val->intval = get_prop_batt_temp(chip);
+ break;
+ case POWER_SUPPLY_PROP_CAPACITY:
+ val->intval = get_prop_capacity(chip);
+ break;
+ case POWER_SUPPLY_PROP_CURRENT_NOW:
+ val->intval = get_prop_current_now(chip);
+ break;
+ case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
+ val->intval = get_prop_full_design(chip);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+#define CHGR_BOOT_DONE BIT(7)
+#define CHGR_CHG_EN BIT(7)
+#define CHGR_ON_BAT_FORCE_BIT BIT(0)
+#define CHGR_BAT_IF_CONST_RDS_EN BIT(7)
+#define CHGR_BAT_IF_VCP_EN BIT(0)
+static int
+qpnp_chg_charge_dis(struct qpnp_chg_chip *chip, int disable)
+{
+ /* This bit forces the charger to run off of the battery rather
+ * than a connected charger */
+ return qpnp_chg_masked_write(chip, chip->chgr_base + CHGR_CHG_CTRL,
+ CHGR_ON_BAT_FORCE_BIT,
+ disable ? CHGR_ON_BAT_FORCE_BIT : 0, 1);
+}
+
+static int
+qpnp_chg_charge_en(struct qpnp_chg_chip *chip, int enable)
+{
+ return qpnp_chg_masked_write(chip, chip->chgr_base + CHGR_CHG_CTRL,
+ CHGR_CHG_EN,
+ enable ? CHGR_CHG_EN : 0, 1);
+}
+
+static int
+qpnp_chg_set_disable_status_param(const char *val, struct kernel_param *kp)
+{
+ int ret;
+ struct qpnp_chg_chip *chip = the_chip;
+
+ ret = param_set_int(val, kp);
+ if (ret) {
+ pr_err("error setting value %d\n", ret);
+ return ret;
+ }
+ pr_info("factory set disable param to %d\n", charging_disabled);
+ if (chip)
+ qpnp_chg_charge_dis(chip, charging_disabled);
+ return 0;
+}
+module_param_call(disabled, qpnp_chg_set_disable_status_param, param_get_uint,
+ &charging_disabled, 0644);
+
+#define QPNP_CHG_VINMIN_MIN_MV 3400
+#define QPNP_CHG_VINMIN_HIGH_MIN_MV 5600
+#define QPNP_CHG_VINMIN_HIGH_MIN_VAL 0x2B
+#define QPNP_CHG_VINMIN_MAX_MV 9600
+#define QPNP_CHG_VINMIN_STEP_MV 50
+#define QPNP_CHG_VINMIN_STEP_HIGH_MV 200
+#define QPNP_CHG_VINMIN_MASK 0x1F
+static int
+qpnp_chg_vinmin_set(struct qpnp_chg_chip *chip, int voltage)
+{
+ u8 temp;
+
+ if (voltage < QPNP_CHG_VINMIN_MIN_MV
+ || voltage > QPNP_CHG_VINMIN_MAX_MV) {
+ pr_err("bad mV=%d asked to set\n", voltage);
+ return -EINVAL;
+ }
+ if (voltage >= QPNP_CHG_VINMIN_HIGH_MIN_MV) {
+ temp = QPNP_CHG_VINMIN_HIGH_MIN_VAL;
+ temp += (voltage - QPNP_CHG_VINMIN_MIN_MV)
+ / QPNP_CHG_VINMIN_STEP_HIGH_MV;
+ } else {
+ temp = (voltage - QPNP_CHG_VINMIN_MIN_MV)
+ / QPNP_CHG_VINMIN_STEP_MV;
+ }
+
+ pr_debug("voltage=%d setting %02x\n", voltage, temp);
+ return qpnp_chg_masked_write(chip,
+ chip->chgr_base + CHGR_VIN_MIN,
+ QPNP_CHG_VINMIN_MASK, temp, 1);
+}
+
+
+#define QPNP_CHG_ITERM_MIN_MA 100
+#define QPNP_CHG_ITERM_MAX_MA 250
+#define QPNP_CHG_ITERM_STEP_MA 50
+#define QPNP_CHG_ITERM_MASK 0x03
+static int
+qpnp_chg_ibatterm_set(struct qpnp_chg_chip *chip, int term_current)
+{
+ u8 temp;
+
+ if (term_current < QPNP_CHG_ITERM_MIN_MA
+ || term_current > QPNP_CHG_ITERM_MAX_MA) {
+ pr_err("bad mA=%d asked to set\n", term_current);
+ return -EINVAL;
+ }
+
+ temp = (term_current - QPNP_CHG_ITERM_MIN_MA)
+ / QPNP_CHG_ITERM_STEP_MA;
+ return qpnp_chg_masked_write(chip,
+ chip->chgr_base + CHGR_IBAT_TERM_CHGR,
+ QPNP_CHG_ITERM_MASK, temp, 1);
+}
+
+#define QPNP_CHG_IBATMAX_MIN 100
+#define QPNP_CHG_IBATMAX_MAX 3250
+#define QPNP_CHG_I_STEP_MA 50
+#define QPNP_CHG_I_MIN_MA 100
+#define QPNP_CHG_I_MASK 0x3F
+static int
+qpnp_chg_ibatmax_set(struct qpnp_chg_chip *chip, int chg_current)
+{
+ u8 temp;
+
+ if (chg_current < QPNP_CHG_IBATMAX_MIN
+ || chg_current > QPNP_CHG_IBATMAX_MAX) {
+ pr_err("bad mA=%d asked to set\n", chg_current);
+ return -EINVAL;
+ }
+ temp = (chg_current - QPNP_CHG_I_MIN_MA) / QPNP_CHG_I_STEP_MA;
+ return qpnp_chg_masked_write(chip, chip->chgr_base + CHGR_IBAT_MAX,
+ QPNP_CHG_I_MASK, temp, 1);
+}
+
+
+#define QPNP_CHG_V_MIN_MV 3240
+#define QPNP_CHG_V_MAX_MV 4500
+#define QPNP_CHG_V_STEP_MV 10
+static int
+qpnp_chg_vddsafe_set(struct qpnp_chg_chip *chip, int voltage)
+{
+ u8 temp;
+
+ if (voltage < QPNP_CHG_V_MIN_MV
+ || voltage > QPNP_CHG_V_MAX_MV) {
+ pr_err("bad mV=%d asked to set\n", voltage);
+ return -EINVAL;
+ }
+ temp = (voltage - QPNP_CHG_V_MIN_MV) / QPNP_CHG_V_STEP_MV;
+ pr_debug("voltage=%d setting %02x\n", voltage, temp);
+ return qpnp_chg_write(chip, &temp,
+ chip->chgr_base + CHGR_VDD_SAFE, 1);
+}
+
+#define QPNP_CHG_VDDMAX_MIN 3400
+static int
+qpnp_chg_vddmax_set(struct qpnp_chg_chip *chip, int voltage)
+{
+ u8 temp = 0;
+
+ if (voltage < QPNP_CHG_VDDMAX_MIN
+ || voltage > QPNP_CHG_V_MAX_MV) {
+ pr_err("bad mV=%d asked to set\n", voltage);
+ return -EINVAL;
+ }
+
+ temp = (voltage - QPNP_CHG_V_MIN_MV) / QPNP_CHG_V_STEP_MV;
+
+ pr_debug("voltage=%d setting %02x\n", voltage, temp);
+ return qpnp_chg_write(chip, &temp,
+ chip->chgr_base + CHGR_VDD_MAX, 1);
+}
+
+#define WDOG_EN_BIT BIT(7)
+static int
+qpnp_chg_hwinit(struct qpnp_chg_chip *chip, u8 subtype,
+ struct spmi_resource *spmi_resource)
+{
+ int rc = 0;
+ u8 reg;
+
+ switch (subtype) {
+ case SMBB_CHGR_SUBTYPE:
+ chip->chg_done_irq = spmi_get_irq_byname(chip->spmi,
+ spmi_resource, "chg-done");
+ if (chip->chg_done_irq < 0) {
+ pr_err("Unable to get chg_done irq\n");
+ return -ENXIO;
+ }
+
+ chip->chg_failed_irq = spmi_get_irq_byname(chip->spmi,
+ spmi_resource, "chg-failed");
+ if (chip->chg_failed_irq < 0) {
+ pr_err("Unable to get chg_failed irq\n");
+ return -ENXIO;
+ }
+ rc |= devm_request_irq(chip->dev, chip->chg_done_irq,
+ qpnp_chg_chgr_chg_done_irq_handler,
+ IRQF_TRIGGER_RISING, "chg_done", chip);
+ if (rc < 0) {
+ pr_err("Can't request %d chg_done for chg: %d\n",
+ chip->chg_done_irq, rc);
+ return -ENXIO;
+ }
+ rc |= devm_request_irq(chip->dev, chip->chg_failed_irq,
+ qpnp_chg_chgr_chg_failed_irq_handler,
+ IRQF_TRIGGER_RISING, "chg_failed", chip);
+ if (rc < 0) {
+ pr_err("Can't request %d chg_failed chg: %d\n",
+ chip->chg_failed_irq, rc);
+ return -ENXIO;
+ }
+
+ rc = qpnp_chg_vinmin_set(chip, chip->min_voltage_mv);
+ if (rc) {
+ pr_debug("failed setting min_voltage rc=%d\n", rc);
+ return rc;
+ }
+ rc = qpnp_chg_vddmax_set(chip, chip->max_voltage_mv);
+ if (rc) {
+ pr_debug("failed setting max_voltage rc=%d\n", rc);
+ return rc;
+ }
+ rc = qpnp_chg_vddsafe_set(chip, chip->safe_voltage_mv);
+ if (rc) {
+ pr_debug("failed setting safe_voltage rc=%d\n", rc);
+ return rc;
+ }
+ rc = qpnp_chg_ibatmax_set(chip, chip->max_bat_chg_current);
+ if (rc) {
+ pr_debug("failed setting ibatmax rc=%d\n", rc);
+ return rc;
+ }
+ rc = qpnp_chg_ibatterm_set(chip, chip->term_current);
+ if (rc) {
+ pr_debug("failed setting ibatterm rc=%d\n", rc);
+ return rc;
+ }
+ /* HACK: Disable wdog */
+ rc = qpnp_chg_masked_write(chip, chip->chgr_base + 0x62,
+ 0xFF, 0xA0, 1);
+
+ /* HACK: use analog EOC */
+ rc = qpnp_chg_masked_write(chip, chip->chgr_base +
+ CHGR_IBAT_TERM_CHGR,
+ 0x80, 0x80, 1);
+
+ enable_irq_wake(chip->chg_done_irq);
+ break;
+ case SMBB_BUCK_SUBTYPE:
+ break;
+ case SMBB_BAT_IF_SUBTYPE:
+ /* HACK: Unlock secure access to override temp comparator */
+ rc = qpnp_chg_masked_write(chip,
+ chip->bat_if_base + 0xD0,
+ 0xA5, 0xA5, 1);
+ pr_debug("override hot cold\n");
+ rc = qpnp_chg_masked_write(chip,
+ chip->bat_if_base + 0xE5,
+ 0xFF, 0x28, 1);
+ break;
+ case SMBB_USB_CHGPTH_SUBTYPE:
+ chip->usbin_valid_irq = spmi_get_irq_byname(chip->spmi,
+ spmi_resource, "usbin-valid");
+ if (chip->usbin_valid_irq < 0) {
+ pr_err("Unable to get usbin irq\n");
+ return -ENXIO;
+ }
+ rc = devm_request_irq(chip->dev, chip->usbin_valid_irq,
+ qpnp_chg_usb_usbin_valid_irq_handler,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ "chg_usbin_valid", chip);
+ if (rc < 0) {
+ pr_err("Can't request %d usbinvalid for chg: %d\n",
+ chip->usbin_valid_irq, rc);
+ return -ENXIO;
+ }
+
+ enable_irq_wake(chip->usbin_valid_irq);
+ chip->usb_present = qpnp_chg_is_usb_chg_plugged_in(chip);
+ if (chip->usb_present) {
+ rc = qpnp_chg_masked_write(chip,
+ chip->usb_chgpth_base + CHGR_USB_ENUM_T_STOP,
+ ENUM_T_STOP_BIT,
+ ENUM_T_STOP_BIT, 1);
+ if (rc) {
+ pr_err("failed to write enum stop rc=%d\n", rc);
+ return -ENXIO;
+ }
+ }
+ break;
+ case SMBB_DC_CHGPTH_SUBTYPE:
+ break;
+ case SMBB_BOOST_SUBTYPE:
+ break;
+ case SMBB_MISC_SUBTYPE:
+ pr_debug("Setting BOOT_DONE\n");
+ rc = qpnp_chg_masked_write(chip,
+ chip->misc_base + CHGR_MISC_BOOT_DONE,
+ CHGR_BOOT_DONE, CHGR_BOOT_DONE, 1);
+ rc = qpnp_chg_read(chip, ®,
+ chip->misc_base + MISC_REVISION2, 1);
+ if (rc) {
+ pr_err("failed to read revision register rc=%d\n", rc);
+ return rc;
+ }
+
+ chip->revision = reg;
+ break;
+ default:
+ pr_err("Invalid peripheral subtype\n");
+ }
+ return rc;
+}
+
+static int __devinit
+qpnp_charger_probe(struct spmi_device *spmi)
+{
+ u8 subtype;
+ struct qpnp_chg_chip *chip;
+ struct resource *resource;
+ struct spmi_resource *spmi_resource;
+ int rc = 0;
+
+ chip = kzalloc(sizeof *chip, GFP_KERNEL);
+ if (chip == NULL) {
+ pr_err("kzalloc() failed.\n");
+ return -ENOMEM;
+ }
+
+ rc = qpnp_vadc_is_ready();
+ if (rc)
+ goto fail_chg_enable;
+
+ chip->dev = &(spmi->dev);
+ chip->spmi = spmi;
+
+ chip->usb_psy = power_supply_get_by_name("usb");
+ if (!chip->usb_psy) {
+ pr_err("usb supply not found deferring probe\n");
+ rc = -EPROBE_DEFER;
+ goto fail_chg_enable;
+ }
+
+ /* Get the vddmax property */
+ rc = of_property_read_u32(spmi->dev.of_node, "qcom,chg-vddmax-mv",
+ &chip->max_voltage_mv);
+ if (rc && rc != -EINVAL) {
+ pr_err("Error reading vddmax property %d\n", rc);
+ goto fail_chg_enable;
+ }
+
+ /* Get the vinmin property */
+ rc = of_property_read_u32(spmi->dev.of_node, "qcom,chg-vinmin-mv",
+ &chip->min_voltage_mv);
+ if (rc && rc != -EINVAL) {
+ pr_err("Error reading vddmax property %d\n", rc);
+ goto fail_chg_enable;
+ }
+
+ /* Get the vddmax property */
+ rc = of_property_read_u32(spmi->dev.of_node, "qcom,chg-vddsafe-mv",
+ &chip->safe_voltage_mv);
+ if (rc && rc != -EINVAL) {
+ pr_err("Error reading vddsave property %d\n", rc);
+ goto fail_chg_enable;
+ }
+
+ /* Get the ibatterm property */
+ rc = of_property_read_u32(spmi->dev.of_node,
+ "qcom,chg-ibatterm-ma",
+ &chip->term_current);
+ if (rc && rc != -EINVAL) {
+ pr_err("Error reading ibatterm property %d\n", rc);
+ goto fail_chg_enable;
+ }
+
+ /* Get the ibatmax property */
+ rc = of_property_read_u32(spmi->dev.of_node, "qcom,chg-ibatmax-ma",
+ &chip->max_bat_chg_current);
+ if (rc && rc != -EINVAL) {
+ pr_err("Error reading ibatmax property %d\n", rc);
+ goto fail_chg_enable;
+ }
+
+ spmi_for_each_container_dev(spmi_resource, spmi) {
+ if (!spmi_resource) {
+ pr_err("qpnp_chg: spmi resource absent\n");
+ rc = -ENXIO;
+ goto fail_chg_enable;
+ }
+
+ resource = spmi_get_resource(spmi, spmi_resource,
+ IORESOURCE_MEM, 0);
+ if (!(resource && resource->start)) {
+ pr_err("node %s IO resource absent!\n",
+ spmi->dev.of_node->full_name);
+ rc = -ENXIO;
+ goto fail_chg_enable;
+ }
+
+ rc = qpnp_chg_read(chip, &subtype,
+ resource->start + REG_OFFSET_PERP_SUBTYPE, 1);
+ if (rc) {
+ pr_err("Peripheral subtype read failed rc=%d\n", rc);
+ goto fail_chg_enable;
+ }
+
+ switch (subtype) {
+ case SMBB_CHGR_SUBTYPE:
+ chip->chgr_base = resource->start;
+ rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
+ if (rc) {
+ pr_err("Failed to init subtype 0x%x rc=%d\n",
+ subtype, rc);
+ goto fail_chg_enable;
+ }
+ break;
+ case SMBB_BUCK_SUBTYPE:
+ chip->buck_base = resource->start;
+ rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
+ if (rc) {
+ pr_err("Failed to init subtype 0x%x rc=%d\n",
+ subtype, rc);
+ goto fail_chg_enable;
+ }
+ break;
+ case SMBB_BAT_IF_SUBTYPE:
+ chip->bat_if_base = resource->start;
+ rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
+ if (rc) {
+ pr_err("Failed to init subtype 0x%x rc=%d\n",
+ subtype, rc);
+ goto fail_chg_enable;
+ }
+ break;
+ case SMBB_USB_CHGPTH_SUBTYPE:
+ chip->usb_chgpth_base = resource->start;
+ rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
+ if (rc) {
+ pr_err("Failed to init subtype 0x%x rc=%d\n",
+ subtype, rc);
+ goto fail_chg_enable;
+ }
+ break;
+ case SMBB_DC_CHGPTH_SUBTYPE:
+ chip->dc_chgpth_base = resource->start;
+ rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
+ if (rc) {
+ pr_err("Failed to init subtype 0x%x rc=%d\n",
+ subtype, rc);
+ goto fail_chg_enable;
+ }
+ break;
+ case SMBB_BOOST_SUBTYPE:
+ chip->boost_base = resource->start;
+ rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
+ if (rc) {
+ pr_err("Failed to init subtype 0x%x rc=%d\n",
+ subtype, rc);
+ goto fail_chg_enable;
+ }
+ break;
+ case SMBB_MISC_SUBTYPE:
+ chip->misc_base = resource->start;
+ rc = qpnp_chg_hwinit(chip, subtype, spmi_resource);
+ if (rc) {
+ pr_err("Failed to init subtype=0x%x rc=%d\n",
+ subtype, rc);
+ goto fail_chg_enable;
+ }
+ break;
+ default:
+ pr_err("Invalid peripheral subtype=0x%x\n", subtype);
+ rc = -EINVAL;
+ goto fail_chg_enable;
+ }
+ }
+ dev_set_drvdata(&spmi->dev, chip);
+ device_init_wakeup(&spmi->dev, 1);
+
+ chip->dc_psy.name = "qpnp-dc";
+ chip->dc_psy.type = POWER_SUPPLY_TYPE_MAINS;
+ chip->dc_psy.supplied_to = pm_power_supplied_to;
+ chip->dc_psy.num_supplicants = ARRAY_SIZE(pm_power_supplied_to);
+ chip->dc_psy.properties = pm_power_props_mains;
+ chip->dc_psy.num_properties = ARRAY_SIZE(pm_power_props_mains);
+ chip->dc_psy.get_property = qpnp_power_get_property_mains;
+
+ chip->batt_psy.name = "battery";
+ chip->batt_psy.type = POWER_SUPPLY_TYPE_BATTERY;
+ chip->batt_psy.properties = msm_batt_power_props;
+ chip->batt_psy.num_properties = ARRAY_SIZE(msm_batt_power_props);
+ chip->batt_psy.get_property = qpnp_batt_power_get_property;
+ chip->batt_psy.external_power_changed =
+ qpnp_batt_external_power_changed;
+
+ rc = power_supply_register(chip->dev, &chip->dc_psy);
+ if (rc < 0) {
+ pr_err("power_supply_register usb failed rc = %d\n", rc);
+ goto fail_chg_enable;
+ }
+
+ rc = power_supply_register(chip->dev, &chip->batt_psy);
+ if (rc < 0) {
+ pr_err("power_supply_register batt failed rc = %d\n", rc);
+ goto unregister_dc;
+ }
+
+ power_supply_set_present(chip->usb_psy,
+ qpnp_chg_is_usb_chg_plugged_in(chip));
+
+ qpnp_chg_charge_en(chip, 1);
+ the_chip = chip;
+ pr_info("Probe success !\n");
+ return 0;
+
+unregister_dc:
+ power_supply_unregister(&chip->dc_psy);
+fail_chg_enable:
+ kfree(chip);
+ dev_set_drvdata(&spmi->dev, NULL);
+ return rc;
+}
+
+static int __devexit
+qpnp_charger_remove(struct spmi_device *spmi)
+{
+ struct qpnp_chg_chip *chip = dev_get_drvdata(&spmi->dev);
+
+ dev_set_drvdata(&spmi->dev, NULL);
+ kfree(chip);
+
+ return 0;
+}
+
+static struct spmi_driver qpnp_charger_driver = {
+ .probe = qpnp_charger_probe,
+ .remove = __devexit_p(qpnp_charger_remove),
+ .driver = {
+ .name = QPNP_CHARGER_DEV_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = qpnp_charger_match_table,
+ },
+};
+
+/**
+ * qpnp_chg_init() - register spmi driver for qpnp-chg
+ */
+int __init
+qpnp_chg_init(void)
+{
+ return spmi_driver_register(&qpnp_charger_driver);
+}
+module_init(qpnp_chg_init);
+
+static void __exit
+qpnp_chg_exit(void)
+{
+ spmi_driver_unregister(&qpnp_charger_driver);
+}
+module_exit(qpnp_chg_exit);
+
+
+MODULE_DESCRIPTION("QPNP charger driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:" QPNP_CHARGER_DEV_NAME);
diff --git a/drivers/slimbus/slim-msm-ctrl.c b/drivers/slimbus/slim-msm-ctrl.c
index 6cddf2d..e2f37cc 100644
--- a/drivers/slimbus/slim-msm-ctrl.c
+++ b/drivers/slimbus/slim-msm-ctrl.c
@@ -699,7 +699,8 @@
for (i = 0; i < 6; i++)
e_addr[i] = buf[7-i];
- ret = slim_assign_laddr(&dev->ctrl, e_addr, 6, &laddr);
+ ret = slim_assign_laddr(&dev->ctrl, e_addr, 6, &laddr,
+ false);
/* Is this Qualcomm ported generic device? */
if (!ret && e_addr[5] == QC_MFGID_LSB &&
e_addr[4] == QC_MFGID_MSB &&
diff --git a/drivers/slimbus/slimbus.c b/drivers/slimbus/slimbus.c
index da2a30d..bd25875 100644
--- a/drivers/slimbus/slimbus.c
+++ b/drivers/slimbus/slimbus.c
@@ -681,13 +681,13 @@
}
static int ctrl_getlogical_addr(struct slim_controller *ctrl, const u8 *eaddr,
- u8 e_len, u8 *laddr)
+ u8 e_len, u8 *entry)
{
u8 i;
for (i = 0; i < ctrl->num_dev; i++) {
if (ctrl->addrt[i].valid &&
memcmp(ctrl->addrt[i].eaddr, eaddr, e_len) == 0) {
- *laddr = i;
+ *entry = i;
return 0;
}
}
@@ -699,23 +699,28 @@
* @ctrl: Controller with which device is enumerated.
* @e_addr: 6-byte elemental address of the device.
* @e_len: buffer length for e_addr
- * @laddr: Return logical address.
+ * @laddr: Return logical address (if valid flag is false)
+ * @valid: true if laddr holds a valid address that controller wants to
+ * set for this enumeration address. Otherwise framework sets index into
+ * address table as logical address.
* Called by controller in response to REPORT_PRESENT. Framework will assign
* a logical address to this enumeration address.
* Function returns -EXFULL to indicate that all logical addresses are already
* taken.
*/
int slim_assign_laddr(struct slim_controller *ctrl, const u8 *e_addr,
- u8 e_len, u8 *laddr)
+ u8 e_len, u8 *laddr, bool valid)
{
int ret;
u8 i = 0;
+ bool exists = false;
struct slim_device *sbdev;
mutex_lock(&ctrl->m_ctrl);
/* already assigned */
- if (ctrl_getlogical_addr(ctrl, e_addr, e_len, laddr) == 0)
- i = *laddr;
- else {
+ if (ctrl_getlogical_addr(ctrl, e_addr, e_len, &i) == 0) {
+ *laddr = ctrl->addrt[i].laddr;
+ exists = true;
+ } else {
if (ctrl->num_dev >= 254) {
ret = -EXFULL;
goto ret_assigned_laddr;
@@ -737,22 +742,26 @@
}
memcpy(ctrl->addrt[i].eaddr, e_addr, e_len);
ctrl->addrt[i].valid = true;
+ /* Preferred address is index into table */
+ if (!valid)
+ *laddr = i;
}
- ret = ctrl->set_laddr(ctrl, ctrl->addrt[i].eaddr, 6, i);
+ ret = ctrl->set_laddr(ctrl, (const u8 *)&ctrl->addrt[i].eaddr, 6,
+ *laddr);
if (ret) {
ctrl->addrt[i].valid = false;
goto ret_assigned_laddr;
}
- *laddr = i;
+ ctrl->addrt[i].laddr = *laddr;
- dev_dbg(&ctrl->dev, "setting slimbus l-addr:%x\n", i);
+ dev_dbg(&ctrl->dev, "setting slimbus l-addr:%x\n", *laddr);
ret_assigned_laddr:
mutex_unlock(&ctrl->m_ctrl);
- if (ret)
+ if (exists || ret)
return ret;
- pr_info("slimbus laddr:0x%x, EAPC:0x%x:0x%x", i,
+ pr_info("slimbus:%d laddr:0x%x, EAPC:0x%x:0x%x", ctrl->nr, *laddr,
e_addr[1], e_addr[2]);
mutex_lock(&ctrl->m_ctrl);
list_for_each_entry(sbdev, &ctrl->devs, dev_list) {
@@ -785,12 +794,21 @@
u8 e_len, u8 *laddr)
{
int ret = 0;
+ u8 entry;
struct slim_controller *ctrl = sb->ctrl;
if (!ctrl || !laddr || !e_addr || e_len != 6)
return -EINVAL;
mutex_lock(&ctrl->m_ctrl);
- ret = ctrl_getlogical_addr(ctrl, e_addr, e_len, laddr);
+ ret = ctrl_getlogical_addr(ctrl, e_addr, e_len, &entry);
+ if (!ret)
+ *laddr = ctrl->addrt[entry].laddr;
mutex_unlock(&ctrl->m_ctrl);
+ if (ret == -ENXIO && ctrl->get_laddr) {
+ ret = ctrl->get_laddr(ctrl, e_addr, e_len, laddr);
+ if (!ret)
+ ret = slim_assign_laddr(ctrl, e_addr, e_len, laddr,
+ true);
+ }
return ret;
}
EXPORT_SYMBOL_GPL(slim_get_logical_addr);
@@ -943,8 +961,6 @@
u16 ec;
u8 tid, mlen = 6;
- if (sbdev->laddr != SLIM_LA_MANAGER && sbdev->laddr >= ctrl->num_dev)
- return -ENXIO;
ret = slim_ele_access_sanity(msg, mc, rbuf, wbuf, len);
if (ret)
goto xfer_err;
@@ -2641,7 +2657,15 @@
slc->state = SLIM_CH_SUSPENDED;
}
- ret = slim_allocbw(sb, &subframe, &clkgear);
+ /*
+ * Controller can override default channel scheduling algorithm.
+ * (e.g. if controller needs to use fixed channel scheduling based
+ * on number of channels)
+ */
+ if (ctrl->allocbw)
+ ret = ctrl->allocbw(sb, &subframe, &clkgear);
+ else
+ ret = slim_allocbw(sb, &subframe, &clkgear);
if (!ret) {
ret = slim_processtxn(ctrl, SLIM_MSG_DEST_BROADCAST,
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
index 8724138..c32978e 100644
--- a/drivers/spmi/Kconfig
+++ b/drivers/spmi/Kconfig
@@ -21,7 +21,6 @@
config MSM_QPNP_INT
depends on SPARSE_IRQ
- depends on ARCH_MSM8974
depends on SPMI
depends on OF_SPMI
bool "MSM QPNP INT"
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index 45429a1..d099074 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -100,6 +100,7 @@
void __iomem *base;
void __iomem *intr;
int pic_irq;
+ bool allow_wakeup;
spinlock_t lock;
u8 owner;
u8 channel;
@@ -638,10 +639,14 @@
return -ENODEV;
pmic_arb->channel = (u8)prop;
- ret = irq_set_irq_wake(pmic_arb->pic_irq, 1);
- if (unlikely(ret)) {
- pr_err("Unable to set wakeup irq, err=%d\n", ret);
- return -ENODEV;
+ pmic_arb->allow_wakeup = !of_property_read_bool(pdev->dev.of_node,
+ "qcom,not-wakeup");
+ if (pmic_arb->allow_wakeup) {
+ ret = irq_set_irq_wake(pmic_arb->pic_irq, 1);
+ if (unlikely(ret)) {
+ pr_err("Unable to set wakeup irq, err=%d\n", ret);
+ return -ENODEV;
+ }
}
pmic_arb->dev = &pdev->dev;
@@ -685,7 +690,8 @@
spmi_del_controller(&pmic_arb->controller);
err_add_controller:
platform_set_drvdata(pdev, NULL);
- irq_set_irq_wake(pmic_arb->pic_irq, 0);
+ if (pmic_arb->allow_wakeup)
+ irq_set_irq_wake(pmic_arb->pic_irq, 0);
return ret;
}
@@ -693,7 +699,8 @@
{
struct spmi_pmic_arb_dev *pmic_arb = platform_get_drvdata(pdev);
- irq_set_irq_wake(pmic_arb->pic_irq, 0);
+ if (pmic_arb->allow_wakeup)
+ irq_set_irq_wake(pmic_arb->pic_irq, 0);
platform_set_drvdata(pdev, NULL);
spmi_del_controller(&pmic_arb->controller);
return 0;
diff --git a/drivers/thermal/msm8960_tsens.c b/drivers/thermal/msm8960_tsens.c
index 0c49a89..f60e318 100644
--- a/drivers/thermal/msm8960_tsens.c
+++ b/drivers/thermal/msm8960_tsens.c
@@ -907,17 +907,6 @@
return 0;
}
-static int tsens_check_version_support(void)
-{
- int rc = 0;
-
- if (tmdev->hw_type == MSM_8960)
- if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 1)
- rc = -ENODEV;
-
- return rc;
-}
-
static int tsens_calib_sensors(void)
{
int rc = -ENODEV;
@@ -955,13 +944,6 @@
tmdev->tsens_num_sensor = pdata->tsens_num_sensor;
tmdev->hw_type = pdata->hw_type;
- rc = tsens_check_version_support();
- if (rc < 0) {
- kfree(tmdev);
- tmdev = NULL;
- return rc;
- }
-
rc = tsens_calib_sensors();
if (rc < 0) {
kfree(tmdev);
diff --git a/drivers/thermal/msm8974-tsens.c b/drivers/thermal/msm8974-tsens.c
index 7169dc0..77cc1f9 100644
--- a/drivers/thermal/msm8974-tsens.c
+++ b/drivers/thermal/msm8974-tsens.c
@@ -10,6 +10,9 @@
* GNU General Public License for more details.
*
*/
+
+#define pr_fmt(fmt) "%s: " fmt, __func__
+
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/thermal.h>
@@ -743,8 +746,7 @@
IORESOURCE_MEM, "tsens_physical");
if (!tmdev->res_tsens_mem) {
pr_err("Could not get tsens physical address resource\n");
- rc = -EINVAL;
- goto fail_free_irq;
+ return -EINVAL;
}
tmdev->tsens_len = tmdev->res_tsens_mem->end -
@@ -754,8 +756,7 @@
tmdev->tsens_len, tmdev->res_tsens_mem->name);
if (!res_mem) {
pr_err("Request tsens physical memory region failed\n");
- rc = -EINVAL;
- goto fail_free_irq;
+ return -EINVAL;
}
tmdev->tsens_addr = ioremap(res_mem->start, tmdev->tsens_len);
@@ -805,9 +806,6 @@
if (tmdev->res_tsens_mem)
release_mem_region(tmdev->res_tsens_mem->start,
tmdev->tsens_len);
-fail_free_irq:
- free_irq(tmdev->tsens_irq, tmdev);
-
return rc;
}
@@ -827,8 +825,10 @@
tmdev->pdev = pdev;
rc = tsens_calib_sensors();
- if (rc < 0)
+ if (rc < 0) {
+ pr_err("Calibration failed\n");
goto fail;
+ }
tsens_hw_init();
@@ -848,8 +848,7 @@
if (tmdev->res_tsens_mem)
release_mem_region(tmdev->res_tsens_mem->start,
tmdev->tsens_len);
- free_irq(tmdev->tsens_irq, tmdev);
- kfree(tmdev);
+ tmdev = NULL;
return rc;
}
@@ -930,7 +929,6 @@
tmdev->tsens_len);
free_irq(tmdev->tsens_irq, tmdev);
platform_set_drvdata(pdev, NULL);
- kfree(tmdev);
return 0;
}
diff --git a/drivers/tty/smux_ctl.c b/drivers/tty/smux_ctl.c
index 7e0e6f8..c17495b 100644
--- a/drivers/tty/smux_ctl.c
+++ b/drivers/tty/smux_ctl.c
@@ -770,12 +770,13 @@
poll_wait(file, &devp->read_wait_queue, wait);
readable = smux_ctl_readable(devp->id);
- if (readable < 0) {
+ if (readable > 0) {
+ mask = POLLIN | POLLRDNORM;
+ } else if ((readable < 0) && (readable != -ERESTARTSYS)) {
+ /* error case (non-signal) received */
pr_err(SMUX_CTL_MODULE_NAME ": %s err%d during poll for smuxctl%d\n",
__func__, readable, devp->id);
mask = POLLERR;
- } else if (readable) {
- mask = POLLIN | POLLRDNORM;
}
return mask;
diff --git a/drivers/usb/core/driver.c b/drivers/usb/core/driver.c
index 19e1244..a292416 100644
--- a/drivers/usb/core/driver.c
+++ b/drivers/usb/core/driver.c
@@ -1357,6 +1357,9 @@
{
struct usb_device *udev = to_usb_device(dev);
+ if (udev->bus->skip_resume && udev->state == USB_STATE_SUSPENDED)
+ return 0;
+
unbind_no_pm_drivers_interfaces(udev);
/* From now on we are sure all drivers support suspend/resume
@@ -1386,6 +1389,15 @@
struct usb_device *udev = to_usb_device(dev);
int status;
+ /*
+ * Some buses would like to keep their devices in suspend
+ * state after system resume. Their resume happen when
+ * a remote wakeup is detected or interface driver start
+ * I/O.
+ */
+ if (udev->bus->skip_resume)
+ return 0;
+
/* For all calls, take the device back to full power and
* tell the PM core in case it was autosuspended previously.
* Unbind the interfaces that will need rebinding later,
diff --git a/drivers/usb/gadget/android.c b/drivers/usb/gadget/android.c
index a6eb335..817bfbb 100644
--- a/drivers/usb/gadget/android.c
+++ b/drivers/usb/gadget/android.c
@@ -71,15 +71,19 @@
#define USB_ETH_RNDIS y
#include "f_rndis.c"
#include "rndis.c"
-#include "u_ether.c"
#include "u_bam_data.c"
#include "f_mbim.c"
#include "f_qc_ecm.c"
#include "f_qc_rndis.c"
+#include "u_ether.c"
#include "u_qc_ether.c"
#ifdef CONFIG_TARGET_CORE
#include "f_tcm.c"
#endif
+#ifdef CONFIG_SND_PCM
+#include "u_uac1.c"
+#include "f_uac1.c"
+#endif
MODULE_AUTHOR("Mike Lockwood");
MODULE_DESCRIPTION("Android Composite USB Driver");
@@ -702,6 +706,20 @@
.init = mbim_function_init,
};
+#ifdef CONFIG_SND_PCM
+/* PERIPHERAL AUDIO */
+static int audio_function_bind_config(struct android_usb_function *f,
+ struct usb_configuration *c)
+{
+ return audio_bind_config(c);
+}
+
+static struct android_usb_function audio_function = {
+ .name = "audio",
+ .bind_config = audio_function_bind_config,
+};
+#endif
+
/* DIAG */
static char diag_clients[32]; /*enabled DIAG clients- "diag[,diag_mdm]" */
@@ -1506,6 +1524,9 @@
static struct android_usb_function *supported_functions[] = {
&mbim_function,
&ecm_qc_function,
+#ifdef CONFIG_SND_PCM
+ &audio_function,
+#endif
&rmnet_smd_function,
&rmnet_sdio_function,
&rmnet_smd_sdio_function,
@@ -2116,7 +2137,6 @@
gadget->ep0->driver_data = cdev;
list_for_each_entry(conf, &dev->configs, list_item)
- if (&conf->usb_config == cdev->config)
list_for_each_entry(f,
&conf->enabled_functions,
enabled_list)
diff --git a/drivers/usb/gadget/ci13xxx_udc.c b/drivers/usb/gadget/ci13xxx_udc.c
index 5b39336..0ace679 100644
--- a/drivers/usb/gadget/ci13xxx_udc.c
+++ b/drivers/usb/gadget/ci13xxx_udc.c
@@ -2575,7 +2575,7 @@
int retval = 0;
unsigned long flags;
- trace("%p, %p", ep, desc);
+ trace("ep = %p, desc = %p", ep, desc);
if (ep == NULL || desc == NULL)
return -EINVAL;
@@ -2601,9 +2601,10 @@
if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
mEp->qh.ptr->cap |= QH_IOS;
- else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
+ else if (mEp->type == USB_ENDPOINT_XFER_ISOC) {
mEp->qh.ptr->cap &= ~QH_MULT;
- else
+ mEp->qh.ptr->cap |= BIT(30);
+ } else
mEp->qh.ptr->cap |= QH_ZLT;
mEp->qh.ptr->cap |=
@@ -2660,6 +2661,7 @@
mEp->desc = NULL;
mEp->ep.desc = NULL;
+ mEp->ep.maxpacket = USHRT_MAX;
spin_unlock_irqrestore(mEp->lock, flags);
return retval;
@@ -3134,7 +3136,8 @@
mEp->ep.name = mEp->name;
mEp->ep.ops = &usb_ep_ops;
- mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
+ mEp->ep.maxpacket =
+ k ? USHRT_MAX : CTRL_PAYLOAD_MAX;
INIT_LIST_HEAD(&mEp->qh.queue);
spin_unlock_irqrestore(udc->lock, flags);
diff --git a/drivers/usb/gadget/f_adb.c b/drivers/usb/gadget/f_adb.c
index 9778673..045fc6c 100644
--- a/drivers/usb/gadget/f_adb.c
+++ b/drivers/usb/gadget/f_adb.c
@@ -301,7 +301,7 @@
requeue_req:
/* queue a request */
req = dev->rx_req;
- req->length = count;
+ req->length = ADB_BULK_BUFFER_SIZE;
dev->rx_done = 0;
ret = usb_ep_queue(dev->ep_out, req, GFP_ATOMIC);
if (ret < 0) {
diff --git a/drivers/usb/gadget/f_mbim.c b/drivers/usb/gadget/f_mbim.c
index 6883b78..7a84ca3 100644
--- a/drivers/usb/gadget/f_mbim.c
+++ b/drivers/usb/gadget/f_mbim.c
@@ -67,8 +67,8 @@
};
struct f_mbim {
- struct usb_function function;
- struct usb_composite_dev *cdev;
+ struct usb_function function;
+ struct usb_composite_dev *cdev;
atomic_t online;
bool is_open;
@@ -1255,6 +1255,20 @@
pr_info("mbim deactivated\n");
}
+#define MBIM_ACTIVE_PORT 0
+
+static void mbim_suspend(struct usb_function *f)
+{
+ pr_info("mbim suspended\n");
+ bam_data_suspend(MBIM_ACTIVE_PORT);
+}
+
+static void mbim_resume(struct usb_function *f)
+{
+ pr_info("mbim resumed\n");
+ bam_data_resume(MBIM_ACTIVE_PORT);
+}
+
/*---------------------- function driver setup/binding ---------------------*/
static int
@@ -1288,6 +1302,8 @@
mbim_data_intf.bInterfaceNumber = status;
mbim_union_desc.bSlaveInterface0 = status;
+ mbim->bam_port.cdev = cdev;
+
status = -ENODEV;
/* allocate instance-specific endpoints */
@@ -1461,6 +1477,8 @@
mbim->function.get_alt = mbim_get_alt;
mbim->function.setup = mbim_setup;
mbim->function.disable = mbim_disable;
+ mbim->function.suspend = mbim_suspend;
+ mbim->function.resume = mbim_resume;
INIT_LIST_HEAD(&mbim->cpkt_req_q);
INIT_LIST_HEAD(&mbim->cpkt_resp_q);
diff --git a/drivers/usb/gadget/f_qc_ecm.c b/drivers/usb/gadget/f_qc_ecm.c
index 98a29ae..1c64955 100644
--- a/drivers/usb/gadget/f_qc_ecm.c
+++ b/drivers/usb/gadget/f_qc_ecm.c
@@ -305,7 +305,7 @@
{
int ret;
- ecm_qc_bam_port.func = dev->port.func;
+ ecm_qc_bam_port.cdev = dev->port.func.config->cdev;
ecm_qc_bam_port.in = dev->port.in_ep;
ecm_qc_bam_port.out = dev->port.out_ep;
@@ -403,6 +403,8 @@
static void ecm_qc_notify_complete(struct usb_ep *ep, struct usb_request *req)
{
struct f_ecm_qc *ecm = req->context;
+ struct usb_composite_dev *cdev = ecm->port.func.config->cdev;
+ struct usb_cdc_notification *event = req->buf;
switch (req->status) {
case 0:
@@ -584,6 +586,7 @@
static void ecm_qc_disable(struct usb_function *f)
{
struct f_ecm_qc *ecm = func_to_ecm_qc(f);
+ struct usb_composite_dev *cdev = ecm->port.func.config->cdev;
DBG(cdev, "ecm deactivated\n");
diff --git a/drivers/usb/gadget/f_qc_rndis.c b/drivers/usb/gadget/f_qc_rndis.c
index a740d95..7a181eb 100644
--- a/drivers/usb/gadget/f_qc_rndis.c
+++ b/drivers/usb/gadget/f_qc_rndis.c
@@ -417,7 +417,7 @@
{
int ret;
- rndis_qc_bam_port.func = dev->port.func;
+ rndis_qc_bam_port.cdev = dev->port.func.config->cdev;
rndis_qc_bam_port.in = dev->port.in_ep;
rndis_qc_bam_port.out = dev->port.out_ep;
@@ -512,8 +512,9 @@
static void rndis_qc_response_complete(struct usb_ep *ep,
struct usb_request *req)
{
- struct f_rndis_qc *rndis = req->context;
+ struct f_rndis_qc *rndis = req->context;
int status = req->status;
+ struct usb_composite_dev *cdev = rndis->port.func.config->cdev;
/* after TX:
* - USB_CDC_GET_ENCAPSULATED_RESPONSE (ep0/control)
diff --git a/drivers/usb/gadget/f_rmnet_smd.c b/drivers/usb/gadget/f_rmnet_smd.c
index b71f646..5e2c6ed 100644
--- a/drivers/usb/gadget/f_rmnet_smd.c
+++ b/drivers/usb/gadget/f_rmnet_smd.c
@@ -907,13 +907,14 @@
* Register platform driver to be notified in case SMD channels
* later becomes ready to be opened.
*/
- ret = platform_driver_register(&dev->pdrv);
- if (ret)
- ERROR(cdev, "Platform driver %s register failed %d\n",
- dev->pdrv.driver.name, ret);
- else
- dev->is_pdrv_used = 1;
-
+ if (!dev->is_pdrv_used) {
+ ret = platform_driver_register(&dev->pdrv);
+ if (ret)
+ ERROR(cdev, "pdrv %s register failed %d\n",
+ dev->pdrv.driver.name, ret);
+ else
+ dev->is_pdrv_used = 1;
+ }
return;
}
wait_event(dev->smd_ctl.wait, test_bit(CH_OPENED,
diff --git a/drivers/usb/gadget/f_uac1.c b/drivers/usb/gadget/f_uac1.c
index 1a5dcd5..b385592 100644
--- a/drivers/usb/gadget/f_uac1.c
+++ b/drivers/usb/gadget/f_uac1.c
@@ -1,6 +1,7 @@
/*
* f_audio.c -- USB Audio class function driver
- *
+ *
+ * Copyright (c) 2012, The Linux Foundation. All rights reserved.
* Copyright (C) 2008 Bryan Wu <cooloney@kernel.org>
* Copyright (C) 2008 Analog Devices, Inc
*
@@ -9,29 +10,21 @@
* Licensed under the GPL-2 or later.
*/
+#ifdef pr_fmt
+#undef pr_fmt
+#endif
+#define pr_fmt(fmt) "%s: " fmt, __func__
+
#include <linux/slab.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/atomic.h>
+#include <sound/core.h>
+#include <sound/initval.h>
+
#include "u_uac1.h"
-#define OUT_EP_MAX_PACKET_SIZE 200
-static int req_buf_size = OUT_EP_MAX_PACKET_SIZE;
-module_param(req_buf_size, int, S_IRUGO);
-MODULE_PARM_DESC(req_buf_size, "ISO OUT endpoint request buffer size");
-
-static int req_count = 256;
-module_param(req_count, int, S_IRUGO);
-MODULE_PARM_DESC(req_count, "ISO OUT endpoint request count");
-
-static int audio_buf_size = 48000;
-module_param(audio_buf_size, int, S_IRUGO);
-MODULE_PARM_DESC(audio_buf_size, "Audio buffer size");
-
-static int generic_set_cmd(struct usb_audio_control *con, u8 cmd, int value);
-static int generic_get_cmd(struct usb_audio_control *con, u8 cmd);
-
/*
* DESCRIPTORS ... most are static, but strings and full
* configuration descriptors are built on demand.
@@ -39,180 +32,376 @@
/*
* We have two interfaces- AudioControl and AudioStreaming
- * TODO: only supcard playback currently
*/
-#define F_AUDIO_AC_INTERFACE 0
-#define F_AUDIO_AS_INTERFACE 1
-#define F_AUDIO_NUM_INTERFACES 2
+#define PLAYBACK_EP_MAX_PACKET_SIZE 32
+static int req_playback_buf_size = PLAYBACK_EP_MAX_PACKET_SIZE;
+module_param(req_playback_buf_size, int, S_IRUGO);
+MODULE_PARM_DESC(req_playback_buf_size, "ISO OUT endpoint (playback) request buffer size");
-/* B.3.1 Standard AC Interface Descriptor */
-static struct usb_interface_descriptor ac_interface_desc __initdata = {
- .bLength = USB_DT_INTERFACE_SIZE,
- .bDescriptorType = USB_DT_INTERFACE,
- .bNumEndpoints = 0,
- .bInterfaceClass = USB_CLASS_AUDIO,
- .bInterfaceSubClass = USB_SUBCLASS_AUDIOCONTROL,
-};
+static int req_playback_count = 48;
+module_param(req_playback_count, int, S_IRUGO);
+MODULE_PARM_DESC(req_playback_count, "ISO OUT endpoint (playback) request count");
+
+static int audio_playback_buf_size = 256*32;
+module_param(audio_playback_buf_size, int, S_IRUGO);
+MODULE_PARM_DESC(audio_playback_buf_size, "Audio buffer size");
+
+#define CAPTURE_EP_MAX_PACKET_SIZE 32
+static int req_capture_buf_size = CAPTURE_EP_MAX_PACKET_SIZE;
+module_param(req_capture_buf_size, int, S_IRUGO);
+MODULE_PARM_DESC(req_capture_buf_size, "ISO IN endpoint (capture) request buffer size");
+
+static int req_capture_count = 48;
+module_param(req_capture_count, int, S_IRUGO);
+MODULE_PARM_DESC(req_capture_count, "ISO IN endpoint (capture) request count");
+
+static int audio_capture_buf_size = 256*32;
+module_param(audio_capture_buf_size, int, S_IRUGO);
+MODULE_PARM_DESC(audio_capture_buf_size, "Microphone Audio buffer size");
+
+static int generic_set_cmd(struct usb_audio_control *con, u8 cmd, int value);
+static int generic_get_cmd(struct usb_audio_control *con, u8 cmd);
DECLARE_UAC_AC_HEADER_DESCRIPTOR(2);
+DECLARE_UAC_FORMAT_TYPE_I_DISCRETE_DESC(1);
-#define UAC_DT_AC_HEADER_LENGTH UAC_DT_AC_HEADER_SIZE(F_AUDIO_NUM_INTERFACES)
-/* 1 input terminal, 1 output terminal and 1 feature unit */
-#define UAC_DT_TOTAL_LENGTH (UAC_DT_AC_HEADER_LENGTH + UAC_DT_INPUT_TERMINAL_SIZE \
- + UAC_DT_OUTPUT_TERMINAL_SIZE + UAC_DT_FEATURE_UNIT_SIZE(0))
-/* B.3.2 Class-Specific AC Interface Descriptor */
-static struct uac1_ac_header_descriptor_2 ac_header_desc = {
- .bLength = UAC_DT_AC_HEADER_LENGTH,
- .bDescriptorType = USB_DT_CS_INTERFACE,
- .bDescriptorSubtype = UAC_HEADER,
- .bcdADC = __constant_cpu_to_le16(0x0100),
- .wTotalLength = __constant_cpu_to_le16(UAC_DT_TOTAL_LENGTH),
- .bInCollection = F_AUDIO_NUM_INTERFACES,
- .baInterfaceNr = {
- [0] = F_AUDIO_AC_INTERFACE,
- [1] = F_AUDIO_AS_INTERFACE,
- }
+#define SPEAKER_INPUT_TERMINAL_ID 3
+#define SPEAKER_OUTPUT_TERMINAL_ID 4
+
+#define MICROPHONE_INPUT_TERMINAL_ID 1
+#define MICROPHONE_OUTPUT_TERMINAL_ID 2
+
+
+ /*
+ * We have two interfaces- AudioControl and AudioStreaming
+ */
+
+#define F_AUDIO_INTERFACE_MICROPHONE 2
+#define F_AUDIO_INTERFACE_SPEAKER 3
+#define F_AUDIO_NUM_INTERFACES 2
+
+ /* B.3.1 Standard AC Interface Descriptor */
+struct usb_interface_descriptor ac_interface_desc = {
+ .bLength = USB_DT_INTERFACE_SIZE,
+ .bDescriptorType = USB_DT_INTERFACE,
+ .bNumEndpoints = 0,
+ .bInterfaceClass = USB_CLASS_AUDIO,
+ .bInterfaceSubClass = USB_SUBCLASS_AUDIOCONTROL,
};
-#define INPUT_TERMINAL_ID 1
-static struct uac_input_terminal_descriptor input_terminal_desc = {
- .bLength = UAC_DT_INPUT_TERMINAL_SIZE,
- .bDescriptorType = USB_DT_CS_INTERFACE,
- .bDescriptorSubtype = UAC_INPUT_TERMINAL,
- .bTerminalID = INPUT_TERMINAL_ID,
- .wTerminalType = UAC_TERMINAL_STREAMING,
- .bAssocTerminal = 0,
- .wChannelConfig = 0x3,
-};
+#define TOTAL_LENGTH ( \
+ UAC_DT_AC_HEADER_SIZE(2) + \
+ UAC_DT_INPUT_TERMINAL_SIZE + \
+ UAC_DT_OUTPUT_TERMINAL_SIZE + \
+ UAC_DT_INPUT_TERMINAL_SIZE + \
+ UAC_DT_OUTPUT_TERMINAL_SIZE \
+ )
-DECLARE_UAC_FEATURE_UNIT_DESCRIPTOR(0);
-
-#define FEATURE_UNIT_ID 2
-static struct uac_feature_unit_descriptor_0 feature_unit_desc = {
- .bLength = UAC_DT_FEATURE_UNIT_SIZE(0),
+ /* B.3.2 Class-Specific AC Interface Descriptor */
+struct uac1_ac_header_descriptor_2 ac_header_desc = {
+ .bLength = UAC_DT_AC_HEADER_SIZE(2),
.bDescriptorType = USB_DT_CS_INTERFACE,
- .bDescriptorSubtype = UAC_FEATURE_UNIT,
- .bUnitID = FEATURE_UNIT_ID,
- .bSourceID = INPUT_TERMINAL_ID,
- .bControlSize = 2,
- .bmaControls[0] = (UAC_FU_MUTE | UAC_FU_VOLUME),
+ .bDescriptorSubtype = UAC_HEADER,
+ .bcdADC = __constant_cpu_to_le16(0x0100),
+ .wTotalLength = __constant_cpu_to_le16(TOTAL_LENGTH),
+ .bInCollection = F_AUDIO_NUM_INTERFACES,
+ /*.baInterfaceNr = {
+ [0] = F_AUDIO_INTERFACE_MICROPHONE,
+ [1] = F_AUDIO_INTERFACE_SPEAKER,
+ }
+ */
};
-static struct usb_audio_control mute_control = {
- .list = LIST_HEAD_INIT(mute_control.list),
- .name = "Mute Control",
+/*---------------------------------*/
+
+struct uac_input_terminal_descriptor speaker_input_terminal_desc = {
+ .bLength = UAC_DT_INPUT_TERMINAL_SIZE,
+ .bDescriptorType = USB_DT_CS_INTERFACE,
+ .bDescriptorSubtype = UAC_INPUT_TERMINAL,
+ .bTerminalID = SPEAKER_INPUT_TERMINAL_ID,
+ .wTerminalType = UAC_TERMINAL_STREAMING,
+ .bAssocTerminal = SPEAKER_OUTPUT_TERMINAL_ID,
+ .wChannelConfig = 0x3,
+};
+
+struct uac1_output_terminal_descriptor speaker_output_terminal_desc = {
+ .bLength = UAC_DT_OUTPUT_TERMINAL_SIZE,
+ .bDescriptorType = USB_DT_CS_INTERFACE,
+ .bDescriptorSubtype = UAC_OUTPUT_TERMINAL,
+ .bTerminalID = SPEAKER_OUTPUT_TERMINAL_ID,
+ .wTerminalType = UAC_OUTPUT_TERMINAL_SPEAKER,
+ .bAssocTerminal = SPEAKER_INPUT_TERMINAL_ID,
+ .bSourceID = SPEAKER_INPUT_TERMINAL_ID,
+};
+
+static struct usb_audio_control speaker_mute_control = {
+ .list = LIST_HEAD_INIT(speaker_mute_control.list),
+ .name = "Speaker Mute Control",
.type = UAC_FU_MUTE,
/* Todo: add real Mute control code */
.set = generic_set_cmd,
.get = generic_get_cmd,
};
-static struct usb_audio_control volume_control = {
- .list = LIST_HEAD_INIT(volume_control.list),
- .name = "Volume Control",
+static struct usb_audio_control speaker_volume_control = {
+ .list = LIST_HEAD_INIT(speaker_volume_control.list),
+ .name = "Speaker Volume Control",
.type = UAC_FU_VOLUME,
/* Todo: add real Volume control code */
.set = generic_set_cmd,
.get = generic_get_cmd,
};
-static struct usb_audio_control_selector feature_unit = {
- .list = LIST_HEAD_INIT(feature_unit.list),
- .id = FEATURE_UNIT_ID,
- .name = "Mute & Volume Control",
- .type = UAC_FEATURE_UNIT,
- .desc = (struct usb_descriptor_header *)&feature_unit_desc,
+static struct usb_audio_control_selector speaker_fu_controls = {
+ .list = LIST_HEAD_INIT(speaker_fu_controls.list),
+ .name = "Speaker Function Unit Controls",
};
-#define OUTPUT_TERMINAL_ID 3
-static struct uac1_output_terminal_descriptor output_terminal_desc = {
+static struct uac_input_terminal_descriptor microphone_input_terminal_desc = {
+ .bLength = UAC_DT_INPUT_TERMINAL_SIZE,
+ .bDescriptorType = USB_DT_CS_INTERFACE,
+ .bDescriptorSubtype = UAC_INPUT_TERMINAL,
+ .bTerminalID = MICROPHONE_INPUT_TERMINAL_ID,
+ .wTerminalType = UAC_INPUT_TERMINAL_MICROPHONE,
+ .bAssocTerminal = MICROPHONE_OUTPUT_TERMINAL_ID,
+ .bNrChannels = 1,
+ .wChannelConfig = 0x3,
+};
+
+static struct
+uac1_output_terminal_descriptor microphone_output_terminal_desc = {
.bLength = UAC_DT_OUTPUT_TERMINAL_SIZE,
.bDescriptorType = USB_DT_CS_INTERFACE,
.bDescriptorSubtype = UAC_OUTPUT_TERMINAL,
- .bTerminalID = OUTPUT_TERMINAL_ID,
- .wTerminalType = UAC_OUTPUT_TERMINAL_SPEAKER,
- .bAssocTerminal = FEATURE_UNIT_ID,
- .bSourceID = FEATURE_UNIT_ID,
+ .bTerminalID = MICROPHONE_OUTPUT_TERMINAL_ID,
+ .wTerminalType = UAC_TERMINAL_STREAMING,
+ .bAssocTerminal = MICROPHONE_INPUT_TERMINAL_ID,
+ .bSourceID = MICROPHONE_INPUT_TERMINAL_ID,
};
-/* B.4.1 Standard AS Interface Descriptor */
-static struct usb_interface_descriptor as_interface_alt_0_desc = {
- .bLength = USB_DT_INTERFACE_SIZE,
- .bDescriptorType = USB_DT_INTERFACE,
- .bAlternateSetting = 0,
- .bNumEndpoints = 0,
- .bInterfaceClass = USB_CLASS_AUDIO,
- .bInterfaceSubClass = USB_SUBCLASS_AUDIOSTREAMING,
+static struct usb_audio_control microphone_mute_control = {
+ .list = LIST_HEAD_INIT(microphone_mute_control.list),
+ .name = "Microphone Mute Control",
+ .type = UAC_FU_MUTE,
+ /* Todo: add real Mute control code */
+ .set = generic_set_cmd,
+ .get = generic_get_cmd,
};
-static struct usb_interface_descriptor as_interface_alt_1_desc = {
- .bLength = USB_DT_INTERFACE_SIZE,
- .bDescriptorType = USB_DT_INTERFACE,
- .bAlternateSetting = 1,
- .bNumEndpoints = 1,
- .bInterfaceClass = USB_CLASS_AUDIO,
- .bInterfaceSubClass = USB_SUBCLASS_AUDIOSTREAMING,
+static struct usb_audio_control microphone_volume_control = {
+ .list = LIST_HEAD_INIT(microphone_volume_control.list),
+ .name = "Microphone Volume Control",
+ .type = UAC_FU_VOLUME,
+ /* Todo: add real Volume control code */
+ .set = generic_set_cmd,
+ .get = generic_get_cmd,
};
-/* B.4.2 Class-Specific AS Interface Descriptor */
-static struct uac1_as_header_descriptor as_header_desc = {
- .bLength = UAC_DT_AS_HEADER_SIZE,
- .bDescriptorType = USB_DT_CS_INTERFACE,
- .bDescriptorSubtype = UAC_AS_GENERAL,
- .bTerminalLink = INPUT_TERMINAL_ID,
- .bDelay = 1,
- .wFormatTag = UAC_FORMAT_TYPE_I_PCM,
+static struct usb_audio_control_selector microphone_fu_controls = {
+ .list = LIST_HEAD_INIT(microphone_fu_controls.list),
+ .name = "Microphone Feature Unit Controls",
};
-DECLARE_UAC_FORMAT_TYPE_I_DISCRETE_DESC(1);
+/*---------------------------------*/
-static struct uac_format_type_i_discrete_descriptor_1 as_type_i_desc = {
- .bLength = UAC_FORMAT_TYPE_I_DISCRETE_DESC_SIZE(1),
- .bDescriptorType = USB_DT_CS_INTERFACE,
- .bDescriptorSubtype = UAC_FORMAT_TYPE,
- .bFormatType = UAC_FORMAT_TYPE_I,
- .bSubframeSize = 2,
- .bBitResolution = 16,
- .bSamFreqType = 1,
+ /* B.4.1 Standard AS Interface Descriptor */
+static struct usb_interface_descriptor speaker_as_interface_alt_0_desc = {
+ .bLength = USB_DT_INTERFACE_SIZE,
+ .bDescriptorType = USB_DT_INTERFACE,
+ .bAlternateSetting = 0,
+ .bNumEndpoints = 0,
+ .bInterfaceClass = USB_CLASS_AUDIO,
+ .bInterfaceSubClass = USB_SUBCLASS_AUDIOSTREAMING,
};
-/* Standard ISO OUT Endpoint Descriptor */
-static struct usb_endpoint_descriptor as_out_ep_desc = {
- .bLength = USB_DT_ENDPOINT_AUDIO_SIZE,
- .bDescriptorType = USB_DT_ENDPOINT,
- .bEndpointAddress = USB_DIR_OUT,
- .bmAttributes = USB_ENDPOINT_SYNC_ADAPTIVE
- | USB_ENDPOINT_XFER_ISOC,
- .wMaxPacketSize = __constant_cpu_to_le16(OUT_EP_MAX_PACKET_SIZE),
- .bInterval = 4,
+static struct usb_interface_descriptor speaker_as_interface_alt_1_desc = {
+ .bLength = USB_DT_INTERFACE_SIZE,
+ .bDescriptorType = USB_DT_INTERFACE,
+ .bAlternateSetting = 1,
+ .bNumEndpoints = 1,
+ .bInterfaceClass = USB_CLASS_AUDIO,
+ .bInterfaceSubClass = USB_SUBCLASS_AUDIOSTREAMING,
+};
+
+ /* B.4.2 Class-Specific AS Interface Descriptor */
+static struct uac1_as_header_descriptor speaker_as_header_desc = {
+ .bLength = UAC_DT_AS_HEADER_SIZE,
+ .bDescriptorType = USB_DT_CS_INTERFACE,
+ .bDescriptorSubtype = UAC_AS_GENERAL,
+ .bTerminalLink = SPEAKER_INPUT_TERMINAL_ID,
+ .bDelay = 1,
+ .wFormatTag = UAC_FORMAT_TYPE_I_PCM,
+};
+
+static struct uac_format_type_i_discrete_descriptor_1 speaker_as_type_i_desc = {
+ .bLength = UAC_FORMAT_TYPE_I_DISCRETE_DESC_SIZE(1),
+ .bDescriptorType = USB_DT_CS_INTERFACE,
+ .bDescriptorSubtype = UAC_FORMAT_TYPE,
+ .bFormatType = UAC_FORMAT_TYPE_I,
+ .bSubframeSize = 2,
+ .bBitResolution = 16,
+ .bSamFreqType = 1,
+};
+
+ /* Standard ISO OUT Endpoint Descriptor */
+static struct usb_endpoint_descriptor speaker_as_ep_out_desc = {
+ .bLength = USB_DT_ENDPOINT_AUDIO_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = USB_DIR_OUT,
+ .bmAttributes = USB_ENDPOINT_SYNC_ADAPTIVE |
+ USB_ENDPOINT_XFER_ISOC,
+ .wMaxPacketSize =
+ __constant_cpu_to_le16(PLAYBACK_EP_MAX_PACKET_SIZE),
+ .bInterval = 4,
};
/* Class-specific AS ISO OUT Endpoint Descriptor */
-static struct uac_iso_endpoint_descriptor as_iso_out_desc __initdata = {
- .bLength = UAC_ISO_ENDPOINT_DESC_SIZE,
- .bDescriptorType = USB_DT_CS_ENDPOINT,
- .bDescriptorSubtype = UAC_EP_GENERAL,
- .bmAttributes = 1,
- .bLockDelayUnits = 1,
- .wLockDelay = __constant_cpu_to_le16(1),
+static struct uac_iso_endpoint_descriptor speaker_as_iso_out_desc = {
+ .bLength = UAC_ISO_ENDPOINT_DESC_SIZE,
+ .bDescriptorType = USB_DT_CS_ENDPOINT,
+ .bDescriptorSubtype = UAC_EP_GENERAL,
+ .bmAttributes = 1,
+ .bLockDelayUnits = 1,
+ .wLockDelay = __constant_cpu_to_le16(1),
};
-static struct usb_descriptor_header *f_audio_desc[] __initdata = {
+static struct usb_audio_control speaker_sample_freq_control = {
+ .list = LIST_HEAD_INIT(speaker_sample_freq_control.list),
+ .name = "Speaker Sampling Frequency Control",
+ .type = UAC_EP_CS_ATTR_SAMPLE_RATE,
+ .set = generic_set_cmd,
+ .get = generic_get_cmd,
+};
+
+static struct usb_audio_control_selector speaker_as_iso_out = {
+ .list = LIST_HEAD_INIT(speaker_as_iso_out.list),
+ .name = "Speaker Iso-out Endpoint Control",
+ .type = UAC_EP_GENERAL,
+ .desc = (struct usb_descriptor_header *)&speaker_as_iso_out_desc,
+};
+
+/*---------------------------------*/
+
+/* B.4.1 Standard AS Interface Descriptor */
+static struct usb_interface_descriptor microphone_as_interface_alt_0_desc = {
+ .bLength = USB_DT_INTERFACE_SIZE,
+ .bDescriptorType = USB_DT_INTERFACE,
+ .bAlternateSetting = 0,
+ .bNumEndpoints = 0,
+ .bInterfaceClass = USB_CLASS_AUDIO,
+ .bInterfaceSubClass = USB_SUBCLASS_AUDIOSTREAMING,
+};
+
+static struct usb_interface_descriptor microphone_as_interface_alt_1_desc = {
+ .bLength = USB_DT_INTERFACE_SIZE,
+ .bDescriptorType = USB_DT_INTERFACE,
+ .bAlternateSetting = 1,
+ .bNumEndpoints = 1,
+ .bInterfaceClass = USB_CLASS_AUDIO,
+ .bInterfaceSubClass = USB_SUBCLASS_AUDIOSTREAMING,
+};
+
+/* B.4.2 Class-Specific AS Interface Descriptor */
+static struct uac1_as_header_descriptor microphone_as_header_desc = {
+ .bLength = UAC_DT_AS_HEADER_SIZE,
+ .bDescriptorType = USB_DT_CS_INTERFACE,
+ .bDescriptorSubtype = UAC_AS_GENERAL,
+ .bTerminalLink = MICROPHONE_OUTPUT_TERMINAL_ID,
+ .bDelay = 1,
+ .wFormatTag = UAC_FORMAT_TYPE_I_PCM,
+};
+
+static struct
+uac_format_type_i_discrete_descriptor_1 microphone_as_type_i_desc = {
+ .bLength = UAC_FORMAT_TYPE_I_DISCRETE_DESC_SIZE(1),
+ .bDescriptorType = USB_DT_CS_INTERFACE,
+ .bDescriptorSubtype = UAC_FORMAT_TYPE,
+ .bFormatType = UAC_FORMAT_TYPE_I,
+ .bNrChannels = 1,
+ .bSubframeSize = 2,
+ .bBitResolution = 16,
+ .bSamFreqType = 1,
+};
+
+/* Standard ISO IN Endpoint Descriptor */
+static struct usb_endpoint_descriptor microphone_as_ep_in_desc = {
+ .bLength = USB_DT_ENDPOINT_AUDIO_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = USB_DIR_IN,
+ .bmAttributes =
+ USB_ENDPOINT_XFER_ISOC | USB_ENDPOINT_SYNC_ASYNC,
+ .wMaxPacketSize =
+ __constant_cpu_to_le16(CAPTURE_EP_MAX_PACKET_SIZE),
+ .bInterval = 4,
+};
+
+ /* Class-specific AS ISO OUT Endpoint Descriptor */
+static struct uac_iso_endpoint_descriptor microphone_as_iso_in_desc = {
+ .bLength = UAC_ISO_ENDPOINT_DESC_SIZE,
+ .bDescriptorType = USB_DT_CS_ENDPOINT,
+ .bDescriptorSubtype = UAC_EP_GENERAL,
+ .bmAttributes = 1,
+ .bLockDelayUnits = 1,
+ .wLockDelay = __constant_cpu_to_le16(1),
+};
+
+static struct usb_audio_control microphone_sample_freq_control = {
+ .list = LIST_HEAD_INIT(microphone_sample_freq_control.list),
+ .name = "Microphone Sampling Frequency Control",
+ .type = UAC_EP_CS_ATTR_SAMPLE_RATE,
+ .set = generic_set_cmd,
+ .get = generic_get_cmd,
+};
+
+static struct usb_audio_control_selector microphone_as_iso_in = {
+ .list = LIST_HEAD_INIT(microphone_as_iso_in.list),
+ .name = "Microphone Iso-IN Endpoint Control",
+ .type = UAC_EP_GENERAL,
+ .desc = (struct usb_descriptor_header *)µphone_as_iso_in_desc,
+};
+
+/*--------------------------------- */
+
+static struct usb_descriptor_header *f_audio_desc[] = {
(struct usb_descriptor_header *)&ac_interface_desc,
(struct usb_descriptor_header *)&ac_header_desc,
- (struct usb_descriptor_header *)&input_terminal_desc,
- (struct usb_descriptor_header *)&output_terminal_desc,
- (struct usb_descriptor_header *)&feature_unit_desc,
+ (struct usb_descriptor_header *)µphone_input_terminal_desc,
+ (struct usb_descriptor_header *)µphone_output_terminal_desc,
- (struct usb_descriptor_header *)&as_interface_alt_0_desc,
- (struct usb_descriptor_header *)&as_interface_alt_1_desc,
- (struct usb_descriptor_header *)&as_header_desc,
+ (struct usb_descriptor_header *)&speaker_input_terminal_desc,
+ (struct usb_descriptor_header *)&speaker_output_terminal_desc,
- (struct usb_descriptor_header *)&as_type_i_desc,
+ (struct usb_descriptor_header *)µphone_as_interface_alt_0_desc,
+ (struct usb_descriptor_header *)µphone_as_interface_alt_1_desc,
+ (struct usb_descriptor_header *)µphone_as_header_desc,
+ (struct usb_descriptor_header *)µphone_as_type_i_desc,
+ (struct usb_descriptor_header *)µphone_as_ep_in_desc,
+ (struct usb_descriptor_header *)µphone_as_iso_in_desc,
- (struct usb_descriptor_header *)&as_out_ep_desc,
- (struct usb_descriptor_header *)&as_iso_out_desc,
+ (struct usb_descriptor_header *)&speaker_as_interface_alt_0_desc,
+ (struct usb_descriptor_header *)&speaker_as_interface_alt_1_desc,
+ (struct usb_descriptor_header *)&speaker_as_header_desc,
+ (struct usb_descriptor_header *)&speaker_as_type_i_desc,
+ (struct usb_descriptor_header *)&speaker_as_ep_out_desc,
+ (struct usb_descriptor_header *)&speaker_as_iso_out_desc,
+
+ NULL,
+};
+
+/* string IDs are assigned dynamically */
+
+static struct usb_string audio_string_defs[] = {
+ { } /* end of list */
+};
+
+static struct usb_gadget_strings audio_stringtab_dev = {
+ .language = 0x0409, /* en-us */
+ .strings = audio_string_defs,
+};
+
+static struct usb_gadget_strings *audio_strings[] = {
+ &audio_stringtab_dev,
NULL,
};
@@ -229,25 +418,32 @@
static struct f_audio_buf *f_audio_buffer_alloc(int buf_size)
{
- struct f_audio_buf *copy_buf;
+ struct f_audio_buf *playback_copy_buf;
- copy_buf = kzalloc(sizeof *copy_buf, GFP_ATOMIC);
- if (!copy_buf)
- return ERR_PTR(-ENOMEM);
-
- copy_buf->buf = kzalloc(buf_size, GFP_ATOMIC);
- if (!copy_buf->buf) {
- kfree(copy_buf);
+ playback_copy_buf = kzalloc(sizeof *playback_copy_buf, GFP_ATOMIC);
+ if (!playback_copy_buf) {
+ pr_err("Failed to allocate playback_copy_buf");
return ERR_PTR(-ENOMEM);
}
- return copy_buf;
+ playback_copy_buf->buf = kzalloc(buf_size, GFP_ATOMIC);
+ if (!playback_copy_buf->buf) {
+ pr_err("Failed to allocate playback_copy_buf buffer");
+ kfree(playback_copy_buf);
+ return ERR_PTR(-ENOMEM);
+ }
+
+ return playback_copy_buf;
}
static void f_audio_buffer_free(struct f_audio_buf *audio_buf)
{
- kfree(audio_buf->buf);
- kfree(audio_buf);
+ if (audio_buf) {
+ kfree(audio_buf->buf);
+ kfree(audio_buf);
+ audio_buf->buf = NULL;
+ audio_buf = NULL;
+ }
}
/*-------------------------------------------------------------------------*/
@@ -256,16 +452,24 @@
/* endpoints handle full and/or high speeds */
struct usb_ep *out_ep;
+ struct usb_ep *in_ep;
- spinlock_t lock;
- struct f_audio_buf *copy_buf;
- struct work_struct playback_work;
- struct list_head play_queue;
+ spinlock_t playback_lock;
+ struct f_audio_buf *playback_copy_buf;
+ struct work_struct playback_work;
+ struct list_head play_queue;
+
+ spinlock_t capture_lock;
+ struct f_audio_buf *capture_copy_buf;
+ struct work_struct capture_work;
+ struct list_head capture_queue;
+ struct usb_request *capture_req;
/* Control Set command */
- struct list_head cs;
- u8 set_cmd;
- struct usb_audio_control *set_con;
+ struct list_head fu_cs;
+ struct list_head ep_cs;
+ u8 set_cmd;
+ struct usb_audio_control *set_con;
};
static inline struct f_audio *func_to_audio(struct usb_function *f)
@@ -280,50 +484,126 @@
struct f_audio *audio = container_of(data, struct f_audio,
playback_work);
struct f_audio_buf *play_buf;
+ unsigned long flags;
+ int res = 0;
- spin_lock_irq(&audio->lock);
+ spin_lock_irqsave(&audio->playback_lock, flags);
if (list_empty(&audio->play_queue)) {
- spin_unlock_irq(&audio->lock);
+ pr_err("playback_buf is empty");
+ spin_unlock_irqrestore(&audio->playback_lock, flags);
return;
}
play_buf = list_first_entry(&audio->play_queue,
struct f_audio_buf, list);
list_del(&play_buf->list);
- spin_unlock_irq(&audio->lock);
+ spin_unlock_irqrestore(&audio->playback_lock, flags);
- u_audio_playback(&audio->card, play_buf->buf, play_buf->actual);
+ pr_debug("play_buf->actual = %d", play_buf->actual);
+
+ res = u_audio_playback(&audio->card, play_buf->buf, play_buf->actual);
+ if (res)
+ pr_err("copying failed");
+
f_audio_buffer_free(play_buf);
}
-static int f_audio_out_ep_complete(struct usb_ep *ep, struct usb_request *req)
+static int
+f_audio_playback_ep_complete(struct usb_ep *ep, struct usb_request *req)
{
struct f_audio *audio = req->context;
- struct usb_composite_dev *cdev = audio->card.func.config->cdev;
- struct f_audio_buf *copy_buf = audio->copy_buf;
+ struct f_audio_buf *copy_buf = audio->playback_copy_buf;
int err;
if (!copy_buf)
return -EINVAL;
/* Copy buffer is full, add it to the play_queue */
- if (audio_buf_size - copy_buf->actual < req->actual) {
+ if (audio_playback_buf_size - copy_buf->actual < req->actual) {
+ pr_debug("audio_playback_buf_size %d - copy_buf->actual %d, req->actual %d",
+ audio_playback_buf_size, copy_buf->actual, req->actual);
list_add_tail(©_buf->list, &audio->play_queue);
schedule_work(&audio->playback_work);
- copy_buf = f_audio_buffer_alloc(audio_buf_size);
- if (IS_ERR(copy_buf))
+ copy_buf = f_audio_buffer_alloc(audio_playback_buf_size);
+ if (IS_ERR(copy_buf)) {
+ pr_err("Failed to allocate playback_copy_buf");
return -ENOMEM;
+ }
}
memcpy(copy_buf->buf + copy_buf->actual, req->buf, req->actual);
copy_buf->actual += req->actual;
- audio->copy_buf = copy_buf;
+ audio->playback_copy_buf = copy_buf;
err = usb_ep_queue(ep, req, GFP_ATOMIC);
if (err)
- ERROR(cdev, "%s queue req: %d\n", ep->name, err);
+ pr_err("Failed to queue %s req: err - %d\n", ep->name, err);
- return 0;
+ return err;
+}
+static void f_audio_capture_work(struct work_struct *data)
+{
+ struct f_audio *audio =
+ container_of(data, struct f_audio, capture_work);
+ struct f_audio_buf *capture_buf;
+ unsigned long flags;
+ int res = 0;
+
+ capture_buf = f_audio_buffer_alloc(audio_capture_buf_size);
+ if (capture_buf <= 0) {
+ pr_err("%s: buffer alloc failed\n", __func__);
+ return;
+ }
+
+ res = u_audio_capture(&audio->card, capture_buf->buf,
+ audio_capture_buf_size);
+ if (res)
+ pr_err("copying failed");
+
+ pr_debug("Queue capture packet: size %d", audio_capture_buf_size);
+ spin_lock_irqsave(&audio->capture_lock, flags);
+ list_add_tail(&capture_buf->list, &audio->capture_queue);
+ spin_unlock_irqrestore(&audio->capture_lock, flags);
+}
+
+static int
+f_audio_capture_ep_complete(struct usb_ep *ep, struct usb_request *req)
+{
+ struct f_audio *audio = req->context;
+ struct f_audio_buf *copy_buf = audio->capture_copy_buf;
+ unsigned long flags;
+ int err = 0;
+
+ if (copy_buf == 0) {
+ pr_debug("copy_buf == 0");
+ spin_lock_irqsave(&audio->capture_lock, flags);
+ if (list_empty(&audio->capture_queue)) {
+ spin_unlock_irqrestore(&audio->capture_lock, flags);
+ schedule_work(&audio->capture_work);
+ goto done;
+ }
+ copy_buf = list_first_entry(&audio->capture_queue,
+ struct f_audio_buf, list);
+ list_del(©_buf->list);
+ audio->capture_copy_buf = copy_buf;
+ spin_unlock_irqrestore(&audio->capture_lock, flags);
+ }
+
+ pr_debug("Copy %d bytes", req->actual);
+ memcpy(req->buf, copy_buf->buf + copy_buf->actual, req->actual);
+ copy_buf->actual += req->actual;
+
+ if (audio_capture_buf_size - copy_buf->actual < req->actual) {
+ f_audio_buffer_free(copy_buf);
+ audio->capture_copy_buf = 0;
+ schedule_work(&audio->capture_work);
+ }
+done:
+ err = usb_ep_queue(ep, req, GFP_ATOMIC);
+ if (err)
+ pr_err("Failed to queue %s req: err - %d\n", ep->name, err);
+
+ return err;
}
static void f_audio_complete(struct usb_ep *ep, struct usb_request *req)
@@ -331,14 +611,14 @@
struct f_audio *audio = req->context;
int status = req->status;
u32 data = 0;
- struct usb_ep *out_ep = audio->out_ep;
switch (status) {
-
- case 0: /* normal completion? */
- if (ep == out_ep)
- f_audio_out_ep_complete(ep, req);
- else if (audio->set_con) {
+ case 0: /* normal completion? */
+ if (ep == audio->out_ep) {
+ f_audio_playback_ep_complete(ep, req);
+ } else if (ep == audio->in_ep) {
+ f_audio_capture_ep_complete(ep, req);
+ } else if (audio->set_con) {
memcpy(&data, req->buf, req->length);
audio->set_con->set(audio->set_con, audio->set_cmd,
le16_to_cpu(data));
@@ -346,6 +626,7 @@
}
break;
default:
+ pr_err("Failed completion: status %d", status);
break;
}
}
@@ -364,10 +645,10 @@
struct usb_audio_control_selector *cs;
struct usb_audio_control *con;
- DBG(cdev, "bRequest 0x%x, w_value 0x%04x, len %d, entity %d\n",
+ pr_debug("bRequest 0x%x, w_value 0x%04x, len %d, entity %d\n",
ctrl->bRequest, w_value, len, id);
- list_for_each_entry(cs, &audio->cs, list) {
+ list_for_each_entry(cs, &audio->fu_cs, list) {
if (cs->id == id) {
list_for_each_entry(con, &cs->control, list) {
if (con->type == con_sel) {
@@ -401,10 +682,10 @@
struct usb_audio_control_selector *cs;
struct usb_audio_control *con;
- DBG(cdev, "bRequest 0x%x, w_value 0x%04x, len %d, entity %d\n",
+ pr_debug("bRequest 0x%x, w_value 0x%04x, len %d, entity %d\n",
ctrl->bRequest, w_value, len, id);
- list_for_each_entry(cs, &audio->cs, list) {
+ list_for_each_entry(cs, &audio->fu_cs, list) {
if (cs->id == id) {
list_for_each_entry(con, &cs->control, list) {
if (con->type == con_sel && con->get) {
@@ -423,36 +704,68 @@
return len;
}
+static void audio_set_endpoint_complete(struct usb_ep *ep,
+ struct usb_request *req)
+{
+ struct f_audio *audio = req->context;
+ u32 data = 0;
+
+ if (req->status == 0 && audio->set_con) {
+ memcpy(&data, req->buf, req->length);
+ audio->set_con->set(audio->set_con, audio->set_cmd,
+ le32_to_cpu(data));
+ audio->set_con = NULL;
+ }
+}
+
static int audio_set_endpoint_req(struct usb_function *f,
const struct usb_ctrlrequest *ctrl)
{
+ int value = -EOPNOTSUPP;
+ u16 ep = le16_to_cpu(ctrl->wIndex);
+ u16 len = le16_to_cpu(ctrl->wLength);
+ u16 w_value = le16_to_cpu(ctrl->wValue);
+
+ struct f_audio *audio = func_to_audio(f);
struct usb_composite_dev *cdev = f->config->cdev;
- int value = -EOPNOTSUPP;
- u16 ep = le16_to_cpu(ctrl->wIndex);
- u16 len = le16_to_cpu(ctrl->wLength);
- u16 w_value = le16_to_cpu(ctrl->wValue);
+ struct usb_request *req = cdev->req;
+ struct usb_audio_control_selector *cs;
+ struct usb_audio_control *con;
- DBG(cdev, "bRequest 0x%x, w_value 0x%04x, len %d, endpoint %d\n",
- ctrl->bRequest, w_value, len, ep);
+ u8 epnum = ep & ~0x80;
+ u8 con_sel = (w_value >> 8) & 0xFF;
+ u8 cmd = (ctrl->bRequest & 0x0F);
- switch (ctrl->bRequest) {
- case UAC_SET_CUR:
- value = len;
- break;
+ pr_debug("bRequest 0x%x, w_value 0x%04x, len %d, endp %d, epnum %d\n",
+ ctrl->bRequest, w_value, len, ep, epnum);
- case UAC_SET_MIN:
- break;
+ list_for_each_entry(cs, &audio->ep_cs, list) {
+ if (cs->id != epnum)
+ continue;
- case UAC_SET_MAX:
- break;
+ list_for_each_entry(con, &cs->control, list) {
+ if (con->type != con_sel)
+ continue;
- case UAC_SET_RES:
- break;
-
- case UAC_SET_MEM:
- break;
-
- default:
+ switch (cmd) {
+ case UAC__CUR:
+ case UAC__MIN:
+ case UAC__MAX:
+ case UAC__RES:
+ audio->set_con = con;
+ audio->set_cmd = cmd;
+ req->context = audio;
+ req->complete = audio_set_endpoint_complete;
+ value = len;
+ break;
+ case UAC__MEM:
+ break;
+ default:
+ pr_err("Unknown command");
+ break;
+ }
+ break;
+ }
break;
}
@@ -462,25 +775,48 @@
static int audio_get_endpoint_req(struct usb_function *f,
const struct usb_ctrlrequest *ctrl)
{
+ struct f_audio *audio = func_to_audio(f);
struct usb_composite_dev *cdev = f->config->cdev;
- int value = -EOPNOTSUPP;
- u8 ep = ((le16_to_cpu(ctrl->wIndex) >> 8) & 0xFF);
- u16 len = le16_to_cpu(ctrl->wLength);
- u16 w_value = le16_to_cpu(ctrl->wValue);
+ struct usb_request *req = cdev->req;
+ struct usb_audio_control_selector *cs;
+ struct usb_audio_control *con;
+ int data;
- DBG(cdev, "bRequest 0x%x, w_value 0x%04x, len %d, endpoint %d\n",
+ int value = -EOPNOTSUPP;
+ u8 ep = (le16_to_cpu(ctrl->wIndex) & 0x7F);
+ u8 epnum = ep & ~0x80;
+ u16 len = le16_to_cpu(ctrl->wLength);
+ u16 w_value = le16_to_cpu(ctrl->wValue);
+ u8 con_sel = (w_value >> 8) & 0xFF;
+ u8 cmd = (ctrl->bRequest & 0x0F);
+
+ pr_debug("bRequest 0x%x, w_value 0x%04x, len %d, ep %d\n",
ctrl->bRequest, w_value, len, ep);
- switch (ctrl->bRequest) {
- case UAC_GET_CUR:
- case UAC_GET_MIN:
- case UAC_GET_MAX:
- case UAC_GET_RES:
- value = len;
- break;
- case UAC_GET_MEM:
- break;
- default:
+ list_for_each_entry(cs, &audio->ep_cs, list) {
+ if (cs->id != epnum)
+ continue;
+
+ list_for_each_entry(con, &cs->control, list) {
+ if (con->type != con_sel)
+ continue;
+
+ switch (cmd) {
+ case UAC__CUR:
+ case UAC__MIN:
+ case UAC__MAX:
+ case UAC__RES:
+ data = cpu_to_le32(generic_get_cmd(con, cmd));
+ memcpy(req->buf, &data, len);
+ value = len;
+ break;
+ case UAC__MEM:
+ break;
+ default:
+ break;
+ }
+ break;
+ }
break;
}
@@ -500,39 +836,47 @@
/* composite driver infrastructure handles everything; interface
* activation uses set_alt().
*/
+
switch (ctrl->bRequestType) {
case USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE:
+ pr_debug("USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE");
value = audio_set_intf_req(f, ctrl);
break;
case USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE:
+ pr_debug("USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE");
value = audio_get_intf_req(f, ctrl);
break;
case USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_ENDPOINT:
+ pr_debug("USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_ENDPOINT");
value = audio_set_endpoint_req(f, ctrl);
break;
case USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_ENDPOINT:
+ pr_debug("USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_ENDPOINT");
value = audio_get_endpoint_req(f, ctrl);
break;
default:
- ERROR(cdev, "invalid control req%02x.%02x v%04x i%04x l%d\n",
+ pr_err("Unknown control request %02x.%02x v%04x i%04x l%d\n",
ctrl->bRequestType, ctrl->bRequest,
w_value, w_index, w_length);
+
}
/* respond with data transfer or status phase? */
if (value >= 0) {
- DBG(cdev, "audio req%02x.%02x v%04x i%04x l%d\n",
+ pr_debug("audio req %02x.%02x v%04x i%04x l%d\n",
ctrl->bRequestType, ctrl->bRequest,
w_value, w_index, w_length);
- req->zero = 0;
+ req->zero = 1;
req->length = value;
value = usb_ep_queue(cdev->gadget->ep0, req, GFP_ATOMIC);
if (value < 0)
- ERROR(cdev, "audio response on err %d\n", value);
+ pr_err("audio response failed on err %d\n", value);
+ } else {
+ pr_err("STALL\n");
}
/* device either stalls (value < 0) or reports success */
@@ -542,55 +886,114 @@
static int f_audio_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
{
struct f_audio *audio = func_to_audio(f);
- struct usb_composite_dev *cdev = f->config->cdev;
- struct usb_ep *out_ep = audio->out_ep;
- struct usb_request *req;
+ struct usb_ep *out_ep = audio->out_ep;
+ struct usb_ep *in_ep = audio->in_ep;
+ struct usb_request *req;
+ unsigned long flags;
int i = 0, err = 0;
- DBG(cdev, "intf %d, alt %d\n", intf, alt);
+ pr_debug("intf %d, alt %d\n", intf, alt);
- if (intf == 1) {
+ if (intf == ac_header_desc.baInterfaceNr[0]) {
if (alt == 1) {
- usb_ep_enable(out_ep);
- out_ep->driver_data = audio;
- audio->copy_buf = f_audio_buffer_alloc(audio_buf_size);
- if (IS_ERR(audio->copy_buf))
+ err = usb_ep_enable(in_ep);
+ if (err) {
+ pr_err("Failed to enable capture ep");
+ return err;
+ }
+ in_ep->driver_data = audio;
+ audio->capture_copy_buf = 0;
+
+ /* Allocate a write buffer */
+ req = usb_ep_alloc_request(in_ep, GFP_ATOMIC);
+ if (!req) {
+ pr_err("request allocation failed\n");
return -ENOMEM;
+ }
+ req->buf = kzalloc(req_capture_buf_size,
+ GFP_ATOMIC);
+ if (!req->buf) {
+ pr_err("request buffer allocation failed\n");
+ return -ENOMEM;
+ }
+
+ req->length = req_capture_buf_size;
+ req->context = audio;
+ req->complete = f_audio_complete;
+ audio->capture_req = req;
+ err = usb_ep_queue(in_ep, req, GFP_ATOMIC);
+ if (err)
+ pr_err("Failed to queue %s req: err %d\n",
+ in_ep->name, err);
+ schedule_work(&audio->capture_work);
+ } else {
+ struct f_audio_buf *capture_buf;
+ spin_lock_irqsave(&audio->capture_lock, flags);
+ while (!list_empty(&audio->capture_queue)) {
+ capture_buf =
+ list_first_entry(
+ &audio->capture_queue,
+ struct f_audio_buf,
+ list);
+ list_del(&capture_buf->list);
+ f_audio_buffer_free(capture_buf);
+ }
+ spin_unlock_irqrestore(&audio->capture_lock, flags);
+ }
+ } else if (intf == ac_header_desc.baInterfaceNr[1]) {
+ if (alt == 1) {
+ err = usb_ep_enable(out_ep);
+ if (err) {
+ pr_err("Failed to enable playback ep");
+ return err;
+ }
+ out_ep->driver_data = audio;
+ audio->playback_copy_buf =
+ f_audio_buffer_alloc(audio_playback_buf_size);
+ if (IS_ERR(audio->playback_copy_buf)) {
+ pr_err("Failed to allocate playback_copy_buf");
+ return -ENOMEM;
+ }
/*
* allocate a bunch of read buffers
* and queue them all at once.
*/
- for (i = 0; i < req_count && err == 0; i++) {
+ for (i = 0; i < req_playback_count && err == 0; i++) {
req = usb_ep_alloc_request(out_ep, GFP_ATOMIC);
- if (req) {
- req->buf = kzalloc(req_buf_size,
- GFP_ATOMIC);
- if (req->buf) {
- req->length = req_buf_size;
- req->context = audio;
- req->complete =
- f_audio_complete;
- err = usb_ep_queue(out_ep,
- req, GFP_ATOMIC);
- if (err)
- ERROR(cdev,
- "%s queue req: %d\n",
- out_ep->name, err);
- } else
- err = -ENOMEM;
- } else
- err = -ENOMEM;
+ if (!req) {
+ pr_err("request allocation failed\n");
+ return -ENOMEM;
+ }
+ req->buf = kzalloc(req_playback_buf_size,
+ GFP_ATOMIC);
+ if (!req->buf) {
+ pr_err("request buffer allocation failed\n");
+ return -ENOMEM;
+ }
+ req->length = req_playback_buf_size;
+ req->context = audio;
+ req->complete = f_audio_complete;
+ err = usb_ep_queue(out_ep, req, GFP_ATOMIC);
+ if (err)
+ pr_err("Failed to queue %s queue req: err %d\n",
+ out_ep->name, err);
}
-
+ pr_debug("Allocated %d requests\n", req_playback_count);
} else {
- struct f_audio_buf *copy_buf = audio->copy_buf;
- if (copy_buf) {
- list_add_tail(©_buf->list,
+ struct f_audio_buf *playback_copy_buf =
+ audio->playback_copy_buf;
+ if (playback_copy_buf) {
+ pr_err("Schedule playback_work");
+ list_add_tail(&playback_copy_buf->list,
&audio->play_queue);
schedule_work(&audio->playback_work);
+ } else {
+ pr_err("playback_buf is empty. Stop.");
}
}
+ } else {
+ pr_err("Interface %d. Do nothing. Return %d\n", intf, err);
}
return err;
@@ -598,7 +1001,7 @@
static void f_audio_disable(struct usb_function *f)
{
- return;
+ u_audio_clear();
}
/*-------------------------------------------------------------------------*/
@@ -610,12 +1013,23 @@
int rate;
/* Set channel numbers */
- input_terminal_desc.bNrChannels = u_audio_get_playback_channels(card);
- as_type_i_desc.bNrChannels = u_audio_get_playback_channels(card);
+ speaker_input_terminal_desc.bNrChannels =
+ u_audio_get_playback_channels(card);
+ speaker_as_type_i_desc.bNrChannels =
+ u_audio_get_playback_channels(card);
+
+ microphone_input_terminal_desc.bNrChannels =
+ u_audio_get_capture_channels(card);
+ microphone_as_type_i_desc.bNrChannels =
+ u_audio_get_capture_channels(card);
/* Set sample rates */
rate = u_audio_get_playback_rate(card);
- sam_freq = as_type_i_desc.tSamFreq[0];
+ sam_freq = speaker_as_type_i_desc.tSamFreq[0];
+ memcpy(sam_freq, &rate, 3);
+
+ rate = u_audio_get_capture_rate(card);
+ sam_freq = microphone_as_type_i_desc.tSamFreq[0];
memcpy(sam_freq, &rate, 3);
/* Todo: Set Sample bits and other parameters */
@@ -624,64 +1038,101 @@
}
/* audio function driver setup/binding */
-static int __init
+static int
f_audio_bind(struct usb_configuration *c, struct usb_function *f)
{
struct usb_composite_dev *cdev = c->cdev;
struct f_audio *audio = func_to_audio(f);
int status;
struct usb_ep *ep;
+ u8 epaddr;
+
f_audio_build_desc(audio);
/* allocate instance-specific interface IDs, and patch descriptors */
status = usb_interface_id(c, f);
- if (status < 0)
+ if (status < 0) {
+ pr_err("%s: failed to allocate desc interface", __func__);
goto fail;
+ }
ac_interface_desc.bInterfaceNumber = status;
+ status = -ENOMEM;
+
status = usb_interface_id(c, f);
- if (status < 0)
+ if (status < 0) {
+ pr_err("%s: failed to allocate alt interface", __func__);
goto fail;
- as_interface_alt_0_desc.bInterfaceNumber = status;
- as_interface_alt_1_desc.bInterfaceNumber = status;
+ }
+ microphone_as_interface_alt_0_desc.bInterfaceNumber = status;
+ microphone_as_interface_alt_1_desc.bInterfaceNumber = status;
+ ac_header_desc.baInterfaceNr[0] = status;
+
+ status = -ENODEV;
+
+ status = usb_interface_id(c, f);
+ if (status < 0) {
+ pr_err("%s: failed to allocate alt interface", __func__);
+ goto fail;
+ }
+ speaker_as_interface_alt_0_desc.bInterfaceNumber = status;
+ speaker_as_interface_alt_1_desc.bInterfaceNumber = status;
+ ac_header_desc.baInterfaceNr[1] = status;
status = -ENODEV;
/* allocate instance-specific endpoints */
- ep = usb_ep_autoconfig(cdev->gadget, &as_out_ep_desc);
- if (!ep)
+ ep = usb_ep_autoconfig(cdev->gadget, µphone_as_ep_in_desc);
+ if (!ep) {
+ pr_err("%s: failed to autoconfig in endpoint", __func__);
goto fail;
- audio->out_ep = ep;
- audio->out_ep->desc = &as_out_ep_desc;
- ep->driver_data = cdev; /* claim */
+ }
+ audio->in_ep = ep;
+ ep->desc = µphone_as_ep_in_desc;
+ ep->driver_data = cdev;
status = -ENOMEM;
- /* copy descriptors, and track endpoint copies */
- f->descriptors = usb_copy_descriptors(f_audio_desc);
+ ep = usb_ep_autoconfig(cdev->gadget, &speaker_as_ep_out_desc);
+ if (!ep) {
+ pr_err("%s: failed to autoconfig out endpoint", __func__);
+ goto fail;
+ }
+ audio->out_ep = ep;
+ ep->desc = &speaker_as_ep_out_desc;
+ ep->driver_data = cdev;
- /*
- * support all relevant hardware speeds... we expect that when
+ /* associate bEndpointAddress with usb_function */
+ epaddr = microphone_as_ep_in_desc.bEndpointAddress & ~USB_DIR_IN;
+ microphone_as_iso_in.id = epaddr;
+
+ epaddr = speaker_as_ep_out_desc.bEndpointAddress & ~USB_DIR_IN;
+ speaker_as_iso_out.id = epaddr;
+
+ /* support all relevant hardware speeds. we expect that when
* hardware is dual speed, all bulk-capable endpoints work at
* both speeds
*/
+
+ /* copy descriptors, and track endpoint copies */
if (gadget_is_dualspeed(c->cdev->gadget)) {
c->highspeed = true;
f->hs_descriptors = usb_copy_descriptors(f_audio_desc);
+ } else {
+ f->descriptors = usb_copy_descriptors(f_audio_desc);
}
return 0;
fail:
-
return status;
}
static void
f_audio_unbind(struct usb_configuration *c, struct usb_function *f)
{
- struct f_audio *audio = func_to_audio(f);
+ struct f_audio *audio = func_to_audio(f);
usb_free_descriptors(f->descriptors);
usb_free_descriptors(f->hs_descriptors);
@@ -703,31 +1154,58 @@
}
/* Todo: add more control selecotor dynamically */
-int __init control_selector_init(struct f_audio *audio)
+int control_selector_init(struct f_audio *audio)
{
- INIT_LIST_HEAD(&audio->cs);
- list_add(&feature_unit.list, &audio->cs);
+ INIT_LIST_HEAD(&audio->fu_cs);
+ list_add(µphone_fu_controls.list, &audio->fu_cs);
+ list_add(&speaker_fu_controls.list, &audio->fu_cs);
- INIT_LIST_HEAD(&feature_unit.control);
- list_add(&mute_control.list, &feature_unit.control);
- list_add(&volume_control.list, &feature_unit.control);
+ INIT_LIST_HEAD(µphone_fu_controls.control);
+ list_add(µphone_mute_control.list,
+ µphone_fu_controls.control);
+ list_add(µphone_volume_control.list,
+ µphone_fu_controls.control);
- volume_control.data[UAC__CUR] = 0xffc0;
- volume_control.data[UAC__MIN] = 0xe3a0;
- volume_control.data[UAC__MAX] = 0xfff0;
- volume_control.data[UAC__RES] = 0x0030;
+ INIT_LIST_HEAD(&speaker_fu_controls.control);
+ list_add(&speaker_mute_control.list,
+ &speaker_fu_controls.control);
+ list_add(&speaker_volume_control.list,
+ &speaker_fu_controls.control);
+
+ microphone_volume_control.data[UAC__CUR] = 0xffc0;
+ microphone_volume_control.data[UAC__MIN] = 0xe3a0;
+ microphone_volume_control.data[UAC__MAX] = 0xfff0;
+ microphone_volume_control.data[UAC__RES] = 0x0030;
+
+ speaker_volume_control.data[UAC__CUR] = 0xffc0;
+ speaker_volume_control.data[UAC__MIN] = 0xe3a0;
+ speaker_volume_control.data[UAC__MAX] = 0xfff0;
+ speaker_volume_control.data[UAC__RES] = 0x0030;
+
+ INIT_LIST_HEAD(&audio->ep_cs);
+ list_add(&speaker_as_iso_out.list, &audio->ep_cs);
+ list_add(µphone_as_iso_in.list, &audio->ep_cs);
+
+ INIT_LIST_HEAD(µphone_as_iso_in.control);
+ list_add(µphone_sample_freq_control.list,
+ µphone_as_iso_in.control);
+
+ INIT_LIST_HEAD(&speaker_as_iso_out.control);
+ list_add(&speaker_sample_freq_control.list,
+ &speaker_as_iso_out.control);
return 0;
+
}
/**
* audio_bind_config - add USB audio function to a configuration
- * @c: the configuration to supcard the USB audio function
+ * @c: the configuration to support the USB audio function
* Context: single threaded during gadget setup
*
* Returns zero on success, else negative errno.
*/
-int __init audio_bind_config(struct usb_configuration *c)
+int audio_bind_config(struct usb_configuration *c)
{
struct f_audio *audio;
int status;
@@ -737,17 +1215,15 @@
if (!audio)
return -ENOMEM;
- audio->card.func.name = "g_audio";
audio->card.gadget = c->cdev->gadget;
INIT_LIST_HEAD(&audio->play_queue);
- spin_lock_init(&audio->lock);
+ spin_lock_init(&audio->playback_lock);
- /* set up ASLA audio devices */
- status = gaudio_setup(&audio->card);
- if (status < 0)
- goto setup_fail;
+ INIT_LIST_HEAD(&audio->capture_queue);
+ spin_lock_init(&audio->capture_lock);
+ audio->card.func.name = "audio";
audio->card.func.strings = audio_strings;
audio->card.func.bind = f_audio_bind;
audio->card.func.unbind = f_audio_unbind;
@@ -756,15 +1232,20 @@
audio->card.func.disable = f_audio_disable;
control_selector_init(audio);
-
INIT_WORK(&audio->playback_work, f_audio_playback_work);
+ INIT_WORK(&audio->capture_work, f_audio_capture_work);
- status = usb_add_function(c, &audio->card.func);
- if (status)
+ /* set up ASLA audio devices */
+ status = gaudio_setup(&audio->card);
+ if (status < 0)
goto add_fail;
- INFO(c->cdev, "audio_buf_size %d, req_buf_size %d, req_count %d\n",
- audio_buf_size, req_buf_size, req_count);
+ status = usb_add_function(c, &audio->card.func);
+ if (status) {
+ pr_err("%s: Failed to add usb audio function, err = %d",
+ __func__, status);
+ goto setup_fail;
+ }
return status;
diff --git a/drivers/usb/gadget/msm72k_udc.c b/drivers/usb/gadget/msm72k_udc.c
index 55fd59e..3f4e428 100644
--- a/drivers/usb/gadget/msm72k_udc.c
+++ b/drivers/usb/gadget/msm72k_udc.c
@@ -294,15 +294,17 @@
static inline enum chg_type usb_get_chg_type(struct usb_info *ui)
{
- if ((readl(USB_PORTSC) & PORTSC_LS) == PORTSC_LS)
+ if ((readl_relaxed(USB_PORTSC) & PORTSC_LS) == PORTSC_LS) {
return USB_CHG_TYPE__WALLCHARGER;
- else {
+ } else if (ui->pdata->prop_chg) {
if (ui->gadget.speed == USB_SPEED_LOW ||
ui->gadget.speed == USB_SPEED_FULL ||
ui->gadget.speed == USB_SPEED_HIGH)
return USB_CHG_TYPE__SDP;
else
return USB_CHG_TYPE__INVALID;
+ } else {
+ return USB_CHG_TYPE__SDP;
}
}
@@ -332,7 +334,7 @@
if (temp == USB_CHG_TYPE__WALLCHARGER && !ui->proprietary_chg)
return USB_WALLCHARGER_CHG_CURRENT;
- else
+ else if (ui->pdata->prop_chg)
return USB_PROPRIETARY_CHG_CURRENT;
if (suspended || !configured)
@@ -2049,6 +2051,54 @@
.write = debug_reprime_ep,
};
+static ssize_t debug_prop_chg_write(struct file *file,
+ const char __user *buf, size_t count, loff_t *ppos)
+{
+ struct usb_info *ui = file->private_data;
+ char kbuf[2];
+
+ memset(kbuf, 0, sizeof(kbuf));
+
+ if (copy_from_user(kbuf, buf, sizeof(kbuf)))
+ return -EFAULT;
+
+ if (!strncmp(kbuf, "1", 1))
+ ui->pdata->prop_chg = 1;
+ else
+ ui->pdata->prop_chg = 0;
+
+ return count;
+}
+
+static ssize_t debug_prop_chg_read(struct file *file, char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ struct usb_info *ui = file->private_data;
+ char kbuf[2];
+ size_t c = 0;
+
+ memset(kbuf, 0, sizeof(kbuf));
+
+ c = scnprintf(kbuf, sizeof(kbuf), "%d\n", ui->pdata->prop_chg);
+
+ if (copy_to_user(ubuf, kbuf, c))
+ return -EFAULT;
+
+ return simple_read_from_buffer(ubuf, count, ppos, kbuf, c);
+}
+
+static int debug_prop_chg_open(struct inode *inode, struct file *file)
+{
+ file->private_data = inode->i_private;
+ return 0;
+}
+
+const struct file_operations debug_prop_chg_ops = {
+ .open = debug_prop_chg_open,
+ .read = debug_prop_chg_read,
+ .write = debug_prop_chg_write,
+};
+
static void usb_debugfs_init(struct usb_info *ui)
{
struct dentry *dent;
@@ -2063,6 +2113,8 @@
&debug_wlocks_ops);
debugfs_create_file("prime_fail_countt", 0666, dent, ui,
&prime_fail_ops);
+ debugfs_create_file("proprietary_chg", 0666, dent, ui,
+ &debug_prop_chg_ops);
}
#else
static void usb_debugfs_init(struct usb_info *ui) {}
diff --git a/drivers/usb/gadget/u_bam_data.c b/drivers/usb/gadget/u_bam_data.c
index a105f5d..32f683e 100644
--- a/drivers/usb/gadget/u_bam_data.c
+++ b/drivers/usb/gadget/u_bam_data.c
@@ -35,7 +35,7 @@
#define MSM_VENDOR_ID BIT(16)
struct data_port {
- struct usb_function func;
+ struct usb_composite_dev *cdev;
struct usb_ep *in;
struct usb_ep *out;
};
@@ -326,3 +326,54 @@
return ret;
}
+static int bam_data_wake_cb(void *param)
+{
+ struct bam_data_port *port = (struct bam_data_port *)param;
+ struct data_port *d_port = port->port_usb;
+
+ pr_info("%s: woken up by peer\n", __func__);
+
+ if (!d_port) {
+ pr_err("FAILED: d_port == NULL");
+ return -ENODEV;
+ }
+
+ if (!d_port->cdev) {
+ pr_err("FAILED: d_port->cdev == NULL");
+ return -ENODEV;
+ }
+
+ if (!d_port->cdev->gadget) {
+ pr_err("FAILED: d_port->cdev->gadget == NULL");
+ return -ENODEV;
+ }
+
+ return usb_gadget_wakeup(d_port->cdev->gadget);
+}
+
+void bam_data_suspend(u8 port_num)
+{
+
+ struct bam_data_port *port;
+ struct bam_data_ch_info *d;
+
+ port = bam2bam_data_ports[port_num];
+ d = &port->data_ch;
+
+ pr_info("%s: suspended port %d\n", __func__, port_num);
+ usb_bam_register_wake_cb(d->connection_idx, bam_data_wake_cb, port);
+}
+
+void bam_data_resume(u8 port_num)
+{
+
+ struct bam_data_port *port;
+ struct bam_data_ch_info *d;
+
+ port = bam2bam_data_ports[port_num];
+ d = &port->data_ch;
+
+ pr_info("%s: resumed port %d\n", __func__, port_num);
+ usb_bam_register_wake_cb(d->connection_idx, NULL, NULL);
+}
+
diff --git a/drivers/usb/gadget/u_data_hsic.c b/drivers/usb/gadget/u_data_hsic.c
index 89d2887..746c041 100644
--- a/drivers/usb/gadget/u_data_hsic.c
+++ b/drivers/usb/gadget/u_data_hsic.c
@@ -220,6 +220,7 @@
req->context = skb;
req->buf = skb->data;
req->length = skb->len;
+ req->zero = 1;
port->n_tx_req_queued++;
if (port->n_tx_req_queued == ghsic_data_tx_intr_thld) {
diff --git a/drivers/usb/gadget/u_data_hsuart.c b/drivers/usb/gadget/u_data_hsuart.c
index 74bb93f..4d88ea5 100644
--- a/drivers/usb/gadget/u_data_hsuart.c
+++ b/drivers/usb/gadget/u_data_hsuart.c
@@ -244,9 +244,7 @@
pr_debug("%s: port:%p tom:%lu pno:%d\n", __func__,
port, port->to_modem, port->port_num);
- spin_unlock_irqrestore(&port->rx_lock, flags);
ret = msm_smux_write(port->ch_id, skb, skb->data, skb->len);
- spin_lock_irqsave(&port->rx_lock, flags);
if (ret < 0) {
if (ret == -EAGAIN) {
/*flow control*/
diff --git a/drivers/usb/gadget/u_uac1.c b/drivers/usb/gadget/u_uac1.c
index af98989..fc4fb7a 100644
--- a/drivers/usb/gadget/u_uac1.c
+++ b/drivers/usb/gadget/u_uac1.c
@@ -1,6 +1,7 @@
/*
- * u_uac1.c -- ALSA audio utilities for Gadget stack
+ * u_audio.c -- ALSA audio utilities for Gadget stack
*
+ * Copyright (c) 2012, The Linux Foundation. All rights reserved.
* Copyright (C) 2008 Bryan Wu <cooloney@kernel.org>
* Copyright (C) 2008 Analog Devices, Inc
*
@@ -19,12 +20,17 @@
#include "u_uac1.h"
+#ifdef pr_fmt
+#undef pr_fmt
+#endif
+#define pr_fmt(fmt) "%s: " fmt, __func__
+
/*
* This component encapsulates the ALSA devices for USB audio gadget
*/
-#define FILE_PCM_PLAYBACK "/dev/snd/pcmC0D0p"
-#define FILE_PCM_CAPTURE "/dev/snd/pcmC0D0c"
+#define FILE_PCM_PLAYBACK "/dev/snd/pcmC0D5p"
+#define FILE_PCM_CAPTURE "/dev/snd/pcmC0D6c"
#define FILE_CONTROL "/dev/snd/controlC0"
static char *fn_play = FILE_PCM_PLAYBACK;
@@ -39,6 +45,10 @@
module_param(fn_cntl, charp, S_IRUGO);
MODULE_PARM_DESC(fn_cntl, "Control device file name");
+static struct gaudio *the_card;
+
+static bool audio_reinit;
+
/*-------------------------------------------------------------------------*/
/**
@@ -94,8 +104,9 @@
}
changed = snd_interval_refine(i, &t);
}
- } else
+ } else {
return -EINVAL;
+ }
if (changed) {
params->cmask |= 1 << var;
params->rmask |= 1 << var;
@@ -104,10 +115,32 @@
}
/*-------------------------------------------------------------------------*/
+static inline
+struct snd_interval *param_to_interval(struct snd_pcm_hw_params *p, int n)
+{
+ return &(p->intervals[n - SNDRV_PCM_HW_PARAM_FIRST_INTERVAL]);
+}
+
+int pcm_buffer_size(struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *i =
+ param_to_interval(params, SNDRV_PCM_HW_PARAM_BUFFER_BYTES);
+ pr_debug("buffer_bytes = (%d,%d) omin=%d omax=%d int=%d empty=%d\n",
+ i->min, i->max, i->openmin, i->openmax, i->integer, i->empty);
+ return i->min;
+}
+
+int pcm_period_size(struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *i =
+ param_to_interval(params, SNDRV_PCM_HW_PARAM_PERIOD_BYTES);
+ return i->min;
+}
+
/**
* Set default hardware params
*/
-static int playback_default_hw_params(struct gaudio_snd_dev *snd)
+static int playback_prepare_params(struct gaudio_snd_dev *snd)
{
struct snd_pcm_substream *substream = snd->substream;
struct snd_pcm_hw_params *params;
@@ -117,12 +150,12 @@
* SNDRV_PCM_ACCESS_RW_INTERLEAVED,
* SNDRV_PCM_FORMAT_S16_LE
* CHANNELS: 2
- * RATE: 48000
+ * RATE: 8000
*/
snd->access = SNDRV_PCM_ACCESS_RW_INTERLEAVED;
snd->format = SNDRV_PCM_FORMAT_S16_LE;
snd->channels = 2;
- snd->rate = 48000;
+ snd->rate = 8000;
params = kzalloc(sizeof(*params), GFP_KERNEL);
if (!params)
@@ -138,17 +171,23 @@
_snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_RATE,
snd->rate, 0);
- snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DROP, NULL);
- snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_HW_PARAMS, params);
+ result = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DROP, NULL);
+ if (result < 0)
+ pr_err("SNDRV_PCM_IOCTL_DROP failed: %d\n", (int)result);
- result = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_PREPARE, NULL);
+ result = snd_pcm_kernel_ioctl(substream,
+ SNDRV_PCM_IOCTL_HW_PARAMS, params);
if (result < 0) {
- ERROR(snd->card,
- "Preparing sound card failed: %d\n", (int)result);
+ pr_err("SNDRV_PCM_IOCTL_HW_PARAMS failed: %d\n", (int)result);
kfree(params);
return result;
}
+ result = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_PREPARE, NULL);
+ if (result < 0)
+ pr_err("Preparing playback failed: %d\n", (int)result);
+
+
/* Store the hardware parameters */
snd->access = params_access(params);
snd->format = params_format(params);
@@ -157,13 +196,236 @@
kfree(params);
- INFO(snd->card,
- "Hardware params: access %x, format %x, channels %d, rate %d\n",
+ pr_debug("playback params: access %x, format %x, channels %d, rate %d\n",
snd->access, snd->format, snd->channels, snd->rate);
return 0;
}
+static int capture_prepare_params(struct gaudio_snd_dev *snd)
+{
+ struct snd_pcm_substream *substream = snd->substream;
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct snd_pcm_hw_params *params;
+ struct snd_pcm_sw_params *swparams;
+ unsigned long period_size;
+ unsigned long buffer_size;
+ snd_pcm_sframes_t result = 0;
+
+ /*
+ * SNDRV_PCM_ACCESS_RW_INTERLEAVED,
+ * SNDRV_PCM_FORMAT_S16_LE
+ * CHANNELS: 1
+ * RATE: 8000
+ */
+ snd->access = SNDRV_PCM_ACCESS_RW_INTERLEAVED;
+ snd->format = SNDRV_PCM_FORMAT_S16_LE;
+ snd->channels = 1;
+ snd->rate = 8000;
+
+ params = kzalloc(sizeof(*params), GFP_KERNEL);
+ if (!params) {
+ pr_err("Failed to allocate hw params");
+ return -ENOMEM;
+ }
+
+ _snd_pcm_hw_params_any(params);
+ _snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_ACCESS,
+ snd->access, 0);
+ _snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_FORMAT,
+ snd->format, 0);
+ _snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_CHANNELS,
+ snd->channels, 0);
+ _snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_RATE,
+ snd->rate, 0);
+
+ result = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DROP, NULL);
+ if (result < 0)
+ pr_err("SNDRV_PCM_IOCTL_DROP failed: %d\n", (int)result);
+
+ result = snd_pcm_kernel_ioctl(substream,
+ SNDRV_PCM_IOCTL_HW_PARAMS, params);
+ if (result < 0) {
+ pr_err("SNDRV_PCM_IOCTL_HW_PARAMS failed: %d\n", (int)result);
+ kfree(params);
+ return result;
+ }
+
+ result = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_PREPARE,
+ NULL);
+ if (result < 0)
+ pr_err("Preparing capture failed: %d\n", (int)result);
+
+ /* Store the hardware parameters */
+ snd->access = params_access(params);
+ snd->format = params_format(params);
+ snd->channels = params_channels(params);
+ snd->rate = params_rate(params);
+
+ runtime->frame_bits = snd_pcm_format_physical_width(runtime->format);
+
+ kfree(params);
+
+ swparams = kzalloc(sizeof(*swparams), GFP_KERNEL);
+ if (!swparams) {
+ pr_err("Failed to allocate sw params");
+ return -ENOMEM;
+ }
+
+ buffer_size = pcm_buffer_size(params);
+ period_size = pcm_period_size(params);
+ swparams->avail_min = period_size/2;
+ swparams->xfer_align = period_size/2;
+
+ swparams->tstamp_mode = SNDRV_PCM_TSTAMP_NONE;
+ swparams->period_step = 1;
+ swparams->start_threshold = 1;
+ swparams->stop_threshold = INT_MAX;
+ swparams->silence_size = 0;
+ swparams->silence_threshold = 0;
+
+ result = snd_pcm_kernel_ioctl(substream,
+ SNDRV_PCM_IOCTL_SW_PARAMS, swparams);
+ if (result < 0)
+ pr_err("SNDRV_PCM_IOCTL_SW_PARAMS failed: %d\n", (int)result);
+
+ kfree(swparams);
+
+ pr_debug("capture params: access %x, format %x, channels %d, rate %d\n",
+ snd->access, snd->format, snd->channels, snd->rate);
+
+ return result;
+}
+
+/**
+ * Set default hardware params
+ */
+static int playback_default_hw_params(struct gaudio_snd_dev *snd)
+{
+ struct snd_pcm_hw_params *params;
+
+ /*
+ * SNDRV_PCM_ACCESS_RW_INTERLEAVED,
+ * SNDRV_PCM_FORMAT_S16_LE
+ * CHANNELS: 2
+ * RATE: 8000
+ */
+ snd->access = SNDRV_PCM_ACCESS_RW_INTERLEAVED;
+ snd->format = SNDRV_PCM_FORMAT_S16_LE;
+ snd->channels = 2;
+ snd->rate = 8000;
+
+ params = kzalloc(sizeof(*params), GFP_KERNEL);
+ if (!params)
+ return -ENOMEM;
+
+ _snd_pcm_hw_params_any(params);
+ _snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_ACCESS,
+ snd->access, 0);
+ _snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_FORMAT,
+ snd->format, 0);
+ _snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_CHANNELS,
+ snd->channels, 0);
+ _snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_RATE,
+ snd->rate, 0);
+
+ /* Store the hardware parameters */
+ snd->access = params_access(params);
+ snd->format = params_format(params);
+ snd->channels = params_channels(params);
+ snd->rate = params_rate(params);
+
+ kfree(params);
+
+ pr_debug("playback params: access %x, format %x, channels %d, rate %d\n",
+ snd->access, snd->format, snd->channels, snd->rate);
+
+ return 0;
+}
+
+static int capture_default_hw_params(struct gaudio_snd_dev *snd)
+{
+ struct snd_pcm_hw_params *params;
+
+ /*
+ * SNDRV_PCM_ACCESS_RW_INTERLEAVED,
+ * SNDRV_PCM_FORMAT_S16_LE
+ * CHANNELS: 1
+ * RATE: 8000
+ */
+ snd->access = SNDRV_PCM_ACCESS_RW_INTERLEAVED;
+ snd->format = SNDRV_PCM_FORMAT_S16_LE;
+ snd->channels = 1;
+ snd->rate = 8000;
+
+ params = kzalloc(sizeof(*params), GFP_KERNEL);
+ if (!params)
+ return -ENOMEM;
+
+ _snd_pcm_hw_params_any(params);
+ _snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_ACCESS,
+ snd->access, 0);
+ _snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_FORMAT,
+ snd->format, 0);
+ _snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_CHANNELS,
+ snd->channels, 0);
+ _snd_pcm_hw_param_set(params, SNDRV_PCM_HW_PARAM_RATE,
+ snd->rate, 0);
+
+ /* Store the hardware parameters */
+ snd->access = params_access(params);
+ snd->format = params_format(params);
+ snd->channels = params_channels(params);
+ snd->rate = params_rate(params);
+
+ kfree(params);
+
+ pr_debug("capture params: access %x, format %x, channels %d, rate %d\n",
+ snd->access, snd->format, snd->channels, snd->rate);
+
+ return 0;
+}
+
+static int gaudio_open_streams(void)
+{
+ struct gaudio_snd_dev *snd;
+ int res = 0;
+
+ if (!the_card) {
+ pr_err("%s: Card is NULL", __func__);
+ return -ENODEV;
+ }
+
+ pr_debug("Initialize hw params");
+
+ /* Open PCM playback device and setup substream */
+ snd = &the_card->playback;
+ res = playback_prepare_params(snd);
+ if (res) {
+ pr_err("Setting playback params failed: err %d", res);
+ return res;
+ }
+
+ pr_debug("Initialized playback params");
+
+ /* Open PCM capture device and setup substream */
+ snd = &the_card->capture;
+ res = capture_prepare_params(snd);
+ if (res) {
+ pr_err("Setting capture params failed: err %d", res);
+ return res;
+ }
+
+ pr_info("Initialized capture params");
+
+ return 0;
+}
+
+void u_audio_clear(void)
+{
+ audio_reinit = false;
+}
+
/**
* Playback audio buffer data by ALSA PCM device
*/
@@ -175,28 +437,106 @@
mm_segment_t old_fs;
ssize_t result;
snd_pcm_sframes_t frames;
+ int err = 0;
+
+ if (!count) {
+ pr_err("Buffer is empty, no data to play");
+ return 0;
+ }
+
+ if (!audio_reinit) {
+ err = gaudio_open_streams();
+ if (err) {
+ pr_err("Failed to init audio streams");
+ return 0;
+ }
+ audio_reinit = 1;
+ }
try_again:
if (runtime->status->state == SNDRV_PCM_STATE_XRUN ||
- runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
+ runtime->status->state == SNDRV_PCM_STATE_SUSPENDED ||
+ runtime->status->state == SNDRV_PCM_STATE_SETUP) {
result = snd_pcm_kernel_ioctl(substream,
SNDRV_PCM_IOCTL_PREPARE, NULL);
if (result < 0) {
- ERROR(card, "Preparing sound card failed: %d\n",
+ pr_err("Preparing playback failed: %d\n",
+ (int)result);
+ return result;
+ }
+ }
+
+ if (!runtime->frame_bits) {
+ pr_err("SND failure - runtime->frame_bits == 0");
+ return 0;
+ }
+
+ frames = bytes_to_frames(runtime, count);
+ pr_debug("runtime->frame_bits = %d, count = %d, frames = %d",
+ runtime->frame_bits, (int)count, (int)frames);
+
+ old_fs = get_fs();
+ set_fs(KERNEL_DS);
+ result = snd_pcm_lib_write(snd->substream, buf, frames);
+ if (result != frames) {
+ pr_err("snd_pcm_lib_write failed with err %d\n", (int)result);
+ set_fs(old_fs);
+ goto try_again;
+ }
+ set_fs(old_fs);
+
+ pr_debug("Done. Sent %d frames", (int)frames);
+
+ return 0;
+}
+
+static size_t u_audio_capture(struct gaudio *card, void *buf, size_t count)
+{
+ ssize_t result;
+ mm_segment_t old_fs;
+ snd_pcm_sframes_t frames;
+ int err = 0;
+
+ struct gaudio_snd_dev *snd = &card->capture;
+ struct snd_pcm_substream *substream = snd->substream;
+ struct snd_pcm_runtime *runtime = substream->runtime;
+
+ if (!audio_reinit) {
+ err = gaudio_open_streams();
+ if (err) {
+ pr_err("Failed to init audio streams: err %d", err);
+ return 0;
+ }
+ audio_reinit = 1;
+ }
+
+try_again:
+ if (runtime->status->state == SNDRV_PCM_STATE_XRUN ||
+ runtime->status->state == SNDRV_PCM_STATE_SUSPENDED ||
+ runtime->status->state == SNDRV_PCM_STATE_SETUP) {
+ result = snd_pcm_kernel_ioctl(substream,
+ SNDRV_PCM_IOCTL_PREPARE, NULL);
+ if (result < 0) {
+ pr_err("Preparing capture failed: %d\n",
(int)result);
return result;
}
}
frames = bytes_to_frames(runtime, count);
+
old_fs = get_fs();
set_fs(KERNEL_DS);
- result = snd_pcm_lib_write(snd->substream, buf, frames);
+
+ pr_debug("frames = %d, count = %d", (int)frames, count);
+
+ result = snd_pcm_lib_read(substream, buf, frames);
if (result != frames) {
- ERROR(card, "Playback error: %d\n", (int)result);
+ pr_err("Capture error: %d\n", (int)result);
set_fs(old_fs);
goto try_again;
}
+
set_fs(old_fs);
return 0;
@@ -204,14 +544,29 @@
static int u_audio_get_playback_channels(struct gaudio *card)
{
+ pr_debug("Return %d", card->playback.channels);
return card->playback.channels;
}
static int u_audio_get_playback_rate(struct gaudio *card)
{
+ pr_debug("Return %d", card->playback.rate);
return card->playback.rate;
}
+static int u_audio_get_capture_channels(struct gaudio *card)
+{
+ pr_debug("Return %d", card->capture.channels);
+ return card->capture.channels;
+}
+
+static int u_audio_get_capture_rate(struct gaudio *card)
+{
+ pr_debug("Return %d", card->capture.rate);
+ return card->capture.rate;
+}
+
+
/**
* Open ALSA PCM and control device files
* Initial the PCM or control device
@@ -220,16 +575,18 @@
{
struct snd_pcm_file *pcm_file;
struct gaudio_snd_dev *snd;
+ int res = 0;
- if (!card)
+ if (!card) {
+ pr_err("%s: Card is NULL", __func__);
return -ENODEV;
-
+ }
/* Open control device */
snd = &card->control;
snd->filp = filp_open(fn_cntl, O_RDWR, 0);
if (IS_ERR(snd->filp)) {
int ret = PTR_ERR(snd->filp);
- ERROR(card, "unable to open sound control device file: %s\n",
+ pr_err("unable to open sound control device file: %s\n",
fn_cntl);
snd->filp = NULL;
return ret;
@@ -240,29 +597,41 @@
snd = &card->playback;
snd->filp = filp_open(fn_play, O_WRONLY, 0);
if (IS_ERR(snd->filp)) {
- ERROR(card, "No such PCM playback device: %s\n", fn_play);
+ pr_err("No such PCM playback device: %s\n", fn_play);
snd->filp = NULL;
+ return -EINVAL;
}
+ pr_debug("Initialized PCM playback device: %s\n", fn_play);
+
pcm_file = snd->filp->private_data;
snd->substream = pcm_file->substream;
snd->card = card;
- playback_default_hw_params(snd);
+ res = playback_default_hw_params(snd);
+ if (res) {
+ pr_err("Setting playback HW params failed: err %d", res);
+ return res;
+ }
/* Open PCM capture device and setup substream */
snd = &card->capture;
snd->filp = filp_open(fn_cap, O_RDONLY, 0);
if (IS_ERR(snd->filp)) {
- ERROR(card, "No such PCM capture device: %s\n", fn_cap);
+ pr_err("No such PCM capture device: %s\n", fn_cap);
snd->substream = NULL;
snd->card = NULL;
snd->filp = NULL;
- } else {
- pcm_file = snd->filp->private_data;
- snd->substream = pcm_file->substream;
- snd->card = card;
+ return -EINVAL;
}
- return 0;
+ pcm_file = snd->filp->private_data;
+ snd->substream = pcm_file->substream;
+ snd->card = card;
+ res = capture_default_hw_params(snd);
+
+ if (res)
+ pr_err("Setting capture HW params failed: err %d", res);
+
+ return res;
}
/**
@@ -272,6 +641,7 @@
{
struct gaudio_snd_dev *snd;
+ pr_debug("Enter");
/* Close control device */
snd = &gau->control;
if (snd->filp)
@@ -290,7 +660,7 @@
return 0;
}
-static struct gaudio *the_card;
+
/**
* gaudio_setup - setup ALSA interface and preparing for USB transfer
*
@@ -298,18 +668,17 @@
*
* Returns negative errno, or zero on success
*/
-int __init gaudio_setup(struct gaudio *card)
+int gaudio_setup(struct gaudio *card)
{
int ret;
ret = gaudio_open_snd_dev(card);
if (ret)
- ERROR(card, "we need at least one control device\n");
+ pr_err("Failed to open snd devices\n");
else if (!the_card)
the_card = card;
return ret;
-
}
/**
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 8d967cd..adbf217 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -94,7 +94,7 @@
*/
#define EHCI_TUNE_FLS 1 /* (medium) 512-frame schedule */
-#define EHCI_IAA_MSECS 10 /* arbitrary */
+#define EHCI_IAA_MSECS 100 /* arbitrary */
#define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
#define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
#define EHCI_SHRINK_JIFFIES (DIV_ROUND_UP(HZ, 200) + 1)
diff --git a/drivers/usb/host/ehci-msm-hsic.c b/drivers/usb/host/ehci-msm-hsic.c
index fee7a09..6fe9e58 100644
--- a/drivers/usb/host/ehci-msm-hsic.c
+++ b/drivers/usb/host/ehci-msm-hsic.c
@@ -659,12 +659,6 @@
return 0;
}
- if (!(readl_relaxed(USB_PORTSC) & PORT_PE)) {
- dev_dbg(mehci->dev, "%s:port is not enabled skip suspend\n",
- __func__);
- return -EAGAIN;
- }
-
disable_irq(hcd->irq);
/* make sure we don't race against a remote wakeup */
@@ -932,8 +926,19 @@
return 0;
}
+#ifdef CONFIG_PM
+
static int ehci_hsic_bus_suspend(struct usb_hcd *hcd)
{
+ struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd);
+
+ if (!(readl_relaxed(USB_PORTSC) & PORT_PE)) {
+ dbg_log_event(NULL, "RH suspend attempt failed", 0);
+ dev_dbg(mehci->dev, "%s:port is not enabled skip suspend\n",
+ __func__);
+ return -EAGAIN;
+ }
+
dbg_log_event(NULL, "Suspend RH", 0);
return ehci_bus_suspend(hcd);
}
@@ -1132,6 +1137,13 @@
return 0;
}
+#else
+
+#define ehci_hsic_bus_suspend NULL
+#define ehci_hsic_bus_resume NULL
+
+#endif /* CONFIG_PM */
+
static struct hc_driver msm_hsic_driver = {
.description = hcd_name,
.product_desc = "Qualcomm EHCI Host Controller using HSIC",
@@ -1276,6 +1288,7 @@
static irqreturn_t msm_hsic_wakeup_irq(int irq, void *data)
{
struct msm_hsic_hcd *mehci = data;
+ int ret;
mehci->wakeup_int_cnt++;
dbg_log_event(NULL, "Remote Wakeup IRQ", mehci->wakeup_int_cnt);
@@ -1293,8 +1306,17 @@
spin_unlock(&mehci->wakeup_lock);
if (!atomic_read(&mehci->pm_usage_cnt)) {
- atomic_set(&mehci->pm_usage_cnt, 1);
- pm_runtime_get(mehci->dev);
+ ret = pm_runtime_get(mehci->dev);
+ /*
+ * HSIC runtime resume can race with us.
+ * if we are active (ret == 1) or resuming
+ * (ret == -EINPROGRESS), decrement the
+ * PM usage counter before returning.
+ */
+ if ((ret == 1) || (ret == -EINPROGRESS))
+ pm_runtime_put_noidle(mehci->dev);
+ else
+ atomic_set(&mehci->pm_usage_cnt, 1);
}
return IRQ_HANDLED;
@@ -1519,6 +1541,8 @@
return -ENOMEM;
}
+ hcd_to_bus(hcd)->skip_resume = true;
+
hcd->irq = platform_get_irq(pdev, 0);
if (hcd->irq < 0) {
dev_err(&pdev->dev, "Unable to get IRQ resource\n");
@@ -1788,6 +1812,15 @@
if (device_may_wakeup(dev))
disable_irq_wake(hcd->irq);
+ /*
+ * Keep HSIC in Low Power Mode if system is resumed
+ * by any other wakeup source. HSIC is resumed later
+ * when remote wakeup is received or interface driver
+ * start I/O.
+ */
+ if (!atomic_read(&mehci->pm_usage_cnt))
+ return 0;
+
ret = msm_hsic_resume(mehci);
if (ret)
return ret;
diff --git a/drivers/usb/misc/diag_bridge.c b/drivers/usb/misc/diag_bridge.c
index cad411d..b1b7763 100644
--- a/drivers/usb/misc/diag_bridge.c
+++ b/drivers/usb/misc/diag_bridge.c
@@ -60,6 +60,11 @@
return -ENODEV;
}
+ if (dev->ops) {
+ pr_err("bridge already opened");
+ return -EALREADY;
+ }
+
dev->ops = ops;
dev->err = 0;
@@ -82,6 +87,16 @@
{
struct diag_bridge *dev = __dev;
+ if (!dev) {
+ pr_err("dev is null");
+ return;
+ }
+
+ if (!dev->ops) {
+ pr_err("can't close bridge that was not open");
+ return;
+ }
+
dev_dbg(&dev->ifc->dev, "%s:\n", __func__);
usb_kill_anchored_urbs(&dev->submitted);
diff --git a/drivers/usb/misc/ks_bridge.c b/drivers/usb/misc/ks_bridge.c
index 8753c0d..656e379 100644
--- a/drivers/usb/misc/ks_bridge.c
+++ b/drivers/usb/misc/ks_bridge.c
@@ -168,11 +168,10 @@
size_t len;
pkt = list_first_entry(&ksb->to_ks_list, struct data_pkt, list);
- len = min_t(size_t, space, pkt->len);
- pkt->n_read += len;
+ len = min_t(size_t, space, pkt->len - pkt->n_read);
spin_unlock_irqrestore(&ksb->lock, flags);
- ret = copy_to_user(buf + copied, pkt->buf, len);
+ ret = copy_to_user(buf + copied, pkt->buf + pkt->n_read, len);
if (ret) {
pr_err("copy_to_user failed err:%d\n", ret);
ksb_free_data_pkt(pkt);
@@ -180,6 +179,7 @@
return ret;
}
+ pkt->n_read += len;
space -= len;
copied += len;
@@ -262,6 +262,8 @@
return;
}
+ usb_free_urb(urb);
+
spin_lock_irqsave(&ksb->lock, flags);
}
spin_unlock_irqrestore(&ksb->lock, flags);
diff --git a/drivers/usb/otg/msm72k_otg.c b/drivers/usb/otg/msm72k_otg.c
index f62ae76..ca1b155 100644
--- a/drivers/usb/otg/msm72k_otg.c
+++ b/drivers/usb/otg/msm72k_otg.c
@@ -1229,7 +1229,7 @@
static irqreturn_t msm_otg_irq(int irq, void *data)
{
struct msm_otg *dev = data;
- u32 otgsc, sts, pc, sts_mask;
+ u32 otgsc, sts, pc;
irqreturn_t ret = IRQ_HANDLED;
int work = 0;
enum usb_otg_state state;
@@ -1250,12 +1250,16 @@
otgsc = readl(USB_OTGSC);
sts = readl(USB_USBSTS);
- sts_mask = (otgsc & OTGSC_INTR_MASK) >> 8;
-
- if (!((otgsc & sts_mask) || (sts & STS_PCI))) {
+ /* At times during USB disconnect, hardware generates 1MSIS interrupt
+ * during PHY reset, which leads to irq not handled error as IRQ_NONE
+ * is notified. To workaround this issue, check for all the
+ * OTG_INTR_STS_MASK bits and if set, clear them and notify IRQ_HANDLED.
+ */
+ if (!((otgsc & OTGSC_INTR_STS_MASK) || (sts & STS_PCI))) {
ret = IRQ_NONE;
goto out;
}
+ writel_relaxed(otgsc, USB_OTGSC);
spin_lock_irqsave(&dev->lock, flags);
state = dev->phy.state;
@@ -1277,10 +1281,8 @@
set_bit(A_BUS_REQ, &dev->inputs);
clear_bit(ID, &dev->inputs);
}
- writel(otgsc, USB_OTGSC);
work = 1;
} else if (otgsc & OTGSC_BSVIS) {
- writel(otgsc, USB_OTGSC);
/* BSV interrupt comes when operating as an A-device
* (VBUS on/off).
* But, handle BSV when charger is removed from ACA in ID_A
@@ -1298,7 +1300,6 @@
work = 1;
} else if (otgsc & OTGSC_DPIS) {
pr_debug("DPIS detected\n");
- writel(otgsc, USB_OTGSC);
set_bit(A_SRP_DET, &dev->inputs);
set_bit(A_BUS_REQ, &dev->inputs);
work = 1;
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index 5637f19..813fc94 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -52,6 +52,7 @@
#define DRIVER_NAME "msm_otg"
#define ID_TIMER_FREQ (jiffies + msecs_to_jiffies(500))
+#define CHG_RECHECK_DELAY (jiffies + msecs_to_jiffies(2000))
#define ULPI_IO_TIMEOUT_USEC (10 * 1000)
#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
#define USB_PHY_3P3_VOL_MAX 3300000 /* uV */
@@ -69,6 +70,18 @@
#define USB_SUSPEND_DELAY_TIME (500 * HZ/1000) /* 500 msec */
+enum msm_otg_phy_reg_mode {
+ USB_PHY_REG_OFF,
+ USB_PHY_REG_ON,
+ USB_PHY_REG_LPM_ON,
+ USB_PHY_REG_LPM_OFF,
+};
+
+static char *override_phy_init;
+module_param(override_phy_init, charp, S_IRUGO|S_IWUSR);
+MODULE_PARM_DESC(override_phy_init,
+ "Override HSUSB PHY Init Settings");
+
static DECLARE_COMPLETION(pmic_vbus_init);
static struct msm_otg *the_msm_otg;
static bool debug_aca_enabled;
@@ -168,7 +181,8 @@
return ret;
}
-static int msm_hsusb_ldo_enable(struct msm_otg *motg, int on)
+static int msm_hsusb_ldo_enable(struct msm_otg *motg,
+ enum msm_otg_phy_reg_mode mode)
{
int ret = 0;
@@ -182,7 +196,8 @@
return -ENODEV;
}
- if (on) {
+ switch (mode) {
+ case USB_PHY_REG_ON:
ret = regulator_set_optimum_mode(hsusb_1p8,
USB_PHY_1P8_HPM_LOAD);
if (ret < 0) {
@@ -219,7 +234,9 @@
return ret;
}
- } else {
+ break;
+
+ case USB_PHY_REG_OFF:
ret = regulator_disable(hsusb_1p8);
if (ret) {
dev_err(motg->phy.dev, "%s: unable to disable the hsusb 1p8\n",
@@ -242,9 +259,55 @@
if (ret < 0)
pr_err("%s: Unable to set LPM of the regulator:"
"HSUSB_3p3\n", __func__);
+
+ break;
+
+ case USB_PHY_REG_LPM_ON:
+ ret = regulator_set_optimum_mode(hsusb_1p8,
+ USB_PHY_1P8_LPM_LOAD);
+ if (ret < 0) {
+ pr_err("%s: Unable to set LPM of the regulator: HSUSB_1p8\n",
+ __func__);
+ return ret;
+ }
+
+ ret = regulator_set_optimum_mode(hsusb_3p3,
+ USB_PHY_3P3_LPM_LOAD);
+ if (ret < 0) {
+ pr_err("%s: Unable to set LPM of the regulator: HSUSB_3p3\n",
+ __func__);
+ regulator_set_optimum_mode(hsusb_1p8, USB_PHY_REG_ON);
+ return ret;
+ }
+
+ break;
+
+ case USB_PHY_REG_LPM_OFF:
+ ret = regulator_set_optimum_mode(hsusb_1p8,
+ USB_PHY_1P8_HPM_LOAD);
+ if (ret < 0) {
+ pr_err("%s: Unable to set HPM of the regulator: HSUSB_1p8\n",
+ __func__);
+ return ret;
+ }
+
+ ret = regulator_set_optimum_mode(hsusb_3p3,
+ USB_PHY_3P3_HPM_LOAD);
+ if (ret < 0) {
+ pr_err("%s: Unable to set HPM of the regulator: HSUSB_3p3\n",
+ __func__);
+ regulator_set_optimum_mode(hsusb_1p8, USB_PHY_REG_ON);
+ return ret;
+ }
+
+ break;
+
+ default:
+ pr_err("%s: Unsupported mode (%d).", __func__, mode);
+ return -ENOTSUPP;
}
- pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
+ pr_debug("%s: USB reg mode (%d) (OFF/HPM/LPM)\n", __func__, mode);
return ret < 0 ? ret : 0;
}
@@ -326,12 +389,26 @@
static void ulpi_init(struct msm_otg *motg)
{
struct msm_otg_platform_data *pdata = motg->pdata;
- int *seq = pdata->phy_init_seq;
+ int aseq[10];
+ int *seq = NULL;
+
+ if (override_phy_init) {
+ pr_debug("%s(): HUSB PHY Init:%s\n", __func__,
+ override_phy_init);
+ get_options(override_phy_init, ARRAY_SIZE(aseq), aseq);
+ seq = &aseq[1];
+ } else {
+ seq = pdata->phy_init_seq;
+ }
if (!seq)
return;
while (seq[0] >= 0) {
+ if (override_phy_init)
+ pr_debug("ulpi: write 0x%02x to 0x%02x\n",
+ seq[0], seq[1]);
+
dev_vdbg(motg->phy.dev, "ulpi: write 0x%02x to 0x%02x\n",
seq[0], seq[1]);
ulpi_write(&motg->phy, seq[0], seq[1]);
@@ -881,8 +958,12 @@
if (motg->caps & ALLOW_PHY_POWER_COLLAPSE &&
!host_bus_suspend && !dcp) {
- msm_hsusb_ldo_enable(motg, 0);
+ msm_hsusb_ldo_enable(motg, USB_PHY_REG_OFF);
motg->lpm_flags |= PHY_PWR_COLLAPSED;
+ } else if (motg->caps & ALLOW_PHY_REGULATORS_LPM &&
+ !host_bus_suspend && !device_bus_suspend && !dcp) {
+ msm_hsusb_ldo_enable(motg, USB_PHY_REG_LPM_ON);
+ motg->lpm_flags |= PHY_REGULATORS_LPM;
}
if (motg->lpm_flags & PHY_RETENTIONED) {
@@ -946,8 +1027,11 @@
}
if (motg->lpm_flags & PHY_PWR_COLLAPSED) {
- msm_hsusb_ldo_enable(motg, 1);
+ msm_hsusb_ldo_enable(motg, USB_PHY_REG_ON);
motg->lpm_flags &= ~PHY_PWR_COLLAPSED;
+ } else if (motg->lpm_flags & PHY_REGULATORS_LPM) {
+ msm_hsusb_ldo_enable(motg, USB_PHY_REG_LPM_OFF);
+ motg->lpm_flags &= ~PHY_REGULATORS_LPM;
}
if (motg->lpm_flags & PHY_RETENTIONED) {
@@ -1565,6 +1649,26 @@
return ret;
}
+static void msm_otg_chg_check_timer_func(unsigned long data)
+{
+ struct msm_otg *motg = (struct msm_otg *) data;
+ struct usb_otg *otg = motg->phy.otg;
+
+ if (atomic_read(&motg->in_lpm) ||
+ !test_bit(B_SESS_VLD, &motg->inputs) ||
+ otg->phy->state != OTG_STATE_B_PERIPHERAL ||
+ otg->gadget->speed != USB_SPEED_UNKNOWN) {
+ dev_dbg(otg->phy->dev, "Nothing to do in chg_check_timer\n");
+ return;
+ }
+
+ if ((readl_relaxed(USB_PORTSC) & PORTSC_LS) == PORTSC_LS) {
+ dev_dbg(otg->phy->dev, "DCP is detected as SDP\n");
+ set_bit(B_FALSE_SDP, &motg->inputs);
+ queue_work(system_nrt_wq, &motg->sm_work);
+ }
+}
+
static bool msm_chg_aca_detect(struct msm_otg *motg)
{
struct usb_phy *phy = &motg->phy;
@@ -2283,6 +2387,8 @@
msm_otg_start_peripheral(otg, 1);
otg->phy->state =
OTG_STATE_B_PERIPHERAL;
+ mod_timer(&motg->chg_check_timer,
+ CHG_RECHECK_DELAY);
break;
default:
break;
@@ -2303,6 +2409,8 @@
break;
} else {
pr_debug("chg_work cancel");
+ del_timer_sync(&motg->chg_check_timer);
+ clear_bit(B_FALSE_SDP, &motg->inputs);
cancel_delayed_work_sync(&motg->chg_work);
motg->chg_state = USB_CHG_STATE_UNDEFINED;
motg->chg_type = USB_INVALID_CHARGER;
@@ -2340,7 +2448,15 @@
}
break;
case OTG_STATE_B_PERIPHERAL:
- if (!test_bit(ID, &motg->inputs) ||
+ if (test_bit(B_SESS_VLD, &motg->inputs) &&
+ test_bit(B_FALSE_SDP, &motg->inputs)) {
+ pr_debug("B_FALSE_SDP\n");
+ msm_otg_start_peripheral(otg, 0);
+ motg->chg_type = USB_DCP_CHARGER;
+ clear_bit(B_FALSE_SDP, &motg->inputs);
+ otg->phy->state = OTG_STATE_B_IDLE;
+ work = 1;
+ } else if (!test_bit(ID, &motg->inputs) ||
test_bit(ID_A, &motg->inputs) ||
test_bit(ID_B, &motg->inputs) ||
!test_bit(B_SESS_VLD, &motg->inputs)) {
@@ -3622,7 +3738,7 @@
}
}
- ret = msm_hsusb_ldo_enable(motg, 1);
+ ret = msm_hsusb_ldo_enable(motg, USB_PHY_REG_ON);
if (ret) {
dev_err(&pdev->dev, "hsusb vreg enable failed\n");
goto free_ldo_init;
@@ -3645,6 +3761,8 @@
INIT_DELAYED_WORK(&motg->suspend_work, msm_otg_suspend_work);
setup_timer(&motg->id_timer, msm_otg_id_timer_func,
(unsigned long) motg);
+ setup_timer(&motg->chg_check_timer, msm_otg_chg_check_timer_func,
+ (unsigned long) motg);
ret = request_irq(motg->irq, msm_otg_irq, IRQF_SHARED,
"msm_otg", motg);
if (ret) {
@@ -3724,7 +3842,8 @@
ALLOW_PHY_RETENTION;
if (motg->pdata->otg_control == OTG_PHY_CONTROL)
- motg->caps = ALLOW_PHY_RETENTION;
+ motg->caps = ALLOW_PHY_RETENTION |
+ ALLOW_PHY_REGULATORS_LPM;
}
if (motg->pdata->enable_lpm_on_dev_suspend)
@@ -3756,7 +3875,7 @@
destroy_wlock:
wake_lock_destroy(&motg->wlock);
clk_disable_unprepare(motg->core_clk);
- msm_hsusb_ldo_enable(motg, 0);
+ msm_hsusb_ldo_enable(motg, USB_PHY_REG_OFF);
free_ldo_init:
msm_hsusb_ldo_init(motg, 0);
free_hsusb_vddcx:
@@ -3843,7 +3962,7 @@
clk_disable_unprepare(motg->pclk);
clk_disable_unprepare(motg->core_clk);
msm_xo_put(motg->xo_handle);
- msm_hsusb_ldo_enable(motg, 0);
+ msm_hsusb_ldo_enable(motg, USB_PHY_REG_OFF);
msm_hsusb_ldo_init(motg, 0);
regulator_disable(hsusb_vddcx);
regulator_set_voltage(hsusb_vddcx,
diff --git a/drivers/video/msm/Kconfig b/drivers/video/msm/Kconfig
index 54d7090..ed4c25d 100644
--- a/drivers/video/msm/Kconfig
+++ b/drivers/video/msm/Kconfig
@@ -820,14 +820,6 @@
---help---
Support for DVI mode for MSM HDMI 1080p Panel
-config FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
- depends on FB_MSM_HDMI_MSM_PANEL
- bool "Use HDCP mode"
- default y
- ---help---
- Support for HDCP mode for MSM HDMI 1080p Panel
- Choose to enable HDCP
-
config FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT
depends on FB_MSM_HDMI_MSM_PANEL
bool "Enable CEC"
diff --git a/drivers/video/msm/hdmi_msm.c b/drivers/video/msm/hdmi_msm.c
index 902e92c..deef4ab 100644
--- a/drivers/video/msm/hdmi_msm.c
+++ b/drivers/video/msm/hdmi_msm.c
@@ -60,18 +60,16 @@
struct workqueue_struct *hdmi_work_queue;
struct hdmi_msm_state_type *hdmi_msm_state;
+/* Enable HDCP by default */
+static bool hdcp_feature_on = true;
+
DEFINE_MUTEX(hdmi_msm_state_mutex);
EXPORT_SYMBOL(hdmi_msm_state_mutex);
static DEFINE_MUTEX(hdcp_auth_state_mutex);
static void hdmi_msm_dump_regs(const char *prefix);
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
static void hdmi_msm_hdcp_enable(void);
-#else
-static inline void hdmi_msm_hdcp_enable(void) {}
-#endif
-
static void hdmi_msm_turn_on(void);
static int hdmi_msm_audio_off(void);
static int hdmi_msm_read_edid(void);
@@ -675,7 +673,6 @@
case 0x00D8: return "ACR_48_1";
case 0x00E4: return "AUDIO_INFO0";
case 0x00E8: return "AUDIO_INFO1";
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
case 0x0110: return "HDCP_CTRL";
case 0x0114: return "HDCP_DEBUG_CTRL";
case 0x0118: return "HDCP_INT_CTRL";
@@ -690,7 +687,6 @@
case 0x014C: return "HDCP_RCVPORT_DATA5";
case 0x0150: return "HDCP_RCVPORT_DATA6";
case 0x0168: return "HDCP_RCVPORT_DATA12";
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
case 0x01D0: return "AUDIO_CFG";
case 0x0208: return "USEC_REFTIMER";
case 0x020C: return "DDC_CTRL";
@@ -705,14 +701,10 @@
case 0x0250: return "HPD_INT_STATUS";
case 0x0254: return "HPD_INT_CTRL";
case 0x0258: return "HPD_CTRL";
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
case 0x025C: return "HDCP_ENTROPY_CTRL1";
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
case 0x027C: return "DDC_REF";
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
case 0x0284: return "HDCP_SW_UPPER_AKSV";
case 0x0288: return "HDCP_SW_LOWER_AKSV";
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
case 0x02B4: return "ACTIVE_H";
case 0x02B8: return "ACTIVE_V";
case 0x02BC: return "ACTIVE_V_F2";
@@ -781,7 +773,7 @@
DEV_INFO("HDMI HPD: CONNECTED: send ONLINE\n");
kobject_uevent(external_common_state->uevent_kobj, KOBJ_ONLINE);
- if (!external_common_state->present_hdcp) {
+ if (!hdmi_msm_state->hdcp_enable) {
/* Send Audio for HDMI Compliance Cases*/
envp[0] = "HDCP_STATE=PASS";
envp[1] = NULL;
@@ -870,10 +862,13 @@
}
#endif
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
static void hdcp_deauthenticate(void);
static void hdmi_msm_hdcp_reauth_work(struct work_struct *work)
{
+ if (!hdmi_msm_state->hdcp_enable) {
+ DEV_DBG("%s: HDCP not enabled\n", __func__);
+ return;
+ }
/* Don't process recursive actions */
mutex_lock(&hdmi_msm_state_mutex);
@@ -891,17 +886,20 @@
* Therefore, as surprising as it may sound do reauth
* only if the device is HDCP-capable
*/
- if (external_common_state->present_hdcp) {
- hdcp_deauthenticate();
- mutex_lock(&hdcp_auth_state_mutex);
- hdmi_msm_state->reauth = TRUE;
- mutex_unlock(&hdcp_auth_state_mutex);
- mod_timer(&hdmi_msm_state->hdcp_timer, jiffies + HZ/2);
- }
+ hdcp_deauthenticate();
+ mutex_lock(&hdcp_auth_state_mutex);
+ hdmi_msm_state->reauth = TRUE;
+ mutex_unlock(&hdcp_auth_state_mutex);
+ mod_timer(&hdmi_msm_state->hdcp_timer, jiffies + HZ/2);
}
static void hdmi_msm_hdcp_work(struct work_struct *work)
{
+ if (!hdmi_msm_state->hdcp_enable) {
+ DEV_DBG("%s: HDCP not enabled\n", __func__);
+ return;
+ }
+
/* Only re-enable if cable still connected */
mutex_lock(&external_common_state_hpd_mutex);
if (external_common_state->hpd_state &&
@@ -922,7 +920,111 @@
hdmi_msm_state->reauth = FALSE;
}
}
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
+
+int hdmi_msm_process_hdcp_interrupts(void)
+{
+ int rc = -1;
+ uint32 hdcp_int_val;
+ char *envp[2];
+
+ if (!hdmi_msm_state->hdcp_enable) {
+ DEV_DBG("%s: HDCP not enabled\n", __func__);
+ return -EINVAL;
+ }
+
+ /* HDCP_INT_CTRL[0x0118]
+ * [0] AUTH_SUCCESS_INT [R] HDCP Authentication Success
+ * interrupt status
+ * [1] AUTH_SUCCESS_ACK [W] Acknowledge bit for HDCP
+ * Authentication Success bit - write 1 to clear
+ * [2] AUTH_SUCCESS_MASK [R/W] Mask bit for HDCP Authentication
+ * Success interrupt - set to 1 to enable interrupt */
+ hdcp_int_val = HDMI_INP_ND(0x0118);
+ if ((hdcp_int_val & (1 << 2)) && (hdcp_int_val & (1 << 0))) {
+ /* AUTH_SUCCESS_INT */
+ HDMI_OUTP(0x0118, (hdcp_int_val | (1 << 1)) & ~(1 << 0));
+ DEV_INFO("HDCP: AUTH_SUCCESS_INT received\n");
+ complete_all(&hdmi_msm_state->hdcp_success_done);
+ return 0;
+ }
+
+ /* [4] AUTH_FAIL_INT [R] HDCP Authentication Lost
+ * interrupt Status
+ * [5] AUTH_FAIL_ACK [W] Acknowledge bit for HDCP
+ * Authentication Lost bit - write 1 to clear
+ * [6] AUTH_FAIL_MASK [R/W] Mask bit fo HDCP Authentication
+ * Lost interrupt set to 1 to enable interrupt
+ * [7] AUTH_FAIL_INFO_ACK [W] Acknowledge bit for HDCP
+ * Authentication Failure Info field - write 1 to clear */
+ if ((hdcp_int_val & (1 << 6)) && (hdcp_int_val & (1 << 4))) {
+ /* AUTH_FAIL_INT */
+ /* Clear and Disable */
+ uint32 link_status = HDMI_INP_ND(0x011C);
+ HDMI_OUTP(0x0118, (hdcp_int_val | (1 << 5))
+ & ~((1 << 6) | (1 << 4)));
+ DEV_INFO("HDCP: AUTH_FAIL_INT received, LINK0_STATUS=0x%08x\n",
+ link_status);
+ if (hdmi_msm_state->full_auth_done) {
+ switch_set_state(&external_common_state->sdev, 0);
+ DEV_INFO("Hdmi state switched to %d: %s\n",
+ external_common_state->sdev.state, __func__);
+
+ envp[0] = "HDCP_STATE=FAIL";
+ envp[1] = NULL;
+ DEV_INFO("HDMI HPD:QDSP OFF\n");
+ kobject_uevent_env(external_common_state->uevent_kobj,
+ KOBJ_CHANGE, envp);
+
+ mutex_lock(&hdcp_auth_state_mutex);
+ hdmi_msm_state->full_auth_done = FALSE;
+ mutex_unlock(&hdcp_auth_state_mutex);
+ /* Calling reauth only when authentication
+ * is sucessful or else we always go into
+ * the reauth loop. Also, No need to reauthenticate
+ * if authentication failed because of cable disconnect
+ */
+ if (((link_status & 0xF0) >> 4) != 0x7) {
+ DEV_DBG("Reauthenticate From %s HDCP FAIL INT ",
+ __func__);
+ queue_work(hdmi_work_queue,
+ &hdmi_msm_state->hdcp_reauth_work);
+ } else {
+ DEV_INFO("HDCP: HDMI cable disconnected\n");
+ }
+ }
+
+ /* Clear AUTH_FAIL_INFO as well */
+ HDMI_OUTP(0x0118, (hdcp_int_val | (1 << 7)));
+ return 0;
+ }
+
+ /* [8] DDC_XFER_REQ_INT [R] HDCP DDC Transfer Request
+ * interrupt status
+ * [9] DDC_XFER_REQ_ACK [W] Acknowledge bit for HDCP DDC
+ * Transfer Request bit - write 1 to clear
+ * [10] DDC_XFER_REQ_MASK [R/W] Mask bit for HDCP DDC Transfer
+ * Request interrupt - set to 1 to enable interrupt */
+ if ((hdcp_int_val & (1 << 10)) && (hdcp_int_val & (1 << 8))) {
+ /* DDC_XFER_REQ_INT */
+ HDMI_OUTP_ND(0x0118, (hdcp_int_val | (1 << 9)) & ~(1 << 8));
+ if (!(hdcp_int_val & (1 << 12)))
+ return 0;
+ }
+ /* [12] DDC_XFER_DONE_INT [R] HDCP DDC Transfer done interrupt
+ * status
+ * [13] DDC_XFER_DONE_ACK [W] Acknowledge bit for HDCP DDC
+ * Transfer done bit - write 1 to clear
+ * [14] DDC_XFER_DONE_MASK [R/W] Mask bit for HDCP DDC Transfer
+ * done interrupt - set to 1 to enable interrupt */
+ if ((hdcp_int_val & (1 << 14)) && (hdcp_int_val & (1 << 12))) {
+ /* DDC_XFER_DONE_INT */
+ HDMI_OUTP_ND(0x0118, (hdcp_int_val | (1 << 13)) & ~(1 << 12));
+ DEV_INFO("HDCP: DDC_XFER_DONE received\n");
+ return 0;
+ }
+
+ return rc;
+}
static irqreturn_t hdmi_msm_isr(int irq, void *dev_id)
{
@@ -933,10 +1035,6 @@
#endif
uint32 ddc_int_ctrl;
uint32 audio_int_val;
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
- uint32 hdcp_int_val;
- char *envp[2];
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
static uint32 fifo_urun_int_occurred;
static uint32 sample_drop_int_occurred;
const uint32 occurrence_limit = 5;
@@ -1054,96 +1152,8 @@
return IRQ_HANDLED;
}
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
- /* HDCP_INT_CTRL[0x0118]
- * [0] AUTH_SUCCESS_INT [R] HDCP Authentication Success
- * interrupt status
- * [1] AUTH_SUCCESS_ACK [W] Acknowledge bit for HDCP
- * Authentication Success bit - write 1 to clear
- * [2] AUTH_SUCCESS_MASK [R/W] Mask bit for HDCP Authentication
- * Success interrupt - set to 1 to enable interrupt */
- hdcp_int_val = HDMI_INP_ND(0x0118);
- if ((hdcp_int_val & (1 << 2)) && (hdcp_int_val & (1 << 0))) {
- /* AUTH_SUCCESS_INT */
- HDMI_OUTP(0x0118, (hdcp_int_val | (1 << 1)) & ~(1 << 0));
- DEV_INFO("HDCP: AUTH_SUCCESS_INT received\n");
- complete_all(&hdmi_msm_state->hdcp_success_done);
+ if (!hdmi_msm_process_hdcp_interrupts())
return IRQ_HANDLED;
- }
- /* [4] AUTH_FAIL_INT [R] HDCP Authentication Lost
- * interrupt Status
- * [5] AUTH_FAIL_ACK [W] Acknowledge bit for HDCP
- * Authentication Lost bit - write 1 to clear
- * [6] AUTH_FAIL_MASK [R/W] Mask bit fo HDCP Authentication
- * Lost interrupt set to 1 to enable interrupt
- * [7] AUTH_FAIL_INFO_ACK [W] Acknowledge bit for HDCP
- * Authentication Failure Info field - write 1 to clear */
- if ((hdcp_int_val & (1 << 6)) && (hdcp_int_val & (1 << 4))) {
- /* AUTH_FAIL_INT */
- /* Clear and Disable */
- uint32 link_status = HDMI_INP_ND(0x011C);
- HDMI_OUTP(0x0118, (hdcp_int_val | (1 << 5))
- & ~((1 << 6) | (1 << 4)));
- DEV_INFO("HDCP: AUTH_FAIL_INT received, LINK0_STATUS=0x%08x\n",
- link_status);
- if (hdmi_msm_state->full_auth_done) {
- switch_set_state(&external_common_state->sdev, 0);
- DEV_INFO("Hdmi state switched to %d: %s\n",
- external_common_state->sdev.state, __func__);
-
- envp[0] = "HDCP_STATE=FAIL";
- envp[1] = NULL;
- DEV_INFO("HDMI HPD:QDSP OFF\n");
- kobject_uevent_env(external_common_state->uevent_kobj,
- KOBJ_CHANGE, envp);
-
- mutex_lock(&hdcp_auth_state_mutex);
- hdmi_msm_state->full_auth_done = FALSE;
- mutex_unlock(&hdcp_auth_state_mutex);
- /* Calling reauth only when authentication
- * is sucessful or else we always go into
- * the reauth loop. Also, No need to reauthenticate
- * if authentication failed because of cable disconnect
- */
- if (((link_status & 0xF0) >> 4) != 0x7) {
- DEV_DBG("Reauthenticate From %s HDCP FAIL INT ",
- __func__);
- queue_work(hdmi_work_queue,
- &hdmi_msm_state->hdcp_reauth_work);
- } else {
- DEV_INFO("HDCP: HDMI cable disconnected\n");
- }
- }
-
- /* Clear AUTH_FAIL_INFO as well */
- HDMI_OUTP(0x0118, (hdcp_int_val | (1 << 7)));
- return IRQ_HANDLED;
- }
- /* [8] DDC_XFER_REQ_INT [R] HDCP DDC Transfer Request
- * interrupt status
- * [9] DDC_XFER_REQ_ACK [W] Acknowledge bit for HDCP DDC
- * Transfer Request bit - write 1 to clear
- * [10] DDC_XFER_REQ_MASK [R/W] Mask bit for HDCP DDC Transfer
- * Request interrupt - set to 1 to enable interrupt */
- if ((hdcp_int_val & (1 << 10)) && (hdcp_int_val & (1 << 8))) {
- /* DDC_XFER_REQ_INT */
- HDMI_OUTP_ND(0x0118, (hdcp_int_val | (1 << 9)) & ~(1 << 8));
- if (!(hdcp_int_val & (1 << 12)))
- return IRQ_HANDLED;
- }
- /* [12] DDC_XFER_DONE_INT [R] HDCP DDC Transfer done interrupt
- * status
- * [13] DDC_XFER_DONE_ACK [W] Acknowledge bit for HDCP DDC
- * Transfer done bit - write 1 to clear
- * [14] DDC_XFER_DONE_MASK [R/W] Mask bit for HDCP DDC Transfer
- * done interrupt - set to 1 to enable interrupt */
- if ((hdcp_int_val & (1 << 14)) && (hdcp_int_val & (1 << 12))) {
- /* DDC_XFER_DONE_INT */
- HDMI_OUTP_ND(0x0118, (hdcp_int_val | (1 << 13)) & ~(1 << 12));
- DEV_INFO("HDCP: DDC_XFER_DONE received\n");
- return IRQ_HANDLED;
- }
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT
/* Process CEC Interrupt */
@@ -1302,7 +1312,7 @@
if (external_common_state->hdmi_sink == 0) {
/* HDMI_DVI_SEL */
reg_val |= 0x00000002;
- if (external_common_state->present_hdcp)
+ if (hdmi_msm_state->hdcp_enable)
/* HDMI Encryption */
reg_val |= 0x00000004;
/* HDMI_CTRL */
@@ -1310,7 +1320,7 @@
/* HDMI_DVI_SEL */
reg_val &= ~0x00000002;
} else {
- if (external_common_state->present_hdcp)
+ if (hdmi_msm_state->hdcp_enable)
/* HDMI_Encryption_ON */
reg_val |= 0x00000006;
else
@@ -1390,7 +1400,6 @@
return 0;
}
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
static int hdmi_msm_ddc_write(uint32 dev_addr, uint32 offset,
const uint8 *data_buf, uint32 data_len, const char *what)
{
@@ -1586,7 +1595,6 @@
error:
return status;
}
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
static int hdmi_msm_ddc_read_retry(uint32 dev_addr, uint32 offset,
uint8 *data_buf, uint32 data_len, uint32 request_len, int retry,
@@ -2147,9 +2155,13 @@
return status;
}
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
static void hdcp_auth_info(uint32 auth_info)
{
+ if (!hdmi_msm_state->hdcp_enable) {
+ DEV_DBG("%s: HDCP not enabled\n", __func__);
+ return;
+ }
+
switch (auth_info) {
case 0:
DEV_INFO("%s: None", __func__);
@@ -2184,6 +2196,11 @@
static void hdcp_key_state(uint32 key_state)
{
+ if (!hdmi_msm_state->hdcp_enable) {
+ DEV_DBG("%s: HDCP not enabled\n", __func__);
+ return;
+ }
+
switch (key_state) {
case 0:
DEV_WARN("%s: No HDCP Keys", __func__);
@@ -2227,6 +2244,11 @@
{
int hdcp_link_status = HDMI_INP(0x011C);
+ if (!hdmi_msm_state->hdcp_enable) {
+ DEV_DBG("%s: HDCP not enabled\n", __func__);
+ return;
+ }
+
/* Disable HDCP interrupts */
HDMI_OUTP(0x0118, 0x0);
@@ -2254,6 +2276,11 @@
int failure;
int nack0;
+ if (!hdmi_msm_state->hdcp_enable) {
+ DEV_DBG("%s: HDCP not enabled\n", __func__);
+ return;
+ }
+
/*
* Check for any DDC transfer failures
* 0x0128 HDCP_DDC_STATUS
@@ -2364,6 +2391,11 @@
static uint8 buf[0xFF];
memset(buf, 0, sizeof(buf));
+ if (!hdmi_msm_state->hdcp_enable) {
+ DEV_DBG("%s: HDCP not enabled\n", __func__);
+ return 0;
+ }
+
if (!is_part1_done) {
is_part1_done = TRUE;
@@ -2651,6 +2683,11 @@
int ret;
uint8 buf[4];
+ if (!hdmi_msm_state->hdcp_enable) {
+ DEV_DBG("%s: HDCP not enabled\n", __func__);
+ return 0;
+ }
+
snprintf(what, sizeof(what), "V' H0");
ret = hdmi_msm_ddc_read(0x74, 0x20, buf, 4, 5, what, TRUE);
if (ret) {
@@ -2743,6 +2780,11 @@
boolean ksv_done = FALSE;
+ if (!hdmi_msm_state->hdcp_enable) {
+ DEV_DBG("%s: HDCP not enabled\n", __func__);
+ return 0;
+ }
+
memset(buf, 0, sizeof(buf));
memset(kvs_fifo, 0, sizeof(kvs_fifo));
@@ -2935,6 +2977,12 @@
{
int ret = 0;
int poll = 3000;
+
+ if (!hdmi_msm_state->hdcp_enable) {
+ DEV_DBG("%s: HDCP not enabled\n", __func__);
+ return 0;
+ }
+
while (poll) {
/* 0x011C HDCP_LINK0_STATUS
[30:28] KEYS_STATE = 3 = "Valid"
@@ -2965,7 +3013,7 @@
uint32 found_repeater = 0x0;
char *envp[2];
- if (!hdmi_msm_has_hdcp()) {
+ if (!hdmi_msm_state->hdcp_enable) {
DEV_INFO("%s: HDCP NOT ENABLED\n", __func__);
return;
}
@@ -3066,7 +3114,6 @@
DEV_INFO("Hdmi state switched to %d: %s\n",
external_common_state->sdev.state, __func__);
}
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
static void hdmi_msm_video_setup(int video_format)
{
@@ -3584,11 +3631,9 @@
{
msm_hdmi_sample_rate = rate;
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
- if (hdmi_msm_has_hdcp())
+ if (hdmi_msm_state->hdcp_enable)
hdcp_deauthenticate();
else
-#endif
hdmi_msm_turn_on();
}
EXPORT_SYMBOL(hdmi_msm_audio_sample_rate_reset);
@@ -4158,12 +4203,10 @@
#endif
hdmi_msm_spd_infoframe_packetsetup();
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
- if (hdmi_msm_state->reauth) {
+ if (hdmi_msm_state->hdcp_enable && hdmi_msm_state->reauth) {
hdmi_msm_hdcp_enable();
hdmi_msm_state->reauth = FALSE ;
}
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT
/* re-initialize CEC if enabled */
@@ -4208,12 +4251,15 @@
}
}
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
static void hdmi_msm_hdcp_timer(unsigned long data)
{
+ if (!hdmi_msm_state->hdcp_enable) {
+ DEV_DBG("%s: HDCP not enabled\n", __func__);
+ return;
+ }
+
queue_work(hdmi_work_queue, &hdmi_msm_state->hdcp_work);
}
-#endif
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT
static void hdmi_msm_cec_read_timer_func(unsigned long data)
@@ -4378,12 +4424,14 @@
mutex_unlock(&external_common_state_hpd_mutex);
hdmi_msm_turn_on();
- /* Kick off HDCP Authentication */
- mutex_lock(&hdcp_auth_state_mutex);
- hdmi_msm_state->reauth = FALSE;
- hdmi_msm_state->full_auth_done = FALSE;
- mutex_unlock(&hdcp_auth_state_mutex);
- mod_timer(&hdmi_msm_state->hdcp_timer, jiffies + HZ/2);
+ if (hdmi_msm_state->hdcp_enable) {
+ /* Kick off HDCP Authentication */
+ mutex_lock(&hdcp_auth_state_mutex);
+ hdmi_msm_state->reauth = FALSE;
+ hdmi_msm_state->full_auth_done = FALSE;
+ mutex_unlock(&hdcp_auth_state_mutex);
+ mod_timer(&hdmi_msm_state->hdcp_timer, jiffies + HZ/2);
+ }
} else
mutex_unlock(&external_common_state_hpd_mutex);
@@ -4407,16 +4455,14 @@
external_common_state->sdev.state, __func__);
if (on) {
hdmi_msm_read_edid();
- if (hdmi_msm_has_hdcp())
- hdmi_msm_state->reauth = FALSE ;
+ hdmi_msm_state->reauth = FALSE ;
/* Build EDID table */
hdmi_msm_turn_on();
DEV_INFO("HDMI HPD: CONNECTED: send ONLINE\n");
kobject_uevent(external_common_state->uevent_kobj,
KOBJ_ONLINE);
- hdmi_msm_hdcp_enable();
envp[0] = 0;
- if (!hdmi_msm_has_hdcp()) {
+ if (!hdmi_msm_state->hdcp_enable) {
/* Send Audio for HDMI Compliance Cases*/
envp[0] = "HDCP_STATE=PASS";
envp[1] = NULL;
@@ -4426,6 +4472,8 @@
switch_set_state(&external_common_state->sdev, 1);
DEV_INFO("Hdmi state switched to %d: %s\n",
external_common_state->sdev.state, __func__);
+ } else {
+ hdmi_msm_hdcp_enable();
}
} else {
DEV_INFO("HDMI HPD: DISCONNECTED: send OFFLINE\n");
@@ -4449,7 +4497,6 @@
if (!hdmi_msm_state->hdmi_app_clk)
return -ENODEV;
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
mutex_lock(&hdmi_msm_state_mutex);
if (hdmi_msm_state->hdcp_activating) {
hdmi_msm_state->panel_power_on = FALSE;
@@ -4458,13 +4505,10 @@
return 0;
}
mutex_unlock(&hdmi_msm_state_mutex);
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
DEV_INFO("power: OFF (audio off, Reset Core)\n");
hdmi_msm_audio_off();
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
hdcp_deauthenticate();
-#endif
hdmi_msm_powerdown_phy();
hdmi_msm_state->panel_power_on = FALSE;
@@ -4476,6 +4520,28 @@
return hdmi_msm_state->is_mhl_enabled;
}
+void hdmi_msm_config_hdcp_feature(void)
+{
+ if (hdcp_feature_on && hdmi_msm_has_hdcp()) {
+ init_timer(&hdmi_msm_state->hdcp_timer);
+ hdmi_msm_state->hdcp_timer.function = hdmi_msm_hdcp_timer;
+ hdmi_msm_state->hdcp_timer.data = (uint32)NULL;
+ hdmi_msm_state->hdcp_timer.expires = 0xffffffffL;
+
+ init_completion(&hdmi_msm_state->hdcp_success_done);
+ INIT_WORK(&hdmi_msm_state->hdcp_reauth_work,
+ hdmi_msm_hdcp_reauth_work);
+ INIT_WORK(&hdmi_msm_state->hdcp_work, hdmi_msm_hdcp_work);
+ hdmi_msm_state->hdcp_enable = TRUE;
+ } else {
+ del_timer(&hdmi_msm_state->hdcp_timer);
+ hdmi_msm_state->hdcp_enable = FALSE;
+ }
+ external_common_state->present_hdcp = hdmi_msm_state->hdcp_enable;
+ DEV_INFO("%s: HDCP Feature: %s\n", __func__,
+ hdmi_msm_state->hdcp_enable ? "Enabled" : "Disabled");
+}
+
static int __devinit hdmi_msm_probe(struct platform_device *pdev)
{
int rc;
@@ -4588,15 +4654,6 @@
hdmi_msm_state->hpd_state_timer.expires = 0xffffffffL;
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
- init_timer(&hdmi_msm_state->hdcp_timer);
- hdmi_msm_state->hdcp_timer.function =
- hdmi_msm_hdcp_timer;
- hdmi_msm_state->hdcp_timer.data = (uint32)NULL;
-
- hdmi_msm_state->hdcp_timer.expires = 0xffffffffL;
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
-
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT
init_timer(&hdmi_msm_state->cec_read_timer);
hdmi_msm_state->cec_read_timer.function =
@@ -4623,22 +4680,7 @@
goto error;
}
- if (hdmi_msm_has_hdcp()) {
- /* Don't Set Encryption in case of non HDCP builds */
- external_common_state->present_hdcp = FALSE;
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
- external_common_state->present_hdcp = TRUE;
-#endif
- } else {
- external_common_state->present_hdcp = FALSE;
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
- /*
- * If the device is not hdcp capable do
- * not start hdcp timer.
- */
- del_timer(&hdmi_msm_state->hdcp_timer);
-#endif
- }
+ hdmi_msm_config_hdcp_feature();
/* Initialize hdmi node and register with switch driver */
if (hdmi_prim_display)
@@ -4822,11 +4864,6 @@
hdmi_common_init_panel_info(&hdmi_msm_panel_data.panel_info);
init_completion(&hdmi_msm_state->ddc_sw_done);
INIT_WORK(&hdmi_msm_state->hpd_state_work, hdmi_msm_hpd_state_work);
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
- init_completion(&hdmi_msm_state->hdcp_success_done);
- INIT_WORK(&hdmi_msm_state->hdcp_reauth_work, hdmi_msm_hdcp_reauth_work);
- INIT_WORK(&hdmi_msm_state->hdcp_work, hdmi_msm_hdcp_work);
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT
INIT_WORK(&hdmi_msm_state->cec_latch_detect_work,
@@ -4850,9 +4887,6 @@
" RELEASE"
#endif
" AUDIO EDID HPD HDCP"
-#ifndef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
- ":0"
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
" DVI"
#ifndef CONFIG_FB_MSM_HDMI_MSM_PANEL_DVI_SUPPORT
":0"
@@ -4874,6 +4908,36 @@
platform_driver_unregister(&this_driver);
}
+static int set_hdcp_feature_on(const char *val, const struct kernel_param *kp)
+{
+ int rv = param_set_bool(val, kp);
+
+ if (rv)
+ return rv;
+
+ pr_debug("%s: HDCP feature = %d\n", __func__, hdcp_feature_on);
+ if (hdmi_msm_state) {
+ if ((HDMI_INP(0x0250) & 0x2)) {
+ pr_err("%s: Unable to set HDCP feature", __func__);
+ pr_err("%s: HDMI panel is currently turned on",
+ __func__);
+ } else if (hdcp_feature_on != hdmi_msm_state->hdcp_enable) {
+ hdmi_msm_config_hdcp_feature();
+ }
+ }
+
+ return 0;
+}
+
+static struct kernel_param_ops hdcp_feature_on_param_ops = {
+ .set = set_hdcp_feature_on,
+ .get = param_get_bool,
+};
+
+module_param_cb(hdcp, &hdcp_feature_on_param_ops, &hdcp_feature_on,
+ S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(hdcp, "Enable or Disable HDCP");
+
module_init(hdmi_msm_init);
module_exit(hdmi_msm_exit);
diff --git a/drivers/video/msm/hdmi_msm.h b/drivers/video/msm/hdmi_msm.h
index 5d27412..20bd492 100644
--- a/drivers/video/msm/hdmi_msm.h
+++ b/drivers/video/msm/hdmi_msm.h
@@ -64,13 +64,12 @@
struct timer_list hpd_state_timer;
struct completion ddc_sw_done;
-#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT
+ bool hdcp_enable;
boolean hdcp_activating;
boolean reauth ;
struct work_struct hdcp_reauth_work, hdcp_work;
struct completion hdcp_success_done;
struct timer_list hdcp_timer;
-#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL_HDCP_SUPPORT */
#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL_CEC_SUPPORT
boolean cec_enabled;
diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c
index 6e3567f..6c0d08d 100644
--- a/drivers/video/msm/mdp.c
+++ b/drivers/video/msm/mdp.c
@@ -35,6 +35,7 @@
#include <asm/mach-types.h>
#include <linux/semaphore.h>
#include <linux/uaccess.h>
+#include <mach/event_timer.h>
#include <mach/clk.h>
#include "mdp.h"
#include "msm_fb.h"
@@ -183,7 +184,7 @@
base = 0x18000;
break;
case MDP_BLOCK_OVERLAY_2:
- base = (mdp_rev >= MDP_REV_44) ? 0x88000 : 0;
+ base = (mdp_rev >= MDP_REV_43) ? 0x88000 : 0;
break;
default:
break;
@@ -518,7 +519,9 @@
int ret;
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ mdp_clk_ctrl(1);
ret = mdp_lut_hw_update(cmap);
+ mdp_clk_ctrl(0);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
if (ret)
@@ -540,9 +543,11 @@
uint32_t out;
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ mdp_clk_ctrl(1);
ret = mdp_lut_hw_update(cmap);
if (ret) {
+ mdp_clk_ctrl(0);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
return ret;
}
@@ -550,6 +555,7 @@
/*mask off non LUT select bits*/
out = inpdw(MDP_BASE + 0x90070);
MDP_OUTP(MDP_BASE + 0x90070, (mdp_lut_i << 10) | 0x7 | out);
+ mdp_clk_ctrl(0);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
mdp_lut_i = (mdp_lut_i + 1)%2;
@@ -606,7 +612,7 @@
static int mdp_hist_init_mgmt(struct mdp_hist_mgmt *mgmt, uint32_t block)
{
- uint32_t bins, extra, index, term = 0;
+ uint32_t bins, extra, index, intr = 0, term = 0;
init_completion(&mgmt->mdp_hist_comp);
mutex_init(&mgmt->mdp_hist_mutex);
mutex_init(&mgmt->mdp_do_hist_mutex);
@@ -622,6 +628,8 @@
switch (block) {
case MDP_BLOCK_DMA_P:
term = MDP_HISTOGRAM_TERM_DMA_P;
+ intr = (mdp_rev >= MDP_REV_40) ? INTR_DMA_P_HISTOGRAM :
+ MDP_HIST_DONE;
bins = (mdp_rev >= MDP_REV_42) ? MDP_REV42_HIST_MAX_BIN :
MDP_REV41_HIST_MAX_BIN;
extra = 2;
@@ -630,6 +638,7 @@
break;
case MDP_BLOCK_DMA_S:
term = MDP_HISTOGRAM_TERM_DMA_S;
+ intr = INTR_DMA_S_HISTOGRAM;
bins = MDP_REV42_HIST_MAX_BIN;
extra = 2;
mgmt->base += 0x5000;
@@ -637,6 +646,7 @@
break;
case MDP_BLOCK_VG_1:
term = MDP_HISTOGRAM_TERM_VG_1;
+ intr = INTR_VG1_HISTOGRAM;
bins = MDP_REV42_HIST_MAX_BIN;
extra = 1;
mgmt->base += 0x6000;
@@ -644,6 +654,7 @@
break;
case MDP_BLOCK_VG_2:
term = MDP_HISTOGRAM_TERM_VG_2;
+ intr = INTR_VG2_HISTOGRAM;
bins = MDP_REV42_HIST_MAX_BIN;
extra = 1;
mgmt->base += 0x6000;
@@ -651,6 +662,8 @@
break;
default:
term = MDP_HISTOGRAM_TERM_DMA_P;
+ intr = (mdp_rev >= MDP_REV_40) ? INTR_DMA_P_HISTOGRAM :
+ MDP_HIST_DONE;
bins = (mdp_rev >= MDP_REV_42) ? MDP_REV42_HIST_MAX_BIN :
MDP_REV41_HIST_MAX_BIN;
extra = 2;
@@ -658,6 +671,7 @@
index = MDP_HIST_MGMT_DMA_P;
}
mgmt->irq_term = term;
+ mgmt->intr = intr;
mgmt->c0 = kmalloc(bins * sizeof(uint32_t), GFP_KERNEL);
if (mgmt->c0 == NULL)
@@ -802,20 +816,45 @@
static int mdp_histogram_enable(struct mdp_hist_mgmt *mgmt)
{
uint32_t base;
+ unsigned long flag;
if (mgmt->mdp_is_hist_data == TRUE) {
pr_err("%s histogram already started\n", __func__);
return -EINVAL;
}
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
- mdp_enable_irq(mgmt->irq_term);
+ base = (uint32_t) (MDP_BASE + mgmt->base);
+ /*First make sure that device is not collecting histogram*/
+ mgmt->mdp_is_hist_data = FALSE;
+ mgmt->mdp_is_hist_valid = FALSE;
+ mgmt->mdp_is_hist_init = FALSE;
+ spin_lock_irqsave(&mdp_spin_lock, flag);
+ outp32(MDP_INTR_CLEAR, mgmt->intr);
+ mdp_intr_mask &= ~mgmt->intr;
+ outp32(MDP_INTR_ENABLE, mdp_intr_mask);
+ MDP_OUTP(base + 0x001C, 0);
+ MDP_OUTP(base + 0x0018, INTR_HIST_DONE | INTR_HIST_RESET_SEQ_DONE);
+ MDP_OUTP(base + 0x0024, 0);
+ spin_unlock_irqrestore(&mdp_spin_lock, flag);
+
+ mutex_unlock(&mgmt->mdp_hist_mutex);
+ cancel_work_sync(&mgmt->mdp_histogram_worker);
+ mutex_lock(&mgmt->mdp_hist_mutex);
+
+ /*Then initialize histogram*/
INIT_COMPLETION(mgmt->mdp_hist_comp);
- base = (uint32_t) (MDP_BASE + mgmt->base);
+ spin_lock_irqsave(&mdp_spin_lock, flag);
MDP_OUTP(base + 0x0018, INTR_HIST_DONE | INTR_HIST_RESET_SEQ_DONE);
MDP_OUTP(base + 0x0010, 1);
MDP_OUTP(base + 0x001C, INTR_HIST_DONE | INTR_HIST_RESET_SEQ_DONE);
+ outp32(MDP_INTR_CLEAR, mgmt->intr);
+ mdp_intr_mask |= mgmt->intr;
+ outp32(MDP_INTR_ENABLE, mdp_intr_mask);
+ mdp_enable_irq(mgmt->irq_term);
+ spin_unlock_irqrestore(&mdp_spin_lock, flag);
+
MDP_OUTP(base + 0x0004, mgmt->frame_cnt);
if (mgmt->block != MDP_BLOCK_VG_1 && mgmt->block != MDP_BLOCK_VG_2)
MDP_OUTP(base + 0x0008, mgmt->bit_mask);
@@ -830,6 +869,7 @@
static int mdp_histogram_disable(struct mdp_hist_mgmt *mgmt)
{
uint32_t base, status;
+ unsigned long flag;
if (mgmt->mdp_is_hist_data == FALSE) {
pr_err("%s histogram already stopped\n", __func__);
return -EINVAL;
@@ -842,6 +882,13 @@
base = (uint32_t) (MDP_BASE + mgmt->base);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ spin_lock_irqsave(&mdp_spin_lock, flag);
+ outp32(MDP_INTR_CLEAR, mgmt->intr);
+ mdp_intr_mask &= ~mgmt->intr;
+ outp32(MDP_INTR_ENABLE, mdp_intr_mask);
+ mdp_disable_irq(mgmt->irq_term);
+ spin_unlock_irqrestore(&mdp_spin_lock, flag);
+
if (mdp_rev >= MDP_REV_42)
MDP_OUTP(base + 0x0020, 1);
status = inpdw(base + 0x001C);
@@ -856,7 +903,6 @@
complete(&mgmt->mdp_hist_comp);
}
- mdp_disable_irq(mgmt->irq_term);
return 0;
}
@@ -1026,6 +1072,7 @@
}
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ mdp_clk_ctrl(1);
for (i = 0; i < mgmt->num_bins; i++) {
mgmt->c0[i] = inpdw(mdp_hist_base + r_data_offset + (4*i));
mgmt->c1[i] = inpdw(mdp_hist_base + g_data_offset + (4*i));
@@ -1041,6 +1088,7 @@
} else
ret = -ENOMEM;
}
+ mdp_clk_ctrl(0);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
if (!ret)
@@ -1076,6 +1124,7 @@
}
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ mdp_clk_ctrl(1);
for (i = 0; i < mgmt->num_bins; i++)
mgmt->c0[i] = inpdw(mdp_hist_base + MDP_HIST_DATA_LUMA_OFF +
(4*i));
@@ -1087,6 +1136,7 @@
} else
ret = -ENOMEM;
}
+ mdp_clk_ctrl(0);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
if (!ret)
@@ -1102,6 +1152,7 @@
struct mdp_hist_mgmt *mgmt = container_of(data, struct mdp_hist_mgmt,
mdp_histogram_worker);
int ret = 0;
+ bool hist_ready;
mutex_lock(&mgmt->mdp_hist_mutex);
if (mgmt->mdp_is_hist_data == FALSE) {
pr_debug("%s, Histogram disabled before read.\n", __func__);
@@ -1116,8 +1167,9 @@
pr_err("mgmt->hist invalid NULL\n");
ret = -EINVAL;
}
+ hist_ready = (mgmt->mdp_is_hist_init && mgmt->mdp_is_hist_valid);
- if (!ret) {
+ if (!ret && hist_ready) {
switch (mgmt->block) {
case MDP_BLOCK_DMA_P:
case MDP_BLOCK_DMA_S:
@@ -1138,7 +1190,7 @@
* if read was triggered by an underrun or failed copying,
* don't wake up readers
*/
- if (!ret && mgmt->mdp_is_hist_valid && mgmt->mdp_is_hist_init) {
+ if (!ret && hist_ready) {
mgmt->hist = NULL;
if (waitqueue_active(&mgmt->mdp_hist_comp.wait))
complete(&mgmt->mdp_hist_comp);
@@ -1150,7 +1202,7 @@
mgmt->mdp_is_hist_init = TRUE;
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
- if (!ret)
+ if (!ret && hist_ready)
__mdp_histogram_kickoff(mgmt);
else
__mdp_histogram_reset(mgmt);
@@ -1273,27 +1325,32 @@
}
#endif
-static void send_vsync_work(struct work_struct *work)
-{
- char buf[64];
- char *envp[2];
-
- snprintf(buf, sizeof(buf), "VSYNC=%llu",
- ktime_to_ns(vsync_cntrl.vsync_time));
- envp[0] = buf;
- envp[1] = NULL;
- kobject_uevent_env(&(vsync_cntrl.dev->kobj), KOBJ_CHANGE, envp);
-}
-
#ifdef CONFIG_FB_MSM_MDP303
/* vsync_isr_handler: Called from isr context*/
static void vsync_isr_handler(void)
{
vsync_cntrl.vsync_time = ktime_get();
- schedule_work(&(vsync_cntrl.vsync_work));
}
#endif
+static ssize_t vsync_show_event(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ ssize_t ret = 0;
+
+ if (atomic_read(&vsync_cntrl.suspend) > 0 ||
+ atomic_read(&vsync_cntrl.vsync_resume) == 0)
+ return 0;
+
+ INIT_COMPLETION(vsync_cntrl.vsync_wait);
+
+ wait_for_completion(&vsync_cntrl.vsync_wait);
+ ret = snprintf(buf, PAGE_SIZE, "VSYNC=%llu",
+ ktime_to_ns(vsync_cntrl.vsync_time));
+ buf[strlen(buf) + 1] = '\0';
+ return ret;
+}
+
/* Returns < 0 on error, 0 on timeout, or > 0 on successful wait */
int mdp_ppp_pipe_wait(void)
{
@@ -1310,15 +1367,95 @@
if (wait == TRUE) {
ret = wait_for_completion_interruptible_timeout(&mdp_ppp_comp,
5 * HZ);
-
if (!ret)
printk(KERN_ERR "%s: Timed out waiting for the MDP.\n",
- __func__);
+ __func__);
}
return ret;
}
+#define MAX_VSYNC_GAP 4
+#define DEFAULT_FRAME_RATE 60
+
+static u32 mdp_get_panel_framerate(struct msm_fb_data_type *mfd)
+{
+ u32 frame_rate = 0, total_pixel;
+ struct msm_panel_info *panel_info = &mfd->panel_info;
+ if (mfd->dest == DISPLAY_LCD) {
+ if (panel_info->type == MDDI_PANEL && panel_info->mddi.is_type1)
+ frame_rate = panel_info->lcd.refx100 / (100 * 2);
+ else
+ frame_rate = panel_info->lcd.refx100 / 100;
+ } else {
+ if (panel_info->type == MIPI_VIDEO_PANEL) {
+ frame_rate = panel_info->mipi.frame_rate;
+ } else {
+ total_pixel = (panel_info->lcdc.h_back_porch +
+ panel_info->lcdc.h_front_porch +
+ panel_info->lcdc.h_pulse_width +
+ panel_info->xres) *
+ (panel_info->lcdc.v_back_porch +
+ panel_info->lcdc.v_front_porch +
+ panel_info->lcdc.v_pulse_width +
+ panel_info->yres);
+ if (total_pixel)
+ frame_rate = panel_info->clk_rate /
+ total_pixel;
+ }
+ }
+ if (frame_rate == 0)
+ frame_rate = DEFAULT_FRAME_RATE;
+ return frame_rate;
+}
+
+static int mdp_diff_to_next_vsync(ktime_t cur_time,
+ ktime_t last_vsync, u32 vsync_period)
+{
+ int diff_from_last, diff_to_next;
+ /*
+ * Get interval beween last vsync and current time
+ * Current time = CPU programming MDP for next Vsync
+ */
+ diff_from_last =
+ (ktime_to_us(ktime_sub(cur_time, last_vsync)));
+ diff_from_last /= USEC_PER_MSEC;
+ /*
+ * If the last Vsync occurred too long ago, skip programming
+ * the timer
+ */
+ if (diff_from_last < (vsync_period * MAX_VSYNC_GAP)) {
+ if (diff_from_last > vsync_period)
+ diff_to_next =
+ (diff_from_last - vsync_period) % vsync_period;
+ else
+ diff_to_next = vsync_period - diff_from_last;
+ } else {
+ /* mark it out of range */
+ diff_to_next = vsync_period + 1;
+ }
+ return diff_to_next;
+}
+
+void mdp_update_pm(struct msm_fb_data_type *mfd, ktime_t pre_vsync)
+{
+ u32 vsync_period;
+ int diff_to_next;
+ ktime_t cur_time, wakeup_time;
+
+ if (!mfd->cpu_pm_hdl)
+ return;
+ vsync_period = mfd->panel_info.frame_interval;
+ cur_time = ktime_get();
+ diff_to_next = mdp_diff_to_next_vsync(cur_time,
+ pre_vsync,
+ vsync_period);
+ if (diff_to_next > vsync_period)
+ return;
+ wakeup_time = ktime_add_ns(cur_time, diff_to_next * NSEC_PER_MSEC);
+ activate_event_timer(mfd->cpu_pm_hdl, wakeup_time);
+}
+
static DEFINE_SPINLOCK(mdp_lock);
static int mdp_irq_mask;
static int mdp_irq_enabled;
@@ -1728,10 +1865,8 @@
isr &= mask;
if (isr & INTR_HIST_RESET_SEQ_DONE)
__mdp_histogram_kickoff(mgmt);
-
- if (isr & INTR_HIST_DONE) {
+ else if (isr & INTR_HIST_DONE)
queue_work(mdp_hist_wq, &mgmt->mdp_histogram_worker);
- }
}
#ifndef CONFIG_FB_MSM_MDP40
@@ -1741,9 +1876,8 @@
struct mdp_dma_data *dma;
unsigned long flag;
struct mdp_hist_mgmt *mgmt = NULL;
- char *base_addr;
int i, ret;
- int vsync_isr;
+ int vsync_isr, disabled_clocks;
/* Ensure all the register write are complete */
mb();
@@ -1766,19 +1900,25 @@
if (mdp_interrupt & MDP_PRIM_RDPTR) {
spin_lock_irqsave(&mdp_spin_lock, flag);
vsync_isr = vsync_cntrl.vsync_irq_enabled;
- if (!vsync_isr) {
+ disabled_clocks = vsync_cntrl.disabled_clocks;
+ if ((!vsync_isr && !vsync_cntrl.disabled_clocks)
+ || (!vsync_isr && vsync_cntrl.vsync_dma_enabled)) {
mdp_intr_mask &= ~MDP_PRIM_RDPTR;
outp32(MDP_INTR_ENABLE, mdp_intr_mask);
+ mdp_disable_irq_nosync(MDP_VSYNC_TERM);
+ vsync_cntrl.disabled_clocks = 1;
+ } else if (vsync_isr) {
+ vsync_isr_handler();
}
+ vsync_cntrl.vsync_dma_enabled = 0;
spin_unlock_irqrestore(&mdp_spin_lock, flag);
- if (vsync_isr) {
- vsync_isr_handler();
- } else {
+ complete(&vsync_cntrl.vsync_comp);
+ if (!vsync_isr && !disabled_clocks)
mdp_pipe_ctrl(MDP_CMD_BLOCK,
MDP_BLOCK_POWER_OFF, TRUE);
- complete(&vsync_cntrl.vsync_wait);
- }
+
+ complete_all(&vsync_cntrl.vsync_wait);
}
/* DMA3 TV-Out Start */
@@ -1813,13 +1953,7 @@
mgmt = mdp_hist_mgmt_array[i];
if (!mgmt)
continue;
-
- base_addr = MDP_BASE + mgmt->base;
- outpdw(base_addr + 0x010, 1);
- outpdw(base_addr + 0x01C, INTR_HIST_DONE |
- INTR_HIST_RESET_SEQ_DONE);
mgmt->mdp_is_hist_valid = FALSE;
- __mdp_histogram_reset(mgmt);
}
}
@@ -1837,16 +1971,18 @@
if (!vsync_isr) {
mdp_intr_mask &= ~LCDC_FRAME_START;
outp32(MDP_INTR_ENABLE, mdp_intr_mask);
+ mdp_disable_irq_nosync(MDP_VSYNC_TERM);
+ vsync_cntrl.disabled_clocks = 1;
+ } else {
+ vsync_isr_handler();
}
spin_unlock_irqrestore(&mdp_spin_lock, flag);
- if (vsync_isr) {
- vsync_isr_handler();
- } else {
+ if (!vsync_isr)
mdp_pipe_ctrl(MDP_CMD_BLOCK,
MDP_BLOCK_POWER_OFF, TRUE);
- complete(&vsync_cntrl.vsync_wait);
- }
+
+ complete_all(&vsync_cntrl.vsync_wait);
}
/* DMA2 LCD-Out Complete */
@@ -1894,6 +2030,7 @@
spin_unlock_irqrestore(&mdp_spin_lock, flag);
mdp_pipe_ctrl(MDP_DMA2_BLOCK, MDP_BLOCK_POWER_OFF,
TRUE);
+ mdp_disable_irq_nosync(MDP_DMA2_TERM);
complete(&dma->comp);
}
#endif
@@ -1945,6 +2082,7 @@
dma2_data.dmap_busy = FALSE;
dma2_data.waiting = FALSE;
init_completion(&dma2_data.comp);
+ init_completion(&vsync_cntrl.vsync_comp);
init_completion(&dma2_data.dmap_comp);
sema_init(&dma2_data.mutex, 1);
mutex_init(&dma2_data.ov_mutex);
@@ -1976,8 +2114,9 @@
for (i = 0; i < MDP_MAX_BLOCK; i++) {
atomic_set(&mdp_block_power_cnt[i], 0);
}
- INIT_WORK(&(vsync_cntrl.vsync_work), send_vsync_work);
+ vsync_cntrl.disabled_clocks = 1;
init_completion(&vsync_cntrl.vsync_wait);
+ atomic_set(&vsync_cntrl.vsync_resume, 1);
#ifdef MSM_FB_ENABLE_DBGFS
{
struct dentry *root;
@@ -2063,7 +2202,9 @@
pr_debug("%s:+\n", __func__);
mdp_histogram_ctrl_all(FALSE);
-
+ atomic_set(&vsync_cntrl.suspend, 1);
+ atomic_set(&vsync_cntrl.vsync_resume, 0);
+ complete_all(&vsync_cntrl.vsync_wait);
mdp_clk_ctrl(1);
if (mfd->panel.type == MIPI_CMD_PANEL)
mdp4_dsi_cmd_off(pdev);
@@ -2094,7 +2235,16 @@
{
/* empty */
}
+
#endif
+static DEVICE_ATTR(vsync_event, S_IRUGO, vsync_show_event, NULL);
+static struct attribute *vsync_fs_attrs[] = {
+ &dev_attr_vsync_event.attr,
+ NULL,
+};
+static struct attribute_group vsync_fs_attr_group = {
+ .attrs = vsync_fs_attrs,
+};
static int mdp_on(struct platform_device *pdev)
{
@@ -2124,10 +2274,26 @@
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
}
- if ((mdp_rev == MDP_REV_303) &&
- (mfd->panel.type == MIPI_CMD_PANEL))
+ if (mdp_rev == MDP_REV_303 && mfd->panel.type == MIPI_CMD_PANEL) {
+
vsync_cntrl.dev = mfd->fbi->dev;
+ if (!vsync_cntrl.sysfs_created) {
+ ret = sysfs_create_group(&vsync_cntrl.dev->kobj,
+ &vsync_fs_attr_group);
+ if (ret) {
+ pr_err("%s: sysfs creation failed, ret=%d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ kobject_uevent(&vsync_cntrl.dev->kobj, KOBJ_ADD);
+ pr_debug("%s: kobject_uevent(KOBJ_ADD)\n", __func__);
+ vsync_cntrl.sysfs_created = 1;
+ }
+ atomic_set(&vsync_cntrl.suspend, 0);
+ }
+
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
ret = panel_next_on(pdev);
@@ -2350,6 +2516,7 @@
int rc;
resource_size_t size ;
unsigned long flag;
+ u32 frame_rate;
#ifdef CONFIG_FB_MSM_MDP40
int intf, if_no;
#endif
@@ -2358,6 +2525,7 @@
#endif
static int contSplash_update_done;
char *cp;
+ unsigned int mdp_r = 0;
if ((pdev->id == 0) && (pdev->num_resources > 0)) {
mdp_init_pdev = pdev;
@@ -2379,6 +2547,15 @@
}
mdp_rev = mdp_pdata->mdp_rev;
+ if (mdp_rev == MDP_REV_42) {
+ mdp_r = inpdw(MDP_BASE + 0x0);
+ mdp_r = ((mdp_r & 0x30000) >> 16);
+ if (mdp_r == 3) {
+ mdp_rev = MDP_REV_43;
+ mdp_pdata->mdp_rev = MDP_REV_43;
+ }
+ }
+
mdp_iommu_split_domain = mdp_pdata->mdp_iommu_split_domain;
rc = mdp_irq_clk_setup(pdev, mdp_pdata->cont_splash_enabled);
@@ -2401,7 +2578,9 @@
#ifdef CONFIG_FB_MSM_OVERLAY
mdp_hw_cursor_init();
#endif
- mdp_clk_ctrl(0);
+
+ if (!(mdp_pdata->cont_splash_enabled))
+ mdp_clk_ctrl(0);
mdp_resource_initialized = 1;
return 0;
@@ -2790,6 +2969,11 @@
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
}
+ frame_rate = mdp_get_panel_framerate(mfd);
+ if (frame_rate) {
+ mfd->panel_info.frame_interval = 1000 / frame_rate;
+ mfd->cpu_pm_hdl = add_event_timer(NULL, (void *)mfd);
+ }
mdp_clk_ctrl(0);
#ifdef CONFIG_MSM_BUS_SCALING
diff --git a/drivers/video/msm/mdp.h b/drivers/video/msm/mdp.h
index 1397507..d939c62 100644
--- a/drivers/video/msm/mdp.h
+++ b/drivers/video/msm/mdp.h
@@ -94,10 +94,16 @@
struct vsync {
ktime_t vsync_time;
+ struct completion vsync_comp;
struct device *dev;
struct work_struct vsync_work;
int vsync_irq_enabled;
+ int vsync_dma_enabled;
+ int disabled_clocks;
struct completion vsync_wait;
+ atomic_t suspend;
+ atomic_t vsync_resume;
+ int sysfs_created;
};
extern struct vsync vsync_cntrl;
@@ -256,6 +262,7 @@
struct mdp_hist_mgmt {
uint32_t block;
uint32_t irq_term;
+ uint32_t intr;
uint32_t base;
struct completion mdp_hist_comp;
struct mutex mdp_hist_mutex;
@@ -323,6 +330,14 @@
#define TV_OUT_DMA3_START BIT(13)
#define MDP_HIST_DONE BIT(20)
+/*MDP4 MDP histogram interrupts*/
+/*note: these are only applicable on MDP4+ targets*/
+#define INTR_VG1_HISTOGRAM BIT(5)
+#define INTR_VG2_HISTOGRAM BIT(6)
+#define INTR_DMA_P_HISTOGRAM BIT(17)
+#define INTR_DMA_S_HISTOGRAM BIT(26)
+/*end MDP4 MDP histogram interrupts*/
+
/* histogram interrupts */
#define INTR_HIST_DONE BIT(1)
#define INTR_HIST_RESET_SEQ_DONE BIT(0)
@@ -337,7 +352,6 @@
MDP_DMA_S_DONE| \
MDP_DMA_E_DONE| \
LCDC_UNDERFLOW| \
- MDP_HIST_DONE| \
TV_ENC_UNDERRUN)
#endif
@@ -893,6 +907,7 @@
int mdp_ppp_v4l2_overlay_play(struct fb_info *info,
unsigned long srcp0_addr, unsigned long srcp0_size,
unsigned long srcp1_addr, unsigned long srcp1_size);
+void mdp_update_pm(struct msm_fb_data_type *mfd, ktime_t pre_vsync);
#ifdef CONFIG_FB_MSM_DTV
void mdp_vid_quant_set(void);
diff --git a/drivers/video/msm/mdp4.h b/drivers/video/msm/mdp4.h
index 6fc83df..180a18a 100644
--- a/drivers/video/msm/mdp4.h
+++ b/drivers/video/msm/mdp4.h
@@ -111,33 +111,23 @@
};
/* system interrupts */
+/*note histogram interrupts defined in mdp.h*/
#define INTR_OVERLAY0_DONE BIT(0)
#define INTR_OVERLAY1_DONE BIT(1)
#define INTR_DMA_S_DONE BIT(2)
#define INTR_DMA_E_DONE BIT(3)
#define INTR_DMA_P_DONE BIT(4)
-#define INTR_VG1_HISTOGRAM BIT(5)
-#define INTR_VG2_HISTOGRAM BIT(6)
#define INTR_PRIMARY_VSYNC BIT(7)
#define INTR_PRIMARY_INTF_UDERRUN BIT(8)
#define INTR_EXTERNAL_VSYNC BIT(9)
#define INTR_EXTERNAL_INTF_UDERRUN BIT(10)
#define INTR_PRIMARY_RDPTR BIT(11) /* read pointer */
-#define INTR_DMA_P_HISTOGRAM BIT(17)
-#define INTR_DMA_S_HISTOGRAM BIT(26)
#define INTR_OVERLAY2_DONE BIT(30)
#ifdef CONFIG_FB_MSM_OVERLAY
-#define MDP4_ANY_INTR_MASK (INTR_DMA_P_HISTOGRAM | \
- INTR_DMA_S_HISTOGRAM | \
- INTR_VG1_HISTOGRAM | \
- INTR_VG2_HISTOGRAM)
+#define MDP4_ANY_INTR_MASK (0)
#else
-#define MDP4_ANY_INTR_MASK (INTR_DMA_P_DONE| \
- INTR_DMA_P_HISTOGRAM | \
- INTR_DMA_S_HISTOGRAM | \
- INTR_VG1_HISTOGRAM | \
- INTR_VG2_HISTOGRAM)
+#define MDP4_ANY_INTR_MASK (INTR_DMA_P_DONE)
#endif
enum {
@@ -316,10 +306,16 @@
uint32 is_fg; /* control alpha & color key */
uint32 srcp0_addr; /* interleave, luma */
uint32 srcp0_ystride;
+ struct file *srcp0_file;
+ int put0_need;
uint32 srcp1_addr; /* pseudoplanar, chroma plane */
uint32 srcp1_ystride;
+ struct file *srcp1_file;
+ int put1_need;
uint32 srcp2_addr; /* planar color 2*/
uint32 srcp2_ystride;
+ struct file *srcp2_file;
+ int put2_need;
uint32 srcp3_addr; /* alpha/color 3 */
uint32 srcp3_ystride;
uint32 fetch_plane;
@@ -359,7 +355,7 @@
uint32 ov_cnt;
uint32 dmap_cnt;
uint32 dmae_cnt;
- uint32 blt_end;
+ uint32 blt_end; /* used by mddi only */
uint32 blt_ov_koff;
uint32 blt_ov_done;
uint32 blt_dmap_koff;
@@ -553,12 +549,9 @@
void mdp4_overlay0_done_dsi_cmd(int cndx);
void mdp4_primary_rdptr(void);
void mdp4_dsi_cmd_overlay(struct msm_fb_data_type *mfd);
-int mdp4_overlay_commit(struct fb_info *info, int mixer);
-int mdp4_dsi_video_pipe_commit(void);
-int mdp4_dsi_cmd_pipe_commit(void);
+int mdp4_lcdc_pipe_commit(int cndx, int wait);
+int mdp4_dtv_pipe_commit(int cndx, int wait);
int mdp4_dsi_cmd_update_cnt(int cndx);
-int mdp4_lcdc_pipe_commit(void);
-int mdp4_dtv_pipe_commit(void);
void mdp4_dsi_rdptr_init(int cndx);
void mdp4_dsi_vsync_init(int cndx);
void mdp4_lcdc_vsync_init(int cndx);
@@ -587,6 +580,7 @@
int mdp4_overlay_play_wait(struct fb_info *info,
struct msmfb_overlay_data *req);
int mdp4_overlay_play(struct fb_info *info, struct msmfb_overlay_data *req);
+int mdp4_overlay_commit(struct fb_info *info, int mixer);
struct mdp4_overlay_pipe *mdp4_overlay_pipe_alloc(int ptype, int mixer);
void mdp4_overlay_dma_commit(int mixer);
void mdp4_overlay_vsync_commit(struct mdp4_overlay_pipe *pipe);
@@ -773,6 +767,8 @@
void mdp4_dsi_video_wait4vsync(int cndx, long long *vtime);
void mdp4_dsi_cmd_pipe_queue(int cndx, struct mdp4_overlay_pipe *pipe);
void mdp4_dsi_video_pipe_queue(int cndx, struct mdp4_overlay_pipe *pipe);
+int mdp4_dsi_video_pipe_commit(int cndx, int wait);
+int mdp4_dsi_cmd_pipe_commit(int cndx, int wait);
void mdp4_dsi_cmd_vsync_ctrl(struct fb_info *info, int enable);
void mdp4_dsi_video_vsync_ctrl(struct fb_info *info, int enable);
#ifdef CONFIG_FB_MSM_MDP303
@@ -822,6 +818,14 @@
struct mdp4_overlay_pipe *pipe)
{
}
+static inline int mdp4_dsi_video_pipe_commit(int cndx, int wait)
+{
+ return 0;
+}
+static inline int mdp4_dsi_cmd_pipe_commit(int cndx, int wait)
+{
+ return 0;
+}
static inline void mdp4_dsi_cmd_vsync_ctrl(struct fb_info *info,
int enable)
{
diff --git a/drivers/video/msm/mdp4_overlay.c b/drivers/video/msm/mdp4_overlay.c
index 63f0aa1..c7e811f 100644
--- a/drivers/video/msm/mdp4_overlay.c
+++ b/drivers/video/msm/mdp4_overlay.c
@@ -191,6 +191,19 @@
if (pipe == NULL)
return;
+ if (pipe->flags & MDP_MEMORY_ID_TYPE_FB) {
+ if (pipe->put0_need)
+ fput_light(pipe->srcp0_file, pipe->put0_need);
+ if (pipe->put1_need)
+ fput_light(pipe->srcp1_file, pipe->put1_need);
+ if (pipe->put2_need)
+ fput_light(pipe->srcp2_file, pipe->put2_need);
+
+ pr_debug("%s: ndx=%d flags=%x put=%d\n", __func__,
+ pipe->pipe_ndx, pipe->flags, pipe->put0_need);
+ return;
+ }
+
mutex_lock(&iommu_mutex);
mixer = pipe->mixer_num;
iom = &pipe->iommu;
@@ -735,37 +748,53 @@
*luma_off = 0;
*chroma_off = 0;
- if (pipe->src_x && (pipe->frame_format ==
+ if ((pipe->src_x || pipe->src_y) && (pipe->frame_format ==
MDP4_FRAME_FORMAT_LINEAR)) {
- src_xy = (pipe->src_y << 16) | pipe->src_x;
- src_xy &= 0xffff0000;
+ src_xy = 0;
outpdw(vg_base + 0x0004, src_xy); /* MDP_RGB_SRC_XY */
switch (pipe->src_format) {
case MDP_Y_CR_CB_H2V2:
case MDP_Y_CR_CB_GH2V2:
case MDP_Y_CB_CR_H2V2:
- *luma_off = pipe->src_x;
- *chroma_off = pipe->src_x/2;
+ *luma_off = pipe->src_x +
+ (pipe->src_y * pipe->srcp0_ystride);
+ *chroma_off = pipe->src_x / 2 +
+ ((pipe->src_y / 2) * pipe->srcp1_ystride);
break;
case MDP_Y_CBCR_H2V2_TILE:
case MDP_Y_CRCB_H2V2_TILE:
case MDP_Y_CBCR_H2V2:
case MDP_Y_CRCB_H2V2:
+ *luma_off = pipe->src_x +
+ (pipe->src_y * pipe->srcp0_ystride);
+ *chroma_off = pipe->src_x +
+ ((pipe->src_y / 2) * pipe->srcp1_ystride);
+ break;
+
case MDP_Y_CRCB_H1V1:
case MDP_Y_CBCR_H1V1:
+ *luma_off = pipe->src_x +
+ (pipe->src_y * pipe->srcp0_ystride);
+ *chroma_off = pipe->src_x +
+ ((pipe->src_y * 2) * pipe->srcp1_ystride);
+ break;
+
case MDP_Y_CRCB_H2V1:
case MDP_Y_CBCR_H2V1:
case MDP_Y_CRCB_H1V2:
- *luma_off = pipe->src_x;
- *chroma_off = pipe->src_x;
+ *luma_off = pipe->src_x +
+ (pipe->src_y * pipe->srcp0_ystride);
+ *chroma_off = pipe->src_x +
+ (pipe->src_y * pipe->srcp1_ystride);
break;
case MDP_YCRYCB_H2V1:
if (pipe->src_x & 0x1)
pipe->src_x += 1;
- *luma_off += pipe->src_x * 2;
+ *luma_off += pipe->src_x * 2 +
+ ((pipe->src_y * 2) * pipe->srcp0_ystride);
break;
case MDP_ARGB_8888:
@@ -778,7 +807,8 @@
case MDP_RGB_888:
case MDP_YCBCR_H1V1:
case MDP_YCRCB_H1V1:
- *luma_off = pipe->src_x * pipe->bpp;
+ *luma_off = (pipe->src_x * pipe->bpp) +
+ (pipe->src_y * pipe->srcp0_ystride);
break;
default:
@@ -1619,6 +1649,8 @@
data |= stage;
}
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ mdp_clk_ctrl(1);
mdp4_mixer_blend_setup(mixer);
off = 0;
@@ -1638,7 +1670,6 @@
mixer, data, ctrl->flush[mixer], current->pid);
}
- mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
local_irq_save(flags);
if (off)
outpdw(MDP_BASE + off, data);
@@ -1649,6 +1680,7 @@
}
local_irq_restore(flags);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+ mdp_clk_ctrl(0);
}
@@ -1973,7 +2005,8 @@
blend->bg_alpha = 0x0ff - s_pipe->alpha;
blend->fg_alpha = s_pipe->alpha;
blend->co3_sel = 1; /* use fg alpha */
-
+ pr_debug("%s: bg alpha %d, fg alpha %d\n",
+ __func__, blend->bg_alpha, blend->fg_alpha);
if (s_pipe->is_fg) {
if (s_pipe->alpha == 0xff) {
blend->solidfill = 1;
@@ -1989,10 +2022,9 @@
MDP4_BLEND_FG_ALPHA_FG_PIXEL;
else
blend->fg_alpha = 0xff;
+ blend->op |= MDP4_BLEND_BG_INV_ALPHA;
} else
blend->op = MDP4_BLEND_BG_ALPHA_FG_CONST;
-
- blend->op |= MDP4_BLEND_BG_INV_ALPHA;
} else if (d_alpha) {
ptype = mdp4_overlay_format2type(s_pipe->src_format);
if (ptype == OVERLAY_TYPE_VIDEO) {
@@ -2314,6 +2346,18 @@
return -ERANGE;
}
+ if (mdp_rev <= MDP_REV_41) {
+ if ((mdp4_overlay_format2type(req->src.format) ==
+ OVERLAY_TYPE_RGB) &&
+ !(req->flags & MDP_OV_PIPE_SHARE) &&
+ ((req->src_rect.w > req->dst_rect.w) ||
+ (req->src_rect.h > req->dst_rect.h))) {
+ mdp4_stat.err_size++;
+ pr_err("%s: downscale on RGB pipe!\n", __func__);
+ return -EINVAL;
+ }
+ }
+
if (mdp_hw_revision == MDP4_REVISION_V1) {
/* non integer down saceling ratio smaller than 1/4
* is not supportted
@@ -2924,14 +2968,13 @@
if (file == NULL)
return -EINVAL;
+ pipe->flags |= MDP_MEMORY_ID_TYPE_FB;
if (MAJOR(file->f_dentry->d_inode->i_rdev) == FB_MAJOR) {
fb_num = MINOR(file->f_dentry->d_inode->i_rdev);
if (get_fb_phys_info(start, len, fb_num,
DISPLAY_SUBSYSTEM_ID)) {
ret = -1;
} else {
- pr_warn("%s: mdp4_overlay play with FB memory\n",
- __func__);
*srcp_file = file;
*p_need = put_needed;
}
@@ -3092,6 +3135,7 @@
int mdp4_overlay_unset_mixer(int mixer)
{
struct mdp4_overlay_pipe *pipe;
+ struct mdp4_overlay_pipe *orgpipe;
int i, cnt = 0;
/* free pipe besides base layer pipe */
@@ -3103,6 +3147,10 @@
mdp4_overlay_reg_flush(pipe, 1);
mdp4_mixer_stage_down(pipe, 1);
mdp4_overlay_pipe_free(pipe);
+ /*Clear real pipe attributes as well */
+ orgpipe = mdp4_overlay_ndx2pipe(pipe->pipe_ndx);
+ if (orgpipe != NULL)
+ orgpipe->pipe_used = 0;
cnt++;
}
@@ -3284,11 +3332,8 @@
struct mdp4_overlay_pipe *pipe;
ulong start, addr;
ulong len = 0;
- struct file *srcp0_file = NULL;
- struct file *srcp1_file = NULL, *srcp2_file = NULL;
struct ion_handle *srcp0_ihdl = NULL;
struct ion_handle *srcp1_ihdl = NULL, *srcp2_ihdl = NULL;
- int ps0_need, p_need;
uint32_t overlay_version = 0;
int ret = 0;
@@ -3313,8 +3358,8 @@
mutex_lock(&mfd->dma->ov_mutex);
img = &req->data;
- get_img(img, info, pipe, 0, &start, &len, &srcp0_file,
- &ps0_need, &srcp0_ihdl);
+ get_img(img, info, pipe, 0, &start, &len, &pipe->srcp0_file,
+ &pipe->put0_need, &srcp0_ihdl);
if (len == 0) {
pr_err("%s: pmem Error\n", __func__);
ret = -1;
@@ -3336,8 +3381,9 @@
if (pipe->fetch_plane == OVERLAY_PLANE_PSEUDO_PLANAR) {
if (overlay_version > 0) {
img = &req->plane1_data;
- get_img(img, info, pipe, 1, &start, &len, &srcp1_file,
- &p_need, &srcp1_ihdl);
+ get_img(img, info, pipe, 1, &start, &len,
+ &pipe->srcp1_file, &pipe->put1_need,
+ &srcp1_ihdl);
if (len == 0) {
pr_err("%s: Error to get plane1\n", __func__);
ret = -EINVAL;
@@ -3368,8 +3414,9 @@
} else if (pipe->fetch_plane == OVERLAY_PLANE_PLANAR) {
if (overlay_version > 0) {
img = &req->plane1_data;
- get_img(img, info, pipe, 1, &start, &len, &srcp1_file,
- &p_need, &srcp1_ihdl);
+ get_img(img, info, pipe, 1, &start, &len,
+ &pipe->srcp1_file, &pipe->put1_need,
+ &srcp1_ihdl);
if (len == 0) {
pr_err("%s: Error to get plane1\n", __func__);
ret = -EINVAL;
@@ -3378,8 +3425,9 @@
pipe->srcp1_addr = start + img->offset;
img = &req->plane2_data;
- get_img(img, info, pipe, 2, &start, &len, &srcp2_file,
- &p_need, &srcp2_ihdl);
+ get_img(img, info, pipe, 2, &start, &len,
+ &pipe->srcp2_file, &pipe->put2_need,
+ &srcp2_ihdl);
if (len == 0) {
pr_err("%s: Error to get plane2\n", __func__);
ret = -EINVAL;
@@ -3428,8 +3476,7 @@
if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
/* cndx = 0 */
mdp4_dsi_cmd_pipe_queue(0, pipe);
- }
- if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
+ } else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
/* cndx = 0 */
mdp4_dsi_video_pipe_queue(0, pipe);
} else if (ctrl->panel_mode & MDP4_PANEL_LCDC) {
@@ -3477,20 +3524,49 @@
end:
mutex_unlock(&mfd->dma->ov_mutex);
-#ifdef CONFIG_ANDROID_PMEM
- if (srcp0_file)
- put_pmem_file(srcp0_file);
- if (srcp1_file)
- put_pmem_file(srcp1_file);
- if (srcp2_file)
- put_pmem_file(srcp2_file);
-#endif
- /* only source may use frame buffer */
- if (img->flags & MDP_MEMORY_ID_TYPE_FB)
- fput_light(srcp0_file, ps0_need);
return ret;
}
+int mdp4_overlay_commit(struct fb_info *info, int mixer)
+{
+ struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
+
+ if (mfd == NULL)
+ return -ENODEV;
+
+ if (!mfd->panel_power_on) /* suspended */
+ return -EINVAL;
+
+ if (mixer >= MDP4_MIXER_MAX)
+ return -EPERM;
+
+ mutex_lock(&mfd->dma->ov_mutex);
+
+ mdp4_overlay_mdp_perf_upd(mfd, 1);
+
+ if (mixer == MDP4_MIXER0) {
+ if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
+ /* cndx = 0 */
+ mdp4_dsi_cmd_pipe_commit(0, 1);
+ } else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
+ /* cndx = 0 */
+ mdp4_dsi_video_pipe_commit(0, 1);
+ } else if (ctrl->panel_mode & MDP4_PANEL_LCDC) {
+ /* cndx = 0 */
+ mdp4_lcdc_pipe_commit(0, 1);
+ }
+ } else if (mixer == MDP4_MIXER1) {
+ if (ctrl->panel_mode & MDP4_PANEL_DTV)
+ mdp4_dtv_pipe_commit(0, 1);
+ }
+
+ mdp4_overlay_mdp_perf_upd(mfd, 0);
+
+ mutex_unlock(&mfd->dma->ov_mutex);
+
+ return 0;
+}
+
struct msm_iommu_ctx {
char *name;
int domain;
diff --git a/drivers/video/msm/mdp4_overlay_atv.c b/drivers/video/msm/mdp4_overlay_atv.c
index e67b244..90c3da9 100644
--- a/drivers/video/msm/mdp4_overlay_atv.c
+++ b/drivers/video/msm/mdp4_overlay_atv.c
@@ -184,6 +184,8 @@
} else {
pipe->srcp0_addr = (uint32)(buf + buf_offset);
}
+ mdp_update_pm(mfd, vsync_ctrl_db[0].vsync_time);
+
mdp4_overlay_mdp_perf_req(pipe, mfd);
mdp4_overlay_mdp_perf_upd(mfd, 1);
mdp4_overlay_rgb_setup(pipe);
diff --git a/drivers/video/msm/mdp4_overlay_dsi_cmd.c b/drivers/video/msm/mdp4_overlay_dsi_cmd.c
index 3320d11..ecdd567 100644
--- a/drivers/video/msm/mdp4_overlay_dsi_cmd.c
+++ b/drivers/video/msm/mdp4_overlay_dsi_cmd.c
@@ -39,7 +39,7 @@
static int vsync_start_y_adjust = 4;
#define MAX_CONTROLLER 1
-#define VSYNC_EXPIRE_TICK 8
+#define VSYNC_EXPIRE_TICK 4
static struct vsycn_ctrl {
struct device *dev;
@@ -54,11 +54,12 @@
uint32 rdptr_intr_tot;
uint32 rdptr_sirq_tot;
atomic_t suspend;
+ atomic_t vsync_resume;
int wait_vsync_cnt;
int blt_change;
int blt_free;
int blt_end;
- int uevent;
+ int sysfs_created;
struct mutex update_lock;
struct completion ov_comp;
struct completion dmap_comp;
@@ -72,7 +73,6 @@
int clk_control;
int new_update;
ktime_t vsync_time;
- struct work_struct vsync_work;
struct work_struct clk_work;
} vsync_ctrl_db[MAX_CONTROLLER];
@@ -250,7 +250,7 @@
static void mdp4_dsi_cmd_blt_ov_update(struct mdp4_overlay_pipe *pipe);
-int mdp4_dsi_cmd_pipe_commit(void)
+int mdp4_dsi_cmd_pipe_commit(int cndx, int wait)
{
int i, undx;
int mixer = 0;
@@ -377,6 +377,12 @@
mdp4_stat.overlay_commit[pipe->mixer_num]++;
+ if (wait) {
+ long long tick;
+
+ mdp4_dsi_cmd_wait4vsync(cndx, &tick);
+ }
+
return cnt;
}
@@ -384,7 +390,6 @@
void mdp4_dsi_cmd_vsync_ctrl(struct fb_info *info, int enable)
{
- struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
struct vsycn_ctrl *vctrl;
unsigned long flags;
int clk_set_on = 0;
@@ -415,24 +420,23 @@
spin_lock_irqsave(&vctrl->spin_lock, flags);
vctrl->clk_control = 0;
vctrl->expire_tick = 0;
- vctrl->uevent = 1;
vctrl->new_update = 1;
if (clk_set_on) {
vsync_irq_enable(INTR_PRIMARY_RDPTR,
MDP_PRIM_RDPTR_TERM);
}
spin_unlock_irqrestore(&vctrl->spin_lock, flags);
-
- mdp4_overlay_update_dsi_cmd(mfd);
} else {
spin_lock_irqsave(&vctrl->spin_lock, flags);
vctrl->clk_control = 1;
- vctrl->uevent = 0;
if (vctrl->clk_enabled)
vctrl->expire_tick = VSYNC_EXPIRE_TICK;
spin_unlock_irqrestore(&vctrl->spin_lock, flags);
}
mutex_unlock(&vctrl->update_lock);
+
+ if (vctrl->vsync_enabled && atomic_read(&vctrl->suspend) == 0)
+ atomic_set(&vctrl->vsync_resume, 1);
}
void mdp4_dsi_cmd_wait4vsync(int cndx, long long *vtime)
@@ -515,13 +519,9 @@
vctrl->vsync_time = ktime_get();
spin_lock(&vctrl->spin_lock);
- if (vctrl->uevent)
- schedule_work(&vctrl->vsync_work);
- if (vctrl->wait_vsync_cnt) {
- complete(&vctrl->vsync_comp);
- vctrl->wait_vsync_cnt = 0;
- }
+ complete_all(&vctrl->vsync_comp);
+ vctrl->wait_vsync_cnt = 0;
if (vctrl->expire_tick) {
vctrl->expire_tick--;
@@ -539,6 +539,8 @@
vctrl = &vsync_ctrl_db[cndx];
pipe = vctrl->base_pipe;
+ if (pipe == NULL)
+ return;
/* blt enabled */
spin_lock(&vctrl->spin_lock);
@@ -578,6 +580,8 @@
vctrl = &vsync_ctrl_db[cndx];
pipe = vctrl->base_pipe;
+ if (pipe == NULL)
+ return;
spin_lock(&vctrl->spin_lock);
vsync_irq_disable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
@@ -636,21 +640,35 @@
mutex_unlock(&vctrl->update_lock);
}
-static void send_vsync_work(struct work_struct *work)
+static ssize_t vsync_show_event(struct device *dev,
+ struct device_attribute *attr, char *buf)
{
- struct vsycn_ctrl *vctrl =
- container_of(work, typeof(*vctrl), vsync_work);
- char buf[64];
- char *envp[2];
+ int cndx;
+ struct vsycn_ctrl *vctrl;
+ ssize_t ret = 0;
+ unsigned long flags;
- snprintf(buf, sizeof(buf), "VSYNC=%llu",
+ cndx = 0;
+ vctrl = &vsync_ctrl_db[0];
+
+ if (atomic_read(&vctrl->suspend) > 0 ||
+ atomic_read(&vctrl->vsync_resume) == 0)
+ return 0;
+
+ spin_lock_irqsave(&vctrl->spin_lock, flags);
+ if (vctrl->wait_vsync_cnt == 0)
+ INIT_COMPLETION(vctrl->vsync_comp);
+ vctrl->wait_vsync_cnt++;
+ spin_unlock_irqrestore(&vctrl->spin_lock, flags);
+
+ wait_for_completion(&vctrl->vsync_comp);
+
+ ret = snprintf(buf, PAGE_SIZE, "VSYNC=%llu",
ktime_to_ns(vctrl->vsync_time));
- envp[0] = buf;
- envp[1] = NULL;
- kobject_uevent_env(&vctrl->dev->kobj, KOBJ_CHANGE, envp);
+ buf[strlen(buf) + 1] = '\0';
+ return ret;
}
-
void mdp4_dsi_rdptr_init(int cndx)
{
struct vsycn_ctrl *vctrl;
@@ -671,7 +689,7 @@
init_completion(&vctrl->dmap_comp);
init_completion(&vctrl->vsync_comp);
spin_lock_init(&vctrl->spin_lock);
- INIT_WORK(&vctrl->vsync_work, send_vsync_work);
+ atomic_set(&vctrl->vsync_resume, 1);
INIT_WORK(&vctrl->clk_work, clk_ctrl_work);
}
@@ -952,6 +970,14 @@
mdp4_dsi_cmd_do_blt(mfd, req->enable);
}
+static DEVICE_ATTR(vsync_event, S_IRUGO, vsync_show_event, NULL);
+static struct attribute *vsync_fs_attrs[] = {
+ &dev_attr_vsync_event.attr,
+ NULL,
+};
+static struct attribute_group vsync_fs_attr_group = {
+ .attrs = vsync_fs_attrs,
+};
int mdp4_dsi_cmd_on(struct platform_device *pdev)
{
int ret = 0;
@@ -976,6 +1002,19 @@
atomic_set(&vctrl->suspend, 0);
pr_debug("%s-:\n", __func__);
+ if (!vctrl->sysfs_created) {
+ ret = sysfs_create_group(&vctrl->dev->kobj,
+ &vsync_fs_attr_group);
+ if (ret) {
+ pr_err("%s: sysfs group creation failed, ret=%d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ kobject_uevent(&vctrl->dev->kobj, KOBJ_ADD);
+ pr_debug("%s: kobject_uevent(KOBJ_ADD)\n", __func__);
+ vctrl->sysfs_created = 1;
+ }
return ret;
}
@@ -987,6 +1026,8 @@
struct msm_fb_data_type *mfd;
struct vsycn_ctrl *vctrl;
struct mdp4_overlay_pipe *pipe;
+ struct vsync_update *vp;
+ int undx;
pr_debug("%s+:\n", __func__);
@@ -1000,6 +1041,9 @@
}
atomic_set(&vctrl->suspend, 1);
+ atomic_set(&vctrl->vsync_resume, 0);
+
+ complete_all(&vctrl->vsync_comp);
/* sanity check, free pipes besides base layer */
mdp4_overlay_unset_mixer(pipe->mixer_num);
@@ -1016,11 +1060,20 @@
mdp_clk_ctrl(0);
}
+ undx = vctrl->update_ndx;
+ vp = &vctrl->vlist[undx];
+ if (vp->update_cnt) {
+ /*
+ * pipe's iommu will be freed at next overlay play
+ * and iommu_drop statistic will be increased by one
+ */
+ vp->update_cnt = 0; /* empty queue */
+ }
+
vctrl->clk_enabled = 0;
vctrl->vsync_enabled = 0;
vctrl->clk_control = 0;
vctrl->expire_tick = 0;
- vctrl->uevent = 0;
vsync_irq_disable(INTR_PRIMARY_RDPTR, MDP_PRIM_RDPTR_TERM);
@@ -1068,7 +1121,7 @@
struct vsycn_ctrl *vctrl;
struct mdp4_overlay_pipe *pipe;
unsigned long flags;
- long long xx;
+ long long tick;
vctrl = &vsync_ctrl_db[cndx];
@@ -1109,10 +1162,10 @@
mdp4_overlay_mdp_perf_upd(mfd, 1);
mutex_lock(&mfd->dma->ov_mutex);
- mdp4_dsi_cmd_pipe_commit();
+ mdp4_dsi_cmd_pipe_commit(cndx, 0);
mutex_unlock(&mfd->dma->ov_mutex);
- mdp4_dsi_cmd_wait4vsync(0, &xx);
+ mdp4_dsi_cmd_wait4vsync(cndx, &tick);
mdp4_overlay_mdp_perf_upd(mfd, 0);
}
diff --git a/drivers/video/msm/mdp4_overlay_dsi_video.c b/drivers/video/msm/mdp4_overlay_dsi_video.c
index fcdccca..6aa101f 100644
--- a/drivers/video/msm/mdp4_overlay_dsi_video.c
+++ b/drivers/video/msm/mdp4_overlay_dsi_video.c
@@ -52,10 +52,11 @@
int ov_koff;
int ov_done;
atomic_t suspend;
+ atomic_t vsync_resume;
int wait_vsync_cnt;
int blt_change;
int blt_free;
- int fake_vsync;
+ int sysfs_created;
struct mutex update_lock;
struct completion ov_comp;
struct completion dmap_comp;
@@ -66,7 +67,6 @@
struct vsync_update vlist[2];
int vsync_irq_enabled;
ktime_t vsync_time;
- struct work_struct vsync_work;
} vsync_ctrl_db[MAX_CONTROLLER];
static void vsync_irq_enable(int intr, int term)
@@ -147,7 +147,7 @@
static void mdp4_dsi_video_wait4dmap(int cndx);
static void mdp4_dsi_video_wait4ov(int cndx);
-int mdp4_dsi_video_pipe_commit(void)
+int mdp4_dsi_video_pipe_commit(int cndx, int wait)
{
int i, undx;
@@ -159,7 +159,7 @@
unsigned long flags;
int cnt = 0;
- vctrl = &vsync_ctrl_db[0];
+ vctrl = &vsync_ctrl_db[cndx];
mutex_lock(&vctrl->update_lock);
undx = vctrl->update_ndx;
@@ -253,6 +253,13 @@
mdp4_stat.overlay_commit[pipe->mixer_num]++;
+ if (wait) {
+ if (pipe->ov_blt_addr)
+ mdp4_dsi_video_wait4ov(cndx);
+ else
+ mdp4_dsi_video_wait4dmap(cndx);
+ }
+
return cnt;
}
@@ -263,11 +270,6 @@
vctrl = &vsync_ctrl_db[cndx];
- if (vctrl->fake_vsync) {
- vctrl->fake_vsync = 0;
- schedule_work(&vctrl->vsync_work);
- }
-
if (vctrl->vsync_irq_enabled == enable)
return;
@@ -279,6 +281,9 @@
vsync_irq_enable(INTR_PRIMARY_VSYNC, MDP_PRIM_VSYNC_TERM);
else
vsync_irq_disable(INTR_PRIMARY_VSYNC, MDP_PRIM_VSYNC_TERM);
+
+ if (vctrl->vsync_irq_enabled && atomic_read(&vctrl->suspend) == 0)
+ atomic_set(&vctrl->vsync_resume, 1);
}
void mdp4_dsi_video_wait4vsync(int cndx, long long *vtime)
@@ -350,7 +355,6 @@
vsync_irq_enable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
spin_unlock_irqrestore(&vctrl->spin_lock, flags);
mdp4_dsi_video_wait4dmap(cndx);
- vsync_irq_disable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
}
@@ -371,18 +375,32 @@
wait_for_completion(&vctrl->ov_comp);
}
-static void send_vsync_work(struct work_struct *work)
+static ssize_t vsync_show_event(struct device *dev,
+ struct device_attribute *attr, char *buf)
{
- struct vsycn_ctrl *vctrl =
- container_of(work, typeof(*vctrl), vsync_work);
- char buf[64];
- char *envp[2];
+ int cndx;
+ struct vsycn_ctrl *vctrl;
+ ssize_t ret = 0;
+ unsigned long flags;
- snprintf(buf, sizeof(buf), "VSYNC=%llu",
+ cndx = 0;
+ vctrl = &vsync_ctrl_db[0];
+
+ if (atomic_read(&vctrl->suspend) > 0 ||
+ atomic_read(&vctrl->vsync_resume) == 0)
+ return 0;
+
+ spin_lock_irqsave(&vctrl->spin_lock, flags);
+ if (vctrl->wait_vsync_cnt == 0)
+ INIT_COMPLETION(vctrl->vsync_comp);
+ vctrl->wait_vsync_cnt++;
+ spin_unlock_irqrestore(&vctrl->spin_lock, flags);
+ wait_for_completion(&vctrl->vsync_comp);
+
+ ret = snprintf(buf, PAGE_SIZE, "VSYNC=%llu",
ktime_to_ns(vctrl->vsync_time));
- envp[0] = buf;
- envp[1] = NULL;
- kobject_uevent_env(&vctrl->dev->kobj, KOBJ_CHANGE, envp);
+ buf[strlen(buf) + 1] = '\0';
+ return ret;
}
void mdp4_dsi_vsync_init(int cndx)
@@ -407,8 +425,8 @@
init_completion(&vctrl->dmap_comp);
init_completion(&vctrl->ov_comp);
atomic_set(&vctrl->suspend, 0);
+ atomic_set(&vctrl->vsync_resume, 1);
spin_lock_init(&vctrl->spin_lock);
- INIT_WORK(&vctrl->vsync_work, send_vsync_work);
}
void mdp4_dsi_video_base_swap(int cndx, struct mdp4_overlay_pipe *pipe)
@@ -424,6 +442,16 @@
vctrl->base_pipe = pipe;
}
+static DEVICE_ATTR(vsync_event, S_IRUGO, vsync_show_event, NULL);
+
+static struct attribute *vsync_fs_attrs[] = {
+ &dev_attr_vsync_event.attr,
+ NULL,
+};
+
+static struct attribute_group vsync_fs_attr_group = {
+ .attrs = vsync_fs_attrs,
+};
int mdp4_dsi_video_on(struct platform_device *pdev)
{
int dsi_width;
@@ -478,7 +506,6 @@
vctrl->mfd = mfd;
vctrl->dev = mfd->fbi->dev;
- vctrl->fake_vsync = 1;
/* mdp clock on */
mdp_clk_ctrl(1);
@@ -522,6 +549,9 @@
mdp4_dsi_video_wait4dmap_done(0);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE, 0);
mipi_dsi_controller_cfg(0);
+ /* Clks are enabled in probe.
+ Disabling clocks now */
+ mdp_clk_ctrl(0);
}
pipe->src_height = fbi->var.yres;
@@ -634,6 +664,21 @@
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
mdp_histogram_ctrl_all(TRUE);
+
+ if (!vctrl->sysfs_created) {
+ ret = sysfs_create_group(&vctrl->dev->kobj,
+ &vsync_fs_attr_group);
+ if (ret) {
+ pr_err("%s: sysfs group creation failed, ret=%d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ kobject_uevent(&vctrl->dev->kobj, KOBJ_ADD);
+ pr_debug("%s: kobject_uevent(KOBJ_ADD)\n", __func__);
+ vctrl->sysfs_created = 1;
+ }
+
return ret;
}
@@ -644,17 +689,21 @@
struct msm_fb_data_type *mfd;
struct vsycn_ctrl *vctrl;
struct mdp4_overlay_pipe *pipe;
+ struct vsync_update *vp;
unsigned long flags;
- int need_wait = 0;
+ int undx, need_wait = 0;
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
vctrl = &vsync_ctrl_db[cndx];
pipe = vctrl->base_pipe;
atomic_set(&vctrl->suspend, 1);
+ atomic_set(&vctrl->vsync_resume, 0);
msleep(20); /* >= 17 ms */
+ complete_all(&vctrl->vsync_comp);
+
if (pipe->ov_blt_addr) {
spin_lock_irqsave(&vctrl->spin_lock, flags);
if (vctrl->ov_koff != vctrl->ov_done)
@@ -670,6 +719,21 @@
dsi_video_enabled = 0;
+ if (vctrl->vsync_irq_enabled) {
+ vctrl->vsync_irq_enabled = 0;
+ vsync_irq_disable(INTR_PRIMARY_VSYNC, MDP_PRIM_VSYNC_TERM);
+ }
+
+ undx = vctrl->update_ndx;
+ vp = &vctrl->vlist[undx];
+ if (vp->update_cnt) {
+ /*
+ * pipe's iommu will be freed at next overlay play
+ * and iommu_drop statistic will be increased by one
+ */
+ vp->update_cnt = 0; /* empty queue */
+ }
+
if (pipe) {
/* sanity check, free pipes besides base layer */
mdp4_overlay_unset_mixer(pipe->mixer_num);
@@ -677,6 +741,11 @@
/* adb stop */
if (pipe->pipe_type == OVERLAY_TYPE_BF)
mdp4_overlay_borderfill_stage_down(pipe);
+
+ /* base pipe may change after borderfill_stage_down */
+ pipe = vctrl->base_pipe;
+ mdp4_mixer_stage_down(pipe, 1);
+ mdp4_overlay_pipe_free(pipe);
vctrl->base_pipe = NULL;
} else {
/* system suspending */
@@ -686,8 +755,6 @@
}
}
- vctrl->fake_vsync = 1;
-
/* mdp clock off */
mdp_clk_ctrl(0);
mdp_pipe_ctrl(MDP_OVERLAY0_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
@@ -852,7 +919,6 @@
vctrl = &vsync_ctrl_db[cndx];
pr_debug("%s: cpu=%d\n", __func__, smp_processor_id());
vctrl->vsync_time = ktime_get();
- schedule_work(&vctrl->vsync_work);
spin_lock(&vctrl->spin_lock);
if (vctrl->wait_vsync_cnt) {
@@ -876,6 +942,8 @@
}
vctrl = &vsync_ctrl_db[cndx];
pipe = vctrl->base_pipe;
+ if (pipe == NULL)
+ return;
spin_lock(&vctrl->spin_lock);
vsync_irq_disable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
@@ -911,6 +979,8 @@
vctrl = &vsync_ctrl_db[cndx];
pipe = vctrl->base_pipe;
+ if (pipe == NULL)
+ return;
spin_lock(&vctrl->spin_lock);
vsync_irq_disable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
@@ -1023,16 +1093,17 @@
mdp4_dsi_video_pipe_queue(0, pipe);
}
+ mdp_update_pm(mfd, vsync_ctrl_db[0].vsync_time);
mdp4_overlay_mdp_perf_upd(mfd, 1);
mutex_lock(&mfd->dma->ov_mutex);
- mdp4_dsi_video_pipe_commit();
+ mdp4_dsi_video_pipe_commit(cndx, 0);
mutex_unlock(&mfd->dma->ov_mutex);
if (pipe->ov_blt_addr)
- mdp4_dsi_video_wait4ov(0);
+ mdp4_dsi_video_wait4ov(cndx);
else
- mdp4_dsi_video_wait4dmap(0);
+ mdp4_dsi_video_wait4dmap(cndx);
mdp4_overlay_mdp_perf_upd(mfd, 0);
}
diff --git a/drivers/video/msm/mdp4_overlay_dtv.c b/drivers/video/msm/mdp4_overlay_dtv.c
index f3bd775..21e5d1d 100644
--- a/drivers/video/msm/mdp4_overlay_dtv.c
+++ b/drivers/video/msm/mdp4_overlay_dtv.c
@@ -29,6 +29,7 @@
#include "mdp.h"
#include "msm_fb.h"
+#include "hdmi_msm.h"
#include "mdp4.h"
#define DTV_BASE 0xD0000
@@ -70,10 +71,11 @@
int update_ndx;
int dmae_intr_cnt;
atomic_t suspend;
+ atomic_t vsync_resume;
int dmae_wait_cnt;
int wait_vsync_cnt;
int blt_change;
- int fake_vsync;
+ int sysfs_created;
struct mutex update_lock;
struct completion ov_comp;
struct completion dmae_comp;
@@ -83,7 +85,6 @@
struct vsync_update vlist[2];
int vsync_irq_enabled;
ktime_t vsync_time;
- struct work_struct vsync_work;
} vsync_ctrl_db[MAX_CONTROLLER];
static void vsync_irq_enable(int intr, int term)
@@ -164,7 +165,7 @@
static void mdp4_dtv_blt_ov_update(struct mdp4_overlay_pipe *pipe);
static void mdp4_dtv_wait4dmae(int cndx);
-int mdp4_dtv_pipe_commit(void)
+int mdp4_dtv_pipe_commit(int cndx, int wait)
{
int i, undx;
@@ -176,7 +177,7 @@
unsigned long flags;
int cnt = 0;
- vctrl = &vsync_ctrl_db[0];
+ vctrl = &vsync_ctrl_db[cndx];
mutex_lock(&vctrl->update_lock);
undx = vctrl->update_ndx;
vp = &vctrl->vlist[undx];
@@ -235,6 +236,9 @@
spin_unlock_irqrestore(&vctrl->spin_lock, flags);
mdp4_stat.overlay_commit[pipe->mixer_num]++;
+ if (wait)
+ mdp4_dtv_wait4dmae(cndx);
+
return cnt;
}
@@ -245,10 +249,8 @@
vctrl = &vsync_ctrl_db[cndx];
- if (vctrl->fake_vsync) {
- vctrl->fake_vsync = 0;
- schedule_work(&vctrl->vsync_work);
- }
+ if (!external_common_state->hpd_state)
+ complete_all(&vctrl->vsync_comp);
if (vctrl->vsync_irq_enabled == enable)
return;
@@ -261,6 +263,9 @@
vsync_irq_enable(INTR_EXTERNAL_VSYNC, MDP_EXTER_VSYNC_TERM);
else
vsync_irq_disable(INTR_EXTERNAL_VSYNC, MDP_EXTER_VSYNC_TERM);
+
+ if (vctrl->vsync_irq_enabled && atomic_read(&vctrl->suspend) == 0)
+ atomic_set(&vctrl->vsync_resume, 1);
}
void mdp4_dtv_wait4vsync(int cndx, long long *vtime)
@@ -310,20 +315,34 @@
wait_for_completion(&vctrl->dmae_comp);
}
-static void send_vsync_work(struct work_struct *work)
+static ssize_t vsync_show_event(struct device *dev,
+ struct device_attribute *attr, char *buf)
{
- struct vsycn_ctrl *vctrl =
- container_of(work, typeof(*vctrl), vsync_work);
- char buf[64];
- char *envp[2];
+ int cndx;
+ struct vsycn_ctrl *vctrl;
+ ssize_t ret = 0;
+ unsigned long flags;
- snprintf(buf, sizeof(buf), "VSYNC=%llu",
+ cndx = 0;
+ vctrl = &vsync_ctrl_db[0];
+
+ if (atomic_read(&vctrl->suspend) > 0 ||
+ !external_common_state->hpd_state ||
+ atomic_read(&vctrl->vsync_resume) == 0)
+ return 0;
+
+ spin_lock_irqsave(&vctrl->spin_lock, flags);
+ if (vctrl->wait_vsync_cnt == 0)
+ INIT_COMPLETION(vctrl->vsync_comp);
+ vctrl->wait_vsync_cnt++;
+ spin_unlock_irqrestore(&vctrl->spin_lock, flags);
+ wait_for_completion(&vctrl->vsync_comp);
+
+ ret = snprintf(buf, PAGE_SIZE, "VSYNC=%llu",
ktime_to_ns(vctrl->vsync_time));
- envp[0] = buf;
- envp[1] = NULL;
- kobject_uevent_env(&vctrl->dev->kobj, KOBJ_CHANGE, envp);
+ buf[strlen(buf) + 1] = '\0';
+ return ret;
}
-
void mdp4_dtv_vsync_init(int cndx)
{
struct vsycn_ctrl *vctrl;
@@ -346,8 +365,8 @@
init_completion(&vctrl->ov_comp);
init_completion(&vctrl->dmae_comp);
atomic_set(&vctrl->suspend, 0);
+ atomic_set(&vctrl->vsync_resume, 1);
spin_lock_init(&vctrl->spin_lock);
- INIT_WORK(&vctrl->vsync_work, send_vsync_work);
}
static int mdp4_dtv_start(struct msm_fb_data_type *mfd)
@@ -506,6 +525,15 @@
return 0;
}
+static DEVICE_ATTR(vsync_event, S_IRUGO, vsync_show_event, NULL);
+static struct attribute *vsync_fs_attrs[] = {
+ &dev_attr_vsync_event.attr,
+ NULL,
+};
+static struct attribute_group vsync_fs_attr_group = {
+ .attrs = vsync_fs_attrs,
+};
+
int mdp4_dtv_on(struct platform_device *pdev)
{
struct msm_fb_data_type *mfd;
@@ -524,7 +552,6 @@
return -EINVAL;
vctrl->dev = mfd->fbi->dev;
- vctrl->fake_vsync = 1;
mdp_footswitch_ctrl(TRUE);
/* Mdp clock enable */
@@ -547,6 +574,19 @@
atomic_set(&vctrl->suspend, 0);
+ if (!vctrl->sysfs_created) {
+ ret = sysfs_create_group(&vctrl->dev->kobj,
+ &vsync_fs_attr_group);
+ if (ret) {
+ pr_err("%s: sysfs group creation failed, ret=%d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ kobject_uevent(&vctrl->dev->kobj, KOBJ_ADD);
+ pr_debug("%s: kobject_uevent(KOBJ_ADD)\n", __func__);
+ vctrl->sysfs_created = 1;
+ }
pr_info("%s:\n", __func__);
return ret;
@@ -557,17 +597,24 @@
struct msm_fb_data_type *mfd;
int ret = 0;
int cndx = 0;
+ int undx;
struct vsycn_ctrl *vctrl;
struct mdp4_overlay_pipe *pipe;
+ struct vsync_update *vp;
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
vctrl = &vsync_ctrl_db[cndx];
atomic_set(&vctrl->suspend, 1);
+ atomic_set(&vctrl->vsync_resume, 0);
- while (vctrl->wait_vsync_cnt)
- msleep(20); /* >= 17 ms */
+ if (vctrl->vsync_irq_enabled) {
+ while (vctrl->wait_vsync_cnt)
+ msleep(20); /* >= 17 ms */
+ }
+
+ complete_all(&vctrl->vsync_comp);
pipe = vctrl->base_pipe;
if (pipe != NULL) {
@@ -579,6 +626,10 @@
if (pipe->pipe_type == OVERLAY_TYPE_BF)
mdp4_overlay_borderfill_stage_down(pipe);
+ /* base pipe may change after borderfill_stage_down */
+ pipe = vctrl->base_pipe;
+ mdp4_mixer_stage_down(pipe, 1);
+ mdp4_overlay_pipe_free(pipe);
/* pipe == rgb2 */
vctrl->base_pipe = NULL;
} else {
@@ -590,9 +641,23 @@
mdp4_overlay_panel_mode_unset(MDP4_MIXER1, MDP4_PANEL_DTV);
+ if (vctrl->vsync_irq_enabled) {
+ vctrl->vsync_irq_enabled = 0;
+ vsync_irq_disable(INTR_PRIMARY_VSYNC, MDP_PRIM_VSYNC_TERM);
+ }
+
+ undx = vctrl->update_ndx;
+ vp = &vctrl->vlist[undx];
+ if (vp->update_cnt) {
+ /*
+ * pipe's iommu will be freed at next overlay play
+ * and iommu_drop statistic will be increased by one
+ */
+ vp->update_cnt = 0; /* empty queue */
+ }
+
ret = panel_next_off(pdev);
mdp_footswitch_ctrl(FALSE);
- vctrl->fake_vsync = 1;
/* Mdp clock disable */
mdp_clk_ctrl(0);
@@ -791,7 +856,6 @@
vctrl = &vsync_ctrl_db[cndx];
pr_debug("%s: cpu=%d\n", __func__, smp_processor_id());
vctrl->vsync_time = ktime_get();
- schedule_work(&vctrl->vsync_work);
spin_lock(&vctrl->spin_lock);
if (vctrl->wait_vsync_cnt) {
@@ -818,6 +882,8 @@
vctrl = &vsync_ctrl_db[cndx];
pipe = vctrl->base_pipe;
+ if (pipe == NULL)
+ return;
pr_debug("%s: cpu=%d\n", __func__, smp_processor_id());
spin_lock(&vctrl->spin_lock);
@@ -858,6 +924,8 @@
vctrl = &vsync_ctrl_db[cndx];
pipe = vctrl->base_pipe;
+ if (pipe == NULL)
+ return;
spin_lock(&vctrl->spin_lock);
if (pipe->ov_blt_addr == 0) {
@@ -1007,8 +1075,11 @@
pipe->srcp0_addr = (uint32)mfd->ibuf.buf;
mdp4_dtv_pipe_queue(0, pipe);
}
+ mdp_update_pm(mfd, vsync_ctrl_db[0].vsync_time);
mutex_lock(&mfd->dma->ov_mutex);
- mdp4_dtv_pipe_commit();
+ mdp4_overlay_mdp_perf_upd(mfd, 1);
+ mdp4_dtv_pipe_commit(cndx, 0);
+ mdp4_overlay_mdp_perf_upd(mfd, 0);
mutex_unlock(&mfd->dma->ov_mutex);
}
diff --git a/drivers/video/msm/mdp4_overlay_lcdc.c b/drivers/video/msm/mdp4_overlay_lcdc.c
index 323a8fe..1f5136f 100644
--- a/drivers/video/msm/mdp4_overlay_lcdc.c
+++ b/drivers/video/msm/mdp4_overlay_lcdc.c
@@ -53,10 +53,11 @@
int ov_koff;
int ov_done;
atomic_t suspend;
+ atomic_t vsync_resume;
int wait_vsync_cnt;
int blt_change;
int blt_free;
- int fake_vsync;
+ int sysfs_created;
struct mutex update_lock;
struct completion ov_comp;
struct completion dmap_comp;
@@ -67,7 +68,6 @@
struct vsync_update vlist[2];
int vsync_irq_enabled;
ktime_t vsync_time;
- struct work_struct vsync_work;
} vsync_ctrl_db[MAX_CONTROLLER];
@@ -152,7 +152,7 @@
static void mdp4_lcdc_wait4dmap(int cndx);
static void mdp4_lcdc_wait4ov(int cndx);
-int mdp4_lcdc_pipe_commit(void)
+int mdp4_lcdc_pipe_commit(int cndx, int wait)
{
int i, undx;
@@ -164,7 +164,7 @@
unsigned long flags;
int cnt = 0;
- vctrl = &vsync_ctrl_db[0];
+ vctrl = &vsync_ctrl_db[cndx];
mutex_lock(&vctrl->update_lock);
undx = vctrl->update_ndx;
@@ -257,6 +257,13 @@
mdp4_stat.overlay_commit[pipe->mixer_num]++;
+ if (wait) {
+ if (pipe->ov_blt_addr)
+ mdp4_lcdc_wait4ov(cndx);
+ else
+ mdp4_lcdc_wait4dmap(cndx);
+ }
+
return cnt;
}
@@ -267,11 +274,6 @@
vctrl = &vsync_ctrl_db[cndx];
- if (vctrl->fake_vsync) {
- vctrl->fake_vsync = 0;
- schedule_work(&vctrl->vsync_work);
- }
-
if (vctrl->vsync_irq_enabled == enable)
return;
@@ -283,6 +285,9 @@
vsync_irq_enable(INTR_PRIMARY_VSYNC, MDP_PRIM_VSYNC_TERM);
else
vsync_irq_disable(INTR_PRIMARY_VSYNC, MDP_PRIM_VSYNC_TERM);
+
+ if (vctrl->vsync_irq_enabled && atomic_read(&vctrl->suspend) == 0)
+ atomic_set(&vctrl->vsync_resume, 1);
}
void mdp4_lcdc_wait4vsync(int cndx, long long *vtime)
@@ -354,18 +359,32 @@
wait_for_completion(&vctrl->ov_comp);
}
-static void send_vsync_work(struct work_struct *work)
+static ssize_t vsync_show_event(struct device *dev,
+ struct device_attribute *attr, char *buf)
{
- struct vsycn_ctrl *vctrl =
- container_of(work, typeof(*vctrl), vsync_work);
- char buf[64];
- char *envp[2];
+ int cndx;
+ struct vsycn_ctrl *vctrl;
+ ssize_t ret = 0;
+ unsigned long flags;
- snprintf(buf, sizeof(buf), "VSYNC=%llu",
- ktime_to_ns(vctrl->vsync_time));
- envp[0] = buf;
- envp[1] = NULL;
- kobject_uevent_env(&vctrl->dev->kobj, KOBJ_CHANGE, envp);
+ cndx = 0;
+ vctrl = &vsync_ctrl_db[0];
+
+ if (atomic_read(&vctrl->suspend) > 0 ||
+ atomic_read(&vctrl->vsync_resume) == 0)
+ return 0;
+
+ spin_lock_irqsave(&vctrl->spin_lock, flags);
+ if (vctrl->wait_vsync_cnt == 0)
+ INIT_COMPLETION(vctrl->vsync_comp);
+ vctrl->wait_vsync_cnt++;
+ spin_unlock_irqrestore(&vctrl->spin_lock, flags);
+ wait_for_completion(&vctrl->vsync_comp);
+
+ ret = snprintf(buf, PAGE_SIZE, "VSYNC=%llu",
+ ktime_to_ns(vctrl->vsync_time));
+ buf[strlen(buf) + 1] = '\0';
+ return ret;
}
void mdp4_lcdc_vsync_init(int cndx)
@@ -390,8 +409,8 @@
init_completion(&vctrl->dmap_comp);
init_completion(&vctrl->ov_comp);
atomic_set(&vctrl->suspend, 0);
+ atomic_set(&vctrl->vsync_resume, 1);
spin_lock_init(&vctrl->spin_lock);
- INIT_WORK(&vctrl->vsync_work, send_vsync_work);
}
void mdp4_lcdc_base_swap(int cndx, struct mdp4_overlay_pipe *pipe)
@@ -407,6 +426,15 @@
vctrl->base_pipe = pipe;
}
+static DEVICE_ATTR(vsync_event, S_IRUGO, vsync_show_event, NULL);
+static struct attribute *vsync_fs_attrs[] = {
+ &dev_attr_vsync_event.attr,
+ NULL,
+};
+static struct attribute_group vsync_fs_attr_group = {
+ .attrs = vsync_fs_attrs,
+};
+
int mdp4_lcdc_on(struct platform_device *pdev)
{
int lcdc_width;
@@ -461,7 +489,6 @@
vctrl->mfd = mfd;
vctrl->dev = mfd->fbi->dev;
- vctrl->fake_vsync = 1;
/* mdp clock on */
mdp_clk_ctrl(1);
@@ -621,6 +648,21 @@
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
mdp_histogram_ctrl_all(TRUE);
+
+ if (!vctrl->sysfs_created) {
+ ret = sysfs_create_group(&vctrl->dev->kobj,
+ &vsync_fs_attr_group);
+ if (ret) {
+ pr_err("%s: sysfs group creation failed, ret=%d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ kobject_uevent(&vctrl->dev->kobj, KOBJ_ADD);
+ pr_debug("%s: kobject_uevent(KOBJ_ADD)\n", __func__);
+ vctrl->sysfs_created = 1;
+ }
+
return ret;
}
@@ -631,17 +673,21 @@
struct msm_fb_data_type *mfd;
struct vsycn_ctrl *vctrl;
struct mdp4_overlay_pipe *pipe;
+ struct vsync_update *vp;
unsigned long flags;
- int need_wait = 0;
+ int undx, need_wait = 0;
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
vctrl = &vsync_ctrl_db[cndx];
pipe = vctrl->base_pipe;
atomic_set(&vctrl->suspend, 1);
+ atomic_set(&vctrl->vsync_resume, 0);
msleep(20); /* >= 17 ms */
+ complete_all(&vctrl->vsync_comp);
+
if (pipe->ov_blt_addr) {
spin_lock_irqsave(&vctrl->spin_lock, flags);
if (vctrl->ov_koff != vctrl->ov_done)
@@ -657,6 +703,21 @@
lcdc_enabled = 0;
+ if (vctrl->vsync_irq_enabled) {
+ vctrl->vsync_irq_enabled = 0;
+ vsync_irq_disable(INTR_PRIMARY_VSYNC, MDP_PRIM_VSYNC_TERM);
+ }
+
+ undx = vctrl->update_ndx;
+ vp = &vctrl->vlist[undx];
+ if (vp->update_cnt) {
+ /*
+ * pipe's iommu will be freed at next overlay play
+ * and iommu_drop statistic will be increased by one
+ */
+ vp->update_cnt = 0; /* empty queue */
+ }
+
if (pipe) {
/* sanity check, free pipes besides base layer */
mdp4_overlay_unset_mixer(pipe->mixer_num);
@@ -664,6 +725,11 @@
/* adb stop */
if (pipe->pipe_type == OVERLAY_TYPE_BF)
mdp4_overlay_borderfill_stage_down(pipe);
+
+ /* base pipe may change after borderfill_stage_down */
+ pipe = vctrl->base_pipe;
+ mdp4_mixer_stage_down(pipe, 1);
+ mdp4_overlay_pipe_free(pipe);
vctrl->base_pipe = NULL;
} else {
/* system suspending */
@@ -673,8 +739,6 @@
}
}
- vctrl->fake_vsync = 1;
-
/* MDP clock disable */
mdp_clk_ctrl(0);
mdp_pipe_ctrl(MDP_OVERLAY0_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
@@ -741,7 +805,6 @@
vctrl = &vsync_ctrl_db[cndx];
pr_debug("%s: cpu=%d\n", __func__, smp_processor_id());
vctrl->vsync_time = ktime_get();
- schedule_work(&vctrl->vsync_work);
spin_lock(&vctrl->spin_lock);
if (vctrl->wait_vsync_cnt) {
@@ -766,6 +829,8 @@
}
vctrl = &vsync_ctrl_db[cndx];
pipe = vctrl->base_pipe;
+ if (pipe == NULL)
+ return;
spin_lock(&vctrl->spin_lock);
vsync_irq_disable(INTR_DMA_P_DONE, MDP_DMAP_TERM);
@@ -804,6 +869,8 @@
vctrl = &vsync_ctrl_db[cndx];
pipe = vctrl->base_pipe;
+ if (pipe == NULL)
+ return;
spin_lock(&vctrl->spin_lock);
vsync_irq_disable(INTR_OVERLAY0_DONE, MDP_OVERLAY0_TERM);
@@ -912,17 +979,18 @@
mdp4_lcdc_pipe_queue(0, pipe);
}
+ mdp_update_pm(mfd, vsync_ctrl_db[0].vsync_time);
mdp4_overlay_mdp_perf_upd(mfd, 1);
mutex_lock(&mfd->dma->ov_mutex);
- mdp4_lcdc_pipe_commit();
+ mdp4_lcdc_pipe_commit(cndx, 0);
mutex_unlock(&mfd->dma->ov_mutex);
if (pipe->ov_blt_addr)
- mdp4_lcdc_wait4ov(0);
+ mdp4_lcdc_wait4ov(cndx);
else
- mdp4_lcdc_wait4dmap(0);
+ mdp4_lcdc_wait4dmap(cndx);
mdp4_overlay_mdp_perf_upd(mfd, 0);
}
diff --git a/drivers/video/msm/mdp4_overlay_writeback.c b/drivers/video/msm/mdp4_overlay_writeback.c
index 487e5d5..ee7e9ce 100644
--- a/drivers/video/msm/mdp4_overlay_writeback.c
+++ b/drivers/video/msm/mdp4_overlay_writeback.c
@@ -294,6 +294,7 @@
mdp4_mixer_stage_commit(pipe->mixer_num);
mdp4_writeback_overlay_kickoff(mfd, pipe);
+ mdp4_writeback_dma_busy_wait(mfd);
/* move current committed iommu to freelist */
mdp4_overlay_iommu_pipe_free(pipe->pipe_ndx, 0);
diff --git a/drivers/video/msm/mdp4_util.c b/drivers/video/msm/mdp4_util.c
index 359f37e..87921e6 100644
--- a/drivers/video/msm/mdp4_util.c
+++ b/drivers/video/msm/mdp4_util.c
@@ -110,21 +110,22 @@
.csc_data = {
(0),
{
- 0x0200, 0x0000, 0x0000,
- 0x0000, 0x0200, 0x0000,
- 0x0000, 0x0000, 0x0200,
+ 0x0083, 0x0102, 0x0032,
+ 0x1fb5, 0x1f6c, 0x00e1,
+ 0x00e1, 0x1f45, 0x1fdc,
},
{
0x0, 0x0, 0x0,
},
{
- 0, 0, 0,
+ 0x0010, 0x0080, 0x0080,
},
{
0, 0xff, 0, 0xff, 0, 0xff,
},
{
- 0, 0xff, 0, 0xff, 0, 0xff,
+ 0x0010, 0x00eb, 0x0010,
+ 0x00f0, 0x0010, 0x00f0,
},
},
},
@@ -133,21 +134,22 @@
.csc_data = {
(0),
{
- 0x0200, 0x0000, 0x0000,
- 0x0000, 0x0200, 0x0000,
- 0x0000, 0x0000, 0x0200,
+ 0x0083, 0x0102, 0x0032,
+ 0x1fb5, 0x1f6c, 0x00e1,
+ 0x00e1, 0x1f45, 0x1fdc,
},
{
0x0, 0x0, 0x0,
},
{
- 0, 0, 0,
+ 0x0010, 0x0080, 0x0080,
},
{
0, 0xff, 0, 0xff, 0, 0xff,
},
{
- 0, 0xff, 0, 0xff, 0, 0xff,
+ 0x0010, 0x00eb, 0x0010,
+ 0x00f0, 0x0010, 0x00f0,
},
},
},
@@ -176,7 +178,6 @@
},
};
-
unsigned is_mdp4_hw_reset(void)
{
unsigned hw_reset = 0;
@@ -500,7 +501,6 @@
uint32 isr, mask, panel;
struct mdp_dma_data *dma;
struct mdp_hist_mgmt *mgmt = NULL;
- char *base_addr;
int i, ret;
mdp_is_in_isr = TRUE;
@@ -528,12 +528,7 @@
mgmt = mdp_hist_mgmt_array[i];
if (!mgmt)
continue;
- base_addr = MDP_BASE + mgmt->base;
- MDP_OUTP(base_addr + 0x010, 1);
- outpdw(base_addr + 0x01c, INTR_HIST_DONE |
- INTR_HIST_RESET_SEQ_DONE);
mgmt->mdp_is_hist_valid = FALSE;
- __mdp_histogram_reset(mgmt);
}
}
@@ -2144,7 +2139,7 @@
base = 0x1A000;
break;
case MDP_BLOCK_OVERLAY_2:
- base = (mdp_rev >= MDP_REV_44) ? 0x8A000 : 0x0;
+ base = (mdp_rev >= MDP_REV_43) ? 0x8A000 : 0x0;
break;
case MDP_BLOCK_VG_1:
base = 0x24000;
@@ -2315,7 +2310,7 @@
pr_info("%s:%d ion based allocation mfd->mem_hid 0x%x\n",
__func__, __LINE__, mfd->mem_hid);
buf->ihdl = ion_alloc(mfd->iclient, buffer_size, SZ_4K,
- mfd->mem_hid);
+ mfd->mem_hid, 0);
if (!IS_ERR_OR_NULL(buf->ihdl)) {
if (mdp_iommu_split_domain) {
if (ion_map_iommu(mfd->iclient, buf->ihdl,
@@ -2664,7 +2659,7 @@
break;
case MDP_BLOCK_OVERLAY_2:
- valid = (mdp_rev >= MDP_REV_44) ? 1 : 0;
+ valid = (mdp_rev >= MDP_REV_43) ? 1 : 0;
break;
default:
diff --git a/drivers/video/msm/mdp_dma.c b/drivers/video/msm/mdp_dma.c
index 4b76e72..4d4b05f 100644
--- a/drivers/video/msm/mdp_dma.c
+++ b/drivers/video/msm/mdp_dma.c
@@ -482,10 +482,22 @@
#endif
{
unsigned long flag;
+ static int first_vsync;
+ int need_wait = 0;
down(&mfd->dma->mutex);
- if ((mfd) && (!mfd->dma->busy) && (mfd->panel_power_on)) {
+ if ((mfd) && (mfd->panel_power_on)) {
down(&mfd->sem);
+ spin_lock_irqsave(&mdp_spin_lock, flag);
+ if (mfd->dma->busy == TRUE)
+ need_wait++;
+ spin_unlock_irqrestore(&mdp_spin_lock, flag);
+
+ if (need_wait)
+ wait_for_completion_killable(&mfd->dma->comp);
+
+ /* schedule DMA to start */
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
mfd->ibuf_flushed = TRUE;
mdp_dma2_update_lcd(mfd);
@@ -493,15 +505,31 @@
mdp_enable_irq(MDP_DMA2_TERM);
mfd->dma->busy = TRUE;
INIT_COMPLETION(mfd->dma->comp);
-
+ INIT_COMPLETION(vsync_cntrl.vsync_comp);
+ if (!vsync_cntrl.vsync_irq_enabled &&
+ vsync_cntrl.disabled_clocks) {
+ MDP_OUTP(MDP_BASE + 0x021c, 0x10); /* read pointer */
+ outp32(MDP_INTR_CLEAR, MDP_PRIM_RDPTR);
+ mdp_intr_mask |= MDP_PRIM_RDPTR;
+ outp32(MDP_INTR_ENABLE, mdp_intr_mask);
+ mdp_enable_irq(MDP_VSYNC_TERM);
+ vsync_cntrl.vsync_dma_enabled = 1;
+ }
spin_unlock_irqrestore(&mdp_spin_lock, flag);
/* schedule DMA to start */
mdp_dma_schedule(mfd, MDP_DMA2_TERM);
up(&mfd->sem);
- /* wait until DMA finishes the current job */
- wait_for_completion_killable(&mfd->dma->comp);
- mdp_disable_irq(MDP_DMA2_TERM);
+ /* wait until Vsync finishes the current job */
+ if (first_vsync) {
+ if (!wait_for_completion_killable_timeout
+ (&vsync_cntrl.vsync_comp, HZ/10))
+ pr_err("Timedout DMA %s %d", __func__,
+ __LINE__);
+ } else {
+ first_vsync = 1;
+ }
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
/* signal if pan function is waiting for the update completion */
if (mfd->pan_waiting) {
@@ -515,28 +543,37 @@
void mdp_dma_vsync_ctrl(int enable)
{
unsigned long flag;
+ int disabled_clocks;
if (vsync_cntrl.vsync_irq_enabled == enable)
return;
spin_lock_irqsave(&mdp_spin_lock, flag);
if (!enable)
INIT_COMPLETION(vsync_cntrl.vsync_wait);
+
vsync_cntrl.vsync_irq_enabled = enable;
+ disabled_clocks = vsync_cntrl.disabled_clocks;
spin_unlock_irqrestore(&mdp_spin_lock, flag);
- if (enable) {
+ if (enable && disabled_clocks)
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+
+ spin_lock_irqsave(&mdp_spin_lock, flag);
+ if (enable && vsync_cntrl.disabled_clocks &&
+ !vsync_cntrl.vsync_dma_enabled) {
MDP_OUTP(MDP_BASE + 0x021c, 0x10); /* read pointer */
- spin_lock_irqsave(&mdp_spin_lock, flag);
outp32(MDP_INTR_CLEAR, MDP_PRIM_RDPTR);
mdp_intr_mask |= MDP_PRIM_RDPTR;
outp32(MDP_INTR_ENABLE, mdp_intr_mask);
mdp_enable_irq(MDP_VSYNC_TERM);
- spin_unlock_irqrestore(&mdp_spin_lock, flag);
- } else {
- wait_for_completion(&vsync_cntrl.vsync_wait);
- mdp_disable_irq(MDP_VSYNC_TERM);
+ vsync_cntrl.disabled_clocks = 0;
+ } else if (enable && vsync_cntrl.disabled_clocks) {
+ vsync_cntrl.disabled_clocks = 0;
}
+ spin_unlock_irqrestore(&mdp_spin_lock, flag);
+ if (vsync_cntrl.vsync_irq_enabled &&
+ atomic_read(&vsync_cntrl.suspend) == 0)
+ atomic_set(&vsync_cntrl.vsync_resume, 1);
}
void mdp_lcd_update_workqueue_handler(struct work_struct *work)
diff --git a/drivers/video/msm/mdp_dma_dsi_video.c b/drivers/video/msm/mdp_dma_dsi_video.c
index a1f2b65..e2fb8ba 100644
--- a/drivers/video/msm/mdp_dma_dsi_video.c
+++ b/drivers/video/msm/mdp_dma_dsi_video.c
@@ -34,6 +34,33 @@
static int first_pixel_start_x;
static int first_pixel_start_y;
+static ssize_t vsync_show_event(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ ssize_t ret = 0;
+
+ INIT_COMPLETION(vsync_cntrl.vsync_wait);
+
+ if (atomic_read(&vsync_cntrl.suspend) > 0 ||
+ atomic_read(&vsync_cntrl.vsync_resume) == 0)
+ return 0;
+
+ wait_for_completion(&vsync_cntrl.vsync_wait);
+ ret = snprintf(buf, PAGE_SIZE, "VSYNC=%llu",
+ ktime_to_ns(vsync_cntrl.vsync_time));
+ buf[strlen(buf) + 1] = '\0';
+ return ret;
+}
+
+static DEVICE_ATTR(vsync_event, S_IRUGO, vsync_show_event, NULL);
+static struct attribute *vsync_fs_attrs[] = {
+ &dev_attr_vsync_event.attr,
+ NULL,
+};
+static struct attribute_group vsync_fs_attr_group = {
+ .attrs = vsync_fs_attrs,
+};
+
int mdp_dsi_video_on(struct platform_device *pdev)
{
int dsi_width;
@@ -88,6 +115,7 @@
var = &fbi->var;
vsync_cntrl.dev = mfd->fbi->dev;
+ atomic_set(&vsync_cntrl.suspend, 0);
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
@@ -226,6 +254,20 @@
/* MDP cmd block disable */
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+ if (!vsync_cntrl.sysfs_created) {
+ ret = sysfs_create_group(&vsync_cntrl.dev->kobj,
+ &vsync_fs_attr_group);
+ if (ret) {
+ pr_err("%s: sysfs creation failed, ret=%d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ kobject_uevent(&vsync_cntrl.dev->kobj, KOBJ_ADD);
+ pr_debug("%s: kobject_uevent(KOBJ_ADD)\n", __func__);
+ vsync_cntrl.sysfs_created = 1;
+ }
+
return ret;
}
@@ -241,6 +283,10 @@
mdp_pipe_ctrl(MDP_DMA2_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
ret = panel_next_off(pdev);
+
+ atomic_set(&vsync_cntrl.suspend, 1);
+ atomic_set(&vsync_cntrl.vsync_resume, 0);
+ complete_all(&vsync_cntrl.vsync_wait);
/* delay to make sure the last frame finishes */
msleep(20);
@@ -250,16 +296,21 @@
void mdp_dma_video_vsync_ctrl(int enable)
{
unsigned long flag;
+ int disabled_clocks;
if (vsync_cntrl.vsync_irq_enabled == enable)
return;
spin_lock_irqsave(&mdp_spin_lock, flag);
if (!enable)
INIT_COMPLETION(vsync_cntrl.vsync_wait);
+
vsync_cntrl.vsync_irq_enabled = enable;
+ if (!enable)
+ vsync_cntrl.disabled_clocks = 0;
+ disabled_clocks = vsync_cntrl.disabled_clocks;
spin_unlock_irqrestore(&mdp_spin_lock, flag);
- if (enable) {
+ if (enable && disabled_clocks) {
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
spin_lock_irqsave(&mdp_spin_lock, flag);
outp32(MDP_INTR_CLEAR, LCDC_FRAME_START);
@@ -267,10 +318,10 @@
outp32(MDP_INTR_ENABLE, mdp_intr_mask);
mdp_enable_irq(MDP_VSYNC_TERM);
spin_unlock_irqrestore(&mdp_spin_lock, flag);
- } else {
- wait_for_completion(&vsync_cntrl.vsync_wait);
- mdp_disable_irq(MDP_VSYNC_TERM);
}
+ if (vsync_cntrl.vsync_irq_enabled &&
+ atomic_read(&vsync_cntrl.suspend) == 0)
+ atomic_set(&vsync_cntrl.vsync_resume, 1);
}
void mdp_dsi_video_update(struct msm_fb_data_type *mfd)
diff --git a/drivers/video/msm/mdp_dma_lcdc.c b/drivers/video/msm/mdp_dma_lcdc.c
index 10d60ab..fbfe35f 100644
--- a/drivers/video/msm/mdp_dma_lcdc.c
+++ b/drivers/video/msm/mdp_dma_lcdc.c
@@ -51,6 +51,33 @@
int first_pixel_start_x;
int first_pixel_start_y;
+static ssize_t vsync_show_event(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ ssize_t ret = 0;
+
+ if (atomic_read(&vsync_cntrl.suspend) > 0 ||
+ atomic_read(&vsync_cntrl.vsync_resume) == 0)
+ return 0;
+
+ INIT_COMPLETION(vsync_cntrl.vsync_wait);
+
+ wait_for_completion(&vsync_cntrl.vsync_wait);
+ ret = snprintf(buf, PAGE_SIZE, "VSYNC=%llu",
+ ktime_to_ns(vsync_cntrl.vsync_time));
+ buf[strlen(buf) + 1] = '\0';
+ return ret;
+}
+
+static DEVICE_ATTR(vsync_event, S_IRUGO, vsync_show_event, NULL);
+static struct attribute *vsync_fs_attrs[] = {
+ &dev_attr_vsync_event.attr,
+ NULL,
+};
+static struct attribute_group vsync_fs_attr_group = {
+ .attrs = vsync_fs_attrs,
+};
+
int mdp_lcdc_on(struct platform_device *pdev)
{
int lcdc_width;
@@ -106,6 +133,7 @@
fbi = mfd->fbi;
var = &fbi->var;
vsync_cntrl.dev = mfd->fbi->dev;
+ atomic_set(&vsync_cntrl.suspend, 0);
/* MDP cmd block enable */
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
@@ -292,6 +320,20 @@
/* MDP cmd block disable */
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+ if (!vsync_cntrl.sysfs_created) {
+ ret = sysfs_create_group(&vsync_cntrl.dev->kobj,
+ &vsync_fs_attr_group);
+ if (ret) {
+ pr_err("%s: sysfs creation failed, ret=%d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ kobject_uevent(&vsync_cntrl.dev->kobj, KOBJ_ADD);
+ pr_debug("%s: kobject_uevent(KOBJ_ADD)\n", __func__);
+ vsync_cntrl.sysfs_created = 1;
+ }
+
return ret;
}
@@ -321,6 +363,9 @@
ret = panel_next_off(pdev);
up(&mfd->dma->mutex);
+ atomic_set(&vsync_cntrl.suspend, 1);
+ atomic_set(&vsync_cntrl.vsync_resume, 0);
+ complete_all(&vsync_cntrl.vsync_wait);
/* delay to make sure the last frame finishes */
msleep(16);
@@ -331,16 +376,21 @@
void mdp_dma_lcdc_vsync_ctrl(int enable)
{
unsigned long flag;
+ int disabled_clocks;
if (vsync_cntrl.vsync_irq_enabled == enable)
return;
spin_lock_irqsave(&mdp_spin_lock, flag);
if (!enable)
INIT_COMPLETION(vsync_cntrl.vsync_wait);
+
vsync_cntrl.vsync_irq_enabled = enable;
+ if (!enable)
+ vsync_cntrl.disabled_clocks = 0;
+ disabled_clocks = vsync_cntrl.disabled_clocks;
spin_unlock_irqrestore(&mdp_spin_lock, flag);
- if (enable) {
+ if (enable && disabled_clocks) {
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
spin_lock_irqsave(&mdp_spin_lock, flag);
outp32(MDP_INTR_CLEAR, LCDC_FRAME_START);
@@ -348,10 +398,11 @@
outp32(MDP_INTR_ENABLE, mdp_intr_mask);
mdp_enable_irq(MDP_VSYNC_TERM);
spin_unlock_irqrestore(&mdp_spin_lock, flag);
- } else {
- wait_for_completion(&vsync_cntrl.vsync_wait);
- mdp_disable_irq(MDP_VSYNC_TERM);
}
+
+ if (vsync_cntrl.vsync_irq_enabled &&
+ atomic_read(&vsync_cntrl.suspend) == 0)
+ atomic_set(&vsync_cntrl.vsync_resume, 1);
}
void mdp_lcdc_update(struct msm_fb_data_type *mfd)
diff --git a/drivers/video/msm/mdss/mdss.h b/drivers/video/msm/mdss/mdss.h
index 6f42565..3c60c2b 100644
--- a/drivers/video/msm/mdss/mdss.h
+++ b/drivers/video/msm/mdss/mdss.h
@@ -15,6 +15,7 @@
#define MDSS_H
#include <linux/msm_ion.h>
+#include <linux/earlysuspend.h>
#include <linux/msm_mdp.h>
#include <linux/spinlock.h>
#include <linux/types.h>
@@ -23,8 +24,6 @@
#define MDSS_REG_WRITE(addr, val) writel_relaxed(val, mdss_res->mdp_base + addr)
#define MDSS_REG_READ(addr) readl_relaxed(mdss_res->mdp_base + addr)
-extern spinlock_t dsi_clk_lock;
-
enum mdss_mdp_clk_type {
MDSS_CLK_AHB,
MDSS_CLK_AXI,
@@ -53,6 +52,7 @@
u32 irq_buzy;
u32 mdp_irq_mask;
+ u32 mdp_hist_irq_mask;
u32 suspend;
u32 timeout;
@@ -74,6 +74,8 @@
struct ion_client *iclient;
int iommu_domain;
int iommu_attached;
+
+ struct early_suspend early_suspend;
};
extern struct mdss_data_type *mdss_res;
diff --git a/drivers/video/msm/mdss/mdss_dsi.c b/drivers/video/msm/mdss/mdss_dsi.c
index e685785..8f4f4d5 100644
--- a/drivers/video/msm/mdss/mdss_dsi.c
+++ b/drivers/video/msm/mdss/mdss_dsi.c
@@ -100,17 +100,21 @@
return ret;
}
- ret = regulator_enable(dsi_drv.vdd_vreg);
- if (ret) {
- pr_err("%s: Failed to enable regulator.\n", __func__);
- return ret;
- }
-
ret = regulator_enable(dsi_drv.vdd_io_vreg);
if (ret) {
pr_err("%s: Failed to enable regulator.\n", __func__);
return ret;
}
+ msleep(20);
+ wmb();
+
+ ret = regulator_enable(dsi_drv.vdd_vreg);
+ if (ret) {
+ pr_err("%s: Failed to enable regulator.\n", __func__);
+ return ret;
+ }
+ msleep(20);
+ wmb();
ret = regulator_enable(dsi_drv.dsi_vreg);
if (ret) {
@@ -130,13 +134,13 @@
return ret;
}
- ret = regulator_disable(dsi_drv.vdd_io_vreg);
+ ret = regulator_disable(dsi_drv.dsi_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n", __func__);
return ret;
}
- ret = regulator_disable(dsi_drv.dsi_vreg);
+ ret = regulator_disable(dsi_drv.vdd_io_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n", __func__);
return ret;
@@ -165,11 +169,11 @@
return 0;
}
-static int mdss_dsi_off(struct mdss_panel_data *pdata)
+static int mdss_dsi_ctrl_unprepare(struct mdss_panel_data *pdata)
{
- int ret = 0;
struct mdss_panel_info *pinfo;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
+ int ret = 0;
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
@@ -180,9 +184,6 @@
pinfo = &pdata->panel_info;
- if (pdata->panel_info.type == MIPI_VIDEO_PANEL)
- mdss_dsi_controller_cfg(0, pdata);
-
mdss_dsi_op_mode_config(DSI_CMD_MODE, pdata);
ret = ctrl_pdata->off(pdata);
@@ -191,16 +192,19 @@
return ret;
}
- spin_lock_bh(&dsi_clk_lock);
+ return ret;
+}
+
+static int mdss_dsi_off(struct mdss_panel_data *pdata)
+{
+ int ret = 0;
+
mdss_dsi_clk_disable(pdata);
-
- /* disable dsi engine */
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0004, 0);
-
- spin_unlock_bh(&dsi_clk_lock);
-
mdss_dsi_unprepare_clocks();
+ /* disable DSI controller */
+ mdss_dsi_controller_cfg(0, pdata);
+
ret = mdss_dsi_panel_power_on(0);
if (ret) {
pr_err("%s: Panel power off failed\n", __func__);
@@ -232,19 +236,17 @@
pinfo = &pdata->panel_info;
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x118, 1);
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x118, 0);
+ ret = mdss_dsi_panel_power_on(1);
+ if (ret) {
+ pr_err("%s: Panel power on failed\n", __func__);
+ return ret;
+ }
mdss_dsi_phy_sw_reset((ctrl_pdata->ctrl_base));
- mdss_dsi_phy_enable((ctrl_pdata->ctrl_base), 1);
mdss_dsi_phy_init(pdata);
mdss_dsi_prepare_clocks();
-
- spin_lock_bh(&dsi_clk_lock);
-
mdss_dsi_clk_enable(pdata);
- spin_unlock_bh(&dsi_clk_lock);
clk_rate = pdata->panel_info.clk_rate;
clk_rate = min(clk_rate, pdata->panel_info.clk_max);
@@ -301,6 +303,7 @@
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x5C, data);
}
+ mdss_dsi_sw_reset(pdata);
mdss_dsi_host_init(mipi, pdata);
if (mipi->force_clk_lane_hs) {
@@ -312,12 +315,6 @@
wmb();
}
- ret = mdss_dsi_panel_power_on(1);
- if (ret) {
- pr_err("%s: Panel power on failed\n", __func__);
- return ret;
- }
-
ret = ctrl_pdata->on(pdata);
if (ret) {
pr_err("%s: unable to initialize the panel\n", __func__);
@@ -481,6 +478,7 @@
(ctrl_pdata->panel_data).on = mdss_dsi_on;
(ctrl_pdata->panel_data).off = mdss_dsi_off;
+ (ctrl_pdata->panel_data).intf_unprepare = mdss_dsi_ctrl_unprepare;
memcpy(&((ctrl_pdata->panel_data).panel_info),
&(panel_data->panel_info),
sizeof(struct mdss_panel_info));
diff --git a/drivers/video/msm/mdss/mdss_dsi_host.c b/drivers/video/msm/mdss/mdss_dsi_host.c
index e47891e..125644e 100644
--- a/drivers/video/msm/mdss/mdss_dsi_host.c
+++ b/drivers/video/msm/mdss/mdss_dsi_host.c
@@ -32,8 +32,6 @@
static spinlock_t dsi_mdp_lock;
static int dsi_mdp_busy;
-spinlock_t dsi_clk_lock;
-
struct mdss_hw mdss_dsi_hw = {
.hw_ndx = MDSS_HW_DSI0,
.ptr = NULL,
@@ -45,7 +43,6 @@
init_completion(&dsi_dma_comp);
spin_lock_init(&dsi_irq_lock);
spin_lock_init(&dsi_mdp_lock);
- spin_lock_init(&dsi_clk_lock);
}
void mdss_dsi_irq_handler_config(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
@@ -816,6 +813,7 @@
void mdss_dsi_sw_reset(struct mdss_panel_data *pdata)
{
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
+ u32 dsi_ctrl;
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
@@ -824,6 +822,16 @@
return;
}
+ dsi_ctrl = MIPI_INP((ctrl_pdata->ctrl_base) + 0x0004);
+ dsi_ctrl &= ~0x01;
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0004, dsi_ctrl);
+ wmb();
+
+ /* turn esc, byte, dsi, pclk, sclk, hclk on */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x11c,
+ 0x23f); /* DSI_CLK_CTRL */
+ wmb();
+
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x118, 0x01);
wmb();
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x118, 0x00);
@@ -861,6 +869,16 @@
sleep_us, timeout_us))
pr_info("%s: FIFO status=%x failed\n", __func__, status);
+ /* Check for VIDEO_MODE_ENGINE_BUSY */
+ if (readl_poll_timeout(((ctrl_pdata->ctrl_base) + 0x0008),
+ status,
+ ((status & 0x08) == 0),
+ sleep_us, timeout_us)) {
+ pr_debug("%s: DSI status=%x\n", __func__, status);
+ pr_debug("%s: Doing sw reset\n", __func__);
+ mdss_dsi_sw_reset(pdata);
+ }
+
dsi_ctrl = MIPI_INP((ctrl_pdata->ctrl_base) + 0x0004);
if (enable)
dsi_ctrl |= 0x01;
@@ -884,14 +902,21 @@
return;
}
-
dsi_ctrl = MIPI_INP((ctrl_pdata->ctrl_base) + 0x0004);
- dsi_ctrl &= ~0x07;
+ /*If Video enabled, Keep Video and Cmd mode ON */
+ if (dsi_ctrl & 0x02)
+ dsi_ctrl &= ~0x05;
+ else
+ dsi_ctrl &= ~0x07;
+
if (mode == DSI_VIDEO_MODE) {
dsi_ctrl |= 0x03;
intr_ctrl = DSI_INTR_CMD_DMA_DONE_MASK;
} else { /* command mode */
dsi_ctrl |= 0x05;
+ if (pdata->panel_info.type == MIPI_VIDEO_PANEL)
+ dsi_ctrl |= 0x02;
+
intr_ctrl = DSI_INTR_CMD_DMA_DONE_MASK | DSI_INTR_ERROR_MASK |
DSI_INTR_CMD_MDP_DONE_MASK;
}
@@ -1102,6 +1127,7 @@
mdss_dsi_buf_init(tp);
mdss_dsi_cmd_dma_add(tp, pkt_size_cmd);
mdss_dsi_cmd_dma_tx(tp, pdata);
+ pr_debug("%s: Max packet size sent\n", __func__);
}
mdss_dsi_buf_init(tp);
@@ -1161,6 +1187,7 @@
rp->len -= diff; /* align bytes */
break;
default:
+ pr_debug("%s: Unknown cmd received\n", __func__);
break;
}
@@ -1261,6 +1288,8 @@
for (i = 0; i < cnt; i++) {
data = (u32)MIPI_INP((ctrl_pdata->ctrl_base) + off);
*lp++ = ntohl(data); /* to network byte order */
+ pr_debug("%s: data = 0x%x and ntohl(data) = 0x%x\n",
+ __func__, data, ntohl(data));
off -= 4;
rp->len += sizeof(*lp);
}
diff --git a/drivers/video/msm/mdss/mdss_dsi_panel.c b/drivers/video/msm/mdss/mdss_dsi_panel.c
index 63ad5cc..fd52e1c 100644
--- a/drivers/video/msm/mdss/mdss_dsi_panel.c
+++ b/drivers/video/msm/mdss/mdss_dsi_panel.c
@@ -40,20 +40,6 @@
static int rst_gpio;
static int disp_en;
-struct qpnp_pin_cfg param = {
- .mode = QPNP_PIN_MODE_DIG_OUT,
- .output_type = QPNP_PIN_OUT_BUF_OPEN_DRAIN_NMOS,
- .invert = QPNP_PIN_INVERT_ENABLE,
- .pull = QPNP_PIN_MPP_PULL_UP_30KOHM,
- .vin_sel = QPNP_PIN_VIN3,
- .out_strength = QPNP_PIN_OUT_STRENGTH_HIGH,
- .select = QPNP_PIN_SEL_DTEST3,
- .master_en = QPNP_PIN_MASTER_ENABLE,
- .aout_ref = QPNP_PIN_AOUT_0V625,
- .ain_route = QPNP_PIN_AIN_AMUX_CH7,
- .cs_out = QPNP_PIN_CS_OUT_20MA,
-};
-
void mdss_dsi_panel_reset(int enable)
{
if (!disp_en)
@@ -64,13 +50,20 @@
pr_debug("%s:%d, reset line not configured\n",
__func__, __LINE__);
+ pr_debug("%s: enable = %d\n", __func__, enable);
+
if (enable) {
- gpio_set_value(disp_en, 1);
gpio_set_value(rst_gpio, 1);
- usleep(10);
+ msleep(20);
+ wmb();
gpio_set_value(rst_gpio, 0);
- usleep(200);
+ udelay(200);
+ wmb();
gpio_set_value(rst_gpio, 1);
+ msleep(20);
+ wmb();
+ gpio_set_value(disp_en, 1);
+ wmb();
} else {
gpio_set_value(rst_gpio, 0);
gpio_set_value(disp_en, 0);
@@ -113,8 +106,6 @@
pr_debug("%s:%d, debug info (mode) : %d\n", __func__, __LINE__,
mipi->mode);
- mdss_dsi_panel_reset(1);
-
if (mipi->mode == DSI_VIDEO_MODE) {
mdss_dsi_cmds_tx(pdata, &dsi_panel_tx_buf, dsi_panel_on_cmds,
num_of_on_cmds);
@@ -142,8 +133,6 @@
return -EINVAL;
}
- mdss_dsi_panel_reset(0);
-
return 0;
}
@@ -202,14 +191,6 @@
pr_err("%s:%d, reset gpio not specified\n",
__func__, __LINE__);
} else {
- rc = qpnp_pin_config(rst_gpio, ¶m);
- if (rc) {
- pr_err("request reset gpio failed, rc=%d\n",
- rc);
- gpio_free(disp_en);
- return rc;
- }
-
rc = gpio_request(rst_gpio, "disp_rst_n");
if (rc) {
pr_err("request reset gpio failed, rc=%d\n",
@@ -328,7 +309,7 @@
panel_data->panel_info.mipi.frame_rate = (!rc ? tmp : 60);
data = of_get_property(np, "qcom,panel-phy-regulatorSettings", &len);
- if ((!data) || (len != 8)) {
+ if ((!data) || (len != 7)) {
pr_err("%s:%d, Unable to read Phy regulator settings",
__func__, __LINE__);
goto error;
diff --git a/drivers/video/msm/mdss/mdss_fb.c b/drivers/video/msm/mdss/mdss_fb.c
index 5432df0..9f29887 100644
--- a/drivers/video/msm/mdss/mdss_fb.c
+++ b/drivers/video/msm/mdss/mdss_fb.c
@@ -42,6 +42,9 @@
#include <linux/vmalloc.h>
#include <mach/board.h>
+#include <mach/memory.h>
+#include <mach/msm_memtypes.h>
+#include <mach/iommu_domains.h>
#include "mdss_fb.h"
#include "mdss_mdp.h"
@@ -316,6 +319,9 @@
mfd->op_enable);
if (ret)
pr_warn("can't turn on display!\n");
+
+ if (mfd->vsync_pending)
+ mdss_mdp_overlay_vsync_ctrl(mfd, mfd->vsync_pending);
}
return ret;
@@ -326,7 +332,6 @@
struct fb_info *fbi;
int ret, i;
int result = 0;
- console_lock();
for (i = 0; i < fbi_list_index; i++) {
fbi = fbi_list[i];
fb_set_suspend(fbi, FBINFO_STATE_SUSPENDED);
@@ -337,7 +342,6 @@
result = ret;
}
}
- console_unlock();
return result;
}
@@ -347,7 +351,6 @@
int ret, i;
int result = 0;
- console_lock();
for (i = 0; i < fbi_list_index; i++) {
fbi = fbi_list[i];
@@ -355,7 +358,6 @@
if (ret == 0)
fb_set_suspend(fbi, FBINFO_STATE_RUNNING);
}
- console_unlock();
return result;
}
@@ -597,37 +599,17 @@
size *= mfd->fb_page;
if (mfd->index == 0) {
- struct ion_client *iclient = mdss_get_ionclient();
-
- if (iclient) {
- mfd->ihdl = ion_alloc(iclient, size, SZ_4K,
- ION_HEAP(ION_CP_MM_HEAP_ID) |
- ION_HEAP(ION_SF_HEAP_ID));
- if (IS_ERR_OR_NULL(mfd->ihdl)) {
- pr_err("unable to alloc fbmem from ion (%p)\n",
- mfd->ihdl);
- return -ENOMEM;
- }
-
- virt = ion_map_kernel(iclient, mfd->ihdl, 0);
- ion_phys(iclient, mfd->ihdl, &phys, &size);
-
- if (is_mdss_iommu_attached()) {
- ion_map_iommu(iclient, mfd->ihdl,
- mdss_get_iommu_domain(),
- 0, SZ_4K, 0, &mfd->iova,
- (unsigned long *) &size,
- 0, 0);
- }
- } else {
- virt = dma_alloc_coherent(NULL, size,
- (dma_addr_t *) &phys, GFP_KERNEL);
- if (!virt) {
- pr_err("unable to alloc fbmem size=%u\n", size);
- return -ENOMEM;
- }
+ virt = allocate_contiguous_memory(size, MEMTYPE_EBI1, SZ_1M, 0);
+ if (!virt) {
+ pr_err("unable to alloc fbmem size=%u\n", size);
+ return -ENOMEM;
}
-
+ phys = memory_pool_node_paddr(virt);
+ if (is_mdss_iommu_attached()) {
+ msm_iommu_map_contig_buffer(phys,
+ mdss_get_iommu_domain(), 0, size, SZ_4K, 0,
+ &(mfd->iova));
+ }
pr_info("allocating %u bytes at %p (%lx phys) for fb %d\n",
size, virt, phys, mfd->index);
} else {
@@ -947,7 +929,6 @@
struct fb_info *info)
{
struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
- u32 len;
if (var->rotate != FB_ROTATE_UR)
return -EINVAL;
@@ -1026,9 +1007,12 @@
if ((var->xres_virtual <= 0) || (var->yres_virtual <= 0))
return -EINVAL;
- len = var->xres_virtual * var->yres_virtual * (var->bits_per_pixel / 8);
- if (len > info->fix.smem_len)
- return -EINVAL;
+ if (info->fix.smem_start) {
+ u32 len = var->xres_virtual * var->yres_virtual *
+ (var->bits_per_pixel / 8);
+ if (len > info->fix.smem_len)
+ return -EINVAL;
+ }
if ((var->xres == 0) || (var->yres == 0))
return -EINVAL;
@@ -1137,11 +1121,79 @@
return 0;
}
+static int mdss_fb_handle_pp_ioctl(void __user *argp)
+{
+ int ret;
+ struct msmfb_mdp_pp mdp_pp;
+ u32 copyback = 0;
+
+ ret = copy_from_user(&mdp_pp, argp, sizeof(mdp_pp));
+ if (ret)
+ return ret;
+
+ switch (mdp_pp.op) {
+ case mdp_op_pa_cfg:
+ ret = mdss_mdp_pa_config(&mdp_pp.data.pa_cfg_data,
+ ©back);
+ break;
+
+ case mdp_op_pcc_cfg:
+ ret = mdss_mdp_pcc_config(&mdp_pp.data.pcc_cfg_data,
+ ©back);
+ break;
+
+ case mdp_op_lut_cfg:
+ switch (mdp_pp.data.lut_cfg_data.lut_type) {
+ case mdp_lut_igc:
+ ret = mdss_mdp_igc_lut_config(
+ (struct mdp_igc_lut_data *)
+ &mdp_pp.data.lut_cfg_data.data,
+ ©back);
+ break;
+
+ case mdp_lut_pgc:
+ ret = mdss_mdp_argc_config(
+ &mdp_pp.data.lut_cfg_data.data.pgc_lut_data,
+ ©back);
+ break;
+
+ case mdp_lut_hist:
+ ret = mdss_mdp_hist_lut_config(
+ (struct mdp_hist_lut_data *)
+ &mdp_pp.data.lut_cfg_data.data, ©back);
+ break;
+
+ default:
+ ret = -ENOTSUPP;
+ break;
+ }
+ break;
+ case mdp_op_dither_cfg:
+ ret = mdss_mdp_dither_config(&mdp_pp.data.dither_cfg_data,
+ ©back);
+ break;
+ case mdp_op_gamut_cfg:
+ ret = mdss_mdp_gamut_config(&mdp_pp.data.gamut_cfg_data,
+ ©back);
+ break;
+ default:
+ pr_err("Unsupported request to MDP_PP IOCTL.\n");
+ ret = -EINVAL;
+ break;
+ }
+ if ((ret == 0) && copyback)
+ ret = copy_to_user(argp, &mdp_pp, sizeof(struct msmfb_mdp_pp));
+ return ret;
+}
+
static int mdss_fb_ioctl(struct fb_info *info, unsigned int cmd,
unsigned long arg)
{
struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
void __user *argp = (void __user *)arg;
+ struct mdp_histogram_data hist;
+ struct mdp_histogram_start_req hist_req;
+ u32 block, hist_data_addr = 0;
struct mdp_page_protection fb_page_protection;
int ret = -ENOSYS;
@@ -1154,6 +1206,43 @@
ret = mdss_fb_set_lut(info, argp);
break;
+ case MSMFB_HISTOGRAM:
+ if (!mfd->panel_power_on)
+ return -EPERM;
+
+ ret = copy_from_user(&hist, argp, sizeof(hist));
+ if (ret)
+ return ret;
+
+ ret = mdss_mdp_hist_collect(info, &hist, &hist_data_addr);
+ if ((ret == 0) && hist_data_addr) {
+ ret = copy_to_user(hist.c0, (u32 *)hist_data_addr,
+ sizeof(u32) * hist.bin_cnt);
+ if (ret == 0)
+ ret = copy_to_user(argp, &hist,
+ sizeof(hist));
+ }
+ break;
+
+ case MSMFB_HISTOGRAM_START:
+ if (!mfd->panel_power_on)
+ return -EPERM;
+
+ ret = copy_from_user(&hist_req, argp, sizeof(hist_req));
+ if (ret)
+ return ret;
+
+ ret = mdss_mdp_histogram_start(&hist_req);
+ break;
+
+ case MSMFB_HISTOGRAM_STOP:
+ ret = copy_from_user(&block, argp, sizeof(int));
+ if (ret)
+ return ret;
+
+ ret = mdss_mdp_histogram_stop(block);
+ break;
+
case MSMFB_GET_PAGE_PROTECTION:
fb_page_protection.page_protection =
mfd->mdp_fb_page_protection;
@@ -1163,6 +1252,10 @@
return ret;
break;
+ case MSMFB_MDP_PP:
+ ret = mdss_fb_handle_pp_ioctl(argp);
+ break;
+
default:
if (mfd->ioctl_handler)
ret = mfd->ioctl_handler(mfd, cmd, argp);
diff --git a/drivers/video/msm/mdss/mdss_fb.h b/drivers/video/msm/mdss/mdss_fb.h
index a10e5e4..80ebc4f 100644
--- a/drivers/video/msm/mdss/mdss_fb.h
+++ b/drivers/video/msm/mdss/mdss_fb.h
@@ -56,6 +56,7 @@
int op_enable;
u32 fb_imgType;
u32 dst_format;
+ int vsync_pending;
int hw_refresh;
diff --git a/drivers/video/msm/mdss/mdss_hdmi_edid.c b/drivers/video/msm/mdss/mdss_hdmi_edid.c
index f720a2f..8db38d6 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_edid.c
+++ b/drivers/video/msm/mdss/mdss_hdmi_edid.c
@@ -358,34 +358,25 @@
DEV_DBG("EDID: reading block(%d) with block-size=%d\n",
block, block_size);
for (i = 0; i < 0x80; i += block_size) {
- /*Read EDID twice with 32bit alighnment too */
- if (block < 2) {
- memset(&ddc_data, 0, sizeof(ddc_data));
- ddc_data.dev_addr = 0xA0;
- ddc_data.offset = block*0x80 + i;
- ddc_data.data_buf = edid_buf+i;
- ddc_data.data_len = block_size;
- ddc_data.retry = 1;
- ddc_data.what = "EDID";
- ddc_data.no_align = false;
+ memset(&ddc_data, 0, sizeof(ddc_data));
+ ddc_data.dev_addr = 0xA0;
+ ddc_data.offset = block*0x80 + i;
+ ddc_data.data_buf = edid_buf+i;
+ ddc_data.data_len = block_size;
+ ddc_data.request_len = block_size;
+ ddc_data.retry = 1;
+ ddc_data.what = "EDID";
+ ddc_data.no_align = false;
+ /*Read EDID twice with 32bit alighnment too */
+ if (block < 2)
status = hdmi_ddc_read(
edid_ctrl->init_data.ddc_ctrl,
&ddc_data);
- } else {
- memset(&ddc_data, 0, sizeof(ddc_data));
- ddc_data.dev_addr = 0xA0;
- ddc_data.offset = block*0x80 + i;
- ddc_data.data_buf = edid_buf+i;
- ddc_data.data_len = block_size;
- ddc_data.request_len = block_size;
- ddc_data.retry = 1;
- ddc_data.what = "EDID";
-
+ else
status = hdmi_ddc_read_seg(
edid_ctrl->init_data.ddc_ctrl,
&ddc_data);
- }
if (status)
break;
}
@@ -413,7 +404,7 @@
}
print_len = 0x80;
- for (ndx = 0; ndx < print_len; ndx += 16)
+ for (ndx = 0; ndx < print_len; ndx += 4)
DEV_DBG("EDID[%02x-%02x] %02x %02x %02x %02x\n",
ndx, ndx+3,
b[ndx+0], b[ndx+1], b[ndx+2], b[ndx+3]);
@@ -1392,7 +1383,7 @@
{
struct hdmi_edid_ctrl *edid_ctrl = NULL;
- if (!init_data || !init_data->base ||
+ if (!init_data || !init_data->io ||
!init_data->mutex || !init_data->sysfs_kobj ||
!init_data->ddc_ctrl) {
DEV_ERR("%s: invalid input\n", __func__);
diff --git a/drivers/video/msm/mdss/mdss_hdmi_edid.h b/drivers/video/msm/mdss/mdss_hdmi_edid.h
index d10ae49..5c51e7e 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_edid.h
+++ b/drivers/video/msm/mdss/mdss_hdmi_edid.h
@@ -16,7 +16,7 @@
#include "mdss_hdmi_util.h"
struct hdmi_edid_init_data {
- void __iomem *base;
+ struct dss_io_data *io;
struct mutex *mutex;
struct kobject *sysfs_kobj;
diff --git a/drivers/video/msm/mdss/mdss_hdmi_tx.c b/drivers/video/msm/mdss/mdss_hdmi_tx.c
index 9278029..7f41221 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_tx.c
+++ b/drivers/video/msm/mdss/mdss_hdmi_tx.c
@@ -12,7 +12,6 @@
*/
#include <linux/bitops.h>
-#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/mutex.h>
@@ -20,7 +19,7 @@
#include <linux/of_gpio.h>
#include <linux/types.h>
-/* #define DEBUG */
+#define REG_DUMP 0
#include "mdss_fb.h"
#include "mdss_hdmi_tx.h"
@@ -91,19 +90,19 @@
0x07, 0x07, 0x07, 0x07, 0x02, 0x02, 0x02} /*12*/
};
-static const char *hdmi_tx_clk_name(u32 clk)
+const char *hdmi_tx_pm_name(enum hdmi_tx_power_module_type module)
{
- switch (clk) {
- case HDMI_TX_AHB_CLK: return "hdmi_ahb_clk";
- case HDMI_TX_APP_CLK: return "hdmi_app_clk";
- case HDMI_TX_EXTP_CLK: return "hdmi_extp_clk";
- default: return "???";
+ switch (module) {
+ case HDMI_TX_HPD_PM: return "HDMI_TX_HPD_PM";
+ case HDMI_TX_CORE_PM: return "HDMI_TX_CORE_PM";
+ case HDMI_TX_CEC_PM: return "HDMI_TX_CEC_PM";
+ default: return "???";
}
-} /* hdmi_tx_clk_name */
+} /* hdmi_tx_pm_name */
-static const char *hdmi_tx_io_name(u32 io)
+static const char *hdmi_tx_io_name(u32 type)
{
- switch (io) {
+ switch (type) {
case HDMI_TX_CORE_IO: return "core_physical";
case HDMI_TX_PHY_IO: return "phy_physical";
case HDMI_TX_QFPROM_IO: return "qfprom_physical";
@@ -190,75 +189,6 @@
return ret;
} /* hdmi_tx_sysfs_rda_connected */
-static ssize_t hdmi_tx_sysfs_rda_fake_hpd(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- ssize_t ret;
- struct hdmi_tx_ctrl *hdmi_ctrl =
- hdmi_tx_get_drvdata_from_sysfs_dev(dev);
-
- if (!hdmi_ctrl) {
- DEV_ERR("%s: invalid input\n", __func__);
- return -EINVAL;
- }
-
- mutex_lock(&hdmi_ctrl->mutex);
- ret = snprintf(buf, PAGE_SIZE, "%d\n", hdmi_ctrl->hpd_state);
- DEV_DBG("%s: '%d'\n", __func__, hdmi_ctrl->hpd_state);
- mutex_unlock(&hdmi_ctrl->mutex);
-
- return ret;
-} /* hdmi_tx_sysfs_rda_fake_hpd */
-
-static ssize_t hdmi_tx_sysfs_wta_fake_hpd(struct device *dev,
- struct device_attribute *attr, const char *buf, size_t count)
-{
- int fake_hpd, rc = 0;
- ssize_t ret = strnlen(buf, PAGE_SIZE);
- struct hdmi_tx_ctrl *hdmi_ctrl = NULL;
-
- DEV_DBG("%s:\n", __func__);
- hdmi_ctrl = hdmi_tx_get_drvdata_from_sysfs_dev(dev);
-
- if (!hdmi_ctrl) {
- DEV_ERR("%s: invalid input\n", __func__);
- return -EINVAL;
- }
-
- rc = kstrtoint(buf, 10, &fake_hpd);
- if (rc) {
- DEV_ERR("%s: kstrtoint failed. rc=%d\n", __func__, rc);
- return rc;
- }
-
- mutex_lock(&hdmi_ctrl->mutex);
- DEV_INFO("%s: fake_hpd=%d\n", __func__, fake_hpd);
- if (fake_hpd) {
- hdmi_ctrl->hpd_state = true;
-
- /* todo: Remove this once HPD line is available in HW */
- DEV_INFO("HDMI HPD: sense CONNECTED: send ONLINE\n");
- if (kobject_uevent(hdmi_ctrl->kobj, KOBJ_ONLINE))
- DEV_ERR("%s: failed sending online event\n", __func__);
- switch_set_state(&hdmi_ctrl->sdev, 1);
- DEV_INFO("%s: Hdmi state switch to %d\n", __func__,
- hdmi_ctrl->sdev.state);
- } else {
- hdmi_ctrl->hpd_state = false;
-
- /* todo: Remove this once HPD line is available in HW */
- DEV_INFO("HDMI HPD: sense CONNECTED: send ONLINE\n");
- if (kobject_uevent(hdmi_ctrl->kobj, KOBJ_OFFLINE))
- DEV_ERR("%s: failed sending online event\n", __func__);
- switch_set_state(&hdmi_ctrl->sdev, 0);
- DEV_INFO("%s: Hdmi state switch to %d\n", __func__,
- hdmi_ctrl->sdev.state);
- }
- mutex_unlock(&hdmi_ctrl->mutex);
-
- return ret;
-} /* hdmi_tx_sysfs_wta_fake_hpd */
-
static ssize_t hdmi_tx_sysfs_rda_hpd(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -298,16 +228,13 @@
return rc;
}
- /* todo: Remove this once HPD line is available in HW */
- if (0) {
- if (0 == hpd && hdmi_ctrl->hpd_feature_on) {
- rc = hdmi_tx_sysfs_enable_hpd(hdmi_ctrl, false);
- } else if (1 == hpd && !hdmi_ctrl->hpd_feature_on) {
- rc = hdmi_tx_sysfs_enable_hpd(hdmi_ctrl, true);
- } else {
- rc = -EPERM;
- ret = rc;
- }
+ if (0 == hpd && hdmi_ctrl->hpd_feature_on) {
+ rc = hdmi_tx_sysfs_enable_hpd(hdmi_ctrl, false);
+ } else if (1 == hpd && !hdmi_ctrl->hpd_feature_on) {
+ rc = hdmi_tx_sysfs_enable_hpd(hdmi_ctrl, true);
+ } else {
+ rc = -EPERM;
+ ret = rc;
}
if (!rc) {
@@ -325,13 +252,10 @@
static DEVICE_ATTR(connected, S_IRUGO, hdmi_tx_sysfs_rda_connected, NULL);
static DEVICE_ATTR(hpd, S_IRUGO | S_IWUSR, hdmi_tx_sysfs_rda_hpd,
hdmi_tx_sysfs_wta_hpd);
-static DEVICE_ATTR(fake_hpd, S_IRUGO | S_IWUSR, hdmi_tx_sysfs_rda_fake_hpd,
- hdmi_tx_sysfs_wta_fake_hpd);
static struct attribute *hdmi_tx_fs_attrs[] = {
&dev_attr_connected.attr,
&dev_attr_hpd.attr,
- &dev_attr_fake_hpd.attr,
NULL,
};
static struct attribute_group hdmi_tx_fs_attrs_group = {
@@ -385,7 +309,7 @@
return -EINVAL;
}
- edid_init_data.base = hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO].base;
+ edid_init_data.io = &hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO];
edid_init_data.mutex = &hdmi_ctrl->mutex;
edid_init_data.sysfs_kobj = hdmi_ctrl->kobj;
edid_init_data.ddc_ctrl = &hdmi_ctrl->ddc_ctrl;
@@ -405,14 +329,14 @@
static inline u32 hdmi_tx_is_controller_on(struct hdmi_tx_ctrl *hdmi_ctrl)
{
- return HDMI_REG_R_ND(hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO].base,
- HDMI_CTRL) & BIT(0);
+ struct dss_io_data *io = &hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO];
+ return DSS_REG_R_ND(io, HDMI_CTRL) & BIT(0);
} /* hdmi_tx_is_controller_on */
static inline u32 hdmi_tx_is_dvi_mode(struct hdmi_tx_ctrl *hdmi_ctrl)
{
- return !(HDMI_REG_R_ND(hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO].base,
- HDMI_CTRL) & BIT(1));
+ struct dss_io_data *io = &hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO];
+ return !(DSS_REG_R_ND(io, HDMI_CTRL) & BIT(1));
} /* hdmi_tx_is_dvi_mode */
static int hdmi_tx_init_panel_info(uint32_t resolution,
@@ -473,44 +397,6 @@
hdmi_set_supported_mode(HDMI_VFRMT_1920x1080p60_16_9);
} /* hdmi_tx_setup_video_mode_lut */
-static inline struct clk *hdmi_tx_get_clk(struct hdmi_tx_platform_data *pdata,
- u32 clk_idx)
-{
- if (!pdata || clk_idx > HDMI_TX_MAX_CLK) {
- DEV_ERR("%s: invalid input\n", __func__);
- return NULL;
- }
-
- return pdata->clk[clk_idx];
-} /* hdmi_tx_get_clk */
-
-static int hdmi_tx_clk_set_rate(struct hdmi_tx_platform_data *pdata,
- u32 clk_idx, unsigned long clk_rate)
-{
- int rc = 0;
- struct clk *clk = NULL;
-
- if (!pdata) {
- DEV_ERR("%s: invalid input\n", __func__);
- return -EINVAL;
- }
-
- clk = hdmi_tx_get_clk(pdata, clk_idx);
- if (clk) {
- rc = clk_set_rate(clk, clk_rate);
- if (IS_ERR_VALUE(rc))
- DEV_ERR("%s: failed rc=%d\n", __func__, rc);
- else
- DEV_DBG("%s: name='%s' rate=%lu\n", __func__,
- hdmi_tx_clk_name(clk_idx), clk_rate);
- } else {
- DEV_ERR("%s: FAILED: invalid clk_idx=%d\n", __func__, clk_idx);
- rc = -EINVAL;
- }
-
- return rc;
-} /* hdmi_tx_clk_set_rate */
-
static int hdmi_tx_read_sink_info(struct hdmi_tx_ctrl *hdmi_ctrl)
{
int status;
@@ -551,9 +437,14 @@
}
io = &hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO];
+ if (!io->base) {
+ DEV_ERR("%s: Core io is not initialized\n", __func__);
+ return;
+ }
+
DEV_DBG("%s: Got HPD interrupt\n", __func__);
- hpd_state = (HDMI_REG_R(io->base, HDMI_HPD_INT_STATUS) & BIT(1)) >> 1;
+ hpd_state = (DSS_REG_R(io, HDMI_HPD_INT_STATUS) & BIT(1)) >> 1;
mutex_lock(&hdmi_ctrl->mutex);
if ((hdmi_ctrl->hpd_prev_state != hdmi_ctrl->hpd_state) ||
(hdmi_ctrl->hpd_state != hpd_state)) {
@@ -605,22 +496,62 @@
}
/* Set IRQ for HPD */
- HDMI_REG_W(io->base, HDMI_HPD_INT_CTRL, 4 | (hpd_state ? 0 : 2));
+ DSS_REG_W(io, HDMI_HPD_INT_CTRL, 4 | (hpd_state ? 0 : 2));
} /* hdmi_tx_hpd_state_work */
-static int hdmi_tx_check_capability(void __iomem *base)
+static void hdmi_tx_hpd_int_work(struct work_struct *work)
+{
+ u32 hpd_int_status;
+ u32 hpd_int_ctrl;
+ u32 cable_detected;
+ struct hdmi_tx_ctrl *hdmi_ctrl = NULL;
+ struct dss_io_data *io = NULL;
+
+ hdmi_ctrl = container_of(work, struct hdmi_tx_ctrl, hpd_int_work);
+ if (!hdmi_ctrl || !hdmi_ctrl->hpd_initialized) {
+ DEV_DBG("%s: invalid input\n", __func__);
+ return;
+ }
+
+ io = &hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO];
+ if (!io->base) {
+ DEV_ERR("%s: Core io is not initialized\n", __func__);
+ return;
+ }
+
+ /* Process HPD Interrupt */
+ hpd_int_status = DSS_REG_R(io, HDMI_HPD_INT_STATUS);
+ hpd_int_ctrl = DSS_REG_R(io, HDMI_HPD_INT_CTRL);
+
+ DSS_REG_W(io, HDMI_HPD_INT_CTRL, BIT(2));
+
+ cable_detected = hpd_int_status & BIT(1);
+ mutex_lock(&hdmi_ctrl->mutex);
+ hdmi_ctrl->hpd_cable_chg_detected = true;
+ hdmi_ctrl->hpd_prev_state = cable_detected ? 0 : 1;
+ hdmi_ctrl->hpd_stable = 0;
+ mutex_unlock(&hdmi_ctrl->mutex);
+
+ mod_timer(&hdmi_ctrl->hpd_state_timer, jiffies + HZ/2);
+
+ DEV_DBG("%s: HPD<Ctrl=%04x, State=%04x>\n", __func__, hpd_int_ctrl,
+ hpd_int_status);
+} /* hdmi_tx_hpd_int_work */
+
+static int hdmi_tx_check_capability(struct dss_io_data *io)
{
u32 hdmi_disabled, hdcp_disabled;
- if (!base) {
+ if (!io) {
DEV_ERR("%s: invalid input\n", __func__);
return -EINVAL;
}
- /* QFPROM_RAW_FEAT_CONFIG_ROW0_LSB */
- hdcp_disabled = HDMI_REG_R_ND(base, 0x000000F8) & BIT(31);
- /* QFPROM_RAW_FEAT_CONFIG_ROW0_MSB */
- hdmi_disabled = HDMI_REG_R_ND(base, 0x000000FC) & BIT(0);
+ hdcp_disabled = DSS_REG_R_ND(io,
+ QFPROM_RAW_FEAT_CONFIG_ROW0_LSB) & BIT(31);
+
+ hdmi_disabled = DSS_REG_R_ND(io,
+ QFPROM_RAW_FEAT_CONFIG_ROW0_MSB) & BIT(0);
DEV_DBG("%s: Features <HDMI:%s, HDCP:%s>\n", __func__,
hdmi_disabled ? "OFF" : "ON", hdcp_disabled ? "OFF" : "ON");
@@ -710,25 +641,9 @@
goto end;
}
- /*
- * extpclk is driven by hdmi phy pll. This phy pll programming requires
- * hdmi_ahb_clk. So enable it and then disable.
- */
- rc = clk_prepare_enable(pdata->clk[HDMI_TX_AHB_CLK]);
- if (rc) {
- DEV_ERR("%s: failed to enable '%s' clk\n", __func__,
- hdmi_tx_clk_name(HDMI_TX_AHB_CLK));
- goto end;
- }
- rc = hdmi_tx_clk_set_rate(pdata, HDMI_TX_EXTP_CLK,
- timing->pixel_freq * 1000);
- if (rc) {
- DEV_ERR("%s: FAILED: '%s' clk set rate\n", __func__,
- hdmi_tx_clk_name(HDMI_TX_EXTP_CLK));
- clk_disable_unprepare(pdata->clk[HDMI_TX_AHB_CLK]);
- goto end;
- }
- clk_disable_unprepare(pdata->clk[HDMI_TX_AHB_CLK]);
+ /* todo: find a better way */
+ hdmi_ctrl->pdata.power_data[HDMI_TX_CORE_PM].clk_config[0].rate =
+ timing->pixel_freq * 1000;
hdmi_ctrl->video_resolution = format;
hdmi_edid_set_video_resolution(
@@ -772,35 +687,35 @@
timing->back_porch_h + timing->pulse_width_h - 1;
total_v = timing->active_v + timing->front_porch_v +
timing->back_porch_v + timing->pulse_width_v - 1;
- HDMI_REG_W(io->base, HDMI_TOTAL,
+ DSS_REG_W(io, HDMI_TOTAL,
((total_v << 16) & 0x0FFF0000) |
((total_h << 0) & 0x00000FFF));
start_h = timing->back_porch_h + timing->pulse_width_h;
end_h = (total_h + 1) - timing->front_porch_h;
- HDMI_REG_W(io->base, HDMI_ACTIVE_H,
+ DSS_REG_W(io, HDMI_ACTIVE_H,
((end_h << 16) & 0x0FFF0000) |
((start_h << 0) & 0x00000FFF));
start_v = timing->back_porch_v + timing->pulse_width_v - 1;
end_v = total_v - timing->front_porch_v;
- HDMI_REG_W(io->base, HDMI_ACTIVE_V,
+ DSS_REG_W(io, HDMI_ACTIVE_V,
((end_v << 16) & 0x0FFF0000) |
((start_v << 0) & 0x00000FFF));
if (timing->interlaced) {
- HDMI_REG_W(io->base, HDMI_V_TOTAL_F2,
+ DSS_REG_W(io, HDMI_V_TOTAL_F2,
((total_v + 1) << 0) & 0x00000FFF);
- HDMI_REG_W(io->base, HDMI_ACTIVE_V_F2,
+ DSS_REG_W(io, HDMI_ACTIVE_V_F2,
(((start_v + 1) << 0) & 0x00000FFF) |
(((end_v + 1) << 16) & 0x0FFF0000));
} else {
- HDMI_REG_W(io->base, HDMI_V_TOTAL_F2, 0);
- HDMI_REG_W(io->base, HDMI_ACTIVE_V_F2, 0);
+ DSS_REG_W(io, HDMI_V_TOTAL_F2, 0);
+ DSS_REG_W(io, HDMI_ACTIVE_V_F2, 0);
}
- HDMI_REG_W(io->base, HDMI_FRAME_CTRL,
+ DSS_REG_W(io, HDMI_FRAME_CTRL,
((timing->interlaced << 31) & 0x80000000) |
((timing->active_low_h << 29) & 0x20000000) |
((timing->active_low_v << 28) & 0x10000000));
@@ -929,28 +844,28 @@
regVal = regVal << 8 | avi_iframe[4];
regVal = regVal << 8 | avi_iframe[3];
regVal = regVal << 8 | checksum;
- HDMI_REG_W(io->base, HDMI_AVI_INFO0, regVal);
+ DSS_REG_W(io, HDMI_AVI_INFO0, regVal);
regVal = avi_iframe[9];
regVal = regVal << 8 | avi_iframe[8];
regVal = regVal << 8 | avi_iframe[7];
regVal = regVal << 8 | avi_iframe[6];
- HDMI_REG_W(io->base, HDMI_AVI_INFO1, regVal);
+ DSS_REG_W(io, HDMI_AVI_INFO1, regVal);
regVal = avi_iframe[13];
regVal = regVal << 8 | avi_iframe[12];
regVal = regVal << 8 | avi_iframe[11];
regVal = regVal << 8 | avi_iframe[10];
- HDMI_REG_W(io->base, HDMI_AVI_INFO2, regVal);
+ DSS_REG_W(io, HDMI_AVI_INFO2, regVal);
regVal = avi_iframe[1];
regVal = regVal << 16 | avi_iframe[15];
regVal = regVal << 8 | avi_iframe[14];
- HDMI_REG_W(io->base, HDMI_AVI_INFO3, regVal);
+ DSS_REG_W(io, HDMI_AVI_INFO3, regVal);
/* 0x3 for AVI InfFrame enable (every frame) */
- HDMI_REG_W(io->base, HDMI_INFOFRAME_CTRL0,
- HDMI_REG_R(io->base, HDMI_INFOFRAME_CTRL0) |
+ DSS_REG_W(io, HDMI_INFOFRAME_CTRL0,
+ DSS_REG_R(io, HDMI_INFOFRAME_CTRL0) |
0x00000003L);
} /* hdmi_tx_set_avi_infoframe */
@@ -986,14 +901,14 @@
* 0x19 Length of Source Product Description InfoFrame
*/
packet_header = 0x83 | (0x01 << 8) | (0x19 << 16);
- HDMI_REG_W(io->base, HDMI_GENERIC1_HDR, packet_header);
+ DSS_REG_W(io, HDMI_GENERIC1_HDR, packet_header);
check_sum += IFRAME_CHECKSUM_32(packet_header);
packet_payload = (vendor_name[3] & 0x7f)
| ((vendor_name[4] & 0x7f) << 8)
| ((vendor_name[5] & 0x7f) << 16)
| ((vendor_name[6] & 0x7f) << 24);
- HDMI_REG_W(io->base, HDMI_GENERIC1_1, packet_payload);
+ DSS_REG_W(io, HDMI_GENERIC1_1, packet_payload);
check_sum += IFRAME_CHECKSUM_32(packet_payload);
/* Product Description (7-bit ASCII code) */
@@ -1001,28 +916,28 @@
| ((product_description[0] & 0x7f) << 8)
| ((product_description[1] & 0x7f) << 16)
| ((product_description[2] & 0x7f) << 24);
- HDMI_REG_W(io->base, HDMI_GENERIC1_2, packet_payload);
+ DSS_REG_W(io, HDMI_GENERIC1_2, packet_payload);
check_sum += IFRAME_CHECKSUM_32(packet_payload);
packet_payload = (product_description[3] & 0x7f)
| ((product_description[4] & 0x7f) << 8)
| ((product_description[5] & 0x7f) << 16)
| ((product_description[6] & 0x7f) << 24);
- HDMI_REG_W(io->base, HDMI_GENERIC1_3, packet_payload);
+ DSS_REG_W(io, HDMI_GENERIC1_3, packet_payload);
check_sum += IFRAME_CHECKSUM_32(packet_payload);
packet_payload = (product_description[7] & 0x7f)
| ((product_description[8] & 0x7f) << 8)
| ((product_description[9] & 0x7f) << 16)
| ((product_description[10] & 0x7f) << 24);
- HDMI_REG_W(io->base, HDMI_GENERIC1_4, packet_payload);
+ DSS_REG_W(io, HDMI_GENERIC1_4, packet_payload);
check_sum += IFRAME_CHECKSUM_32(packet_payload);
packet_payload = (product_description[11] & 0x7f)
| ((product_description[12] & 0x7f) << 8)
| ((product_description[13] & 0x7f) << 16)
| ((product_description[14] & 0x7f) << 24);
- HDMI_REG_W(io->base, HDMI_GENERIC1_5, packet_payload);
+ DSS_REG_W(io, HDMI_GENERIC1_5, packet_payload);
check_sum += IFRAME_CHECKSUM_32(packet_payload);
/*
@@ -1039,7 +954,7 @@
* 09h PC general
*/
packet_payload = (product_description[15] & 0x7f) | 0x00 << 8;
- HDMI_REG_W(io->base, HDMI_GENERIC1_6, packet_payload);
+ DSS_REG_W(io, HDMI_GENERIC1_6, packet_payload);
check_sum += IFRAME_CHECKSUM_32(packet_payload);
/* Vendor Name (7bit ASCII code) */
@@ -1048,7 +963,7 @@
| ((vendor_name[2] & 0x7f) << 24);
check_sum += IFRAME_CHECKSUM_32(packet_payload);
packet_payload |= ((0x100 - (0xff & check_sum)) & 0xff);
- HDMI_REG_W(io->base, HDMI_GENERIC1_0, packet_payload);
+ DSS_REG_W(io, HDMI_GENERIC1_0, packet_payload);
/*
* GENERIC1_LINE | GENERIC1_CONT | GENERIC1_SEND
@@ -1056,9 +971,9 @@
* Enable this packet to transmit every frame
* Enable HDMI TX engine to transmit Generic packet 1
*/
- packet_control = HDMI_REG_R_ND(io->base, HDMI_GEN_PKT_CTRL);
+ packet_control = DSS_REG_R_ND(io, HDMI_GEN_PKT_CTRL);
packet_control |= ((0x1 << 24) | (1 << 5) | (1 << 4));
- HDMI_REG_W(io->base, HDMI_GEN_PKT_CTRL, packet_control);
+ DSS_REG_W(io, HDMI_GEN_PKT_CTRL, packet_control);
} /* hdmi_tx_set_spd_infoframe */
/* todo: revisit when new HPD debouncing logic is avialble */
@@ -1075,11 +990,17 @@
static void hdmi_tx_set_mode(struct hdmi_tx_ctrl *hdmi_ctrl, u32 power_on)
{
u32 reg_val = 0;
+ struct dss_io_data *io = NULL;
if (!hdmi_ctrl) {
DEV_ERR("%s: invalid input\n", __func__);
return;
}
+ io = &hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO];
+ if (!io->base) {
+ DEV_ERR("%s: Core io is not initialized\n", __func__);
+ return;
+ }
if (power_on) {
/* ENABLE */
@@ -1101,77 +1022,12 @@
reg_val = BIT(1);
}
- HDMI_REG_W(hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO].base, HDMI_CTRL,
- reg_val);
+ DSS_REG_W(io, HDMI_CTRL, reg_val);
DEV_DBG("HDMI Core: %s, HDMI_CTRL=0x%08x\n",
power_on ? "Enable" : "Disable", reg_val);
} /* hdmi_tx_set_mode */
-static int hdmi_tx_clk_update(struct hdmi_tx_platform_data *pdata, u32 clk_idx,
- u32 enable)
-{
- int rc = 0;
- struct clk *clk = hdmi_tx_get_clk(pdata, clk_idx);
-
- if (clk) {
- DEV_DBG("%s: clk=%d en=%d\n", __func__, clk_idx, enable);
- if (enable) {
- rc = clk_prepare_enable(clk);
- if (rc)
- DEV_ERR("%s: clk=%d enable failed\n",
- __func__, clk_idx);
- } else {
- clk_disable_unprepare(clk);
- }
- } else {
- DEV_ERR("%s: FAILED: invalid input for clk='%s'\n", __func__,
- hdmi_tx_clk_name(clk_idx));
- rc = -EINVAL;
- }
-
- return rc;
-} /* hdmi_tx_clk_update */
-
-/* Note: Before accessing extpclk, always make sure that hdmi_ahb_clk is on */
-static int hdmi_tx_clk_ctrl_update(struct hdmi_tx_platform_data *pdata, int on)
-{
- int rc = 0;
- DEV_DBG("%s: HDMI Clk: %s\n", __func__, on ? "Enable" : "Disable");
-
- rc = hdmi_tx_clk_update(pdata, HDMI_TX_APP_CLK, on);
- if (on && rc) {
- DEV_ERR("%s: '%s' on failed\n", __func__,
- hdmi_tx_clk_name(HDMI_TX_APP_CLK));
- goto fail_hdmi_app_clk;
- }
- if (on) {
- rc = hdmi_tx_clk_update(pdata, HDMI_TX_AHB_CLK, on);
- if (rc) {
- DEV_ERR("%s: '%s' on failed\n", __func__,
- hdmi_tx_clk_name(HDMI_TX_AHB_CLK));
- goto fail_hdmi_ahb_clk;
- }
- rc = hdmi_tx_clk_update(pdata, HDMI_TX_EXTP_CLK, on);
- if (rc) {
- DEV_ERR("%s: '%s' on failed\n", __func__,
- hdmi_tx_clk_name(HDMI_TX_EXTP_CLK));
- goto fail_hdmi_extp_clk;
- }
- } else {
- hdmi_tx_clk_update(pdata, HDMI_TX_EXTP_CLK, on);
- hdmi_tx_clk_update(pdata, HDMI_TX_AHB_CLK, on);
- }
- return rc;
-
-fail_hdmi_extp_clk:
- hdmi_tx_clk_update(pdata, HDMI_TX_AHB_CLK, 0);
-fail_hdmi_ahb_clk:
- hdmi_tx_clk_update(pdata, HDMI_TX_APP_CLK, 0);
-fail_hdmi_app_clk:
- return rc;
-} /* hdmi_tx_clk_ctrl_update */
-
static int hdmi_tx_config_power(struct hdmi_tx_ctrl *hdmi_ctrl,
enum hdmi_tx_power_module_type module, int config)
{
@@ -1191,17 +1047,33 @@
goto exit;
}
- if (config)
+ if (config) {
rc = msm_dss_config_vreg(&hdmi_ctrl->pdev->dev,
power_data->vreg_config, power_data->num_vreg, 1);
- else
+ if (rc) {
+ DEV_ERR("%s: Failed to config %s vreg. Err=%d\n",
+ __func__, hdmi_tx_pm_name(module), rc);
+ goto exit;
+ }
+
+ rc = msm_dss_get_clk(&hdmi_ctrl->pdev->dev,
+ power_data->clk_config, power_data->num_clk);
+ if (rc) {
+ DEV_ERR("%s: Failed to get %s clk. Err=%d\n",
+ __func__, hdmi_tx_pm_name(module), rc);
+
+ msm_dss_config_vreg(&hdmi_ctrl->pdev->dev,
+ power_data->vreg_config, power_data->num_vreg, 0);
+ }
+ } else {
+ msm_dss_put_clk(power_data->clk_config, power_data->num_clk);
+
rc = msm_dss_config_vreg(&hdmi_ctrl->pdev->dev,
power_data->vreg_config, power_data->num_vreg, 0);
-
- if (rc)
- DEV_ERR("%s: Failed to %s %s vreg. Error=%d\n",
- __func__, config ? "config" : "deconfig",
- hdmi_pm_name(module), rc);
+ if (rc)
+ DEV_ERR("%s: Fail to deconfig %s vreg. Err=%d\n",
+ __func__, hdmi_tx_pm_name(module), rc);
+ }
exit:
return rc;
@@ -1231,18 +1103,36 @@
power_data->num_vreg, 1);
if (rc) {
DEV_ERR("%s: Failed to enable %s vreg. Error=%d\n",
- __func__, hdmi_pm_name(module), rc);
+ __func__, hdmi_tx_pm_name(module), rc);
goto error;
}
rc = msm_dss_enable_gpio(power_data->gpio_config,
- power_data->num_gpio, enable);
+ power_data->num_gpio, 1);
if (rc) {
DEV_ERR("%s: Failed to enable %s gpio. Error=%d\n",
- __func__, hdmi_pm_name(module), rc);
+ __func__, hdmi_tx_pm_name(module), rc);
goto disable_vreg;
}
+
+ rc = msm_dss_clk_set_rate(power_data->clk_config,
+ power_data->num_clk);
+ if (rc) {
+ DEV_ERR("%s: failed to set clks rate for %s. err=%d\n",
+ __func__, hdmi_tx_pm_name(module), rc);
+ goto disable_gpio;
+ }
+
+ rc = msm_dss_enable_clk(power_data->clk_config,
+ power_data->num_clk, 1);
+ if (rc) {
+ DEV_ERR("%s: Failed to enable clks for %s. Error=%d\n",
+ __func__, hdmi_tx_pm_name(module), rc);
+ goto disable_gpio;
+ }
} else {
+ msm_dss_enable_clk(power_data->clk_config,
+ power_data->num_clk, 0);
msm_dss_enable_gpio(power_data->gpio_config,
power_data->num_gpio, 0);
msm_dss_enable_vreg(power_data->vreg_config,
@@ -1251,6 +1141,8 @@
return rc;
+disable_gpio:
+ msm_dss_enable_gpio(power_data->gpio_config, power_data->num_gpio, 0);
disable_vreg:
msm_dss_enable_vreg(power_data->vreg_config, power_data->num_vreg, 0);
error:
@@ -1281,7 +1173,7 @@
if (rc) {
DEV_ERR("%s: core hdmi_msm_enable_power failed rc = %d\n",
__func__, rc);
- goto error;
+ goto disable_hpd_power;
}
rc = hdmi_tx_enable_power(hdmi_ctrl, HDMI_TX_CEC_PM, 1);
if (rc) {
@@ -1293,7 +1185,8 @@
return rc;
disable_core_power:
hdmi_tx_enable_power(hdmi_ctrl, HDMI_TX_CORE_PM, 0);
-error:
+disable_hpd_power:
+ hdmi_tx_enable_power(hdmi_ctrl, HDMI_TX_HPD_PM, 0);
return rc;
} /* hdmi_tx_core_on */
@@ -1311,36 +1204,34 @@
io = &hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO];
if (!io->base) {
- DEV_ERR("%s: io not inititalized\n", __func__);
+ DEV_ERR("%s: core io not inititalized\n", __func__);
return;
}
- val = HDMI_REG_R_ND(io->base, HDMI_PHY_CTRL);
+ val = DSS_REG_R_ND(io, HDMI_PHY_CTRL);
phy_reset_polarity = val >> 3 & 0x1;
pll_reset_polarity = val >> 1 & 0x1;
if (phy_reset_polarity == 0)
- HDMI_REG_W_ND(io->base, HDMI_PHY_CTRL, val | SW_RESET);
+ DSS_REG_W_ND(io, HDMI_PHY_CTRL, val | SW_RESET);
else
- HDMI_REG_W_ND(io->base, HDMI_PHY_CTRL, val & (~SW_RESET));
+ DSS_REG_W_ND(io, HDMI_PHY_CTRL, val & (~SW_RESET));
if (pll_reset_polarity == 0)
- HDMI_REG_W_ND(io->base, HDMI_PHY_CTRL, val | SW_RESET_PLL);
+ DSS_REG_W_ND(io, HDMI_PHY_CTRL, val | SW_RESET_PLL);
else
- HDMI_REG_W_ND(io->base,
- HDMI_PHY_CTRL, val & (~SW_RESET_PLL));
+ DSS_REG_W_ND(io, HDMI_PHY_CTRL, val & (~SW_RESET_PLL));
if (phy_reset_polarity == 0)
- HDMI_REG_W_ND(io->base, HDMI_PHY_CTRL, val & (~SW_RESET));
+ DSS_REG_W_ND(io, HDMI_PHY_CTRL, val & (~SW_RESET));
else
- HDMI_REG_W_ND(io->base, HDMI_PHY_CTRL, val | SW_RESET);
+ DSS_REG_W_ND(io, HDMI_PHY_CTRL, val | SW_RESET);
if (pll_reset_polarity == 0)
- HDMI_REG_W_ND(io->base,
- HDMI_PHY_CTRL, val & (~SW_RESET_PLL));
+ DSS_REG_W_ND(io, HDMI_PHY_CTRL, val & (~SW_RESET_PLL));
else
- HDMI_REG_W_ND(io->base, HDMI_PHY_CTRL, val | SW_RESET_PLL);
+ DSS_REG_W_ND(io, HDMI_PHY_CTRL, val | SW_RESET_PLL);
} /* hdmi_tx_phy_reset */
static void hdmi_tx_init_phy(struct hdmi_tx_ctrl *hdmi_ctrl)
@@ -1354,55 +1245,58 @@
io = &hdmi_ctrl->pdata.io[HDMI_TX_PHY_IO];
if (!io->base) {
- DEV_ERR("%s: Core io is not initialized\n", __func__);
+ DEV_ERR("%s: phy io is not initialized\n", __func__);
return;
}
- HDMI_REG_W_ND(io->base, HDMI_PHY_ANA_CFG0, 0x1B);
- HDMI_REG_W_ND(io->base, HDMI_PHY_ANA_CFG1, 0xF2);
- HDMI_REG_W_ND(io->base, HDMI_PHY_BIST_CFG0, 0x0);
- HDMI_REG_W_ND(io->base, HDMI_PHY_BIST_PATN0, 0x0);
- HDMI_REG_W_ND(io->base, HDMI_PHY_BIST_PATN1, 0x0);
- HDMI_REG_W_ND(io->base, HDMI_PHY_BIST_PATN2, 0x0);
- HDMI_REG_W_ND(io->base, HDMI_PHY_BIST_PATN3, 0x0);
+ DSS_REG_W_ND(io, HDMI_PHY_ANA_CFG0, 0x1B);
+ DSS_REG_W_ND(io, HDMI_PHY_ANA_CFG1, 0xF2);
+ DSS_REG_W_ND(io, HDMI_PHY_BIST_CFG0, 0x0);
+ DSS_REG_W_ND(io, HDMI_PHY_BIST_PATN0, 0x0);
+ DSS_REG_W_ND(io, HDMI_PHY_BIST_PATN1, 0x0);
+ DSS_REG_W_ND(io, HDMI_PHY_BIST_PATN2, 0x0);
+ DSS_REG_W_ND(io, HDMI_PHY_BIST_PATN3, 0x0);
- HDMI_REG_W_ND(io->base, HDMI_PHY_PD_CTRL1, 0x20);
+ DSS_REG_W_ND(io, HDMI_PHY_PD_CTRL1, 0x20);
} /* hdmi_tx_init_phy */
static void hdmi_tx_powerdown_phy(struct hdmi_tx_ctrl *hdmi_ctrl)
{
+ struct dss_io_data *io = NULL;
+
if (!hdmi_ctrl) {
DEV_ERR("%s: invalid input\n", __func__);
return;
}
+ io = &hdmi_ctrl->pdata.io[HDMI_TX_PHY_IO];
+ if (!io->base) {
+ DEV_ERR("%s: phy io is not initialized\n", __func__);
+ return;
+ }
- HDMI_REG_W_ND(hdmi_ctrl->pdata.io[HDMI_TX_PHY_IO].base,
- HDMI_PHY_PD_CTRL0, 0x7F);
+ DSS_REG_W_ND(io, HDMI_PHY_PD_CTRL0, 0x7F);
} /* hdmi_tx_powerdown_phy */
static int hdmi_tx_start(struct hdmi_tx_ctrl *hdmi_ctrl)
{
int rc = 0;
+ struct dss_io_data *io = NULL;
if (!hdmi_ctrl) {
DEV_ERR("%s: invalid input\n", __func__);
return -EINVAL;
}
+ io = &hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO];
+ if (!io->base) {
+ DEV_ERR("%s: core io is not initialized\n", __func__);
+ return -EINVAL;
+ }
+
/* todo: Audio */
hdmi_tx_set_mode(hdmi_ctrl, false);
- mutex_lock(&hdmi_ctrl->mutex);
- rc = hdmi_tx_clk_ctrl_update(&hdmi_ctrl->pdata, 1);
- if (rc) {
- DEV_ERR("%s: hdmi_tx_clk_enable failed.\n", __func__);
- mutex_unlock(&hdmi_ctrl->mutex);
- return rc;
- }
- mutex_unlock(&hdmi_ctrl->mutex);
-
hdmi_tx_init_phy(hdmi_ctrl);
- HDMI_REG_W(hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO].base,
- HDMI_USEC_REFTIMER, 0x0001001B);
+ DSS_REG_W(io, HDMI_USEC_REFTIMER, 0x0001001B);
hdmi_tx_set_mode(hdmi_ctrl, true);
@@ -1413,8 +1307,7 @@
hdmi_tx_set_spd_infoframe(hdmi_ctrl);
/* Set IRQ for HPD */
- HDMI_REG_W(hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO].base,
- HDMI_HPD_INT_CTRL, 4 | (hdmi_ctrl->hpd_state ? 0 : 2));
+ DSS_REG_W(io, HDMI_HPD_INT_CTRL, 4 | (hdmi_ctrl->hpd_state ? 0 : 2));
/* todo: HDCP/CEC */
@@ -1437,12 +1330,6 @@
/* todo: Audio */
hdmi_tx_powerdown_phy(hdmi_ctrl);
hdmi_ctrl->panel_power_on = false;
-
- mutex_lock(&hdmi_ctrl->mutex);
- if (hdmi_tx_clk_ctrl_update(&hdmi_ctrl->pdata, 0))
- DEV_ERR("%s: hdmi_tx_clk_disable failed.\n", __func__);
- mutex_unlock(&hdmi_ctrl->mutex);
-
hdmi_tx_core_off(hdmi_ctrl);
return 0;
@@ -1451,6 +1338,7 @@
static int hdmi_tx_power_on(struct mdss_panel_data *panel_data)
{
int rc = 0;
+ struct dss_io_data *io = NULL;
struct hdmi_tx_ctrl *hdmi_ctrl =
hdmi_tx_get_drvdata_from_panel_data(panel_data);
@@ -1458,11 +1346,10 @@
DEV_ERR("%s: invalid input\n", __func__);
return -EINVAL;
}
-
- rc = hdmi_tx_core_on(hdmi_ctrl);
- if (rc) {
- DEV_ERR("%s: hdmi_msm_core_on failed\n", __func__);
- return rc;
+ io = &hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO];
+ if (!io->base) {
+ DEV_ERR("%s: core io is not initialized\n", __func__);
+ return -EINVAL;
}
DEV_INFO("power: ON (%dx%d %ld)\n", hdmi_ctrl->xres, hdmi_ctrl->yres,
@@ -1471,7 +1358,12 @@
rc = hdmi_tx_set_video_fmt(hdmi_ctrl);
if (rc) {
DEV_ERR("%s: cannot set video_fmt.rc=%d\n", __func__, rc);
- hdmi_tx_core_off(hdmi_ctrl);
+ return rc;
+ }
+
+ rc = hdmi_tx_core_on(hdmi_ctrl);
+ if (rc) {
+ DEV_ERR("%s: hdmi_msm_core_on failed\n", __func__);
return rc;
}
@@ -1494,8 +1386,7 @@
mutex_unlock(&hdmi_ctrl->mutex);
}
- hdmi_reg_dump(hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO].base,
- hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO].len, "HDMI-ON: ");
+ dss_reg_dump(io->base, io->len, "HDMI-ON: ", REG_DUMP);
DEV_INFO("%s: HDMI=%s DVI= %s\n", __func__,
hdmi_tx_is_controller_on(hdmi_ctrl) ? "ON" : "OFF" ,
@@ -1524,13 +1415,6 @@
hdmi_tx_set_mode(hdmi_ctrl, false);
- mutex_lock(&hdmi_ctrl->mutex);
- rc = hdmi_tx_clk_ctrl_update(&hdmi_ctrl->pdata, 0);
- if (rc)
- DEV_INFO("%s: Failed to disable clock. Error=%d\n",
- __func__, rc);
- mutex_unlock(&hdmi_ctrl->mutex);
-
rc = hdmi_tx_enable_power(hdmi_ctrl, HDMI_TX_HPD_PM, 0);
if (rc)
DEV_INFO("%s: Failed to disable hpd power. Error=%d\n",
@@ -1552,7 +1436,7 @@
io = &hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO];
if (!io->base) {
- DEV_ERR("%s: io not inititalized\n", __func__);
+ DEV_ERR("%s: core io not inititalized\n", __func__);
return -EINVAL;
}
@@ -1566,31 +1450,21 @@
return rc;
}
- mutex_lock(&hdmi_ctrl->mutex);
- rc = hdmi_tx_clk_ctrl_update(&hdmi_ctrl->pdata, true);
- if (rc) {
- DEV_ERR("%s: Failed to enable clocks. rc=%d\n",
- __func__, rc);
- mutex_unlock(&hdmi_ctrl->mutex);
- goto disable_hpd_power;
- }
- mutex_unlock(&hdmi_ctrl->mutex);
-
- hdmi_reg_dump(io->base, io->len, "HDMI-INIT: ");
+ dss_reg_dump(io->base, io->len, "HDMI-INIT: ", REG_DUMP);
hdmi_tx_set_mode(hdmi_ctrl, false);
hdmi_tx_phy_reset(hdmi_ctrl);
hdmi_tx_set_mode(hdmi_ctrl, true);
- HDMI_REG_W(io->base, HDMI_USEC_REFTIMER, 0x0001001B);
+ DSS_REG_W(io, HDMI_USEC_REFTIMER, 0x0001001B);
/* set timeout to 4.1ms (max) for hardware debounce */
- reg_val = HDMI_REG_R(io->base, HDMI_HPD_CTRL) | 0x1FFF;
+ reg_val = DSS_REG_R(io, HDMI_HPD_CTRL) | 0x1FFF;
/* Toggle HPD circuit to trigger HPD sense */
- HDMI_REG_W(io->base, HDMI_HPD_CTRL,
+ DSS_REG_W(io, HDMI_HPD_CTRL,
~(1 << 28) & reg_val);
- HDMI_REG_W(io->base, HDMI_HPD_CTRL, (1 << 28) | reg_val);
+ DSS_REG_W(io, HDMI_HPD_CTRL, (1 << 28) | reg_val);
hdmi_ctrl->hpd_initialized = true;
@@ -1607,11 +1481,6 @@
mutex_unlock(&hdmi_ctrl->mutex);
mod_timer(&hdmi_ctrl->hpd_state_timer, jiffies + HZ/2);
- return 0;
-
-disable_hpd_power:
- hdmi_tx_enable_power(hdmi_ctrl, HDMI_TX_HPD_PM, false);
-
return rc;
} /* hdmi_tx_hpd_on */
@@ -1629,7 +1498,6 @@
rc = hdmi_tx_hpd_on(hdmi_ctrl);
} else {
hdmi_tx_hpd_off(hdmi_ctrl);
- /* Set HDMI switch node to 0 on HPD feature disable */
switch_set_state(&hdmi_ctrl->sdev, 0);
DEV_INFO("%s: Hdmi state switch to %d\n", __func__,
hdmi_ctrl->sdev.state);
@@ -1640,8 +1508,6 @@
static irqreturn_t hdmi_tx_isr(int irq, void *data)
{
- u32 hpd_int_status;
- u32 hpd_int_ctrl;
struct dss_io_data *io = NULL;
struct hdmi_tx_ctrl *hdmi_ctrl = (struct hdmi_tx_ctrl *)data;
@@ -1652,108 +1518,26 @@
io = &hdmi_ctrl->pdata.io[HDMI_TX_CORE_IO];
if (!io->base) {
- DEV_WARN("%s: io not initialized, ISR ignored\n", __func__);
+ DEV_WARN("%s: core io not initialized, ISR ignored\n",
+ __func__);
return IRQ_HANDLED;
}
- /* Process HPD Interrupt */
- hpd_int_status = HDMI_REG_R(io->base, HDMI_HPD_INT_STATUS);
- hpd_int_ctrl = HDMI_REG_R(io->base, HDMI_HPD_INT_CTRL);
- if ((hpd_int_ctrl & BIT(2)) && (hpd_int_status & BIT(0))) {
- u32 cable_detected = hpd_int_status & BIT(1);
-
+ if (DSS_REG_R(io, HDMI_HPD_INT_STATUS) & BIT(0)) {
/*
- * Clear all interrupts, timer will turn IRQ back on
- * Leaving the bit[2] on, else core goes off
- * on getting HPD during power off.
+ * Turn off HPD irq and clear all interrupts,
+ * worker will turn IRQ back on
*/
- HDMI_REG_W(io->base, HDMI_HPD_INT_CTRL, BIT(2) | BIT(0));
-
- DEV_DBG("%s: HPD IRQ, Ctrl=%04x, State=%04x\n", __func__,
- hpd_int_ctrl, hpd_int_status);
-
- mutex_lock(&hdmi_ctrl->mutex);
- hdmi_ctrl->hpd_cable_chg_detected = true;
- hdmi_ctrl->hpd_prev_state = cable_detected ? 0 : 1;
- hdmi_ctrl->hpd_stable = 0;
- mutex_unlock(&hdmi_ctrl->mutex);
-
- mod_timer(&hdmi_ctrl->hpd_state_timer, jiffies + HZ/2);
-
- return IRQ_HANDLED;
+ DSS_REG_W(io, HDMI_HPD_INT_CTRL, ~BIT(2) | BIT(0));
+ queue_work(hdmi_ctrl->workq, &hdmi_ctrl->hpd_int_work);
}
- if (!hdmi_ddc_isr(&hdmi_ctrl->ddc_ctrl))
- return IRQ_HANDLED;
-
- DEV_DBG("%s: HPD<Ctrl=%04x, State=%04x>\n", __func__, hpd_int_ctrl,
- hpd_int_status);
+ if (hdmi_ddc_isr(&hdmi_ctrl->ddc_ctrl) < 0)
+ DEV_ERR("%s: hdmi_ddc_isr failed\n", __func__);
return IRQ_HANDLED;
} /* hdmi_tx_isr */
-static void hdmi_tx_clk_deinit(struct hdmi_tx_platform_data *pdata)
-{
- int i;
- if (!pdata) {
- DEV_ERR("%s: invalid input\n", __func__);
- return;
- }
-
- for (i = HDMI_TX_MAX_CLK - 1; i >= 0; i--) {
- if (pdata->clk[i])
- clk_put(pdata->clk[i]);
- pdata->clk[i] = NULL;
- }
-} /* hdmi_tx_clk_deinit */
-
-static int hdmi_tx_clk_init(struct platform_device *pdev,
- struct hdmi_tx_platform_data *pdata)
-{
- int rc = 0;
- struct device *dev = NULL;
- struct clk *clk = NULL;
-
- if (!pdev || !pdata) {
- DEV_ERR("%s: invalid input\n", __func__);
- return -EINVAL;
- }
- dev = &pdev->dev;
-
- clk = clk_get(dev, "iface_clk");
- rc = IS_ERR(clk);
- if (rc) {
- DEV_ERR("%s: ERROR: '%s' clk not found\n", __func__,
- hdmi_tx_clk_name(HDMI_TX_AHB_CLK));
- goto error;
- }
- pdata->clk[HDMI_TX_AHB_CLK] = clk;
-
- clk = clk_get(dev, "core_clk");
- rc = IS_ERR(clk);
- if (rc) {
- DEV_ERR("%s: ERROR: '%s' clk not found\n", __func__,
- hdmi_tx_clk_name(HDMI_TX_APP_CLK));
- goto error;
- }
- pdata->clk[HDMI_TX_APP_CLK] = clk;
-
- clk = clk_get(dev, "extp_clk");
- rc = IS_ERR(clk);
- if (rc) {
- DEV_ERR("%s: ERROR: '%s' clk not found\n", __func__,
- hdmi_tx_clk_name(HDMI_TX_EXTP_CLK));
- goto error;
- }
- pdata->clk[HDMI_TX_EXTP_CLK] = clk;
-
- return rc;
-
-error:
- hdmi_tx_clk_deinit(pdata);
- return rc;
-} /* hdmi_tx_clk_init */
-
static void hdmi_tx_dev_deinit(struct hdmi_tx_ctrl *hdmi_ctrl)
{
if (!hdmi_ctrl) {
@@ -1785,7 +1569,7 @@
pdata = &hdmi_ctrl->pdata;
- rc = hdmi_tx_check_capability(pdata->io[HDMI_TX_QFPROM_IO].base);
+ rc = hdmi_tx_check_capability(&pdata->io[HDMI_TX_QFPROM_IO]);
if (rc) {
DEV_ERR("%s: no HDMI device\n", __func__);
goto fail_no_hdmi;
@@ -1802,11 +1586,11 @@
goto fail_create_workq;
}
- /* todo: May be move this ? */
- hdmi_ctrl->ddc_ctrl.base = pdata->io[HDMI_TX_CORE_IO].base;
+ hdmi_ctrl->ddc_ctrl.io = &pdata->io[HDMI_TX_CORE_IO];
init_completion(&hdmi_ctrl->ddc_ctrl.ddc_sw_done);
INIT_WORK(&hdmi_ctrl->hpd_state_work, hdmi_tx_hpd_state_work);
+ INIT_WORK(&hdmi_ctrl->hpd_int_work, hdmi_tx_hpd_int_work);
init_timer(&hdmi_ctrl->hpd_state_timer);
hdmi_ctrl->hpd_state_timer.function = hdmi_tx_hpd_state_timer;
hdmi_ctrl->hpd_state_timer.data = (u32)hdmi_ctrl;
@@ -1868,23 +1652,16 @@
return;
}
- /* CLK */
- hdmi_tx_clk_deinit(&hdmi_ctrl->pdata);
-
- /* VREG */
+ /* VREG & CLK */
for (i = HDMI_TX_MAX_PM - 1; i >= 0; i--) {
if (hdmi_tx_config_power(hdmi_ctrl, i, 0))
DEV_ERR("%s: '%s' power deconfig fail\n",
- __func__, hdmi_pm_name(i));
+ __func__, hdmi_tx_pm_name(i));
}
/* IO */
- for (i = HDMI_TX_MAX_IO - 1; i >= 0; i--) {
- if (hdmi_ctrl->pdata.io[i].base)
- iounmap(hdmi_ctrl->pdata.io[i].base);
- hdmi_ctrl->pdata.io[i].base = NULL;
- hdmi_ctrl->pdata.io[i].len = 0;
- }
+ for (i = HDMI_TX_MAX_IO - 1; i >= 0; i--)
+ msm_dss_iounmap(&hdmi_ctrl->pdata.io[i]);
} /* hdmi_tx_deinit_resource */
static int hdmi_tx_init_resource(struct hdmi_tx_ctrl *hdmi_ctrl)
@@ -1913,23 +1690,16 @@
pdata->io[i].len);
}
- /* VREG */
+ /* VREG & CLK */
for (i = 0; i < HDMI_TX_MAX_PM; i++) {
rc = hdmi_tx_config_power(hdmi_ctrl, i, 1);
if (rc) {
DEV_ERR("%s: '%s' power config failed.rc=%d\n",
- __func__, hdmi_pm_name(i), rc);
+ __func__, hdmi_tx_pm_name(i), rc);
goto error;
}
}
- /* CLK */
- rc = hdmi_tx_clk_init(hdmi_ctrl->pdev, pdata);
- if (rc) {
- DEV_ERR("%s: FAILED: clk init. rc=%d\n", __func__, rc);
- goto error;
- }
-
return rc;
error:
@@ -1937,6 +1707,98 @@
return rc;
} /* hdmi_tx_init_resource */
+static void hdmi_tx_put_dt_clk_data(struct device *dev,
+ struct dss_module_power *module_power)
+{
+ if (!module_power) {
+ DEV_ERR("%s: invalid input\n", __func__);
+ return;
+ }
+
+ if (module_power->clk_config) {
+ devm_kfree(dev, module_power->clk_config);
+ module_power->clk_config = NULL;
+ }
+ module_power->num_clk = 0;
+} /* hdmi_tx_put_dt_clk_data */
+
+/* todo: once clk are moved to device tree then change this implementation */
+static int hdmi_tx_get_dt_clk_data(struct device *dev,
+ struct dss_module_power *mp, u32 module_type)
+{
+ int rc = 0;
+
+ if (!dev || !mp) {
+ DEV_ERR("%s: invalid input\n", __func__);
+ rc = -EINVAL;
+ goto error;
+ }
+
+ DEV_DBG("%s: module: '%s'\n", __func__, hdmi_tx_pm_name(module_type));
+
+ switch (module_type) {
+ case HDMI_TX_HPD_PM:
+ mp->num_clk = 2;
+ mp->clk_config = devm_kzalloc(dev, sizeof(struct dss_clk) *
+ mp->num_clk, GFP_KERNEL);
+ if (!mp->clk_config) {
+ DEV_ERR("%s: can't alloc '%s' clk mem\n", __func__,
+ hdmi_tx_pm_name(module_type));
+ goto error;
+ }
+
+ snprintf(mp->clk_config[0].clk_name, 32, "%s", "iface_clk");
+ mp->clk_config[0].type = DSS_CLK_AHB;
+ mp->clk_config[0].rate = 0;
+
+ snprintf(mp->clk_config[1].clk_name, 32, "%s", "core_clk");
+ mp->clk_config[1].type = DSS_CLK_OTHER;
+ mp->clk_config[1].rate = 19200000;
+ break;
+
+ case HDMI_TX_CORE_PM:
+ mp->num_clk = 2;
+ mp->clk_config = devm_kzalloc(dev, sizeof(struct dss_clk) *
+ mp->num_clk, GFP_KERNEL);
+ if (!mp->clk_config) {
+ DEV_ERR("%s: can't alloc '%s' clk mem\n", __func__,
+ hdmi_tx_pm_name(module_type));
+ goto error;
+ }
+
+ snprintf(mp->clk_config[0].clk_name, 32, "%s", "extp_clk");
+ mp->clk_config[0].type = DSS_CLK_PCLK;
+ /* This rate will be overwritten when core is powered on */
+ mp->clk_config[0].rate = 148500000;
+
+ snprintf(mp->clk_config[1].clk_name, 32, "%s", "alt_iface_clk");
+ mp->clk_config[1].type = DSS_CLK_AHB;
+ mp->clk_config[1].rate = 0;
+ break;
+
+ case HDMI_TX_CEC_PM:
+ mp->num_clk = 0;
+ DEV_DBG("%s: no clk\n", __func__);
+ break;
+
+ default:
+ DEV_ERR("%s: invalid module type=%d\n", __func__,
+ module_type);
+ return -EINVAL;
+ }
+
+ return rc;
+
+error:
+ if (mp->clk_config) {
+ devm_kfree(dev, mp->clk_config);
+ mp->clk_config = NULL;
+ }
+ mp->num_clk = 0;
+
+ return rc;
+} /* hdmi_tx_get_dt_clk_data */
+
static void hdmi_tx_put_dt_vreg_data(struct device *dev,
struct dss_module_power *module_power)
{
@@ -1985,7 +1847,7 @@
return -EINVAL;
}
- DEV_DBG("%s: module: '%s'\n", __func__, hdmi_pm_name(module_type));
+ DEV_DBG("%s: module: '%s'\n", __func__, hdmi_tx_pm_name(module_type));
of_node = dev->of_node;
@@ -2025,7 +1887,7 @@
mod_vreg_total, GFP_KERNEL);
if (!mp->vreg_config) {
DEV_ERR("%s: can't alloc '%s' vreg mem\n", __func__,
- hdmi_pm_name(module_type));
+ hdmi_tx_pm_name(module_type));
goto error;
}
} else {
@@ -2070,7 +1932,7 @@
prop_name, val_array, dt_vreg_total);
if (rc) {
DEV_ERR("%s: error read '%s' vreg type. rc=%d\n",
- __func__, hdmi_pm_name(module_type), rc);
+ __func__, hdmi_tx_pm_name(module_type), rc);
goto error;
}
mp->vreg_config[j].type = val_array[i];
@@ -2085,7 +1947,7 @@
dt_vreg_total);
if (rc) {
DEV_ERR("%s: error read '%s' min volt. rc=%d\n",
- __func__, hdmi_pm_name(module_type), rc);
+ __func__, hdmi_tx_pm_name(module_type), rc);
goto error;
}
mp->vreg_config[j].min_voltage = val_array[i];
@@ -2100,7 +1962,7 @@
dt_vreg_total);
if (rc) {
DEV_ERR("%s: error read '%s' max volt. rc=%d\n",
- __func__, hdmi_pm_name(module_type), rc);
+ __func__, hdmi_tx_pm_name(module_type), rc);
goto error;
}
mp->vreg_config[j].max_voltage = val_array[i];
@@ -2115,7 +1977,7 @@
dt_vreg_total);
if (rc) {
DEV_ERR("%s: error read '%s' min volt. rc=%d\n",
- __func__, hdmi_pm_name(module_type), rc);
+ __func__, hdmi_tx_pm_name(module_type), rc);
goto error;
}
mp->vreg_config[j].optimum_voltage = val_array[i];
@@ -2136,8 +1998,12 @@
return rc;
error:
- for (i = HDMI_TX_MAX_PM - 1; i >= 0; i--)
- hdmi_tx_put_dt_vreg_data(dev, mp);
+ if (mp->vreg_config) {
+ devm_kfree(dev, mp->vreg_config);
+ mp->vreg_config = NULL;
+ }
+ mp->num_vreg = 0;
+
if (val_array)
devm_kfree(dev, val_array);
return rc;
@@ -2191,7 +2057,7 @@
return -EINVAL;
}
- DEV_DBG("%s: module: '%s'\n", __func__, hdmi_pm_name(module_type));
+ DEV_DBG("%s: module: '%s'\n", __func__, hdmi_tx_pm_name(module_type));
of_node = dev->of_node;
@@ -2227,7 +2093,7 @@
mod_gpio_total, GFP_KERNEL);
if (!mp->gpio_config) {
DEV_ERR("%s: can't alloc '%s' gpio mem\n", __func__,
- hdmi_pm_name(module_type));
+ hdmi_tx_pm_name(module_type));
goto error;
}
} else {
@@ -2268,8 +2134,11 @@
return rc;
error:
- for (i = HDMI_TX_MAX_PM - 1; i >= 0; i--)
- hdmi_tx_put_dt_gpio_data(dev, mp);
+ if (mp->gpio_config) {
+ devm_kfree(dev, mp->gpio_config);
+ mp->gpio_config = NULL;
+ }
+ mp->num_gpio = 0;
return rc;
} /* hdmi_tx_get_dt_gpio_data */
@@ -2284,6 +2153,9 @@
}
for (i = HDMI_TX_MAX_PM - 1; i >= 0; i--)
+ hdmi_tx_put_dt_clk_data(dev, &pdata->power_data[i]);
+
+ for (i = HDMI_TX_MAX_PM - 1; i >= 0; i--)
hdmi_tx_put_dt_vreg_data(dev, &pdata->power_data[i]);
for (i = HDMI_TX_MAX_PM - 1; i >= 0; i--)
@@ -2317,7 +2189,7 @@
&pdata->power_data[i], i);
if (rc) {
DEV_ERR("%s: '%s' get_dt_gpio_data failed.rc=%d\n",
- __func__, hdmi_pm_name(i), rc);
+ __func__, hdmi_tx_pm_name(i), rc);
goto error;
}
}
@@ -2328,7 +2200,18 @@
&pdata->power_data[i], i);
if (rc) {
DEV_ERR("%s: '%s' get_dt_vreg_data failed.rc=%d\n",
- __func__, hdmi_pm_name(i), rc);
+ __func__, hdmi_tx_pm_name(i), rc);
+ goto error;
+ }
+ }
+
+ /* CLK */
+ for (i = 0; i < HDMI_TX_MAX_PM; i++) {
+ rc = hdmi_tx_get_dt_clk_data(&pdev->dev,
+ &pdata->power_data[i], i);
+ if (rc) {
+ DEV_ERR("%s: '%s' get_dt_clk_data failed.rc=%d\n",
+ __func__, hdmi_tx_pm_name(i), rc);
goto error;
}
}
diff --git a/drivers/video/msm/mdss/mdss_hdmi_tx.h b/drivers/video/msm/mdss/mdss_hdmi_tx.h
index 7e37d28..94e0fda 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_tx.h
+++ b/drivers/video/msm/mdss/mdss_hdmi_tx.h
@@ -15,14 +15,6 @@
#include <linux/switch.h>
#include "mdss_hdmi_util.h"
-#include "mdss_io_util.h"
-
-enum hdmi_tx_clk_type {
- HDMI_TX_AHB_CLK,
- HDMI_TX_APP_CLK,
- HDMI_TX_EXTP_CLK,
- HDMI_TX_MAX_CLK
-};
enum hdmi_tx_io_type {
HDMI_TX_CORE_IO,
@@ -42,9 +34,6 @@
/* Data filled from device tree nodes */
struct dss_io_data io[HDMI_TX_MAX_IO];
struct dss_module_power power_data[HDMI_TX_MAX_PM];
-
- /* clk and regulator handles */
- struct clk *clk[HDMI_TX_MAX_CLK];
};
struct hdmi_tx_ctrl {
@@ -67,6 +56,7 @@
u32 hpd_state;
u32 hpd_feature_on;
struct work_struct hpd_state_work;
+ struct work_struct hpd_int_work;
struct timer_list hpd_state_timer;
unsigned long pixel_clk;
diff --git a/drivers/video/msm/mdss/mdss_hdmi_util.c b/drivers/video/msm/mdss/mdss_hdmi_util.c
index 3ba9f89..e7ea8c9 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_util.c
+++ b/drivers/video/msm/mdss/mdss_hdmi_util.c
@@ -15,226 +15,6 @@
#include <mach/board.h>
#include "mdss_hdmi_util.h"
-const char *hdmi_reg_name(u32 offset)
-{
- switch (offset) {
- case 0x00000000: return "HDMI_CTRL";
- case 0x00000010: return "HDMI_TEST_PATTERN";
- case 0x00000014: return "HDMI_RANDOM_PATTERN";
- case 0x00000018: return "HDMI_PKT_BLK_CTRL";
- case 0x0000001C: return "HDMI_STATUS";
- case 0x00000020: return "HDMI_AUDIO_PKT_CTRL";
- case 0x00000024: return "HDMI_ACR_PKT_CTRL";
- case 0x00000028: return "HDMI_VBI_PKT_CTRL";
- case 0x0000002C: return "HDMI_INFOFRAME_CTRL0";
- case 0x00000030: return "HDMI_INFOFRAME_CTRL1";
- case 0x00000034: return "HDMI_GEN_PKT_CTRL";
- case 0x0000003C: return "HDMI_ACP";
- case 0x00000040: return "HDMI_GC";
- case 0x00000044: return "HDMI_AUDIO_PKT_CTRL2";
- case 0x00000048: return "HDMI_ISRC1_0";
- case 0x0000004C: return "HDMI_ISRC1_1";
- case 0x00000050: return "HDMI_ISRC1_2";
- case 0x00000054: return "HDMI_ISRC1_3";
- case 0x00000058: return "HDMI_ISRC1_4";
- case 0x0000005C: return "HDMI_ISRC2_0";
- case 0x00000060: return "HDMI_ISRC2_1";
- case 0x00000064: return "HDMI_ISRC2_2";
- case 0x00000068: return "HDMI_ISRC2_3";
- case 0x0000006C: return "HDMI_AVI_INFO0";
- case 0x00000070: return "HDMI_AVI_INFO1";
- case 0x00000074: return "HDMI_AVI_INFO2";
- case 0x00000078: return "HDMI_AVI_INFO3";
- case 0x0000007C: return "HDMI_MPEG_INFO0";
- case 0x00000080: return "HDMI_MPEG_INFO1";
- case 0x00000084: return "HDMI_GENERIC0_HDR";
- case 0x00000088: return "HDMI_GENERIC0_0";
- case 0x0000008C: return "HDMI_GENERIC0_1";
- case 0x00000090: return "HDMI_GENERIC0_2";
- case 0x00000094: return "HDMI_GENERIC0_3";
- case 0x00000098: return "HDMI_GENERIC0_4";
- case 0x0000009C: return "HDMI_GENERIC0_5";
- case 0x000000A0: return "HDMI_GENERIC0_6";
- case 0x000000A4: return "HDMI_GENERIC1_HDR";
- case 0x000000A8: return "HDMI_GENERIC1_0";
- case 0x000000AC: return "HDMI_GENERIC1_1";
- case 0x000000B0: return "HDMI_GENERIC1_2";
- case 0x000000B4: return "HDMI_GENERIC1_3";
- case 0x000000B8: return "HDMI_GENERIC1_4";
- case 0x000000BC: return "HDMI_GENERIC1_5";
- case 0x000000C0: return "HDMI_GENERIC1_6";
- case 0x000000C4: return "HDMI_ACR_32_0";
- case 0x000000C8: return "HDMI_ACR_32_1";
- case 0x000000CC: return "HDMI_ACR_44_0";
- case 0x000000D0: return "HDMI_ACR_44_1";
- case 0x000000D4: return "HDMI_ACR_48_0";
- case 0x000000D8: return "HDMI_ACR_48_1";
- case 0x000000DC: return "HDMI_ACR_STATUS_0";
- case 0x000000E0: return "HDMI_ACR_STATUS_1";
- case 0x000000E4: return "HDMI_AUDIO_INFO0";
- case 0x000000E8: return "HDMI_AUDIO_INFO1";
- case 0x000000EC: return "HDMI_CS_60958_0";
- case 0x000000F0: return "HDMI_CS_60958_1";
- case 0x000000F8: return "HDMI_RAMP_CTRL0";
- case 0x000000FC: return "HDMI_RAMP_CTRL1";
- case 0x00000100: return "HDMI_RAMP_CTRL2";
- case 0x00000104: return "HDMI_RAMP_CTRL3";
- case 0x00000108: return "HDMI_CS_60958_2";
- case 0x00000110: return "HDMI_HDCP_CTRL";
- case 0x00000114: return "HDMI_HDCP_DEBUG_CTRL";
- case 0x00000118: return "HDMI_HDCP_INT_CTRL";
- case 0x0000011C: return "HDMI_HDCP_LINK0_STATUS";
- case 0x00000120: return "HDMI_HDCP_DDC_CTRL_0";
- case 0x00000124: return "HDMI_HDCP_DDC_CTRL_1";
- case 0x00000128: return "HDMI_HDCP_DDC_STATUS";
- case 0x0000012C: return "HDMI_HDCP_ENTROPY_CTRL0";
- case 0x00000130: return "HDMI_HDCP_RESET";
- case 0x00000134: return "HDMI_HDCP_RCVPORT_DATA0";
- case 0x00000138: return "HDMI_HDCP_RCVPORT_DATA1";
- case 0x0000013C: return "HDMI_HDCP_RCVPORT_DATA2_0";
- case 0x00000140: return "HDMI_HDCP_RCVPORT_DATA2_1";
- case 0x00000144: return "HDMI_HDCP_RCVPORT_DATA3";
- case 0x00000148: return "HDMI_HDCP_RCVPORT_DATA4";
- case 0x0000014C: return "HDMI_HDCP_RCVPORT_DATA5";
- case 0x00000150: return "HDMI_HDCP_RCVPORT_DATA6";
- case 0x00000154: return "HDMI_HDCP_RCVPORT_DATA7";
- case 0x00000158: return "HDMI_HDCP_RCVPORT_DATA8";
- case 0x0000015C: return "HDMI_HDCP_RCVPORT_DATA9";
- case 0x00000160: return "HDMI_HDCP_RCVPORT_DATA10";
- case 0x00000164: return "HDMI_HDCP_RCVPORT_DATA11";
- case 0x00000168: return "HDMI_HDCP_RCVPORT_DATA12";
- case 0x0000016C: return "HDMI_VENSPEC_INFO0";
- case 0x00000170: return "HDMI_VENSPEC_INFO1";
- case 0x00000174: return "HDMI_VENSPEC_INFO2";
- case 0x00000178: return "HDMI_VENSPEC_INFO3";
- case 0x0000017C: return "HDMI_VENSPEC_INFO4";
- case 0x00000180: return "HDMI_VENSPEC_INFO5";
- case 0x00000184: return "HDMI_VENSPEC_INFO6";
- case 0x00000194: return "HDMI_HDCP_DEBUG";
- case 0x0000019C: return "HDMI_TMDS_CTRL_CHAR";
- case 0x000001A4: return "HDMI_TMDS_CTRL_SEL";
- case 0x000001A8: return "HDMI_TMDS_SYNCCHAR01";
- case 0x000001AC: return "HDMI_TMDS_SYNCCHAR23";
- case 0x000001B4: return "HDMI_TMDS_DEBUG";
- case 0x000001B8: return "HDMI_TMDS_CTL_BITS";
- case 0x000001BC: return "HDMI_TMDS_DCBAL_CTRL";
- case 0x000001C0: return "HDMI_TMDS_DCBAL_CHAR";
- case 0x000001C8: return "HDMI_TMDS_CTL01_GEN";
- case 0x000001CC: return "HDMI_TMDS_CTL23_GEN";
- case 0x000001D0: return "HDMI_AUDIO_CFG";
- case 0x00000204: return "HDMI_DEBUG";
- case 0x00000208: return "HDMI_USEC_REFTIMER";
- case 0x0000020C: return "HDMI_DDC_CTRL";
- case 0x00000210: return "HDMI_DDC_ARBITRATION";
- case 0x00000214: return "HDMI_DDC_INT_CTRL";
- case 0x00000218: return "HDMI_DDC_SW_STATUS";
- case 0x0000021C: return "HDMI_DDC_HW_STATUS";
- case 0x00000220: return "HDMI_DDC_SPEED";
- case 0x00000224: return "HDMI_DDC_SETUP";
- case 0x00000228: return "HDMI_DDC_TRANS0";
- case 0x0000022C: return "HDMI_DDC_TRANS1";
- case 0x00000230: return "HDMI_DDC_TRANS2";
- case 0x00000234: return "HDMI_DDC_TRANS3";
- case 0x00000238: return "HDMI_DDC_DATA";
- case 0x0000023C: return "HDMI_HDCP_SHA_CTRL";
- case 0x00000240: return "HDMI_HDCP_SHA_STATUS";
- case 0x00000244: return "HDMI_HDCP_SHA_DATA";
- case 0x00000248: return "HDMI_HDCP_SHA_DBG_M0_0";
- case 0x0000024C: return "HDMI_HDCP_SHA_DBG_M0_1";
- case 0x00000250: return "HDMI_HPD_INT_STATUS";
- case 0x00000254: return "HDMI_HPD_INT_CTRL";
- case 0x00000258: return "HDMI_HPD_CTRL";
- case 0x0000025C: return "HDMI_HDCP_ENTROPY_CTRL1";
- case 0x00000260: return "HDMI_HDCP_SW_UPPER_AN";
- case 0x00000264: return "HDMI_HDCP_SW_LOWER_AN";
- case 0x00000268: return "HDMI_CRC_CTRL";
- case 0x0000026C: return "HDMI_VID_CRC";
- case 0x00000270: return "HDMI_AUD_CRC";
- case 0x00000274: return "HDMI_VBI_CRC";
- case 0x0000027C: return "HDMI_DDC_REF";
- case 0x00000284: return "HDMI_HDCP_SW_UPPER_AKSV";
- case 0x00000288: return "HDMI_HDCP_SW_LOWER_AKSV";
- case 0x0000028C: return "HDMI_CEC_CTRL";
- case 0x00000290: return "HDMI_CEC_WR_DATA";
- case 0x00000294: return "HDMI_CEC_RETRANSMIT";
- case 0x00000298: return "HDMI_CEC_STATUS";
- case 0x0000029C: return "HDMI_CEC_INT";
- case 0x000002A0: return "HDMI_CEC_ADDR";
- case 0x000002A4: return "HDMI_CEC_TIME";
- case 0x000002A8: return "HDMI_CEC_REFTIMER";
- case 0x000002AC: return "HDMI_CEC_RD_DATA";
- case 0x000002B0: return "HDMI_CEC_RD_FILTER";
- case 0x000002B4: return "HDMI_ACTIVE_H";
- case 0x000002B8: return "HDMI_ACTIVE_V";
- case 0x000002BC: return "HDMI_ACTIVE_V_F2";
- case 0x000002C0: return "HDMI_TOTAL";
- case 0x000002C4: return "HDMI_V_TOTAL_F2";
- case 0x000002C8: return "HDMI_FRAME_CTRL";
- case 0x000002CC: return "HDMI_AUD_INT";
- case 0x000002D0: return "HDMI_DEBUG_BUS_CTRL";
- case 0x000002D4: return "HDMI_PHY_CTRL";
- case 0x000002DC: return "HDMI_CEC_WR_RANGE";
- case 0x000002E0: return "HDMI_CEC_RD_RANGE";
- case 0x000002E4: return "HDMI_VERSION";
- case 0x000002F4: return "HDMI_BIST_ENABLE";
- case 0x000002F8: return "HDMI_TIMING_ENGINE_EN";
- case 0x000002FC: return "HDMI_INTF_CONFIG";
- case 0x00000300: return "HDMI_HSYNC_CTL";
- case 0x00000304: return "HDMI_VSYNC_PERIOD_F0";
- case 0x00000308: return "HDMI_VSYNC_PERIOD_F1";
- case 0x0000030C: return "HDMI_VSYNC_PULSE_WIDTH_F0";
- case 0x00000310: return "HDMI_VSYNC_PULSE_WIDTH_F1";
- case 0x00000314: return "HDMI_DISPLAY_V_START_F0";
- case 0x00000318: return "HDMI_DISPLAY_V_START_F1";
- case 0x0000031C: return "HDMI_DISPLAY_V_END_F0";
- case 0x00000320: return "HDMI_DISPLAY_V_END_F1";
- case 0x00000324: return "HDMI_ACTIVE_V_START_F0";
- case 0x00000328: return "HDMI_ACTIVE_V_START_F1";
- case 0x0000032C: return "HDMI_ACTIVE_V_END_F0";
- case 0x00000330: return "HDMI_ACTIVE_V_END_F1";
- case 0x00000334: return "HDMI_DISPLAY_HCTL";
- case 0x00000338: return "HDMI_ACTIVE_HCTL";
- case 0x0000033C: return "HDMI_HSYNC_SKEW";
- case 0x00000340: return "HDMI_POLARITY_CTL";
- case 0x00000344: return "HDMI_TPG_MAIN_CONTROL";
- case 0x00000348: return "HDMI_TPG_VIDEO_CONFIG";
- case 0x0000034C: return "HDMI_TPG_COMPONENT_LIMITS";
- case 0x00000350: return "HDMI_TPG_RECTANGLE";
- case 0x00000354: return "HDMI_TPG_INITIAL_VALUE";
- case 0x00000358: return "HDMI_TPG_BLK_WHT_PATTERN_FRAMES";
- case 0x0000035C: return "HDMI_TPG_RGB_MAPPING";
- default: return "???";
- }
-} /* hdmi_reg_name */
-
-void hdmi_reg_w(void __iomem *addr, u32 offset, u32 value, u32 debug)
-{
- u32 in_val;
-
- writel_relaxed(value, addr+offset);
- if (debug && PORT_DEBUG) {
- in_val = readl_relaxed(addr+offset);
- DEV_DBG("HDMI[%04x] => %08x [%08x] %s\n", offset, value,
- in_val, hdmi_reg_name(offset));
- }
-} /* hdmi_reg_w */
-
-u32 hdmi_reg_r(void __iomem *addr, u32 offset, u32 debug)
-{
- u32 value = readl_relaxed(addr+offset);
- if (debug && PORT_DEBUG)
- DEV_DBG("HDMI[%04x] <= %08x %s\n", offset, value,
- hdmi_reg_name(offset));
- return value;
-} /* hdmi_reg_r */
-
-void hdmi_reg_dump(void __iomem *base, u32 length, const char *prefix)
-{
- if (REG_DUMP)
- print_hex_dump(KERN_INFO, prefix, DUMP_PREFIX_OFFSET, 32, 4,
- (void *)base, length, false);
-} /* hdmi_reg_dump */
-
static struct hdmi_disp_mode_timing_type
hdmi_supported_video_mode_lut[HDMI_VFRMT_MAX] = {
HDMI_SETTINGS_640x480p60_4_3,
@@ -505,7 +285,7 @@
{
u32 reg_val, time_out_count;
- if (!ddc_ctrl || !ddc_ctrl->base) {
+ if (!ddc_ctrl || !ddc_ctrl->io) {
DEV_ERR("%s: invalid input\n", __func__);
return -EINVAL;
}
@@ -515,9 +295,9 @@
do {
--time_out_count;
/* Clear and Enable DDC interrupt */
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_INT_CTRL,
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_INT_CTRL,
BIT(2) | BIT(1));
- reg_val = HDMI_REG_R_ND(ddc_ctrl->base, HDMI_DDC_INT_CTRL);
+ reg_val = DSS_REG_R_ND(ddc_ctrl->io, HDMI_DDC_INT_CTRL);
} while ((reg_val & BIT(0)) && time_out_count);
if (!time_out_count) {
@@ -535,7 +315,7 @@
int status = 0;
int log_retry_fail;
- if (!ddc_ctrl || !ddc_ctrl->base || !ddc_data) {
+ if (!ddc_ctrl || !ddc_ctrl->io || !ddc_data) {
DEV_ERR("%s: invalid input\n", __func__);
return -EINVAL;
}
@@ -565,7 +345,7 @@
* INDEX = 0x0 (initial offset into buffer)
* INDEX_WRITE = 0x1 (setting initial offset)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_DATA,
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_DATA,
BIT(31) | (ddc_data->dev_addr << 8));
/*
@@ -576,7 +356,7 @@
* INDEX = 0x0
* INDEX_WRITE = 0x0 (auto-increment by hardware)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_DATA, ddc_data->offset << 8);
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_DATA, ddc_data->offset << 8);
/*
* 3. Write to HDMI_I2C_DATA with the following fields set in order to
@@ -586,7 +366,7 @@
* INDEX = 0x0
* INDEX_WRITE = 0x0 (auto-increment by hardware)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_DATA,
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_DATA,
(ddc_data->dev_addr | BIT(0)) << 8);
/* Data setup is complete, now setup the transaction characteristics */
@@ -599,7 +379,7 @@
* STOP0 = 0x0 (do NOT insert STOP bit)
* CNT0 = 0x1 (single byte transaction excluding address)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_TRANS0, BIT(12) | BIT(16));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_TRANS0, BIT(12) | BIT(16));
/*
* 5. Write to HDMI_I2C_TRANSACTION1 with the following fields set in
@@ -609,7 +389,7 @@
* STOP1 = 0x1 (insert STOP bit)
* CNT1 = data_len (it's 128 (0x80) for a blk read)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_TRANS1,
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_TRANS1,
BIT(0) | BIT(12) | BIT(13) | (ddc_data->request_len << 16));
/* Trigger the I2C transfer */
@@ -624,11 +404,11 @@
* GO = 0x1 (kicks off hardware)
*/
INIT_COMPLETION(ddc_ctrl->ddc_sw_done);
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_CTRL, BIT(0) | BIT(20));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_CTRL, BIT(0) | BIT(20));
time_out_count = wait_for_completion_interruptible_timeout(
&ddc_ctrl->ddc_sw_done, HZ/2);
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_INT_CTRL, BIT(1));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_INT_CTRL, BIT(1));
if (!time_out_count) {
if (ddc_data->retry-- > 0) {
DEV_INFO("%s: failed timout, retry=%d\n", __func__,
@@ -637,26 +417,26 @@
}
status = -ETIMEDOUT;
DEV_ERR("%s: timedout(7), Int Ctrl=%08x\n", __func__,
- HDMI_REG_R(ddc_ctrl->base, HDMI_DDC_INT_CTRL));
+ DSS_REG_R(ddc_ctrl->io, HDMI_DDC_INT_CTRL));
DEV_ERR("%s: DDC SW Status=%08x, HW Status=%08x\n",
__func__,
- HDMI_REG_R(ddc_ctrl->base, HDMI_DDC_SW_STATUS),
- HDMI_REG_R(ddc_ctrl->base, HDMI_DDC_HW_STATUS));
+ DSS_REG_R(ddc_ctrl->io, HDMI_DDC_SW_STATUS),
+ DSS_REG_R(ddc_ctrl->io, HDMI_DDC_HW_STATUS));
goto error;
}
/* Read DDC status */
- reg_val = HDMI_REG_R(ddc_ctrl->base, HDMI_DDC_SW_STATUS);
+ reg_val = DSS_REG_R(ddc_ctrl->io, HDMI_DDC_SW_STATUS);
reg_val &= BIT(12) | BIT(13) | BIT(14) | BIT(15);
/* Check if any NACK occurred */
if (reg_val) {
/* SW_STATUS_RESET */
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_CTRL, BIT(3));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_CTRL, BIT(3));
if (ddc_data->retry == 1)
/* SOFT_RESET */
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_CTRL, BIT(1));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_CTRL, BIT(1));
if (ddc_data->retry-- > 0) {
DEV_DBG("%s(%s): failed NACK=0x%08x, retry=%d\n",
@@ -687,13 +467,13 @@
* INDEX_WRITE = 0x1 (explicitly define offset)
*/
/* Write this data to DDC buffer */
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_DATA,
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_DATA,
BIT(0) | (3 << 16) | BIT(31));
/* Discard first byte */
- HDMI_REG_R_ND(ddc_ctrl->base, HDMI_DDC_DATA);
+ DSS_REG_R_ND(ddc_ctrl->io, HDMI_DDC_DATA);
for (ndx = 0; ndx < ddc_data->data_len; ++ndx) {
- reg_val = HDMI_REG_R_ND(ddc_ctrl->base, HDMI_DDC_DATA);
+ reg_val = DSS_REG_R_ND(ddc_ctrl->io, HDMI_DDC_DATA);
ddc_data->data_buf[ndx] = (u8)((reg_val & 0x0000FF00) >> 8);
}
@@ -705,46 +485,44 @@
void hdmi_ddc_config(struct hdmi_tx_ddc_ctrl *ddc_ctrl)
{
- if (!ddc_ctrl || !ddc_ctrl->base) {
+ if (!ddc_ctrl || !ddc_ctrl->io) {
DEV_ERR("%s: invalid input\n", __func__);
return;
}
/* Configure Pre-Scale multiplier & Threshold */
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_SPEED, (10 << 16) | (2 << 0));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_SPEED, (10 << 16) | (2 << 0));
/*
* Setting 31:24 bits : Time units to wait before timeout
* when clock is being stalled by external sink device
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_SETUP, 0xFF000000);
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_SETUP, 0xFF000000);
/* Enable reference timer to 27 micro-seconds */
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_REF, (1 << 16) | (27 << 0));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_REF, (1 << 16) | (27 << 0));
} /* hdmi_ddc_config */
int hdmi_ddc_isr(struct hdmi_tx_ddc_ctrl *ddc_ctrl)
{
- int rc = -1;
u32 ddc_int_ctrl;
- if (!ddc_ctrl || !ddc_ctrl->base) {
+ if (!ddc_ctrl || !ddc_ctrl->io) {
DEV_ERR("%s: invalid input\n", __func__);
return -EINVAL;
}
- ddc_int_ctrl = HDMI_REG_R_ND(ddc_ctrl->base, HDMI_DDC_INT_CTRL);
+ ddc_int_ctrl = DSS_REG_R_ND(ddc_ctrl->io, HDMI_DDC_INT_CTRL);
if ((ddc_int_ctrl & BIT(2)) && (ddc_int_ctrl & BIT(0))) {
/* SW_DONE INT occured, clr it */
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_INT_CTRL,
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_INT_CTRL,
ddc_int_ctrl | BIT(1));
complete(&ddc_ctrl->ddc_sw_done);
- return 0;
}
DEV_DBG("%s: ddc_int_ctrl=%04x\n", __func__, ddc_int_ctrl);
- return rc;
+ return 0;
} /* hdmi_ddc_isr */
int hdmi_ddc_read(struct hdmi_tx_ddc_ctrl *ddc_ctrl,
@@ -779,7 +557,7 @@
int log_retry_fail;
int seg_addr = 0x60, seg_num = 0x01;
- if (!ddc_ctrl || !ddc_ctrl->base || !ddc_data) {
+ if (!ddc_ctrl || !ddc_ctrl->io || !ddc_data) {
DEV_ERR("%s: invalid input\n", __func__);
return -EINVAL;
}
@@ -808,7 +586,7 @@
* INDEX = 0x0 (initial offset into buffer)
* INDEX_WRITE = 0x1 (setting initial offset)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_DATA, BIT(31) | (seg_addr << 8));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_DATA, BIT(31) | (seg_addr << 8));
/*
* 2. Write to HDMI_I2C_DATA with the following fields set in order to
@@ -818,7 +596,7 @@
* INDEX = 0x0
* INDEX_WRITE = 0x0 (auto-increment by hardware)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_DATA, seg_num << 8);
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_DATA, seg_num << 8);
/*
* 3. Write to HDMI_I2C_DATA with the following fields set in order to
@@ -828,9 +606,9 @@
* INDEX = 0x0
* INDEX_WRITE = 0x0 (auto-increment by hardware)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_DATA, ddc_data->dev_addr << 8);
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_DATA, ddc_data->offset << 8);
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_DATA,
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_DATA, ddc_data->dev_addr << 8);
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_DATA, ddc_data->offset << 8);
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_DATA,
(ddc_data->dev_addr | BIT(0)) << 8);
/* Data setup is complete, now setup the transaction characteristics */
@@ -843,7 +621,7 @@
* STOP0 = 0x0 (do NOT insert STOP bit)
* CNT0 = 0x1 (single byte transaction excluding address)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_TRANS0, BIT(12) | BIT(16));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_TRANS0, BIT(12) | BIT(16));
/*
* 5. Write to HDMI_I2C_TRANSACTION1 with the following fields set in
@@ -853,7 +631,7 @@
* STOP1 = 0x1 (insert STOP bit)
* CNT1 = data_len (it's 128 (0x80) for a blk read)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_TRANS1, BIT(12) | BIT(16));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_TRANS1, BIT(12) | BIT(16));
/*
* 5. Write to HDMI_I2C_TRANSACTION1 with the following fields set in
@@ -863,7 +641,7 @@
* STOP1 = 0x1 (insert STOP bit)
* CNT1 = data_len (it's 128 (0x80) for a blk read)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_TRANS2,
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_TRANS2,
BIT(0) | BIT(12) | BIT(13) | (ddc_data->request_len << 16));
/* Trigger the I2C transfer */
@@ -877,13 +655,13 @@
* GO = 0x1 (kicks off hardware)
*/
INIT_COMPLETION(ddc_ctrl->ddc_sw_done);
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_CTRL, BIT(0) | BIT(21));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_CTRL, BIT(0) | BIT(21));
time_out_count = wait_for_completion_interruptible_timeout(
&ddc_ctrl->ddc_sw_done, HZ/2);
- reg_val = HDMI_REG_R(ddc_ctrl->base, HDMI_DDC_INT_CTRL);
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_INT_CTRL, reg_val & (~BIT(2)));
+ reg_val = DSS_REG_R(ddc_ctrl->io, HDMI_DDC_INT_CTRL);
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_INT_CTRL, reg_val & (~BIT(2)));
if (!time_out_count) {
if (ddc_data->retry-- > 0) {
DEV_INFO("%s: failed timout, retry=%d\n", __func__,
@@ -892,25 +670,25 @@
}
status = -ETIMEDOUT;
DEV_ERR("%s: timedout(7), Int Ctrl=%08x\n", __func__,
- HDMI_REG_R(ddc_ctrl->base, HDMI_DDC_INT_CTRL));
+ DSS_REG_R(ddc_ctrl->io, HDMI_DDC_INT_CTRL));
DEV_ERR("%s: DDC SW Status=%08x, HW Status=%08x\n",
__func__,
- HDMI_REG_R(ddc_ctrl->base, HDMI_DDC_SW_STATUS),
- HDMI_REG_R(ddc_ctrl->base, HDMI_DDC_HW_STATUS));
+ DSS_REG_R(ddc_ctrl->io, HDMI_DDC_SW_STATUS),
+ DSS_REG_R(ddc_ctrl->io, HDMI_DDC_HW_STATUS));
goto error;
}
/* Read DDC status */
- reg_val = HDMI_REG_R(ddc_ctrl->base, HDMI_DDC_SW_STATUS);
+ reg_val = DSS_REG_R(ddc_ctrl->io, HDMI_DDC_SW_STATUS);
reg_val &= BIT(12) | BIT(13) | BIT(14) | BIT(15);
/* Check if any NACK occurred */
if (reg_val) {
/* SW_STATUS_RESET */
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_CTRL, BIT(3));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_CTRL, BIT(3));
if (ddc_data->retry == 1)
/* SOFT_RESET */
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_CTRL, BIT(1));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_CTRL, BIT(1));
if (ddc_data->retry-- > 0) {
DEV_DBG("%s(%s): failed NACK=0x%08x, retry=%d\n",
__func__, ddc_data->what, reg_val,
@@ -940,14 +718,14 @@
* INDEX_WRITE = 0x1 (explicitly define offset)
*/
/* Write this data to DDC buffer */
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_DATA,
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_DATA,
BIT(0) | (5 << 16) | BIT(31));
/* Discard first byte */
- HDMI_REG_R_ND(ddc_ctrl->base, HDMI_DDC_DATA);
+ DSS_REG_R_ND(ddc_ctrl->io, HDMI_DDC_DATA);
for (ndx = 0; ndx < ddc_data->data_len; ++ndx) {
- reg_val = HDMI_REG_R_ND(ddc_ctrl->base, HDMI_DDC_DATA);
+ reg_val = DSS_REG_R_ND(ddc_ctrl->io, HDMI_DDC_DATA);
ddc_data->data_buf[ndx] = (u8) ((reg_val & 0x0000FF00) >> 8);
}
@@ -964,7 +742,7 @@
int status = 0, retry = 10;
u32 time_out_count;
- if (!ddc_ctrl || !ddc_ctrl->base || !ddc_data) {
+ if (!ddc_ctrl || !ddc_ctrl->io || !ddc_data) {
DEV_ERR("%s: invalid input\n", __func__);
return -EINVAL;
}
@@ -991,7 +769,7 @@
* INDEX = 0x0 (initial offset into buffer)
* INDEX_WRITE = 0x1 (setting initial offset)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_DATA,
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_DATA,
BIT(31) | (ddc_data->dev_addr << 8));
/*
@@ -1002,7 +780,7 @@
* INDEX = 0x0
* INDEX_WRITE = 0x0 (auto-increment by hardware)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_DATA, ddc_data->offset << 8);
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_DATA, ddc_data->offset << 8);
/*
* 3. Write to HDMI_I2C_DATA with the following fields set in order to
@@ -1013,7 +791,7 @@
* INDEX_WRITE = 0x0 (auto-increment by hardware)
*/
for (ndx = 0; ndx < ddc_data->data_len; ++ndx)
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_DATA,
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_DATA,
((u32)ddc_data->data_buf[ndx]) << 8);
/* Data setup is complete, now setup the transaction characteristics */
@@ -1026,7 +804,7 @@
* STOP0 = 0x0 (do NOT insert STOP bit)
* CNT0 = 0x1 (single byte transaction excluding address)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_TRANS0, BIT(12) | BIT(16));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_TRANS0, BIT(12) | BIT(16));
/*
* 5. Write to HDMI_I2C_TRANSACTION1 with the following fields set in
@@ -1038,7 +816,7 @@
* Byte count for second transition (excluding the first
* Byte which is usually the address)
*/
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_TRANS1,
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_TRANS1,
BIT(13) | ((ddc_data->data_len-1) << 16));
/* Trigger the I2C transfer */
@@ -1051,13 +829,13 @@
* GO = 0x1 (kicks off hardware)
*/
INIT_COMPLETION(ddc_ctrl->ddc_sw_done);
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_CTRL, BIT(0) | BIT(20));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_CTRL, BIT(0) | BIT(20));
time_out_count = wait_for_completion_interruptible_timeout(
&ddc_ctrl->ddc_sw_done, HZ/2);
- reg_val = HDMI_REG_R(ddc_ctrl->base, HDMI_DDC_INT_CTRL);
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_INT_CTRL, reg_val & (~BIT(2)));
+ reg_val = DSS_REG_R(ddc_ctrl->io, HDMI_DDC_INT_CTRL);
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_INT_CTRL, reg_val & (~BIT(2)));
if (!time_out_count) {
if (retry-- > 0) {
DEV_INFO("%s[%s]: failed timout, retry=%d\n", __func__,
@@ -1067,26 +845,26 @@
status = -ETIMEDOUT;
DEV_ERR("%s[%s]: timedout, Int Ctrl=%08x\n",
__func__, ddc_data->what,
- HDMI_REG_R(ddc_ctrl->base, HDMI_DDC_INT_CTRL));
+ DSS_REG_R(ddc_ctrl->io, HDMI_DDC_INT_CTRL));
DEV_ERR("%s: DDC SW Status=%08x, HW Status=%08x\n",
__func__,
- HDMI_REG_R(ddc_ctrl->base, HDMI_DDC_SW_STATUS),
- HDMI_REG_R(ddc_ctrl->base, HDMI_DDC_HW_STATUS));
+ DSS_REG_R(ddc_ctrl->io, HDMI_DDC_SW_STATUS),
+ DSS_REG_R(ddc_ctrl->io, HDMI_DDC_HW_STATUS));
goto error;
}
/* Read DDC status */
- reg_val = HDMI_REG_R_ND(ddc_ctrl->base, HDMI_DDC_SW_STATUS);
+ reg_val = DSS_REG_R_ND(ddc_ctrl->io, HDMI_DDC_SW_STATUS);
reg_val &= 0x00001000 | 0x00002000 | 0x00004000 | 0x00008000;
/* Check if any NACK occurred */
if (reg_val) {
if (retry > 1)
/* SW_STATUS_RESET */
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_CTRL, BIT(3));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_CTRL, BIT(3));
else
/* SOFT_RESET */
- HDMI_REG_W_ND(ddc_ctrl->base, HDMI_DDC_CTRL, BIT(1));
+ DSS_REG_W_ND(ddc_ctrl->io, HDMI_DDC_CTRL, BIT(1));
if (retry-- > 0) {
DEV_DBG("%s[%s]: failed NACK=%08x, retry=%d\n",
diff --git a/drivers/video/msm/mdss/mdss_hdmi_util.h b/drivers/video/msm/mdss/mdss_hdmi_util.h
index 47515ba..852a93c 100644
--- a/drivers/video/msm/mdss/mdss_hdmi_util.h
+++ b/drivers/video/msm/mdss/mdss_hdmi_util.h
@@ -12,26 +12,7 @@
#ifndef __HDMI_UTIL_H__
#define __HDMI_UTIL_H__
-
-#define DEV_INFO(fmt, args...) pr_info(fmt, ##args)
-#define DEV_WARN(fmt, args...) pr_warn(fmt, ##args)
-#define DEV_ERR(fmt, args...) pr_err(fmt, ##args)
-
-#ifdef DEBUG
-#define DEV_DBG(fmt, args...) pr_err(fmt, ##args)
-#else
-#define DEV_DBG(args...) (void)0
-#endif
-
-#define PORT_DEBUG 0
-#define REG_DUMP 0
-void hdmi_reg_w(void __iomem *addr, u32 offset, u32 value, u32 debug);
-u32 hdmi_reg_r(void __iomem *addr, u32 offset, u32 debug);
-
-#define HDMI_REG_W_ND(addr, offset, val) hdmi_reg_w(addr, offset, val, false)
-#define HDMI_REG_W(addr, offset, val) hdmi_reg_w(addr, offset, val, true)
-#define HDMI_REG_R_ND(addr, offset) hdmi_reg_r(addr, offset, false)
-#define HDMI_REG_R(addr, offset) hdmi_reg_r(addr, offset, true)
+#include "mdss_io_util.h"
/* HDMI_TX Registers */
#define HDMI_CTRL (0x00000000)
@@ -220,7 +201,7 @@
#define HDMI_TPG_BLK_WHT_PATTERN_FRAMES (0x00000358)
#define HDMI_TPG_RGB_MAPPING (0x0000035C)
-/* HDMI PHY Registers, use them with PHY base and _ND macro */
+/* HDMI PHY Registers */
#define HDMI_PHY_ANA_CFG0 (0x00000000)
#define HDMI_PHY_ANA_CFG1 (0x00000004)
#define HDMI_PHY_PD_CTRL0 (0x00000010)
@@ -231,6 +212,10 @@
#define HDMI_PHY_BIST_PATN2 (0x00000044)
#define HDMI_PHY_BIST_PATN3 (0x00000048)
+/* QFPROM Registers for HDMI/HDCP */
+#define QFPROM_RAW_FEAT_CONFIG_ROW0_LSB (0x000000F8)
+#define QFPROM_RAW_FEAT_CONFIG_ROW0_MSB (0x000000FC)
+
/* all video formats defined by EIA CEA 861D */
#define HDMI_VFRMT_640x480p60_4_3 0
#define HDMI_VFRMT_720x480p60_4_3 1
@@ -397,7 +382,7 @@
};
struct hdmi_tx_ddc_ctrl {
- void __iomem *base;
+ struct dss_io_data *io;
struct completion ddc_sw_done;
};
@@ -412,9 +397,6 @@
int retry;
};
-void hdmi_reg_dump(void __iomem *base, u32 length, const char *prefix);
-const char *hdmi_reg_name(u32 offset);
-
const struct hdmi_disp_mode_timing_type *hdmi_get_supported_mode(u32 mode);
void hdmi_set_supported_mode(u32 mode);
const char *hdmi_get_video_fmt_2string(u32 format);
diff --git a/drivers/video/msm/mdss/mdss_io_util.c b/drivers/video/msm/mdss/mdss_io_util.c
index 65d08d3..5778525 100644
--- a/drivers/video/msm/mdss/mdss_io_util.c
+++ b/drivers/video/msm/mdss/mdss_io_util.c
@@ -10,10 +10,65 @@
* GNU General Public License for more details.
*/
+#include <linux/clk.h>
#include <linux/err.h>
#include <linux/io.h>
#include "mdss_io_util.h"
+void dss_reg_w(struct dss_io_data *io, u32 offset, u32 value, u32 debug)
+{
+ u32 in_val;
+
+ if (!io || !io->base) {
+ DEV_ERR("%pS->%s: invalid input\n",
+ __builtin_return_address(0), __func__);
+ return;
+ }
+
+ if (offset > io->len) {
+ DEV_ERR("%pS->%s: offset out of range\n",
+ __builtin_return_address(0), __func__);
+ return;
+ }
+
+ writel_relaxed(value, io->base + offset);
+ if (debug) {
+ in_val = readl_relaxed(io->base + offset);
+ DEV_DBG("[%08x] => %08x [%08x]\n", (u32)(io->base + offset),
+ value, in_val);
+ }
+} /* dss_reg_w */
+
+u32 dss_reg_r(struct dss_io_data *io, u32 offset, u32 debug)
+{
+ u32 value;
+ if (!io || !io->base) {
+ DEV_ERR("%pS->%s: invalid input\n",
+ __builtin_return_address(0), __func__);
+ return -EINVAL;
+ }
+
+ if (offset > io->len) {
+ DEV_ERR("%pS->%s: offset out of range\n",
+ __builtin_return_address(0), __func__);
+ return -EINVAL;
+ }
+
+ value = readl_relaxed(io->base + offset);
+ if (debug)
+ DEV_DBG("[%08x] <= %08x\n", (u32)(io->base + offset), value);
+
+ return value;
+} /* dss_reg_r */
+
+void dss_reg_dump(void __iomem *base, u32 length, const char *prefix,
+ u32 debug)
+{
+ if (debug)
+ print_hex_dump(KERN_INFO, prefix, DUMP_PREFIX_OFFSET, 32, 4,
+ (void *)base, length, false);
+} /* dss_reg_dump */
+
static struct resource *msm_dss_get_res_byname(struct platform_device *pdev,
unsigned int type, const char *name)
{
@@ -21,11 +76,10 @@
res = platform_get_resource_byname(pdev, type, name);
if (!res)
- pr_err("%s: '%s' resource not found\n", __func__, name);
+ DEV_ERR("%s: '%s' resource not found\n", __func__, name);
return res;
-}
-
+} /* msm_dss_get_res_byname */
int msm_dss_ioremap_byname(struct platform_device *pdev,
struct dss_io_data *io_data, const char *name)
@@ -33,32 +87,49 @@
struct resource *res = NULL;
if (!pdev || !io_data) {
- pr_err("%s: invalid input\n", __func__);
+ DEV_ERR("%pS->%s: invalid input\n",
+ __builtin_return_address(0), __func__);
return -EINVAL;
}
res = msm_dss_get_res_byname(pdev, IORESOURCE_MEM, name);
if (!res) {
- pr_err("%s: '%s' msm_dss_get_res_byname failed\n",
- __func__, name);
+ DEV_ERR("%pS->%s: '%s' msm_dss_get_res_byname failed\n",
+ __builtin_return_address(0), __func__, name);
return -ENODEV;
}
io_data->len = resource_size(res);
io_data->base = ioremap(res->start, io_data->len);
if (!io_data->base) {
- pr_err("%s: '%s' ioremap failed\n", __func__, name);
+ DEV_ERR("%pS->%s: '%s' ioremap failed\n",
+ __builtin_return_address(0), __func__, name);
return -EIO;
}
return 0;
-}
+} /* msm_dss_ioremap_byname */
+
+void msm_dss_iounmap(struct dss_io_data *io_data)
+{
+ if (!io_data) {
+ DEV_ERR("%pS->%s: invalid input\n",
+ __builtin_return_address(0), __func__);
+ return;
+ }
+
+ if (io_data->base) {
+ iounmap(io_data->base);
+ io_data->base = NULL;
+ }
+ io_data->len = 0;
+} /* msm_dss_iounmap */
int msm_dss_config_vreg(struct device *dev, struct dss_vreg *in_vreg,
int num_vreg, int config)
{
int i = 0, rc = 0;
- struct dss_vreg *curr_vreg;
+ struct dss_vreg *curr_vreg = NULL;
if (config) {
for (i = 0; i < num_vreg; i++) {
@@ -67,8 +138,8 @@
curr_vreg->vreg_name);
rc = IS_ERR(curr_vreg->vreg);
if (rc) {
- pr_err("%s: %s get failed. rc=%d\n",
- __func__,
+ DEV_ERR("%pS->%s: %s get failed. rc=%d\n",
+ __builtin_return_address(0), __func__,
curr_vreg->vreg_name, rc);
curr_vreg->vreg = NULL;
goto vreg_get_fail;
@@ -79,7 +150,8 @@
curr_vreg->min_voltage,
curr_vreg->max_voltage);
if (rc < 0) {
- pr_err("%s: %s set voltage failed\n",
+ DEV_ERR("%pS->%s: %s set vltg fail\n",
+ __builtin_return_address(0),
__func__,
curr_vreg->vreg_name);
goto vreg_set_voltage_fail;
@@ -89,8 +161,9 @@
curr_vreg->vreg,
curr_vreg->optimum_voltage);
if (rc < 0) {
- pr_err(
- "%s: %s set opt mode failed\n",
+ DEV_ERR(
+ "%pS->%s: %s set opt m fail\n",
+ __builtin_return_address(0),
__func__,
curr_vreg->vreg_name);
goto vreg_set_opt_mode_fail;
@@ -144,14 +217,16 @@
for (i = 0; i < num_vreg; i++) {
rc = IS_ERR(in_vreg[i].vreg);
if (rc) {
- pr_err("%s: %s regulator error. rc=%d\n",
- __func__, in_vreg[i].vreg_name, rc);
+ DEV_ERR("%pS->%s: %s regulator error. rc=%d\n",
+ __builtin_return_address(0), __func__,
+ in_vreg[i].vreg_name, rc);
goto disable_vreg;
}
rc = regulator_enable(in_vreg[i].vreg);
if (rc < 0) {
- pr_err("%s: %s enable failed\n",
- __func__, in_vreg[i].vreg_name);
+ DEV_ERR("%pS->%s: %s enable failed\n",
+ __builtin_return_address(0), __func__,
+ in_vreg[i].vreg_name);
goto disable_vreg;
}
}
@@ -176,8 +251,9 @@
rc = gpio_request(in_gpio[i].gpio,
in_gpio[i].gpio_name);
if (rc < 0) {
- pr_err("%s: %s enable failed\n",
- __func__, in_gpio[i].gpio_name);
+ DEV_ERR("%pS->%s: %s enable failed\n",
+ __builtin_return_address(0), __func__,
+ in_gpio[i].gpio_name);
goto disable_gpio;
}
}
@@ -192,3 +268,117 @@
gpio_free(in_gpio[i].gpio);
return rc;
} /* msm_dss_enable_gpio */
+
+void msm_dss_put_clk(struct dss_clk *clk_arry, int num_clk)
+{
+ int i;
+
+ for (i = num_clk - 1; i >= 0; i--) {
+ if (clk_arry[i].clk)
+ clk_put(clk_arry[i].clk);
+ clk_arry[i].clk = NULL;
+ }
+} /* msm_dss_put_clk */
+
+int msm_dss_get_clk(struct device *dev, struct dss_clk *clk_arry, int num_clk)
+{
+ int i, rc = 0;
+
+ for (i = 0; i < num_clk; i++) {
+ clk_arry[i].clk = clk_get(dev, clk_arry[i].clk_name);
+ rc = IS_ERR(clk_arry[i].clk);
+ if (rc) {
+ DEV_ERR("%pS->%s: '%s' get failed. rc=%d\n",
+ __builtin_return_address(0), __func__,
+ clk_arry[i].clk_name, rc);
+ goto error;
+ }
+ }
+
+ return rc;
+
+error:
+ msm_dss_put_clk(clk_arry, num_clk);
+
+ return rc;
+} /* msm_dss_get_clk */
+
+int msm_dss_clk_set_rate(struct dss_clk *clk_arry, int num_clk)
+{
+ int i, rc = 0;
+
+ for (i = 0; i < num_clk; i++) {
+ if (clk_arry[i].clk) {
+ if (DSS_CLK_AHB != clk_arry[i].type) {
+ DEV_DBG("%pS->%s: '%s' rate %ld\n",
+ __builtin_return_address(0), __func__,
+ clk_arry[i].clk_name,
+ clk_arry[i].rate);
+ rc = clk_set_rate(clk_arry[i].clk,
+ clk_arry[i].rate);
+ if (rc) {
+ DEV_ERR("%pS->%s: %s failed. rc=%d\n",
+ __builtin_return_address(0),
+ __func__,
+ clk_arry[i].clk_name, rc);
+ break;
+ }
+ }
+ } else {
+ DEV_ERR("%pS->%s: '%s' is not available\n",
+ __builtin_return_address(0), __func__,
+ clk_arry[i].clk_name);
+ rc = -EPERM;
+ break;
+ }
+ }
+
+ return rc;
+} /* msm_dss_clk_set_rate */
+
+int msm_dss_enable_clk(struct dss_clk *clk_arry, int num_clk, int enable)
+{
+ int i, rc = 0;
+
+ if (enable) {
+ for (i = 0; i < num_clk; i++) {
+ DEV_DBG("%pS->%s: enable '%s'\n",
+ __builtin_return_address(0), __func__,
+ clk_arry[i].clk_name);
+ if (clk_arry[i].clk) {
+ rc = clk_prepare_enable(clk_arry[i].clk);
+ if (rc)
+ DEV_ERR("%pS->%s: %s en fail. rc=%d\n",
+ __builtin_return_address(0),
+ __func__,
+ clk_arry[i].clk_name, rc);
+ } else {
+ DEV_ERR("%pS->%s: '%s' is not available\n",
+ __builtin_return_address(0), __func__,
+ clk_arry[i].clk_name);
+ rc = -EPERM;
+ }
+
+ if (rc) {
+ msm_dss_enable_clk(&clk_arry[i],
+ i, false);
+ break;
+ }
+ }
+ } else {
+ for (i = num_clk - 1; i >= 0; i--) {
+ DEV_DBG("%pS->%s: disable '%s'\n",
+ __builtin_return_address(0), __func__,
+ clk_arry[i].clk_name);
+
+ if (clk_arry[i].clk)
+ clk_disable_unprepare(clk_arry[i].clk);
+ else
+ DEV_ERR("%pS->%s: '%s' is not available\n",
+ __builtin_return_address(0), __func__,
+ clk_arry[i].clk_name);
+ }
+ }
+
+ return rc;
+} /* msm_dss_enable_clk */
diff --git a/drivers/video/msm/mdss/mdss_io_util.h b/drivers/video/msm/mdss/mdss_io_util.h
index 9671414..51e9e54 100644
--- a/drivers/video/msm/mdss/mdss_io_util.h
+++ b/drivers/video/msm/mdss/mdss_io_util.h
@@ -17,11 +17,29 @@
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
+#ifdef DEBUG
+#define DEV_DBG(fmt, args...) pr_err(fmt, ##args)
+#else
+#define DEV_DBG(fmt, args...) pr_debug(fmt, ##args)
+#endif
+#define DEV_INFO(fmt, args...) pr_info(fmt, ##args)
+#define DEV_WARN(fmt, args...) pr_warn(fmt, ##args)
+#define DEV_ERR(fmt, args...) pr_err(fmt, ##args)
+
struct dss_io_data {
u32 len;
void __iomem *base;
};
+void dss_reg_w(struct dss_io_data *io, u32 offset, u32 value, u32 debug);
+u32 dss_reg_r(struct dss_io_data *io, u32 offset, u32 debug);
+void dss_reg_dump(void __iomem *base, u32 len, const char *prefix, u32 debug);
+
+#define DSS_REG_W_ND(io, offset, val) dss_reg_w(io, offset, val, false)
+#define DSS_REG_W(io, offset, val) dss_reg_w(io, offset, val, true)
+#define DSS_REG_R_ND(io, offset) dss_reg_r(io, offset, false)
+#define DSS_REG_R(io, offset) dss_reg_r(io, offset, true)
+
enum dss_vreg_type {
DSS_REG_LDO,
DSS_REG_VS,
@@ -41,19 +59,42 @@
char gpio_name[32];
};
+enum dss_clk_type {
+ DSS_CLK_AHB, /* no set rate. rate controlled through rpm */
+ DSS_CLK_PCLK,
+ DSS_CLK_OTHER,
+};
+
+struct dss_clk {
+ struct clk *clk; /* clk handle */
+ char clk_name[32];
+ enum dss_clk_type type;
+ unsigned long rate;
+};
+
struct dss_module_power {
unsigned num_vreg;
struct dss_vreg *vreg_config;
unsigned num_gpio;
struct dss_gpio *gpio_config;
+ unsigned num_clk;
+ struct dss_clk *clk_config;
};
int msm_dss_ioremap_byname(struct platform_device *pdev,
struct dss_io_data *io_data, const char *name);
+void msm_dss_iounmap(struct dss_io_data *io_data);
+
int msm_dss_enable_gpio(struct dss_gpio *in_gpio, int num_gpio, int enable);
int msm_dss_gpio_enable(struct dss_gpio *in_gpio, int num_gpio, int enable);
+
int msm_dss_config_vreg(struct device *dev, struct dss_vreg *in_vreg,
int num_vreg, int config);
int msm_dss_enable_vreg(struct dss_vreg *in_vreg, int num_vreg, int enable);
+int msm_dss_get_clk(struct device *dev, struct dss_clk *clk_arry, int num_clk);
+void msm_dss_put_clk(struct dss_clk *clk_arry, int num_clk);
+int msm_dss_clk_set_rate(struct dss_clk *clk_arry, int num_clk);
+int msm_dss_enable_clk(struct dss_clk *clk_arry, int num_clk, int enable);
+
#endif /* __MDSS_IO_UTIL_H__ */
diff --git a/drivers/video/msm/mdss/mdss_mdp.c b/drivers/video/msm/mdss/mdss_mdp.c
index 80e056f..0f6cfe9 100644
--- a/drivers/video/msm/mdss/mdss_mdp.c
+++ b/drivers/video/msm/mdss/mdss_mdp.c
@@ -128,6 +128,8 @@
static DEFINE_SPINLOCK(mdss_lock);
struct mdss_hw *mdss_irq_handlers[MDSS_MAX_HW_BLK];
+static int mdss_mdp_register_early_suspend(struct mdss_data_type *mdata);
+
static inline int mdss_irq_dispatch(u32 hw_ndx, int irq, void *ptr)
{
struct mdss_hw *hw;
@@ -216,8 +218,9 @@
spin_lock_irqsave(&mdss_lock, irq_flags);
if (!(mdss_res->irq_mask & ndx_bit)) {
- pr_warn("MDSS HW ndx=%d is NOT set, mask=%x\n",
- hw->hw_ndx, mdss_res->mdp_irq_mask);
+ pr_warn("MDSS HW ndx=%d is NOT set, mask=%x, hist mask=%x\n",
+ hw->hw_ndx, mdss_res->mdp_irq_mask,
+ mdss_res->mdp_hist_irq_mask);
} else {
mdss_irq_handlers[hw->hw_ndx] = NULL;
mdss_res->irq_mask &= ~ndx_bit;
@@ -244,8 +247,9 @@
spin_lock(&mdss_lock);
if (!(mdss_res->irq_mask & ndx_bit)) {
- pr_warn("MDSS HW ndx=%d is NOT set, mask=%x\n",
- hw->hw_ndx, mdss_res->mdp_irq_mask);
+ pr_warn("MDSS HW ndx=%d is NOT set, mask=%x, hist mask=%x\n",
+ hw->hw_ndx, mdss_res->mdp_irq_mask,
+ mdss_res->mdp_hist_irq_mask);
} else {
mdss_irq_handlers[hw->hw_ndx] = NULL;
mdss_res->irq_mask &= ~ndx_bit;
@@ -357,6 +361,29 @@
return ret;
}
+int mdss_mdp_hist_irq_enable(u32 irq)
+{
+ unsigned long irq_flags;
+ int ret = 0;
+
+ spin_lock_irqsave(&mdp_lock, irq_flags);
+ if (mdss_res->mdp_hist_irq_mask & irq) {
+ pr_warn("MDSS MDP Hist IRQ-0x%x is already set, mask=%x\n",
+ irq, mdss_res->mdp_hist_irq_mask);
+ ret = -EBUSY;
+ } else {
+ pr_debug("MDP IRQ mask old=%x new=%x\n",
+ mdss_res->mdp_hist_irq_mask, irq);
+ mdss_res->mdp_hist_irq_mask |= irq;
+ MDSS_MDP_REG_WRITE(MDSS_MDP_REG_HIST_INTR_CLEAR, irq);
+ MDSS_MDP_REG_WRITE(MDSS_MDP_REG_HIST_INTR_EN,
+ mdss_res->mdp_hist_irq_mask);
+ mdss_enable_irq(&mdss_mdp_hw);
+ }
+ spin_unlock_irqrestore(&mdp_lock, irq_flags);
+
+ return ret;
+}
void mdss_mdp_irq_disable(u32 intr_type, u32 intf_num)
{
@@ -374,7 +401,27 @@
MDSS_MDP_REG_WRITE(MDSS_MDP_REG_INTR_EN,
mdss_res->mdp_irq_mask);
- if (mdss_res->mdp_irq_mask == 0)
+ if ((mdss_res->mdp_irq_mask == 0) &&
+ (mdss_res->mdp_hist_irq_mask == 0))
+ mdss_disable_irq(&mdss_mdp_hw);
+ }
+ spin_unlock_irqrestore(&mdp_lock, irq_flags);
+}
+
+void mdss_mdp_hist_irq_disable(u32 irq)
+{
+ unsigned long irq_flags;
+
+ spin_lock_irqsave(&mdp_lock, irq_flags);
+ if (!(mdss_res->mdp_hist_irq_mask & irq)) {
+ pr_warn("MDSS MDP IRQ-%x is NOT set, mask=%x\n",
+ irq, mdss_res->mdp_hist_irq_mask);
+ } else {
+ mdss_res->mdp_hist_irq_mask &= ~irq;
+ MDSS_MDP_REG_WRITE(MDSS_MDP_REG_HIST_INTR_EN,
+ mdss_res->mdp_hist_irq_mask);
+ if ((mdss_res->mdp_irq_mask == 0) &&
+ (mdss_res->mdp_hist_irq_mask == 0))
mdss_disable_irq(&mdss_mdp_hw);
}
spin_unlock_irqrestore(&mdp_lock, irq_flags);
@@ -394,7 +441,8 @@
mdss_res->mdp_irq_mask &= ~irq;
MDSS_MDP_REG_WRITE(MDSS_MDP_REG_INTR_EN,
mdss_res->mdp_irq_mask);
- if (mdss_res->mdp_irq_mask == 0)
+ if ((mdss_res->mdp_irq_mask == 0) &&
+ (mdss_res->mdp_hist_irq_mask == 0))
mdss_disable_irq_nosync(&mdss_mdp_hw);
}
spin_unlock(&mdp_lock);
@@ -846,110 +894,197 @@
pr_err("unable to initialize mdss mdp resources\n");
goto probe_done;
}
+ rc = mdss_mdp_pp_init(&pdev->dev);
+ if (rc) {
+ pr_err("unable to initialize mdss pp resources\n");
+ goto probe_done;
+ }
rc = mdss_mdp_bus_scale_register(mdata);
+ if (rc) {
+ pr_err("unable to register bus scaling\n");
+ goto probe_done;
+ }
+
+ rc = mdss_mdp_register_early_suspend(mdata);
+ if (rc) {
+ pr_err("unable to register early suspend\n");
+ goto probe_done;
+ }
probe_done:
- if (IS_ERR_VALUE(rc))
+ if (IS_ERR_VALUE(rc)) {
mdss_res = NULL;
+ mdss_mdp_pp_term(&pdev->dev);
+ }
return rc;
}
-void mdss_mdp_footswitch_ctrl(int on)
+static void mdss_mdp_footswitch_ctrl(struct mdss_data_type *mdata, int on)
{
mutex_lock(&mdp_suspend_mutex);
- if (!mdss_res->suspend || mdss_res->eintf_ena || !mdss_res->fs) {
+ if (!mdata->suspend || mdata->eintf_ena || !mdata->fs) {
mutex_unlock(&mdp_suspend_mutex);
return;
}
- if (on && !mdss_res->fs_ena) {
+ if (on && !mdata->fs_ena) {
pr_debug("Enable MDP FS\n");
- regulator_enable(mdss_res->fs);
+ regulator_enable(mdata->fs);
mdss_iommu_attach();
- mdss_res->fs_ena = true;
- } else if (!on && mdss_res->fs_ena) {
+ mdata->fs_ena = true;
+ } else if (!on && mdata->fs_ena) {
pr_debug("Disable MDP FS\n");
mdss_iommu_dettach();
- regulator_disable(mdss_res->fs);
- mdss_res->fs_ena = false;
+ regulator_disable(mdata->fs);
+ mdata->fs_ena = false;
}
mutex_unlock(&mdp_suspend_mutex);
}
-#ifdef CONFIG_PM
-static void mdss_mdp_suspend_sub(void)
-{
- cancel_delayed_work(&mdss_res->clk_ctrl_worker);
-
- flush_workqueue(mdss_res->clk_ctrl_wq);
-
- mdss_mdp_clk_ctrl(MDP_BLOCK_MASTER_OFF, false);
-
- mutex_lock(&mdp_suspend_mutex);
- mdss_res->suspend = true;
- mutex_unlock(&mdp_suspend_mutex);
-}
-
-static int mdss_mdp_suspend(struct platform_device *pdev, pm_message_t state)
+static inline int mdss_mdp_suspend_sub(struct mdss_data_type *mdata)
{
int ret;
- pr_debug("display suspend");
ret = mdss_fb_suspend_all();
if (IS_ERR_VALUE(ret)) {
pr_err("Unable to suspend all fb panels (%d)\n", ret);
return ret;
}
- mdss_mdp_suspend_sub();
- if (mdss_res->clk_ena) {
+
+ cancel_delayed_work(&mdata->clk_ctrl_worker);
+
+ flush_workqueue(mdata->clk_ctrl_wq);
+
+ mdss_mdp_clk_ctrl(MDP_BLOCK_MASTER_OFF, false);
+
+ mutex_lock(&mdp_suspend_mutex);
+ mdata->suspend = true;
+ mutex_unlock(&mdp_suspend_mutex);
+
+ if (mdata->clk_ena) {
pr_err("MDP suspend failed\n");
return -EBUSY;
}
- mdss_mdp_footswitch_ctrl(false);
+ mdss_mdp_footswitch_ctrl(mdata, false);
+
+ pr_debug("suspend done\n");
return 0;
}
+static inline int mdss_mdp_resume_sub(struct mdss_data_type *mdata)
+{
+ int ret = 0;
+
+ mdss_mdp_footswitch_ctrl(mdata, true);
+ mutex_lock(&mdp_suspend_mutex);
+ mdata->suspend = false;
+ mutex_unlock(&mdp_suspend_mutex);
+ mdss_hw_init(mdata);
+ ret = mdss_fb_resume_all();
+ if (IS_ERR_VALUE(ret))
+ pr_err("Unable to resume all fb panels (%d)\n", ret);
+
+ pr_debug("resume done\n");
+
+ return ret;
+}
+
+#if defined(CONFIG_PM) && !defined(CONFIG_HAS_EARLYSUSPEND)
+static int mdss_mdp_suspend(struct platform_device *pdev, pm_message_t state)
+{
+ struct mdss_data_type *mdata = platform_get_drvdata(pdev);
+
+ if (!mdata)
+ return -ENODEV;
+
+ pr_debug("display suspend\n");
+
+ return mdss_mdp_suspend_sub(mdata);
+}
+
static int mdss_mdp_resume(struct platform_device *pdev)
{
struct mdss_data_type *mdata = platform_get_drvdata(pdev);
- int ret = 0;
if (!mdata)
return -ENODEV;
- pr_debug("resume display");
+ pr_debug("display resume\n");
- mdss_mdp_footswitch_ctrl(true);
- mutex_lock(&mdp_suspend_mutex);
- mdss_res->suspend = false;
- mutex_unlock(&mdp_suspend_mutex);
- ret = mdss_fb_resume_all();
- if (IS_ERR_VALUE(ret))
- pr_err("Unable to resume all fb panels (%d)\n", ret);
-
- mdss_hw_init(mdata);
- return ret;
+ return mdss_mdp_resume_sub(mdata);
}
#else
#define mdss_mdp_suspend NULL
#define mdss_mdp_resume NULL
#endif
+#ifdef CONFIG_HAS_EARLYSUSPEND
+static void mdss_mdp_early_suspend(struct early_suspend *h)
+{
+ struct mdss_data_type *mdata;
+ mdata = container_of(h, struct mdss_data_type, early_suspend);
+
+ pr_debug("display early suspend\n");
+
+ mdss_mdp_suspend_sub(mdata);
+}
+
+static void mdss_mdp_late_resume(struct early_suspend *h)
+{
+ struct mdss_data_type *mdata;
+ mdata = container_of(h, struct mdss_data_type, early_suspend);
+
+ pr_debug("display early resume\n");
+
+ mdss_mdp_resume_sub(mdata);
+}
+
+static int mdss_mdp_register_early_suspend(struct mdss_data_type *mdata)
+{
+ mdata->early_suspend.suspend = mdss_mdp_early_suspend;
+ mdata->early_suspend.resume = mdss_mdp_late_resume;
+ mdata->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN;
+ register_early_suspend(&mdata->early_suspend);
+
+ return 0;
+}
+
+static int mdss_mdp_remove_early_suspend(struct mdss_data_type *mdata)
+{
+ unregister_early_suspend(&mdata->early_suspend);
+
+ return 0;
+}
+#else
+static int mdss_mdp_register_early_suspend(struct mdss_data_type *mdata)
+{
+ return 0;
+}
+static int mdss_mdp_remove_early_suspend(struct mdss_data_type *mdata)
+{
+ return 0;
+}
+#endif
+
static int mdss_mdp_remove(struct platform_device *pdev)
{
struct mdss_data_type *mdata = platform_get_drvdata(pdev);
if (!mdata)
return -ENODEV;
pm_runtime_disable(&pdev->dev);
+ mdss_mdp_pp_term(&pdev->dev);
mdss_mdp_bus_scale_unregister(mdata);
+ mdss_mdp_remove_early_suspend(mdata);
return 0;
}
static const struct of_device_id mdss_mdp_dt_match[] = {
{ .compatible = "qcom,mdss_mdp",},
+ {}
};
MODULE_DEVICE_TABLE(of, mdss_mdp_dt_match);
+EXPORT_COMPAT("qcom,mdss_mdp");
static struct platform_driver mdss_mdp_driver = {
.probe = mdss_mdp_probe,
diff --git a/drivers/video/msm/mdss/mdss_mdp.h b/drivers/video/msm/mdss/mdss_mdp.h
index a77c18e..6fd642f 100644
--- a/drivers/video/msm/mdss/mdss_mdp.h
+++ b/drivers/video/msm/mdss/mdss_mdp.h
@@ -29,7 +29,7 @@
#define MDP_CLK_DEFAULT_RATE 37500000
#define PHASE_STEP_SHIFT 21
#define MAX_MIXER_WIDTH 2048
-#define MAX_MIXER_HEIGHT 2048
+#define MAX_MIXER_HEIGHT 2400
#define MAX_IMG_WIDTH 0x3FFF
#define MAX_IMG_HEIGHT 0x3FFF
#define MIN_DST_W 10
@@ -242,6 +242,7 @@
struct mdss_mdp_data buffers[2];
struct list_head list;
+ struct mdp_overlay_pp_params pp_cfg;
};
struct mdss_mdp_writeback_arg {
@@ -250,6 +251,7 @@
void *priv_data;
};
+#define is_vig_pipe(_pipe_id_) ((_pipe_id_) <= MDSS_MDP_SSPP_VIG2)
static inline void mdss_mdp_ctl_write(struct mdss_mdp_ctl *ctl,
u32 reg, u32 val)
{
@@ -266,6 +268,8 @@
irqreturn_t mdss_mdp_isr(int irq, void *ptr);
int mdss_mdp_irq_enable(u32 intr_type, u32 intf_num);
void mdss_mdp_irq_disable(u32 intr_type, u32 intf_num);
+int mdss_mdp_hist_irq_enable(u32 irq);
+void mdss_mdp_hist_irq_disable(u32 irq);
void mdss_mdp_irq_disable_nosync(u32 intr_type, u32 intf_num);
int mdss_mdp_set_intr_callback(u32 intr_type, u32 intf_num,
void (*fnc_ptr)(void *), void *arg);
@@ -275,10 +279,10 @@
unsigned long mdss_mdp_get_clk_rate(u32 clk_idx);
int mdss_mdp_vsync_clk_enable(int enable);
void mdss_mdp_clk_ctrl(int enable, int isr);
-void mdss_mdp_footswitch_ctrl(int on);
int mdss_mdp_overlay_init(struct msm_fb_data_type *mfd);
int mdss_mdp_overlay_release_all(struct msm_fb_data_type *mfd);
+int mdss_mdp_overlay_vsync_ctrl(struct msm_fb_data_type *mfd, int en);
int mdss_mdp_video_start(struct mdss_mdp_ctl *ctl);
int mdss_mdp_writeback_start(struct mdss_mdp_ctl *ctl);
@@ -295,7 +299,24 @@
int mdss_mdp_display_commit(struct mdss_mdp_ctl *ctl, void *arg);
int mdss_mdp_csc_setup(u32 block, u32 blk_idx, u32 tbl_idx, u32 csc_type);
-int mdss_mdp_dspp_setup(struct mdss_mdp_ctl *ctl, struct mdss_mdp_mixer *mixer);
+int mdss_mdp_csc_setup_data(u32 block, u32 blk_idx, u32 tbl_idx,
+ struct mdp_csc_cfg *data);
+
+int mdss_mdp_pp_setup(struct mdss_mdp_ctl *ctl);
+int mdss_mdp_pcc_config(struct mdp_pcc_cfg_data *cfg_ptr, u32 *copyback);
+
+int mdss_mdp_igc_lut_config(struct mdp_igc_lut_data *config, u32 *copyback);
+int mdss_mdp_argc_config(struct mdp_pgc_lut_data *config, u32 *copyback);
+int mdss_mdp_hist_lut_config(struct mdp_hist_lut_data *config, u32 *copyback);
+int mdss_mdp_dither_config(struct mdp_dither_cfg_data *config, u32 *copyback);
+int mdss_mdp_gamut_config(struct mdp_gamut_cfg_data *config, u32 *copyback);
+
+int mdss_mdp_histogram_start(struct mdp_histogram_start_req *req);
+int mdss_mdp_histogram_stop(u32 block);
+int mdss_mdp_hist_collect(struct fb_info *info,
+ struct mdp_histogram_data *hist, u32 *hist_data_addr);
+void mdss_mdp_hist_intr_done(u32 isr);
+
struct mdss_mdp_pipe *mdss_mdp_pipe_alloc_pnum(u32 pnum);
struct mdss_mdp_pipe *mdss_mdp_pipe_alloc_locked(u32 type);
@@ -318,4 +339,9 @@
int mdss_mdp_wb_kickoff(struct mdss_mdp_ctl *ctl);
int mdss_mdp_wb_ioctl_handler(struct msm_fb_data_type *mfd, u32 cmd, void *arg);
+int mdss_mdp_pp_init(struct device *dev);
+void mdss_mdp_pp_term(struct device *dev);
+int mdss_mdp_pa_config(struct mdp_pa_cfg_data *config, u32 *copyback);
+
+int mdss_mdp_get_ctl_mixers(u32 fb_num, u32 *mixer_id);
#endif /* MDSS_MDP_H */
diff --git a/drivers/video/msm/mdss/mdss_mdp_ctl.c b/drivers/video/msm/mdss/mdss_mdp_ctl.c
index 1486779..5966989 100644
--- a/drivers/video/msm/mdss/mdss_mdp_ctl.c
+++ b/drivers/video/msm/mdss/mdss_mdp_ctl.c
@@ -20,8 +20,8 @@
#include "mdss_fb.h"
#include "mdss_mdp.h"
-/* 1.10 bus fudge factor */
-#define MDSS_MDP_BUS_FUDGE_FACTOR(val) ALIGN((((val) * 11) / 10), SZ_16M)
+/* 1.5 bus fudge factor */
+#define MDSS_MDP_BUS_FUDGE_FACTOR(val) ALIGN((((val) * 3) / 2), SZ_16M)
/* 1.25 clock fudge factor */
#define MDSS_MDP_CLK_FUDGE_FACTOR(val) (((val) * 5) / 4)
@@ -63,7 +63,6 @@
}
}
if (flags & MDSS_MDP_PERF_UPDATE_BUS) {
- bus_ab_quota = MDSS_MDP_BUS_FUDGE_FACTOR(bus_ab_quota);
bus_ib_quota = MDSS_MDP_BUS_FUDGE_FACTOR(bus_ib_quota);
mdss_mdp_bus_scale_set_quota(bus_ab_quota, bus_ib_quota);
}
@@ -352,6 +351,7 @@
{
struct mdss_mdp_ctl *ctl;
u32 width, height;
+ int ret = 0;
if (!mfd)
return -ENODEV;
@@ -364,43 +364,54 @@
return -EINVAL;
}
- ctl = mdss_mdp_ctl_alloc();
-
- if (!ctl) {
- pr_err("unable to allocate ctl\n");
- return -ENOMEM;
+ if (!mfd->ctl) {
+ ctl = mdss_mdp_ctl_alloc();
+ if (!ctl) {
+ pr_err("unable to allocate ctl\n");
+ return -ENOMEM;
+ }
+ ctl->mfd = mfd;
+ mfd->ctl = ctl;
+ } else {
+ ctl = mfd->ctl;
}
- ctl->mfd = mfd;
ctl->width = width;
ctl->height = height;
ctl->dst_format = mfd->panel_info.out_format;
- ctl->mixer_left = mdss_mdp_mixer_alloc(MDSS_MDP_MIXER_TYPE_INTF);
if (!ctl->mixer_left) {
- pr_err("unable to allocate layer mixer\n");
- mdss_mdp_ctl_free(ctl);
- return -ENOMEM;
+ ctl->mixer_left =
+ mdss_mdp_mixer_alloc(MDSS_MDP_MIXER_TYPE_INTF);
+ if (!ctl->mixer_left) {
+ pr_err("unable to allocate layer mixer\n");
+ ret = -ENOMEM;
+ goto ctl_init_fail;
+ }
}
- ctl->mixer_left->width = MIN(width, MAX_MIXER_WIDTH);
+ if (width > MAX_MIXER_WIDTH)
+ width /= 2;
+
+ ctl->mixer_left->width = width;
ctl->mixer_left->height = height;
ctl->mixer_left->ctl = ctl;
- width -= ctl->mixer_left->width;
-
- if (width) {
- ctl->mixer_right =
- mdss_mdp_mixer_alloc(MDSS_MDP_MIXER_TYPE_INTF);
- if (!ctl->mixer_right) {
- pr_err("unable to allocate layer mixer\n");
- mdss_mdp_mixer_free(ctl->mixer_left);
- mdss_mdp_ctl_free(ctl);
- return -ENOMEM;
+ if (width < ctl->width) {
+ if (ctl->mixer_right == NULL) {
+ ctl->mixer_right =
+ mdss_mdp_mixer_alloc(MDSS_MDP_MIXER_TYPE_INTF);
+ if (!ctl->mixer_right) {
+ pr_err("unable to allocate right mixer\n");
+ ret = -ENOMEM;
+ goto ctl_init_fail;
+ }
}
ctl->mixer_right->width = width;
ctl->mixer_right->height = height;
ctl->mixer_right->ctl = ctl;
+ } else if (ctl->mixer_right) {
+ mdss_mdp_mixer_free(ctl->mixer_right);
}
switch (mfd->panel_info.type) {
@@ -432,9 +443,8 @@
break;
default:
pr_err("unsupported panel type (%d)\n", mfd->panel_info.type);
- mdss_mdp_ctl_free(ctl);
- return -EINVAL;
-
+ ret = -EINVAL;
+ goto ctl_init_fail;
}
ctl->opmode |= (ctl->intf_num << 4);
@@ -444,9 +454,17 @@
MDSS_MDP_CTL_OP_PACK_3D_H_ROW_INT;
}
- mfd->ctl = ctl;
+ctl_init_fail:
+ if (IS_ERR_VALUE(ret)) {
+ if (ctl->mixer_left)
+ mdss_mdp_mixer_free(ctl->mixer_left);
+ if (ctl->mixer_right)
+ mdss_mdp_mixer_free(ctl->mixer_right);
+ mdss_mdp_ctl_free(ctl);
+ mfd->ctl = NULL;
+ }
- return 0;
+ return ret;
}
static int mdss_mdp_ctl_destroy(struct msm_fb_data_type *mfd)
@@ -487,14 +505,18 @@
return -ENODEV;
}
- if (!mfd->ctl) {
- if (mdss_mdp_ctl_init(mfd)) {
- pr_err("unable to initialize ctl\n");
- return -ENODEV;
- }
+ if (mdss_mdp_ctl_init(mfd)) {
+ pr_err("unable to initialize ctl\n");
+ return -ENODEV;
}
+
ctl = mfd->ctl;
+ if (ctl->power_on) {
+ WARN(1, "already on!\n");
+ return 0;
+ }
+
mutex_lock(&ctl->lock);
ctl->power_on = true;
@@ -572,12 +594,30 @@
ctl = mfd->ctl;
+ if (!ctl->power_on) {
+ WARN(1, "already off!\n");
+ return 0;
+ }
+
pr_debug("ctl_num=%d\n", mfd->ctl->num);
+ mdss_mdp_overlay_release_all(mfd);
+
+ /* request bus bandwidth for panel commands */
+ ctl->bus_ib_quota = SZ_1M;
+ mdss_mdp_ctl_perf_commit(MDSS_MDP_PERF_UPDATE_ALL);
+
mutex_lock(&ctl->lock);
ctl->power_on = false;
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+
+ if (pdata->intf_unprepare)
+ ret = pdata->intf_unprepare(pdata);
+
+ if (ret)
+ pr_err("%s: intf_unprepare failed\n", __func__);
+
if (ctl->stop_fnc)
ret = ctl->stop_fnc(ctl);
else
@@ -587,6 +627,7 @@
pr_warn("error powering off intf ctl=%d\n", ctl->num);
ret = pdata->off(pdata);
+
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
ctl->play_cnt = 0;
@@ -595,8 +636,6 @@
mutex_unlock(&ctl->lock);
- mdss_mdp_overlay_release_all(mfd);
-
if (!mfd->ref_cnt)
mdss_mdp_ctl_destroy(mfd);
@@ -808,9 +847,6 @@
{
mixer->params_changed = 0;
- if (mixer->type == MDSS_MDP_MIXER_TYPE_INTF)
- mdss_mdp_dspp_setup(mixer->ctl, mixer);
-
/* skip mixer setup for rotator */
if (!mixer->rotator_mode)
mdss_mdp_mixer_setup(mixer->ctl, mixer);
@@ -864,6 +900,8 @@
ctl->flush_bits |= BIT(17); /* CTL */
}
+ /* postprocessing setup, including dspp */
+ mdss_mdp_pp_setup(ctl);
mdss_mdp_ctl_write(ctl, MDSS_MDP_REG_CTL_FLUSH, ctl->flush_bits);
wmb();
ctl->flush_bits = 0;
@@ -885,3 +923,30 @@
return ret;
}
+
+int mdss_mdp_get_ctl_mixers(u32 fb_num, u32 *mixer_id)
+{
+ int i;
+ struct mdss_mdp_ctl *ctl;
+ u32 mixer_cnt = 0;
+ mutex_lock(&mdss_mdp_ctl_lock);
+ for (i = 0; i < MDSS_MDP_MAX_CTL; i++) {
+ ctl = &mdss_mdp_ctl_list[i];
+ if ((ctl->power_on) &&
+ (ctl->mfd->index == fb_num)) {
+ if (ctl->mixer_left) {
+ mixer_id[mixer_cnt] = ctl->mixer_left->num;
+ mixer_cnt++;
+ }
+ if (mixer_cnt && ctl->mixer_right) {
+ mixer_id[mixer_cnt] = ctl->mixer_right->num;
+ mixer_cnt++;
+ }
+ if (mixer_cnt)
+ break;
+ }
+ }
+ mutex_unlock(&mdss_mdp_ctl_lock);
+ return mixer_cnt;
+}
+
diff --git a/drivers/video/msm/mdss/mdss_mdp_hwio.h b/drivers/video/msm/mdss/mdss_mdp_hwio.h
index 8825cc6..651d595 100644
--- a/drivers/video/msm/mdss/mdss_mdp_hwio.h
+++ b/drivers/video/msm/mdss/mdss_mdp_hwio.h
@@ -74,6 +74,11 @@
MDSS_MDP_IRQ_INTF_VSYNC = 25,
};
+#define MDSS_MDP_REG_IGC_VIG_BASE 0x300
+#define MDSS_MDP_REG_IGC_RGB_BASE 0x310
+#define MDSS_MDP_REG_IGC_DMA_BASE 0x320
+#define MDSS_MDP_REG_IGC_DSPP_BASE 0x400
+
enum mdss_mdp_ctl_index {
MDSS_MDP_CTL0,
MDSS_MDP_CTL1,
@@ -189,6 +194,9 @@
#define MDSS_MDP_REG_VIG_CSC_0_BASE 0x280
#define MDSS_MDP_REG_VIG_CSC_1_BASE 0x320
+#define MDSS_MDP_REG_VIG_HIST_CTL_BASE 0x2C4
+#define MDSS_MDP_REG_VIG_HIST_LUT_BASE 0x2F0
+
#define MDSS_MDP_SCALE_FILTER_NEAREST 0x0
#define MDSS_MDP_SCALE_FILTER_BIL 0x1
#define MDSS_MDP_SCALE_FILTER_PCMN 0x2
@@ -260,6 +268,8 @@
#define MDSS_MDP_REG_LM_CURSOR_BLEND_TRANSP_HIGH0 0x108
#define MDSS_MDP_REG_LM_CURSOR_BLEND_TRANSP_HIGH1 0x10C
+#define MDSS_MDP_REG_LM_GC_LUT_BASE 0x110
+
#define MDSS_MDP_LM_BORDER_COLOR (1 << 24)
#define MDSS_MDP_LM_CURSOR_OUT (1 << 25)
#define MDSS_MDP_BLEND_FG_ALPHA_FG_CONST (0 << 0)
@@ -321,6 +331,15 @@
MDSS_MDP_MAX_DSPP
};
+#define MDSS_MDP_REG_DSPP_OFFSET(pipe) (0x4600 + ((pipe) * 0x400))
+#define MDSS_MDP_REG_DSPP_OP_MODE 0x000
+#define MDSS_MDP_REG_DSPP_PCC_BASE 0x030
+#define MDSS_MDP_REG_DSPP_DITHER_DEPTH 0x150
+#define MDSS_MDP_REG_DSPP_HIST_CTL_BASE 0x210
+#define MDSS_MDP_REG_DSPP_HIST_LUT_BASE 0x230
+#define MDSS_MDP_REG_DSPP_PA_BASE 0x238
+#define MDSS_MDP_REG_DSPP_GAMUT_BASE 0x2DC
+
enum mdss_mpd_intf_index {
MDSS_MDP_NO_INTF,
MDSS_MDP_INTF0,
diff --git a/drivers/video/msm/mdss/mdss_mdp_intf_video.c b/drivers/video/msm/mdss/mdss_mdp_intf_video.c
index 5d8dd86..3c7c362 100644
--- a/drivers/video/msm/mdss/mdss_mdp_intf_video.c
+++ b/drivers/video/msm/mdss/mdss_mdp_intf_video.c
@@ -183,7 +183,7 @@
if (mutex_lock_interruptible(&ctx->vsync_lock))
return -EINTR;
- if (!ctx->timegen_en) {
+ if (vsync_handler && !ctx->timegen_en) {
ctx->vsync_time = ktime_get();
schedule_work(&ctx->vsync_work);
}
@@ -213,6 +213,9 @@
return -ENODEV;
}
+ if (ctx->vsync_handler)
+ mdss_mdp_video_set_vsync_handler(ctl, NULL);
+
if (ctx->timegen_en) {
off = MDSS_MDP_REG_INTF_OFFSET(ctl->intf_num);
MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_TIMING_ENGINE_EN, 0);
@@ -274,6 +277,7 @@
}
if (ctx->timegen_en) {
+ INIT_COMPLETION(ctx->pp_comp);
pr_debug("waiting for ping pong %d done\n", ctx->pp_num);
mdss_mdp_irq_enable(MDSS_MDP_IRQ_PING_PONG_COMP, ctx->pp_num);
wait_for_completion_interruptible(&ctx->pp_comp);
@@ -312,7 +316,7 @@
wmb();
}
- wait_for_completion_interruptible(&ctx->vsync_comp);
+ wait_for_completion(&ctx->vsync_comp);
if (!ctx->vsync_handler)
mdss_mdp_irq_disable(MDSS_MDP_IRQ_INTF_VSYNC, ctl->intf_num);
mutex_unlock(&ctx->vsync_lock);
diff --git a/drivers/video/msm/mdss/mdss_mdp_overlay.c b/drivers/video/msm/mdss/mdss_mdp_overlay.c
index e8e8163..f76b508 100644
--- a/drivers/video/msm/mdss/mdss_mdp_overlay.c
+++ b/drivers/video/msm/mdss/mdss_mdp_overlay.c
@@ -316,6 +316,15 @@
pipe->req_data = *req;
+ if (pipe->flags & MDP_OVERLAY_PP_CFG_EN) {
+ if (pipe->num <= MDSS_MDP_SSPP_VIG2)
+ memcpy(&pipe->pp_cfg, &req->overlay_pp_cfg,
+ sizeof(struct mdp_overlay_pp_params));
+ else
+ pr_debug("%s: RGB Pipes don't support CSC/QSEED\n",
+ __func__);
+ }
+
pipe->params_changed++;
req->id = pipe->ndx;
@@ -626,8 +635,15 @@
if (pipe == NULL) {
struct mdp_overlay req;
struct fb_info *fbi = mfd->fbi;
+ struct mdss_mdp_mixer *mixer;
int ret, bpp;
+ mixer = mdss_mdp_mixer_get(mfd->ctl, MDSS_MDP_MIXER_MUX_LEFT);
+ if (!mixer) {
+ pr_err("unable to retrieve mixer\n");
+ return -ENODEV;
+ }
+
memset(&req, 0, sizeof(req));
bpp = fbi->var.bits_per_pixel / 8;
@@ -636,20 +652,22 @@
req.src.height = fbi->var.yres;
req.src.width = fbi->fix.line_length / bpp;
if (mixer_mux == MDSS_MDP_MIXER_MUX_RIGHT) {
- if (req.src.width <= MAX_MIXER_WIDTH)
- return -ENODEV;
+ if (req.src.width <= mixer->width) {
+ pr_warn("right fb pipe not needed\n");
+ return -EINVAL;
+ }
req.flags |= MDSS_MDP_RIGHT_MIXER;
- req.src_rect.x = MAX_MIXER_WIDTH;
- req.src_rect.w = fbi->var.xres - MAX_MIXER_WIDTH;
+ req.src_rect.x = mixer->width;
+ req.src_rect.w = fbi->var.xres - mixer->width;
} else {
req.src_rect.x = 0;
- req.src_rect.w = MIN(fbi->var.xres, MAX_MIXER_WIDTH);
+ req.src_rect.w = MIN(fbi->var.xres, mixer->width);
}
req.src_rect.y = 0;
req.src_rect.h = req.src.height;
- req.dst_rect.x = req.src_rect.x;
+ req.dst_rect.x = 0;
req.dst_rect.y = 0;
req.dst_rect.w = req.src_rect.w;
req.dst_rect.h = req.src_rect.h;
@@ -685,7 +703,7 @@
fbi = mfd->fbi;
if (fbi->fix.smem_len == 0) {
- pr_warn("fb memory not allocated\n");
+ mdss_mdp_overlay_kickoff(mfd->ctl);
return;
}
@@ -765,7 +783,7 @@
pr_debug("sent vsync on ctl=%d ts=%llu\n", ctl->num, ktime_to_ns(t));
}
-static int mdss_mdp_overlay_vsync_ctrl(struct msm_fb_data_type *mfd, int en)
+int mdss_mdp_overlay_vsync_ctrl(struct msm_fb_data_type *mfd, int en)
{
struct mdss_mdp_ctl *ctl = mfd->ctl;
int rc;
@@ -777,6 +795,11 @@
pr_debug("vsync en=%d\n", en);
+ if (!ctl->power_on) {
+ mfd->vsync_pending = en;
+ return 0;
+ }
+
mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
if (en)
rc = ctl->set_vsync_handler(ctl, mdss_mdp_overlay_handle_vsync);
diff --git a/drivers/video/msm/mdss/mdss_mdp_pipe.c b/drivers/video/msm/mdss/mdss_mdp_pipe.c
index c936b7d..c90ce8c 100644
--- a/drivers/video/msm/mdss/mdss_mdp_pipe.c
+++ b/drivers/video/msm/mdss/mdss_mdp_pipe.c
@@ -560,16 +560,32 @@
pr_debug("pnum=%x\n", pipe->num);
- if (pipe->src_fmt->is_yuv)
- opmode |= (0 << 19) | /* DST_DATA=RGB */
- (1 << 18) | /* SRC_DATA=YCBCR */
- (1 << 17); /* CSC_1_EN */
-
- /* only need to program once */
- if (pipe->play_cnt == 0) {
- mdss_mdp_csc_setup(MDSS_MDP_BLOCK_SSPP, pipe->num, 1,
- MDSS_MDP_CSC_YUV2RGB);
+ /* CSC Post Processing enabled? */
+ if (pipe->flags & MDP_OVERLAY_PP_CFG_EN) {
+ if (pipe->pp_cfg.config_ops & MDP_OVERLAY_PP_CSC_CFG) {
+ if (pipe->pp_cfg.csc_cfg.flags & MDP_CSC_FLAG_ENABLE)
+ opmode |= 1 << 17; /* CSC_1_EN */
+ if (pipe->pp_cfg.csc_cfg.flags & MDP_CSC_FLAG_YUV_IN)
+ opmode |= 1 << 18; /* SRC_DATA=YCBCR */
+ if (pipe->pp_cfg.csc_cfg.flags & MDP_CSC_FLAG_YUV_OUT)
+ opmode |= 1 << 19; /* DST_DATA=YCBCR */
+ /* only need to program once */
+ if (pipe->play_cnt == 0)
+ mdss_mdp_csc_setup_data(MDSS_MDP_BLOCK_SSPP,
+ pipe->num, 1, &pipe->pp_cfg.csc_cfg);
+ }
+ } else {
+ if (pipe->src_fmt->is_yuv)
+ opmode |= (0 << 19) | /* DST_DATA=RGB */
+ (1 << 18) | /* SRC_DATA=YCBCR */
+ (1 << 17); /* CSC_1_EN */
+ /* only need to program once */
+ if (pipe->play_cnt == 0) {
+ mdss_mdp_csc_setup(MDSS_MDP_BLOCK_SSPP, pipe->num, 1,
+ MDSS_MDP_CSC_YUV2RGB);
+ }
}
+
mdss_mdp_pipe_write(pipe, MDSS_MDP_REG_VIG_OP_MODE, opmode);
return 0;
diff --git a/drivers/video/msm/mdss/mdss_mdp_pp.c b/drivers/video/msm/mdss/mdss_mdp_pp.c
index db840a8..6e04124 100644
--- a/drivers/video/msm/mdss/mdss_mdp_pp.c
+++ b/drivers/video/msm/mdss/mdss_mdp_pp.c
@@ -13,7 +13,11 @@
#define pr_fmt(fmt) "%s: " fmt, __func__
+#include "mdss_fb.h"
#include "mdss_mdp.h"
+#include <linux/uaccess.h>
+#include <linux/spinlock.h>
+#include <linux/delay.h>
struct mdp_csc_cfg mdp_csc_convert[MDSS_MDP_MAX_CSC] = {
[MDSS_MDP_CSC_RGB2RGB] = {
@@ -71,7 +75,120 @@
#define CSC_LV_OFF 0x14
#define CSC_POST_OFF 0xC
-static int mdss_mdp_csc_setup_data(u32 block, u32 blk_idx, u32 tbl_idx,
+#define MDSS_BLOCK_DISP_NUM (MDP_BLOCK_MAX - MDP_LOGICAL_BLOCK_DISP_0)
+
+#define IGC_LUT_ENTRIES 256
+#define GC_LUT_SEGMENTS 16
+#define ENHIST_LUT_ENTRIES 256
+#define HIST_V_SIZE 256
+
+#define HIST_WAIT_TIMEOUT 1000
+/* hist collect state */
+enum {
+ HIST_UNKNOWN,
+ HIST_IDLE,
+ HIST_RESET,
+ HIST_START,
+ HIST_READY,
+};
+
+struct pp_hist_col_info {
+ u32 col_state;
+ u32 col_en;
+ u32 read_request;
+ u32 hist_cnt_read;
+ u32 hist_cnt_sent;
+ u32 frame_cnt;
+ struct completion comp;
+ u32 data[HIST_V_SIZE];
+};
+
+static u32 dither_matrix[16] = {
+ 15, 7, 13, 5, 3, 11, 1, 9, 12, 4, 14, 6, 0, 8, 2, 10};
+static u32 dither_depth_map[9] = {
+ 0, 0, 0, 0, 0, 1, 2, 3, 3};
+
+#define GAMUT_T0_SIZE 125
+#define GAMUT_T1_SIZE 100
+#define GAMUT_T2_SIZE 80
+#define GAMUT_T3_SIZE 100
+#define GAMUT_T4_SIZE 100
+#define GAMUT_T5_SIZE 80
+#define GAMUT_T6_SIZE 64
+#define GAMUT_T7_SIZE 80
+#define GAMUT_TOTAL_TABLE_SIZE (GAMUT_T0_SIZE + GAMUT_T1_SIZE + \
+ GAMUT_T2_SIZE + GAMUT_T3_SIZE + GAMUT_T4_SIZE + \
+ GAMUT_T5_SIZE + GAMUT_T6_SIZE + GAMUT_T7_SIZE)
+
+struct pp_sts_type {
+ u32 pa_sts;
+ u32 pcc_sts;
+ u32 igc_sts;
+ u32 igc_tbl_idx;
+ u32 argc_sts;
+ u32 enhist_sts;
+ u32 dither_sts;
+ u32 gamut_sts;
+};
+
+#define PP_FLAGS_DIRTY_PA 0x1
+#define PP_FLAGS_DIRTY_PCC 0x2
+#define PP_FLAGS_DIRTY_IGC 0x4
+#define PP_FLAGS_DIRTY_ARGC 0x8
+#define PP_FLAGS_DIRTY_ENHIST 0x10
+#define PP_FLAGS_DIRTY_DITHER 0x20
+#define PP_FLAGS_DIRTY_GAMUT 0x40
+#define PP_FLAGS_DIRTY_HIST_COL 0x80
+
+#define PP_STS_ENABLE 0x1
+#define PP_STS_GAMUT_FIRST 0x2
+
+struct mdss_pp_res_type {
+ /* logical info */
+ u32 pp_disp_flags[MDSS_BLOCK_DISP_NUM];
+ u32 igc_lut_c0c1[MDSS_BLOCK_DISP_NUM][IGC_LUT_ENTRIES];
+ u32 igc_lut_c2[MDSS_BLOCK_DISP_NUM][IGC_LUT_ENTRIES];
+ struct mdp_ar_gc_lut_data
+ gc_lut_r[MDSS_BLOCK_DISP_NUM][GC_LUT_SEGMENTS];
+ struct mdp_ar_gc_lut_data
+ gc_lut_g[MDSS_BLOCK_DISP_NUM][GC_LUT_SEGMENTS];
+ struct mdp_ar_gc_lut_data
+ gc_lut_b[MDSS_BLOCK_DISP_NUM][GC_LUT_SEGMENTS];
+ u32 enhist_lut[MDSS_BLOCK_DISP_NUM][ENHIST_LUT_ENTRIES];
+ struct mdp_pa_cfg_data pa_disp_cfg[MDSS_BLOCK_DISP_NUM];
+ struct mdp_pcc_cfg_data pcc_disp_cfg[MDSS_BLOCK_DISP_NUM];
+ struct mdp_igc_lut_data igc_disp_cfg[MDSS_BLOCK_DISP_NUM];
+ struct mdp_pgc_lut_data pgc_disp_cfg[MDSS_BLOCK_DISP_NUM];
+ struct mdp_hist_lut_data enhist_disp_cfg[MDSS_BLOCK_DISP_NUM];
+ struct mdp_dither_cfg_data dither_disp_cfg[MDSS_BLOCK_DISP_NUM];
+ struct mdp_gamut_cfg_data gamut_disp_cfg[MDSS_BLOCK_DISP_NUM];
+ uint16_t gamut_tbl[MDSS_BLOCK_DISP_NUM][GAMUT_TOTAL_TABLE_SIZE];
+ struct pp_hist_col_info
+ *hist_col[MDSS_BLOCK_DISP_NUM][MDSS_MDP_MAX_DSPP];
+ u32 hist_data[MDSS_BLOCK_DISP_NUM][HIST_V_SIZE];
+ /* physical info */
+ struct pp_sts_type pp_dspp_sts[MDSS_MDP_MAX_DSPP];
+ struct pp_hist_col_info dspp_hist[MDSS_MDP_MAX_DSPP];
+};
+
+static DEFINE_MUTEX(mdss_pp_mutex);
+static DEFINE_SPINLOCK(mdss_hist_lock);
+static DEFINE_MUTEX(mdss_mdp_hist_mutex);
+static struct mdss_pp_res_type *mdss_pp_res;
+
+
+static void pp_hist_read(u32 v_base, struct pp_hist_col_info *hist_info);
+
+static void pp_update_pcc_regs(u32 offset,
+ struct mdp_pcc_cfg_data *cfg_ptr);
+static void pp_update_igc_lut(struct mdp_igc_lut_data *cfg,
+ u32 offset, u32 blk_idx);
+static void pp_update_gc_one_lut(u32 offset,
+ struct mdp_ar_gc_lut_data *lut_data);
+static void pp_update_argc_lut(u32 offset,
+ struct mdp_pgc_lut_data *config);
+
+int mdss_mdp_csc_setup_data(u32 block, u32 blk_idx, u32 tbl_idx,
struct mdp_csc_cfg *data)
{
int i, ret = 0;
@@ -159,17 +276,1270 @@
data = &mdp_csc_convert[csc_type];
return mdss_mdp_csc_setup_data(block, blk_idx, tbl_idx, data);
}
-
-int mdss_mdp_dspp_setup(struct mdss_mdp_ctl *ctl, struct mdss_mdp_mixer *mixer)
+static int pp_mixer_setup(u32 disp_num, struct mdss_mdp_ctl *ctl,
+ struct mdss_mdp_mixer *mixer)
{
- int dspp_num;
+ u32 flags, offset, dspp_num, opmode = 0;
+ struct mdp_pgc_lut_data *pgc_config;
+ struct pp_sts_type *pp_sts;
+ dspp_num = mixer->num;
+ /* no corresponding dspp */
+ if ((mixer->type != MDSS_MDP_MIXER_TYPE_INTF) ||
+ (dspp_num >= MDSS_MDP_MAX_DSPP))
+ return 0;
+ if (disp_num < MDSS_BLOCK_DISP_NUM)
+ flags = mdss_pp_res->pp_disp_flags[disp_num];
+ else
+ flags = 0;
- if (!ctl || !mixer)
+ pp_sts = &mdss_pp_res->pp_dspp_sts[dspp_num];
+ /* GC_LUT is in layer mixer */
+ if (flags & PP_FLAGS_DIRTY_ARGC) {
+ pgc_config = &mdss_pp_res->pgc_disp_cfg[disp_num];
+ if (pgc_config->flags & MDP_PP_OPS_WRITE) {
+ offset = MDSS_MDP_REG_LM_OFFSET(disp_num) +
+ MDSS_MDP_REG_LM_GC_LUT_BASE;
+ pp_update_argc_lut(offset, pgc_config);
+ }
+ if (pgc_config->flags & MDP_PP_OPS_DISABLE)
+ pp_sts->argc_sts &= ~PP_STS_ENABLE;
+ else if (pgc_config->flags & MDP_PP_OPS_ENABLE)
+ pp_sts->argc_sts |= PP_STS_ENABLE;
+ ctl->flush_bits |= BIT(6) << dspp_num; /* LAYER_MIXER */
+ }
+ /* update LM opmode if LM needs flush */
+ if ((pp_sts->argc_sts & PP_STS_ENABLE) &&
+ (ctl->flush_bits & (BIT(6) << dspp_num))) {
+ offset = MDSS_MDP_REG_LM_OFFSET(dspp_num) +
+ MDSS_MDP_REG_LM_OP_MODE;
+ opmode = MDSS_MDP_REG_READ(offset);
+ opmode |= (1 << 0); /* GC_LUT_EN */
+ MDSS_MDP_REG_WRITE(offset, opmode);
+ }
+ return 0;
+}
+static void pp_gamut_config(struct mdp_gamut_cfg_data *gamut_cfg,
+ u32 base,
+ u32 *gamut_sts)
+{
+ u32 offset;
+ int i, j;
+ if (gamut_cfg->flags & MDP_PP_OPS_WRITE) {
+ offset = base + MDSS_MDP_REG_DSPP_GAMUT_BASE;
+ for (i = 0; i < MDP_GAMUT_TABLE_NUM; i++) {
+ for (j = 0; j < gamut_cfg->tbl_size[i]; j++)
+ MDSS_MDP_REG_WRITE(offset,
+ (u32)gamut_cfg->r_tbl[i][j]);
+ offset += 4;
+ }
+ for (i = 0; i < MDP_GAMUT_TABLE_NUM; i++) {
+ for (j = 0; j < gamut_cfg->tbl_size[i]; j++)
+ MDSS_MDP_REG_WRITE(offset,
+ (u32)gamut_cfg->g_tbl[i][j]);
+ offset += 4;
+ }
+ for (i = 0; i < MDP_GAMUT_TABLE_NUM; i++) {
+ for (j = 0; j < gamut_cfg->tbl_size[i]; j++)
+ MDSS_MDP_REG_WRITE(offset,
+ (u32)gamut_cfg->b_tbl[i][j]);
+ offset += 4;
+ }
+ if (gamut_cfg->gamut_first)
+ *gamut_sts |= PP_STS_GAMUT_FIRST;
+ }
+
+ if (gamut_cfg->flags & MDP_PP_OPS_DISABLE)
+ *gamut_sts &= ~PP_STS_ENABLE;
+ else if (gamut_cfg->flags & MDP_PP_OPS_ENABLE)
+ *gamut_sts |= PP_STS_ENABLE;
+}
+static int pp_dspp_setup(u32 disp_num, struct mdss_mdp_ctl *ctl,
+ struct mdss_mdp_mixer *mixer)
+{
+ u32 flags, base, offset, dspp_num, opmode = 0;
+ struct mdp_pa_cfg_data *pa_config;
+ struct mdp_pcc_cfg_data *pcc_config;
+ struct mdp_igc_lut_data *igc_config;
+ struct mdp_hist_lut_data *enhist_cfg;
+ struct mdp_dither_cfg_data *dither_cfg;
+ struct pp_hist_col_info *hist_info;
+ struct pp_sts_type *pp_sts;
+ u32 data, tbl_idx, col_state;
+ int i;
+ dspp_num = mixer->num;
+ /* no corresponding dspp */
+ if ((mixer->type != MDSS_MDP_MIXER_TYPE_INTF) ||
+ (dspp_num >= MDSS_MDP_MAX_DSPP))
+ return 0;
+ base = MDSS_MDP_REG_DSPP_OFFSET(dspp_num);
+ hist_info = &mdss_pp_res->dspp_hist[dspp_num];
+ if (hist_info->col_en) {
+ /* HIST_EN & AUTO_CLEAR */
+ opmode |= (1 << 16) | (1 << 17);
+ mutex_lock(&mdss_mdp_hist_mutex);
+ if (hist_info->col_state == HIST_READY)
+ pp_hist_read(base + MDSS_MDP_REG_DSPP_HIST_CTL_BASE +
+ 0x1C, hist_info);
+ spin_lock(&mdss_hist_lock);
+ col_state = hist_info->col_state;
+ if ((col_state == HIST_IDLE) ||
+ (col_state == HIST_READY) ||
+ (col_state == HIST_START)) {
+ /* Kick off collection */
+ MDSS_MDP_REG_WRITE(base +
+ MDSS_MDP_REG_DSPP_HIST_CTL_BASE, 1);
+ hist_info->col_state = HIST_START;
+ }
+ spin_unlock(&mdss_hist_lock);
+ mutex_unlock(&mdss_mdp_hist_mutex);
+ }
+
+ if (disp_num < MDSS_BLOCK_DISP_NUM)
+ flags = mdss_pp_res->pp_disp_flags[disp_num];
+ else
+ flags = 0;
+
+ /* nothing to update */
+ if ((!flags) && (!(hist_info->col_en)))
+ return 0;
+ pp_sts = &mdss_pp_res->pp_dspp_sts[dspp_num];
+ if (flags & PP_FLAGS_DIRTY_PA) {
+ pa_config = &mdss_pp_res->pa_disp_cfg[disp_num];
+ if (pa_config->flags & MDP_PP_OPS_WRITE) {
+ offset = base + MDSS_MDP_REG_DSPP_PA_BASE;
+ MDSS_MDP_REG_WRITE(offset, pa_config->hue_adj);
+ offset += 4;
+ MDSS_MDP_REG_WRITE(offset, pa_config->sat_adj);
+ offset += 4;
+ MDSS_MDP_REG_WRITE(offset, pa_config->val_adj);
+ offset += 4;
+ MDSS_MDP_REG_WRITE(offset, pa_config->cont_adj);
+ }
+ if (pa_config->flags & MDP_PP_OPS_DISABLE)
+ pp_sts->pa_sts &= ~PP_STS_ENABLE;
+ else if (pa_config->flags & MDP_PP_OPS_ENABLE)
+ pp_sts->pa_sts |= PP_STS_ENABLE;
+ }
+ if (pp_sts->pa_sts & PP_STS_ENABLE)
+ opmode |= (1 << 20); /* PA_EN */
+ if (flags & PP_FLAGS_DIRTY_PCC) {
+ pcc_config = &mdss_pp_res->pcc_disp_cfg[disp_num];
+ if (pcc_config->ops & MDP_PP_OPS_WRITE) {
+ offset = base + MDSS_MDP_REG_DSPP_PCC_BASE;
+ pp_update_pcc_regs(offset, pcc_config);
+ }
+ if (pcc_config->ops & MDP_PP_OPS_DISABLE)
+ pp_sts->pcc_sts &= ~PP_STS_ENABLE;
+ else if (pcc_config->ops & MDP_PP_OPS_ENABLE)
+ pp_sts->pcc_sts |= PP_STS_ENABLE;
+ }
+ if (pp_sts->pcc_sts & PP_STS_ENABLE)
+ opmode |= (1 << 4); /* PCC_EN */
+
+ if (flags & PP_FLAGS_DIRTY_IGC) {
+ igc_config = &mdss_pp_res->igc_disp_cfg[disp_num];
+ if (igc_config->ops & MDP_PP_OPS_WRITE) {
+ offset = MDSS_MDP_REG_IGC_DSPP_BASE;
+ pp_update_igc_lut(igc_config, offset, dspp_num);
+ }
+ if (igc_config->ops & MDP_PP_IGC_FLAG_ROM0) {
+ pp_sts->pcc_sts |= PP_STS_ENABLE;
+ tbl_idx = 1;
+ } else if (igc_config->ops & MDP_PP_IGC_FLAG_ROM1) {
+ pp_sts->pcc_sts |= PP_STS_ENABLE;
+ tbl_idx = 2;
+ } else {
+ tbl_idx = 0;
+ }
+ pp_sts->igc_tbl_idx = tbl_idx;
+ if (igc_config->ops & MDP_PP_OPS_DISABLE)
+ pp_sts->igc_sts &= ~PP_STS_ENABLE;
+ else if (igc_config->ops & MDP_PP_OPS_ENABLE)
+ pp_sts->igc_sts |= PP_STS_ENABLE;
+ }
+ if (pp_sts->igc_sts & PP_STS_ENABLE) {
+ opmode |= (1 << 0) | /* IGC_LUT_EN */
+ (pp_sts->igc_tbl_idx << 1);
+ }
+ if (flags & PP_FLAGS_DIRTY_ENHIST) {
+ enhist_cfg = &mdss_pp_res->enhist_disp_cfg[disp_num];
+ if (enhist_cfg->ops & MDP_PP_OPS_WRITE) {
+ offset = base + MDSS_MDP_REG_DSPP_HIST_LUT_BASE;
+ for (i = 0; i < ENHIST_LUT_ENTRIES; i++)
+ MDSS_MDP_REG_WRITE(offset, enhist_cfg->data[i]);
+ /* swap */
+ MDSS_MDP_REG_WRITE(offset + 4, 1);
+ }
+ if (enhist_cfg->ops & MDP_PP_OPS_DISABLE)
+ pp_sts->enhist_sts &= ~PP_STS_ENABLE;
+ else if (enhist_cfg->ops & MDP_PP_OPS_ENABLE)
+ pp_sts->enhist_sts |= PP_STS_ENABLE;
+ }
+ if (pp_sts->enhist_sts & PP_STS_ENABLE) {
+ opmode |= (1 << 19) | /* HIST_LUT_EN */
+ (1 << 20); /* PA_EN */
+ if (!(pp_sts->pa_sts & PP_STS_ENABLE)) {
+ /* Program default value */
+ offset = base + MDSS_MDP_REG_DSPP_PA_BASE;
+ MDSS_MDP_REG_WRITE(offset, 0);
+ MDSS_MDP_REG_WRITE(offset + 4, 0);
+ MDSS_MDP_REG_WRITE(offset + 8, 0);
+ MDSS_MDP_REG_WRITE(offset + 12, 0);
+ }
+ }
+ if (flags & PP_FLAGS_DIRTY_DITHER) {
+ dither_cfg = &mdss_pp_res->dither_disp_cfg[disp_num];
+ if (dither_cfg->flags & MDP_PP_OPS_WRITE) {
+ offset = base + MDSS_MDP_REG_DSPP_DITHER_DEPTH;
+ MDSS_MDP_REG_WRITE(offset,
+ dither_depth_map[dither_cfg->g_y_depth] |
+ (dither_depth_map[dither_cfg->b_cb_depth] << 2) |
+ (dither_depth_map[dither_cfg->r_cr_depth] << 4));
+ offset += 0x14;
+ for (i = 0; i << 16; i += 4) {
+ data = dither_matrix[i] |
+ (dither_matrix[i + 1] << 4) |
+ (dither_matrix[i + 2] << 8) |
+ (dither_matrix[i + 3] << 12);
+ MDSS_MDP_REG_WRITE(offset, data);
+ offset += 4;
+ }
+ }
+ if (dither_cfg->flags & MDP_PP_OPS_DISABLE)
+ pp_sts->dither_sts &= ~PP_STS_ENABLE;
+ else if (dither_cfg->flags & MDP_PP_OPS_ENABLE)
+ pp_sts->dither_sts |= PP_STS_ENABLE;
+ }
+ if (pp_sts->dither_sts & PP_STS_ENABLE)
+ opmode |= (1 << 8); /* DITHER_EN */
+ if (flags & PP_FLAGS_DIRTY_GAMUT)
+ pp_gamut_config(&mdss_pp_res->gamut_disp_cfg[disp_num],
+ base, &pp_sts->gamut_sts);
+ if (pp_sts->gamut_sts & PP_STS_ENABLE) {
+ opmode |= (1 << 23); /* GAMUT_EN */
+ if (pp_sts->gamut_sts & PP_STS_GAMUT_FIRST)
+ opmode |= (1 << 24); /* GAMUT_ORDER */
+ }
+
+ MDSS_MDP_REG_WRITE(base + MDSS_MDP_REG_DSPP_OP_MODE, opmode);
+ ctl->flush_bits |= BIT(13 + dspp_num); /* DSPP */
+ return 0;
+}
+int mdss_mdp_pp_setup(struct mdss_mdp_ctl *ctl)
+{
+ u32 disp_num;
+ if ((!ctl->mfd) || (!mdss_pp_res))
return -EINVAL;
- dspp_num = mixer->num;
+ /* treat fb_num the same as block logical id*/
+ disp_num = ctl->mfd->index;
- ctl->flush_bits |= BIT(13 + dspp_num); /* DSPP */
+ mutex_lock(&mdss_pp_mutex);
+ if (ctl->mixer_left) {
+ pp_mixer_setup(disp_num, ctl, ctl->mixer_left);
+ pp_dspp_setup(disp_num, ctl, ctl->mixer_left);
+ }
+ if (ctl->mixer_right) {
+ pp_mixer_setup(disp_num, ctl, ctl->mixer_right);
+ pp_dspp_setup(disp_num, ctl, ctl->mixer_right);
+ }
+ /* clear dirty flag */
+ if (disp_num < MDSS_BLOCK_DISP_NUM)
+ mdss_pp_res->pp_disp_flags[disp_num] = 0;
+ mutex_unlock(&mdss_pp_mutex);
return 0;
}
+
+int mdss_mdp_pp_init(struct device *dev)
+{
+ int ret = 0;
+ mutex_lock(&mdss_pp_mutex);
+ if (!mdss_pp_res) {
+ mdss_pp_res = devm_kzalloc(dev, sizeof(*mdss_pp_res),
+ GFP_KERNEL);
+ if (mdss_pp_res == NULL) {
+ pr_err("%s mdss_pp_res allocation failed!", __func__);
+ ret = -ENOMEM;
+ }
+ }
+ mutex_unlock(&mdss_pp_mutex);
+ return ret;
+}
+void mdss_mdp_pp_term(struct device *dev)
+{
+ if (!mdss_pp_res) {
+ mutex_lock(&mdss_pp_mutex);
+ devm_kfree(dev, mdss_pp_res);
+ mdss_pp_res = NULL;
+ mutex_unlock(&mdss_pp_mutex);
+ }
+}
+static int pp_get_dspp_num(u32 disp_num, u32 *dspp_num)
+{
+ int i;
+ u32 mixer_cnt;
+ u32 mixer_id[MDSS_MDP_MAX_LAYERMIXER];
+ mixer_cnt = mdss_mdp_get_ctl_mixers(disp_num, mixer_id);
+
+ if (!mixer_cnt)
+ return -EPERM;
+
+ /* only read the first mixer */
+ for (i = 0; i < mixer_cnt; i++) {
+ if (mixer_id[i] < MDSS_MDP_MAX_DSPP)
+ break;
+ }
+ if (i >= mixer_cnt)
+ return -EPERM;
+ *dspp_num = mixer_id[i];
+ return 0;
+}
+
+int mdss_mdp_pa_config(struct mdp_pa_cfg_data *config, u32 *copyback)
+{
+ int ret = 0;
+ u32 pa_offset, disp_num, dspp_num = 0;
+
+ if ((config->block < MDP_LOGICAL_BLOCK_DISP_0) ||
+ (config->block >= MDP_BLOCK_MAX))
+ return -EINVAL;
+
+ mutex_lock(&mdss_pp_mutex);
+ disp_num = config->block - MDP_LOGICAL_BLOCK_DISP_0;
+
+ if (config->flags & MDP_PP_OPS_READ) {
+ ret = pp_get_dspp_num(disp_num, &dspp_num);
+ if (ret) {
+ pr_err("%s, no dspp connects to disp %d",
+ __func__, disp_num);
+ goto pa_config_exit;
+ }
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ pa_offset = MDSS_MDP_REG_DSPP_OFFSET(dspp_num) +
+ MDSS_MDP_REG_DSPP_PA_BASE;
+ config->hue_adj = MDSS_MDP_REG_READ(pa_offset);
+ pa_offset += 4;
+ config->sat_adj = MDSS_MDP_REG_READ(pa_offset);
+ pa_offset += 4;
+ config->val_adj = MDSS_MDP_REG_READ(pa_offset);
+ pa_offset += 4;
+ config->cont_adj = MDSS_MDP_REG_READ(pa_offset);
+ *copyback = 1;
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+ } else {
+ mdss_pp_res->pa_disp_cfg[disp_num] = *config;
+ mdss_pp_res->pp_disp_flags[disp_num] |= PP_FLAGS_DIRTY_PA;
+ }
+
+pa_config_exit:
+ mutex_unlock(&mdss_pp_mutex);
+ return ret;
+}
+
+static void pp_read_pcc_regs(u32 offset,
+ struct mdp_pcc_cfg_data *cfg_ptr)
+{
+ cfg_ptr->r.c = MDSS_MDP_REG_READ(offset);
+ cfg_ptr->g.c = MDSS_MDP_REG_READ(offset + 4);
+ cfg_ptr->b.c = MDSS_MDP_REG_READ(offset + 8);
+ offset += 0x10;
+
+ cfg_ptr->r.r = MDSS_MDP_REG_READ(offset);
+ cfg_ptr->g.r = MDSS_MDP_REG_READ(offset + 4);
+ cfg_ptr->b.r = MDSS_MDP_REG_READ(offset + 8);
+ offset += 0x10;
+
+ cfg_ptr->r.g = MDSS_MDP_REG_READ(offset);
+ cfg_ptr->g.g = MDSS_MDP_REG_READ(offset + 4);
+ cfg_ptr->b.g = MDSS_MDP_REG_READ(offset + 8);
+ offset += 0x10;
+
+ cfg_ptr->r.b = MDSS_MDP_REG_READ(offset);
+ cfg_ptr->g.b = MDSS_MDP_REG_READ(offset + 4);
+ cfg_ptr->b.b = MDSS_MDP_REG_READ(offset + 8);
+ offset += 0x10;
+
+ cfg_ptr->r.rr = MDSS_MDP_REG_READ(offset);
+ cfg_ptr->g.rr = MDSS_MDP_REG_READ(offset + 4);
+ cfg_ptr->b.rr = MDSS_MDP_REG_READ(offset + 8);
+ offset += 0x10;
+
+ cfg_ptr->r.rg = MDSS_MDP_REG_READ(offset);
+ cfg_ptr->g.rg = MDSS_MDP_REG_READ(offset + 4);
+ cfg_ptr->b.rg = MDSS_MDP_REG_READ(offset + 8);
+ offset += 0x10;
+
+ cfg_ptr->r.rb = MDSS_MDP_REG_READ(offset);
+ cfg_ptr->g.rb = MDSS_MDP_REG_READ(offset + 4);
+ cfg_ptr->b.rb = MDSS_MDP_REG_READ(offset + 8);
+ offset += 0x10;
+
+ cfg_ptr->r.gg = MDSS_MDP_REG_READ(offset);
+ cfg_ptr->g.gg = MDSS_MDP_REG_READ(offset + 4);
+ cfg_ptr->b.gg = MDSS_MDP_REG_READ(offset + 8);
+ offset += 0x10;
+
+ cfg_ptr->r.gb = MDSS_MDP_REG_READ(offset);
+ cfg_ptr->g.gb = MDSS_MDP_REG_READ(offset + 4);
+ cfg_ptr->b.gb = MDSS_MDP_REG_READ(offset + 8);
+ offset += 0x10;
+
+ cfg_ptr->r.bb = MDSS_MDP_REG_READ(offset);
+ cfg_ptr->g.bb = MDSS_MDP_REG_READ(offset + 4);
+ cfg_ptr->b.bb = MDSS_MDP_REG_READ(offset + 8);
+ offset += 0x10;
+
+ cfg_ptr->r.rgb_0 = MDSS_MDP_REG_READ(offset);
+ cfg_ptr->g.rgb_0 = MDSS_MDP_REG_READ(offset + 4);
+ cfg_ptr->b.rgb_0 = MDSS_MDP_REG_READ(offset + 8);
+ offset += 0x10;
+
+ cfg_ptr->r.rgb_1 = MDSS_MDP_REG_READ(offset);
+ cfg_ptr->g.rgb_1 = MDSS_MDP_REG_READ(offset + 4);
+ cfg_ptr->b.rgb_1 = MDSS_MDP_REG_READ(offset + 8);
+}
+
+static void pp_update_pcc_regs(u32 offset,
+ struct mdp_pcc_cfg_data *cfg_ptr)
+{
+ MDSS_MDP_REG_WRITE(offset, cfg_ptr->r.c);
+ MDSS_MDP_REG_WRITE(offset + 4, cfg_ptr->g.c);
+ MDSS_MDP_REG_WRITE(offset + 8, cfg_ptr->b.c);
+ offset += 0x10;
+
+ MDSS_MDP_REG_WRITE(offset, cfg_ptr->r.r);
+ MDSS_MDP_REG_WRITE(offset + 4, cfg_ptr->g.r);
+ MDSS_MDP_REG_WRITE(offset + 8, cfg_ptr->b.r);
+ offset += 0x10;
+
+ MDSS_MDP_REG_WRITE(offset, cfg_ptr->r.g);
+ MDSS_MDP_REG_WRITE(offset + 4, cfg_ptr->g.g);
+ MDSS_MDP_REG_WRITE(offset + 8, cfg_ptr->b.g);
+ offset += 0x10;
+
+ MDSS_MDP_REG_WRITE(offset, cfg_ptr->r.b);
+ MDSS_MDP_REG_WRITE(offset + 4, cfg_ptr->g.b);
+ MDSS_MDP_REG_WRITE(offset + 8, cfg_ptr->b.b);
+ offset += 0x10;
+
+ MDSS_MDP_REG_WRITE(offset, cfg_ptr->r.rr);
+ MDSS_MDP_REG_WRITE(offset + 4, cfg_ptr->g.rr);
+ MDSS_MDP_REG_WRITE(offset + 8, cfg_ptr->b.rr);
+ offset += 0x10;
+
+ MDSS_MDP_REG_WRITE(offset, cfg_ptr->r.rg);
+ MDSS_MDP_REG_WRITE(offset + 4, cfg_ptr->g.rg);
+ MDSS_MDP_REG_WRITE(offset + 8, cfg_ptr->b.rg);
+ offset += 0x10;
+
+ MDSS_MDP_REG_WRITE(offset, cfg_ptr->r.rb);
+ MDSS_MDP_REG_WRITE(offset + 4, cfg_ptr->g.rb);
+ MDSS_MDP_REG_WRITE(offset + 8, cfg_ptr->b.rb);
+ offset += 0x10;
+
+ MDSS_MDP_REG_WRITE(offset, cfg_ptr->r.gg);
+ MDSS_MDP_REG_WRITE(offset + 4, cfg_ptr->g.gg);
+ MDSS_MDP_REG_WRITE(offset + 8, cfg_ptr->b.gg);
+ offset += 0x10;
+
+ MDSS_MDP_REG_WRITE(offset, cfg_ptr->r.gb);
+ MDSS_MDP_REG_WRITE(offset + 4, cfg_ptr->g.gb);
+ MDSS_MDP_REG_WRITE(offset + 8, cfg_ptr->b.gb);
+ offset += 0x10;
+
+ MDSS_MDP_REG_WRITE(offset, cfg_ptr->r.bb);
+ MDSS_MDP_REG_WRITE(offset + 4, cfg_ptr->g.bb);
+ MDSS_MDP_REG_WRITE(offset + 8, cfg_ptr->b.bb);
+ offset += 0x10;
+
+ MDSS_MDP_REG_WRITE(offset, cfg_ptr->r.rgb_0);
+ MDSS_MDP_REG_WRITE(offset + 4, cfg_ptr->g.rgb_0);
+ MDSS_MDP_REG_WRITE(offset + 8, cfg_ptr->b.rgb_0);
+ offset += 0x10;
+
+ MDSS_MDP_REG_WRITE(offset, cfg_ptr->r.rgb_1);
+ MDSS_MDP_REG_WRITE(offset + 4, cfg_ptr->g.rgb_1);
+ MDSS_MDP_REG_WRITE(offset + 8, cfg_ptr->b.rgb_1);
+}
+
+int mdss_mdp_pcc_config(struct mdp_pcc_cfg_data *config, u32 *copyback)
+{
+ int ret = 0;
+ u32 base, disp_num, dspp_num = 0;
+
+ if ((config->block < MDP_LOGICAL_BLOCK_DISP_0) ||
+ (config->block >= MDP_BLOCK_MAX))
+ return -EINVAL;
+
+ mutex_lock(&mdss_pp_mutex);
+ disp_num = config->block - MDP_LOGICAL_BLOCK_DISP_0;
+
+ if (config->ops & MDP_PP_OPS_READ) {
+ ret = pp_get_dspp_num(disp_num, &dspp_num);
+ if (ret) {
+ pr_err("%s, no dspp connects to disp %d",
+ __func__, disp_num);
+ goto pcc_config_exit;
+ }
+
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+
+ base = MDSS_MDP_REG_DSPP_OFFSET(dspp_num) +
+ MDSS_MDP_REG_DSPP_PCC_BASE;
+ pp_read_pcc_regs(base, config);
+ *copyback = 1;
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+ } else {
+ mdss_pp_res->pcc_disp_cfg[disp_num] = *config;
+ mdss_pp_res->pp_disp_flags[disp_num] |= PP_FLAGS_DIRTY_PCC;
+ }
+
+pcc_config_exit:
+ mutex_unlock(&mdss_pp_mutex);
+ return ret;
+
+}
+
+static void pp_read_igc_lut(struct mdp_igc_lut_data *cfg,
+ u32 offset, u32 blk_idx)
+{
+ int i;
+ u32 data;
+
+ /* INDEX_UPDATE & VALUE_UPDATEN */
+ data = (3 << 24) | (((~(1 << blk_idx)) & 0x7) << 28);
+ MDSS_MDP_REG_WRITE(offset, data);
+
+ for (i = 0; i < cfg->len; i++)
+ cfg->c0_c1_data[i] = MDSS_MDP_REG_READ(offset) & 0xFFF;
+
+ offset += 0x4;
+ MDSS_MDP_REG_WRITE(offset, data);
+ for (i = 0; i < cfg->len; i++)
+ cfg->c0_c1_data[i] |= (MDSS_MDP_REG_READ(offset) & 0xFFF) << 16;
+
+ offset += 0x4;
+ MDSS_MDP_REG_WRITE(offset, data);
+ for (i = 0; i < cfg->len; i++)
+ cfg->c2_data[i] = MDSS_MDP_REG_READ(offset) & 0xFFF;
+}
+
+static void pp_update_igc_lut(struct mdp_igc_lut_data *cfg,
+ u32 offset, u32 blk_idx)
+{
+ int i;
+ u32 data;
+ /* INDEX_UPDATE */
+ data = (1 << 25) | (((~(1 << blk_idx)) & 0x7) << 28);
+ MDSS_MDP_REG_WRITE(offset, (cfg->c0_c1_data[0] & 0xFFF) | data);
+
+ /* disable index update */
+ data &= ~(1 << 25);
+ for (i = 1; i < cfg->len; i++)
+ MDSS_MDP_REG_WRITE(offset, (cfg->c0_c1_data[i] & 0xFFF) | data);
+
+ offset += 0x4;
+ data |= (1 << 25);
+ MDSS_MDP_REG_WRITE(offset, ((cfg->c0_c1_data[0] >> 16) & 0xFFF) | data);
+ data &= ~(1 << 25);
+ for (i = 1; i < cfg->len; i++)
+ MDSS_MDP_REG_WRITE(offset,
+ ((cfg->c0_c1_data[i] >> 16) & 0xFFF) | data);
+
+ offset += 0x4;
+ data |= (1 << 25);
+ MDSS_MDP_REG_WRITE(offset, (cfg->c2_data[0] & 0xFFF) | data);
+ data &= ~(1 << 25);
+ for (i = 1; i < cfg->len; i++)
+ MDSS_MDP_REG_WRITE(offset, (cfg->c2_data[i] & 0xFFF) | data);
+}
+
+int mdss_mdp_igc_lut_config(struct mdp_igc_lut_data *config, u32 *copyback)
+{
+ int ret = 0;
+ u32 tbl_idx, igc_offset, disp_num, dspp_num = 0;
+ struct mdp_igc_lut_data local_cfg;
+
+ if ((config->block < MDP_LOGICAL_BLOCK_DISP_0) ||
+ (config->block >= MDP_BLOCK_MAX))
+ return -EINVAL;
+
+ mutex_lock(&mdss_pp_mutex);
+ disp_num = config->block - MDP_LOGICAL_BLOCK_DISP_0;
+
+ if (config->ops & MDP_PP_OPS_READ) {
+ ret = pp_get_dspp_num(disp_num, &dspp_num);
+ if (ret) {
+ pr_err("%s, no dspp connects to disp %d",
+ __func__, disp_num);
+ goto igc_config_exit;
+ }
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ if (config->ops & MDP_PP_IGC_FLAG_ROM0)
+ tbl_idx = 1;
+ else if (config->ops & MDP_PP_IGC_FLAG_ROM1)
+ tbl_idx = 2;
+ else
+ tbl_idx = 0;
+ igc_offset = MDSS_MDP_REG_IGC_DSPP_BASE + (0x10 * tbl_idx);
+ local_cfg = *config;
+ local_cfg.c0_c1_data =
+ &mdss_pp_res->igc_lut_c0c1[disp_num][0];
+ local_cfg.c2_data =
+ &mdss_pp_res->igc_lut_c2[disp_num][0];
+ pp_read_igc_lut(&local_cfg, igc_offset, dspp_num);
+ if (copy_to_user(config->c0_c1_data, local_cfg.c2_data,
+ config->len * sizeof(u32))) {
+ ret = -EFAULT;
+ goto igc_config_exit;
+ }
+ if (copy_to_user(config->c2_data, local_cfg.c0_c1_data,
+ config->len * sizeof(u32))) {
+ ret = -EFAULT;
+ goto igc_config_exit;
+ }
+ *copyback = 1;
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+ } else {
+ if (copy_from_user(&mdss_pp_res->igc_lut_c0c1[disp_num][0],
+ config->c0_c1_data, config->len * sizeof(u32))) {
+ ret = -EFAULT;
+ goto igc_config_exit;
+ }
+ if (copy_from_user(&mdss_pp_res->igc_lut_c2[disp_num][0],
+ config->c2_data, config->len * sizeof(u32))) {
+ ret = -EFAULT;
+ goto igc_config_exit;
+ }
+ mdss_pp_res->igc_disp_cfg[disp_num] = *config;
+ mdss_pp_res->igc_disp_cfg[disp_num].c0_c1_data =
+ &mdss_pp_res->igc_lut_c0c1[disp_num][0];
+ mdss_pp_res->igc_disp_cfg[disp_num].c2_data =
+ &mdss_pp_res->igc_lut_c2[disp_num][0];
+ mdss_pp_res->pp_disp_flags[disp_num] |= PP_FLAGS_DIRTY_IGC;
+ }
+
+igc_config_exit:
+ mutex_unlock(&mdss_pp_mutex);
+ return ret;
+}
+static void pp_update_gc_one_lut(u32 offset,
+ struct mdp_ar_gc_lut_data *lut_data)
+{
+ int i, start_idx;
+
+ start_idx = (MDSS_MDP_REG_READ(offset) >> 16) & 0xF;
+ for (i = start_idx; i < GC_LUT_SEGMENTS; i++)
+ MDSS_MDP_REG_WRITE(offset, lut_data[i].x_start);
+ for (i = 0; i < start_idx; i++)
+ MDSS_MDP_REG_WRITE(offset, lut_data[i].x_start);
+ offset += 4;
+ start_idx = (MDSS_MDP_REG_READ(offset) >> 16) & 0xF;
+ for (i = start_idx; i < GC_LUT_SEGMENTS; i++)
+ MDSS_MDP_REG_WRITE(offset, lut_data[i].slope);
+ for (i = 0; i < start_idx; i++)
+ MDSS_MDP_REG_WRITE(offset, lut_data[i].slope);
+ offset += 4;
+ start_idx = (MDSS_MDP_REG_READ(offset) >> 16) & 0xF;
+ for (i = start_idx; i < GC_LUT_SEGMENTS; i++)
+ MDSS_MDP_REG_WRITE(offset, lut_data[i].offset);
+ for (i = 0; i < start_idx; i++)
+ MDSS_MDP_REG_WRITE(offset, lut_data[i].offset);
+}
+static void pp_update_argc_lut(u32 offset, struct mdp_pgc_lut_data *config)
+{
+ pp_update_gc_one_lut(offset, config->r_data);
+ offset += 0x10;
+ pp_update_gc_one_lut(offset, config->g_data);
+ offset += 0x10;
+ pp_update_gc_one_lut(offset, config->b_data);
+}
+static void pp_read_gc_one_lut(u32 offset,
+ struct mdp_ar_gc_lut_data *gc_data)
+{
+ int i, start_idx, data;
+ data = MDSS_MDP_REG_READ(offset);
+ start_idx = (data >> 16) & 0xF;
+ gc_data[start_idx].x_start = data & 0xFFF;
+
+ for (i = start_idx + 1; i < GC_LUT_SEGMENTS; i++) {
+ data = MDSS_MDP_REG_READ(offset);
+ gc_data[i].x_start = data & 0xFFF;
+ }
+ for (i = 0; i < start_idx; i++) {
+ data = MDSS_MDP_REG_READ(offset);
+ gc_data[i].x_start = data & 0xFFF;
+ }
+
+ offset += 4;
+ data = MDSS_MDP_REG_READ(offset);
+ start_idx = (data >> 16) & 0xF;
+ gc_data[start_idx].slope = data & 0x7FFF;
+ for (i = start_idx + 1; i < GC_LUT_SEGMENTS; i++) {
+ data = MDSS_MDP_REG_READ(offset);
+ gc_data[i].slope = data & 0x7FFF;
+ }
+ for (i = 0; i < start_idx; i++) {
+ data = MDSS_MDP_REG_READ(offset);
+ gc_data[i].slope = data & 0x7FFF;
+ }
+ offset += 4;
+ data = MDSS_MDP_REG_READ(offset);
+ start_idx = (data >> 16) & 0xF;
+ gc_data[start_idx].offset = data & 0x7FFF;
+ for (i = start_idx + 1; i < GC_LUT_SEGMENTS; i++) {
+ data = MDSS_MDP_REG_READ(offset);
+ gc_data[i].offset = data & 0x7FFF;
+ }
+ for (i = 0; i < start_idx; i++) {
+ data = MDSS_MDP_REG_READ(offset);
+ gc_data[i].offset = data & 0x7FFF;
+ }
+}
+
+static int pp_read_argc_lut(struct mdp_pgc_lut_data *config, u32 offset)
+{
+ int ret = 0;
+ pp_read_gc_one_lut(offset, config->r_data);
+ offset += 0x10;
+ pp_read_gc_one_lut(offset, config->g_data);
+ offset += 0x10;
+ pp_read_gc_one_lut(offset, config->b_data);
+ return ret;
+}
+int mdss_mdp_argc_config(struct mdp_pgc_lut_data *config, u32 *copyback)
+{
+ int ret = 0;
+ u32 argc_offset, disp_num, dspp_num = 0;
+ struct mdp_pgc_lut_data local_cfg;
+ u32 tbl_size;
+
+ if ((config->block < MDP_LOGICAL_BLOCK_DISP_0) ||
+ (config->block >= MDP_BLOCK_MAX))
+ return -EINVAL;
+
+ mutex_lock(&mdss_pp_mutex);
+ disp_num = config->block - MDP_LOGICAL_BLOCK_DISP_0;
+
+ tbl_size = GC_LUT_SEGMENTS * sizeof(struct mdp_ar_gc_lut_data);
+ if (config->flags & MDP_PP_OPS_READ) {
+ ret = pp_get_dspp_num(disp_num, &dspp_num);
+ if (ret) {
+ pr_err("%s, no dspp connects to disp %d",
+ __func__, disp_num);
+ goto argc_config_exit;
+ }
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+
+ argc_offset = MDSS_MDP_REG_LM_OFFSET(dspp_num) +
+ MDSS_MDP_REG_LM_GC_LUT_BASE;
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ local_cfg = *config;
+ local_cfg.r_data =
+ &mdss_pp_res->gc_lut_r[disp_num][0];
+ local_cfg.g_data =
+ &mdss_pp_res->gc_lut_g[disp_num][0];
+ local_cfg.b_data =
+ &mdss_pp_res->gc_lut_b[disp_num][0];
+ pp_read_argc_lut(&local_cfg, argc_offset);
+ if (copy_to_user(config->r_data,
+ &mdss_pp_res->gc_lut_r[disp_num][0], tbl_size)) {
+ ret = -EFAULT;
+ goto argc_config_exit;
+ }
+ if (copy_to_user(config->g_data,
+ &mdss_pp_res->gc_lut_g[disp_num][0], tbl_size)) {
+ ret = -EFAULT;
+ goto argc_config_exit;
+ }
+ if (copy_to_user(config->b_data,
+ &mdss_pp_res->gc_lut_b[disp_num][0], tbl_size)) {
+ ret = -EFAULT;
+ goto argc_config_exit;
+ }
+ *copyback = 1;
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+ } else {
+ if (copy_from_user(&mdss_pp_res->gc_lut_r[disp_num][0],
+ config->r_data, tbl_size)) {
+ ret = -EFAULT;
+ goto argc_config_exit;
+ }
+ if (copy_from_user(&mdss_pp_res->gc_lut_g[disp_num][0],
+ config->g_data, tbl_size)) {
+ ret = -EFAULT;
+ goto argc_config_exit;
+ }
+ if (copy_from_user(&mdss_pp_res->gc_lut_b[disp_num][0],
+ config->b_data, tbl_size)) {
+ ret = -EFAULT;
+ goto argc_config_exit;
+ }
+ mdss_pp_res->pgc_disp_cfg[disp_num] = *config;
+ mdss_pp_res->pgc_disp_cfg[disp_num].r_data =
+ &mdss_pp_res->gc_lut_r[disp_num][0];
+ mdss_pp_res->pgc_disp_cfg[disp_num].g_data =
+ &mdss_pp_res->gc_lut_g[disp_num][0];
+ mdss_pp_res->pgc_disp_cfg[disp_num].b_data =
+ &mdss_pp_res->gc_lut_b[disp_num][0];
+ mdss_pp_res->pp_disp_flags[disp_num] |= PP_FLAGS_DIRTY_ARGC;
+ }
+argc_config_exit:
+ mutex_unlock(&mdss_pp_mutex);
+ return ret;
+}
+int mdss_mdp_hist_lut_config(struct mdp_hist_lut_data *config, u32 *copyback)
+{
+ int i, ret = 0;
+ u32 hist_offset, disp_num, dspp_num = 0;
+
+ if ((config->block < MDP_LOGICAL_BLOCK_DISP_0) ||
+ (config->block >= MDP_BLOCK_MAX))
+ return -EINVAL;
+
+ mutex_lock(&mdss_pp_mutex);
+ disp_num = config->block - MDP_LOGICAL_BLOCK_DISP_0;
+
+ if (config->ops & MDP_PP_OPS_READ) {
+ ret = pp_get_dspp_num(disp_num, &dspp_num);
+ if (ret) {
+ pr_err("%s, no dspp connects to disp %d",
+ __func__, disp_num);
+ goto enhist_config_exit;
+ }
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+
+ hist_offset = MDSS_MDP_REG_DSPP_OFFSET(dspp_num) +
+ MDSS_MDP_REG_DSPP_HIST_LUT_BASE;
+ for (i = 0; i < ENHIST_LUT_ENTRIES; i++)
+ mdss_pp_res->enhist_lut[disp_num][i] =
+ MDSS_MDP_REG_READ(hist_offset);
+ if (copy_to_user(config->data,
+ &mdss_pp_res->enhist_lut[disp_num][0],
+ ENHIST_LUT_ENTRIES * sizeof(u32))) {
+ ret = -EFAULT;
+ goto enhist_config_exit;
+ }
+ *copyback = 1;
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+ } else {
+ if (copy_from_user(&mdss_pp_res->enhist_lut[disp_num][0],
+ config->data, ENHIST_LUT_ENTRIES * sizeof(u32))) {
+ ret = -EFAULT;
+ goto enhist_config_exit;
+ }
+ mdss_pp_res->enhist_disp_cfg[disp_num] = *config;
+ mdss_pp_res->enhist_disp_cfg[disp_num].data =
+ &mdss_pp_res->enhist_lut[disp_num][0];
+ mdss_pp_res->pp_disp_flags[disp_num] |= PP_FLAGS_DIRTY_ENHIST;
+ }
+enhist_config_exit:
+ mutex_unlock(&mdss_pp_mutex);
+ return ret;
+}
+
+int mdss_mdp_dither_config(struct mdp_dither_cfg_data *config, u32 *copyback)
+{
+ u32 disp_num;
+ if ((config->block < MDP_LOGICAL_BLOCK_DISP_0) ||
+ (config->block >= MDP_BLOCK_MAX))
+ return -EINVAL;
+ if (config->flags & MDP_PP_OPS_READ)
+ return -ENOTSUPP;
+
+ mutex_lock(&mdss_pp_mutex);
+ disp_num = config->block - MDP_LOGICAL_BLOCK_DISP_0;
+ mdss_pp_res->dither_disp_cfg[disp_num] = *config;
+ mdss_pp_res->pp_disp_flags[disp_num] |= PP_FLAGS_DIRTY_DITHER;
+ mutex_unlock(&mdss_pp_mutex);
+ return 0;
+}
+
+int mdss_mdp_gamut_config(struct mdp_gamut_cfg_data *config, u32 *copyback)
+{
+ int i, j, size_total = 0, ret = 0;
+ u32 offset, disp_num, dspp_num = 0;
+ uint16_t *tbl_off;
+ struct mdp_gamut_cfg_data local_cfg;
+
+ if ((config->block < MDP_LOGICAL_BLOCK_DISP_0) ||
+ (config->block >= MDP_BLOCK_MAX))
+ return -EINVAL;
+ for (i = 0; i < MDP_GAMUT_TABLE_NUM; i++)
+ size_total += config->tbl_size[i];
+ if (size_total != GAMUT_TOTAL_TABLE_SIZE)
+ return -EINVAL;
+
+ mutex_lock(&mdss_pp_mutex);
+ disp_num = config->block - MDP_LOGICAL_BLOCK_DISP_0;
+
+ if (config->flags & MDP_PP_OPS_READ) {
+ ret = pp_get_dspp_num(disp_num, &dspp_num);
+ if (ret) {
+ pr_err("%s, no dspp connects to disp %d",
+ __func__, disp_num);
+ goto gamut_config_exit;
+ }
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+
+ offset = MDSS_MDP_REG_DSPP_OFFSET(dspp_num) +
+ MDSS_MDP_REG_DSPP_GAMUT_BASE;
+ for (i = 0; i < MDP_GAMUT_TABLE_NUM; i++) {
+ for (j = 0; j < config->tbl_size[i]; j++)
+ config->r_tbl[i][j] =
+ (u16)MDSS_MDP_REG_READ(offset);
+ offset += 4;
+ }
+ for (i = 0; i < MDP_GAMUT_TABLE_NUM; i++) {
+ for (j = 0; j < config->tbl_size[i]; j++)
+ config->g_tbl[i][j] =
+ (u16)MDSS_MDP_REG_READ(offset);
+ offset += 4;
+ }
+ for (i = 0; i < MDP_GAMUT_TABLE_NUM; i++) {
+ for (j = 0; j < config->tbl_size[i]; j++)
+ config->b_tbl[i][j] =
+ (u16)MDSS_MDP_REG_READ(offset);
+ offset += 4;
+ }
+ *copyback = 1;
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+ } else {
+ local_cfg = *config;
+ tbl_off = mdss_pp_res->gamut_tbl[disp_num];
+ for (i = 0; i < MDP_GAMUT_TABLE_NUM; i++) {
+ local_cfg.r_tbl[i] = tbl_off;
+ if (copy_from_user(tbl_off, config->r_tbl[i],
+ config->tbl_size[i] * sizeof(uint16_t))) {
+ ret = -EFAULT;
+ goto gamut_config_exit;
+ }
+ tbl_off += local_cfg.tbl_size[i];
+ }
+ for (i = 0; i < MDP_GAMUT_TABLE_NUM; i++) {
+ local_cfg.g_tbl[i] = tbl_off;
+ if (copy_from_user(tbl_off, config->g_tbl[i],
+ config->tbl_size[i] * sizeof(uint16_t))) {
+ ret = -EFAULT;
+ goto gamut_config_exit;
+ }
+ tbl_off += local_cfg.tbl_size[i];
+ }
+ for (i = 0; i < MDP_GAMUT_TABLE_NUM; i++) {
+ local_cfg.b_tbl[i] = tbl_off;
+ if (copy_from_user(tbl_off, config->b_tbl[i],
+ config->tbl_size[i] * sizeof(uint16_t))) {
+ ret = -EFAULT;
+ goto gamut_config_exit;
+ }
+ tbl_off += local_cfg.tbl_size[i];
+ }
+ mdss_pp_res->gamut_disp_cfg[disp_num] = local_cfg;
+ mdss_pp_res->pp_disp_flags[disp_num] |= PP_FLAGS_DIRTY_GAMUT;
+ }
+gamut_config_exit:
+ mutex_unlock(&mdss_pp_mutex);
+ return ret;
+}
+static void pp_hist_read(u32 v_base, struct pp_hist_col_info *hist_info)
+{
+ int i, i_start;
+ u32 data;
+ data = MDSS_MDP_REG_READ(v_base);
+ i_start = data >> 24;
+ hist_info->data[i_start] = data & 0xFFFFFF;
+ for (i = i_start + 1; i < HIST_V_SIZE; i++)
+ hist_info->data[i] = MDSS_MDP_REG_READ(v_base) & 0xFFFFFF;
+ for (i = 0; i < i_start - 1; i++)
+ hist_info->data[i] = MDSS_MDP_REG_READ(v_base) & 0xFFFFFF;
+ hist_info->hist_cnt_read++;
+}
+
+int mdss_mdp_histogram_start(struct mdp_histogram_start_req *req)
+{
+ u32 ctl_base, done_shift_bit;
+ struct pp_hist_col_info *hist_info;
+ int i, ret = 0;
+ u32 disp_num, dspp_num = 0;
+ u32 mixer_cnt, mixer_id[MDSS_MDP_MAX_LAYERMIXER];
+
+ if ((req->block < MDP_LOGICAL_BLOCK_DISP_0) ||
+ (req->block >= MDP_BLOCK_MAX))
+ return -EINVAL;
+
+ mutex_lock(&mdss_mdp_hist_mutex);
+ disp_num = req->block - MDP_LOGICAL_BLOCK_DISP_0;
+ mixer_cnt = mdss_mdp_get_ctl_mixers(disp_num, mixer_id);
+
+ if (!mixer_cnt) {
+ pr_err("%s, no dspp connects to disp %d",
+ __func__, disp_num);
+ ret = -EPERM;
+ goto hist_start_exit;
+ }
+ if (mixer_cnt >= MDSS_MDP_MAX_DSPP) {
+ pr_err("%s, Too many dspp connects to disp %d",
+ __func__, mixer_cnt);
+ ret = -EPERM;
+ goto hist_start_exit;
+ }
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ for (i = 0; i < mixer_cnt; i++) {
+ dspp_num = mixer_id[i];
+ hist_info = &mdss_pp_res->dspp_hist[dspp_num];
+ done_shift_bit = (dspp_num * 4) + 12;
+ /* check if it is idle */
+ if (hist_info->col_en) {
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+ pr_info("%s Hist collection has already been enabled %d",
+ __func__, dspp_num);
+ goto hist_start_exit;
+ }
+ spin_lock(&mdss_hist_lock);
+ hist_info->frame_cnt = req->frame_cnt;
+ init_completion(&hist_info->comp);
+ hist_info->hist_cnt_read = 0;
+ hist_info->hist_cnt_sent = 0;
+ hist_info->read_request = false;
+ hist_info->col_state = HIST_RESET;
+ hist_info->col_en = true;
+ spin_unlock(&mdss_hist_lock);
+ mdss_pp_res->hist_col[disp_num][i] =
+ &mdss_pp_res->dspp_hist[dspp_num];
+ mdss_mdp_hist_irq_enable(3 << done_shift_bit);
+ ctl_base = MDSS_MDP_REG_DSPP_OFFSET(dspp_num) +
+ MDSS_MDP_REG_DSPP_HIST_CTL_BASE;
+ MDSS_MDP_REG_WRITE(ctl_base + 8, req->frame_cnt);
+ /* Kick out reset start */
+ MDSS_MDP_REG_WRITE(ctl_base + 4, 1);
+ }
+ for (i = mixer_cnt; i < MDSS_MDP_MAX_DSPP; i++)
+ mdss_pp_res->hist_col[disp_num][i] = 0;
+ mdss_pp_res->pp_disp_flags[disp_num] |= PP_FLAGS_DIRTY_HIST_COL;
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+hist_start_exit:
+ mutex_unlock(&mdss_mdp_hist_mutex);
+ return ret;
+}
+
+int mdss_mdp_histogram_stop(u32 block)
+{
+ int i, ret = 0;
+ u32 dspp_num, disp_num, ctl_base, done_bit;
+ struct pp_hist_col_info *hist_info;
+ u32 mixer_cnt, mixer_id[MDSS_MDP_MAX_LAYERMIXER];
+
+ if ((block < MDP_LOGICAL_BLOCK_DISP_0) ||
+ (block >= MDP_BLOCK_MAX))
+ return -EINVAL;
+
+ mutex_lock(&mdss_mdp_hist_mutex);
+ disp_num = block - MDP_LOGICAL_BLOCK_DISP_0;
+ mixer_cnt = mdss_mdp_get_ctl_mixers(disp_num, mixer_id);
+
+ if (!mixer_cnt) {
+ pr_err("%s, no dspp connects to disp %d",
+ __func__, disp_num);
+ ret = -EPERM;
+ goto hist_stop_exit;
+ }
+ if (mixer_cnt >= MDSS_MDP_MAX_DSPP) {
+ pr_err("%s, Too many dspp connects to disp %d",
+ __func__, mixer_cnt);
+ ret = -EPERM;
+ goto hist_stop_exit;
+ }
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ for (i = 0; i < mixer_cnt; i++) {
+ dspp_num = mixer_id[i];
+ hist_info = &mdss_pp_res->dspp_hist[dspp_num];
+ done_bit = 3 << ((dspp_num * 4) + 12);
+ ctl_base = MDSS_MDP_REG_DSPP_OFFSET(dspp_num) +
+ MDSS_MDP_REG_DSPP_HIST_CTL_BASE;
+ if (hist_info->col_en == false) {
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+ goto hist_stop_exit;
+ }
+ complete_all(&hist_info->comp);
+ spin_lock(&mdss_hist_lock);
+ hist_info->col_en = false;
+ hist_info->col_state = HIST_UNKNOWN;
+ spin_unlock(&mdss_hist_lock);
+ mdss_mdp_hist_irq_disable(done_bit);
+ MDSS_MDP_REG_WRITE(ctl_base, (1 << 1));/* cancel */
+ }
+ for (i = 0; i < MDSS_MDP_MAX_DSPP; i++)
+ mdss_pp_res->hist_col[disp_num][i] = 0;
+ mdss_pp_res->pp_disp_flags[disp_num] |= PP_FLAGS_DIRTY_HIST_COL;
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+hist_stop_exit:
+ mutex_unlock(&mdss_mdp_hist_mutex);
+ return ret;
+}
+
+int mdss_mdp_hist_collect(struct fb_info *info,
+ struct mdp_histogram_data *hist, u32 *hist_data_addr)
+{
+ int i, j, wait_ret, ret = 0;
+ u32 timeout, v_base;
+ struct pp_hist_col_info *hist_info;
+ u32 dspp_num, disp_num, ctl_base;
+ u32 mixer_cnt, mixer_id[MDSS_MDP_MAX_LAYERMIXER];
+
+ if ((hist->block < MDP_LOGICAL_BLOCK_DISP_0) ||
+ (hist->block >= MDP_BLOCK_MAX))
+ return -EINVAL;
+
+ mutex_lock(&mdss_mdp_hist_mutex);
+ disp_num = hist->block - MDP_LOGICAL_BLOCK_DISP_0;
+ mixer_cnt = mdss_mdp_get_ctl_mixers(disp_num, mixer_id);
+
+ if (!mixer_cnt) {
+ pr_err("%s, no dspp connects to disp %d",
+ __func__, disp_num);
+ ret = -EPERM;
+ goto hist_collect_exit;
+ }
+ if (mixer_cnt >= MDSS_MDP_MAX_DSPP) {
+ pr_err("%s, Too many dspp connects to disp %d",
+ __func__, mixer_cnt);
+ ret = -EPERM;
+ goto hist_collect_exit;
+ }
+ hist_info = &mdss_pp_res->dspp_hist[0];
+ for (i = 0; i < mixer_cnt; i++) {
+ dspp_num = mixer_id[i];
+ hist_info = &mdss_pp_res->dspp_hist[dspp_num];
+ ctl_base = MDSS_MDP_REG_DSPP_OFFSET(dspp_num) +
+ MDSS_MDP_REG_DSPP_HIST_CTL_BASE;
+ if ((hist_info->col_en == 0) ||
+ (hist_info->col_state == HIST_UNKNOWN)) {
+ ret = -EINVAL;
+ goto hist_collect_exit;
+ }
+ spin_lock(&mdss_hist_lock);
+ if ((hist_info->col_state == HIST_READY) ||
+ (hist_info->hist_cnt_read == 0)) {
+ /* wait for hist done if cache has no data */
+ if ((hist_info->col_state != HIST_READY) &&
+ (hist_info->hist_cnt_read == 0)) {
+ hist_info->read_request = true;
+ spin_unlock(&mdss_hist_lock);
+ timeout = HIST_WAIT_TIMEOUT *
+ hist_info->frame_cnt;
+ mutex_unlock(&mdss_mdp_hist_mutex);
+ wait_ret = wait_for_completion_killable_timeout(
+ &(hist_info->comp), timeout);
+
+ mutex_lock(&mdss_mdp_hist_mutex);
+ hist_info->read_request = false;
+ if (wait_ret == 0) {
+ ret = -ETIMEDOUT;
+ pr_debug("%s: bin collection timedout",
+ __func__);
+ goto hist_collect_exit;
+ } else if (wait_ret < 0) {
+ ret = -EINTR;
+ pr_debug("%s: bin collection interrupted",
+ __func__);
+ goto hist_collect_exit;
+ }
+ if (hist_info->col_state != HIST_READY) {
+ ret = -EBUSY;
+ pr_err("%s: collection state is not ready: %d",
+ __func__, hist_info->col_state);
+ goto hist_collect_exit;
+ }
+ } else {
+ spin_unlock(&mdss_hist_lock);
+ }
+ if (hist_info->col_state == HIST_READY) {
+ v_base = ctl_base + 0x1C;
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
+ pp_hist_read(v_base, hist_info);
+ mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
+ spin_lock(&mdss_hist_lock);
+ hist_info->col_state = HIST_IDLE;
+ spin_unlock(&mdss_hist_lock);
+ }
+ } else {
+ spin_unlock(&mdss_hist_lock);
+ }
+ hist_info->hist_cnt_sent = hist_info->hist_cnt_read;
+ }
+ if (mixer_cnt > 1) {
+ memset(&mdss_pp_res->hist_data[disp_num][0],
+ 0, HIST_V_SIZE * sizeof(u32));
+ for (i = 0; i < mixer_cnt; i++) {
+ dspp_num = mixer_id[i];
+ hist_info = &mdss_pp_res->dspp_hist[dspp_num];
+ for (j = 0; j < HIST_V_SIZE; j++)
+ mdss_pp_res->hist_data[disp_num][i] +=
+ hist_info->data[i];
+ }
+ *hist_data_addr = (u32)&mdss_pp_res->hist_data[disp_num][0];
+ } else {
+ *hist_data_addr = (u32)hist_info->data;
+ }
+
+hist_collect_exit:
+ mutex_unlock(&mdss_mdp_hist_mutex);
+ return ret;
+}
+void mdss_mdp_hist_intr_done(u32 isr)
+{
+ u32 isr_blk, blk_idx;
+ struct pp_hist_col_info *hist_info;
+ isr &= 0x333333;
+ while (isr != 0) {
+ if (isr & 0xFFF000) {
+ if (isr & 0x3000) {
+ blk_idx = 0;
+ isr_blk = (isr >> 12) & 0x3;
+ isr &= ~0x3000;
+ } else if (isr & 0x30000) {
+ blk_idx = 1;
+ isr_blk = (isr >> 16) & 0x3;
+ isr &= ~0x30000;
+ } else {
+ blk_idx = 2;
+ isr_blk = (isr >> 20) & 0x3;
+ isr &= ~0x300000;
+ }
+ hist_info = &mdss_pp_res->dspp_hist[blk_idx];
+ } else {
+ if (isr & 0x3) {
+ blk_idx = 0;
+ isr_blk = isr & 0x3;
+ isr &= ~0x3;
+ } else if (isr & 0x30) {
+ blk_idx = 1;
+ isr_blk = (isr >> 4) & 0x3;
+ isr &= ~0x30;
+ } else {
+ blk_idx = 2;
+ isr_blk = (isr >> 8) & 0x3;
+ isr &= ~0x300;
+ }
+ /* SSPP block, not support yet*/
+ continue;
+ }
+ /* Histogram Done Interrupt */
+ if ((isr_blk & 0x1) &&
+ (hist_info->col_en)) {
+ spin_lock(&mdss_hist_lock);
+ hist_info->col_state = HIST_READY;
+ spin_unlock(&mdss_hist_lock);
+ if (hist_info->read_request)
+ complete(&hist_info->comp);
+ }
+ /* Histogram Reset Done Interrupt */
+ if ((isr_blk & 0x2) &&
+ (hist_info->col_en)) {
+ spin_lock(&mdss_hist_lock);
+ hist_info->col_state = HIST_IDLE;
+ spin_unlock(&mdss_hist_lock);
+ }
+ };
+}
diff --git a/drivers/video/msm/mdss/mdss_mdp_util.c b/drivers/video/msm/mdss/mdss_mdp_util.c
index 57e8441..95c92fc 100644
--- a/drivers/video/msm/mdss/mdss_mdp_util.c
+++ b/drivers/video/msm/mdss/mdss_mdp_util.c
@@ -112,22 +112,22 @@
irqreturn_t mdss_mdp_isr(int irq, void *ptr)
{
- u32 isr, mask;
+ u32 isr, mask, hist_isr, hist_mask;
isr = MDSS_MDP_REG_READ(MDSS_MDP_REG_INTR_STATUS);
- pr_debug("isr=%x\n", isr);
-
if (isr == 0)
- goto done;
+ goto mdp_isr_done;
+
+ pr_debug("isr=%x\n", isr);
mask = MDSS_MDP_REG_READ(MDSS_MDP_REG_INTR_EN);
MDSS_MDP_REG_WRITE(MDSS_MDP_REG_INTR_CLEAR, isr);
isr &= mask;
if (isr == 0)
- goto done;
+ goto mdp_isr_done;
if (isr & MDSS_MDP_INTR_PING_PONG_0_DONE)
mdss_mdp_intr_done(MDP_INTR_PING_PONG_0);
@@ -159,7 +159,17 @@
if (isr & MDSS_MDP_INTR_WB_2_DONE)
mdss_mdp_intr_done(MDP_INTR_WB_2);
-done:
+mdp_isr_done:
+ hist_isr = MDSS_MDP_REG_READ(MDSS_MDP_REG_HIST_INTR_STATUS);
+ if (hist_isr == 0)
+ goto hist_isr_done;
+ hist_mask = MDSS_MDP_REG_READ(MDSS_MDP_REG_HIST_INTR_EN);
+ MDSS_MDP_REG_WRITE(MDSS_MDP_REG_HIST_INTR_CLEAR, hist_isr);
+ hist_isr &= hist_mask;
+ if (hist_isr == 0)
+ goto hist_isr_done;
+ mdss_mdp_hist_intr_done(hist_isr);
+hist_isr_done:
return IRQ_HANDLED;
}
@@ -203,7 +213,7 @@
} else {
u8 hmap[] = { 1, 2, 1, 2 };
u8 vmap[] = { 1, 1, 2, 2 };
- u8 horiz, vert, stride_align;
+ u8 horiz, vert, stride_align, height_align;
horiz = hmap[fmt->chroma_sample];
vert = vmap[fmt->chroma_sample];
@@ -211,18 +221,21 @@
switch (format) {
case MDP_Y_CR_CB_GH2V2:
stride_align = 16;
+ height_align = 1;
break;
case MDP_Y_CBCR_H2V2_VENUS:
stride_align = 32;
+ height_align = 32;
break;
default:
stride_align = 1;
+ height_align = 1;
break;
}
ps->ystride[0] = ALIGN(w, stride_align);
ps->ystride[1] = ALIGN(w / horiz, stride_align);
- ps->plane_size[0] = ps->ystride[0] * h;
+ ps->plane_size[0] = ps->ystride[0] * ALIGN(h, height_align);
ps->plane_size[1] = ps->ystride[1] * (h / vert);
if (fmt->fetch_planes == MDSS_MDP_PLANE_PSEUDO_PLANAR) {
diff --git a/drivers/video/msm/mdss/mdss_mdp_wb.c b/drivers/video/msm/mdss/mdss_mdp_wb.c
index bd5f464..b18efbe 100644
--- a/drivers/video/msm/mdss/mdss_mdp_wb.c
+++ b/drivers/video/msm/mdss/mdss_mdp_wb.c
@@ -86,13 +86,13 @@
ihdl = ion_alloc(iclient, img_size, SZ_4K,
- ION_HEAP(ION_SF_HEAP_ID));
+ ION_HEAP(ION_SF_HEAP_ID), 0);
if (IS_ERR_OR_NULL(ihdl)) {
pr_err("unable to alloc fbmem from ion (%p)\n", ihdl);
return NULL;
}
- videomemory = ion_map_kernel(iclient, ihdl, 0);
+ videomemory = ion_map_kernel(iclient, ihdl);
ion_phys(iclient, ihdl, &mdss_wb_mem, &img_size);
if (is_mdss_iommu_attached()) {
@@ -388,7 +388,7 @@
ret = -ENOBUFS;
}
mutex_unlock(&wb->lock);
- return 0;
+ return ret;
}
static void mdss_mdp_wb_callback(void *arg)
diff --git a/drivers/video/msm/mdss/mdss_panel.h b/drivers/video/msm/mdss/mdss_panel.h
index f1a4e50..5cdfe34 100644
--- a/drivers/video/msm/mdss/mdss_panel.h
+++ b/drivers/video/msm/mdss/mdss_panel.h
@@ -86,7 +86,7 @@
/* DSI PHY configuration */
struct mdss_dsi_phy_ctrl {
- uint32_t regulator[8];
+ uint32_t regulator[7];
uint32_t timing[12];
uint32_t ctrl[4];
uint32_t strength[2];
@@ -180,6 +180,7 @@
struct mdss_panel_info panel_info;
void (*set_backlight) (struct mdss_panel_data *pdata,
u32 bl_level);
+ int (*intf_unprepare) (struct mdss_panel_data *pdata);
unsigned char *mmss_cc_base;
/* function entry chain */
diff --git a/drivers/video/msm/mdss/msm_mdss_io_8974.c b/drivers/video/msm/mdss/msm_mdss_io_8974.c
index 545d53c..1232ec6 100644
--- a/drivers/video/msm/mdss/msm_mdss_io_8974.c
+++ b/drivers/video/msm/mdss/msm_mdss_io_8974.c
@@ -212,25 +212,34 @@
{
/* start phy sw reset */
MIPI_OUTP(ctrl_base + 0x12c, 0x0001);
+ udelay(1000);
wmb();
- usleep(1);
/* end phy sw reset */
MIPI_OUTP(ctrl_base + 0x12c, 0x0000);
+ udelay(100);
wmb();
- usleep(1);
}
void mdss_dsi_phy_enable(unsigned char *ctrl_base, int on)
{
if (on) {
+ MIPI_OUTP(ctrl_base + 0x03cc, 0x03);
+ wmb();
+ usleep(100);
MIPI_OUTP(ctrl_base + 0x0220, 0x006);
- usleep(10);
+ wmb();
+ usleep(100);
MIPI_OUTP(ctrl_base + 0x0268, 0x001);
- usleep(10);
+ wmb();
+ usleep(100);
MIPI_OUTP(ctrl_base + 0x0268, 0x000);
- usleep(10);
+ wmb();
+ usleep(100);
MIPI_OUTP(ctrl_base + 0x0220, 0x007);
wmb();
+ MIPI_OUTP(ctrl_base + 0x03cc, 0x01);
+ wmb();
+ usleep(100);
/* MMSS_DSI_0_PHY_DSIPHY_CTRL_0 */
MIPI_OUTP(ctrl_base + 0x0470, 0x07e);
@@ -266,12 +275,25 @@
pd = ((ctrl_pdata->panel_data).panel_info.mipi).dsi_phy_db;
+ /* Strength ctrl 0 */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0484, 0x07);
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0484, pd->strength[0]);
+
off = 0x0580; /* phy regulator ctrl settings */
- for (i = 0; i < 8; i++) {
- MIPI_OUTP((ctrl_pdata->ctrl_base) + off, pd->regulator[i]);
- wmb();
- off += 4;
- }
+ /* Regulator ctrl - CAL_PWD_CFG */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + off + (4 * 6), pd->regulator[6]);
+ /* Regulator ctrl - TEST */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + off + (4 * 5), pd->regulator[5]);
+ /* Regulator ctrl 3 */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + off + (4 * 3), pd->regulator[3]);
+ /* Regulator ctrl 2 */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + off + (4 * 2), pd->regulator[2]);
+ /* Regulator ctrl 1 */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + off + (4 * 1), pd->regulator[1]);
+ /* Regulator ctrl 0 */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + off + (4 * 0), pd->regulator[0]);
+ /* Regulator ctrl 4 */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + off + (4 * 4), pd->regulator[4]);
off = 0x0440; /* phy timing ctrl 0 - 11 */
for (i = 0; i < 12; i++) {
@@ -280,17 +302,15 @@
off += 4;
}
- /* Strength ctrl 0 - 1 */
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0484, pd->strength[0]);
- MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0488, pd->strength[1]);
+ /* MMSS_DSI_0_PHY_DSIPHY_CTRL_1 */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0474, 0x00);
+ /* MMSS_DSI_0_PHY_DSIPHY_CTRL_0 */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0470, 0x5f);
wmb();
- off = 0x04b4; /* phy BIST ctrl 0 - 5 */
- for (i = 0; i < 6; i++) {
- MIPI_OUTP((ctrl_pdata->ctrl_base) + off, pd->bistCtrl[i]);
- wmb();
- off += 4;
- }
+ /* Strength ctrl 1 */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0488, pd->strength[1]);
+ wmb();
/* 4 lanes + clk lane configuration */
/* lane config n * (0 - 4) & DataPath setup */
@@ -304,4 +324,20 @@
off += 4;
}
}
+
+ /* MMSS_DSI_0_PHY_DSIPHY_CTRL_0 */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x0470, 0x7f);
+ wmb();
+
+ /* DSI_0_PHY_DSIPHY_GLBL_TEST_CTRL */
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x04d4, 0x01);
+ wmb();
+
+ off = 0x04b4; /* phy BIST ctrl 0 - 5 */
+ for (i = 0; i < 6; i++) {
+ MIPI_OUTP((ctrl_pdata->ctrl_base) + off, pd->bistCtrl[i]);
+ wmb();
+ off += 4;
+ }
+
}
diff --git a/drivers/video/msm/mhl/mhl_8334.c b/drivers/video/msm/mhl/mhl_8334.c
index f3b8cd1..6c0778f 100644
--- a/drivers/video/msm/mhl/mhl_8334.c
+++ b/drivers/video/msm/mhl/mhl_8334.c
@@ -62,6 +62,9 @@
void (*notify_usb_online)(int online);
static void mhl_drive_hpd(uint8_t to_state);
static int mhl_send_msc_command(struct msc_command_struct *req);
+static void list_cmd_put(struct msc_command_struct *cmd);
+static struct msc_command_struct *list_cmd_get(void);
+static void mhl_msc_send_work(struct work_struct *work);
static struct i2c_driver mhl_sii_i2c_driver = {
.driver = {
@@ -618,7 +621,7 @@
list_add_tail(&new_cmd->msc_queue_envelope, &mhl_msm_state->list_cmd);
}
-struct msc_command_struct *list_cmd_get(void)
+static struct msc_command_struct *list_cmd_get(void)
{
struct msc_cmd_envelope *cmd_env =
list_first_entry(&mhl_msm_state->list_cmd,
diff --git a/drivers/video/msm/mipi_NT35510.c b/drivers/video/msm/mipi_NT35510.c
index 0c6ff79..d75198a 100644
--- a/drivers/video/msm/mipi_NT35510.c
+++ b/drivers/video/msm/mipi_NT35510.c
@@ -32,8 +32,8 @@
static char write_ram[2] = {0x2c, 0x00}; /* write ram */
static struct dsi_cmd_desc nt35510_display_off_cmds[] = {
- {DTYPE_DCS_WRITE, 1, 0, 0, 150, sizeof(display_off), display_off},
- {DTYPE_DCS_WRITE, 1, 0, 0, 150, sizeof(enter_sleep), enter_sleep}
+ {DTYPE_DCS_WRITE, 1, 0, 0, 50, sizeof(display_off), display_off},
+ {DTYPE_DCS_WRITE, 1, 0, 0, 50, sizeof(enter_sleep), enter_sleep}
};
static char cmd0[6] = {
@@ -213,46 +213,46 @@
};
static char config_MADCTL[2] = {0x36, 0x00};
static struct dsi_cmd_desc nt35510_cmd_display_on_cmds[] = {
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd0), cmd0},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd1), cmd1},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd2), cmd2},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd3), cmd3},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd4), cmd4},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd5), cmd5},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd6), cmd6},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd7), cmd7},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd8), cmd8},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd9), cmd9},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd10), cmd10},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd11), cmd11},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd12), cmd12},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd13), cmd13},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd14), cmd14},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd15), cmd15},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd16), cmd16},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd17), cmd17},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd18), cmd18},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd19), cmd19},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd20), cmd20},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd21), cmd21},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd22), cmd22},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd23), cmd23},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd24), cmd24},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd25), cmd25},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd26), cmd26},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(cmd27), cmd27},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd0), cmd0},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd1), cmd1},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd2), cmd2},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd3), cmd3},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd4), cmd4},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd5), cmd5},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd6), cmd6},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd7), cmd7},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd8), cmd8},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd9), cmd9},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd10), cmd10},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd11), cmd11},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd12), cmd12},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd13), cmd13},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd14), cmd14},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd15), cmd15},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd16), cmd16},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd17), cmd17},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd18), cmd18},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd19), cmd19},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd20), cmd20},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd21), cmd21},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd22), cmd22},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd23), cmd23},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd24), cmd24},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd25), cmd25},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd26), cmd26},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(cmd27), cmd27},
- {DTYPE_DCS_WRITE, 1, 0, 0, 150, sizeof(exit_sleep), exit_sleep},
- {DTYPE_DCS_WRITE, 1, 0, 0, 10, sizeof(display_on), display_on},
+ {DTYPE_DCS_WRITE, 1, 0, 0, 0, sizeof(exit_sleep), exit_sleep},
+ {DTYPE_DCS_WRITE, 1, 0, 0, 0, sizeof(display_on), display_on},
- {DTYPE_DCS_WRITE1, 1, 0, 0, 150,
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0,
sizeof(config_MADCTL), config_MADCTL},
- {DTYPE_DCS_WRITE, 1, 0, 0, 10, sizeof(write_ram), write_ram},
+ {DTYPE_DCS_WRITE, 1, 0, 0, 0, sizeof(write_ram), write_ram},
};
static struct dsi_cmd_desc nt35510_cmd_display_on_cmds_rotate[] = {
- {DTYPE_DCS_LWRITE, 1, 0, 0, 50,
+ {DTYPE_DCS_LWRITE, 1, 0, 0, 0,
sizeof(cmd19_rotate), cmd19_rotate},
};
@@ -430,34 +430,34 @@
};
static char config_video_MADCTL[2] = {0x36, 0xC0};
static struct dsi_cmd_desc nt35510_video_display_on_cmds[] = {
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video0), video0},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video1), video1},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video2), video2},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video3), video3},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video4), video4},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video5), video5},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video6), video6},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video7), video7},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video8), video8},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video9), video9},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video10), video10},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video11), video11},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video12), video12},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video13), video13},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video14), video14},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video15), video15},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video16), video16},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video17), video17},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video18), video18},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video19), video19},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video20), video20},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video21), video21},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video22), video22},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video23), video23},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video24), video24},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video25), video25},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video26), video26},
- {DTYPE_GEN_LWRITE, 1, 0, 0, 50, sizeof(video27), video27},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video0), video0},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video1), video1},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video2), video2},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video3), video3},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video4), video4},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video5), video5},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video6), video6},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video7), video7},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video8), video8},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video9), video9},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video10), video10},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video11), video11},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video12), video12},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video13), video13},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video14), video14},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video15), video15},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video16), video16},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video17), video17},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video18), video18},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video19), video19},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video20), video20},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video21), video21},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video22), video22},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video23), video23},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video24), video24},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video25), video25},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video26), video26},
+ {DTYPE_GEN_LWRITE, 1, 0, 0, 0, sizeof(video27), video27},
{DTYPE_DCS_WRITE, 1, 0, 0, NT35510_SLEEP_OFF_DELAY, sizeof(exit_sleep),
exit_sleep},
{DTYPE_DCS_WRITE, 1, 0, 0, NT35510_DISPLAY_ON_DELAY, sizeof(display_on),
@@ -465,7 +465,7 @@
};
static struct dsi_cmd_desc nt35510_video_display_on_cmds_rotate[] = {
- {DTYPE_DCS_WRITE1, 1, 0, 0, 150,
+ {DTYPE_DCS_WRITE1, 1, 0, 0, 0,
sizeof(config_video_MADCTL), config_video_MADCTL},
};
static int mipi_nt35510_lcd_on(struct platform_device *pdev)
diff --git a/drivers/video/msm/mipi_dsi_host.c b/drivers/video/msm/mipi_dsi_host.c
index 2b75193..60311dc 100644
--- a/drivers/video/msm/mipi_dsi_host.c
+++ b/drivers/video/msm/mipi_dsi_host.c
@@ -25,6 +25,7 @@
#include <linux/uaccess.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
+#include <linux/iopoll.h>
#include <asm/system.h>
#include <asm/mach-types.h>
@@ -964,31 +965,30 @@
uint32 dsi_ctrl;
uint32 status;
- int cnt;
+ u32 sleep_us = 1000;
+ u32 timeout_us = 16000;
- cnt = 16;
- while (cnt--) {
- status = MIPI_INP(MIPI_DSI_BASE + 0x0004);
- status &= 0x02; /* CMD_MODE_DMA_BUSY */
- if (status == 0)
- break;
- usleep(1000);
- }
- if (cnt == 0)
+ /* Check for CMD_MODE_DMA_BUSY */
+ if (readl_poll_timeout((MIPI_DSI_BASE + 0x0004),
+ status,
+ ((status & 0x02) == 0),
+ sleep_us, timeout_us))
pr_info("%s: DSI status=%x failed\n", __func__, status);
- cnt = 16;
- while (cnt--) {
- status = MIPI_INP(MIPI_DSI_BASE + 0x0008);
- status &= 0x11111000; /* x_HS_FIFO_EMPTY */
- if (status == 0x11111000) /* all empty */
- break;
- usleep(1000);
- }
-
- if (cnt == 0)
+ /* Check for x_HS_FIFO_EMPTY */
+ if (readl_poll_timeout((MIPI_DSI_BASE + 0x0008),
+ status,
+ ((status & 0x11111000) == 0x11111000),
+ sleep_us, timeout_us))
pr_info("%s: FIFO status=%x failed\n", __func__, status);
+ /* Check for VIDEO_MODE_ENGINE_BUSY */
+ if (readl_poll_timeout((MIPI_DSI_BASE + 0x0004),
+ status,
+ ((status & 0x08) == 0),
+ sleep_us, timeout_us))
+ pr_info("%s: DSI status=%x failed\n", __func__, status);
+
dsi_ctrl = MIPI_INP(MIPI_DSI_BASE + 0x0000);
if (enable)
dsi_ctrl |= 0x01;
diff --git a/drivers/video/msm/msm_fb.c b/drivers/video/msm/msm_fb.c
index 9c55fe8..1994b1b 100644
--- a/drivers/video/msm/msm_fb.c
+++ b/drivers/video/msm/msm_fb.c
@@ -185,8 +185,9 @@
if (!bl_lvl && value)
bl_lvl = 1;
-
+ down(&mfd->sem);
msm_fb_set_backlight(mfd, bl_lvl);
+ up(&mfd->sem);
}
static struct led_classdev backlight_led = {
@@ -809,7 +810,9 @@
struct mdp_bl_scale_data *data)
{
int ret = 0;
- int curr_bl = mfd->bl_level;
+ int curr_bl;
+ down(&mfd->sem);
+ curr_bl = mfd->bl_level;
bl_scale = data->scale;
bl_min_lvl = data->min_lvl;
pr_debug("%s: update scale = %d, min_lvl = %d\n", __func__, bl_scale,
@@ -817,6 +820,7 @@
/* update current backlight to use new scaling*/
msm_fb_set_backlight(mfd, curr_bl);
+ up(&mfd->sem);
return ret;
}
@@ -824,6 +828,7 @@
static void msm_fb_scale_bl(__u32 *bl_lvl)
{
__u32 temp = *bl_lvl;
+ pr_debug("%s: input = %d, scale = %d", __func__, temp, bl_scale);
if (temp >= bl_min_lvl) {
/* bl_scale is the numerator of scaling fraction (x/1024)*/
temp = ((*bl_lvl) * bl_scale) / 1024;
@@ -832,10 +837,12 @@
if (temp < bl_min_lvl)
temp = bl_min_lvl;
}
+ pr_debug("%s: output = %d", __func__, temp);
(*bl_lvl) = temp;
}
+/*must call this function from within mfd->sem*/
void msm_fb_set_backlight(struct msm_fb_data_type *mfd, __u32 bkl_lvl)
{
struct msm_fb_panel_data *pdata;
@@ -847,20 +854,17 @@
unset_bl_level = 0;
}
- msm_fb_scale_bl(&temp);
pdata = (struct msm_fb_panel_data *)mfd->pdev->dev.platform_data;
if ((pdata) && (pdata->set_backlight)) {
- down(&mfd->sem);
+ msm_fb_scale_bl(&temp);
if (bl_level_old == temp) {
- up(&mfd->sem);
return;
}
mfd->bl_level = temp;
pdata->set_backlight(mfd);
mfd->bl_level = bkl_lvl;
bl_level_old = temp;
- up(&mfd->sem);
}
}
@@ -2957,6 +2961,19 @@
return ret;
}
+static int msmfb_overlay_commit(struct fb_info *info, unsigned long *argp)
+{
+ int ret, ndx;
+
+ ret = copy_from_user(&ndx, argp, sizeof(ndx));
+ if (ret) {
+ pr_err("%s: ioctl failed\n", __func__);
+ return ret;
+ }
+
+ return mdp4_overlay_commit(info, ndx);
+}
+
static int msmfb_overlay_play(struct fb_info *info, unsigned long *argp)
{
int ret;
@@ -3376,49 +3393,36 @@
switch (cmd) {
#ifdef CONFIG_FB_MSM_OVERLAY
case MSMFB_OVERLAY_GET:
- down(&msm_fb_ioctl_ppp_sem);
ret = msmfb_overlay_get(info, argp);
- up(&msm_fb_ioctl_ppp_sem);
break;
case MSMFB_OVERLAY_SET:
- down(&msm_fb_ioctl_ppp_sem);
ret = msmfb_overlay_set(info, argp);
- up(&msm_fb_ioctl_ppp_sem);
break;
case MSMFB_OVERLAY_UNSET:
- down(&msm_fb_ioctl_ppp_sem);
ret = msmfb_overlay_unset(info, argp);
+ break;
+ case MSMFB_OVERLAY_COMMIT:
+ down(&msm_fb_ioctl_ppp_sem);
+ ret = msmfb_overlay_commit(info, argp);
up(&msm_fb_ioctl_ppp_sem);
break;
case MSMFB_OVERLAY_PLAY:
- down(&msm_fb_ioctl_ppp_sem);
ret = msmfb_overlay_play(info, argp);
- up(&msm_fb_ioctl_ppp_sem);
break;
case MSMFB_OVERLAY_PLAY_ENABLE:
- down(&msm_fb_ioctl_ppp_sem);
ret = msmfb_overlay_play_enable(info, argp);
- up(&msm_fb_ioctl_ppp_sem);
break;
case MSMFB_OVERLAY_PLAY_WAIT:
- down(&msm_fb_ioctl_ppp_sem);
ret = msmfb_overlay_play_wait(info, argp);
- up(&msm_fb_ioctl_ppp_sem);
break;
case MSMFB_OVERLAY_BLT:
- down(&msm_fb_ioctl_ppp_sem);
ret = msmfb_overlay_blt(info, argp);
- up(&msm_fb_ioctl_ppp_sem);
break;
case MSMFB_OVERLAY_3D:
- down(&msm_fb_ioctl_ppp_sem);
ret = msmfb_overlay_3d_sbys(info, argp);
- up(&msm_fb_ioctl_ppp_sem);
break;
case MSMFB_MIXER_INFO:
- down(&msm_fb_ioctl_ppp_sem);
ret = msmfb_mixer_info(info, argp);
- up(&msm_fb_ioctl_ppp_sem);
break;
case MSMFB_WRITEBACK_INIT:
ret = msmfb_overlay_ioctl_writeback_init(info);
diff --git a/drivers/video/msm/msm_fb.h b/drivers/video/msm/msm_fb.h
index 2896349..7dc89ef 100644
--- a/drivers/video/msm/msm_fb.h
+++ b/drivers/video/msm/msm_fb.h
@@ -37,7 +37,6 @@
#include <linux/fb.h>
#include <linux/list.h>
#include <linux/types.h>
-
#include <linux/msm_mdp.h>
#ifdef CONFIG_HAS_EARLYSUSPEND
#include <linux/earlysuspend.h>
@@ -189,6 +188,7 @@
int cont_splash_done;
void *copy_splash_buf;
unsigned char *copy_splash_phys;
+ void *cpu_pm_hdl;
};
struct dentry *msm_fb_get_debugfs_root(void);
diff --git a/drivers/video/msm/msm_fb_bl.c b/drivers/video/msm/msm_fb_bl.c
index 9afbbf1..b21adee 100644
--- a/drivers/video/msm/msm_fb_bl.c
+++ b/drivers/video/msm/msm_fb_bl.c
@@ -34,7 +34,9 @@
bl_lvl = pbd->props.brightness;
bl_lvl = mfd->fbi->bl_curve[bl_lvl];
+ down(&mfd->sem);
msm_fb_set_backlight(mfd, bl_lvl);
+ up(&mfd->sem);
return 0;
}
diff --git a/drivers/video/msm/msm_fb_panel.h b/drivers/video/msm/msm_fb_panel.h
index a2c3db1..7fc7a2f 100644
--- a/drivers/video/msm/msm_fb_panel.h
+++ b/drivers/video/msm/msm_fb_panel.h
@@ -168,7 +168,7 @@
__u32 frame_count;
__u32 is_3d_panel;
__u32 frame_rate;
-
+ __u32 frame_interval;
struct mddi_panel_info mddi;
struct lcd_panel_info lcd;
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl.h b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl.h
index 400a3a7..2a850d8 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl.h
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl.h
@@ -292,6 +292,7 @@
u32 num_slices_comp;
struct vcd_property_slice_delivery_info slice_delivery_info;
struct ddl_batch_frame_data batch_frame;
+ u32 avc_delimiter_enable;
};
struct ddl_decoder_data {
struct ddl_codec_data_hdr hdr;
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_errors.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_errors.c
index 3620f1a..2af76f3 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_errors.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_errors.c
@@ -70,7 +70,6 @@
case VIDC_1080P_ERROR_MEM_ALLOCATION_FAILED:
case VIDC_1080P_ERROR_INSUFFICIENT_CONTEXT_SIZE:
case VIDC_1080P_ERROR_DIVIDE_BY_ZERO:
- case VIDC_1080P_ERROR_DESCRIPTOR_BUFFER_EMPTY:
case VIDC_1080P_ERROR_DMA_TX_NOT_COMPLETE:
case VIDC_1080P_ERROR_VSP_NOT_READY:
case VIDC_1080P_ERROR_BUFFER_FULL_STATE:
@@ -242,6 +241,7 @@
case VIDC_1080P_ERROR_HEADER_NOT_FOUND:
case VIDC_1080P_ERROR_SLICE_PARSE_ERROR:
case VIDC_1080P_ERROR_NON_PAIRED_FIELD_NOT_SUPPORTED:
+ case VIDC_1080P_ERROR_DESCRIPTOR_BUFFER_EMPTY:
vcd_status = VCD_ERR_BITSTREAM_ERR;
DDL_MSG_ERROR("VIDC_BIT_STREAM_ERR");
break;
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_helper.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_helper.c
index d4601f2..1782fd2 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_helper.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_helper.c
@@ -278,7 +278,8 @@
memset(frame[i].vcd_frm.virtual + luma_size,
0x80808080,
frame[i].vcd_frm.alloc_len - luma_size);
- if (frame[i].vcd_frm.ion_flag == CACHED) {
+ if (frame[i].vcd_frm.ion_flag
+ == ION_FLAG_CACHED) {
msm_ion_do_cache_op(
ddl_context->video_ion_client,
frame[i].vcd_frm.buff_ion_handle,
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_interrupt_handler.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_interrupt_handler.c
index bfc27dc..d94bc5b 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_interrupt_handler.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_interrupt_handler.c
@@ -364,7 +364,7 @@
ddl->command_channel);
} else {
u32 seq_hdr_only_frame = false;
- u32 need_reconfig = false;
+ u32 need_reconfig = false, eos_present = 0;
struct vcd_frame_data *input_vcd_frm =
&ddl->input_frame.vcd_frm;
need_reconfig = ddl_check_reconfig(ddl);
@@ -380,15 +380,25 @@
input_vcd_frm->offset +=
seq_hdr_info.dec_frm_size;
input_vcd_frm->data_len = 0;
- input_vcd_frm->flags |=
- VCD_FRAME_FLAG_CODECCONFIG;
- ddl->input_frame.frm_trans_end =
- !need_reconfig;
- ddl_context->ddl_callback(
+ eos_present =
+ input_vcd_frm->flags & VCD_FRAME_FLAG_EOS;
+ if (!eos_present) {
+ input_vcd_frm->flags |=
+ VCD_FRAME_FLAG_CODECCONFIG;
+ ddl->input_frame.frm_trans_end =
+ !need_reconfig;
+ ddl_context->ddl_callback(
VCD_EVT_RESP_INPUT_DONE,
VCD_S_SUCCESS, &ddl->input_frame,
sizeof(struct ddl_frame_data_tag),
(u32 *) ddl, ddl->client_data);
+ } else {
+ input_vcd_frm->flags &=
+ ~(VCD_FRAME_FLAG_CODECCONFIG);
+ seq_hdr_only_frame = false;
+ pr_err("%s() Codec config buffer with eos\n",
+ __func__);
+ }
} else {
if (decoder->codec.codec ==
VCD_CODEC_VC1_RCV) {
@@ -1248,6 +1258,8 @@
output_vcd_frm->flags |=
VCD_FRAME_FLAG_DATACORRUPT;
}
+ if (decoder->codec.codec != VCD_CODEC_H264)
+ output_vcd_frm->flags &= ~VCD_FRAME_FLAG_DATACORRUPT;
output_vcd_frm->ip_frm_tag = dec_disp_info->tag_top;
vidc_sm_get_picture_times(&ddl->shared_mem
[ddl->command_channel],
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
index 596c86f..d6558c3 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
@@ -1047,6 +1047,20 @@
case VCD_REQ_PERF_LEVEL:
vcd_status = VCD_S_SUCCESS;
break;
+ case VCD_I_ENABLE_DELIMITER_FLAG:
+ {
+ struct vcd_property_avc_delimiter_enable *delimiter_enable =
+ (struct vcd_property_avc_delimiter_enable *)
+ property_value;
+ if (sizeof(struct vcd_property_avc_delimiter_enable) ==
+ property_hdr->sz &&
+ encoder->codec.codec == VCD_CODEC_H264) {
+ encoder->avc_delimiter_enable =
+ delimiter_enable->avc_delimiter_enable_flag;
+ vcd_status = VCD_S_SUCCESS;
+ }
+ break;
+ }
default:
DDL_MSG_ERROR("INVALID ID %d\n", (int)property_hdr->prop_id);
vcd_status = VCD_ERR_ILLEGAL_OP;
@@ -1530,6 +1544,15 @@
vcd_status = VCD_S_SUCCESS;
}
break;
+ case VCD_I_ENABLE_DELIMITER_FLAG:
+ if (sizeof(struct vcd_property_avc_delimiter_enable) ==
+ property_hdr->sz) {
+ ((struct vcd_property_avc_delimiter_enable *)
+ property_value)->avc_delimiter_enable_flag =
+ encoder->avc_delimiter_enable;
+ vcd_status = VCD_S_SUCCESS;
+ }
+ break;
default:
vcd_status = VCD_ERR_ILLEGAL_OP;
break;
@@ -1691,6 +1714,7 @@
encoder->slice_delivery_info.enable = 0;
encoder->slice_delivery_info.num_slices = 0;
encoder->slice_delivery_info.num_slices_enc = 0;
+ encoder->avc_delimiter_enable = 0;
}
static void ddl_set_default_enc_profile(struct ddl_encoder_data *encoder)
@@ -1859,6 +1883,7 @@
struct vcd_buffer_requirement *input_buf_req;
struct vcd_buffer_requirement *output_buf_req;
u32 min_dpb, y_cb_cr_size;
+ u32 frame_height_actual = 0;
if (!decoder->codec.codec)
return false;
@@ -1882,6 +1907,7 @@
if ((decoder->buf_format.buffer_format ==
VCD_BUFFER_FORMAT_TILE_4x2) &&
(frame_size->height < MDP_MIN_TILE_HEIGHT)) {
+ frame_height_actual = frame_size->height;
frame_size->height = MDP_MIN_TILE_HEIGHT;
ddl_calculate_stride(frame_size,
!decoder->progressive_only);
@@ -1920,6 +1946,10 @@
input_buf_req->sz = (1024 * 1024 * 2);
input_buf_req->align = DDL_LINEAR_BUFFER_ALIGN_BYTES;
decoder->min_input_buf_req = *input_buf_req;
+ if (frame_height_actual) {
+ frame_size->height = frame_height_actual;
+ ddl_calculate_stride(frame_size, !decoder->progressive_only);
+ }
return true;
}
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.c
index 8099234..40dc2aa 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.c
@@ -83,6 +83,8 @@
#define VIDC_SM_ENC_EXT_CTRL_ADDR 0x0028
#define VIDC_SM_ENC_EXT_CTRL_VBV_BUFFER_SIZE_BMSK 0xffff0000
#define VIDC_SM_ENC_EXT_CTRL_VBV_BUFFER_SIZE_SHFT 16
+#define VIDC_SM_ENC_EXT_CTRL_AU_DELIMITER_EN_BMSK 0x00000800
+#define VIDC_SM_ENC_EXT_CTRL_AU_DELIMITER_EN_SHFT 11
#define VIDC_SM_ENC_EXT_CTRL_H263_CPCFC_ENABLE_BMSK 0x80
#define VIDC_SM_ENC_EXT_CTRL_H263_CPCFC_ENABLE_SHFT 7
#define VIDC_SM_ENC_EXT_CTRL_SPS_PPS_CONTROL_BMSK 0X100
@@ -446,10 +448,10 @@
*shared_mem, u32 hec_enable,
enum VIDC_SM_frame_skip frame_skip_mode,
u32 seq_hdr_in_band, u32 vbv_buffer_size, u32 cpcfc_enable,
- u32 sps_pps_control, u32 closed_gop_enable)
+ u32 sps_pps_control, u32 closed_gop_enable,
+ u32 au_delim_enable)
{
u32 enc_ctrl;
-
enc_ctrl = VIDC_SETFIELD((hec_enable) ? 1 : 0,
VIDC_SM_ENC_EXT_CTRL_HEC_ENABLE_SHFT,
VIDC_SM_ENC_EXT_CTRL_HEC_ENABLE_BMSK) |
@@ -470,7 +472,11 @@
VIDC_SM_ENC_EXT_CTRL_SPS_PPS_CONTROL_BMSK) |
VIDC_SETFIELD(closed_gop_enable,
VIDC_SM_ENC_EXT_CTRL_CLOSED_GOP_ENABLE_SHFT,
- VIDC_SM_ENC_EXT_CTRL_CLOSED_GOP_ENABLE_BMSK);
+ VIDC_SM_ENC_EXT_CTRL_CLOSED_GOP_ENABLE_BMSK) |
+ VIDC_SETFIELD((au_delim_enable) ? 1 : 0,
+ VIDC_SM_ENC_EXT_CTRL_AU_DELIMITER_EN_SHFT,
+ VIDC_SM_ENC_EXT_CTRL_AU_DELIMITER_EN_BMSK);
+
DDL_MEM_WRITE_32(shared_mem, VIDC_SM_ENC_EXT_CTRL_ADDR, enc_ctrl);
}
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.h b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.h
index 9cb1933..c4d577b 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.h
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_shared_mem.h
@@ -106,7 +106,7 @@
struct ddl_buf_addr *shared_mem, u32 hec_enable,
enum VIDC_SM_frame_skip frame_skip_mode, u32 seq_hdr_in_band,
u32 vbv_buffer_size, u32 cpcfc_enable, u32 sps_pps_control,
- u32 closed_gop_enable);
+ u32 closed_gop_enable, u32 au_delim_enable);
void vidc_sm_set_encoder_param_change(struct ddl_buf_addr *shared_mem,
u32 bit_rate_chg, u32 frame_rate_chg, u32 i_period_chg);
void vidc_sm_set_encoder_vop_time(struct ddl_buf_addr *shared_mem,
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_utils.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_utils.c
index 5897a33..31f60e5 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_utils.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_utils.c
@@ -45,7 +45,6 @@
unsigned long iova = 0;
unsigned long buffer_size = 0;
unsigned long *kernel_vaddr = NULL;
- unsigned long ionflag = 0;
unsigned long flags = 0;
int ret = 0;
ion_phys_addr_t phyaddr = 0;
@@ -71,20 +70,15 @@
alloc_size = (alloc_size+4095) & ~4095;
addr->alloc_handle = ion_alloc(
ddl_context->video_ion_client, alloc_size, SZ_4K,
- res_trk_get_mem_type());
+ res_trk_get_mem_type(), 0);
if (IS_ERR_OR_NULL(addr->alloc_handle)) {
DDL_MSG_ERROR("%s() :DDL ION alloc failed\n",
__func__);
goto bail_out;
}
- if (res_trk_check_for_sec_session() ||
- addr->mem_type == DDL_FW_MEM)
- ionflag = UNCACHED;
- else
- ionflag = CACHED;
kernel_vaddr = (unsigned long *) ion_map_kernel(
ddl_context->video_ion_client,
- addr->alloc_handle, ionflag);
+ addr->alloc_handle);
if (IS_ERR_OR_NULL(kernel_vaddr)) {
DDL_MSG_ERROR("%s() :DDL ION map failed\n",
__func__);
@@ -111,7 +105,7 @@
0,
&iova,
&buffer_size,
- UNCACHED, 0);
+ 0, 0);
if (ret || !iova) {
DDL_MSG_ERROR(
"%s():DDL ION ion map iommu failed, ret = %d iova = 0x%lx\n",
diff --git a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_vidc.c b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_vidc.c
index 978d1de..5eed305 100644
--- a/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_vidc.c
+++ b/drivers/video/msm/vidc/1080p/ddl/vcd_ddl_vidc.c
@@ -15,6 +15,7 @@
#include "vcd_ddl_metadata.h"
#include "vcd_ddl_shared_mem.h"
#include "vcd_core.h"
+#include "vcd_res_tracker_api.h"
#if defined(PIX_CACHE_DISABLE)
#define DDL_PIX_CACHE_ENABLE false
@@ -108,7 +109,8 @@
dec_pix_cache = VIDC_1080P_DECODE_PCACHE_DISABLE;
const enum vidc_1080p_encode_p_cache_enable
enc_pix_cache = VIDC_1080P_ENCODE_PCACHE_ENABLE;
- u32 pix_cache_ctrl, ctxt_mem_offset, ctxt_mem_size;
+ u32 pix_cache_ctrl, ctxt_mem_offset, ctxt_mem_size, arg1 = 0;
+ u8 *hw_ctxt = NULL;
if (ddl->decoding) {
ddl_set_core_start_time(__func__, DEC_OP_TIME);
@@ -116,6 +118,8 @@
pix_cache_ctrl = (u32)dec_pix_cache;
ctxt_mem_offset = DDL_ADDR_OFFSET(ddl_context->dram_base_a,
ddl->codec_data.decoder.hw_bufs.context) >> 11;
+ hw_ctxt =
+ ddl->codec_data.decoder.hw_bufs.context.virtual_base_addr;
ctxt_mem_size =
ddl->codec_data.decoder.hw_bufs.context.buffer_size;
} else {
@@ -123,9 +127,15 @@
pix_cache_ctrl = (u32)enc_pix_cache;
ctxt_mem_offset = DDL_ADDR_OFFSET(ddl_context->dram_base_a,
ddl->codec_data.encoder.hw_bufs.context) >> 11;
+ hw_ctxt =
+ ddl->codec_data.encoder.hw_bufs.context.virtual_base_addr;
ctxt_mem_size =
ddl->codec_data.encoder.hw_bufs.context.buffer_size;
}
+ if (!res_trk_check_for_sec_session() && hw_ctxt) {
+ memset(hw_ctxt, 0, ctxt_mem_size);
+ arg1 = 1 << 29;
+ }
switch (*vcd_codec) {
default:
case VCD_CODEC_MPEG4:
@@ -184,8 +194,9 @@
DDL_MSG_LOW("ddl_state_transition: %s ~~> DDL_CLIENT_WAIT_FOR_CHDONE",
ddl_get_state_string(ddl->client_state));
ddl->client_state = DDL_CLIENT_WAIT_FOR_CHDONE;
+ arg1 |= (u32)codec;
vidc_1080p_set_host2risc_cmd(VIDC_1080P_HOST2RISC_CMD_OPEN_CH,
- (u32)codec, pix_cache_ctrl, ctxt_mem_offset,
+ arg1, pix_cache_ctrl, ctxt_mem_offset,
ctxt_mem_size);
}
@@ -585,7 +596,7 @@
[ddl->command_channel], hdr_ext_control,
r_cframe_skip, false, 0,
h263_cpfc_enable, encoder->sps_pps.sps_pps_for_idr_enable_flag,
- encoder->closed_gop);
+ encoder->closed_gop, encoder->avc_delimiter_enable);
vidc_sm_set_encoder_init_rc_value(&ddl->shared_mem
[ddl->command_channel],
encoder->target_bit_rate.target_bitrate);
diff --git a/drivers/video/msm/vidc/1080p/resource_tracker/vcd_res_tracker.c b/drivers/video/msm/vidc/1080p/resource_tracker/vcd_res_tracker.c
index 3ac396c..3670dc81 100644
--- a/drivers/video/msm/vidc/1080p/resource_tracker/vcd_res_tracker.c
+++ b/drivers/video/msm/vidc/1080p/resource_tracker/vcd_res_tracker.c
@@ -27,8 +27,8 @@
#define PIL_FW_SIZE 0x200000
-static unsigned int vidc_clk_table[4] = {
- 48000000, 133330000, 200000000, 228570000,
+static unsigned int vidc_clk_table[5] = {
+ 48000000, 133330000, 200000000, 228570000, 266670000,
};
static unsigned int restrk_mmu_subsystem[] = {
MSM_SUBSYSTEM_VIDEO, MSM_SUBSYSTEM_VIDEO_FWARE};
@@ -69,7 +69,7 @@
if (res_trk_get_enable_ion() && addr->alloc_handle) {
kernel_vaddr = (unsigned long *) ion_map_kernel(
ddl_context->video_ion_client,
- addr->alloc_handle, UNCACHED);
+ addr->alloc_handle);
if (IS_ERR_OR_NULL(kernel_vaddr)) {
DDL_MSG_ERROR("%s():DDL ION client map failed\n",
__func__);
@@ -84,7 +84,7 @@
0,
&iova,
&buffer_size,
- UNCACHED, 0);
+ 0, 0);
if (ret || !iova) {
DDL_MSG_ERROR(
"%s():DDL ION client iommu map failed, ret = %d iova = 0x%lx\n",
@@ -209,7 +209,7 @@
addr->alloc_handle = ion_alloc(
ddl_context->video_ion_client,
alloc_size, SZ_4K,
- res_trk_get_mem_type());
+ res_trk_get_mem_type(), 0);
if (IS_ERR_OR_NULL(addr->alloc_handle)) {
DDL_MSG_ERROR("%s() :DDL ION alloc failed\n",
__func__);
@@ -629,7 +629,7 @@
vidc_freq = vidc_clk_table[2];
*pn_set_perf_lvl = RESTRK_1080P_MAX_PERF_LEVEL;
} else {
- vidc_freq = vidc_clk_table[3];
+ vidc_freq = vidc_clk_table[4];
*pn_set_perf_lvl = RESTRK_1080P_TURBO_PERF_LEVEL;
}
@@ -650,6 +650,10 @@
VCDRES_MSG_MED("%s(): Setting vidc freq to %u\n",
__func__, vidc_freq);
if (!res_trk_sel_clk_rate(vidc_freq)) {
+ if (vidc_freq == vidc_clk_table[4]) {
+ if (res_trk_sel_clk_rate(vidc_clk_table[3]))
+ goto ret;
+ }
VCDRES_MSG_ERROR("%s(): res_trk_sel_clk_rate FAILED\n",
__func__);
*pn_set_perf_lvl = 0;
@@ -657,7 +661,7 @@
}
}
#endif
- VCDRES_MSG_MED("%s() set perl level : %d", __func__, *pn_set_perf_lvl);
+ret: VCDRES_MSG_MED("%s() set perl level : %d", __func__, *pn_set_perf_lvl);
return true;
}
diff --git a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_utils.c b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_utils.c
index 21f01d1..3b40640 100644
--- a/drivers/video/msm/vidc/720p/ddl/vcd_ddl_utils.c
+++ b/drivers/video/msm/vidc/720p/ddl/vcd_ddl_utils.c
@@ -124,7 +124,7 @@
ddl_context->video_ion_client,
alloc_size,
SZ_4K,
- buff_addr->mem_type);
+ buff_addr->mem_type, 0);
if (!buff_addr->alloc_handle) {
ERR("\n%s(): DDL ION alloc failed\n",
__func__);
@@ -142,8 +142,7 @@
buff_addr->physical_base_addr = (u32 *)phyaddr;
kernel_vaddr = (unsigned long *) ion_map_kernel(
ddl_context->video_ion_client,
- buff_addr->alloc_handle,
- UNCACHED);
+ buff_addr->alloc_handle);
if (IS_ERR_OR_NULL(kernel_vaddr)) {
ERR("\n%s(): DDL ION map failed\n", __func__);
goto unmap_ion_buffer;
diff --git a/drivers/video/msm/vidc/common/dec/vdec.c b/drivers/video/msm/vidc/common/dec/vdec.c
index 68bcd5c..59e19b7 100644
--- a/drivers/video/msm/vidc/common/dec/vdec.c
+++ b/drivers/video/msm/vidc/common/dec/vdec.c
@@ -347,7 +347,7 @@
ion_flag = vidc_get_fd_info(client_ctx, BUFFER_TYPE_OUTPUT,
pmem_fd, kernel_vaddr, buffer_index,
&buff_handle);
- if (ion_flag == CACHED && buff_handle) {
+ if (ion_flag == ION_FLAG_CACHED && buff_handle) {
DBG("%s: Cache invalidate: vaddr (%p), "\
"size %u\n", __func__,
(void *)kernel_vaddr,
@@ -908,8 +908,7 @@
}
vcd_h264_mv_buffer->kernel_virtual_addr = (u8 *) ion_map_kernel(
client_ctx->user_ion_client,
- client_ctx->h264_mv_ion_handle,
- ionflag);
+ client_ctx->h264_mv_ion_handle);
if (!vcd_h264_mv_buffer->kernel_virtual_addr) {
ERR("%s(): get_ION_kernel virtual addr failed\n",
__func__);
@@ -935,7 +934,7 @@
VIDEO_DOMAIN, VIDEO_MAIN_POOL,
SZ_4K, 0, (unsigned long *)&iova,
(unsigned long *)&buffer_size,
- UNCACHED, 0);
+ 0, 0);
if (rc || !iova) {
ERR(
"%s():get_ION_kernel physical addr fail, rc = %d iova = 0x%lx\n",
@@ -1298,7 +1297,7 @@
kernel_vaddr,
buffer_index,
&buff_handle);
- if (ion_flag == CACHED && buff_handle) {
+ if (ion_flag == ION_FLAG_CACHED && buff_handle) {
msm_ion_do_cache_op(client_ctx->user_ion_client,
buff_handle,
(unsigned long *)kernel_vaddr,
@@ -1812,7 +1811,7 @@
}
ker_vaddr = (unsigned long) ion_map_kernel(
client_ctx->user_ion_client,
- client_ctx->seq_hdr_ion_handle, ionflag);
+ client_ctx->seq_hdr_ion_handle);
if (!ker_vaddr) {
ERR("%s():get_ION_kernel virtual addr fail\n",
__func__);
diff --git a/drivers/video/msm/vidc/common/enc/venc.c b/drivers/video/msm/vidc/common/enc/venc.c
index 67917b9..c7237e4 100644
--- a/drivers/video/msm/vidc/common/enc/venc.c
+++ b/drivers/video/msm/vidc/common/enc/venc.c
@@ -267,7 +267,7 @@
ion_flag = vidc_get_fd_info(client_ctx, BUFFER_TYPE_OUTPUT,
pmem_fd, kernel_vaddr, buffer_index,
&buff_handle);
- if (ion_flag == CACHED && buff_handle) {
+ if (ion_flag == ION_FLAG_CACHED && buff_handle) {
msm_ion_do_cache_op(client_ctx->user_ion_client,
buff_handle,
(unsigned long *) kernel_vaddr,
diff --git a/drivers/video/msm/vidc/common/enc/venc_internal.c b/drivers/video/msm/vidc/common/enc/venc_internal.c
index 5ee0a3d..8779432 100644
--- a/drivers/video/msm/vidc/common/enc/venc_internal.c
+++ b/drivers/video/msm/vidc/common/enc/venc_internal.c
@@ -1688,7 +1688,7 @@
&buff_handle);
if (vcd_input_buffer.data_len > 0) {
- if (ion_flag == CACHED && buff_handle) {
+ if (ion_flag == ION_FLAG_CACHED && buff_handle) {
msm_ion_do_cache_op(
client_ctx->user_ion_client,
buff_handle,
@@ -1837,8 +1837,7 @@
}
control->kernel_virtual_addr = (u8 *) ion_map_kernel(
client_ctx->user_ion_client,
- client_ctx->recon_buffer_ion_handle[i],
- ionflag);
+ client_ctx->recon_buffer_ion_handle[i]);
if (!control->kernel_virtual_addr) {
ERR("%s(): get_ION_kernel virtual addr fail\n",
__func__);
@@ -1867,7 +1866,7 @@
0,
(unsigned long *)&iova,
(unsigned long *)&buffer_size,
- UNCACHED, 0);
+ 0, 0);
if (rc || !iova) {
ERR(
"%s():ION map iommu addr fail, rc = %d, iova = 0x%lx\n",
diff --git a/drivers/video/msm/vidc/common/init/vidc_init.c b/drivers/video/msm/vidc/common/init/vidc_init.c
index 221c154..65dde68 100644
--- a/drivers/video/msm/vidc/common/init/vidc_init.c
+++ b/drivers/video/msm/vidc/common/init/vidc_init.c
@@ -647,8 +647,7 @@
*kernel_vaddr = (unsigned long)
ion_map_kernel(
client_ctx->user_ion_client,
- buff_ion_handle,
- ionflag);
+ buff_ion_handle);
if (IS_ERR_OR_NULL((void *)*kernel_vaddr)) {
ERR("%s():ION virtual addr fail\n",
__func__);
@@ -678,7 +677,7 @@
length,
(unsigned long *) &iova,
(unsigned long *) &buffer_size,
- UNCACHED,
+ 0,
ION_IOMMU_UNMAP_DELAYED);
if (ret || !iova) {
ERR(
diff --git a/drivers/video/msm/vidc/common/vcd/vcd_sub.c b/drivers/video/msm/vidc/common/vcd/vcd_sub.c
index 71e8df8..6e332ef 100644
--- a/drivers/video/msm/vidc/common/vcd/vcd_sub.c
+++ b/drivers/video/msm/vidc/common/vcd/vcd_sub.c
@@ -92,7 +92,7 @@
} else {
map_buffer->alloc_handle = ion_alloc(
cctxt->vcd_ion_client, sz, SZ_4K,
- memtype);
+ memtype, 0);
if (!map_buffer->alloc_handle) {
pr_err("%s() ION alloc failed", __func__);
goto bailout;
@@ -105,8 +105,7 @@
}
*kernel_vaddr = (u8 *) ion_map_kernel(
cctxt->vcd_ion_client,
- map_buffer->alloc_handle,
- ionflag);
+ map_buffer->alloc_handle);
if (!(*kernel_vaddr)) {
pr_err("%s() ION map failed", __func__);
goto ion_free_bailout;
@@ -120,7 +119,7 @@
0,
(unsigned long *)&iova,
(unsigned long *)&buffer_size,
- UNCACHED, 0);
+ 0, 0);
if (ret || !iova) {
pr_err(
"%s() ION iommu map failed, ret = %d, iova = 0x%lx",
diff --git a/include/linux/Kbuild b/include/linux/Kbuild
index 31a152d..5b07403 100644
--- a/include/linux/Kbuild
+++ b/include/linux/Kbuild
@@ -444,3 +444,4 @@
header-y += idle_stats_device.h
header-y += genlock.h
header-y += msm_audio_amrwb.h
+header-y += coresight-stm.h
diff --git a/include/linux/coresight-stm.h b/include/linux/coresight-stm.h
index 754f2f3..7c7c26e 100644
--- a/include/linux/coresight-stm.h
+++ b/include/linux/coresight-stm.h
@@ -28,6 +28,7 @@
STM_OPTION_GUARANTEED = 0x80,
};
+#ifdef __KERNEL__
#define stm_log_inv(entity_id, proto_id, data, size) \
stm_trace(STM_OPTION_NONE, entity_id, proto_id, data, size)
@@ -56,5 +57,6 @@
return 0;
}
#endif
+#endif /* __KERNEL__ */
#endif
diff --git a/include/linux/diagchar.h b/include/linux/diagchar.h
index 45d51ce..288ed43 100644
--- a/include/linux/diagchar.h
+++ b/include/linux/diagchar.h
@@ -109,7 +109,7 @@
/* This needs to be modified manually now, when we add
a new RANGE of SSIDs to the msg_mask_tbl */
#define MSG_MASK_TBL_CNT 24
-#define EVENT_LAST_ID 0x08AD
+#define EVENT_LAST_ID 0x08C5
#define MSG_SSID_0 0
#define MSG_SSID_0_LAST 93
diff --git a/include/linux/dvb/dmx.h b/include/linux/dvb/dmx.h
index d19dfa5..257e069 100644
--- a/include/linux/dvb/dmx.h
+++ b/include/linux/dvb/dmx.h
@@ -307,6 +307,22 @@
} params;
};
+/* Filter's buffer requirement returned in dmx_caps */
+struct dmx_buffer_requirement {
+ /* Buffer size alignment, 0 means no special requirement */
+ __u32 size_alignment;
+
+ /* Maximum buffer size allowed */
+ __u32 max_size;
+ __u32 flags;
+
+/* Buffer allocated as physically contiguous memory */
+#define DMX_BUFFER_CONTIGEOUS_MEM 0x1
+
+/* If the filter's data is decrypted, the buffer should be secured one */
+#define DMX_BUFFER_SECURED_IF_DECRYPTED 0x2
+};
+
typedef struct dmx_caps {
__u32 caps;
@@ -363,6 +379,23 @@
/* Max bitrate from single memory input. Mbit/sec */
int memory_input_max_bitrate;
+
+ struct dmx_buffer_requirement section;
+
+ /* For PES not sent to decoder */
+ struct dmx_buffer_requirement pes;
+
+ /* Recording buffer for recording of 188 bytes packets */
+ struct dmx_buffer_requirement recording_188_tsp;
+
+ /* Recording buffer for recording of 192 bytes packets */
+ struct dmx_buffer_requirement recording_192_tsp;
+
+ /* DVR input buffer for playback of 188 bytes packets */
+ struct dmx_buffer_requirement playback_188_tsp;
+
+ /* DVR input buffer for playback of 192 bytes packets */
+ struct dmx_buffer_requirement playback_192_tsp;
} dmx_caps_t;
typedef enum {
@@ -410,6 +443,28 @@
__u64 stc; /* output: stc in 'base'*90 kHz units */
};
+enum dmx_buffer_mode {
+ /*
+ * demux buffers are allocated internally
+ * by the demux driver. This is the default mode.
+ * DMX_SET_BUFFER_SIZE can be used to set the size of
+ * this buffer.
+ */
+ DMX_BUFFER_MODE_INTERNAL,
+
+ /*
+ * demux buffers are allocated externally and provided
+ * to demux through DMX_SET_BUFFER.
+ * When this mode is used DMX_SET_BUFFER_SIZE and
+ * mmap are prohibited.
+ */
+ DMX_BUFFER_MODE_EXTERNAL,
+};
+
+struct dmx_buffer {
+ unsigned int size;
+ int handle;
+};
#define DMX_START _IO('o', 41)
#define DMX_STOP _IO('o', 42)
@@ -430,5 +485,7 @@
#define DMX_FEED_DATA _IO('o', 58)
#define DMX_SET_PLAYBACK_MODE _IOW('o', 59, enum dmx_playback_mode_t)
#define DMX_GET_EVENT _IOR('o', 60, struct dmx_filter_event)
+#define DMX_SET_BUFFER_MODE _IOW('o', 61, enum dmx_buffer_mode)
+#define DMX_SET_BUFFER _IOW('o', 62, struct dmx_buffer)
#endif /*_DVBDMX_H_*/
diff --git a/include/linux/epm_adc.h b/include/linux/epm_adc.h
index 076302b..ca1a425 100644
--- a/include/linux/epm_adc.h
+++ b/include/linux/epm_adc.h
@@ -13,6 +13,7 @@
int32_t physical;
};
+#ifdef __KERNEL__
struct epm_psoc_init_resp {
u8 cmd;
u8 version;
@@ -64,12 +65,19 @@
uint32_t channel_mask;
};
+struct result_buffer {
+ uint32_t channel;
+ uint32_t avg_buffer_sample;
+ uint32_t result;
+};
+
struct epm_psoc_get_avg_buffered_switch_data {
- u8 cmd;
- u8 status;
- uint32_t timestamp_start;
- uint32_t channel_mask;
- u8 avg_data[54];
+ u8 cmd;
+ u8 status;
+ uint32_t timestamp_start;
+ uint32_t channel_mask;
+ u8 avg_data[54];
+ struct result_buffer data[54];
};
struct epm_psoc_set_channel_switch {
@@ -84,7 +92,6 @@
uint32_t vadc_voltage;
};
-#ifdef __KERNEL__
struct epm_chan_properties {
uint32_t resistorvalue;
uint32_t gain;
diff --git a/include/linux/i2c/atmel_mxt_ts.h b/include/linux/i2c/atmel_mxt_ts.h
index 5c3c728..348a231 100644
--- a/include/linux/i2c/atmel_mxt_ts.h
+++ b/include/linux/i2c/atmel_mxt_ts.h
@@ -73,6 +73,7 @@
int irq_gpio;
u32 irq_gpio_flags;
int *key_codes;
+ bool need_calibration;
u8(*read_chg) (void);
int (*init_hw) (bool);
diff --git a/include/linux/ion.h b/include/linux/ion.h
index 6ac2835..85e5002 100644
--- a/include/linux/ion.h
+++ b/include/linux/ion.h
@@ -39,8 +39,6 @@
ION_HEAP_TYPE_SYSTEM,
ION_HEAP_TYPE_SYSTEM_CONTIG,
ION_HEAP_TYPE_CARVEOUT,
- ION_HEAP_TYPE_IOMMU,
- ION_HEAP_TYPE_CP,
ION_HEAP_TYPE_CUSTOM, /* must be last so device specific heaps always
are at the end of this enum */
ION_NUM_HEAPS,
@@ -49,86 +47,15 @@
#define ION_HEAP_SYSTEM_MASK (1 << ION_HEAP_TYPE_SYSTEM)
#define ION_HEAP_SYSTEM_CONTIG_MASK (1 << ION_HEAP_TYPE_SYSTEM_CONTIG)
#define ION_HEAP_CARVEOUT_MASK (1 << ION_HEAP_TYPE_CARVEOUT)
-#define ION_HEAP_CP_MASK (1 << ION_HEAP_TYPE_CP)
-
/**
- * These are the only ids that should be used for Ion heap ids.
- * The ids listed are the order in which allocation will be attempted
- * if specified. Don't swap the order of heap ids unless you know what
- * you are doing!
- * Id's are spaced by purpose to allow new Id's to be inserted in-between (for
- * possible fallbacks)
+ * heap flags - the lower 16 bits are used by core ion, the upper 16
+ * bits are reserved for use by the heaps themselves.
*/
-
-enum ion_heap_ids {
- INVALID_HEAP_ID = -1,
- ION_CP_MM_HEAP_ID = 8,
- ION_CP_MFC_HEAP_ID = 12,
- ION_CP_WB_HEAP_ID = 16, /* 8660 only */
- ION_CAMERA_HEAP_ID = 20, /* 8660 only */
- ION_SF_HEAP_ID = 24,
- ION_IOMMU_HEAP_ID = 25,
- ION_QSECOM_HEAP_ID = 27,
- ION_AUDIO_HEAP_ID = 28,
-
- ION_MM_FIRMWARE_HEAP_ID = 29,
- ION_SYSTEM_HEAP_ID = 30,
-
- ION_HEAP_ID_RESERVED = 31 /** Bit reserved for ION_SECURE flag */
-};
-
-enum ion_fixed_position {
- NOT_FIXED,
- FIXED_LOW,
- FIXED_MIDDLE,
- FIXED_HIGH,
-};
-
-enum cp_mem_usage {
- VIDEO_BITSTREAM = 0x1,
- VIDEO_PIXEL = 0x2,
- VIDEO_NONPIXEL = 0x3,
- MAX_USAGE = 0x4,
- UNKNOWN = 0x7FFFFFFF,
-};
-
-/**
- * Flag to use when allocating to indicate that a heap is secure.
- */
-#define ION_SECURE (1 << ION_HEAP_ID_RESERVED)
-
-/**
- * Macro should be used with ion_heap_ids defined above.
- */
-#define ION_HEAP(bit) (1 << (bit))
-
-#define ION_VMALLOC_HEAP_NAME "vmalloc"
-#define ION_AUDIO_HEAP_NAME "audio"
-#define ION_SF_HEAP_NAME "sf"
-#define ION_MM_HEAP_NAME "mm"
-#define ION_CAMERA_HEAP_NAME "camera_preview"
-#define ION_IOMMU_HEAP_NAME "iommu"
-#define ION_MFC_HEAP_NAME "mfc"
-#define ION_WB_HEAP_NAME "wb"
-#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw"
-#define ION_QSECOM_HEAP_NAME "qsecom"
-#define ION_FMEM_HEAP_NAME "fmem"
-
-#define CACHED 1
-#define UNCACHED 0
-
-#define ION_CACHE_SHIFT 0
-
-#define ION_SET_CACHE(__cache) ((__cache) << ION_CACHE_SHIFT)
-
-#define ION_IS_CACHED(__flags) ((__flags) & (1 << ION_CACHE_SHIFT))
-
-/*
- * This flag allows clients when mapping into the IOMMU to specify to
- * defer un-mapping from the IOMMU until the buffer memory is freed.
- */
-#define ION_IOMMU_UNMAP_DELAYED 1
+#define ION_FLAG_CACHED 1 /* mappings of this buffer should be
+ cached, ion will do cache
+ maintenance when the buffer is
+ mapped for dma */
#ifdef __KERNEL__
#include <linux/err.h>
@@ -170,72 +97,6 @@
};
/**
- * struct ion_cp_heap_pdata - defines a content protection heap in the given
- * platform
- * @permission_type: Memory ID used to identify the memory to TZ
- * @align: Alignment requirement for the memory
- * @secure_base: Base address for securing the heap.
- * Note: This might be different from actual base address
- * of this heap in the case of a shared heap.
- * @secure_size: Memory size for securing the heap.
- * Note: This might be different from actual size
- * of this heap in the case of a shared heap.
- * @reusable Flag indicating whether this heap is reusable of not.
- * (see FMEM)
- * @mem_is_fmem Flag indicating whether this memory is coming from fmem
- * or not.
- * @fixed_position If nonzero, position in the fixed area.
- * @virt_addr: Virtual address used when using fmem.
- * @iommu_map_all: Indicates whether we should map whole heap into IOMMU.
- * @iommu_2x_map_domain: Indicates the domain to use for overmapping.
- * @request_region: function to be called when the number of allocations
- * goes from 0 -> 1
- * @release_region: function to be called when the number of allocations
- * goes from 1 -> 0
- * @setup_region: function to be called upon ion registration
- *
- */
-struct ion_cp_heap_pdata {
- enum ion_permission_type permission_type;
- unsigned int align;
- ion_phys_addr_t secure_base; /* Base addr used when heap is shared */
- size_t secure_size; /* Size used for securing heap when heap is shared*/
- int reusable;
- int mem_is_fmem;
- enum ion_fixed_position fixed_position;
- int iommu_map_all;
- int iommu_2x_map_domain;
- ion_virt_addr_t *virt_addr;
- int (*request_region)(void *);
- int (*release_region)(void *);
- void *(*setup_region)(void);
-};
-
-/**
- * struct ion_co_heap_pdata - defines a carveout heap in the given platform
- * @adjacent_mem_id: Id of heap that this heap must be adjacent to.
- * @align: Alignment requirement for the memory
- * @mem_is_fmem Flag indicating whether this memory is coming from fmem
- * or not.
- * @fixed_position If nonzero, position in the fixed area.
- * @request_region: function to be called when the number of allocations
- * goes from 0 -> 1
- * @release_region: function to be called when the number of allocations
- * goes from 1 -> 0
- * @setup_region: function to be called upon ion registration
- *
- */
-struct ion_co_heap_pdata {
- int adjacent_mem_id;
- unsigned int align;
- int mem_is_fmem;
- enum ion_fixed_position fixed_position;
- int (*request_region)(void *);
- int (*release_region)(void *);
- void *(*setup_region)(void);
-};
-
-/**
* struct ion_platform_data - array of platform heaps passed from board file
* @has_outer_cache: set to 1 if outer cache is used, 0 otherwise.
* @nr: number of structures in the array
@@ -305,14 +166,18 @@
* @len: size of the allocation
* @align: requested allocation alignment, lots of hardware blocks have
* alignment requirements of some kind
- * @flags: mask of heaps to allocate from, if multiple bits are set
+ * @heap_mask: mask of heaps to allocate from, if multiple bits are set
* heaps will be tried in order from lowest to highest order bit
+ * @flags: heap flags, the low 16 bits are consumed by ion, the high 16
+ * bits are passed on to the respective heap and can be heap
+ * custom
*
* Allocate memory in one of the heaps provided in heap mask and return
* an opaque handle to it.
*/
struct ion_handle *ion_alloc(struct ion_client *client, size_t len,
- size_t align, unsigned int flags);
+ size_t align, unsigned int heap_mask,
+ unsigned int flags);
/**
* ion_free - free a handle
@@ -363,8 +228,7 @@
* can be used to access this address. If no flags are specified, this
* will return a non-secure uncached mapping.
*/
-void *ion_map_kernel(struct ion_client *client, struct ion_handle *handle,
- unsigned long flags);
+void *ion_map_kernel(struct ion_client *client, struct ion_handle *handle);
/**
* ion_unmap_kernel() - destroy a kernel mapping for a handle
@@ -493,50 +357,6 @@
void *data);
/**
- * msm_ion_secure_heap - secure a heap. Wrapper around ion_secure_heap.
- *
- * @heap_id - heap id to secure.
- *
- * Secure a heap
- * Returns 0 on success
- */
-int msm_ion_secure_heap(int heap_id);
-
-/**
- * msm_ion_unsecure_heap - unsecure a heap. Wrapper around ion_unsecure_heap.
- *
- * @heap_id - heap id to secure.
- *
- * Un-secure a heap
- * Returns 0 on success
- */
-int msm_ion_unsecure_heap(int heap_id);
-
-/**
- * msm_ion_secure_heap_2_0 - secure a heap using 2.0 APIs
- * Wrapper around ion_secure_heap.
- *
- * @heap_id - heap id to secure.
- * @usage - usage hint to TZ
- *
- * Secure a heap
- * Returns 0 on success
- */
-int msm_ion_secure_heap_2_0(int heap_id, enum cp_mem_usage usage);
-
-/**
- * msm_ion_unsecure_heap - unsecure a heap secured with 3.0 APIs.
- * Wrapper around ion_unsecure_heap.
- *
- * @heap_id - heap id to secure.
- * @usage - usage hint to TZ
- *
- * Un-secure a heap
- * Returns 0 on success
- */
-int msm_ion_unsecure_heap_2_0(int heap_id, enum cp_mem_usage usage);
-
-/**
* msm_ion_do_cache_op - do cache operations.
*
* @client - pointer to ION client.
@@ -574,7 +394,9 @@
static inline void ion_client_destroy(struct ion_client *client) { }
static inline struct ion_handle *ion_alloc(struct ion_client *client,
- size_t len, size_t align, unsigned int flags)
+ size_t len, size_t align,
+ unsigned int heap_mask,
+ unsigned int flags)
{
return ERR_PTR(-ENODEV);
}
@@ -651,28 +473,6 @@
return -ENODEV;
}
-static inline int msm_ion_secure_heap(int heap_id)
-{
- return -ENODEV;
-
-}
-
-static inline int msm_ion_unsecure_heap(int heap_id)
-{
- return -ENODEV;
-}
-
-static inline int msm_ion_secure_heap_2_0(int heap_id, enum cp_mem_usage usage)
-{
- return -ENODEV;
-}
-
-static inline int msm_ion_unsecure_heap_2_0(int heap_id,
- enum cp_mem_usage usage)
-{
- return -ENODEV;
-}
-
static inline int msm_ion_do_cache_op(struct ion_client *client,
struct ion_handle *handle, void *vaddr,
unsigned long len, unsigned int cmd)
@@ -695,6 +495,7 @@
* struct ion_allocation_data - metadata passed from userspace for allocations
* @len: size of the allocation
* @align: required alignment of the allocation
+ * @heap_mask: mask of heaps to allocate from
* @flags: flags passed to heap
* @handle: pointer that will be populated with a cookie to use to refer
* to this allocation
@@ -744,41 +545,6 @@
unsigned int cmd;
unsigned long arg;
};
-
-
-/* struct ion_flush_data - data passed to ion for flushing caches
- *
- * @handle: handle with data to flush
- * @fd: fd to flush
- * @vaddr: userspace virtual address mapped with mmap
- * @offset: offset into the handle to flush
- * @length: length of handle to flush
- *
- * Performs cache operations on the handle. If p is the start address
- * of the handle, p + offset through p + offset + length will have
- * the cache operations performed
- */
-struct ion_flush_data {
- struct ion_handle *handle;
- int fd;
- void *vaddr;
- unsigned int offset;
- unsigned int length;
-};
-
-/* struct ion_flag_data - information about flags for this buffer
- *
- * @handle: handle to get flags from
- * @flags: flags of this handle
- *
- * Takes handle as an input and outputs the flags from the handle
- * in the flag field.
- */
-struct ion_flag_data {
- struct ion_handle *handle;
- unsigned long flags;
-};
-
#define ION_IOC_MAGIC 'I'
/**
@@ -836,34 +602,4 @@
#define ION_IOC_CUSTOM _IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data)
-/**
- * DOC: ION_IOC_CLEAN_CACHES - clean the caches
- *
- * Clean the caches of the handle specified.
- */
-#define ION_IOC_CLEAN_CACHES _IOWR(ION_IOC_MAGIC, 20, \
- struct ion_flush_data)
-/**
- * DOC: ION_MSM_IOC_INV_CACHES - invalidate the caches
- *
- * Invalidate the caches of the handle specified.
- */
-#define ION_IOC_INV_CACHES _IOWR(ION_IOC_MAGIC, 21, \
- struct ion_flush_data)
-/**
- * DOC: ION_MSM_IOC_CLEAN_CACHES - clean and invalidate the caches
- *
- * Clean and invalidate the caches of the handle specified.
- */
-#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MAGIC, 22, \
- struct ion_flush_data)
-
-/**
- * DOC: ION_IOC_GET_FLAGS - get the flags of the handle
- *
- * Gets the flags of the current handle which indicate cachability,
- * secure state etc.
- */
-#define ION_IOC_GET_FLAGS _IOWR(ION_IOC_MAGIC, 23, \
- struct ion_flag_data)
#endif /* _LINUX_ION_H */
diff --git a/include/linux/mfd/pm8xxx/batterydata-lib.h b/include/linux/mfd/pm8xxx/batterydata-lib.h
new file mode 100644
index 0000000..c55e47e
--- /dev/null
+++ b/include/linux/mfd/pm8xxx/batterydata-lib.h
@@ -0,0 +1,155 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __PM8XXX_BMS_BATTERYDATA_H
+#define __PM8XXX_BMS_BATTERYDATA_H
+
+#include <linux/errno.h>
+
+#define FCC_CC_COLS 5
+#define FCC_TEMP_COLS 8
+
+#define PC_CC_ROWS 29
+#define PC_CC_COLS 13
+
+#define PC_TEMP_ROWS 29
+#define PC_TEMP_COLS 8
+
+#define MAX_SINGLE_LUT_COLS 20
+
+struct single_row_lut {
+ int x[MAX_SINGLE_LUT_COLS];
+ int y[MAX_SINGLE_LUT_COLS];
+ int cols;
+};
+
+/**
+ * struct sf_lut -
+ * @rows: number of percent charge entries should be <= PC_CC_ROWS
+ * @cols: number of charge cycle entries should be <= PC_CC_COLS
+ * @row_entries: the charge cycles/temperature at which sf data
+ * is available in the table.
+ * The charge cycles must be in increasing order from 0 to rows.
+ * @percent: the percent charge at which sf data is available in the table
+ * The percentcharge must be in decreasing order from 0 to cols.
+ * @sf: the scaling factor data
+ */
+struct sf_lut {
+ int rows;
+ int cols;
+ int row_entries[PC_CC_COLS];
+ int percent[PC_CC_ROWS];
+ int sf[PC_CC_ROWS][PC_CC_COLS];
+};
+
+/**
+ * struct pc_temp_ocv_lut -
+ * @rows: number of percent charge entries should be <= PC_TEMP_ROWS
+ * @cols: number of temperature entries should be <= PC_TEMP_COLS
+ * @temp: the temperatures at which ocv data is available in the table
+ * The temperatures must be in increasing order from 0 to rows.
+ * @percent: the percent charge at which ocv data is available in the table
+ * The percentcharge must be in decreasing order from 0 to cols.
+ * @ocv: the open circuit voltage
+ */
+struct pc_temp_ocv_lut {
+ int rows;
+ int cols;
+ int temp[PC_TEMP_COLS];
+ int percent[PC_TEMP_ROWS];
+ int ocv[PC_TEMP_ROWS][PC_TEMP_COLS];
+};
+
+enum battery_type {
+ BATT_UNKNOWN = 0,
+ BATT_PALLADIUM,
+ BATT_DESAY,
+};
+
+/**
+ * struct bms_battery_data -
+ * @fcc: full charge capacity (mAmpHour)
+ * @fcc_temp_lut: table to get fcc at a given temp
+ * @pc_temp_ocv_lut: table to get percent charge given batt temp and cycles
+ * @pc_sf_lut: table to get percent charge scaling factor given cycles
+ * and percent charge
+ * @rbatt_sf_lut: table to get battery resistance scaling factor given
+ * temperature and percent charge
+ * @default_rbatt_mohm: the default value of battery resistance to use when
+ * readings from bms are not available.
+ * @delta_rbatt_mohm: the resistance to be added towards lower soc to
+ * compensate for battery capacitance.
+ */
+
+struct bms_battery_data {
+ unsigned int fcc;
+ struct single_row_lut *fcc_temp_lut;
+ struct single_row_lut *fcc_sf_lut;
+ struct pc_temp_ocv_lut *pc_temp_ocv_lut;
+ struct sf_lut *pc_sf_lut;
+ struct sf_lut *rbatt_sf_lut;
+ int default_rbatt_mohm;
+ int delta_rbatt_mohm;
+};
+
+#if defined(CONFIG_PM8921_BMS) || \
+ defined(CONFIG_PM8921_BMS_MODULE)
+extern struct bms_battery_data palladium_1500_data;
+extern struct bms_battery_data desay_5200_data;
+
+int interpolate_fcc(struct single_row_lut *fcc_temp_lut, int batt_temp);
+int interpolate_scalingfactor(struct sf_lut *sf_lut, int row_entry, int pc);
+int interpolate_scalingfactor_fcc(struct single_row_lut *fcc_sf_lut,
+ int cycles);
+int interpolate_pc(struct pc_temp_ocv_lut *pc_temp_ocv,
+ int batt_temp_degc, int ocv);
+int interpolate_ocv(struct pc_temp_ocv_lut *pc_temp_ocv,
+ int batt_temp_degc, int pc);
+int linear_interpolate(int y0, int x0, int y1, int x1, int x);
+int is_between(int left, int right, int value);
+#else
+static inline int interpolate_fcc(struct single_row_lut *fcc_temp_lut,
+ int batt_temp)
+{
+ return -EINVAL;
+}
+static inline int interpolate_scalingfactor(struct sf_lut *sf_lut,
+ int row_entry, int pc)
+{
+ return -EINVAL;
+}
+static inline int interpolate_scalingfactor_fcc(
+ struct single_row_lut *fcc_sf_lut, int cycles)
+{
+ return -EINVAL;
+}
+static inline int interpolate_pc(struct pc_temp_ocv_lut *pc_temp_ocv,
+ int batt_temp_degc, int ocv)
+{
+ return -EINVAL;
+}
+static inline int interpolate_ocv(struct pc_temp_ocv_lut *pc_temp_ocv,
+ int batt_temp_degc, int pc)
+{
+ return -EINVAL;
+}
+static inline int linear_interpolate(int y0, int x0, int y1, int x1, int x)
+{
+ return -EINVAL;
+}
+static inline int is_between(int left, int right, int value)
+{
+ return -EINVAL;
+}
+#endif
+
+#endif
diff --git a/include/linux/mfd/pm8xxx/pm8921-bms.h b/include/linux/mfd/pm8xxx/pm8921-bms.h
index a73a284..5f2fe9f 100644
--- a/include/linux/mfd/pm8xxx/pm8921-bms.h
+++ b/include/linux/mfd/pm8xxx/pm8921-bms.h
@@ -14,87 +14,10 @@
#define __PM8XXX_BMS_H
#include <linux/errno.h>
+#include <linux/mfd/pm8xxx/batterydata-lib.h>
#define PM8921_BMS_DEV_NAME "pm8921-bms"
-#define FCC_CC_COLS 5
-#define FCC_TEMP_COLS 8
-
-#define PC_CC_ROWS 29
-#define PC_CC_COLS 13
-
-#define PC_TEMP_ROWS 29
-#define PC_TEMP_COLS 8
-
-#define MAX_SINGLE_LUT_COLS 20
-
-struct single_row_lut {
- int x[MAX_SINGLE_LUT_COLS];
- int y[MAX_SINGLE_LUT_COLS];
- int cols;
-};
-
-/**
- * struct sf_lut -
- * @rows: number of percent charge entries should be <= PC_CC_ROWS
- * @cols: number of charge cycle entries should be <= PC_CC_COLS
- * @row_entries: the charge cycles/temperature at which sf data
- * is available in the table.
- * The charge cycles must be in increasing order from 0 to rows.
- * @percent: the percent charge at which sf data is available in the table
- * The percentcharge must be in decreasing order from 0 to cols.
- * @sf: the scaling factor data
- */
-struct sf_lut {
- int rows;
- int cols;
- int row_entries[PC_CC_COLS];
- int percent[PC_CC_ROWS];
- int sf[PC_CC_ROWS][PC_CC_COLS];
-};
-
-/**
- * struct pc_temp_ocv_lut -
- * @rows: number of percent charge entries should be <= PC_TEMP_ROWS
- * @cols: number of temperature entries should be <= PC_TEMP_COLS
- * @temp: the temperatures at which ocv data is available in the table
- * The temperatures must be in increasing order from 0 to rows.
- * @percent: the percent charge at which ocv data is available in the table
- * The percentcharge must be in decreasing order from 0 to cols.
- * @ocv: the open circuit voltage
- */
-struct pc_temp_ocv_lut {
- int rows;
- int cols;
- int temp[PC_TEMP_COLS];
- int percent[PC_TEMP_ROWS];
- int ocv[PC_TEMP_ROWS][PC_TEMP_COLS];
-};
-
-/**
- * struct pm8921_bms_battery_data -
- * @fcc: full charge capacity (mAmpHour)
- * @fcc_temp_lut: table to get fcc at a given temp
- * @pc_temp_ocv_lut: table to get percent charge given batt temp and cycles
- * @pc_sf_lut: table to get percent charge scaling factor given cycles
- * and percent charge
- * @rbatt_sf_lut: table to get battery resistance scaling factor given
- * temperature and percent charge
- * @default_rbatt_mohm: the default value of battery resistance to use when
- * readings from bms are not available.
- * @delta_rbatt_mohm: the resistance to be added towards lower soc to
- * compensate for battery capacitance.
- */
-struct pm8921_bms_battery_data {
- unsigned int fcc;
- struct single_row_lut *fcc_temp_lut;
- struct single_row_lut *fcc_sf_lut;
- struct pc_temp_ocv_lut *pc_temp_ocv_lut;
- struct sf_lut *pc_sf_lut;
- struct sf_lut *rbatt_sf_lut;
- int default_rbatt_mohm;
- int delta_rbatt_mohm;
-};
struct pm8xxx_bms_core_data {
unsigned int batt_temp_channel;
@@ -104,12 +27,6 @@
unsigned int batt_id_channel;
};
-enum battery_type {
- BATT_UNKNOWN = 0,
- BATT_PALLADIUM,
- BATT_DESAY,
-};
-
/**
* struct pm8921_bms_platform_data -
* @batt_type: allows to force chose battery calibration data
@@ -137,8 +54,6 @@
};
#if defined(CONFIG_PM8921_BMS) || defined(CONFIG_PM8921_BMS_MODULE)
-extern struct pm8921_bms_battery_data palladium_1500_data;
-extern struct pm8921_bms_battery_data desay_5200_data;
/**
* pm8921_bms_get_vsense_avg - return the voltage across the sense
* resitor in microvolts
diff --git a/include/linux/mfd/pm8xxx/pm8921-charger.h b/include/linux/mfd/pm8xxx/pm8921-charger.h
index 7b389c5..0e86f2a 100644
--- a/include/linux/mfd/pm8xxx/pm8921-charger.h
+++ b/include/linux/mfd/pm8xxx/pm8921-charger.h
@@ -63,6 +63,8 @@
* @ttrkl_time: max trckl charging time in minutes
* valid range 1 to 64 mins. PON default 15 min
* @update_time: how often the userland be updated of the charging (msec)
+ * @alarm_low_mv: the voltage (mV) when low battery alarm is triggered
+ * @alarm_high_mv: the voltage (mV) when high battery alarm is triggered
* @max_voltage: the max voltage (mV) the battery should be charged up to
* @min_voltage: the voltage (mV) where charging method switches from
* trickle to fast. This is also the minimum voltage the
@@ -128,6 +130,8 @@
unsigned int max_voltage;
unsigned int min_voltage;
unsigned int uvd_thresh_voltage;
+ unsigned int alarm_low_mv;
+ unsigned int alarm_high_mv;
unsigned int resume_voltage_delta;
unsigned int term_current;
int cool_temp;
diff --git a/include/linux/mfd/wcd9xxx/core.h b/include/linux/mfd/wcd9xxx/core.h
index f6d164d..c306c75 100644
--- a/include/linux/mfd/wcd9xxx/core.h
+++ b/include/linux/mfd/wcd9xxx/core.h
@@ -37,6 +37,12 @@
#define SITAR_IS_1P1(ver) \
((ver == SITAR_VERSION_1P1) ? 1 : 0)
+
+#define TAIKO_VERSION_1_0 0
+#define TAIKO_IS_1_0(ver) \
+ ((ver == TAIKO_VERSION_1_0) ? 1 : 0)
+
+
enum {
TABLA_IRQ_SLIMBUS = 0,
TABLA_IRQ_MBHC_REMOVAL,
diff --git a/include/linux/mfd/wcd9xxx/wcd9320_registers.h b/include/linux/mfd/wcd9xxx/wcd9320_registers.h
index 5725e6e..4b8626a 100644
--- a/include/linux/mfd/wcd9xxx/wcd9320_registers.h
+++ b/include/linux/mfd/wcd9xxx/wcd9320_registers.h
@@ -701,45 +701,45 @@
#define TAIKO_A_CDC_TX10_VOL_CTL_CFG (0x26A)
#define TAIKO_A_CDC_TX10_VOL_CTL_CFG__POR (0x00)
#define TAIKO_A_CDC_TX1_MUX_CTL (0x223)
-#define TAIKO_A_CDC_TX1_MUX_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX1_MUX_CTL__POR (0x08)
#define TAIKO_A_CDC_TX2_MUX_CTL (0x22B)
-#define TAIKO_A_CDC_TX2_MUX_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX2_MUX_CTL__POR (0x08)
#define TAIKO_A_CDC_TX3_MUX_CTL (0x233)
-#define TAIKO_A_CDC_TX3_MUX_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX3_MUX_CTL__POR (0x08)
#define TAIKO_A_CDC_TX4_MUX_CTL (0x23B)
-#define TAIKO_A_CDC_TX4_MUX_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX4_MUX_CTL__POR (0x08)
#define TAIKO_A_CDC_TX5_MUX_CTL (0x243)
-#define TAIKO_A_CDC_TX5_MUX_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX5_MUX_CTL__POR (0x08)
#define TAIKO_A_CDC_TX6_MUX_CTL (0x24B)
-#define TAIKO_A_CDC_TX6_MUX_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX6_MUX_CTL__POR (0x08)
#define TAIKO_A_CDC_TX7_MUX_CTL (0x253)
-#define TAIKO_A_CDC_TX7_MUX_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX7_MUX_CTL__POR (0x08)
#define TAIKO_A_CDC_TX8_MUX_CTL (0x25B)
-#define TAIKO_A_CDC_TX8_MUX_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX8_MUX_CTL__POR (0x08)
#define TAIKO_A_CDC_TX9_MUX_CTL (0x263)
-#define TAIKO_A_CDC_TX9_MUX_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX9_MUX_CTL__POR (0x08)
#define TAIKO_A_CDC_TX10_MUX_CTL (0x26B)
-#define TAIKO_A_CDC_TX10_MUX_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX10_MUX_CTL__POR (0x08)
#define TAIKO_A_CDC_TX1_CLK_FS_CTL (0x224)
-#define TAIKO_A_CDC_TX1_CLK_FS_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX1_CLK_FS_CTL__POR (0x03)
#define TAIKO_A_CDC_TX2_CLK_FS_CTL (0x22C)
-#define TAIKO_A_CDC_TX2_CLK_FS_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX2_CLK_FS_CTL__POR (0x03)
#define TAIKO_A_CDC_TX3_CLK_FS_CTL (0x234)
-#define TAIKO_A_CDC_TX3_CLK_FS_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX3_CLK_FS_CTL__POR (0x03)
#define TAIKO_A_CDC_TX4_CLK_FS_CTL (0x23C)
-#define TAIKO_A_CDC_TX4_CLK_FS_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX4_CLK_FS_CTL__POR (0x03)
#define TAIKO_A_CDC_TX5_CLK_FS_CTL (0x244)
-#define TAIKO_A_CDC_TX5_CLK_FS_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX5_CLK_FS_CTL__POR (0x03)
#define TAIKO_A_CDC_TX6_CLK_FS_CTL (0x24C)
-#define TAIKO_A_CDC_TX6_CLK_FS_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX6_CLK_FS_CTL__POR (0x03)
#define TAIKO_A_CDC_TX7_CLK_FS_CTL (0x254)
-#define TAIKO_A_CDC_TX7_CLK_FS_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX7_CLK_FS_CTL__POR (0x03)
#define TAIKO_A_CDC_TX8_CLK_FS_CTL (0x25C)
-#define TAIKO_A_CDC_TX8_CLK_FS_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX8_CLK_FS_CTL__POR (0x03)
#define TAIKO_A_CDC_TX9_CLK_FS_CTL (0x264)
-#define TAIKO_A_CDC_TX9_CLK_FS_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX9_CLK_FS_CTL__POR (0x03)
#define TAIKO_A_CDC_TX10_CLK_FS_CTL (0x26C)
-#define TAIKO_A_CDC_TX10_CLK_FS_CTL__POR (0x00)
+#define TAIKO_A_CDC_TX10_CLK_FS_CTL__POR (0x03)
#define TAIKO_A_CDC_TX1_DMIC_CTL (0x225)
#define TAIKO_A_CDC_TX1_DMIC_CTL__POR (0x00)
#define TAIKO_A_CDC_TX2_DMIC_CTL (0x22D)
@@ -779,9 +779,9 @@
#define TAIKO_A_CDC_SRC2_PDA_CFG (0x2A8)
#define TAIKO_A_CDC_SRC2_PDA_CFG__POR (0x00)
#define TAIKO_A_CDC_SRC1_FS_CTL (0x2A1)
-#define TAIKO_A_CDC_SRC1_FS_CTL__POR (0x00)
+#define TAIKO_A_CDC_SRC1_FS_CTL__POR (0x1B)
#define TAIKO_A_CDC_SRC2_FS_CTL (0x2A9)
-#define TAIKO_A_CDC_SRC2_FS_CTL__POR (0x00)
+#define TAIKO_A_CDC_SRC2_FS_CTL__POR (0x1B)
#define TAIKO_A_CDC_RX1_B1_CTL (0x2B0)
#define TAIKO_A_CDC_RX1_B1_CTL__POR (0x00)
#define TAIKO_A_CDC_RX2_B1_CTL (0x2B8)
@@ -839,33 +839,33 @@
#define TAIKO_A_CDC_RX7_B4_CTL (0x2E3)
#define TAIKO_A_CDC_RX7_B4_CTL__POR (0x00)
#define TAIKO_A_CDC_RX1_B5_CTL (0x2B4)
-#define TAIKO_A_CDC_RX1_B5_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX1_B5_CTL__POR (0x78)
#define TAIKO_A_CDC_RX2_B5_CTL (0x2BC)
-#define TAIKO_A_CDC_RX2_B5_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX2_B5_CTL__POR (0x78)
#define TAIKO_A_CDC_RX3_B5_CTL (0x2C4)
-#define TAIKO_A_CDC_RX3_B5_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX3_B5_CTL__POR (0x78)
#define TAIKO_A_CDC_RX4_B5_CTL (0x2CC)
-#define TAIKO_A_CDC_RX4_B5_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX4_B5_CTL__POR (0x78)
#define TAIKO_A_CDC_RX5_B5_CTL (0x2D4)
-#define TAIKO_A_CDC_RX5_B5_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX5_B5_CTL__POR (0x78)
#define TAIKO_A_CDC_RX6_B5_CTL (0x2DC)
-#define TAIKO_A_CDC_RX6_B5_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX6_B5_CTL__POR (0x78)
#define TAIKO_A_CDC_RX7_B5_CTL (0x2E4)
-#define TAIKO_A_CDC_RX7_B5_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX7_B5_CTL__POR (0x78)
#define TAIKO_A_CDC_RX1_B6_CTL (0x2B5)
-#define TAIKO_A_CDC_RX1_B6_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX1_B6_CTL__POR (0x80)
#define TAIKO_A_CDC_RX2_B6_CTL (0x2BD)
-#define TAIKO_A_CDC_RX2_B6_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX2_B6_CTL__POR (0x80)
#define TAIKO_A_CDC_RX3_B6_CTL (0x2C5)
-#define TAIKO_A_CDC_RX3_B6_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX3_B6_CTL__POR (0x80)
#define TAIKO_A_CDC_RX4_B6_CTL (0x2CD)
-#define TAIKO_A_CDC_RX4_B6_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX4_B6_CTL__POR (0x80)
#define TAIKO_A_CDC_RX5_B6_CTL (0x2D5)
-#define TAIKO_A_CDC_RX5_B6_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX5_B6_CTL__POR (0x80)
#define TAIKO_A_CDC_RX6_B6_CTL (0x2DD)
-#define TAIKO_A_CDC_RX6_B6_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX6_B6_CTL__POR (0x80)
#define TAIKO_A_CDC_RX7_B6_CTL (0x2E5)
-#define TAIKO_A_CDC_RX7_B6_CTL__POR (0x00)
+#define TAIKO_A_CDC_RX7_B6_CTL__POR (0x80)
#define TAIKO_A_CDC_RX1_VOL_CTL_B1_CTL (0x2B6)
#define TAIKO_A_CDC_RX1_VOL_CTL_B1_CTL__POR (0x00)
#define TAIKO_A_CDC_RX2_VOL_CTL_B1_CTL (0x2BE)
@@ -1041,9 +1041,9 @@
#define TAIKO_A_CDC_IIR2_GAIN_B8_CTL (0x357)
#define TAIKO_A_CDC_IIR2_GAIN_B8_CTL__POR (0x00)
#define TAIKO_A_CDC_IIR1_CTL (0x348)
-#define TAIKO_A_CDC_IIR1_CTL__POR (0x00)
+#define TAIKO_A_CDC_IIR1_CTL__POR (0x40)
#define TAIKO_A_CDC_IIR2_CTL (0x358)
-#define TAIKO_A_CDC_IIR2_CTL__POR (0x00)
+#define TAIKO_A_CDC_IIR2_CTL__POR (0x40)
#define TAIKO_A_CDC_IIR1_GAIN_TIMER_CTL (0x349)
#define TAIKO_A_CDC_IIR1_GAIN_TIMER_CTL__POR (0x00)
#define TAIKO_A_CDC_IIR2_GAIN_TIMER_CTL (0x359)
@@ -1059,35 +1059,35 @@
#define TAIKO_A_CDC_TOP_GAIN_UPDATE (0x360)
#define TAIKO_A_CDC_TOP_GAIN_UPDATE__POR (0x00)
#define TAIKO_A_CDC_COMP0_B1_CTL (0x368)
-#define TAIKO_A_CDC_COMP0_B1_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP0_B1_CTL__POR (0x30)
#define TAIKO_A_CDC_COMP1_B1_CTL (0x370)
-#define TAIKO_A_CDC_COMP1_B1_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP1_B1_CTL__POR (0x30)
#define TAIKO_A_CDC_COMP2_B1_CTL (0x378)
-#define TAIKO_A_CDC_COMP2_B1_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP2_B1_CTL__POR (0x30)
#define TAIKO_A_CDC_COMP0_B2_CTL (0x369)
-#define TAIKO_A_CDC_COMP0_B2_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP0_B2_CTL__POR (0xB5)
#define TAIKO_A_CDC_COMP1_B2_CTL (0x371)
-#define TAIKO_A_CDC_COMP1_B2_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP1_B2_CTL__POR (0xB5)
#define TAIKO_A_CDC_COMP2_B2_CTL (0x379)
-#define TAIKO_A_CDC_COMP2_B2_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP2_B2_CTL__POR (0xB5)
#define TAIKO_A_CDC_COMP0_B3_CTL (0x36A)
-#define TAIKO_A_CDC_COMP0_B3_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP0_B3_CTL__POR (0x28)
#define TAIKO_A_CDC_COMP1_B3_CTL (0x372)
-#define TAIKO_A_CDC_COMP1_B3_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP1_B3_CTL__POR (0x28)
#define TAIKO_A_CDC_COMP2_B3_CTL (0x37A)
-#define TAIKO_A_CDC_COMP2_B3_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP2_B3_CTL__POR (0x28)
#define TAIKO_A_CDC_COMP0_B4_CTL (0x36B)
-#define TAIKO_A_CDC_COMP0_B4_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP0_B4_CTL__POR (0x3C)
#define TAIKO_A_CDC_COMP1_B4_CTL (0x373)
-#define TAIKO_A_CDC_COMP1_B4_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP1_B4_CTL__POR (0x3C)
#define TAIKO_A_CDC_COMP2_B4_CTL (0x37B)
-#define TAIKO_A_CDC_COMP2_B4_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP2_B4_CTL__POR (0x3C)
#define TAIKO_A_CDC_COMP0_B5_CTL (0x36C)
-#define TAIKO_A_CDC_COMP0_B5_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP0_B5_CTL__POR (0x1F)
#define TAIKO_A_CDC_COMP1_B5_CTL (0x374)
-#define TAIKO_A_CDC_COMP1_B5_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP1_B5_CTL__POR (0x1F)
#define TAIKO_A_CDC_COMP2_B5_CTL (0x37C)
-#define TAIKO_A_CDC_COMP2_B5_CTL__POR (0x00)
+#define TAIKO_A_CDC_COMP2_B5_CTL__POR (0x1F)
#define TAIKO_A_CDC_COMP0_B6_CTL (0x36D)
#define TAIKO_A_CDC_COMP0_B6_CTL__POR (0x00)
#define TAIKO_A_CDC_COMP1_B6_CTL (0x375)
@@ -1095,17 +1095,17 @@
#define TAIKO_A_CDC_COMP2_B6_CTL (0x37D)
#define TAIKO_A_CDC_COMP2_B6_CTL__POR (0x00)
#define TAIKO_A_CDC_COMP0_SHUT_DOWN_STATUS (0x36E)
-#define TAIKO_A_CDC_COMP0_SHUT_DOWN_STATUS__POR (0x00)
+#define TAIKO_A_CDC_COMP0_SHUT_DOWN_STATUS__POR (0x03)
#define TAIKO_A_CDC_COMP1_SHUT_DOWN_STATUS (0x376)
-#define TAIKO_A_CDC_COMP1_SHUT_DOWN_STATUS__POR (0x00)
+#define TAIKO_A_CDC_COMP1_SHUT_DOWN_STATUS__POR (0x03)
#define TAIKO_A_CDC_COMP2_SHUT_DOWN_STATUS (0x37E)
-#define TAIKO_A_CDC_COMP2_SHUT_DOWN_STATUS__POR (0x00)
+#define TAIKO_A_CDC_COMP2_SHUT_DOWN_STATUS__POR (0x03)
#define TAIKO_A_CDC_COMP0_FS_CFG (0x36F)
-#define TAIKO_A_CDC_COMP0_FS_CFG__POR (0x00)
+#define TAIKO_A_CDC_COMP0_FS_CFG__POR (0x03)
#define TAIKO_A_CDC_COMP1_FS_CFG (0x377)
-#define TAIKO_A_CDC_COMP1_FS_CFG__POR (0x00)
+#define TAIKO_A_CDC_COMP1_FS_CFG__POR (0x03)
#define TAIKO_A_CDC_COMP2_FS_CFG (0x37F)
-#define TAIKO_A_CDC_COMP2_FS_CFG__POR (0x00)
+#define TAIKO_A_CDC_COMP2_FS_CFG__POR (0x03)
#define TAIKO_A_CDC_CONN_RX1_B1_CTL (0x380)
#define TAIKO_A_CDC_CONN_RX1_B1_CTL__POR (0x00)
#define TAIKO_A_CDC_CONN_RX1_B2_CTL (0x381)
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index 19ca831..0330dfb 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -79,12 +79,12 @@
bool hpi_en; /* HPI enablebit */
bool hpi; /* HPI support bit */
unsigned int hpi_cmd; /* cmd used as HPI */
+ bool bkops; /* background support bit */
+ bool bkops_en; /* background enable bit */
unsigned int data_sector_size; /* 512 bytes or 4KB */
unsigned int data_tag_unit_size; /* DATA TAG UNIT size */
unsigned int boot_ro_lock; /* ro lock support */
bool boot_ro_lockable;
- bool bkops; /* background support bit */
- bool bkops_en; /* background enable bit */
u8 raw_exception_status; /* 53 */
u8 raw_partition_support; /* 160 */
u8 raw_erased_mem_count; /* 181 */
@@ -209,25 +209,6 @@
#define MMC_BLK_DATA_AREA_GP (1<<2)
};
-enum mmc_packed_stop_reasons {
- EXCEEDS_SEGMENTS = 0,
- EXCEEDS_SECTORS,
- WRONG_DATA_DIR,
- FLUSH_OR_DISCARD,
- EMPTY_QUEUE,
- REL_WRITE,
- THRESHOLD,
- MAX_REASONS,
-};
-
-struct mmc_wr_pack_stats {
- u32 *packing_events;
- u32 pack_stop_reason[MAX_REASONS];
- spinlock_t lock;
- bool enabled;
- bool print_in_read;
-};
-
/*
* MMC device
*/
@@ -251,9 +232,7 @@
#define MMC_CARD_REMOVED (1<<7) /* card has been removed */
#define MMC_STATE_HIGHSPEED_200 (1<<8) /* card is in HS200 mode */
#define MMC_STATE_SLEEP (1<<9) /* card is in sleep state */
-#define MMC_STATE_NEED_BKOPS (1<<10) /* card need to do BKOPS */
-#define MMC_STATE_DOING_BKOPS (1<<11) /* card is doing BKOPS */
-#define MMC_STATE_CHECK_BKOPS (1<<12) /* card need to check BKOPS */
+#define MMC_STATE_DOING_BKOPS (1<<10) /* card is doing BKOPS */
unsigned int quirks; /* card quirks */
#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
@@ -304,7 +283,6 @@
struct mmc_part part[MMC_NUM_PHY_PARTITION]; /* physical partitions */
unsigned int nr_parts;
- struct mmc_wr_pack_stats wr_pack_stats; /* packed commands stats*/
};
/*
@@ -322,6 +300,11 @@
card->nr_parts++;
}
+static inline bool mmc_large_sec(struct mmc_card *card)
+{
+ return card->ext_csd.data_sector_size == 4096;
+}
+
/*
* The world is not perfect and supplies us with broken mmc/sdio devices.
* For at least some of these bugs we need a work-around.
@@ -422,9 +405,7 @@
#define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC)
#define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED))
#define mmc_card_is_sleep(c) ((c)->state & MMC_STATE_SLEEP)
-#define mmc_card_need_bkops(c) ((c)->state & MMC_STATE_NEED_BKOPS)
#define mmc_card_doing_bkops(c) ((c)->state & MMC_STATE_DOING_BKOPS)
-#define mmc_card_check_bkops(c) ((c)->state & MMC_STATE_CHECK_BKOPS)
#define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT)
#define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY)
@@ -437,13 +418,9 @@
#define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC)
#define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED)
#define mmc_card_set_sleep(c) ((c)->state |= MMC_STATE_SLEEP)
-#define mmc_card_set_need_bkops(c) ((c)->state |= MMC_STATE_NEED_BKOPS)
#define mmc_card_set_doing_bkops(c) ((c)->state |= MMC_STATE_DOING_BKOPS)
-#define mmc_card_set_check_bkops(c) ((c)->state |= MMC_STATE_CHECK_BKOPS)
-#define mmc_card_clr_need_bkops(c) ((c)->state &= ~MMC_STATE_NEED_BKOPS)
#define mmc_card_clr_doing_bkops(c) ((c)->state &= ~MMC_STATE_DOING_BKOPS)
-#define mmc_card_clr_check_bkops(c) ((c)->state &= ~MMC_STATE_CHECK_BKOPS)
#define mmc_card_clr_sleep(c) ((c)->state &= ~MMC_STATE_SLEEP)
/*
* Quirk add/remove for MMC products.
@@ -535,8 +512,4 @@
extern void mmc_fixup_device(struct mmc_card *card,
const struct mmc_fixup *table);
-extern struct mmc_wr_pack_stats *mmc_blk_get_packed_statistics(
- struct mmc_card *card);
-extern void mmc_blk_init_packed_statistics(struct mmc_card *card);
-
#endif /* LINUX_MMC_CARD_H */
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 338c891..3f26a80 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -138,9 +138,8 @@
struct mmc_card;
struct mmc_async_req;
-extern int mmc_interrupt_bkops(struct mmc_card *);
+extern int mmc_stop_bkops(struct mmc_card *);
extern int mmc_read_bkops_status(struct mmc_card *);
-extern int mmc_is_exception_event(struct mmc_card *, unsigned int);
extern struct mmc_async_req *mmc_start_req(struct mmc_host *,
struct mmc_async_req *, int *);
extern int mmc_interrupt_hpi(struct mmc_card *);
@@ -149,6 +148,8 @@
extern int mmc_app_cmd(struct mmc_host *, struct mmc_card *);
extern int mmc_wait_for_app_cmd(struct mmc_host *, struct mmc_card *,
struct mmc_command *, int);
+extern void mmc_start_bkops(struct mmc_card *card, bool from_exception);
+extern int __mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int, bool);
extern int mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int);
extern int mmc_send_ext_csd(struct mmc_card *card, u8 *ext_csd);
@@ -172,7 +173,6 @@
extern int mmc_can_poweroff_notify(const struct mmc_card *card);
extern int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from,
unsigned int nr);
-extern void mmc_start_bkops(struct mmc_card *card);
extern unsigned int mmc_calc_max_discard(struct mmc_card *card);
extern int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen);
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 05a6b5b..714cc76 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -245,9 +245,7 @@
#define MMC_CAP2_PACKED_WR (1 << 11) /* Allow packed write */
#define MMC_CAP2_PACKED_CMD (MMC_CAP2_PACKED_RD | \
MMC_CAP2_PACKED_WR) /* Allow packed commands */
-#define MMC_CAP2_PACKED_WR_CONTROL (1 << 12) /* Allow write packing control */
#define MMC_CAP2_SANITIZE (1 << 13) /* Support Sanitize */
-#define MMC_CAP2_BKOPS (1 << 14) /* BKOPS supported */
#define MMC_CAP2_INIT_BKOPS (1 << 15) /* Need to set BKOPS_EN */
#define MMC_CAP2_POWER_OFF_VCCQ_DURING_SUSPEND (1 << 16)
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index b867c62..92888c3 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -141,7 +141,6 @@
#define R1_SWITCH_ERROR (1 << 7) /* sx, c */
#define R1_EXCEPTION_EVENT (1 << 6) /* sx, a */
#define R1_APP_CMD (1 << 5) /* sr, c */
-#define R1_EXP_EVENT (1 << 6) /* sr, a */
#define R1_STATE_IDLE 0
#define R1_STATE_READY 1
@@ -400,6 +399,18 @@
#define EXT_CSD_PWR_CL_8BIT_SHIFT 4
#define EXT_CSD_PWR_CL_4BIT_SHIFT 0
+/*
+ * EXCEPTION_EVENT_STATUS field
+ */
+#define EXT_CSD_URGENT_BKOPS BIT(0)
+#define EXT_CSD_DYNCAP_NEEDED BIT(1)
+#define EXT_CSD_SYSPOOL_EXHAUSTED BIT(2)
+
+/*
+ * BKOPS status level
+ */
+#define EXT_CSD_BKOPS_LEVEL_2 0x2
+
#define EXT_CSD_PACKED_EVENT_EN (1 << 3)
#define EXT_CSD_PACKED_FAILURE (1 << 3)
@@ -423,16 +434,4 @@
#define MMC_PW_OFF_NOTIFY_SHORT 1
#define MMC_PW_OFF_NOTIFY_LONG 2
-/*
- * BKOPS status level
- */
-#define EXT_CSD_BKOPS_LEVEL_2 0x2
-
-/*
- * EXCEPTION_EVENT_STATUS field (eMMC4.5)
- */
-#define EXT_CSD_URGENT_BKOPS BIT(0)
-#define EXT_CSD_DYNCAP_NEEDED BIT(1)
-#define EXT_CSD_SYSPOOL_EXHAUSTED BIT(2)
-
#endif /* LINUX_MMC_MMC_H */
diff --git a/include/linux/msm_charm.h b/include/linux/msm_charm.h
index 44d2553..1d1f3bb 100644
--- a/include/linux/msm_charm.h
+++ b/include/linux/msm_charm.h
@@ -12,6 +12,7 @@
#define WAIT_FOR_RESTART _IOR(CHARM_CODE, 7, int)
#define GET_DLOAD_STATUS _IOR(CHARM_CODE, 8, int)
#define IMAGE_UPGRADE _IOW(CHARM_CODE, 9, int)
+#define SHUTDOWN_CHARM _IOW(CHARM_CODE, 10, int)
enum charm_boot_type {
CHARM_NORMAL_BOOT = 0,
diff --git a/include/linux/msm_ion.h b/include/linux/msm_ion.h
index 0e28e54..21000f9 100644
--- a/include/linux/msm_ion.h
+++ b/include/linux/msm_ion.h
@@ -1,5 +1,4 @@
/*
- * include/linux/ion.h
*
* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
*
@@ -19,4 +18,294 @@
#include <linux/ion.h>
+enum msm_ion_heap_types {
+ ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1,
+ ION_HEAP_TYPE_IOMMU = ION_HEAP_TYPE_MSM_START,
+ ION_HEAP_TYPE_CP,
+};
+
+/**
+ * These are the only ids that should be used for Ion heap ids.
+ * The ids listed are the order in which allocation will be attempted
+ * if specified. Don't swap the order of heap ids unless you know what
+ * you are doing!
+ * Id's are spaced by purpose to allow new Id's to be inserted in-between (for
+ * possible fallbacks)
+ */
+
+enum ion_heap_ids {
+ INVALID_HEAP_ID = -1,
+ ION_CP_MM_HEAP_ID = 8,
+ ION_CP_MFC_HEAP_ID = 12,
+ ION_CP_WB_HEAP_ID = 16, /* 8660 only */
+ ION_CAMERA_HEAP_ID = 20, /* 8660 only */
+ ION_SF_HEAP_ID = 24,
+ ION_IOMMU_HEAP_ID = 25,
+ ION_QSECOM_HEAP_ID = 27,
+ ION_AUDIO_HEAP_ID = 28,
+
+ ION_MM_FIRMWARE_HEAP_ID = 29,
+ ION_SYSTEM_HEAP_ID = 30,
+
+ ION_HEAP_ID_RESERVED = 31 /** Bit reserved for ION_SECURE flag */
+};
+
+enum ion_fixed_position {
+ NOT_FIXED,
+ FIXED_LOW,
+ FIXED_MIDDLE,
+ FIXED_HIGH,
+};
+
+enum cp_mem_usage {
+ VIDEO_BITSTREAM = 0x1,
+ VIDEO_PIXEL = 0x2,
+ VIDEO_NONPIXEL = 0x3,
+ MAX_USAGE = 0x4,
+ UNKNOWN = 0x7FFFFFFF,
+};
+
+#define ION_HEAP_CP_MASK (1 << ION_HEAP_TYPE_CP)
+
+/**
+ * Flag to use when allocating to indicate that a heap is secure.
+ */
+#define ION_SECURE (1 << ION_HEAP_ID_RESERVED)
+
+/**
+ * Macro should be used with ion_heap_ids defined above.
+ */
+#define ION_HEAP(bit) (1 << (bit))
+
+#define ION_VMALLOC_HEAP_NAME "vmalloc"
+#define ION_AUDIO_HEAP_NAME "audio"
+#define ION_SF_HEAP_NAME "sf"
+#define ION_MM_HEAP_NAME "mm"
+#define ION_CAMERA_HEAP_NAME "camera_preview"
+#define ION_IOMMU_HEAP_NAME "iommu"
+#define ION_MFC_HEAP_NAME "mfc"
+#define ION_WB_HEAP_NAME "wb"
+#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw"
+#define ION_QSECOM_HEAP_NAME "qsecom"
+#define ION_FMEM_HEAP_NAME "fmem"
+
+#define ION_SET_CACHED(__cache) (__cache | ION_FLAG_CACHED)
+#define ION_SET_UNCACHED(__cache) (__cache & ~ION_FLAG_CACHED)
+
+#define ION_IS_CACHED(__flags) ((__flags) & ION_FLAG_CACHED)
+
+#ifdef __KERNEL__
+
+/*
+ * This flag allows clients when mapping into the IOMMU to specify to
+ * defer un-mapping from the IOMMU until the buffer memory is freed.
+ */
+#define ION_IOMMU_UNMAP_DELAYED 1
+
+/**
+ * struct ion_cp_heap_pdata - defines a content protection heap in the given
+ * platform
+ * @permission_type: Memory ID used to identify the memory to TZ
+ * @align: Alignment requirement for the memory
+ * @secure_base: Base address for securing the heap.
+ * Note: This might be different from actual base address
+ * of this heap in the case of a shared heap.
+ * @secure_size: Memory size for securing the heap.
+ * Note: This might be different from actual size
+ * of this heap in the case of a shared heap.
+ * @reusable Flag indicating whether this heap is reusable of not.
+ * (see FMEM)
+ * @mem_is_fmem Flag indicating whether this memory is coming from fmem
+ * or not.
+ * @fixed_position If nonzero, position in the fixed area.
+ * @virt_addr: Virtual address used when using fmem.
+ * @iommu_map_all: Indicates whether we should map whole heap into IOMMU.
+ * @iommu_2x_map_domain: Indicates the domain to use for overmapping.
+ * @request_region: function to be called when the number of allocations
+ * goes from 0 -> 1
+ * @release_region: function to be called when the number of allocations
+ * goes from 1 -> 0
+ * @setup_region: function to be called upon ion registration
+ * @memory_type:Memory type used for the heap
+ *
+ */
+struct ion_cp_heap_pdata {
+ enum ion_permission_type permission_type;
+ unsigned int align;
+ ion_phys_addr_t secure_base; /* Base addr used when heap is shared */
+ size_t secure_size; /* Size used for securing heap when heap is shared*/
+ int reusable;
+ int mem_is_fmem;
+ enum ion_fixed_position fixed_position;
+ int iommu_map_all;
+ int iommu_2x_map_domain;
+ ion_virt_addr_t *virt_addr;
+ int (*request_region)(void *);
+ int (*release_region)(void *);
+ void *(*setup_region)(void);
+ enum ion_memory_types memory_type;
+};
+
+/**
+ * struct ion_co_heap_pdata - defines a carveout heap in the given platform
+ * @adjacent_mem_id: Id of heap that this heap must be adjacent to.
+ * @align: Alignment requirement for the memory
+ * @mem_is_fmem Flag indicating whether this memory is coming from fmem
+ * or not.
+ * @fixed_position If nonzero, position in the fixed area.
+ * @request_region: function to be called when the number of allocations
+ * goes from 0 -> 1
+ * @release_region: function to be called when the number of allocations
+ * goes from 1 -> 0
+ * @setup_region: function to be called upon ion registration
+ * @memory_type:Memory type used for the heap
+ *
+ */
+struct ion_co_heap_pdata {
+ int adjacent_mem_id;
+ unsigned int align;
+ int mem_is_fmem;
+ enum ion_fixed_position fixed_position;
+ int (*request_region)(void *);
+ int (*release_region)(void *);
+ void *(*setup_region)(void);
+ enum ion_memory_types memory_type;
+};
+
+#ifdef CONFIG_ION
+/**
+ * msm_ion_secure_heap - secure a heap. Wrapper around ion_secure_heap.
+ *
+ * @heap_id - heap id to secure.
+ *
+ * Secure a heap
+ * Returns 0 on success
+ */
+int msm_ion_secure_heap(int heap_id);
+
+/**
+ * msm_ion_unsecure_heap - unsecure a heap. Wrapper around ion_unsecure_heap.
+ *
+ * @heap_id - heap id to secure.
+ *
+ * Un-secure a heap
+ * Returns 0 on success
+ */
+int msm_ion_unsecure_heap(int heap_id);
+
+/**
+ * msm_ion_secure_heap_2_0 - secure a heap using 2.0 APIs
+ * Wrapper around ion_secure_heap.
+ *
+ * @heap_id - heap id to secure.
+ * @usage - usage hint to TZ
+ *
+ * Secure a heap
+ * Returns 0 on success
+ */
+int msm_ion_secure_heap_2_0(int heap_id, enum cp_mem_usage usage);
+
+/**
+ * msm_ion_unsecure_heap - unsecure a heap secured with 3.0 APIs.
+ * Wrapper around ion_unsecure_heap.
+ *
+ * @heap_id - heap id to secure.
+ * @usage - usage hint to TZ
+ *
+ * Un-secure a heap
+ * Returns 0 on success
+ */
+int msm_ion_unsecure_heap_2_0(int heap_id, enum cp_mem_usage usage);
+#else
+static inline int msm_ion_secure_heap(int heap_id)
+{
+ return -ENODEV;
+
+}
+
+static inline int msm_ion_unsecure_heap(int heap_id)
+{
+ return -ENODEV;
+}
+
+static inline int msm_ion_secure_heap_2_0(int heap_id, enum cp_mem_usage usage)
+{
+ return -ENODEV;
+}
+
+static inline int msm_ion_unsecure_heap_2_0(int heap_id,
+ enum cp_mem_usage usage)
+{
+ return -ENODEV;
+}
+#endif /* CONFIG_ION */
+
+#endif /* __KERNEL */
+
+/* struct ion_flush_data - data passed to ion for flushing caches
+ *
+ * @handle: handle with data to flush
+ * @fd: fd to flush
+ * @vaddr: userspace virtual address mapped with mmap
+ * @offset: offset into the handle to flush
+ * @length: length of handle to flush
+ *
+ * Performs cache operations on the handle. If p is the start address
+ * of the handle, p + offset through p + offset + length will have
+ * the cache operations performed
+ */
+struct ion_flush_data {
+ struct ion_handle *handle;
+ int fd;
+ void *vaddr;
+ unsigned int offset;
+ unsigned int length;
+};
+
+/* struct ion_flag_data - information about flags for this buffer
+ *
+ * @handle: handle to get flags from
+ * @flags: flags of this handle
+ *
+ * Takes handle as an input and outputs the flags from the handle
+ * in the flag field.
+ */
+struct ion_flag_data {
+ struct ion_handle *handle;
+ unsigned long flags;
+};
+
+#define ION_IOC_MSM_MAGIC 'M'
+
+/**
+ * DOC: ION_IOC_CLEAN_CACHES - clean the caches
+ *
+ * Clean the caches of the handle specified.
+ */
+#define ION_IOC_CLEAN_CACHES _IOWR(ION_IOC_MSM_MAGIC, 0, \
+ struct ion_flush_data)
+/**
+ * DOC: ION_IOC_INV_CACHES - invalidate the caches
+ *
+ * Invalidate the caches of the handle specified.
+ */
+#define ION_IOC_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 1, \
+ struct ion_flush_data)
+/**
+ * DOC: ION_IOC_CLEAN_INV_CACHES - clean and invalidate the caches
+ *
+ * Clean and invalidate the caches of the handle specified.
+ */
+#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 2, \
+ struct ion_flush_data)
+
+/**
+ * DOC: ION_IOC_GET_FLAGS - get the flags of the handle
+ *
+ * Gets the flags of the current handle which indicate cachability,
+ * secure state etc.
+ */
+#define ION_IOC_GET_FLAGS _IOWR(ION_IOC_MSM_MAGIC, 3, \
+ struct ion_flag_data)
+
#endif
diff --git a/include/linux/msm_kgsl.h b/include/linux/msm_kgsl.h
index 2253655..5e1395e 100644
--- a/include/linux/msm_kgsl.h
+++ b/include/linux/msm_kgsl.h
@@ -2,7 +2,7 @@
#define _MSM_KGSL_H
#define KGSL_VERSION_MAJOR 3
-#define KGSL_VERSION_MINOR 11
+#define KGSL_VERSION_MINOR 13
/*context flags */
#define KGSL_CONTEXT_SAVE_GMEM 0x00000001
@@ -18,6 +18,33 @@
/* Memory allocayion flags */
#define KGSL_MEMFLAGS_GPUREADONLY 0x01000000
+#define KGSL_MEMTYPE_MASK 0x0000FF00
+#define KGSL_MEMTYPE_SHIFT 8
+
+/* Memory types for which allocations are made */
+#define KGSL_MEMTYPE_OBJECTANY 0
+#define KGSL_MEMTYPE_FRAMEBUFFER 1
+#define KGSL_MEMTYPE_RENDERBUFFER 2
+#define KGSL_MEMTYPE_ARRAYBUFFER 3
+#define KGSL_MEMTYPE_ELEMENTARRAYBUFFER 4
+#define KGSL_MEMTYPE_VERTEXARRAYBUFFER 5
+#define KGSL_MEMTYPE_TEXTURE 6
+#define KGSL_MEMTYPE_SURFACE 7
+#define KGSL_MEMTYPE_EGL_SURFACE 8
+#define KGSL_MEMTYPE_GL 9
+#define KGSL_MEMTYPE_CL 10
+#define KGSL_MEMTYPE_CL_BUFFER_MAP 11
+#define KGSL_MEMTYPE_CL_BUFFER_NOMAP 12
+#define KGSL_MEMTYPE_CL_IMAGE_MAP 13
+#define KGSL_MEMTYPE_CL_IMAGE_NOMAP 14
+#define KGSL_MEMTYPE_CL_KERNEL_STACK 15
+#define KGSL_MEMTYPE_COMMAND 16
+#define KGSL_MEMTYPE_2D 17
+#define KGSL_MEMTYPE_EGL_IMAGE 18
+#define KGSL_MEMTYPE_EGL_SHADOW 19
+#define KGSL_MEMTYPE_MULTISAMPLE 20
+#define KGSL_MEMTYPE_KERNEL 255
+
/* generic flag values */
#define KGSL_FLAGS_NORMALMODE 0x00000000
#define KGSL_FLAGS_SAFEMODE 0x00000001
@@ -278,8 +305,7 @@
unsigned int offset;
unsigned int hostptr; /*input param */
enum kgsl_user_mem_type memtype;
- unsigned int reserved; /* May be required to add
- params for another mem type */
+ unsigned int flags;
};
#define IOCTL_KGSL_MAP_USER_MEM \
@@ -432,7 +458,8 @@
/*
* A timestamp event allows the user space to register an action following an
- * expired timestamp.
+ * expired timestamp. Note IOCTL_KGSL_TIMESTAMP_EVENT has been redefined to
+ * _IOWR to support fences which need to return a fd for the priv parameter.
*/
struct kgsl_timestamp_event {
@@ -443,7 +470,7 @@
size_t len; /* Size of the event specific blob */
};
-#define IOCTL_KGSL_TIMESTAMP_EVENT \
+#define IOCTL_KGSL_TIMESTAMP_EVENT_OLD \
_IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_timestamp_event)
/* A genlock timestamp event releases an existing lock on timestamp expire */
@@ -454,6 +481,14 @@
int handle; /* Handle of the genlock lock to release */
};
+/* A fence timestamp event releases an existing lock on timestamp expire */
+
+#define KGSL_TIMESTAMP_EVENT_FENCE 2
+
+struct kgsl_timestamp_event_fence {
+ int fence_fd; /* Fence to signal */
+};
+
/*
* Set a property within the kernel. Uses the same structure as
* IOCTL_KGSL_GETPROPERTY
@@ -462,6 +497,9 @@
#define IOCTL_KGSL_SETPROPERTY \
_IOW(KGSL_IOC_TYPE, 0x32, struct kgsl_device_getproperty)
+#define IOCTL_KGSL_TIMESTAMP_EVENT \
+ _IOWR(KGSL_IOC_TYPE, 0x33, struct kgsl_timestamp_event)
+
#ifdef __KERNEL__
#ifdef CONFIG_MSM_KGSL_DRM
int kgsl_gem_obj_addr(int drm_fd, int handle, unsigned long *start,
diff --git a/include/linux/msm_mdp.h b/include/linux/msm_mdp.h
index c9f9d74..1cdc434 100644
--- a/include/linux/msm_mdp.h
+++ b/include/linux/msm_mdp.h
@@ -71,6 +71,8 @@
#define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int)
#define MSMFB_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int)
#define MSMFB_METADATA_SET _IOW(MSMFB_IOCTL_MAGIC, 162, struct msmfb_metadata)
+#define MSMFB_OVERLAY_COMMIT _IOW(MSMFB_IOCTL_MAGIC, 163, unsigned int)
+
#define FB_TYPE_3D_PANEL 0x10101010
#define MDP_IMGTYPE2_START 0x10000
#define MSMFB_DRIVER_VERSION 0xF9E8D701
@@ -272,8 +274,12 @@
struct msmfb_img img;
};
+#define MDP_PP_OPS_ENABLE 0x1
#define MDP_PP_OPS_READ 0x2
#define MDP_PP_OPS_WRITE 0x4
+#define MDP_PP_OPS_DISABLE 0x8
+#define MDP_PP_IGC_FLAG_ROM0 0x10
+#define MDP_PP_IGC_FLAG_ROM1 0x20
struct mdp_qseed_cfg {
uint32_t table_num;
@@ -403,7 +409,7 @@
struct mdp_histogram_data {
uint32_t block;
- uint8_t bin_cnt;
+ uint32_t bin_cnt;
uint32_t *c0;
uint32_t *c1;
uint32_t *c2;
@@ -420,6 +426,8 @@
struct mdp_pcc_coeff r, g, b;
};
+#define MDP_GAMUT_TABLE_NUM 8
+
enum {
mdp_lut_igc,
mdp_lut_pgc,
@@ -473,12 +481,42 @@
uint32_t scale;
};
+struct mdp_pa_cfg_data {
+ uint32_t block;
+ uint32_t flags;
+ uint32_t hue_adj;
+ uint32_t sat_adj;
+ uint32_t val_adj;
+ uint32_t cont_adj;
+};
+
+struct mdp_dither_cfg_data {
+ uint32_t block;
+ uint32_t flags;
+ uint32_t g_y_depth;
+ uint32_t r_cr_depth;
+ uint32_t b_cb_depth;
+};
+
+struct mdp_gamut_cfg_data {
+ uint32_t block;
+ uint32_t flags;
+ uint32_t gamut_first;
+ uint32_t tbl_size[MDP_GAMUT_TABLE_NUM];
+ uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM];
+ uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM];
+ uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM];
+};
+
enum {
mdp_op_pcc_cfg,
mdp_op_csc_cfg,
mdp_op_lut_cfg,
mdp_op_qseed_cfg,
mdp_bl_scale_cfg,
+ mdp_op_pa_cfg,
+ mdp_op_dither_cfg,
+ mdp_op_gamut_cfg,
mdp_op_max,
};
@@ -490,6 +528,9 @@
struct mdp_lut_cfg_data lut_cfg_data;
struct mdp_qseed_cfg_data qseed_cfg_data;
struct mdp_bl_scale_data bl_scale_data;
+ struct mdp_pa_cfg_data pa_cfg_data;
+ struct mdp_dither_cfg_data dither_cfg_data;
+ struct mdp_gamut_cfg_data gamut_cfg_data;
} data;
};
diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h
index 647a7ef..03390b1 100644
--- a/include/linux/power_supply.h
+++ b/include/linux/power_supply.h
@@ -223,9 +223,14 @@
extern int power_supply_set_supply_type(struct power_supply *psy,
enum power_supply_type supply_type);
extern int power_supply_is_system_supplied(void);
+extern int power_supply_register(struct device *parent,
+ struct power_supply *psy);
+extern void power_supply_unregister(struct power_supply *psy);
+extern int power_supply_powers(struct power_supply *psy, struct device *dev);
#else
static inline struct power_supply *power_supply_get_by_name(char *name)
- { return -ENOSYS; }
+ { return NULL; }
+static inline void power_supply_changed(struct power_supply *psy) { }
static inline int power_supply_am_i_supplied(struct power_supply *psy)
{ return -ENOSYS; }
static inline int power_supply_set_battery_charged(struct power_supply *psy)
@@ -243,16 +248,18 @@
int type)
{ return -ENOSYS; }
static inline int power_supply_set_supply_type(struct power_supply *psy,
- enum power_supply_type supply_type);
+ enum power_supply_type supply_type)
{ return -ENOSYS; }
static inline int power_supply_is_system_supplied(void) { return -ENOSYS; }
+static inline int power_supply_register(struct device *parent,
+ struct power_supply *psy)
+ { return -ENOSYS; }
+static inline void power_supply_unregister(struct power_supply *psy) { }
+static inline int power_supply_powers(struct power_supply *psy,
+ struct device *dev)
+ { return -ENOSYS; }
#endif
-extern int power_supply_register(struct device *parent,
- struct power_supply *psy);
-extern void power_supply_unregister(struct power_supply *psy);
-extern int power_supply_powers(struct power_supply *psy, struct device *dev);
-
/* For APM emulation, think legacy userspace. */
extern struct class *power_supply_class;
diff --git a/include/linux/qpnp/power-on.h b/include/linux/qpnp/power-on.h
new file mode 100644
index 0000000..85dbce9
--- /dev/null
+++ b/include/linux/qpnp/power-on.h
@@ -0,0 +1,24 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef QPNP_PON_H
+#define QPNP_PON_H
+
+#include <linux/errno.h>
+
+#ifdef CONFIG_QPNP_POWER_ON
+int qpnp_pon_system_pwr_off(bool reset);
+#else
+static int qpnp_pon_system_pwr_off(bool reset) { return -ENODEV; }
+#endif
+
+#endif
diff --git a/include/linux/slimbus/slimbus.h b/include/linux/slimbus/slimbus.h
index d365b15..e333235 100644
--- a/include/linux/slimbus/slimbus.h
+++ b/include/linux/slimbus/slimbus.h
@@ -143,10 +143,15 @@
* struct slim_addrt: slimbus address used internally by the slimbus framework.
* @valid: If the device is still there or if the address can be reused.
* @eaddr: 6-bytes-long elemental address
+ * @laddr: It is possible that controller will set a predefined logical address
+ * rather than the one assigned by framework. (i.e. logical address may
+ * not be same as index into this table). This entry will store the
+ * logical address value for this enumeration address.
*/
struct slim_addrt {
bool valid;
u8 eaddr[6];
+ u8 laddr;
};
/*
@@ -498,6 +503,11 @@
* @set_laddr: Setup logical address at laddr for the slave with elemental
* address e_addr. Drivers implementing controller will be expected to
* send unicast message to this device with its logical address.
+ * @allocbw: Controller can override default reconfiguration and channel
+ * scheduling algorithm.
+ * @get_laddr: It is possible that controller needs to set fixed logical
+ * address table and get_laddr can be used in that case so that controller
+ * can do this assignment.
* @wakeup: This function pointer implements controller-specific procedure
* to wake it up from clock-pause. Framework will call this to bring
* the controller out of clock pause.
@@ -542,6 +552,10 @@
struct slim_msg_txn *txn);
int (*set_laddr)(struct slim_controller *ctrl,
const u8 *ea, u8 elen, u8 laddr);
+ int (*allocbw)(struct slim_device *sb,
+ int *subfrmc, int *clkgear);
+ int (*get_laddr)(struct slim_controller *ctrl,
+ const u8 *ea, u8 elen, u8 *laddr);
int (*wakeup)(struct slim_controller *ctrl);
int (*config_port)(struct slim_controller *ctrl,
u8 port);
@@ -979,14 +993,17 @@
* @ctrl: Controller with which device is enumerated.
* @e_addr: 6-byte elemental address of the device.
* @e_len: buffer length for e_addr
- * @laddr: Return logical address.
+ * @laddr: Return logical address (if valid flag is false)
+ * @valid: true if laddr holds a valid address that controller wants to
+ * set for this enumeration address. Otherwise framework sets index into
+ * address table as logical address.
* Called by controller in response to REPORT_PRESENT. Framework will assign
* a logical address to this enumeration address.
* Function returns -EXFULL to indicate that all logical addresses are already
* taken.
*/
extern int slim_assign_laddr(struct slim_controller *ctrl, const u8 *e_addr,
- u8 e_len, u8 *laddr);
+ u8 e_len, u8 *laddr, bool valid);
/*
* slim_msg_response: Deliver Message response received from a device to the
diff --git a/include/linux/sync.h b/include/linux/sync.h
index 943f414..4c00f04 100644
--- a/include/linux/sync.h
+++ b/include/linux/sync.h
@@ -24,6 +24,7 @@
struct sync_timeline;
struct sync_pt;
struct sync_fence;
+struct seq_file;
/**
* struct sync_timeline_ops - sync object implementation ops
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 68a87bf..44c64e8 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -368,6 +368,15 @@
struct mon_bus *mon_bus; /* non-null when associated */
int monitored; /* non-zero when monitored */
#endif
+ unsigned skip_resume:1; /* All USB devices are brought into full
+ * power state after system resume. It
+ * is desirable for some buses to keep
+ * their devices in suspend state even
+ * after system resume. The devices
+ * are resumed later when a remote
+ * wakeup is detected or an interface
+ * driver starts I/O.
+ */
};
/* ----------------------------------------------------------------------- */
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index adcc450..920cf77 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -294,6 +294,8 @@
* @xo_handle: TCXO buffer handle
* @bus_perf_client: Bus performance client handle to request BUS bandwidth
* @mhl_enabled: MHL driver registration successful and MHL enabled.
+ * @chg_check_timer: The timer used to implement the workaround to detect
+ * very slow plug in of wall charger.
*/
struct msm_otg {
struct usb_phy phy;
@@ -323,6 +325,7 @@
#define A_CONN 15
#define B_BUS_REQ 16
#define MHL 17
+#define B_FALSE_SDP 18
unsigned long inputs;
struct work_struct sm_work;
bool sm_work_pending;
@@ -345,10 +348,11 @@
struct msm_xo_voter *xo_handle;
uint32_t bus_perf_client;
bool mhl_enabled;
+ struct timer_list chg_check_timer;
/*
* Allowing PHY power collpase turns off the HSUSB 3.3v and 1.8v
* analog regulators while going to low power mode.
- * Currently only 8960(28nm PHY) has the support to allowing PHY
+ * Currently only 28nm PHY has the support to allowing PHY
* power collapse since it doesn't have leakage currents while
* turning off the power rails.
*/
@@ -362,12 +366,18 @@
* Allow putting the core in Low Power mode, when
* USB bus is suspended but cable is connected.
*/
-#define ALLOW_LPM_ON_DEV_SUSPEND BIT(2)
+#define ALLOW_LPM_ON_DEV_SUSPEND BIT(2)
+ /*
+ * Allowing PHY regulators LPM puts the HSUSB 3.3v and 1.8v
+ * analog regulators into LPM while going to USB low power mode.
+ */
+#define ALLOW_PHY_REGULATORS_LPM BIT(3)
unsigned long lpm_flags;
#define PHY_PWR_COLLAPSED BIT(0)
#define PHY_RETENTIONED BIT(1)
#define XO_SHUTDOWN BIT(2)
#define CLOCKS_DOWN BIT(3)
+#define PHY_REGULATORS_LPM BIT(4)
int reset_counter;
unsigned long b_last_se0_sess;
unsigned long tmouts;
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index 7b5aa0b..07beb50 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -1618,6 +1618,7 @@
V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_CODING_EFFICIENCY = 4,
};
#define V4L2_CID_MPEG_VIDEO_MPEG4_QPEL (V4L2_CID_MPEG_BASE+407)
+#define V4L2_CID_QCOM_VIDEO_SYNC_FRAME_SEQ_HDR (V4L2_CID_MPEG_BASE+408)
/* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */
#define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000)
@@ -1797,6 +1798,12 @@
V4L2_MPEG_VIDC_VIDEO_H263_LEVEL_7_0 = 7,
};
+#define V4L2_CID_MPEG_VIDC_VIDEO_H264_AU_DELIMITER \
+ (V4L2_CID_MPEG_MSM_VIDC_BASE + 22)
+enum v4l2_mpeg_vidc_video_h264_au_delimiter {
+ V4L2_MPEG_VIDC_VIDEO_H264_AU_DELIMITER_DISABLED = 0,
+ V4L2_MPEG_VIDC_VIDEO_H264_AU_DELIMITER_ENABLED = 1
+};
/* Camera class control IDs */
#define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900)
#define V4L2_CID_CAMERA_CLASS (V4L2_CTRL_CLASS_CAMERA | 1)
diff --git a/include/linux/wcnss_wlan.h b/include/linux/wcnss_wlan.h
index d32bc57..7a194ca 100644
--- a/include/linux/wcnss_wlan.h
+++ b/include/linux/wcnss_wlan.h
@@ -58,6 +58,7 @@
int wcnss_hardware_type(void);
void *wcnss_prealloc_get(unsigned int size);
int wcnss_prealloc_put(void *ptr);
+void wcnss_reset_intr(void);
#define wcnss_wlan_get_drvdata(dev) dev_get_drvdata(dev)
#define wcnss_wlan_set_drvdata(dev, data) dev_set_drvdata((dev), (data))
diff --git a/include/media/msm/vcd_property.h b/include/media/msm/vcd_property.h
index 484d08f..180b38d 100644
--- a/include/media/msm/vcd_property.h
+++ b/include/media/msm/vcd_property.h
@@ -55,6 +55,7 @@
#define VCD_I_SLICE_DELIVERY_MODE (VCD_START_BASE + 0x27)
#define VCD_I_VOP_TIMING_CONSTANT_DELTA (VCD_START_BASE + 0x28)
#define VCD_I_SET_TURBO_CLK (VCD_START_BASE + 0x29)
+#define VCD_I_ENABLE_DELIMITER_FLAG (VCD_START_BASE + 0x2A)
#define VCD_START_REQ (VCD_START_BASE + 0x1000)
#define VCD_I_REQ_IFRAME (VCD_START_REQ + 0x1)
@@ -373,4 +374,8 @@
u32 sps_pps_for_idr_enable_flag;
};
+struct vcd_property_avc_delimiter_enable {
+ u32 avc_delimiter_enable_flag;
+};
+
#endif
diff --git a/include/media/msm_camera.h b/include/media/msm_camera.h
index ed9af2c..6658b8c 100644
--- a/include/media/msm_camera.h
+++ b/include/media/msm_camera.h
@@ -34,6 +34,8 @@
#define MSM_CAM_IOCTL_MAGIC 'm'
+#define MAX_SERVER_PAYLOAD_LENGTH 8192
+
#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
_IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
@@ -862,7 +864,10 @@
(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+16)
#define MSM_V4L2_EXT_CAPTURE_MODE_CSTA \
(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+17)
-#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+18)
+#define MSM_V4L2_EXT_CAPTURE_MODE_V2X_LIVESHOT \
+ (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+18)
+#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+19)
+
#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
diff --git a/include/media/msm_jpeg.h b/include/media/msm_jpeg.h
index 11c3247..56829f1 100644
--- a/include/media/msm_jpeg.h
+++ b/include/media/msm_jpeg.h
@@ -85,6 +85,8 @@
uint32_t num_of_mcu_rows;
uint32_t offset;
+ uint32_t pln2_off;
+ uint32_t pln2_len;
};
#define MSM_JPEG_HW_CMD_TYPE_READ 0
diff --git a/include/media/msm_vidc.h b/include/media/msm_vidc.h
index 2efe31c..34464c6 100644
--- a/include/media/msm_vidc.h
+++ b/include/media/msm_vidc.h
@@ -14,8 +14,8 @@
#ifndef _MSM_VIDC_H_
#define _MSM_VIDC_H_
-#include <linux/videodev2.h>
#include <linux/poll.h>
+#include <linux/videodev2.h>
enum core_id {
MSM_VIDC_CORE_0 = 0,
@@ -28,7 +28,21 @@
MSM_VIDC_MAX_DEVICES,
};
-int msm_vidc_open(void *vidc_inst, int core_id, int session_type);
+struct msm_vidc_iommu_info {
+ u32 addr_range[2];
+ char name[64];
+ char ctx[64];
+ int domain;
+ int partition;
+};
+
+enum msm_vidc_io_maps {
+ CP_MAP,
+ NS_MAP,
+ MAX_MAP
+};
+
+void *msm_vidc_open(int core_id, int session_type);
int msm_vidc_close(void *instance);
int msm_vidc_querycap(void *instance, struct v4l2_capability *cap);
int msm_vidc_enum_fmt(void *instance, struct v4l2_fmtdesc *f);
@@ -47,4 +61,12 @@
int msm_vidc_encoder_cmd(void *instance, struct v4l2_encoder_cmd *enc);
int msm_vidc_poll(void *instance, struct file *filp,
struct poll_table_struct *pt);
+int msm_vidc_get_iommu_maps(void *instance,
+ struct msm_vidc_iommu_info maps[MAX_MAP]);
+int msm_vidc_subscribe_event(void *instance,
+ struct v4l2_event_subscription *sub);
+int msm_vidc_unsubscribe_event(void *instance,
+ struct v4l2_event_subscription *sub);
+int msm_vidc_dqevent(void *instance, struct v4l2_event *event);
+int msm_vidc_wait(void *instance);
#endif
diff --git a/include/media/tavarua.h b/include/media/tavarua.h
index d7b1340..1cccb2b 100644
--- a/include/media/tavarua.h
+++ b/include/media/tavarua.h
@@ -104,6 +104,7 @@
#define MARIMBA_2_1 0x02010204
#define BAHAMA_1_0 0x0302010A
#define BAHAMA_2_0 0x04020205
+#define BAHAMA_2_1 0x04020309
#define WAIT_TIMEOUT 2000
#define RADIO_INIT_TIME 15
#define TAVARUA_DELAY 10
diff --git a/include/media/vcap_fmt.h b/include/media/vcap_fmt.h
index 2641720..3b1bd7c2 100644
--- a/include/media/vcap_fmt.h
+++ b/include/media/vcap_fmt.h
@@ -13,6 +13,7 @@
#ifndef VCAP_FMT_H
#define VCAP_FMT_H
+#include <linux/videodev2.h>
#define V4L2_BUF_TYPE_INTERLACED_IN_DECODER (V4L2_BUF_TYPE_PRIVATE)
diff --git a/include/media/vcap_v4l2.h b/include/media/vcap_v4l2.h
index 1e18c9e..b2a538c 100644
--- a/include/media/vcap_v4l2.h
+++ b/include/media/vcap_v4l2.h
@@ -14,7 +14,6 @@
#ifndef VCAP_V4L2_H
#define VCAP_V4L2_H
-#define TOP_FIELD_FIX
#ifdef __KERNEL__
#include <linux/types.h>
#include <linux/videodev2.h>
@@ -38,6 +37,7 @@
writel_relaxed(val, addr); \
} while (0)
+#define VCAP_USEC (1000000)
#define VCAP_BASE (dev->vcapbase)
#define VCAP_OFFSET(off) (VCAP_BASE + off)
@@ -87,6 +87,11 @@
uint8_t tot_buf;
uint8_t buf_num;
+ bool top_field;
+
+ struct timeval vc_ts;
+ uint32_t last_ts;
+
/* Buffers inside vc */
struct vcap_buffer *buf[6];
};
@@ -103,9 +108,6 @@
/* Buffer index */
enum vp_state vp_state;
-#ifdef TOP_FIELD_FIX
- bool top_field;
-#endif
/* Buffers inside vc */
struct vcap_buffer *bufTm1;
diff --git a/include/media/videobuf2-core.h b/include/media/videobuf2-core.h
index 2918b94..a15d1f1 100644
--- a/include/media/videobuf2-core.h
+++ b/include/media/videobuf2-core.h
@@ -289,7 +289,6 @@
atomic_t queued_count;
struct list_head done_list;
spinlock_t done_lock;
- struct mutex q_lock;
wait_queue_head_t done_wq;
void *alloc_ctx[VIDEO_MAX_PLANES];
diff --git a/include/sound/apr_audio-v2.h b/include/sound/apr_audio-v2.h
index ac4ec09..d902881 100644
--- a/include/sound/apr_audio-v2.h
+++ b/include/sound/apr_audio-v2.h
@@ -242,18 +242,18 @@
*/
struct adm_cmd_set_pp_params_v5 {
struct apr_hdr hdr;
- u32 data_payload_addr_lsw;
+ u32 payload_addr_lsw;
/* LSW of parameter data payload address.*/
- u32 data_payload_addr_msw;
+ u32 payload_addr_msw;
/* MSW of parameter data payload address.*/
- u32 mem_map_handle;
+ u32 mem_map_handle;
/* Memory map handle returned by ADM_CMD_SHARED_MEM_MAP_REGIONS
* command */
/* If mem_map_handle is zero implies the message is in
* the payload */
- u32 data_payload_size;
+ u32 payload_size;
/* Size in bytes of the variable payload accompanying this
* message or
* in shared memory. This is used for parsing the parameter
@@ -1890,6 +1890,7 @@
struct afe_param_id_hdmi_multi_chan_audio_cfg hdmi_multi_ch;
struct afe_param_id_slimbus_cfg slim_sch;
struct afe_param_id_rt_proxy_port_cfg rtproxy;
+ struct afe_param_id_internal_bt_fm_cfg int_bt_fm;
} __packed;
struct afe_audioif_config_command {
diff --git a/include/sound/compress_params.h b/include/sound/compress_params.h
index 31d684b..54af7d6a 100644
--- a/include/sound/compress_params.h
+++ b/include/sound/compress_params.h
@@ -86,6 +86,7 @@
#define SND_AUDIOCODEC_DTS_PASS_THROUGH ((__u32) 0x00000012)
#define SND_AUDIOCODEC_DTS_LBR ((__u32) 0x00000013)
#define SND_AUDIOCODEC_DTS_TRANSCODE_LOOPBACK ((__u32) 0x00000014)
+#define SND_AUDIOCODEC_PASS_THROUGH ((__u32) 0x00000015)
/*
* Profile and modes are listed with bit masks. This allows for a
@@ -331,6 +332,10 @@
__u32 bw; /* encoder bandwidth */
__s32 reserved[15];
};
+struct snd_dec_dts {
+ __u32 modelIdLength;
+ __u8 *modelId;
+};
union snd_codec_options {
struct snd_enc_wma wma;
@@ -338,6 +343,7 @@
struct snd_enc_real real;
struct snd_enc_flac flac;
struct snd_enc_generic generic;
+ struct snd_dec_dts dts;
};
/** struct snd_codec_desc - description of codec capabilities
diff --git a/include/sound/q6afe-v2.h b/include/sound/q6afe-v2.h
index 8ccc9f4..e107130 100644
--- a/include/sound/q6afe-v2.h
+++ b/include/sound/q6afe-v2.h
@@ -13,6 +13,8 @@
#define __Q6AFE_V2_H__
#include <sound/apr_audio-v2.h>
+#define IN 0x000
+#define OUT 0x001
#define MSM_AFE_MONO 0
#define MSM_AFE_MONO_RIGHT 1
#define MSM_AFE_MONO_LEFT 2
@@ -71,6 +73,40 @@
AFE_MAX_PORTS
};
+struct afe_audio_buffer {
+ dma_addr_t phys;
+ void *data;
+ uint32_t used;
+ uint32_t size;/* size of buffer */
+ uint32_t actual_size; /* actual number of bytes read by DSP */
+ struct ion_handle *handle;
+ struct ion_client *client;
+};
+
+struct afe_audio_port_data {
+ struct afe_audio_buffer *buf;
+ uint32_t max_buf_cnt;
+ uint32_t dsp_buf;
+ uint32_t cpu_buf;
+ struct list_head mem_map_handle;
+ uint32_t tmp_hdl;
+ /* read or write locks */
+ struct mutex lock;
+ spinlock_t dsp_lock;
+};
+
+struct afe_audio_client {
+ atomic_t cmd_state;
+ /* Relative or absolute TS */
+ uint32_t time_flag;
+ void *priv;
+ uint64_t time_stamp;
+ struct mutex cmd_lock;
+ /* idx:1 out port, 0: in port*/
+ struct afe_audio_port_data port[2];
+ wait_queue_head_t cmd_wait;
+};
+
int afe_open(u16 port_id, union afe_port_config *afe_config, int rate);
int afe_close(int port_id);
int afe_loopback(u16 enable, u16 rx_port, u16 tx_port);
@@ -80,6 +116,7 @@
int afe_get_port_index(u16 port_id);
int afe_start_pseudo_port(u16 port_id);
int afe_stop_pseudo_port(u16 port_id);
+uint32_t afe_req_mmap_handle(void);
int afe_cmd_memory_map(u32 dma_addr_p, u32 dma_buf_sz);
int afe_cmd_memory_map_nowait(int port_id, u32 dma_addr_p, u32 dma_buf_sz);
int afe_cmd_memory_unmap(u32 dma_addr_p);
@@ -98,6 +135,14 @@
int afe_apply_gain(u16 port_id, u16 gain);
int afe_q6_interface_prepare(void);
int afe_get_port_type(u16 port_id);
+int q6afe_audio_client_buf_alloc_contiguous(unsigned int dir,
+ struct afe_audio_client *ac,
+ unsigned int bufsz,
+ unsigned int bufcnt);
+struct afe_audio_client *q6afe_audio_client_alloc(void *priv);
+int q6afe_audio_client_buf_free_contiguous(unsigned int dir,
+ struct afe_audio_client *ac);
+void q6afe_audio_client_free(struct afe_audio_client *ac);
/* if port_id is virtual, convert to physical..
* if port_id is already physical, return physical
*/
diff --git a/include/sound/q6asm.h b/include/sound/q6asm.h
index 4021d48..32d3aef 100644
--- a/include/sound/q6asm.h
+++ b/include/sound/q6asm.h
@@ -49,6 +49,7 @@
#define FORMAT_MAT 0x0017
#define FORMAT_AAC 0x0018
#define FORMAT_DTS_LBR 0x0019
+#define FORMAT_PASS_THROUGH 0x0020
#define ENCDEC_SBCBITRATE 0x0001
#define ENCDEC_IMMEDIATE_DECODE 0x0002
diff --git a/include/trace/events/exception.h b/include/trace/events/exception.h
new file mode 100644
index 0000000..110e920
--- /dev/null
+++ b/include/trace/events/exception.h
@@ -0,0 +1,68 @@
+/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM exception
+
+#if !defined(_TRACE_EXCEPTION_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_EXCEPTION_H
+
+#include <linux/tracepoint.h>
+
+struct task_struct;
+
+TRACE_EVENT(user_fault,
+
+ TP_PROTO(struct task_struct *tsk, unsigned long addr, unsigned int fsr),
+
+ TP_ARGS(tsk, addr, fsr),
+
+ TP_STRUCT__entry(
+ __string(task_name, tsk->comm)
+ __field(unsigned long, addr)
+ __field(unsigned int, fsr)
+ ),
+
+ TP_fast_assign(
+ __assign_str(task_name, tsk->comm)
+ __entry->addr = addr;
+ __entry->fsr = fsr;
+ ),
+
+ TP_printk("task_name:%s addr:%lu, fsr:%u", __get_str(task_name),\
+ __entry->addr, __entry->fsr)
+);
+
+struct pt_regs;
+
+TRACE_EVENT(undef_instr,
+
+ TP_PROTO(struct pt_regs *regs, void *prog_cnt),
+
+ TP_ARGS(regs, prog_cnt),
+
+ TP_STRUCT__entry(
+ __field(void *, prog_cnt)
+ __field(struct pt_regs *, regs)
+ ),
+
+ TP_fast_assign(
+ __entry->regs = regs;
+ __entry->prog_cnt = prog_cnt;
+ ),
+
+ TP_printk("pc:%p", __entry->prog_cnt)
+);
+
+#endif
+
+#include <trace/define_trace.h>
diff --git a/kernel/trace/Kconfig b/kernel/trace/Kconfig
index a1d2849..5ba1770 100644
--- a/kernel/trace/Kconfig
+++ b/kernel/trace/Kconfig
@@ -418,6 +418,19 @@
If in doubt, say N.
+config CPU_FREQ_SWITCH_PROFILER
+ bool "CPU frequency switch time profiler"
+ select GENERIC_TRACER
+ help
+ This option enables the CPU frequency switch profiler. A file is
+ created in debugfs called "cpu_freq_switch_profile_enabled", which
+ defaults to zero. When a 1 is echoed into this file, profiling begins.
+ When a zero is echoed, profiling stops. A "cpu_freq_switch" file is
+ also created in the trace_stats directory; this file shows the
+ switches that have occurred and duration statistics.
+
+ If in doubt, say N.
+
config FTRACE_MCOUNT_RECORD
def_bool y
depends on DYNAMIC_FTRACE
diff --git a/kernel/trace/Makefile b/kernel/trace/Makefile
index 5f39a07..3c13931 100644
--- a/kernel/trace/Makefile
+++ b/kernel/trace/Makefile
@@ -36,6 +36,7 @@
obj-$(CONFIG_IRQSOFF_TRACER) += trace_irqsoff.o
obj-$(CONFIG_PREEMPT_TRACER) += trace_irqsoff.o
obj-$(CONFIG_SCHED_TRACER) += trace_sched_wakeup.o
+obj-$(CONFIG_CPU_FREQ_SWITCH_PROFILER) += trace_cpu_freq_switch.o
obj-$(CONFIG_NOP_TRACER) += trace_nop.o
obj-$(CONFIG_STACK_TRACER) += trace_stack.o
obj-$(CONFIG_MMIOTRACE) += trace_mmiotrace.o
diff --git a/kernel/trace/trace_cpu_freq_switch.c b/kernel/trace/trace_cpu_freq_switch.c
new file mode 100644
index 0000000..7e7b104
--- /dev/null
+++ b/kernel/trace/trace_cpu_freq_switch.c
@@ -0,0 +1,311 @@
+/*
+ * Copyright (c) 2012, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/percpu.h>
+#include <linux/slab.h>
+#include <linux/rbtree.h>
+#include <linux/hrtimer.h>
+#include <linux/debugfs.h>
+#include <linux/ktime.h>
+#include <trace/events/power.h>
+#include "trace_stat.h"
+#include "trace.h"
+
+struct trans {
+ struct rb_node node;
+ unsigned int cpu;
+ unsigned int start_freq;
+ unsigned int end_freq;
+ unsigned int min_us;
+ unsigned int max_us;
+ ktime_t total_t;
+ unsigned int count;
+};
+static struct rb_root freq_trans_tree = RB_ROOT;
+
+static struct trans *tr_search(struct rb_root *root, unsigned int cpu,
+ unsigned int start_freq, unsigned int end_freq)
+{
+ struct rb_node *node = root->rb_node;
+
+ while (node) {
+ struct trans *tr = container_of(node, struct trans, node);
+
+ if (cpu < tr->cpu)
+ node = node->rb_left;
+ else if (cpu > tr->cpu)
+ node = node->rb_right;
+ else if (start_freq < tr->start_freq)
+ node = node->rb_left;
+ else if (start_freq > tr->start_freq)
+ node = node->rb_right;
+ else if (end_freq < tr->end_freq)
+ node = node->rb_left;
+ else if (end_freq > tr->end_freq)
+ node = node->rb_right;
+ else
+ return tr;
+ }
+ return NULL;
+}
+
+static int tr_insert(struct rb_root *root, struct trans *tr)
+{
+ struct rb_node **new = &(root->rb_node), *parent = NULL;
+
+ while (*new) {
+ struct trans *this = container_of(*new, struct trans, node);
+
+ parent = *new;
+ if (tr->cpu < this->cpu)
+ new = &((*new)->rb_left);
+ else if (tr->cpu > this->cpu)
+ new = &((*new)->rb_right);
+ else if (tr->start_freq < this->start_freq)
+ new = &((*new)->rb_left);
+ else if (tr->start_freq > this->start_freq)
+ new = &((*new)->rb_right);
+ else if (tr->end_freq < this->end_freq)
+ new = &((*new)->rb_left);
+ else if (tr->end_freq > this->end_freq)
+ new = &((*new)->rb_right);
+ else
+ return -EINVAL;
+ }
+
+ rb_link_node(&tr->node, parent, new);
+ rb_insert_color(&tr->node, root);
+
+ return 0;
+}
+
+struct trans_state {
+ spinlock_t lock;
+ unsigned int start_freq;
+ unsigned int end_freq;
+ ktime_t start_t;
+ bool started;
+};
+static DEFINE_PER_CPU(struct trans_state, freq_trans_state);
+
+static DEFINE_SPINLOCK(state_lock);
+
+static void probe_start(void *ignore, unsigned int start_freq,
+ unsigned int end_freq, unsigned int cpu)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&state_lock, flags);
+ per_cpu(freq_trans_state, cpu).start_freq = start_freq;
+ per_cpu(freq_trans_state, cpu).end_freq = end_freq;
+ per_cpu(freq_trans_state, cpu).start_t = ktime_get();
+ per_cpu(freq_trans_state, cpu).started = true;
+ spin_unlock_irqrestore(&state_lock, flags);
+}
+
+static void probe_end(void *ignore, unsigned int cpu)
+{
+ unsigned long flags;
+ struct trans *tr;
+ s64 dur_us;
+ ktime_t dur_t, end_t = ktime_get();
+
+ spin_lock_irqsave(&state_lock, flags);
+
+ if (!per_cpu(freq_trans_state, cpu).started)
+ goto out;
+
+ dur_t = ktime_sub(end_t, per_cpu(freq_trans_state, cpu).start_t);
+ dur_us = ktime_to_us(dur_t);
+
+ tr = tr_search(&freq_trans_tree, cpu,
+ per_cpu(freq_trans_state, cpu).start_freq,
+ per_cpu(freq_trans_state, cpu).end_freq);
+ if (!tr) {
+ tr = kzalloc(sizeof(*tr), GFP_ATOMIC);
+ if (!tr) {
+ WARN_ONCE(1, "CPU frequency trace is now invalid!\n");
+ goto out;
+ }
+
+ tr->start_freq = per_cpu(freq_trans_state, cpu).start_freq;
+ tr->end_freq = per_cpu(freq_trans_state, cpu).end_freq;
+ tr->cpu = cpu;
+ tr->min_us = UINT_MAX;
+ tr_insert(&freq_trans_tree, tr);
+ }
+ tr->total_t = ktime_add(tr->total_t, dur_t);
+ tr->count++;
+
+ if (dur_us > tr->max_us)
+ tr->max_us = dur_us;
+ if (dur_us < tr->min_us)
+ tr->min_us = dur_us;
+
+ per_cpu(freq_trans_state, cpu).started = false;
+out:
+ spin_unlock_irqrestore(&state_lock, flags);
+}
+
+static void *freq_switch_stat_start(struct tracer_stat *trace)
+{
+ struct rb_node *n;
+ unsigned long flags;
+
+ spin_lock_irqsave(&state_lock, flags);
+ n = rb_first(&freq_trans_tree);
+ spin_unlock_irqrestore(&state_lock, flags);
+
+ return n;
+}
+
+static void *freq_switch_stat_next(void *prev, int idx)
+{
+ struct rb_node *n;
+ unsigned long flags;
+
+ spin_lock_irqsave(&state_lock, flags);
+ n = rb_next(prev);
+ spin_unlock_irqrestore(&state_lock, flags);
+
+ return n;
+}
+
+static int freq_switch_stat_show(struct seq_file *s, void *p)
+{
+ unsigned long flags;
+ struct trans *tr = p;
+
+ spin_lock_irqsave(&state_lock, flags);
+ seq_printf(s, "%3d %9d %8d %5d %6lld %6d %6d\n", tr->cpu,
+ tr->start_freq, tr->end_freq, tr->count,
+ div_s64(ktime_to_us(tr->total_t), tr->count),
+ tr->min_us, tr->max_us);
+ spin_unlock_irqrestore(&state_lock, flags);
+
+ return 0;
+}
+
+static void freq_switch_stat_release(void *stat)
+{
+ struct trans *tr = stat;
+ unsigned long flags;
+
+ spin_lock_irqsave(&state_lock, flags);
+ rb_erase(&tr->node, &freq_trans_tree);
+ spin_unlock_irqrestore(&state_lock, flags);
+ kfree(tr);
+}
+
+static int freq_switch_stat_headers(struct seq_file *s)
+{
+ seq_printf(s, "CPU START_KHZ END_KHZ COUNT AVG_US MIN_US MAX_US\n");
+ seq_printf(s, " | | | | | | |\n");
+ return 0;
+}
+
+struct tracer_stat freq_switch_stats __read_mostly = {
+ .name = "cpu_freq_switch",
+ .stat_start = freq_switch_stat_start,
+ .stat_next = freq_switch_stat_next,
+ .stat_show = freq_switch_stat_show,
+ .stat_release = freq_switch_stat_release,
+ .stat_headers = freq_switch_stat_headers
+};
+
+static void trace_freq_switch_disable(void)
+{
+ unregister_stat_tracer(&freq_switch_stats);
+ unregister_trace_cpu_frequency_switch_end(probe_end, NULL);
+ unregister_trace_cpu_frequency_switch_start(probe_start, NULL);
+ pr_info("disabled cpu frequency switch time profiling\n");
+}
+
+static int trace_freq_switch_enable(void)
+{
+ int ret;
+
+ ret = register_trace_cpu_frequency_switch_start(probe_start, NULL);
+ if (ret)
+ goto out;
+
+ ret = register_trace_cpu_frequency_switch_end(probe_end, NULL);
+ if (ret)
+ goto err_register_switch_end;
+
+ ret = register_stat_tracer(&freq_switch_stats);
+ if (ret)
+ goto err_register_stat_tracer;
+
+ pr_info("enabled cpu frequency switch time profiling\n");
+ return 0;
+
+err_register_stat_tracer:
+ unregister_trace_cpu_frequency_switch_end(probe_end, NULL);
+err_register_switch_end:
+ register_trace_cpu_frequency_switch_start(probe_start, NULL);
+out:
+ pr_err("failed to enable cpu frequency switch time profiling\n");
+
+ return ret;
+}
+
+static DEFINE_MUTEX(debugfs_lock);
+static bool trace_freq_switch_enabled;
+
+static int debug_toggle_tracing(void *data, u64 val)
+{
+ int ret = 0;
+
+ mutex_lock(&debugfs_lock);
+
+ if (val == 1 && !trace_freq_switch_enabled)
+ ret = trace_freq_switch_enable();
+ else if (val == 0 && trace_freq_switch_enabled)
+ trace_freq_switch_disable();
+ else if (val > 1)
+ ret = -EINVAL;
+
+ if (!ret)
+ trace_freq_switch_enabled = val;
+
+ mutex_unlock(&debugfs_lock);
+
+ return ret;
+}
+
+static int debug_tracing_state_get(void *data, u64 *val)
+{
+ mutex_lock(&debugfs_lock);
+ *val = trace_freq_switch_enabled;
+ mutex_unlock(&debugfs_lock);
+
+ return 0;
+}
+DEFINE_SIMPLE_ATTRIBUTE(debug_tracing_state_fops, debug_tracing_state_get,
+ debug_toggle_tracing, "%llu\n");
+
+static int __init trace_freq_switch_init(void)
+{
+ struct dentry *d_tracer = tracing_init_dentry();
+ if (!d_tracer)
+ return 0;
+
+ debugfs_create_file("cpu_freq_switch_profile_enabled",
+ S_IRUGO | S_IWUSR, d_tracer, NULL, &debug_tracing_state_fops);
+
+ return 0;
+}
+late_initcall(trace_freq_switch_init);
diff --git a/sound/soc/codecs/wcd9304.c b/sound/soc/codecs/wcd9304.c
index 9432a06..b303878 100644
--- a/sound/soc/codecs/wcd9304.c
+++ b/sound/soc/codecs/wcd9304.c
@@ -4976,6 +4976,7 @@
SITAR_REG_VAL(SITAR_A_CDC_RX1_B6_CTL, 0x80),
SITAR_REG_VAL(SITAR_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
+ SITAR_REG_VAL(SITAR_A_CDC_CLSG_FREQ_THRESH_B4_CTL, 0x5B),
};
diff --git a/sound/soc/codecs/wcd9310.c b/sound/soc/codecs/wcd9310.c
index ac11f1a..deddbe8 100644
--- a/sound/soc/codecs/wcd9310.c
+++ b/sound/soc/codecs/wcd9310.c
@@ -6526,7 +6526,7 @@
s16 mb_v[num_det];
s32 mic_mv[num_det];
bool inval;
- bool highdelta;
+ bool highdelta = false;
bool ahighv = false, highv;
bool gndmicswapped = false;
@@ -6587,26 +6587,29 @@
if (vddioswitch)
__tabla_codec_switch_micbias(tabla->codec, 0,
false, false);
- /* claim UNSUPPORTED plug insertion when
- * good headset is detected but HPHR GND switch makes
- * delta difference */
- if (i == (num_det - 2) && highdelta && !ahighv)
- gndmicswapped = true;
- else if (i == (num_det - 1) && inval) {
- if (gndmicswapped)
- plug_type[0] = PLUG_TYPE_GND_MIC_SWAP;
- else
- plug_type[0] = PLUG_TYPE_INVALID;
- }
}
pr_debug("%s: DCE #%d, %04x, V %d, scaled V %d, GND %d, "
"VDDIO %d, inval %d\n", __func__,
i + 1, mb_v[i] & 0xffff, mic_mv[i], scaled, gndswitch,
vddioswitch, inval);
/* don't need to run further DCEs */
- if (ahighv && inval)
+ if ((ahighv || !vddioswitch) && inval)
break;
mic_mv[i] = scaled;
+
+ /*
+ * claim UNSUPPORTED plug insertion when
+ * good headset is detected but HPHR GND switch makes
+ * delta difference
+ */
+ if (i == (num_det - 2) && highdelta && !ahighv)
+ gndmicswapped = true;
+ else if (i == (num_det - 1) && inval) {
+ if (gndmicswapped)
+ plug_type[0] = PLUG_TYPE_GND_MIC_SWAP;
+ else
+ plug_type[0] = PLUG_TYPE_INVALID;
+ }
}
for (i = 0; (plug_type[0] != PLUG_TYPE_GND_MIC_SWAP && !inval) &&
@@ -8379,8 +8382,9 @@
{
struct platform_device *pdev = to_platform_device(dev);
struct tabla_priv *tabla = platform_get_drvdata(pdev);
- dev_dbg(dev, "%s: system resume\n", __func__);
- tabla->mbhc_last_resume = jiffies;
+ dev_dbg(dev, "%s: system resume tabla %p\n", __func__, tabla);
+ if (tabla)
+ tabla->mbhc_last_resume = jiffies;
return 0;
}
diff --git a/sound/soc/codecs/wcd9320-tables.c b/sound/soc/codecs/wcd9320-tables.c
index 68a4670..c49c276 100644
--- a/sound/soc/codecs/wcd9320-tables.c
+++ b/sound/soc/codecs/wcd9320-tables.c
@@ -673,7 +673,7 @@
[TAIKO_A_CDC_MAD_BEACON_IIR_CTL_VAL] = 1,
};
-const u8 taiko_reg_defaults[TAIKO_CACHE_SIZE] = {
+const u8 taiko_reset_reg_defaults[TAIKO_CACHE_SIZE] = {
[TAIKO_A_CHIP_CTL] = TAIKO_A_CHIP_CTL__POR,
[TAIKO_A_CHIP_STATUS] = TAIKO_A_CHIP_STATUS__POR,
[TAIKO_A_CHIP_ID_BYTE_0] = TAIKO_A_CHIP_ID_BYTE_0__POR,
diff --git a/sound/soc/codecs/wcd9320.c b/sound/soc/codecs/wcd9320.c
index 136024c..e8bb652 100644
--- a/sound/soc/codecs/wcd9320.c
+++ b/sound/soc/codecs/wcd9320.c
@@ -685,7 +685,7 @@
u32 compander, u32 enable, int event)
{
int value = 0;
- int mask = 1 << 4;
+ int mask = 1 << 5;
int gain = 0;
int gain_offset;
if (compander >= COMPANDER_MAX) {
@@ -828,19 +828,23 @@
break;
case SND_SOC_DAPM_PRE_PMD:
/* Halt the compander*/
- snd_soc_update_bits(codec, TAIKO_A_CDC_COMP1_B1_CTL +
- w->shift * 8, 1 << 2, 1 << 2);
+ if (taiko->comp_enabled[w->shift] != 0) {
+ snd_soc_update_bits(codec, TAIKO_A_CDC_COMP1_B1_CTL +
+ w->shift * 8, 1 << 2, 1 << 2);
+ }
break;
case SND_SOC_DAPM_POST_PMD:
/* Restore the gain */
- taiko_config_gain_compander(codec, w->shift,
- taiko->comp_enabled[w->shift], event);
- /* Disable the compander*/
- snd_soc_update_bits(codec, TAIKO_A_CDC_COMP1_B1_CTL +
- w->shift * 8, 0x03, 0x00);
- /* Turn off the clock for compander in pair*/
- snd_soc_update_bits(codec, TAIKO_A_CDC_CLK_RX_B2_CTL,
- 0x03 << comp_shift[w->shift], 0);
+ if (taiko->comp_enabled[w->shift] != 0) {
+ taiko_config_gain_compander(codec, w->shift,
+ taiko->comp_enabled[w->shift], event);
+ /* Disable the compander*/
+ snd_soc_update_bits(codec, TAIKO_A_CDC_COMP1_B1_CTL +
+ w->shift * 8, 0x03, 0x00);
+ /* Turn off the clock for compander in pair*/
+ snd_soc_update_bits(codec, TAIKO_A_CDC_CLK_RX_B2_CTL,
+ 0x03 << comp_shift[w->shift], 0);
+ }
break;
}
return 0;
@@ -1716,7 +1720,7 @@
usleep_range(100, 100);
taiko_codec_enable_audio_mode_bandgap(codec);
} else if (choice == TAIKO_BANDGAP_OFF) {
- snd_soc_write(codec, TAIKO_A_BIAS_CENTRAL_BG_CTL, 0x00);
+ snd_soc_write(codec, TAIKO_A_BIAS_CENTRAL_BG_CTL, 0x50);
} else {
pr_err("%s: Error, Invalid bandgap settings\n", __func__);
}
@@ -1730,7 +1734,7 @@
snd_soc_update_bits(codec, TAIKO_A_CLK_BUFF_EN2, 0x04, 0x00);
usleep_range(50, 50);
snd_soc_update_bits(codec, TAIKO_A_CLK_BUFF_EN2, 0x02, 0x02);
- snd_soc_update_bits(codec, TAIKO_A_CLK_BUFF_EN1, 0x05, 0x00);
+ snd_soc_update_bits(codec, TAIKO_A_CLK_BUFF_EN1, 0x01, 0x00);
usleep_range(50, 50);
taiko->clock_active = false;
}
@@ -1815,10 +1819,9 @@
/* switch to MCLK */
snd_soc_update_bits(codec, TAIKO_A_CLK_BUFF_EN1, 0x08, 0x00);
- if (taiko->mbhc_polling_active) {
+ if (taiko->mbhc_polling_active)
snd_soc_write(codec, TAIKO_A_CLK_BUFF_EN2, 0x02);
- taiko_codec_enable_config_mode(codec, 0);
- }
+ taiko_codec_enable_config_mode(codec, 0);
}
snd_soc_update_bits(codec, TAIKO_A_CLK_BUFF_EN1, 0x01, 0x01);
@@ -2658,7 +2661,7 @@
return ret;
}
-static int taiko_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
+static int taiko_codec_enable_interpolator(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = w->codec;
@@ -4295,25 +4298,25 @@
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_MIXER_E("RX1 MIX2", TAIKO_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
- 0, taiko_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
+ 0, taiko_codec_enable_interpolator, SND_SOC_DAPM_PRE_PMU |
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_MIXER_E("RX2 MIX2", TAIKO_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
- 0, taiko_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
+ 0, taiko_codec_enable_interpolator, SND_SOC_DAPM_PRE_PMU |
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_MIXER_E("RX7 MIX2", TAIKO_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
- 0, taiko_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
+ 0, taiko_codec_enable_interpolator, SND_SOC_DAPM_PRE_PMU |
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_MIXER_E("RX4 MIX1", TAIKO_A_CDC_CLK_RX_B1_CTL, 3, 0, NULL,
- 0, taiko_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
+ 0, taiko_codec_enable_interpolator, SND_SOC_DAPM_PRE_PMU |
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_MIXER_E("RX5 MIX1", TAIKO_A_CDC_CLK_RX_B1_CTL, 4, 0, NULL,
- 0, taiko_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
+ 0, taiko_codec_enable_interpolator, SND_SOC_DAPM_PRE_PMU |
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_MIXER_E("RX6 MIX1", TAIKO_A_CDC_CLK_RX_B1_CTL, 5, 0, NULL,
- 0, taiko_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
+ 0, taiko_codec_enable_interpolator, SND_SOC_DAPM_PRE_PMU |
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_MIXER_E("RX7 MIX1", TAIKO_A_CDC_CLK_RX_B1_CTL, 6, 0, NULL,
- 0, taiko_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
+ 0, taiko_codec_enable_interpolator, SND_SOC_DAPM_PRE_PMU |
SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_MIXER("RX1 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
@@ -4321,11 +4324,11 @@
SND_SOC_DAPM_MIXER("RX3 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
SND_SOC_DAPM_MUX_E("RX4 DSM MUX", TAIKO_A_CDC_CLK_RX_B1_CTL, 3, 0,
- &rx4_dsm_mux, taiko_codec_reset_interpolator,
+ &rx4_dsm_mux, taiko_codec_enable_interpolator,
SND_SOC_DAPM_PRE_PMU),
SND_SOC_DAPM_MUX_E("RX6 DSM MUX", TAIKO_A_CDC_CLK_RX_B1_CTL, 5, 0,
- &rx6_dsm_mux, taiko_codec_reset_interpolator,
+ &rx6_dsm_mux, taiko_codec_enable_interpolator,
SND_SOC_DAPM_PRE_PMU),
SND_SOC_DAPM_MIXER("RX1 CHAIN", TAIKO_A_CDC_RX1_B6_CTL, 5, 0, NULL, 0),
@@ -4381,10 +4384,10 @@
SND_SOC_DAPM_SUPPLY("CLASS_H_EAR", TAIKO_A_CDC_CLSH_B1_CTL, 4, 0,
taiko_codec_enable_class_h, SND_SOC_DAPM_POST_PMU),
- SND_SOC_DAPM_SUPPLY("CLASS_H_HPH_R", TAIKO_A_CDC_CLSH_B1_CTL, 3, 0,
+ SND_SOC_DAPM_SUPPLY("CLASS_H_HPH_L", TAIKO_A_CDC_CLSH_B1_CTL, 3, 0,
taiko_codec_enable_class_h, SND_SOC_DAPM_POST_PMU),
- SND_SOC_DAPM_SUPPLY("CLASS_H_HPH_L", TAIKO_A_CDC_CLSH_B1_CTL, 2, 0,
+ SND_SOC_DAPM_SUPPLY("CLASS_H_HPH_R", TAIKO_A_CDC_CLSH_B1_CTL, 2, 0,
taiko_codec_enable_class_h, SND_SOC_DAPM_POST_PMU),
SND_SOC_DAPM_SUPPLY("CP", TAIKO_A_NCP_EN, 0, 0,
@@ -7088,7 +7091,7 @@
return rc;
}
-static const struct taiko_reg_mask_val taiko_1_0_reg_defaults[] = {
+static const struct taiko_reg_mask_val taiko_reg_defaults[] = {
/* set MCLk to 9.6 */
TAIKO_REG_VAL(TAIKO_A_CHIP_CTL, 0x0A),
@@ -7096,14 +7099,10 @@
/* EAR PA deafults */
TAIKO_REG_VAL(TAIKO_A_RX_EAR_CMBUFF, 0x05),
- /* HPH PA */
- TAIKO_REG_VAL(TAIKO_A_RX_HPH_BIAS_PA, 0x7A),
/** BUCK and NCP defaults for EAR and HS */
TAIKO_REG_VAL(TAIKO_A_BUCK_CTRL_CCL_4, 0x50),
- TAIKO_REG_VAL(TAIKO_A_BUCK_CTRL_VCL_1, 0x08),
TAIKO_REG_VAL(TAIKO_A_BUCK_CTRL_CCL_1, 0x5B),
- TAIKO_REG_VAL(TAIKO_A_NCP_CLK, 0xFC),
/* CLASS-H defaults for EAR and HS */
TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_BUCK_NCP_VARS, 0x00),
@@ -7120,7 +7119,6 @@
*/
TAIKO_REG_VAL(TAIKO_A_CDC_CLSH_B1_CTL, 0x26),
-
/* RX deafults */
TAIKO_REG_VAL(TAIKO_A_CDC_RX1_B5_CTL, 0x78),
TAIKO_REG_VAL(TAIKO_A_CDC_RX2_B5_CTL, 0x78),
@@ -7142,20 +7140,50 @@
TAIKO_REG_VAL(TAIKO_A_CDC_RX7_B6_CTL, 0x80),
};
+static const struct taiko_reg_mask_val taiko_1_0_reg_defaults[] = {
+ /*
+ * The following only need to be written for Taiko 1.0 parts.
+ * Taiko 2.0 will have appropriate defaults for these registers.
+ */
+ /* Choose max non-overlap time for NCP */
+ TAIKO_REG_VAL(TAIKO_A_NCP_CLK, 0xFC),
+ /* Use 25mV/50mV for deltap/m to reduce ripple */
+ TAIKO_REG_VAL(TAIKO_A_BUCK_CTRL_VCL_1, 0x08),
+ /*
+ * Set DISABLE_MODE_SEL<1:0> to 0b10 (disable PWM in auto mode).
+ * Note that the other bits of this register will be changed during
+ * Rx PA bring up.
+ */
+ TAIKO_REG_VAL(TAIKO_A_BUCK_MODE_3, 0xCE),
+ /* Reduce HPH DAC bias to 70% */
+ TAIKO_REG_VAL(TAIKO_A_RX_HPH_BIAS_PA, 0x7A),
+ /*Reduce EAR DAC bias to 70% */
+ TAIKO_REG_VAL(TAIKO_A_RX_EAR_BIAS_PA, 0x76),
+ /* Reduce LINE DAC bias to 70% */
+ TAIKO_REG_VAL(TAIKO_A_RX_LINE_BIAS_PA, 0x78),
+};
+
static void taiko_update_reg_defaults(struct snd_soc_codec *codec)
{
u32 i;
+ struct wcd9xxx *taiko_core = dev_get_drvdata(codec->dev->parent);
- for (i = 0; i < ARRAY_SIZE(taiko_1_0_reg_defaults); i++)
- snd_soc_write(codec, taiko_1_0_reg_defaults[i].reg,
+ for (i = 0; i < ARRAY_SIZE(taiko_reg_defaults); i++)
+ snd_soc_write(codec, taiko_reg_defaults[i].reg,
+ taiko_reg_defaults[i].val);
+
+ if (TAIKO_IS_1_0(taiko_core->version)) {
+ for (i = 0; i < ARRAY_SIZE(taiko_1_0_reg_defaults); i++)
+ snd_soc_write(codec, taiko_1_0_reg_defaults[i].reg,
taiko_1_0_reg_defaults[i].val);
+ }
}
static const struct taiko_reg_mask_val taiko_codec_reg_init_val[] = {
/* Initialize current threshold to 350MA
* number of wait and run cycles to 4096
*/
- {TAIKO_A_RX_HPH_OCP_CTL, 0xE0, 0x60},
+ {TAIKO_A_RX_HPH_OCP_CTL, 0xE1, 0x61},
{TAIKO_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
/* Initialize gain registers to use register gain */
@@ -7185,7 +7213,7 @@
/* Use 16 bit sample size for RX */
{TAIKO_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
- {TAIKO_A_CDC_CONN_RX_SB_B2_CTL, 0xFF, 0xAA},
+ {TAIKO_A_CDC_CONN_RX_SB_B2_CTL, 0xFF, 0x2A},
/*enable HPF filter for TX paths */
{TAIKO_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
@@ -7601,7 +7629,7 @@
.volatile_register = taiko_volatile,
.reg_cache_size = TAIKO_CACHE_SIZE,
- .reg_cache_default = taiko_reg_defaults,
+ .reg_cache_default = taiko_reset_reg_defaults,
.reg_word_size = 1,
.controls = taiko_snd_controls,
diff --git a/sound/soc/codecs/wcd9320.h b/sound/soc/codecs/wcd9320.h
index 739ab17..7ca8ff0 100644
--- a/sound/soc/codecs/wcd9320.h
+++ b/sound/soc/codecs/wcd9320.h
@@ -36,7 +36,7 @@
SND_JACK_BTN_6 | SND_JACK_BTN_7)
extern const u8 taiko_reg_readable[TAIKO_CACHE_SIZE];
-extern const u8 taiko_reg_defaults[TAIKO_CACHE_SIZE];
+extern const u8 taiko_reset_reg_defaults[TAIKO_CACHE_SIZE];
enum taiko_micbias_num {
TAIKO_MICBIAS1 = 0,
diff --git a/sound/soc/msm/apq8064-i2s.c b/sound/soc/msm/apq8064-i2s.c
index 162f39d..e309370 100644
--- a/sound/soc/msm/apq8064-i2s.c
+++ b/sound/soc/msm/apq8064-i2s.c
@@ -63,9 +63,8 @@
#define JACK_DETECT_GPIO 38
-#define APQ_I2S_SLAVE_CONFIG 0
/* MCLK selection GPIOs from PMIC */
-#define PM_GPIO_MCLK_MDM 10
+#define PM_GPIO_MCLK_MDM 27
#define PM_GPIO_MCLK_APQ 41
/* SPKR I2S Configuration */
@@ -170,10 +169,8 @@
};
-#if APQ_I2S_SLAVE_CONFIG
static u32 mdm_mclk_gpio = PM8921_GPIO_PM_TO_SYS(PM_GPIO_MCLK_MDM);
static u32 apq_mclk_gpio = PM8921_GPIO_PM_TO_SYS(PM_GPIO_MCLK_APQ);
-#endif
static u32 top_spk_pamp_gpio = PM8921_GPIO_PM_TO_SYS(18);
static u32 bottom_spk_pamp_gpio = PM8921_GPIO_PM_TO_SYS(19);
static int msm_spk_control;
@@ -186,9 +183,6 @@
static struct clk *i2s_rx_bit_clk;
static struct clk *i2s_tx_bit_clk;
-#if (!APQ_I2S_SLAVE_CONFIG)
-static struct clk *mi2s_osr_clk;
-#endif
static struct clk *mi2s_bit_clk;
static int msm_i2s_rx_ch = 1;
@@ -208,6 +202,7 @@
static struct snd_soc_jack hs_jack;
static struct snd_soc_jack button_jack;
+static atomic_t auxpcm_rsc_ref;
static int apq8064_i2s_hs_detect_use_gpio = -1;
module_param(apq8064_i2s_hs_detect_use_gpio, int, 0444);
@@ -952,14 +947,10 @@
static int msm_mi2s_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
- struct snd_interval *rate = hw_param_interval(params,
- SNDRV_PCM_HW_PARAM_RATE);
-
struct snd_interval *channels = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_CHANNELS);
- pr_debug("%s()\n", __func__);
- rate->min = rate->max = 48000;
+ pr_debug("%s(): channels = %d\n", __func__, msm_mi2s_rx_ch);
channels->min = channels->max = msm_mi2s_rx_ch;
return 0;
@@ -968,15 +959,10 @@
static int msm_mi2s_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
- struct snd_interval *rate = hw_param_interval(params,
- SNDRV_PCM_HW_PARAM_RATE);
-
struct snd_interval *channels = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_CHANNELS);
- pr_debug("%s()\n", __func__);
- rate->min = rate->max = 48000;
-
+ pr_debug("%s(): channels = %d\n", __func__, msm_mi2s_tx_ch);
channels->min = channels->max = msm_mi2s_tx_ch;
return 0;
@@ -986,14 +972,10 @@
static int msm_i2s_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
- struct snd_interval *rate = hw_param_interval(params,
- SNDRV_PCM_HW_PARAM_RATE);
-
struct snd_interval *channels = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_CHANNELS);
- pr_debug("%s()\n", __func__);
- rate->min = rate->max = 48000;
+ pr_debug("%s(): channels = %d\n", __func__, msm_i2s_rx_ch);
channels->min = channels->max = msm_i2s_rx_ch;
return 0;
@@ -1002,15 +984,10 @@
static int msm_i2s_tx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
- struct snd_interval *rate = hw_param_interval(params,
- SNDRV_PCM_HW_PARAM_RATE);
-
struct snd_interval *channels = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_CHANNELS);
- pr_debug("%s()\n", __func__);
- rate->min = rate->max = 48000;
-
+ pr_debug("%s(): channels = %d\n", __func__, msm_i2s_tx_ch);
channels->min = channels->max = msm_i2s_tx_ch;
return 0;
@@ -1037,7 +1014,6 @@
struct snd_soc_dapm_context *dapm = &codec->dapm;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
-#if APQ_I2S_SLAVE_CONFIG
struct pm_gpio param = {
.direction = PM_GPIO_DIR_OUT,
.output_buffer = PM_GPIO_OUT_BUF_CMOS,
@@ -1047,14 +1023,13 @@
.out_strength = PM_GPIO_STRENGTH_MED,
.function = PM_GPIO_FUNC_NORMAL,
};
-#endif
+
pr_debug("%s(), dev_name(%s)\n", __func__, dev_name(cpu_dai->dev));
ret = gpio_request(GPIO_MI2S_MCLK, "MI2S_MCLK");
if (ret)
pr_err("%s: Failed to request gpio %d\n", __func__,
GPIO_MI2S_MCLK);
-#if APQ_I2S_SLAVE_CONFIG
/* APQ provides the mclk to codec */
ret = gpio_request(mdm_mclk_gpio, "MDM_MCLK_SWITCH");
if (ret) {
@@ -1069,6 +1044,7 @@
else
gpio_direction_output(mdm_mclk_gpio, 0);
+ pr_debug("%s: Config mdm_mclk_gpio\n", __func__);
ret = gpio_request(apq_mclk_gpio, "APQ_MCLK_SWITCH");
if (ret) {
pr_err("%s: Failed to request gpio %d\n", __func__,
@@ -1081,12 +1057,9 @@
apq_mclk_gpio);
else
gpio_direction_output(apq_mclk_gpio, 1);
- pr_debug("%s: Config mdm_mclk_gpio and apq_mclk_gpio\n",
- __func__);
-#else
- pr_debug("%s: Not config mdm_mclk_gpio and apq_mclk_gpio\n",
- __func__);
-#endif
+
+ pr_debug("%s: Config apq_mclk_gpio\n", __func__);
+
snd_soc_dapm_new_controls(dapm, apq8064_dapm_widgets,
ARRAY_SIZE(apq8064_dapm_widgets));
@@ -1171,12 +1144,10 @@
ret = tabla_hs_detect(codec, &mbhc_cfg);
-#if APQ_I2S_SLAVE_CONFIG
/* MDM provides the mclk to codec */
gpio_direction_output(apq_mclk_gpio, 0);
gpio_direction_output(mdm_mclk_gpio, 1);
- pr_debug("%s: Should not running here if no clock switch\n", __func__);
-#endif
+ pr_debug("%s: Clock switch to MDM\n", __func__);
/* Should we add code to put back codec clock?*/
gpio_free(GPIO_MI2S_MCLK);
pr_debug("%s: Free MCLK GPIO\n", __func__);
@@ -1201,13 +1172,6 @@
clk_put(mi2s_bit_clk);
mi2s_bit_clk = NULL;
}
-#if (!APQ_I2S_SLAVE_CONFIG)
- if (mi2s_osr_clk) {
- clk_disable_unprepare(mi2s_osr_clk);
- clk_put(mi2s_osr_clk);
- mi2s_osr_clk = NULL;
- }
-#endif
msm_mi2s_free_gpios();
}
}
@@ -1249,8 +1213,6 @@
if (atomic_inc_return(&mi2s_rsc_ref) == 1) {
pr_debug("%s: acquire mi2s resources\n", __func__);
msm_configure_mi2s_gpio();
-
-#if APQ_I2S_SLAVE_CONFIG
pr_debug("%s: APQ is MI2S slave\n", __func__);
mi2s_bit_clk = clk_get(cpu_dai->dev, "bit_clk");
if (IS_ERR(mi2s_bit_clk))
@@ -1265,38 +1227,6 @@
ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBM_CFM);
if (IS_ERR_VALUE(ret))
pr_err("set format for CPU dai failed\n");
-#else
- pr_debug("%s: APQ is MI2S master\n", __func__);
- mi2s_osr_clk = clk_get(cpu_dai->dev, "osr_clk");
- if (IS_ERR(mi2s_osr_clk))
- return PTR_ERR(mi2s_osr_clk);
- clk_set_rate(mi2s_osr_clk, TABLA_EXT_CLK_RATE);
- ret = clk_prepare_enable(mi2s_osr_clk);
- if (IS_ERR_VALUE(ret)) {
- pr_err("Unable to enable mi2s_osr_clk\n");
- clk_put(mi2s_osr_clk);
- return ret;
- }
- mi2s_bit_clk = clk_get(cpu_dai->dev, "bit_clk");
- if (IS_ERR(mi2s_bit_clk)) {
- pr_err("Unable to get mi2s_bit_clk\n");
- clk_disable_unprepare(mi2s_osr_clk);
- clk_put(mi2s_osr_clk);
- return PTR_ERR(mi2s_bit_clk);
- }
- clk_set_rate(mi2s_bit_clk, 8);
- ret = clk_prepare_enable(mi2s_bit_clk);
- if (IS_ERR_VALUE(ret)) {
- pr_err("Unable to enable mi2s_bit_clk\n");
- clk_disable_unprepare(mi2s_osr_clk);
- clk_put(mi2s_osr_clk);
- clk_put(mi2s_bit_clk);
- return ret;
- }
- ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS);
- if (IS_ERR_VALUE(ret))
- pr_err("set format for CPU dai failed\n");
-#endif
}
return ret;
@@ -2027,57 +1957,11 @@
static int msm_aux_pcm_get_gpios(void)
{
- int ret = 0;
-
- pr_debug("%s\n", __func__);
-
- ret = gpio_request(GPIO_AUX_PCM_DOUT, "AUX PCM DOUT");
- if (ret < 0) {
- pr_err("%s: Failed to request gpio(%d): AUX PCM DOUT",
- __func__, GPIO_AUX_PCM_DOUT);
- goto fail_dout;
- }
-
- ret = gpio_request(GPIO_AUX_PCM_DIN, "AUX PCM DIN");
- if (ret < 0) {
- pr_err("%s: Failed to request gpio(%d): AUX PCM DIN",
- __func__, GPIO_AUX_PCM_DIN);
- goto fail_din;
- }
-
- ret = gpio_request(GPIO_AUX_PCM_SYNC, "AUX PCM SYNC");
- if (ret < 0) {
- pr_err("%s: Failed to request gpio(%d): AUX PCM SYNC",
- __func__, GPIO_AUX_PCM_SYNC);
- goto fail_sync;
- }
- ret = gpio_request(GPIO_AUX_PCM_CLK, "AUX PCM CLK");
- if (ret < 0) {
- pr_err("%s: Failed to request gpio(%d): AUX PCM CLK",
- __func__, GPIO_AUX_PCM_CLK);
- goto fail_clk;
- }
-
return 0;
-
-fail_clk:
- gpio_free(GPIO_AUX_PCM_SYNC);
-fail_sync:
- gpio_free(GPIO_AUX_PCM_DIN);
-fail_din:
- gpio_free(GPIO_AUX_PCM_DOUT);
-fail_dout:
-
- return ret;
}
static int msm_aux_pcm_free_gpios(void)
{
- gpio_free(GPIO_AUX_PCM_DIN);
- gpio_free(GPIO_AUX_PCM_DOUT);
- gpio_free(GPIO_AUX_PCM_SYNC);
- gpio_free(GPIO_AUX_PCM_CLK);
-
return 0;
}
static int msm_startup(struct snd_pcm_substream *substream)
@@ -2095,8 +1979,10 @@
{
int ret = 0;
- pr_debug("%s(): substream = %s\n", __func__, substream->name);
- ret = msm_aux_pcm_get_gpios();
+ pr_debug("%s(): substream = %s, auxpcm_rsc_ref counter = %d\n",
+ __func__, substream->name, atomic_read(&auxpcm_rsc_ref));
+ if (atomic_inc_return(&auxpcm_rsc_ref) == 1)
+ ret = msm_aux_pcm_get_gpios();
if (ret < 0) {
pr_err("%s: Aux PCM GPIO request failed\n", __func__);
return -EINVAL;
@@ -2120,8 +2006,10 @@
static void msm_auxpcm_shutdown(struct snd_pcm_substream *substream)
{
- pr_debug("%s(): substream = %s\n", __func__, substream->name);
- msm_aux_pcm_free_gpios();
+ pr_debug("%s(): substream = %s, auxpcm_rsc_ref counter = %d\n",
+ __func__, substream->name, atomic_read(&auxpcm_rsc_ref));
+ if (atomic_dec_return(&auxpcm_rsc_ref) == 0)
+ msm_aux_pcm_free_gpios();
}
static void msm_shutdown(struct snd_pcm_substream *substream)
@@ -2441,6 +2329,14 @@
static struct snd_soc_dai_link msm_dai[] = {
/* FrontEnd DAI Links */
{
+ /*
+ * In APQ8064 I2S platform, there is no playback support
+ * only voice call is supported so there is no even system
+ * tone or dialing tone which is by design because I2S clock
+ * is provided by MDM which matches voice call sample rate
+ * 8kHz or 16kHz while system tone is 48kHz. We disable the
+ * playback by feeding the audio to AUX PCM port.
+ */
.name = "MSM8960 Media1",
.stream_name = "MultiMedia1",
.cpu_dai_name = "MultiMedia1",
@@ -2710,6 +2606,7 @@
.no_pcm = 1,
.be_id = MSM_BACKEND_DAI_AUXPCM_TX,
.be_hw_params_fixup = msm_auxpcm_be_params_fixup,
+ .ops = &msm_auxpcm_be_ops,
},
};
@@ -2785,6 +2682,7 @@
mutex_init(&cdc_mclk_mutex);
atomic_set(&mi2s_rsc_ref, 0);
+ atomic_set(&auxpcm_rsc_ref, 0);
return ret;
}
@@ -2792,7 +2690,8 @@
static void __exit msm_audio_exit(void)
{
- if (!cpu_is_apq8064() || (socinfo_get_id() == 130)) {
+ if (!(cpu_is_apq8064() || cpu_is_apq8064ab()) ||
+ (socinfo_get_id() == 130)) {
pr_err("%s: Not the right machine type\n", __func__);
return ;
}
diff --git a/sound/soc/msm/apq8064.c b/sound/soc/msm/apq8064.c
index 1041818..b921df1 100644
--- a/sound/soc/msm/apq8064.c
+++ b/sound/soc/msm/apq8064.c
@@ -100,6 +100,7 @@
static struct snd_soc_jack hs_jack;
static struct snd_soc_jack button_jack;
+static atomic_t auxpcm_rsc_ref;
static int apq8064_hs_detect_use_gpio = -1;
module_param(apq8064_hs_detect_use_gpio, int, 0444);
@@ -1310,6 +1311,24 @@
return 0;
}
+static int msm_slim_4_rx_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+
+ struct snd_interval *channels = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_CHANNELS);
+
+ rate->min = rate->max = 48000;
+ channels->min = channels->max = 1;
+
+ pr_debug("%s channels->min %u channels->max %u ()\n", __func__,
+ channels->min, channels->max);
+ return 0;
+}
+
+
static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
@@ -1450,8 +1469,10 @@
{
int ret = 0;
- pr_debug("%s(): substream = %s\n", __func__, substream->name);
- ret = msm_aux_pcm_get_gpios();
+ pr_debug("%s(): substream = %s, auxpcm_rsc_ref counter = %d\n",
+ __func__, substream->name, atomic_read(&auxpcm_rsc_ref));
+ if (atomic_inc_return(&auxpcm_rsc_ref) == 1)
+ ret = msm_aux_pcm_get_gpios();
if (ret < 0) {
pr_err("%s: Aux PCM GPIO request failed\n", __func__);
return -EINVAL;
@@ -1475,8 +1496,10 @@
static void msm_auxpcm_shutdown(struct snd_pcm_substream *substream)
{
- pr_debug("%s(): substream = %s\n", __func__, substream->name);
- msm_aux_pcm_free_gpios();
+ pr_debug("%s(): substream = %s, auxpcm_rsc_ref counter = %d\n",
+ __func__, substream->name, atomic_read(&auxpcm_rsc_ref));
+ if (atomic_dec_return(&auxpcm_rsc_ref) == 0)
+ msm_aux_pcm_free_gpios();
}
static void msm_shutdown(struct snd_pcm_substream *substream)
@@ -1739,6 +1762,48 @@
.ignore_pmdown_time = 1,
.be_id = MSM_FRONTEND_DAI_MULTIMEDIA5,
},
+ {
+ .name = "MSM8960 Media6",
+ .stream_name = "MultiMedia6",
+ .cpu_dai_name = "MultiMedia6",
+ .platform_name = "msm-multi-ch-pcm-dsp",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST},
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1, /* this dailink has playback support */
+ .be_id = MSM_FRONTEND_DAI_MULTIMEDIA6
+ },
+ {
+ .name = "MSM8960 Compr2",
+ .stream_name = "COMPR2",
+ .cpu_dai_name = "MultiMedia7",
+ .platform_name = "msm-compr-dsp",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST},
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1, /* this dailink has playback support */
+ .be_id = MSM_FRONTEND_DAI_MULTIMEDIA7,
+ },
+ {
+ .name = "MSM8960 Compr3",
+ .stream_name = "COMPR3",
+ .cpu_dai_name = "MultiMedia8",
+ .platform_name = "msm-compr-dsp",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST},
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1, /* this dailink has playback support */
+ .be_id = MSM_FRONTEND_DAI_MULTIMEDIA8,
+ },
/* Backend DAI Links */
{
.name = LPASS_BE_SLIMBUS_0_RX,
@@ -1873,6 +1938,7 @@
.no_pcm = 1,
.be_id = MSM_BACKEND_DAI_AUXPCM_TX,
.be_hw_params_fixup = msm_auxpcm_be_params_fixup,
+ .ops = &msm_auxpcm_be_ops,
},
{
.name = LPASS_BE_STUB_RX,
@@ -1960,7 +2026,7 @@
.codec_dai_name = "msm-stub-rx",
.no_pcm = 1,
.be_id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
- .be_hw_params_fixup = msm_be_hw_params_fixup,
+ .be_hw_params_fixup = msm_slim_4_rx_be_hw_params_fixup,
.ops = &msm_slimbus_4_be_ops,
.ignore_pmdown_time = 1, /* this dainlink has playback support */
},
@@ -2035,7 +2101,8 @@
{
int ret;
u32 version = socinfo_get_platform_version();
- if (!cpu_is_apq8064() || (socinfo_get_id() == 130) ||
+ if (!(cpu_is_apq8064() || cpu_is_apq8064ab()) ||
+ (socinfo_get_id() == 130) ||
(machine_is_apq8064_mtp() &&
(SOCINFO_VERSION_MINOR(version) == 1))) {
pr_info("%s: Not APQ8064 in SLIMBUS mode\n", __func__);
@@ -2067,6 +2134,7 @@
}
mutex_init(&cdc_mclk_mutex);
+ atomic_set(&auxpcm_rsc_ref, 0);
return ret;
}
@@ -2074,7 +2142,8 @@
static void __exit msm_audio_exit(void)
{
- if (!cpu_is_apq8064() || (socinfo_get_id() == 130)) {
+ if (!(cpu_is_apq8064() || cpu_is_apq8064ab()) ||
+ (socinfo_get_id() == 130)) {
pr_err("%s: Not the right machine type\n", __func__);
return ;
}
diff --git a/sound/soc/msm/mpq8064.c b/sound/soc/msm/mpq8064.c
index 499e4b6..3cb7c58 100644
--- a/sound/soc/msm/mpq8064.c
+++ b/sound/soc/msm/mpq8064.c
@@ -45,6 +45,11 @@
#define TOP_SPK_AMP_POS 0x4
#define TOP_SPK_AMP_NEG 0x8
+#define GPIO_AUX_PCM_DOUT 43
+#define GPIO_AUX_PCM_DIN 44
+#define GPIO_AUX_PCM_SYNC 45
+#define GPIO_AUX_PCM_CLK 46
+
#define TABLA_EXT_CLK_RATE 12288000
#define TABLA_MBHC_DEF_BUTTONS 8
@@ -134,7 +139,7 @@
static int msm_slim_0_rx_ch = 1;
static int msm_slim_0_tx_ch = 1;
static int msm_hdmi_rx_ch = 8;
-
+static int mi2s_rate_variable;
static struct clk *codec_clk;
static int clk_users;
@@ -517,6 +522,7 @@
static const char *slim0_tx_ch_text[] = {"One", "Two", "Three", "Four"};
static const char * const hdmi_rx_ch_text[] = {"Two", "Three", "Four",
"Five", "Six", "Seven", "Eight"};
+static const char * const mi2s_rate[] = {"Default", "Variable"};
static const struct soc_enum msm_enum[] = {
@@ -524,6 +530,7 @@
SOC_ENUM_SINGLE_EXT(2, slim0_rx_ch_text),
SOC_ENUM_SINGLE_EXT(4, slim0_tx_ch_text),
SOC_ENUM_SINGLE_EXT(7, hdmi_rx_ch_text),
+ SOC_ENUM_SINGLE_EXT(2, mi2s_rate),
};
@@ -584,6 +591,20 @@
return 1;
}
+static int msm_mi2s_rate_put(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ mi2s_rate_variable = ucontrol->value.integer.value[0];
+ pr_debug("%s: mi2s_rate_variable = %d\n", __func__, mi2s_rate_variable);
+ return 0;
+}
+
+static int msm_mi2s_rate_get(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ ucontrol->value.integer.value[0] = mi2s_rate_variable;
+ return 0;
+}
static const struct snd_kcontrol_new tabla_msm_controls[] = {
SOC_ENUM_EXT("Speaker Function", msm_enum[0], msm_get_spk,
@@ -594,6 +615,9 @@
msm_slim_0_tx_ch_get, msm_slim_0_tx_ch_put),
SOC_ENUM_EXT("HDMI_RX Channels", msm_enum[3],
msm_hdmi_rx_ch_get, msm_hdmi_rx_ch_put),
+ SOC_ENUM_EXT("SEC RX Rate", msm_enum[4],
+ msm_mi2s_rate_get,
+ msm_mi2s_rate_put),
};
@@ -813,11 +837,16 @@
static int msm_be_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
struct snd_interval *channels = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_CHANNELS);
- pr_debug("%s()\n", __func__);
+ pr_debug("%s mi2s_rate_variable = %d\n", __func__, mi2s_rate_variable);
+ /*Configure the sample rate as 48000 KHz for the LPCM playback*/
+ if (!mi2s_rate_variable)
+ rate->min = rate->max = 48000;
channels->min = channels->max = 2;
return 0;
@@ -918,6 +947,78 @@
return ret;
}
+static int mpq8064_auxpcm_be_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+
+ struct snd_interval *channels = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_CHANNELS);
+
+ /* PCM only supports mono output with 8khz sample rate */
+ rate->min = rate->max = 8000;
+ channels->min = channels->max = 1;
+
+ return 0;
+}
+
+static int mpq8064_aux_pcm_get_gpios(void)
+{
+ int ret = 0;
+
+ pr_debug("%s\n", __func__);
+
+ ret = gpio_request(GPIO_AUX_PCM_DOUT, "AUX PCM DOUT");
+ if (ret < 0) {
+ pr_err("%s: Failed to request gpio(%d): AUX PCM DOUT",
+ __func__, GPIO_AUX_PCM_DOUT);
+ goto fail_dout;
+ }
+
+ ret = gpio_request(GPIO_AUX_PCM_DIN, "AUX PCM DIN");
+ if (ret < 0) {
+ pr_err("%s: Failed to request gpio(%d): AUX PCM DIN",
+ __func__, GPIO_AUX_PCM_DIN);
+ goto fail_din;
+ }
+
+ ret = gpio_request(GPIO_AUX_PCM_SYNC, "AUX PCM SYNC");
+ if (ret < 0) {
+ pr_err("%s: Failed to request gpio(%d): AUX PCM SYNC",
+ __func__, GPIO_AUX_PCM_SYNC);
+ goto fail_sync;
+ }
+ ret = gpio_request(GPIO_AUX_PCM_CLK, "AUX PCM CLK");
+ if (ret < 0) {
+ pr_err("%s: Failed to request gpio(%d): AUX PCM CLK",
+ __func__, GPIO_AUX_PCM_CLK);
+ goto fail_clk;
+ }
+
+ return 0;
+
+fail_clk:
+ gpio_free(GPIO_AUX_PCM_SYNC);
+fail_sync:
+ gpio_free(GPIO_AUX_PCM_DIN);
+fail_din:
+ gpio_free(GPIO_AUX_PCM_DOUT);
+fail_dout:
+
+ return ret;
+}
+
+static int mpq8064_aux_pcm_free_gpios(void)
+{
+ gpio_free(GPIO_AUX_PCM_DIN);
+ gpio_free(GPIO_AUX_PCM_DOUT);
+ gpio_free(GPIO_AUX_PCM_SYNC);
+ gpio_free(GPIO_AUX_PCM_CLK);
+
+ return 0;
+}
+
static int msm_startup(struct snd_pcm_substream *substream)
{
pr_debug("%s(): substream = %s stream = %d\n", __func__,
@@ -931,12 +1032,39 @@
substream->name, substream->stream);
}
+static int mpq8064_auxpcm_startup(struct snd_pcm_substream *substream)
+{
+ int ret = 0;
+
+ pr_debug("%s(): substream = %s\n", __func__, substream->name);
+ ret = mpq8064_aux_pcm_get_gpios();
+ if (ret < 0) {
+ pr_err("%s: Aux PCM GPIO request failed\n", __func__);
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static void mpq8064_auxpcm_shutdown(struct snd_pcm_substream *substream)
+{
+
+ pr_debug("%s(): substream = %s\n", __func__, substream->name);
+ mpq8064_aux_pcm_free_gpios();
+}
+
+
static struct snd_soc_ops msm_be_ops = {
.startup = msm_startup,
.hw_params = msm_hw_params,
.shutdown = msm_shutdown,
};
+static struct snd_soc_ops mpq8064_auxpcm_be_ops = {
+ .startup = mpq8064_auxpcm_startup,
+ .shutdown = mpq8064_auxpcm_shutdown,
+};
+
+
static int mpq8064_sec_i2s_rx_free_gpios(void)
{
int i;
@@ -1246,6 +1374,20 @@
.codec_dai_name = "snd-soc-dummy-dai",
.codec_name = "snd-soc-dummy",
},
+ {
+ .name = "AUXPCM Hostless",
+ .stream_name = "AUXPCM Hostless",
+ .cpu_dai_name = "AUXPCM_HOSTLESS",
+ .platform_name = "msm-pcm-hostless",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST},
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1, /* dainlink has playback support */
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ },
/* Secondary I2S RX Hostless */
{
.name = "SEC_I2S_RX Hostless",
@@ -1427,6 +1569,31 @@
.no_pcm = 1,
.be_id = MSM_BACKEND_DAI_AFE_PCM_TX,
},
+ /* AUX PCM Backend DAI Links */
+ {
+ .name = LPASS_BE_AUXPCM_RX,
+ .stream_name = "AUX PCM Playback",
+ .cpu_dai_name = "msm-dai-q6.2",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-rx",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_AUXPCM_RX,
+ .be_hw_params_fixup = mpq8064_auxpcm_be_params_fixup,
+ .ops = &mpq8064_auxpcm_be_ops,
+ .ignore_pmdown_time = 1,
+ },
+ {
+ .name = LPASS_BE_AUXPCM_TX,
+ .stream_name = "AUX PCM Capture",
+ .cpu_dai_name = "msm-dai-q6.3",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-tx",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_AUXPCM_TX,
+ .be_hw_params_fixup = mpq8064_auxpcm_be_params_fixup,
+ },
};
diff --git a/sound/soc/msm/msm-compr-q6.c b/sound/soc/msm/msm-compr-q6.c
index a911d9d..0b9d54f 100644
--- a/sound/soc/msm/msm-compr-q6.c
+++ b/sound/soc/msm/msm-compr-q6.c
@@ -31,6 +31,7 @@
#include <linux/dma-mapping.h>
#include <linux/android_pmem.h>
#include <sound/timer.h>
+#include <mach/qdsp6v2/q6core.h>
#include "msm-compr-q6.h"
#include "msm-pcm-routing.h"
@@ -332,6 +333,7 @@
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct compr_audio *compr = runtime->private_data;
+ struct snd_soc_pcm_runtime *soc_prtd = substream->private_data;
struct msm_audio *prtd = &compr->prtd;
struct asm_aac_cfg aac_cfg;
struct asm_wma_cfg wma_cfg;
@@ -354,13 +356,14 @@
switch (compr->info.codec_param.codec.id) {
case SND_AUDIOCODEC_MP3:
+ pr_debug("%s: SND_AUDIOCODEC_MP3\n", __func__);
ret = q6asm_media_format_block(prtd->audio_client,
compr->codec);
if (ret < 0)
pr_info("%s: CMD Format block failed\n", __func__);
break;
case SND_AUDIOCODEC_AAC:
- pr_debug("SND_AUDIOCODEC_AAC\n");
+ pr_debug("%s: SND_AUDIOCODEC_AAC\n", __func__);
memset(&aac_cfg, 0x0, sizeof(struct asm_aac_cfg));
aac_cfg.aot = AAC_ENC_MODE_EAAC_P;
aac_cfg.format = 0x03;
@@ -372,11 +375,14 @@
pr_err("%s: CMD Format block failed\n", __func__);
break;
case SND_AUDIOCODEC_AC3_PASS_THROUGH:
- pr_debug("compressd playback, no need to send"
- " the decoder params\n");
- break;
case SND_AUDIOCODEC_DTS_PASS_THROUGH:
- pr_debug("compressd DTS playback,dont send the decoder params\n");
+ pr_debug("compressd playback, no need to send decoder params");
+ pr_debug("decoder id: %d\n",
+ compr->info.codec_param.codec.id);
+ msm_pcm_routing_reg_psthr_stream(
+ soc_prtd->dai_link->be_id,
+ prtd->session_id, substream->stream,
+ 1);
break;
case SND_AUDIOCODEC_WMA:
pr_debug("SND_AUDIOCODEC_WMA\n");
@@ -469,6 +475,7 @@
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct compr_audio *compr = runtime->private_data;
+ struct snd_soc_pcm_runtime *soc_prtd = substream->private_data;
struct msm_audio *prtd = &compr->prtd;
struct audio_buffer *buf = prtd->audio_client->port[OUT].buf;
struct snd_codec *codec = &compr->info.codec_param.codec;
@@ -498,6 +505,13 @@
pr_err("%s: CMD Format block" \
"failed: %d\n", __func__, ret);
break;
+ case SND_AUDIOCODEC_PCM:
+ pr_debug("SND_AUDIOCODEC_PCM\n");
+ ret = q6asm_enc_cfg_blk_multi_ch_pcm(prtd->audio_client,
+ prtd->samp_rate, prtd->channel_mode);
+ if (ret < 0)
+ pr_info("%s: CMD Format block failed\n", __func__);
+ break;
default:
pr_debug("No config for codec %d\n", codec->id);
}
@@ -510,6 +524,7 @@
read_param.uid = i;
switch (codec->id) {
case SND_AUDIOCODEC_AMRWB:
+ case SND_AUDIOCODEC_PCM:
read_param.len = prtd->pcm_count
- COMPRE_CAPTURE_HEADER_SIZE;
read_param.paddr = (unsigned long)(buf[i].phys)
@@ -520,17 +535,28 @@
buf[i].data);
q6asm_async_read(prtd->audio_client, &read_param);
break;
- default:
+ case SND_AUDIOCODEC_PASS_THROUGH:
read_param.paddr = (unsigned long)(buf[i].phys);
q6asm_async_read_compressed(prtd->audio_client,
&read_param);
break;
+ default:
+ pr_err("Invalid format");
+ ret = -EINVAL;
+ break;
}
}
prtd->periods = runtime->periods;
prtd->enabled = 1;
+ if (compr->info.codec_param.codec.id ==
+ SND_AUDIOCODEC_PASS_THROUGH)
+ msm_pcm_routing_reg_psthr_stream(
+ soc_prtd->dai_link->be_id,
+ prtd->session_id, substream->stream,
+ 1);
+
return ret;
}
@@ -538,7 +564,6 @@
{
int ret = 0;
struct snd_pcm_runtime *runtime = substream->runtime;
- struct snd_soc_pcm_runtime *soc_prtd = substream->private_data;
struct compr_audio *compr = runtime->private_data;
struct msm_audio *prtd = &compr->prtd;
@@ -546,28 +571,7 @@
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
prtd->pcm_irq_pos = 0;
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- if (compr->info.codec_param.codec.id ==
- SND_AUDIOCODEC_AC3_PASS_THROUGH ||
- compr->info.codec_param.codec.id ==
- SND_AUDIOCODEC_DTS_PASS_THROUGH) {
- msm_pcm_routing_reg_psthr_stream(
- soc_prtd->dai_link->be_id,
- prtd->session_id, substream->stream,
- 1);
- }
- } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
- switch (compr->info.codec_param.codec.id) {
- case SND_AUDIOCODEC_AMRWB:
- break;
- default:
- msm_pcm_routing_reg_psthr_stream(
- soc_prtd->dai_link->be_id,
- prtd->session_id, substream->stream,
- 1);
- break;
- }
- }
+ /* intentional fall-through */
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
pr_debug("%s: Trigger start\n", __func__);
@@ -575,29 +579,6 @@
atomic_set(&prtd->start, 1);
break;
case SNDRV_PCM_TRIGGER_STOP:
- pr_debug("SNDRV_PCM_TRIGGER_STOP\n");
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- if (compr->info.codec_param.codec.id ==
- SND_AUDIOCODEC_AC3_PASS_THROUGH ||
- compr->info.codec_param.codec.id ==
- SND_AUDIOCODEC_DTS_PASS_THROUGH) {
- msm_pcm_routing_reg_psthr_stream(
- soc_prtd->dai_link->be_id,
- prtd->session_id, substream->stream,
- 0);
- }
- } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
- switch (compr->info.codec_param.codec.id) {
- case SND_AUDIOCODEC_AMRWB:
- break;
- default:
- msm_pcm_routing_reg_psthr_stream(
- soc_prtd->dai_link->be_id,
- prtd->session_id, substream->stream,
- 0);
- break;
- }
- }
atomic_set(&prtd->start, 0);
break;
case SNDRV_PCM_TRIGGER_SUSPEND:
@@ -619,7 +600,7 @@
{
pr_debug("%s\n", __func__);
/* MP3 Block */
- compr->info.compr_cap.num_codecs = 10;
+ compr->info.compr_cap.num_codecs = 12;
compr->info.compr_cap.min_fragment_size = runtime->hw.period_bytes_min;
compr->info.compr_cap.max_fragment_size = runtime->hw.period_bytes_max;
compr->info.compr_cap.min_fragments = runtime->hw.periods_min;
@@ -634,6 +615,8 @@
compr->info.compr_cap.codecs[7] = SND_AUDIOCODEC_DTS_PASS_THROUGH;
compr->info.compr_cap.codecs[8] = SND_AUDIOCODEC_AMRWB;
compr->info.compr_cap.codecs[9] = SND_AUDIOCODEC_AMRWBPLUS;
+ compr->info.compr_cap.codecs[10] = SND_AUDIOCODEC_PASS_THROUGH;
+ compr->info.compr_cap.codecs[11] = SND_AUDIOCODEC_PCM;
/* Add new codecs here and update num_codecs*/
}
@@ -752,11 +735,18 @@
compressed_audio.prtd = NULL;
q6asm_audio_client_buf_free_contiguous(dir,
prtd->audio_client);
- if (!(compr->info.codec_param.codec.id ==
- SND_AUDIOCODEC_AC3_PASS_THROUGH))
+ if ((compr->info.codec_param.codec.id !=
+ SND_AUDIOCODEC_AC3_PASS_THROUGH) &&
+ (compr->info.codec_param.codec.id !=
+ SND_AUDIOCODEC_DTS_PASS_THROUGH))
msm_pcm_routing_dereg_phy_stream(
soc_prtd->dai_link->be_id,
SNDRV_PCM_STREAM_PLAYBACK);
+ else
+ msm_pcm_routing_reg_psthr_stream(
+ soc_prtd->dai_link->be_id,
+ prtd->session_id, substream->stream,
+ 0);
q6asm_audio_client_free(prtd->audio_client);
kfree(prtd);
return 0;
@@ -775,8 +765,15 @@
q6asm_cmd(prtd->audio_client, CMD_CLOSE);
q6asm_audio_client_buf_free_contiguous(dir,
prtd->audio_client);
- msm_pcm_routing_dereg_phy_stream(soc_prtd->dai_link->be_id,
- SNDRV_PCM_STREAM_CAPTURE);
+ if (compr->info.codec_param.codec.id ==
+ SND_AUDIOCODEC_PASS_THROUGH)
+ msm_pcm_routing_reg_psthr_stream(
+ soc_prtd->dai_link->be_id,
+ prtd->session_id, substream->stream,
+ 0);
+ else
+ msm_pcm_routing_dereg_phy_stream(soc_prtd->dai_link->be_id,
+ SNDRV_PCM_STREAM_CAPTURE);
q6asm_audio_client_free(prtd->audio_client);
kfree(prtd);
@@ -908,12 +905,30 @@
prtd->audio_client->perf_mode,
prtd->session_id, substream->stream);
break;
- default:
+ case SND_AUDIOCODEC_PCM:
+ pr_debug("q6asm_open_read(FORMAT_PCM)\n");
+ ret = q6asm_open_read(prtd->audio_client,
+ FORMAT_MULTI_CHANNEL_LINEAR_PCM);
+ if (ret < 0) {
+ pr_err("%s: compressed Session open failed\n",
+ __func__);
+ return -ENOMEM;
+ }
+ pr_debug("msm_pcm_routing_reg_phy_stream\n");
+ msm_pcm_routing_reg_phy_stream(
+ soc_prtd->dai_link->be_id,
+ prtd->audio_client->perf_mode,
+ prtd->session_id, substream->stream);
+ break;
+ case SND_AUDIOCODEC_PASS_THROUGH:
pr_debug("q6asm_open_read_compressed(COMPRESSED_META_DATA_MODE)\n");
ret = q6asm_open_read_compressed(prtd->audio_client,
MAX_NUM_FRAMES_PER_BUFFER,
COMPRESSED_META_DATA_MODE);
break;
+ default:
+ pr_err("Invalid codec for compressed session open\n");
+ return -EFAULT;
}
if (ret < 0) {
@@ -1046,13 +1061,37 @@
pr_debug("SND_AUDIOCODEC_DTS_PASS_THROUGH\n");
compr->codec = FORMAT_DTS;
break;
- case SND_AUDIOCODEC_DTS:
+ case SND_AUDIOCODEC_DTS: {
+ char modelId[128];
+ struct snd_dec_dts opt_dts =
+ compr->info.codec_param.codec.options.dts;
+ int modelIdLength = opt_dts.modelIdLength;
pr_debug("SND_AUDIOCODEC_DTS\n");
+ if (copy_from_user(modelId, (void *)opt_dts.modelId,
+ modelIdLength))
+ pr_err("%s: ERROR: copy modelId\n", __func__);
+ modelId[modelIdLength] = '\0';
+ pr_debug("%s: Received modelId =%s,length=%d\n",
+ __func__, modelId, modelIdLength);
+ core_set_dts_model_id(modelIdLength, modelId);
compr->codec = FORMAT_DTS;
+ }
break;
- case SND_AUDIOCODEC_DTS_LBR:
- pr_debug("SND_AUDIOCODEC_DTS\n");
+ case SND_AUDIOCODEC_DTS_LBR:{
+ char modelId[128];
+ struct snd_dec_dts opt_dts =
+ compr->info.codec_param.codec.options.dts;
+ int modelIdLength = opt_dts.modelIdLength;
+ pr_debug("SND_AUDIOCODEC_DTS_LBR\n");
+ if (copy_from_user(modelId, (void *)opt_dts.modelId,
+ modelIdLength))
+ pr_err("%s: ERROR: copy modelId\n", __func__);
+ modelId[modelIdLength] = '\0';
+ pr_debug("%s: Received modelId =%s,length=%d\n",
+ __func__, modelId, modelIdLength);
+ core_set_dts_model_id(modelIdLength, modelId);
compr->codec = FORMAT_DTS_LBR;
+ }
break;
case SND_AUDIOCODEC_AMRWB:
pr_debug("msm_compr_ioctl SND_AUDIOCODEC_AMRWB\n");
@@ -1062,11 +1101,19 @@
pr_debug("msm_compr_ioctl SND_AUDIOCODEC_AMRWBPLUS\n");
compr->codec = FORMAT_AMR_WB_PLUS;
break;
- default:
- /*Needed for the HDMI IN compressed use case*/
- pr_debug("FORMAT_LINEAR_PCM\n");
- compr->codec = FORMAT_LINEAR_PCM;
+ case SND_AUDIOCODEC_PASS_THROUGH:
+ /* format pass through is used for HDMI IN compressed
+ where the decoder format is indicated by LPASS */
+ pr_debug("msm_compr_ioctl SND_AUDIOCODEC_PASSTHROUGH\n");
+ compr->codec = FORMAT_PASS_THROUGH;
break;
+ case SND_AUDIOCODEC_PCM:
+ pr_debug("msm_compr_ioctl SND_AUDIOCODEC_PCM\n");
+ compr->codec = FORMAT_MULTI_CHANNEL_LINEAR_PCM;
+ break;
+ default:
+ pr_err("msm_compr_ioctl failed..unknown codec\n");
+ return -EFAULT;
}
return 0;
case SNDRV_PCM_IOCTL1_RESET:
diff --git a/sound/soc/msm/msm-pcm-routing.c b/sound/soc/msm/msm-pcm-routing.c
index 5180b10..4d0caa3 100644
--- a/sound/soc/msm/msm-pcm-routing.c
+++ b/sound/soc/msm/msm-pcm-routing.c
@@ -74,6 +74,9 @@
static const DECLARE_TLV_DB_LINEAR(compressed_rx_vol_gain, 0,
INT_RX_VOL_MAX_STEPS);
+static int msm_route_compressed2_vol_control;
+static const DECLARE_TLV_DB_LINEAR(compressed2_rx_vol_gain, 0,
+ INT_RX_VOL_MAX_STEPS);
static int msm_route_ec_ref_rx;
/* Equal to Frontend after last of the MULTIMEDIA SESSIONS */
@@ -869,6 +872,22 @@
return 0;
}
+static int msm_routing_get_compressed2_vol_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ ucontrol->value.integer.value[0] = msm_route_compressed2_vol_control;
+ return 0;
+}
+
+static int msm_routing_set_compressed2_vol_mixer(struct snd_kcontrol *kcontrol,
+ struct snd_ctl_elem_value *ucontrol)
+{
+ if (!compressed_set_volume(ucontrol->value.integer.value[0]))
+ msm_route_compressed2_vol_control =
+ ucontrol->value.integer.value[0];
+ return 0;
+}
+
static int msm_routing_get_srs_trumedia_control(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
@@ -1433,6 +1452,9 @@
SOC_SINGLE_EXT("INTERNAL_BT_SCO_TX", MSM_BACKEND_DAI_INT_BT_SCO_TX,
MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
msm_routing_put_audio_mixer),
+ SOC_SINGLE_EXT("AUX_PCM_TX", MSM_BACKEND_DAI_AUXPCM_TX,
+ MSM_FRONTEND_DAI_MULTIMEDIA5, 1, 0, msm_routing_get_audio_mixer,
+ msm_routing_put_audio_mixer),
};
@@ -1458,6 +1480,9 @@
SOC_SINGLE_EXT("SGLTE", MSM_BACKEND_DAI_PRI_I2S_RX,
MSM_FRONTEND_DAI_SGLTE, 1, 0, msm_routing_get_voice_mixer,
msm_routing_put_voice_mixer),
+ SOC_SINGLE_EXT("Voice Stub", MSM_BACKEND_DAI_PRI_I2S_RX,
+ MSM_FRONTEND_DAI_VOICE_STUB, 1, 0, msm_routing_get_voice_stub_mixer,
+ msm_routing_put_voice_stub_mixer),
};
static const struct snd_kcontrol_new sec_i2s_rx_voice_mixer_controls[] = {
@@ -1721,6 +1746,12 @@
SOC_SINGLE_EXT("SLIM_3_TX", MSM_BACKEND_DAI_SLIMBUS_3_TX,
MSM_FRONTEND_DAI_VOICE_STUB, 1, 0, msm_routing_get_voice_stub_mixer,
msm_routing_put_voice_stub_mixer),
+ SOC_SINGLE_EXT("PRIMARY_I2S_TX", MSM_BACKEND_DAI_PRI_I2S_TX,
+ MSM_FRONTEND_DAI_VOICE_STUB, 1, 0, msm_routing_get_voice_stub_mixer,
+ msm_routing_put_voice_stub_mixer),
+ SOC_SINGLE_EXT("AFE_PCM_TX", MSM_BACKEND_DAI_AFE_PCM_TX,
+ MSM_FRONTEND_DAI_VOICE_STUB, 1, 0, msm_routing_get_voice_stub_mixer,
+ msm_routing_put_voice_stub_mixer),
};
static const struct snd_kcontrol_new sbus_0_rx_port_mixer_controls[] = {
@@ -1751,6 +1782,9 @@
SOC_SINGLE_EXT("INTERNAL_BT_SCO_TX", MSM_BACKEND_DAI_SLIMBUS_1_RX,
MSM_BACKEND_DAI_INT_BT_SCO_TX, 1, 0, msm_routing_get_port_mixer,
msm_routing_put_port_mixer),
+ SOC_SINGLE_EXT("AFE_PCM_TX", MSM_BACKEND_DAI_SLIMBUS_1_RX,
+ MSM_BACKEND_DAI_AFE_PCM_TX, 1, 0, msm_routing_get_port_mixer,
+ msm_routing_put_port_mixer),
};
static const struct snd_kcontrol_new sbus_3_rx_port_mixer_controls[] = {
@@ -1760,6 +1794,9 @@
SOC_SINGLE_EXT("MI2S_TX", MSM_BACKEND_DAI_SLIMBUS_3_RX,
MSM_BACKEND_DAI_MI2S_TX, 1, 0, msm_routing_get_port_mixer,
msm_routing_put_port_mixer),
+ SOC_SINGLE_EXT("AFE_PCM_RX", MSM_BACKEND_DAI_SLIMBUS_3_RX,
+ MSM_BACKEND_DAI_AFE_PCM_RX, 1, 0, msm_routing_get_port_mixer,
+ msm_routing_put_port_mixer),
};
static const struct snd_kcontrol_new bt_sco_rx_port_mixer_controls[] = {
SOC_SINGLE_EXT("SLIM_1_TX", MSM_BACKEND_DAI_INT_BT_SCO_RX,
@@ -1771,6 +1808,9 @@
SOC_SINGLE_EXT("INTERNAL_FM_TX", MSM_BACKEND_DAI_AFE_PCM_RX,
MSM_BACKEND_DAI_INT_FM_TX, 1, 0, msm_routing_get_port_mixer,
msm_routing_put_port_mixer),
+ SOC_SINGLE_EXT("SLIM_1_TX", MSM_BACKEND_DAI_AFE_PCM_RX,
+ MSM_BACKEND_DAI_SLIMBUS_1_TX, 1, 0, msm_routing_get_port_mixer,
+ msm_routing_put_port_mixer),
};
@@ -1783,6 +1823,13 @@
msm_routing_put_port_mixer),
};
+static const struct snd_kcontrol_new pri_i2s_rx_port_mixer_controls[] = {
+ SOC_SINGLE_EXT("MI2S_TX", MSM_BACKEND_DAI_PRI_I2S_RX,
+ MSM_BACKEND_DAI_MI2S_TX, 1, 0, msm_routing_get_port_mixer,
+ msm_routing_put_port_mixer),
+
+};
+
static const struct snd_kcontrol_new sec_i2s_rx_port_mixer_controls[] = {
SOC_SINGLE_EXT("MI2S_TX", MSM_BACKEND_DAI_SEC_I2S_RX,
MSM_BACKEND_DAI_MI2S_TX, 1, 0, msm_routing_get_port_mixer,
@@ -1793,6 +1840,9 @@
SOC_SINGLE_EXT("SLIM_1_TX", MSM_BACKEND_DAI_MI2S_RX,
MSM_BACKEND_DAI_SLIMBUS_1_TX, 1, 0, msm_routing_get_port_mixer,
msm_routing_put_port_mixer),
+ SOC_SINGLE_EXT("PRIMARY_I2S_TX", MSM_BACKEND_DAI_MI2S_RX,
+ MSM_BACKEND_DAI_PRI_I2S_TX, 1, 0, msm_routing_get_port_mixer,
+ msm_routing_put_port_mixer),
};
static const struct snd_kcontrol_new fm_switch_mixer_controls =
@@ -1835,6 +1885,12 @@
msm_routing_set_compressed_vol_mixer, compressed_rx_vol_gain),
};
+static const struct snd_kcontrol_new compressed2_vol_mixer_controls[] = {
+ SOC_SINGLE_EXT_TLV("COMPRESSED2 RX Volume", SND_SOC_NOPM, 0,
+ INT_RX_VOL_GAIN, 0, msm_routing_get_compressed2_vol_mixer,
+ msm_routing_set_compressed2_vol_mixer, compressed2_rx_vol_gain),
+};
+
static const struct snd_kcontrol_new lpa_SRS_trumedia_controls[] = {
{.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "SRS TruMedia",
@@ -2279,6 +2335,9 @@
SND_SOC_DAPM_MIXER("HDMI_RX Port Mixer",
SND_SOC_NOPM, 0, 0, hdmi_rx_port_mixer_controls,
ARRAY_SIZE(hdmi_rx_port_mixer_controls)),
+ SND_SOC_DAPM_MIXER("PRI_I2S_RX Port Mixer",
+ SND_SOC_NOPM, 0, 0, pri_i2s_rx_port_mixer_controls,
+ ARRAY_SIZE(pri_i2s_rx_port_mixer_controls)),
SND_SOC_DAPM_MIXER("SEC_I2S_RX Port Mixer",
SND_SOC_NOPM, 0, 0, sec_i2s_rx_port_mixer_controls,
ARRAY_SIZE(sec_i2s_rx_port_mixer_controls)),
@@ -2361,6 +2420,7 @@
{"MultiMedia4 Mixer", "SLIM_0_TX", "SLIMBUS_0_TX"},
{"MultiMedia1 Mixer", "SLIM_0_TX", "SLIMBUS_0_TX"},
{"MultiMedia1 Mixer", "AUX_PCM_UL_TX", "AUX_PCM_TX"},
+ {"MultiMedia5 Mixer", "AUX_PCM_TX", "AUX_PCM_TX"},
{"MultiMedia1 Mixer", "SEC_AUX_PCM_UL_TX", "SEC_AUX_PCM_TX"},
{"INTERNAL_BT_SCO_RX Audio Mixer", "MultiMedia1", "MM_DL1"},
@@ -2412,6 +2472,7 @@
{"PRI_RX_Voice Mixer", "VoLTE", "VoLTE_DL"},
{"PRI_RX_Voice Mixer", "SGLTE", "SGLTE_DL"},
{"PRI_RX_Voice Mixer", "Voip", "VOIP_DL"},
+ {"PRI_RX_Voice Mixer", "Voice Stub", "VOICE_STUB_DL"},
{"PRI_I2S_RX", NULL, "PRI_RX_Voice Mixer"},
{"SEC_RX_Voice Mixer", "CSVoice", "CS-VOICE_DL1"},
@@ -2506,6 +2567,7 @@
{"SLIMBUS_0_RX Port Mixer", "MI2S_TX", "MI2S_TX"},
{"SLIMBUS_0_RX", NULL, "SLIMBUS_0_RX Port Mixer"},
{"AFE_PCM_RX Port Mixer", "INTERNAL_FM_TX", "INT_FM_TX"},
+ {"AFE_PCM_RX Port Mixer", "SLIM_1_TX", "SLIMBUS_1_TX"},
{"PCM_RX", NULL, "AFE_PCM_RX Port Mixer"},
{"AUXPCM_RX Port Mixer", "AUX_PCM_UL_TX", "AUX_PCM_TX"},
@@ -2518,6 +2580,8 @@
{"Voice Stub Tx Mixer", "STUB_1_TX_HL", "STUB_1_TX"},
{"Voice Stub Tx Mixer", "MI2S_TX", "MI2S_TX"},
{"Voice Stub Tx Mixer", "SLIM_3_TX", "SLIMBUS_3_TX"},
+ {"Voice Stub Tx Mixer", "PRIMARY_I2S_TX", "PRI_I2S_TX"},
+ {"Voice Stub Tx Mixer", "AFE_PCM_TX", "PCM_TX"},
{"VOICE_STUB_UL", NULL, "Voice Stub Tx Mixer"},
{"STUB_RX Mixer", "Voice Stub", "VOICE_STUB_DL"},
@@ -2528,16 +2592,19 @@
{"MI2S_RX_Voice Mixer", "Voice Stub", "VOICE_STUB_DL"},
{"MI2S_RX", NULL, "MI2S_RX_Voice Mixer"},
{"HDMI_RX_Voice Mixer", "Voice Stub", "VOICE_STUB_DL"},
+ {"AFE_PCM_RX_Voice Mixer", "Voice Stub", "VOICE_STUB_DL"},
{"SLIMBUS_3_RX_Voice Mixer", "Voice Stub", "VOICE_STUB_DL"},
{"SLIMBUS_3_RX", NULL, "SLIMBUS_3_RX_Voice Mixer"},
{"SLIMBUS_1_RX Port Mixer", "INTERNAL_BT_SCO_TX", "INT_BT_SCO_TX"},
+ {"SLIMBUS_1_RX Port Mixer", "AFE_PCM_TX", "PCM_TX"},
{"SLIMBUS_1_RX", NULL, "SLIMBUS_1_RX Port Mixer"},
{"INTERNAL_BT_SCO_RX Port Mixer", "SLIM_1_TX", "SLIMBUS_1_TX"},
{"INT_BT_SCO_RX", NULL, "INTERNAL_BT_SCO_RX Port Mixer"},
{"SLIMBUS_3_RX Port Mixer", "INTERNAL_BT_SCO_RX", "INT_BT_SCO_RX"},
{"SLIMBUS_3_RX Port Mixer", "MI2S_TX", "MI2S_TX"},
+ {"SLIMBUS_3_RX Port Mixer", "AFE_PCM_RX", "PCM_RX"},
{"SLIMBUS_3_RX", NULL, "SLIMBUS_3_RX Port Mixer"},
@@ -2548,7 +2615,12 @@
{"SEC_I2S_RX Port Mixer", "MI2S_TX", "MI2S_TX"},
{"SEC_I2S_RX", NULL, "SEC_I2S_RX Port Mixer"},
+ {"PRI_I2S_RX Port Mixer", "MI2S_TX", "MI2S_TX"},
+ {"PRI_I2S_RX", NULL, "PRI_I2S_RX Port Mixer"},
+
+
{"MI2S_RX Port Mixer", "SLIM_1_TX", "SLIMBUS_1_TX"},
+ {"MI2S_RX Port Mixer", "PRIMARY_I2S_TX", "PRI_I2S_TX"},
{"MI2S_RX", NULL, "MI2S_RX Port Mixer"},
/* Backend Enablement */
@@ -2776,6 +2848,9 @@
snd_soc_add_platform_controls(platform,
compressed_vol_mixer_controls,
ARRAY_SIZE(compressed_vol_mixer_controls));
+ snd_soc_add_platform_controls(platform,
+ compressed2_vol_mixer_controls,
+ ARRAY_SIZE(compressed2_vol_mixer_controls));
snd_soc_add_platform_controls(platform,
lpa_SRS_trumedia_controls,
diff --git a/sound/soc/msm/msm8930.c b/sound/soc/msm/msm8930.c
index c8d4b02..4725e8e 100644
--- a/sound/soc/msm/msm8930.c
+++ b/sound/soc/msm/msm8930.c
@@ -66,6 +66,7 @@
static struct snd_soc_jack hs_jack;
static struct snd_soc_jack button_jack;
+static atomic_t auxpcm_rsc_ref;
static int msm8930_enable_codec_ext_clk(
struct snd_soc_codec *codec, int enable,
@@ -860,8 +861,10 @@
{
int ret = 0;
- pr_debug("%s(): substream = %s\n", __func__, substream->name);
- ret = msm8930_aux_pcm_get_gpios();
+ pr_debug("%s(): substream = %s, auxpcm_rsc_ref counter = %d\n",
+ __func__, substream->name, atomic_read(&auxpcm_rsc_ref));
+ if (atomic_inc_return(&auxpcm_rsc_ref) == 1)
+ ret = msm8930_aux_pcm_get_gpios();
if (ret < 0) {
pr_err("%s: Aux PCM GPIO request failed\n", __func__);
return -EINVAL;
@@ -872,8 +875,10 @@
static void msm8930_auxpcm_shutdown(struct snd_pcm_substream *substream)
{
- pr_debug("%s(): substream = %s\n", __func__, substream->name);
- msm8930_aux_pcm_free_gpios();
+ pr_debug("%s(): substream = %s, auxpcm_rsc_ref counter = %d\n",
+ __func__, substream->name, atomic_read(&auxpcm_rsc_ref));
+ if (atomic_dec_return(&auxpcm_rsc_ref) == 0)
+ msm8930_aux_pcm_free_gpios();
}
static void msm8930_shutdown(struct snd_pcm_substream *substream)
@@ -1229,6 +1234,7 @@
.no_pcm = 1,
.be_id = MSM_BACKEND_DAI_AUXPCM_TX,
.be_hw_params_fixup = msm8930_auxpcm_be_params_fixup,
+ .ops = &msm8930_auxpcm_be_ops,
},
/* Incall Music BACK END DAI Link */
{
@@ -1336,6 +1342,7 @@
} else
msm8930_headset_gpios_configured = 1;
+ atomic_set(&auxpcm_rsc_ref, 0);
return ret;
}
diff --git a/sound/soc/msm/msm8960.c b/sound/soc/msm/msm8960.c
index 6bd6adc..59d118e 100644
--- a/sound/soc/msm/msm8960.c
+++ b/sound/soc/msm/msm8960.c
@@ -83,6 +83,7 @@
static struct snd_soc_jack hs_jack;
static struct snd_soc_jack button_jack;
+static atomic_t auxpcm_rsc_ref;
static bool hs_detect_use_gpio;
module_param(hs_detect_use_gpio, bool, 0444);
@@ -1131,8 +1132,11 @@
{
int ret = 0;
- pr_debug("%s(): substream = %s\n", __func__, substream->name);
- ret = msm8960_aux_pcm_get_gpios();
+ pr_debug("%s(): substream = %s, auxpcm_rsc_ref counter = %d\n",
+ __func__, substream->name, atomic_read(&auxpcm_rsc_ref));
+ if (atomic_inc_return(&auxpcm_rsc_ref) == 1)
+ ret = msm8960_aux_pcm_get_gpios();
+
if (ret < 0) {
pr_err("%s: Aux PCM GPIO request failed\n", __func__);
return -EINVAL;
@@ -1142,9 +1146,10 @@
static void msm8960_auxpcm_shutdown(struct snd_pcm_substream *substream)
{
-
- pr_debug("%s(): substream = %s\n", __func__, substream->name);
- msm8960_aux_pcm_free_gpios();
+ pr_debug("%s(): substream = %s, auxpcm_rsc_ref counter = %d\n",
+ __func__, substream->name, atomic_read(&auxpcm_rsc_ref));
+ if (atomic_dec_return(&auxpcm_rsc_ref) == 0)
+ msm8960_aux_pcm_free_gpios();
}
static void msm8960_shutdown(struct snd_pcm_substream *substream)
@@ -1372,6 +1377,48 @@
.ignore_pmdown_time = 1,
.be_id = MSM_FRONTEND_DAI_MULTIMEDIA5,
},
+ {
+ .name = "MSM8960 Media6",
+ .stream_name = "MultiMedia6",
+ .cpu_dai_name = "MultiMedia6",
+ .platform_name = "msm-multi-ch-pcm-dsp",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST},
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1, /* this dailink has playback support */
+ .be_id = MSM_FRONTEND_DAI_MULTIMEDIA6
+ },
+ {
+ .name = "MSM8960 Compr2",
+ .stream_name = "COMPR2",
+ .cpu_dai_name = "MultiMedia7",
+ .platform_name = "msm-compr-dsp",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST},
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1, /* this dailink has playback support */
+ .be_id = MSM_FRONTEND_DAI_MULTIMEDIA7,
+ },
+ {
+ .name = "MSM8960 Compr3",
+ .stream_name = "COMPR3",
+ .cpu_dai_name = "MultiMedia8",
+ .platform_name = "msm-compr-dsp",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST},
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .ignore_suspend = 1,
+ .ignore_pmdown_time = 1, /* this dailink has playback support */
+ .be_id = MSM_FRONTEND_DAI_MULTIMEDIA8,
+ },
/* Backend BT/FM DAI Links */
{
.name = LPASS_BE_INT_BT_SCO_RX,
@@ -1480,6 +1527,7 @@
.no_pcm = 1,
.be_id = MSM_BACKEND_DAI_AUXPCM_TX,
.be_hw_params_fixup = msm8960_auxpcm_be_params_fixup,
+ .ops = &msm8960_auxpcm_be_ops,
},
/* Incall Music BACK END DAI Link */
{
@@ -1777,7 +1825,7 @@
}
mutex_init(&cdc_mclk_mutex);
-
+ atomic_set(&auxpcm_rsc_ref, 0);
return ret;
}
diff --git a/sound/soc/msm/msm8974.c b/sound/soc/msm/msm8974.c
index c7820dd..f462299 100644
--- a/sound/soc/msm/msm8974.c
+++ b/sound/soc/msm/msm8974.c
@@ -81,6 +81,7 @@
static int msm_slim_0_tx_ch = 1;
static int msm_btsco_rate = BTSCO_RATE_8KHZ;
+static int msm_btsco_ch = 1;
static struct snd_soc_jack hs_jack;
static struct snd_soc_jack button_jack;
@@ -88,6 +89,7 @@
static struct mutex cdc_mclk_mutex;
static struct q_clkdiv *codec_clk;
static int clk_users;
+static atomic_t auxpcm_rsc_ref;
static void msm_enable_ext_spk_amp_gpio(u32 spk_amp_gpio)
{
@@ -479,6 +481,21 @@
msm_btsco_rate_get, msm_btsco_rate_put),
};
+static int msm_btsco_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+
+ struct snd_interval *channels = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_CHANNELS);
+
+ rate->min = rate->max = msm_btsco_rate;
+ channels->min = channels->max = msm_btsco_ch;
+
+ return 0;
+}
+
static int msm_auxpcm_be_params_fixup(struct snd_soc_pcm_runtime *rtd,
struct snd_pcm_hw_params *params)
{
@@ -494,6 +511,19 @@
return 0;
}
+
+static int msm_proxy_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_interval *rate = hw_param_interval(params,
+ SNDRV_PCM_HW_PARAM_RATE);
+
+ pr_debug("%s()\n", __func__);
+ rate->min = rate->max = 48000;
+
+ return 0;
+}
+
static int msm_aux_pcm_get_gpios(void)
{
int ret = 0;
@@ -553,8 +583,10 @@
{
int ret = 0;
- pr_debug("%s(): substream = %s\n", __func__, substream->name);
- ret = msm_aux_pcm_get_gpios();
+ pr_debug("%s(): substream = %s, auxpcm_rsc_ref counter = %d\n",
+ __func__, substream->name, atomic_read(&auxpcm_rsc_ref));
+ if (atomic_inc_return(&auxpcm_rsc_ref) == 1)
+ ret = msm_aux_pcm_get_gpios();
if (ret < 0) {
pr_err("%s: Aux PCM GPIO request failed\n", __func__);
return -EINVAL;
@@ -565,8 +597,10 @@
static void msm_auxpcm_shutdown(struct snd_pcm_substream *substream)
{
- pr_debug("%s(): substream = %s\n", __func__, substream->name);
- msm_aux_pcm_free_gpios();
+ pr_debug("%s(): substream = %s, auxpcm_rsc_ref counter = %d\n",
+ __func__, substream->name, atomic_read(&auxpcm_rsc_ref));
+ if (atomic_dec_return(&auxpcm_rsc_ref) == 0)
+ msm_aux_pcm_free_gpios();
}
static struct snd_soc_ops msm_auxpcm_be_ops = {
.startup = msm_auxpcm_startup,
@@ -775,19 +809,19 @@
.be_id = MSM_FRONTEND_DAI_MULTIMEDIA1
},
{
- .name = "MSM VoIP",
- .stream_name = "VoIP",
- .cpu_dai_name = "VoIP",
- .platform_name = "msm-voip-dsp",
+ .name = "MSM8974 Media2",
+ .stream_name = "MultiMedia2",
+ .cpu_dai_name = "MultiMedia2",
+ .platform_name = "msm-pcm-dsp",
.dynamic = 1,
- .trigger = {SND_SOC_DPCM_TRIGGER_POST,
- SND_SOC_DPCM_TRIGGER_POST},
.codec_dai_name = "snd-soc-dummy-dai",
.codec_name = "snd-soc-dummy",
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST},
.ignore_suspend = 1,
/* this dainlink has playback support */
.ignore_pmdown_time = 1,
- .be_id = MSM_FRONTEND_DAI_VOIP,
+ .be_id = MSM_FRONTEND_DAI_MULTIMEDIA2,
},
{
.name = "Circuit-Switch Voice",
@@ -806,6 +840,21 @@
.be_id = MSM_FRONTEND_DAI_CS_VOICE,
},
{
+ .name = "MSM VoIP",
+ .stream_name = "VoIP",
+ .cpu_dai_name = "VoIP",
+ .platform_name = "msm-voip-dsp",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST},
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ .ignore_suspend = 1,
+ /* this dainlink has playback support */
+ .ignore_pmdown_time = 1,
+ .be_id = MSM_FRONTEND_DAI_VOIP,
+ },
+ {
.name = "MSM8974 LPA",
.stream_name = "LPA",
.cpu_dai_name = "MultiMedia3",
@@ -836,6 +885,41 @@
.codec_name = "snd-soc-dummy",
},
{
+ .name = "INT_FM Hostless",
+ .stream_name = "INT_FM Hostless",
+ .cpu_dai_name = "INT_FM_HOSTLESS",
+ .platform_name = "msm-pcm-hostless",
+ .dynamic = 1,
+ .trigger = {SND_SOC_DPCM_TRIGGER_POST,
+ SND_SOC_DPCM_TRIGGER_POST},
+ .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
+ .ignore_suspend = 1,
+ /* this dainlink has playback support */
+ .ignore_pmdown_time = 1,
+ .codec_dai_name = "snd-soc-dummy-dai",
+ .codec_name = "snd-soc-dummy",
+ },
+ {
+ .name = "MSM AFE-PCM RX",
+ .stream_name = "AFE-PROXY RX",
+ .cpu_dai_name = "msm-dai-q6-dev.241",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-rx",
+ .platform_name = "msm-pcm-afe",
+ .ignore_suspend = 1,
+ /* this dainlink has playback support */
+ .ignore_pmdown_time = 1,
+ },
+ {
+ .name = "MSM AFE-PCM TX",
+ .stream_name = "AFE-PROXY TX",
+ .cpu_dai_name = "msm-dai-q6-dev.240",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-tx",
+ .platform_name = "msm-pcm-afe",
+ .ignore_suspend = 1,
+ },
+ {
.name = "MSM8974 Compr",
.stream_name = "COMPR",
.cpu_dai_name = "MultiMedia4",
@@ -865,7 +949,56 @@
.codec_dai_name = "snd-soc-dummy-dai",
.codec_name = "snd-soc-dummy",
},
-
+ /* Backend BT/FM DAI Links */
+ {
+ .name = LPASS_BE_INT_BT_SCO_RX,
+ .stream_name = "Internal BT-SCO Playback",
+ .cpu_dai_name = "msm-dai-q6-dev.12288",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-rx",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_INT_BT_SCO_RX,
+ .be_hw_params_fixup = msm_btsco_be_hw_params_fixup,
+ /* this dainlink has playback support */
+ .ignore_pmdown_time = 1,
+ },
+ {
+ .name = LPASS_BE_INT_BT_SCO_TX,
+ .stream_name = "Internal BT-SCO Capture",
+ .cpu_dai_name = "msm-dai-q6-dev.12289",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-tx",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_INT_BT_SCO_TX,
+ .be_hw_params_fixup = msm_btsco_be_hw_params_fixup,
+ },
+ /* Backend AFE DAI Links */
+ {
+ .name = LPASS_BE_AFE_PCM_RX,
+ .stream_name = "AFE Playback",
+ .cpu_dai_name = "msm-dai-q6-dev.224",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-rx",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_AFE_PCM_RX,
+ .be_hw_params_fixup = msm_proxy_be_hw_params_fixup,
+ /* this dainlink has playback support */
+ .ignore_pmdown_time = 1,
+ },
+ {
+ .name = LPASS_BE_AFE_PCM_TX,
+ .stream_name = "AFE Capture",
+ .cpu_dai_name = "msm-dai-q6-dev.225",
+ .platform_name = "msm-pcm-routing",
+ .codec_name = "msm-stub-codec.1",
+ .codec_dai_name = "msm-stub-tx",
+ .no_pcm = 1,
+ .be_id = MSM_BACKEND_DAI_AFE_PCM_TX,
+ .be_hw_params_fixup = msm_proxy_be_hw_params_fixup,
+ },
/* AUX PCM Backend DAI Links */
{
.name = LPASS_BE_AUXPCM_RX,
@@ -891,6 +1024,7 @@
.no_pcm = 1,
.be_id = MSM_BACKEND_DAI_AUXPCM_TX,
.be_hw_params_fixup = msm_auxpcm_be_params_fixup,
+ .ops = &msm_auxpcm_be_ops,
},
/* Backend DAI Links */
{
@@ -1028,6 +1162,8 @@
goto err;
}
mutex_init(&cdc_mclk_mutex);
+ atomic_set(&auxpcm_rsc_ref, 0);
+
return 0;
err:
devm_kfree(&pdev->dev, pdata);
diff --git a/sound/soc/msm/qdsp6/q6asm.c b/sound/soc/msm/qdsp6/q6asm.c
index 3a226b4..6865871 100644
--- a/sound/soc/msm/qdsp6/q6asm.c
+++ b/sound/soc/msm/qdsp6/q6asm.c
@@ -529,7 +529,7 @@
}
buf[cnt].handle = ion_alloc
(buf[cnt].client, bufsz, SZ_4K,
- (0x1 << ION_AUDIO_HEAP_ID));
+ (0x1 << ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL((void *)
buf[cnt].handle)) {
pr_err("%s: ION memory allocation for AUDIO failed\n",
@@ -551,8 +551,7 @@
}
buf[cnt].data = ion_map_kernel
- (buf[cnt].client, buf[cnt].handle,
- 0);
+ (buf[cnt].client, buf[cnt].handle);
if (IS_ERR_OR_NULL((void *)
buf[cnt].data)) {
pr_err("%s: ION memory mapping for AUDIO failed\n",
@@ -665,7 +664,7 @@
goto fail;
}
buf[0].handle = ion_alloc(buf[0].client, bufsz * bufcnt, SZ_4K,
- (0x1 << ION_AUDIO_HEAP_ID));
+ (0x1 << ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL((void *) buf[0].handle)) {
pr_err("%s: ION memory allocation for AUDIO failed\n",
__func__);
@@ -682,7 +681,7 @@
goto fail;
}
- buf[0].data = ion_map_kernel(buf[0].client, buf[0].handle, 0);
+ buf[0].data = ion_map_kernel(buf[0].client, buf[0].handle);
if (IS_ERR_OR_NULL((void *) buf[0].data)) {
pr_err("%s: ION memory mapping for AUDIO failed\n", __func__);
mutex_unlock(&ac->cmd_lock);
@@ -799,6 +798,25 @@
return 0;
}
+static int32_t is_no_wait_cmd_rsp(uint32_t opcode, uint32_t *cmd_type)
+{
+ if (opcode == APR_BASIC_RSP_RESULT) {
+ if (cmd_type != NULL) {
+ switch (cmd_type[0]) {
+ case ASM_SESSION_CMD_RUN:
+ case ASM_SESSION_CMD_PAUSE:
+ case ASM_DATA_CMD_EOS:
+ return 1;
+ default:
+ break;
+ }
+ } else
+ pr_err("%s: null pointer!", __func__);
+ } else if (opcode == ASM_DATA_CMDRSP_EOS)
+ return 1;
+
+ return 0;
+}
static int32_t q6asm_callback(struct apr_client_data *data, void *priv)
{
@@ -819,14 +837,16 @@
ac->session);
return -EINVAL;
}
- if (atomic_read(&ac->nowait_cmd_cnt) > 0) {
+
+ payload = data->payload;
+ if ((atomic_read(&ac->nowait_cmd_cnt) > 0) &&
+ is_no_wait_cmd_rsp(data->opcode, payload)) {
pr_debug("%s: nowait_cmd_cnt %d\n",
__func__,
atomic_read(&ac->nowait_cmd_cnt));
atomic_dec(&ac->nowait_cmd_cnt);
wakeup_flag = 0;
}
- payload = data->payload;
if (data->opcode == RESET_EVENTS) {
pr_debug("q6asm_callback: Reset event is received: %d %d apr[%p]\n",
@@ -876,8 +896,9 @@
case ASM_STREAM_CMD_OPEN_READ_COMPRESSED:
if (atomic_read(&ac->cmd_state) && wakeup_flag) {
atomic_set(&ac->cmd_state, 0);
- if (payload[1] == ADSP_EUNSUPPORTED) {
- pr_debug("paload[1]:%d unsupported",
+ if (payload[1] == ADSP_EUNSUPPORTED ||
+ payload[1] == ADSP_EFAILED) {
+ pr_debug("payload[1]:%d unsupported",
payload[1]);
atomic_set(&ac->cmd_response, 1);
}
diff --git a/sound/soc/msm/qdsp6/q6voice.c b/sound/soc/msm/qdsp6/q6voice.c
index 2a21dfa..cb2e39b 100644
--- a/sound/soc/msm/qdsp6/q6voice.c
+++ b/sound/soc/msm/qdsp6/q6voice.c
@@ -4061,7 +4061,7 @@
common.ion_handle = ion_alloc(common.ion_client,
TOTAL_VOICE_CAL_SIZE,
- SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID));
+ SZ_4K, ION_HEAP(ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL((void *) common.ion_handle)) {
pr_err("%s: ION memory allocation failed\n",
__func__);
@@ -4076,8 +4076,7 @@
goto err_ion_handle;
}
- kvptr = ion_map_kernel(common.ion_client,
- common.ion_handle, 0);
+ kvptr = ion_map_kernel(common.ion_client, common.ion_handle);
if (IS_ERR_OR_NULL(kvptr)) {
pr_err("%s: ION memory mapping failed\n", __func__);
goto err_ion_handle;
diff --git a/sound/soc/msm/qdsp6v2/msm-compr-q6-v2.c b/sound/soc/msm/qdsp6v2/msm-compr-q6-v2.c
index 6f3249a..bbd43f7 100644
--- a/sound/soc/msm/qdsp6v2/msm-compr-q6-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-compr-q6-v2.c
@@ -25,13 +25,25 @@
#include <sound/pcm.h>
#include <sound/initval.h>
#include <sound/control.h>
+#include <sound/q6asm-v2.h>
+#include <sound/pcm_params.h>
#include <asm/dma.h>
#include <linux/dma-mapping.h>
#include <linux/android_pmem.h>
+#include <sound/timer.h>
#include "msm-compr-q6-v2.h"
#include "msm-pcm-routing-v2.h"
+#define COMPRE_CAPTURE_NUM_PERIODS 16
+/* Allocate the worst case frame size for compressed audio */
+#define COMPRE_CAPTURE_HEADER_SIZE (sizeof(struct snd_compr_audio_info))
+#define COMPRE_CAPTURE_MAX_FRAME_SIZE (6144)
+#define COMPRE_CAPTURE_PERIOD_SIZE ((COMPRE_CAPTURE_MAX_FRAME_SIZE + \
+ COMPRE_CAPTURE_HEADER_SIZE) * \
+ MAX_NUM_FRAMES_PER_BUFFER)
+#define COMPRE_OUTPUT_METADATA_SIZE (sizeof(struct output_meta_data_st))
+
struct snd_msm {
struct msm_audio *prtd;
unsigned volume;
@@ -40,7 +52,7 @@
static struct audio_locks the_locks;
-static struct snd_pcm_hardware msm_compr_hardware_playback = {
+static struct snd_pcm_hardware msm_compr_hardware_capture = {
.info = (SNDRV_PCM_INFO_MMAP |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP_VALID |
@@ -51,12 +63,33 @@
.rate_min = 8000,
.rate_max = 48000,
.channels_min = 1,
- .channels_max = 2,
+ .channels_max = 8,
+ .buffer_bytes_max =
+ COMPRE_CAPTURE_PERIOD_SIZE * COMPRE_CAPTURE_NUM_PERIODS ,
+ .period_bytes_min = COMPRE_CAPTURE_PERIOD_SIZE,
+ .period_bytes_max = COMPRE_CAPTURE_PERIOD_SIZE,
+ .periods_min = COMPRE_CAPTURE_NUM_PERIODS,
+ .periods_max = COMPRE_CAPTURE_NUM_PERIODS,
+ .fifo_size = 0,
+};
+
+static struct snd_pcm_hardware msm_compr_hardware_playback = {
+ .info = (SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .rates = SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_KNOT,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ .channels_min = 1,
+ .channels_max = 8,
.buffer_bytes_max = 1200 * 1024 * 2,
- .period_bytes_min = 4800,
+ .period_bytes_min = 2400,
.period_bytes_max = 1200 * 1024,
.periods_min = 2,
- .periods_max = 512,
+ .periods_max = 1024,
.fifo_size = 0,
};
@@ -79,8 +112,13 @@
struct snd_pcm_substream *substream = prtd->substream;
struct snd_pcm_runtime *runtime = substream->runtime;
struct audio_aio_write_param param;
+ struct audio_aio_read_param read_param;
struct audio_buffer *buf = NULL;
+ struct output_meta_data_st output_meta_data;
+ uint32_t *ptrmem = (uint32_t *)payload;
int i = 0;
+ int time_stamp_flag = 0;
+ int buffer_length = 0;
pr_debug("%s opcode =%08x\n", __func__, opcode);
switch (opcode) {
@@ -91,6 +129,9 @@
prtd->pcm_irq_pos += prtd->pcm_count;
if (atomic_read(&prtd->start))
snd_pcm_period_elapsed(substream);
+ else
+ if (substream->timer_running)
+ snd_timer_interrupt(substream->timer, 1);
atomic_inc(&prtd->out_count);
wake_up(&the_locks.write_wait);
if (!atomic_read(&prtd->start)) {
@@ -98,9 +139,6 @@
break;
} else
atomic_set(&prtd->pending_buffer, 0);
-
- if (runtime->status->hw_ptr >= runtime->control->appl_ptr)
- break;
buf = prtd->audio_client->port[IN].buf;
pr_debug("%s:writing %d bytes of buffer[%d] to dsp 2\n",
__func__, prtd->pcm_count, prtd->out_head);
@@ -109,14 +147,38 @@
((unsigned int)buf[0].phys
+ (prtd->out_head * prtd->pcm_count)));
+ if (runtime->tstamp_mode == SNDRV_PCM_TSTAMP_ENABLE) {
+ time_stamp_flag = SET_TIMESTAMP;
+ memcpy(&output_meta_data, (char *)(buf->data +
+ prtd->out_head * prtd->pcm_count),
+ COMPRE_OUTPUT_METADATA_SIZE);
+ } else {
+ time_stamp_flag = NO_TIMESTAMP;
+ memset(&output_meta_data, 0,
+ COMPRE_OUTPUT_METADATA_SIZE);
+ output_meta_data.frame_size = prtd->pcm_count;
+ }
+ buffer_length = output_meta_data.frame_size;
+ pr_debug("meta_data_length: %d, frame_length: %d\n",
+ output_meta_data.meta_data_length,
+ output_meta_data.frame_size);
+ pr_debug("timestamp_msw: %d, timestamp_lsw: %d\n",
+ output_meta_data.timestamp_msw,
+ output_meta_data.timestamp_lsw);
+ if (buffer_length == 0) {
+ pr_debug("Recieved a zero length buffer-break out");
+ break;
+ }
param.paddr = (unsigned long)buf[0].phys
- + (prtd->out_head * prtd->pcm_count);
- param.len = prtd->pcm_count;
- param.msw_ts = 0;
- param.lsw_ts = 0;
- param.flags = NO_TIMESTAMP;
+ + (prtd->out_head * prtd->pcm_count)
+ + output_meta_data.meta_data_length;
+ param.len = buffer_length;
+ param.msw_ts = output_meta_data.timestamp_msw;
+ param.lsw_ts = output_meta_data.timestamp_lsw;
+ param.flags = time_stamp_flag;
param.uid = (unsigned long)buf[0].phys
- + (prtd->out_head * prtd->pcm_count);
+ + (prtd->out_head * prtd->pcm_count
+ + output_meta_data.meta_data_length);
for (i = 0; i < sizeof(struct audio_aio_write_param)/4;
i++, ++ptrmem)
pr_debug("cmd[%d]=0x%08x\n", i, *ptrmem);
@@ -131,12 +193,60 @@
}
case ASM_DATA_EVENT_RENDERED_EOS:
pr_debug("ASM_DATA_CMDRSP_EOS\n");
- prtd->cmd_ack = 1;
- wake_up(&the_locks.eos_wait);
+ if (atomic_read(&prtd->eos)) {
+ pr_debug("ASM_DATA_CMDRSP_EOS wake up\n");
+ prtd->cmd_ack = 1;
+ wake_up(&the_locks.eos_wait);
+ atomic_set(&prtd->eos, 0);
+ }
break;
+ case ASM_DATA_EVENT_READ_DONE_V2: {
+ pr_debug("ASM_DATA_EVENT_READ_DONE\n");
+ pr_debug("buf = %p, data = 0x%X, *data = %p,\n"
+ "prtd->pcm_irq_pos = %d\n",
+ prtd->audio_client->port[OUT].buf,
+ *(uint32_t *)prtd->audio_client->port[OUT].buf->data,
+ prtd->audio_client->port[OUT].buf->data,
+ prtd->pcm_irq_pos);
+
+ memcpy(prtd->audio_client->port[OUT].buf->data +
+ prtd->pcm_irq_pos, (ptrmem + 2),
+ COMPRE_CAPTURE_HEADER_SIZE);
+ pr_debug("buf = %p, updated data = 0x%X, *data = %p\n",
+ prtd->audio_client->port[OUT].buf,
+ *(uint32_t *)(prtd->audio_client->port[OUT].buf->data +
+ prtd->pcm_irq_pos),
+ prtd->audio_client->port[OUT].buf->data);
+ if (!atomic_read(&prtd->start))
+ break;
+ pr_debug("frame size=%d, buffer = 0x%X\n", ptrmem[2],
+ ptrmem[1]);
+ if (ptrmem[2] > COMPRE_CAPTURE_MAX_FRAME_SIZE) {
+ pr_err("Frame length exceeded the max length");
+ break;
+ }
+ buf = prtd->audio_client->port[OUT].buf;
+ pr_debug("pcm_irq_pos=%d, buf[0].phys = 0x%X\n",
+ prtd->pcm_irq_pos, (uint32_t)buf[0].phys);
+ read_param.len = prtd->pcm_count - COMPRE_CAPTURE_HEADER_SIZE;
+ read_param.paddr = (unsigned long)(buf[0].phys) +
+ prtd->pcm_irq_pos + COMPRE_CAPTURE_HEADER_SIZE;
+ prtd->pcm_irq_pos += prtd->pcm_count;
+
+ if (atomic_read(&prtd->start))
+ snd_pcm_period_elapsed(substream);
+
+ q6asm_async_read(prtd->audio_client, &read_param);
+ break;
+ }
case APR_BASIC_RSP_RESULT: {
switch (payload[0]) {
case ASM_SESSION_CMD_RUN_V2: {
+ if (substream->stream
+ != SNDRV_PCM_STREAM_PLAYBACK) {
+ atomic_set(&prtd->start, 1);
+ break;
+ }
if (!atomic_read(&prtd->pending_buffer))
break;
pr_debug("%s:writing %d bytes of buffer[%d] to dsp\n",
@@ -146,12 +256,32 @@
__func__, prtd->out_head,
((unsigned int)buf[0].phys
+ (prtd->out_head * prtd->pcm_count)));
- param.paddr = (unsigned long)buf[prtd->out_head].phys;
- param.len = prtd->pcm_count;
- param.msw_ts = 0;
- param.lsw_ts = 0;
- param.flags = NO_TIMESTAMP;
- param.uid = (unsigned long)buf[prtd->out_head].phys;
+ if (runtime->tstamp_mode == SNDRV_PCM_TSTAMP_ENABLE) {
+ time_stamp_flag = SET_TIMESTAMP;
+ memcpy(&output_meta_data, (char *)(buf->data +
+ prtd->out_head * prtd->pcm_count),
+ COMPRE_OUTPUT_METADATA_SIZE);
+ } else {
+ time_stamp_flag = NO_TIMESTAMP;
+ memset(&output_meta_data, 0,
+ COMPRE_OUTPUT_METADATA_SIZE);
+ output_meta_data.frame_size = prtd->pcm_count;
+ }
+ buffer_length = output_meta_data.frame_size;
+ pr_debug("meta_data_length: %d, frame_length: %d\n",
+ output_meta_data.meta_data_length,
+ output_meta_data.frame_size);
+ pr_debug("timestamp_msw: %d, timestamp_lsw: %d\n",
+ output_meta_data.timestamp_msw,
+ output_meta_data.timestamp_lsw);
+ param.paddr = (unsigned long)buf[prtd->out_head].phys
+ + output_meta_data.meta_data_length;
+ param.len = buffer_length;
+ param.msw_ts = output_meta_data.timestamp_msw;
+ param.lsw_ts = output_meta_data.timestamp_lsw;
+ param.flags = time_stamp_flag;
+ param.uid = (unsigned long)buf[prtd->out_head].phys
+ + output_meta_data.meta_data_length;
if (q6asm_async_write(prtd->audio_client,
¶m) < 0)
pr_err("%s:q6asm_async_write failed\n",
@@ -166,7 +296,7 @@
case ASM_STREAM_CMD_FLUSH:
pr_debug("ASM_STREAM_CMD_FLUSH\n");
prtd->cmd_ack = 1;
- wake_up(&the_locks.eos_wait);
+ wake_up(&the_locks.flush_wait);
break;
default:
break;
@@ -187,7 +317,7 @@
struct asm_aac_cfg aac_cfg;
int ret;
- pr_debug("%s\n", __func__);
+ pr_debug("compressed stream prepare\n");
prtd->pcm_size = snd_pcm_lib_buffer_bytes(substream);
prtd->pcm_count = snd_pcm_lib_period_bytes(substream);
prtd->pcm_irq_pos = 0;
@@ -205,7 +335,7 @@
/* No media format block for mp3 */
break;
case SND_AUDIOCODEC_AAC:
- pr_debug("SND_AUDIOCODEC_AAC\n");
+ pr_debug("%s: SND_AUDIOCODEC_AAC\n", __func__);
memset(&aac_cfg, 0x0, sizeof(struct asm_aac_cfg));
aac_cfg.aot = AAC_ENC_MODE_EAAC_P;
aac_cfg.format = 0x03;
@@ -226,10 +356,83 @@
return 0;
}
+static int msm_compr_capture_prepare(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct compr_audio *compr = runtime->private_data;
+ struct msm_audio *prtd = &compr->prtd;
+ struct audio_buffer *buf = prtd->audio_client->port[OUT].buf;
+ struct snd_codec *codec = &compr->info.codec_param.codec;
+ struct audio_aio_read_param read_param;
+ int ret = 0;
+ int i;
+ prtd->pcm_size = snd_pcm_lib_buffer_bytes(substream);
+ prtd->pcm_count = snd_pcm_lib_period_bytes(substream);
+ prtd->pcm_irq_pos = 0;
+
+ /* rate and channels are sent to audio driver */
+ prtd->samp_rate = runtime->rate;
+ prtd->channel_mode = runtime->channels;
+
+ if (prtd->enabled)
+ return ret;
+ read_param.len = prtd->pcm_count;
+
+ switch (codec->id) {
+ case SND_AUDIOCODEC_AMRWB:
+ pr_debug("SND_AUDIOCODEC_AMRWB\n");
+ ret = q6asm_enc_cfg_blk_amrwb(prtd->audio_client,
+ MAX_NUM_FRAMES_PER_BUFFER,
+ codec->options.generic.reserved[0] /*bitrate 0-8*/,
+ codec->options.generic.reserved[1] /*dtx mode 0/1*/);
+ if (ret < 0)
+ pr_err("%s: CMD Format block" \
+ "failed: %d\n", __func__, ret);
+ break;
+ default:
+ pr_debug("No config for codec %d\n", codec->id);
+ }
+ pr_debug("%s: Samp_rate = %d, Channel = %d, pcm_size = %d,\n"
+ "pcm_count = %d, periods = %d\n",
+ __func__, prtd->samp_rate, prtd->channel_mode,
+ prtd->pcm_size, prtd->pcm_count, runtime->periods);
+
+ for (i = 0; i < runtime->periods; i++) {
+ read_param.uid = i;
+ switch (codec->id) {
+ case SND_AUDIOCODEC_AMRWB:
+ read_param.len = prtd->pcm_count
+ - COMPRE_CAPTURE_HEADER_SIZE;
+ read_param.paddr = (unsigned long)(buf[i].phys)
+ + COMPRE_CAPTURE_HEADER_SIZE;
+ pr_debug("Push buffer [%d] to DSP, "\
+ "paddr: %p, vaddr: %p\n",
+ i, (void *) read_param.paddr,
+ buf[i].data);
+ q6asm_async_read(prtd->audio_client, &read_param);
+ break;
+ default:
+ read_param.paddr = (unsigned long)(buf[i].phys);
+ /*q6asm_async_read_compressed(prtd->audio_client,
+ &read_param);*/
+ pr_debug("%s: To add support for read compressed\n",
+ __func__);
+ ret = -EINVAL;
+ break;
+ }
+ }
+ prtd->periods = runtime->periods;
+
+ prtd->enabled = 1;
+
+ return ret;
+}
+
static int msm_compr_trigger(struct snd_pcm_substream *substream, int cmd)
{
int ret = 0;
struct snd_pcm_runtime *runtime = substream->runtime;
+ struct snd_soc_pcm_runtime *soc_prtd = substream->private_data;
struct compr_audio *compr = runtime->private_data;
struct msm_audio *prtd = &compr->prtd;
@@ -237,6 +440,17 @@
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
prtd->pcm_irq_pos = 0;
+ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
+ switch (compr->info.codec_param.codec.id) {
+ case SND_AUDIOCODEC_AMRWB:
+ break;
+ default:
+ msm_pcm_routing_reg_psthr_stream(
+ soc_prtd->dai_link->be_id,
+ prtd->session_id, substream->stream);
+ break;
+ }
+ }
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
pr_debug("%s: Trigger start\n", __func__);
@@ -245,6 +459,17 @@
break;
case SNDRV_PCM_TRIGGER_STOP:
pr_debug("SNDRV_PCM_TRIGGER_STOP\n");
+ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
+ switch (compr->info.codec_param.codec.id) {
+ case SND_AUDIOCODEC_AMRWB:
+ break;
+ default:
+ msm_pcm_routing_reg_psthr_stream(
+ soc_prtd->dai_link->be_id,
+ prtd->session_id, substream->stream);
+ break;
+ }
+ }
atomic_set(&prtd->start, 0);
break;
case SNDRV_PCM_TRIGGER_SUSPEND:
@@ -266,7 +491,7 @@
{
pr_debug("%s\n", __func__);
/* MP3 Block */
- compr->info.compr_cap.num_codecs = 1;
+ compr->info.compr_cap.num_codecs = 2;
compr->info.compr_cap.min_fragment_size = runtime->hw.period_bytes_min;
compr->info.compr_cap.max_fragment_size = runtime->hw.period_bytes_max;
compr->info.compr_cap.min_fragments = runtime->hw.periods_min;
@@ -294,10 +519,6 @@
.rampingcurve = SOFT_VOLUME_CURVE_LINEAR,
};
- /* Capture path */
- if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
- return -EINVAL;
-
pr_debug("%s\n", __func__);
compr = kzalloc(sizeof(struct compr_audio), GFP_KERNEL);
if (compr == NULL) {
@@ -313,12 +534,18 @@
kfree(prtd);
return -ENOMEM;
}
- runtime->hw = msm_compr_hardware_playback;
pr_info("%s: session ID %d\n", __func__, prtd->audio_client->session);
prtd->session_id = prtd->audio_client->session;
- prtd->cmd_ack = 1;
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ runtime->hw = msm_compr_hardware_playback;
+ prtd->cmd_ack = 1;
+ } else {
+ runtime->hw = msm_compr_hardware_capture;
+ }
+
ret = snd_pcm_hw_constraint_list(runtime, 0,
SNDRV_PCM_HW_PARAM_RATE,
@@ -333,9 +560,11 @@
prtd->dsp_cnt = 0;
atomic_set(&prtd->pending_buffer, 1);
- compr->codec = FORMAT_MP3;
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ compr->codec = FORMAT_MP3;
populate_codec_list(compr, runtime);
runtime->private_data = compr;
+ atomic_set(&prtd->eos, 0);
compressed_audio.prtd = &compr->prtd;
ret = compressed_set_volume(compressed_audio.volume);
if (ret < 0)
@@ -382,13 +611,34 @@
dir = IN;
atomic_set(&prtd->pending_buffer, 0);
+ prtd->pcm_irq_pos = 0;
q6asm_cmd(prtd->audio_client, CMD_CLOSE);
compressed_audio.prtd = NULL;
q6asm_audio_client_buf_free_contiguous(dir,
prtd->audio_client);
+ msm_pcm_routing_dereg_phy_stream(
+ soc_prtd->dai_link->be_id,
+ SNDRV_PCM_STREAM_PLAYBACK);
+ q6asm_audio_client_free(prtd->audio_client);
+ kfree(prtd);
+ return 0;
+}
+static int msm_compr_capture_close(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct snd_soc_pcm_runtime *soc_prtd = substream->private_data;
+ struct compr_audio *compr = runtime->private_data;
+ struct msm_audio *prtd = &compr->prtd;
+ int dir = OUT;
+
+ pr_debug("%s\n", __func__);
+ atomic_set(&prtd->pending_buffer, 0);
+ q6asm_cmd(prtd->audio_client, CMD_CLOSE);
+ q6asm_audio_client_buf_free_contiguous(dir,
+ prtd->audio_client);
msm_pcm_routing_dereg_phy_stream(soc_prtd->dai_link->be_id,
- SNDRV_PCM_STREAM_PLAYBACK);
+ SNDRV_PCM_STREAM_CAPTURE);
q6asm_audio_client_free(prtd->audio_client);
kfree(prtd);
return 0;
@@ -401,7 +651,7 @@
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
ret = msm_compr_playback_close(substream);
else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
- ret = EINVAL;
+ ret = msm_compr_capture_close(substream);
return ret;
}
static int msm_compr_prepare(struct snd_pcm_substream *substream)
@@ -411,7 +661,7 @@
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
ret = msm_compr_playback_prepare(substream);
else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
- ret = EINVAL;
+ ret = msm_compr_capture_prepare(substream);
return ret;
}
@@ -425,7 +675,10 @@
if (prtd->pcm_irq_pos >= prtd->pcm_size)
prtd->pcm_irq_pos = 0;
- pr_debug("pcm_irq_pos = %d\n", prtd->pcm_irq_pos);
+ pr_debug("%s: pcm_irq_pos = %d, pcm_size = %d, sample_bits = %d,\n"
+ "frame_bits = %d\n", __func__, prtd->pcm_irq_pos,
+ prtd->pcm_size, runtime->sample_bits,
+ runtime->frame_bits);
return bytes_to_frames(runtime, (prtd->pcm_irq_pos));
}
@@ -467,22 +720,69 @@
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
dir = IN;
else
- return -EINVAL;
+ dir = OUT;
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ ret = q6asm_open_write(prtd->audio_client,
+ compr->codec);
+ if (ret < 0) {
+ pr_err("%s: Session out open failed\n",
+ __func__);
+ return -ENOMEM;
+ }
+ msm_pcm_routing_reg_phy_stream(
+ soc_prtd->dai_link->be_id,
+ prtd->session_id,
+ substream->stream);
+ } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
+ switch (compr->info.codec_param.codec.id) {
+ case SND_AUDIOCODEC_AMRWB:
+ pr_debug("q6asm_open_read(FORMAT_AMRWB)\n");
+ ret = q6asm_open_read(prtd->audio_client,
+ FORMAT_AMRWB);
+ if (ret < 0) {
+ pr_err("%s: compressed Session out open failed\n",
+ __func__);
+ return -ENOMEM;
+ }
+ pr_debug("msm_pcm_routing_reg_phy_stream\n");
+ msm_pcm_routing_reg_phy_stream(
+ soc_prtd->dai_link->be_id,
+ prtd->session_id, substream->stream);
+ break;
+ default:
+ pr_debug("q6asm_open_read_compressed(COMPRESSED_META_DATA_MODE)\n");
+ /*
+ ret = q6asm_open_read_compressed(prtd->audio_client,
+ MAX_NUM_FRAMES_PER_BUFFER,
+ COMPRESSED_META_DATA_MODE);
+ */
+ ret = -EINVAL;
+ break;
+ }
- ret = q6asm_open_write(prtd->audio_client, compr->codec);
- if (ret < 0) {
- pr_err("%s: Session out open failed\n", __func__);
- return -ENOMEM;
+ if (ret < 0) {
+ pr_err("%s: compressed Session out open failed\n",
+ __func__);
+ return -ENOMEM;
+ }
}
- msm_pcm_routing_reg_phy_stream(soc_prtd->dai_link->be_id,
- prtd->session_id, substream->stream);
ret = q6asm_set_io_mode(prtd->audio_client, ASYNC_IO_MODE);
if (ret < 0) {
pr_err("%s: Set IO mode failed\n", __func__);
return -ENOMEM;
}
-
+ /* Modifying kernel hardware params based on userspace config */
+ if (params_periods(params) > 0 &&
+ (params_periods(params) != runtime->hw.periods_max)) {
+ runtime->hw.periods_max = params_periods(params);
+ }
+ if (params_period_bytes(params) > 0 &&
+ (params_period_bytes(params) != runtime->hw.period_bytes_min)) {
+ runtime->hw.period_bytes_min = params_period_bytes(params);
+ }
+ runtime->hw.buffer_bytes_max =
+ runtime->hw.period_bytes_min * runtime->hw.periods_max;
ret = q6asm_audio_client_buf_alloc_contiguous(dir,
prtd->audio_client,
runtime->hw.period_bytes_min,
@@ -494,13 +794,17 @@
}
buf = prtd->audio_client->port[dir].buf;
- pr_debug("%s:buf = %p\n", __func__, buf);
dma_buf->dev.type = SNDRV_DMA_TYPE_DEV;
dma_buf->dev.dev = substream->pcm->card->dev;
dma_buf->private_data = NULL;
dma_buf->area = buf[0].data;
dma_buf->addr = buf[0].phys;
dma_buf->bytes = runtime->hw.buffer_bytes_max;
+
+ pr_debug("%s: buf[%p]dma_buf->area[%p]dma_buf->addr[%p]\n"
+ "dma_buf->bytes[%d]\n", __func__,
+ (void *)buf, (void *)dma_buf->area,
+ (void *)dma_buf->addr, dma_buf->bytes);
if (!dma_buf->area)
return -ENOMEM;
@@ -577,16 +881,47 @@
}
return 0;
case SNDRV_PCM_IOCTL1_RESET:
- prtd->cmd_ack = 0;
- rc = q6asm_cmd(prtd->audio_client, CMD_FLUSH);
- if (rc < 0)
- pr_err("%s: flush cmd failed rc=%d\n", __func__, rc);
- rc = wait_event_timeout(the_locks.eos_wait,
- prtd->cmd_ack, 5 * HZ);
- if (rc < 0)
- pr_err("Flush cmd timeout\n");
- prtd->pcm_irq_pos = 0;
+ pr_debug("SNDRV_PCM_IOCTL1_RESET\n");
+ /* Flush only when session is started during CAPTURE,
+ while PLAYBACK has no such restriction. */
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ||
+ (substream->stream == SNDRV_PCM_STREAM_CAPTURE &&
+ atomic_read(&prtd->start))) {
+ if (atomic_read(&prtd->eos)) {
+ prtd->cmd_ack = 1;
+ wake_up(&the_locks.eos_wait);
+ atomic_set(&prtd->eos, 0);
+ }
+
+ /* A unlikely race condition possible with FLUSH
+ DRAIN if ack is set by flush and reset by drain */
+ prtd->cmd_ack = 0;
+ rc = q6asm_cmd(prtd->audio_client, CMD_FLUSH);
+ if (rc < 0) {
+ pr_err("%s: flush cmd failed rc=%d\n",
+ __func__, rc);
+ return rc;
+ }
+ rc = wait_event_timeout(the_locks.flush_wait,
+ prtd->cmd_ack, 5 * HZ);
+ if (rc < 0)
+ pr_err("Flush cmd timeout\n");
+ prtd->pcm_irq_pos = 0;
+ }
break;
+ case SNDRV_COMPRESS_DRAIN:
+ pr_debug("%s: SNDRV_COMPRESS_DRAIN\n", __func__);
+ atomic_set(&prtd->eos, 1);
+ atomic_set(&prtd->pending_buffer, 0);
+ prtd->cmd_ack = 0;
+ q6asm_cmd_nowait(prtd->audio_client, CMD_EOS);
+ /* Wait indefinitely for DRAIN. Flush can also signal this*/
+ rc = wait_event_interruptible(the_locks.eos_wait,
+ prtd->cmd_ack);
+ if (rc < 0)
+ pr_err("EOS cmd interrupted\n");
+ pr_debug("%s: SNDRV_COMPRESS_DRAIN out of wait\n", __func__);
+ return 0;
default:
break;
}
@@ -658,6 +993,7 @@
init_waitqueue_head(&the_locks.eos_wait);
init_waitqueue_head(&the_locks.write_wait);
init_waitqueue_head(&the_locks.read_wait);
+ init_waitqueue_head(&the_locks.flush_wait);
return platform_driver_register(&msm_compr_driver);
}
diff --git a/sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c b/sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c
index 3eab972..a6cdad2 100644
--- a/sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-dai-q6-v2.c
@@ -540,6 +540,14 @@
memset(&dai_data->port_config, 0, sizeof(dai_data->port_config));
+ pr_debug("%s: setting bt_fm parameters\n", __func__);
+
+ dai_data->port_config.int_bt_fm.bt_fm_cfg_minor_version =
+ AFE_API_VERSION_INTERNAL_BT_FM_CONFIG;
+ dai_data->port_config.int_bt_fm.num_channels = dai_data->channels;
+ dai_data->port_config.int_bt_fm.sample_rate = dai_data->rate;
+ dai_data->port_config.int_bt_fm.bit_width = 16;
+
return 0;
}
@@ -805,6 +813,36 @@
return 0;
}
+static struct snd_soc_dai_driver msm_dai_q6_afe_rx_dai = {
+ .playback = {
+ .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
+ SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 2,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .ops = &msm_dai_q6_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+};
+
+static struct snd_soc_dai_driver msm_dai_q6_afe_tx_dai = {
+ .capture = {
+ .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
+ SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 4,
+ .rate_min = 8000,
+ .rate_max = 48000,
+ },
+ .ops = &msm_dai_q6_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+};
+
static struct snd_soc_dai_driver msm_dai_q6_slimbus_1_rx_dai = {
.playback = {
.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
@@ -833,6 +871,34 @@
.remove = msm_dai_q6_dai_remove,
};
+static struct snd_soc_dai_driver msm_dai_q6_bt_sco_rx_dai = {
+ .playback = {
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 1,
+ .rate_max = 16000,
+ .rate_min = 8000,
+ },
+ .ops = &msm_dai_q6_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+};
+
+static struct snd_soc_dai_driver msm_dai_q6_bt_sco_tx_dai = {
+ .capture = {
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .channels_min = 1,
+ .channels_max = 1,
+ .rate_max = 16000,
+ .rate_min = 8000,
+ },
+ .ops = &msm_dai_q6_ops,
+ .probe = msm_dai_q6_dai_probe,
+ .remove = msm_dai_q6_dai_remove,
+};
+
static int __devinit msm_auxpcm_dev_probe(struct platform_device *pdev)
{
int id;
@@ -1084,6 +1150,22 @@
rc = snd_soc_register_dai(&pdev->dev,
&msm_dai_q6_slimbus_1_tx_dai);
break;
+ case INT_BT_SCO_RX:
+ rc = snd_soc_register_dai(&pdev->dev,
+ &msm_dai_q6_bt_sco_rx_dai);
+ break;
+ case INT_BT_SCO_TX:
+ rc = snd_soc_register_dai(&pdev->dev,
+ &msm_dai_q6_bt_sco_tx_dai);
+ break;
+ case RT_PROXY_DAI_001_RX:
+ case RT_PROXY_DAI_002_RX:
+ rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_afe_rx_dai);
+ break;
+ case RT_PROXY_DAI_001_TX:
+ case RT_PROXY_DAI_002_TX:
+ rc = snd_soc_register_dai(&pdev->dev, &msm_dai_q6_afe_tx_dai);
+ break;
default:
rc = -ENODEV;
break;
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-afe-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-afe-v2.c
index 4593784..73a04c2 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-afe-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-afe-v2.c
@@ -29,6 +29,8 @@
#include <sound/control.h>
#include <sound/q6adm-v2.h>
#include <asm/dma.h>
+#include <linux/memory_alloc.h>
+#include <mach/msm_subsystem_map.h>
#include "msm-pcm-afe-v2.h"
#define MIN_PERIOD_SIZE (128 * 2)
@@ -63,6 +65,11 @@
struct snd_pcm_substream *substream = prtd->substream;
struct snd_pcm_runtime *runtime = substream->runtime;
u32 mem_map_handle = 0;
+
+ mem_map_handle = afe_req_mmap_handle();
+ if (!mem_map_handle)
+ pr_err("%s: mem_map_handle is NULL\n", __func__);
+
if (prtd->start) {
pr_debug("sending frame to DSP: poll_time: %d\n",
prtd->poll_time);
@@ -89,10 +96,15 @@
struct snd_pcm_substream *substream = prtd->substream;
struct snd_pcm_runtime *runtime = substream->runtime;
u32 mem_map_handle = 0;
+
+ mem_map_handle = afe_req_mmap_handle();
+ if (!mem_map_handle)
+ pr_err("%s: mem_map_handle is NULL\n", __func__);
+
if (prtd->start) {
if (prtd->dsp_cnt == runtime->periods)
prtd->dsp_cnt = 0;
- pr_err("%s: mem_map_handle 0x%x\n", __func__, mem_map_handle);
+ pr_debug("%s: mem_map_handle 0x%x\n", __func__, mem_map_handle);
afe_rt_proxy_port_read(
(prtd->dma_addr + (prtd->dsp_cnt
* snd_pcm_lib_period_bytes(prtd->substream))), mem_map_handle,
@@ -137,9 +149,6 @@
runtime->channels * 2)));
pr_debug("prtd->poll_time: %d",
prtd->poll_time);
- hrtimer_start(&prtd->hrt,
- ns_to_ktime(0),
- HRTIMER_MODE_REL);
break;
}
case AFE_EVENT_RTPORT_STOP:
@@ -203,9 +212,6 @@
snd_pcm_lib_period_bytes(prtd->substream)
* 1000 * 1000)/(runtime->rate
* runtime->channels * 2)));
- hrtimer_start(&prtd->hrt,
- ns_to_ktime(0),
- HRTIMER_MODE_REL);
pr_debug("prtd->poll_time : %d", prtd->poll_time);
break;
}
@@ -321,13 +327,21 @@
runtime->hw = msm_afe_hardware;
prtd->substream = substream;
runtime->private_data = prtd;
- mutex_unlock(&prtd->lock);
+ prtd->audio_client = q6afe_audio_client_alloc(prtd);
+ if (!prtd->audio_client) {
+ pr_debug("%s: Could not allocate memory\n", __func__);
+ kfree(prtd);
+ mutex_unlock(&prtd->lock);
+ return -ENOMEM;
+ }
+
hrtimer_init(&prtd->hrt, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
prtd->hrt.function = afe_hrtimer_callback;
else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
prtd->hrt.function = afe_hrtimer_rec_callback;
+ mutex_unlock(&prtd->lock);
ret = snd_pcm_hw_constraint_list(runtime, 0,
SNDRV_PCM_HW_PARAM_RATE,
&constraints_sample_rates);
@@ -350,6 +364,7 @@
struct pcm_afe_info *prtd;
struct snd_soc_pcm_runtime *rtd = NULL;
struct snd_soc_dai *dai = NULL;
+ int dir = IN;
int ret = 0;
pr_debug("%s\n", __func__);
@@ -365,17 +380,19 @@
mutex_lock(&prtd->lock);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ dir = IN;
ret = afe_unregister_get_events(dai->id);
if (ret < 0)
pr_err("AFE unregister for events failed\n");
} else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
+ dir = OUT;
ret = afe_unregister_get_events(dai->id);
if (ret < 0)
pr_err("AFE unregister for events failed\n");
}
hrtimer_cancel(&prtd->hrt);
- rc = afe_cmd_memory_unmap(runtime->dma_addr);
+ rc = afe_cmd_memory_unmap(afe_req_mmap_handle());
if (rc < 0)
pr_err("AFE memory unmap failed\n");
@@ -384,15 +401,14 @@
if (dma_buf == NULL) {
pr_debug("dma_buf is NULL\n");
goto done;
- }
- if (dma_buf->area != NULL) {
- dma_free_coherent(substream->pcm->card->dev,
- runtime->hw.buffer_bytes_max, dma_buf->area,
- dma_buf->addr);
- dma_buf->area = NULL;
}
+
+ if (dma_buf->area)
+ dma_buf->area = NULL;
+ q6afe_audio_client_buf_free_contiguous(dir, prtd->audio_client);
done:
pr_debug("%s: dai->id =%x\n", __func__, dai->id);
+ q6afe_audio_client_free(prtd->audio_client);
mutex_unlock(&prtd->lock);
prtd->prepared--;
kfree(prtd);
@@ -420,14 +436,21 @@
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct pcm_afe_info *prtd = runtime->private_data;
+ int result = 0;
pr_debug("%s\n", __func__);
prtd->mmap_flag = 1;
- dma_mmap_coherent(substream->pcm->card->dev, vma,
- runtime->dma_area,
- runtime->dma_addr,
- runtime->dma_bytes);
- return 0;
+ if (runtime->dma_addr && runtime->dma_bytes) {
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+ result = remap_pfn_range(vma, vma->vm_start,
+ runtime->dma_addr >> PAGE_SHIFT,
+ runtime->dma_bytes,
+ vma->vm_page_prot);
+ } else {
+ pr_err("Physical address or size of buf is NULL");
+ return -EINVAL;
+ }
+ return result;
}
static int msm_afe_trigger(struct snd_pcm_substream *substream, int cmd)
{
@@ -441,6 +464,8 @@
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
pr_debug("%s: SNDRV_PCM_TRIGGER_START\n", __func__);
prtd->start = 1;
+ hrtimer_start(&prtd->hrt, ns_to_ktime(0),
+ HRTIMER_MODE_REL);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
@@ -460,27 +485,45 @@
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_dma_buffer *dma_buf = &substream->dma_buffer;
struct pcm_afe_info *prtd = runtime->private_data;
- int rc;
+ struct afe_audio_buffer *buf;
+ int dir, rc;
pr_debug("%s:\n", __func__);
mutex_lock(&prtd->lock);
-
- dma_buf->dev.type = SNDRV_DMA_TYPE_DEV;
- dma_buf->dev.dev = substream->pcm->card->dev;
- dma_buf->private_data = NULL;
- dma_buf->area = dma_alloc_coherent(dma_buf->dev.dev,
- runtime->hw.buffer_bytes_max,
- &dma_buf->addr, GFP_KERNEL);
-
- pr_debug("%s: dma_buf->area: 0x%p, dma_buf->addr: 0x%x", __func__,
- (unsigned int *) dma_buf->area, dma_buf->addr);
- if (!dma_buf->area) {
- pr_err("%s:MSM AFE memory allocation failed\n", __func__);
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ dir = IN;
+ else
+ dir = OUT;
+ rc = q6afe_audio_client_buf_alloc_contiguous(dir,
+ prtd->audio_client,
+ runtime->hw.period_bytes_min,
+ runtime->hw.periods_max);
+ if (rc < 0) {
+ pr_err("Audio Start: Buffer Allocation failed rc = %d\n", rc);
mutex_unlock(&prtd->lock);
return -ENOMEM;
}
+ buf = prtd->audio_client->port[dir].buf;
+
+ if (buf == NULL || buf[0].data == NULL) {
+ mutex_unlock(&prtd->lock);
+ return -ENOMEM;
+ }
+
+ pr_debug("%s:buf = %p\n", __func__, buf);
+ dma_buf->dev.type = SNDRV_DMA_TYPE_DEV;
+ dma_buf->dev.dev = substream->pcm->card->dev;
+ dma_buf->private_data = NULL;
+ dma_buf->area = buf[0].data;
+ dma_buf->addr = buf[0].phys;
dma_buf->bytes = runtime->hw.buffer_bytes_max;
+ if (!dma_buf->area) {
+ pr_err("%s:MSM AFE physical memory allocation failed\n",
+ __func__);
+ mutex_unlock(&prtd->lock);
+ return -ENOMEM;
+ }
memset(dma_buf->area, 0, runtime->hw.buffer_bytes_max);
prtd->dma_addr = (u32) dma_buf->addr;
@@ -542,6 +585,9 @@
static __devinit int msm_afe_probe(struct platform_device *pdev)
{
+ if (pdev->dev.of_node)
+ dev_set_name(&pdev->dev, "%s", "msm-pcm-afe");
+
pr_debug("%s: dev name %s\n", __func__, dev_name(&pdev->dev));
return snd_soc_register_platform(&pdev->dev,
&msm_soc_platform);
@@ -553,11 +599,17 @@
snd_soc_unregister_platform(&pdev->dev);
return 0;
}
+static const struct of_device_id msm_pcm_afe_dt_match[] = {
+ {.compatible = "qcom,msm-pcm-afe"},
+ {}
+};
+MODULE_DEVICE_TABLE(of, msm_pcm_afe_dt_match);
static struct platform_driver msm_afe_driver = {
.driver = {
.name = "msm-pcm-afe",
.owner = THIS_MODULE,
+ .of_match_table = msm_pcm_afe_dt_match,
},
.probe = msm_afe_probe,
.remove = __devexit_p(msm_afe_remove),
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-afe-v2.h b/sound/soc/msm/qdsp6v2/msm-pcm-afe-v2.h
index 20d6377..446409f 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-afe-v2.h
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-afe-v2.h
@@ -30,6 +30,7 @@
int prepared;
struct hrtimer hrt;
int poll_time;
+ struct afe_audio_client *audio_client;
};
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.h b/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.h
index 22bf0cc..e25d356 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.h
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-q6-v2.h
@@ -49,6 +49,7 @@
wait_queue_head_t write_wait;
wait_queue_head_t eos_wait;
wait_queue_head_t enable_wait;
+ wait_queue_head_t flush_wait;
};
struct msm_audio {
@@ -76,10 +77,19 @@
atomic_t out_count;
atomic_t in_count;
atomic_t out_needed;
+ atomic_t eos;
int out_head;
int periods;
int mmap_flag;
atomic_t pending_buffer;
};
+struct output_meta_data_st {
+ uint32_t meta_data_length;
+ uint32_t frame_size;
+ uint32_t timestamp_lsw;
+ uint32_t timestamp_msw;
+ uint32_t reserved[12];
+};
+
#endif /*_MSM_PCM_H*/
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
index fbbb3a5..3db5418 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-routing-v2.c
@@ -1075,6 +1075,9 @@
SOC_SINGLE_EXT("MI2S_TX", MSM_BACKEND_DAI_MI2S_TX,
MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
msm_routing_put_audio_mixer),
+ SOC_SINGLE_EXT("SLIM_0_TX", MSM_BACKEND_DAI_SLIMBUS_0_TX,
+ MSM_FRONTEND_DAI_MULTIMEDIA2, 1, 0, msm_routing_get_audio_mixer,
+ msm_routing_put_audio_mixer),
};
static const struct snd_kcontrol_new pri_rx_voice_mixer_controls[] = {
@@ -1803,6 +1806,7 @@
{"MultiMedia2 Mixer", "MI2S_TX", "MI2S_TX"},
{"MultiMedia1 Mixer", "SLIM_0_TX", "SLIMBUS_0_TX"},
{"MultiMedia1 Mixer", "AUX_PCM_UL_TX", "AUX_PCM_TX"},
+ {"MultiMedia2 Mixer", "SLIM_0_TX", "SLIMBUS_0_TX"},
{"INTERNAL_BT_SCO_RX Audio Mixer", "MultiMedia1", "MM_DL1"},
{"INTERNAL_BT_SCO_RX Audio Mixer", "MultiMedia2", "MM_DL2"},
diff --git a/sound/soc/msm/qdsp6v2/msm-pcm-voip-v2.c b/sound/soc/msm/qdsp6v2/msm-pcm-voip-v2.c
index 492569b..c7a8031 100644
--- a/sound/soc/msm/qdsp6v2/msm-pcm-voip-v2.c
+++ b/sound/soc/msm/qdsp6v2/msm-pcm-voip-v2.c
@@ -32,8 +32,9 @@
#include "q6voice.h"
#include "audio_ocmem.h"
+#define SHARED_MEM_BUF 2
#define VOIP_MAX_Q_LEN 10
-#define VOIP_MAX_VOC_PKT_SIZE 640
+#define VOIP_MAX_VOC_PKT_SIZE 4096
#define VOIP_MIN_VOC_PKT_SIZE 320
/* Length of the DSP frame info header added to the voc packet. */
@@ -259,8 +260,8 @@
/* capture path */
static void voip_process_ul_pkt(uint8_t *voc_pkt,
- uint32_t pkt_len,
- void *private_data)
+ uint32_t pkt_len,
+ void *private_data)
{
struct voip_buf_node *buf_node = NULL;
struct voip_drv_info *prtd = private_data;
@@ -315,8 +316,8 @@
default: {
buf_node->frame.len = pkt_len;
memcpy(&buf_node->frame.voc_pkt[0],
- voc_pkt,
- buf_node->frame.len);
+ voc_pkt,
+ buf_node->frame.len);
list_add_tail(&buf_node->list, &prtd->out_queue);
}
}
@@ -334,15 +335,12 @@
}
/* playback path */
-static void voip_process_dl_pkt(uint8_t *voc_pkt,
- uint32_t *pkt_len,
- void *private_data)
+static void voip_process_dl_pkt(uint8_t *voc_pkt, void *private_data)
{
struct voip_buf_node *buf_node = NULL;
struct voip_drv_info *prtd = private_data;
unsigned long dsp_flags;
-
if (prtd->playback_substream == NULL)
return;
@@ -355,14 +353,18 @@
switch (prtd->mode) {
case MODE_AMR:
case MODE_AMR_WB: {
- /* Add the DSP frame info header. Header format:
+ *((uint32_t *)voc_pkt) = buf_node->frame.len +
+ DSP_FRAME_HDR_LEN;
+ /* Advance to the header of voip packet */
+ voc_pkt = voc_pkt + sizeof(uint32_t);
+ /*
+ * Add the DSP frame info header. Header format:
* Bits 0-3: Frame rate
* Bits 4-7: Frame type
*/
*voc_pkt = ((buf_node->frame.header.frame_type &
0x0F) << 4) | (prtd->rate_type & 0x0F);
voc_pkt = voc_pkt + DSP_FRAME_HDR_LEN;
- *pkt_len = buf_node->frame.len + DSP_FRAME_HDR_LEN;
memcpy(voc_pkt,
&buf_node->frame.voc_pkt[0],
buf_node->frame.len);
@@ -372,12 +374,16 @@
case MODE_IS127:
case MODE_4GV_NB:
case MODE_4GV_WB: {
- /* Add the DSP frame info header. Header format:
+ *((uint32_t *)voc_pkt) = buf_node->frame.len +
+ DSP_FRAME_HDR_LEN;
+ /* Advance to the header of voip packet */
+ voc_pkt = voc_pkt + sizeof(uint32_t);
+ /*
+ * Add the DSP frame info header. Header format:
* Bits 0-3 : Frame rate
- */
+ */
*voc_pkt = buf_node->frame.header.packet_rate & 0x0F;
voc_pkt = voc_pkt + DSP_FRAME_HDR_LEN;
- *pkt_len = buf_node->frame.len + DSP_FRAME_HDR_LEN;
memcpy(voc_pkt,
&buf_node->frame.voc_pkt[0],
@@ -387,22 +393,19 @@
break;
}
default: {
- *pkt_len = buf_node->frame.len;
-
+ *((uint32_t *)voc_pkt) = buf_node->frame.len;
+ voc_pkt = voc_pkt + sizeof(uint32_t);
memcpy(voc_pkt,
- &buf_node->frame.voc_pkt[0],
- buf_node->frame.len);
-
+ &buf_node->frame.voc_pkt[0],
+ buf_node->frame.len);
list_add_tail(&buf_node->list, &prtd->free_in_queue);
}
}
- pr_debug("dl_pkt: pkt_len=%d, frame_len=%d\n", *pkt_len,
- buf_node->frame.len);
prtd->pcm_playback_irq_pos += prtd->pcm_count;
spin_unlock_irqrestore(&prtd->dsp_lock, dsp_flags);
snd_pcm_period_elapsed(prtd->playback_substream);
} else {
- *pkt_len = 0;
+ *((uint32_t *)voc_pkt) = 0;
spin_unlock_irqrestore(&prtd->dsp_lock, dsp_flags);
pr_err("DL data not available\n");
}
@@ -556,7 +559,7 @@
pr_err("%s: No free DL buffs\n", __func__);
ret = -ETIMEDOUT;
} else {
- pr_err("%s: playback copy was interrupted\n", __func__);
+ pr_err("%s: playback copy was interrupted %d\n", __func__, ret);
}
return ret;
diff --git a/sound/soc/msm/qdsp6v2/q6adm.c b/sound/soc/msm/qdsp6v2/q6adm.c
index e5837b2..62257b4 100644
--- a/sound/soc/msm/qdsp6v2/q6adm.c
+++ b/sound/soc/msm/qdsp6v2/q6adm.c
@@ -41,6 +41,14 @@
wait_queue_head_t wait[Q6_AFE_MAX_PORTS];
};
+static struct acdb_cal_block mem_addr_audproc[MAX_AUDPROC_TYPES];
+static struct acdb_cal_block mem_addr_audvol[MAX_AUDPROC_TYPES];
+
+/* 0 - (MAX_AUDPROC_TYPES -1): audproc handles */
+/* (MAX_AUDPROC_TYPES -1) - (2 * MAX_AUDPROC_TYPES -1): audvol handles */
+atomic_t mem_map_handles[(2 * MAX_AUDPROC_TYPES)];
+atomic_t mem_map_index;
+
static struct adm_ctl this_adm;
static int32_t adm_callback(struct apr_client_data *data, void *priv)
@@ -63,6 +71,18 @@
}
this_adm.apr = NULL;
}
+ pr_debug("Resetting calibration blocks");
+ for (i = 0; i < MAX_AUDPROC_TYPES; i++) {
+ /* Device calibration */
+ mem_addr_audproc[i].cal_size = 0;
+ mem_addr_audproc[i].cal_kvaddr = 0;
+ mem_addr_audproc[i].cal_paddr = 0;
+
+ /* Volume calibration */
+ mem_addr_audvol[i].cal_size = 0;
+ mem_addr_audvol[i].cal_kvaddr = 0;
+ mem_addr_audvol[i].cal_paddr = 0;
+ }
return 0;
}
@@ -82,18 +102,23 @@
switch (payload[0]) {
case ADM_CMD_SET_PP_PARAMS_V5:
if (rtac_make_adm_callback(
- payload, data->payload_size))
+ payload, data->payload_size)) {
pr_debug("%s: payload[0]: 0x%x\n",
__func__, payload[0]);
break;
+ }
case ADM_CMD_DEVICE_CLOSE_V5:
case ADM_CMD_SHARED_MEM_UNMAP_REGIONS:
- case ADM_CMD_SHARED_MEM_MAP_REGIONS:
case ADM_CMD_MATRIX_MAP_ROUTINGS_V5:
- pr_debug("ADM_CMD_MATRIX_MAP_ROUTINGS\n");
+ pr_debug("%s: Basic callback received, wake up.\n",
+ __func__);
atomic_set(&this_adm.copp_stat[index], 1);
wake_up(&this_adm.wait[index]);
break;
+ case ADM_CMD_SHARED_MEM_MAP_REGIONS:
+ /* Block until memory handle comes back */
+ /* via ADM_CMDRSP_SHARED_MEM_MAP_REGIONS */
+ break;
default:
pr_err("%s: Unknown Cmd: 0x%x\n", __func__,
payload[0]);
@@ -125,6 +150,14 @@
rtac_make_adm_callback(payload,
data->payload_size);
break;
+ case ADM_CMDRSP_SHARED_MEM_MAP_REGIONS:
+ pr_debug("%s: ADM_CMDRSP_SHARED_MEM_MAP_REGIONS\n",
+ __func__);
+ atomic_set(&mem_map_handles[
+ atomic_read(&mem_map_index)], *payload);
+ atomic_set(&this_adm.copp_stat[0], 1);
+ wake_up(&this_adm.wait[index]);
+ break;
default:
pr_err("%s: Unknown cmd:0x%x\n", __func__,
data->opcode);
@@ -134,12 +167,143 @@
return 0;
}
-/* TODO: send_adm_cal_block function to be defined
- when calibration available for 8974 */
+static int send_adm_cal_block(int port_id, struct acdb_cal_block *aud_cal)
+{
+ s32 result = 0;
+ struct adm_cmd_set_pp_params_v5 adm_params;
+ int index = afe_get_port_index(port_id);
+ if (index < 0 || index >= AFE_MAX_PORTS) {
+ pr_err("%s: invalid port idx %d portid %d\n",
+ __func__, index, port_id);
+ return 0;
+ }
+
+ pr_debug("%s: Port id %d, index %d\n", __func__, port_id, index);
+
+ if (!aud_cal || aud_cal->cal_size == 0) {
+ pr_debug("%s: No ADM cal to send for port_id = %d!\n",
+ __func__, port_id);
+ result = -EINVAL;
+ goto done;
+ }
+
+ adm_params.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
+ APR_HDR_LEN(20), APR_PKT_VER);
+ adm_params.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(adm_params));
+ adm_params.hdr.src_svc = APR_SVC_ADM;
+ adm_params.hdr.src_domain = APR_DOMAIN_APPS;
+ adm_params.hdr.src_port = port_id;
+ adm_params.hdr.dest_svc = APR_SVC_ADM;
+ adm_params.hdr.dest_domain = APR_DOMAIN_ADSP;
+ adm_params.hdr.dest_port = atomic_read(&this_adm.copp_id[index]);
+ adm_params.hdr.token = port_id;
+ adm_params.hdr.opcode = ADM_CMD_SET_PP_PARAMS_V5;
+ adm_params.payload_addr_lsw = aud_cal->cal_paddr;
+ adm_params.payload_addr_msw = 0;
+ adm_params.mem_map_handle = atomic_read(&mem_map_handles[
+ atomic_read(&mem_map_index)]);
+ adm_params.payload_size = aud_cal->cal_size;
+
+ atomic_set(&this_adm.copp_stat[index], 0);
+ pr_debug("%s: Sending SET_PARAMS payload = 0x%x, size = %d\n",
+ __func__, adm_params.payload_addr_lsw,
+ adm_params.payload_size);
+ result = apr_send_pkt(this_adm.apr, (uint32_t *)&adm_params);
+ if (result < 0) {
+ pr_err("%s: Set params failed port = %d payload = 0x%x\n",
+ __func__, port_id, aud_cal->cal_paddr);
+ result = -EINVAL;
+ goto done;
+ }
+ /* Wait for the callback */
+ result = wait_event_timeout(this_adm.wait[index],
+ atomic_read(&this_adm.copp_stat[index]),
+ msecs_to_jiffies(TIMEOUT_MS));
+ if (!result) {
+ pr_err("%s: Set params timed out port = %d, payload = 0x%x\n",
+ __func__, port_id, aud_cal->cal_paddr);
+ result = -EINVAL;
+ goto done;
+ }
+
+ result = 0;
+done:
+ return result;
+}
+
static void send_adm_cal(int port_id, int path)
{
- /* function to be defined when calibration available for 8974 */
+ int result = 0;
+ s32 acdb_path;
+ struct acdb_cal_block aud_cal;
+ int size = 4096;
pr_debug("%s\n", __func__);
+
+ /* Maps audio_dev_ctrl path definition to ACDB definition */
+ acdb_path = path - 1;
+
+ pr_debug("%s: Sending audproc cal\n", __func__);
+ get_audproc_cal(acdb_path, &aud_cal);
+
+ /* map & cache buffers used */
+ if (((mem_addr_audproc[acdb_path].cal_paddr != aud_cal.cal_paddr) &&
+ (aud_cal.cal_size > 0)) ||
+ (aud_cal.cal_size > mem_addr_audproc[acdb_path].cal_size)) {
+
+ atomic_set(&mem_map_index, acdb_path);
+ if (mem_addr_audproc[acdb_path].cal_paddr != 0)
+ adm_memory_unmap_regions(port_id,
+ &mem_addr_audproc[acdb_path].cal_paddr,
+ &size, 1);
+
+ result = adm_memory_map_regions(port_id, &aud_cal.cal_paddr,
+ 0, &aud_cal.cal_size, 1);
+ if (result < 0)
+ pr_err("ADM audproc mmap did not work! path = %d, addr = 0x%x, size = %d\n",
+ acdb_path, aud_cal.cal_paddr,
+ aud_cal.cal_size);
+ else
+ mem_addr_audproc[acdb_path] = aud_cal;
+ }
+
+ if (!send_adm_cal_block(port_id, &aud_cal))
+ pr_debug("%s: Audproc cal sent for port id: %d, path %d\n",
+ __func__, port_id, acdb_path);
+ else
+ pr_debug("%s: Audproc cal not sent for port id: %d, path %d\n",
+ __func__, port_id, acdb_path);
+
+ pr_debug("%s: Sending audvol cal\n", __func__);
+ get_audvol_cal(acdb_path, &aud_cal);
+
+ /* map & cache buffers used */
+ if (((mem_addr_audvol[acdb_path].cal_paddr != aud_cal.cal_paddr) &&
+ (aud_cal.cal_size > 0)) ||
+ (aud_cal.cal_size > mem_addr_audvol[acdb_path].cal_size)) {
+
+ atomic_set(&mem_map_index, (acdb_path + MAX_AUDPROC_TYPES));
+ if (mem_addr_audvol[acdb_path].cal_paddr != 0)
+ adm_memory_unmap_regions(port_id,
+ &mem_addr_audvol[acdb_path].cal_paddr,
+ &size, 1);
+
+ result = adm_memory_map_regions(port_id, &aud_cal.cal_paddr,
+ 0, &aud_cal.cal_size, 1);
+ if (result < 0)
+ pr_err("ADM audvol mmap did not work! path = %d, addr = 0x%x, size = %d\n",
+ acdb_path, aud_cal.cal_paddr,
+ aud_cal.cal_size);
+ else
+ mem_addr_audvol[acdb_path] = aud_cal;
+ }
+
+ if (!send_adm_cal_block(port_id, &aud_cal))
+ pr_debug("%s: Audvol cal sent for port id: %d, path %d\n",
+ __func__, port_id, acdb_path);
+ else
+ pr_debug("%s: Audvol cal not sent for port id: %d, path %d\n",
+ __func__, port_id, acdb_path);
}
int adm_connect_afe_port(int mode, int session_id, int port_id)
@@ -572,7 +736,8 @@
unmap_regions.hdr.dest_port = 0;
unmap_regions.hdr.token = 0;
unmap_regions.hdr.opcode = ADM_CMD_SHARED_MEM_UNMAP_REGIONS;
- unmap_regions.mem_map_handle = this_adm.mem_map_handle[index];
+ unmap_regions.mem_map_handle = atomic_read(&mem_map_handles[
+ atomic_read(&mem_map_index)]);
atomic_set(&this_adm.copp_stat[0], 0);
ret = apr_send_pkt(this_adm.apr, (uint32_t *) &unmap_regions);
if (ret < 0) {
diff --git a/sound/soc/msm/qdsp6v2/q6afe.c b/sound/soc/msm/qdsp6v2/q6afe.c
index 0b25545..f0465a5 100644
--- a/sound/soc/msm/qdsp6v2/q6afe.c
+++ b/sound/soc/msm/qdsp6v2/q6afe.c
@@ -18,6 +18,7 @@
#include <linux/wait.h>
#include <linux/jiffies.h>
#include <linux/sched.h>
+#include <linux/msm_ion.h>
#include <mach/qdsp6v2/audio_acdb.h>
#include <sound/apr_audio-v2.h>
#include <sound/q6afe-v2.h>
@@ -37,6 +38,7 @@
uint32_t token, uint32_t *payload, void *priv);
void *tx_private_data;
void *rx_private_data;
+ uint32_t mmap_handle;
};
static struct afe_ctl this_afe;
@@ -107,6 +109,13 @@
payload[0]);
break;
}
+ } else if (data->opcode ==
+ AFE_SERVICE_CMDRSP_SHARED_MEM_MAP_REGIONS) {
+ pr_debug("%s: mmap_handle: 0x%x\n",
+ __func__, payload[0]);
+ this_afe.mmap_handle = (uint32_t)payload[0];
+ atomic_set(&this_afe.state, 0);
+ wake_up(&this_afe.wait[data->token]);
} else if (data->opcode == AFE_EVENT_RT_PROXY_PORT_STATUS) {
port_id = (uint16_t)(0x0000FFFF & payload[0]);
}
@@ -266,17 +275,21 @@
ret = -EINVAL;
return ret;
}
- index = q6audio_get_port_index(port_id);
- if (q6audio_validate_port(port_id) < 0)
- return -EINVAL;
if ((port_id == RT_PROXY_DAI_001_RX) ||
(port_id == RT_PROXY_DAI_002_TX))
- return -EINVAL;
+ return 0;
if ((port_id == RT_PROXY_DAI_002_RX) ||
(port_id == RT_PROXY_DAI_001_TX))
port_id = VIRTUAL_ID_TO_PORTID(port_id);
+ pr_debug("%s: port id: %d\n", __func__, port_id);
+ index = q6audio_get_port_index(port_id);
+ if (q6audio_validate_port(port_id) < 0) {
+ pr_err("%s: port id: %d\n", __func__, port_id);
+ return -EINVAL;
+ }
+
ret = afe_q6_interface_prepare();
if (IS_ERR_VALUE(ret))
return ret;
@@ -325,6 +338,14 @@
case SLIMBUS_4_TX:
cfg_type = AFE_PARAM_ID_SLIMBUS_CONFIG;
break;
+ case RT_PROXY_PORT_001_RX:
+ case RT_PROXY_PORT_001_TX:
+ cfg_type = AFE_PARAM_ID_RT_PROXY_CONFIG;
+ break;
+ case INT_BT_SCO_RX:
+ case INT_BT_SCO_TX:
+ cfg_type = AFE_PARAM_ID_INTERNAL_BT_FM_CONFIG;
+ break;
default:
pr_err("%s: Invalid port id 0x%x\n", __func__, port_id);
ret = -EINVAL;
@@ -904,7 +925,133 @@
return 0;
}
-/*bharath, memory map handle needs to be stored by AFE client */
+uint32_t afe_req_mmap_handle(void)
+{
+ return this_afe.mmap_handle;
+}
+
+struct afe_audio_client *q6afe_audio_client_alloc(void *priv)
+{
+ struct afe_audio_client *ac;
+ int lcnt = 0;
+
+ ac = kzalloc(sizeof(struct afe_audio_client), GFP_KERNEL);
+ if (!ac) {
+ pr_err("%s: cannot allocate audio client for afe\n", __func__);
+ return NULL;
+ }
+ ac->priv = priv;
+
+ init_waitqueue_head(&ac->cmd_wait);
+ INIT_LIST_HEAD(&ac->port[0].mem_map_handle);
+ INIT_LIST_HEAD(&ac->port[1].mem_map_handle);
+ pr_debug("%s: mem_map_handle list init'ed\n", __func__);
+ mutex_init(&ac->cmd_lock);
+ for (lcnt = 0; lcnt <= OUT; lcnt++) {
+ mutex_init(&ac->port[lcnt].lock);
+ spin_lock_init(&ac->port[lcnt].dsp_lock);
+ }
+ atomic_set(&ac->cmd_state, 0);
+
+ return ac;
+}
+
+int q6afe_audio_client_buf_alloc_contiguous(unsigned int dir,
+ struct afe_audio_client *ac,
+ unsigned int bufsz,
+ unsigned int bufcnt)
+{
+ int cnt = 0;
+ int rc = 0;
+ struct afe_audio_buffer *buf;
+ int len;
+
+ if (!(ac) || ((dir != IN) && (dir != OUT)))
+ return -EINVAL;
+
+ pr_debug("%s: bufsz[%d]bufcnt[%d]\n",
+ __func__,
+ bufsz, bufcnt);
+
+ if (ac->port[dir].buf) {
+ pr_debug("%s: buffer already allocated\n", __func__);
+ return 0;
+ }
+ mutex_lock(&ac->cmd_lock);
+ buf = kzalloc(((sizeof(struct afe_audio_buffer))*bufcnt),
+ GFP_KERNEL);
+
+ if (!buf) {
+ mutex_unlock(&ac->cmd_lock);
+ goto fail;
+ }
+
+ ac->port[dir].buf = buf;
+
+ buf[0].client = msm_ion_client_create(UINT_MAX, "audio_client");
+ if (IS_ERR_OR_NULL((void *)buf[0].client)) {
+ pr_err("%s: ION create client for AUDIO failed\n", __func__);
+ goto fail;
+ }
+ buf[0].handle = ion_alloc(buf[0].client, bufsz * bufcnt, SZ_4K,
+ (0x1 << ION_AUDIO_HEAP_ID), 0);
+ if (IS_ERR_OR_NULL((void *) buf[0].handle)) {
+ pr_err("%s: ION memory allocation for AUDIO failed\n",
+ __func__);
+ goto fail;
+ }
+
+ rc = ion_phys(buf[0].client, buf[0].handle,
+ (ion_phys_addr_t *)&buf[0].phys, (size_t *)&len);
+ if (rc) {
+ pr_err("%s: ION Get Physical for AUDIO failed, rc = %d\n",
+ __func__, rc);
+ goto fail;
+ }
+
+ buf[0].data = ion_map_kernel(buf[0].client, buf[0].handle);
+ if (IS_ERR_OR_NULL((void *) buf[0].data)) {
+ pr_err("%s: ION memory mapping for AUDIO failed\n", __func__);
+ goto fail;
+ }
+ memset((void *)buf[0].data, 0, (bufsz * bufcnt));
+ if (!buf[0].data) {
+ pr_err("%s:invalid vaddr, iomap failed\n", __func__);
+ mutex_unlock(&ac->cmd_lock);
+ goto fail;
+ }
+
+ buf[0].used = dir ^ 1;
+ buf[0].size = bufsz;
+ buf[0].actual_size = bufsz;
+ cnt = 1;
+ while (cnt < bufcnt) {
+ if (bufsz > 0) {
+ buf[cnt].data = buf[0].data + (cnt * bufsz);
+ buf[cnt].phys = buf[0].phys + (cnt * bufsz);
+ if (!buf[cnt].data) {
+ pr_err("%s Buf alloc failed\n",
+ __func__);
+ mutex_unlock(&ac->cmd_lock);
+ goto fail;
+ }
+ buf[cnt].used = dir ^ 1;
+ buf[cnt].size = bufsz;
+ buf[cnt].actual_size = bufsz;
+ pr_debug("%s data[%p]phys[%p][%p]\n", __func__,
+ (void *)buf[cnt].data,
+ (void *)buf[cnt].phys,
+ (void *)&buf[cnt].phys);
+ }
+ cnt++;
+ }
+ ac->port[dir].max_buf_cnt = cnt;
+ mutex_unlock(&ac->cmd_lock);
+ return 0;
+fail:
+ q6afe_audio_client_buf_free_contiguous(dir, ac);
+ return -EINVAL;
+}
int afe_cmd_memory_map(u32 dma_addr_p, u32 dma_buf_sz)
{
int ret = 0;
@@ -941,7 +1088,7 @@
mmap_region_cmd;
mregion->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
- mregion->hdr.pkt_size = sizeof(mregion);
+ mregion->hdr.pkt_size = cmd_size;
mregion->hdr.src_port = 0;
mregion->hdr.dest_port = 0;
mregion->hdr.token = 0;
@@ -961,13 +1108,15 @@
mregion_pl->shm_addr_msw = 0x00;
mregion_pl->mem_size_bytes = dma_buf_sz;
+ pr_debug("%s: dma_addr_p 0x%x , size %d\n", __func__,
+ dma_addr_p, dma_buf_sz);
atomic_set(&this_afe.state, 1);
ret = apr_send_pkt(this_afe.apr, (uint32_t *) mmap_region_cmd);
if (ret < 0) {
pr_err("%s: AFE memory map cmd failed %d\n",
__func__, ret);
ret = -EINVAL;
- return ret;
+ goto fail_cmd;
}
ret = wait_event_timeout(this_afe.wait[index],
@@ -976,10 +1125,13 @@
if (!ret) {
pr_err("%s: wait_event timeout\n", __func__);
ret = -EINVAL;
- return ret;
+ goto fail_cmd;
}
-
+ pr_debug("%s: mmap handle 0x%x\n", __func__, this_afe.mmap_handle);
return 0;
+fail_cmd:
+ kfree(mmap_region_cmd);
+ return ret;
}
int afe_cmd_memory_map_nowait(int port_id, u32 dma_addr_p, u32 dma_buf_sz)
@@ -1047,6 +1199,60 @@
}
return 0;
}
+int q6afe_audio_client_buf_free_contiguous(unsigned int dir,
+ struct afe_audio_client *ac)
+{
+ struct afe_audio_port_data *port;
+ int cnt = 0;
+ mutex_lock(&ac->cmd_lock);
+ port = &ac->port[dir];
+ if (!port->buf) {
+ mutex_unlock(&ac->cmd_lock);
+ return 0;
+ }
+ cnt = port->max_buf_cnt - 1;
+
+ if (port->buf[0].data) {
+ ion_unmap_kernel(port->buf[0].client, port->buf[0].handle);
+ ion_free(port->buf[0].client, port->buf[0].handle);
+ ion_client_destroy(port->buf[0].client);
+ pr_debug("%s:data[%p]phys[%p][%p] , client[%p] handle[%p]\n",
+ __func__,
+ (void *)port->buf[0].data,
+ (void *)port->buf[0].phys,
+ (void *)&port->buf[0].phys,
+ (void *)port->buf[0].client,
+ (void *)port->buf[0].handle);
+ }
+
+ while (cnt >= 0) {
+ port->buf[cnt].data = NULL;
+ port->buf[cnt].phys = 0;
+ cnt--;
+ }
+ port->max_buf_cnt = 0;
+ kfree(port->buf);
+ port->buf = NULL;
+ mutex_unlock(&ac->cmd_lock);
+ return 0;
+}
+
+void q6afe_audio_client_free(struct afe_audio_client *ac)
+{
+ int loopcnt;
+ struct afe_audio_port_data *port;
+ if (!ac)
+ return;
+ for (loopcnt = 0; loopcnt <= OUT; loopcnt++) {
+ port = &ac->port[loopcnt];
+ if (!port->buf)
+ continue;
+ pr_debug("%s:loopcnt = %d\n", __func__, loopcnt);
+ q6afe_audio_client_buf_free_contiguous(loopcnt, ac);
+ }
+ kfree(ac);
+ return;
+}
int afe_cmd_memory_unmap(u32 mem_map_handle)
{
@@ -1143,7 +1349,7 @@
int ret = 0;
struct afe_service_cmd_register_rt_port_driver rtproxy;
- pr_debug("%s:\n", __func__);
+ pr_debug("%s: port_id: %d\n", __func__, port_id);
if (this_afe.apr == NULL) {
this_afe.apr = apr_register("ADSP", "AFE", afe_callback,
@@ -1206,9 +1412,6 @@
return ret;
}
}
- index = q6audio_get_port_index(port_id);
- if (q6audio_validate_port(port_id) < 0)
- return -EINVAL;
if ((port_id == RT_PROXY_DAI_002_RX) ||
(port_id == RT_PROXY_DAI_001_TX))
@@ -1216,6 +1419,10 @@
else
return -EINVAL;
+ index = q6audio_get_port_index(port_id);
+ if (q6audio_validate_port(port_id) < 0)
+ return -EINVAL;
+
rtproxy.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
rtproxy.hdr.pkt_size = sizeof(rtproxy);
@@ -1318,6 +1525,7 @@
afecmd_rd.buffer_address_lsw = (uint32_t)buf_addr_p;
afecmd_rd.buffer_address_msw = 0x00;
afecmd_rd.available_bytes = bytes;
+ afecmd_rd.mem_map_handle = mem_map_handle;
ret = apr_send_pkt(this_afe.apr, (uint32_t *) &afecmd_rd);
if (ret < 0) {
@@ -1665,11 +1873,11 @@
}
pr_debug("%s: port_id=%d\n", __func__, port_id);
+ port_id = q6audio_convert_virtual_to_portid(port_id);
index = q6audio_get_port_index(port_id);
if (q6audio_validate_port(port_id) < 0)
return -EINVAL;
- port_id = q6audio_convert_virtual_to_portid(port_id);
stop.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
@@ -1708,6 +1916,7 @@
atomic_set(&this_afe.state, 0);
atomic_set(&this_afe.status, 0);
this_afe.apr = NULL;
+ this_afe.mmap_handle = 0;
for (i = 0; i < AFE_MAX_PORTS; i++)
init_waitqueue_head(&this_afe.wait[i]);
diff --git a/sound/soc/msm/qdsp6v2/q6asm.c b/sound/soc/msm/qdsp6v2/q6asm.c
index 714b2ce..0dd6faf 100644
--- a/sound/soc/msm/qdsp6v2/q6asm.c
+++ b/sound/soc/msm/qdsp6v2/q6asm.c
@@ -632,7 +632,7 @@
}
buf[cnt].handle = ion_alloc
(buf[cnt].client, bufsz, SZ_4K,
- (0x1 << ION_AUDIO_HEAP_ID));
+ (0x1 << ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL((void *)
buf[cnt].handle)) {
pr_err("%s: ION memory allocation for AUDIO failed\n",
@@ -652,8 +652,7 @@
}
buf[cnt].data = ion_map_kernel
- (buf[cnt].client, buf[cnt].handle,
- 0);
+ (buf[cnt].client, buf[cnt].handle);
if (IS_ERR_OR_NULL((void *)
buf[cnt].data)) {
pr_err("%s: ION memory mapping for AUDIO failed\n",
@@ -729,7 +728,7 @@
goto fail;
}
buf[0].handle = ion_alloc(buf[0].client, bufsz * bufcnt, SZ_4K,
- (0x1 << ION_AUDIO_HEAP_ID));
+ (0x1 << ION_AUDIO_HEAP_ID), 0);
if (IS_ERR_OR_NULL((void *) buf[0].handle)) {
pr_err("%s: ION memory allocation for AUDIO failed\n",
__func__);
@@ -744,7 +743,7 @@
goto fail;
}
- buf[0].data = ion_map_kernel(buf[0].client, buf[0].handle, 0);
+ buf[0].data = ion_map_kernel(buf[0].client, buf[0].handle);
if (IS_ERR_OR_NULL((void *) buf[0].data)) {
pr_err("%s: ION memory mapping for AUDIO failed\n", __func__);
goto fail;
@@ -820,6 +819,10 @@
}
sid = (data->token >> 8) & 0x0F;
ac = q6asm_get_audio_client(sid);
+ if (!ac) {
+ pr_debug("%s: session[%d] already freed\n", __func__, sid);
+ return 0;
+ }
pr_debug("%s:ptr0[0x%x]ptr1[0x%x]opcode[0x%x] token[0x%x]payload_s[%d] src[%d] dest[%d]sid[%d]dir[%d]\n",
__func__, payload[0], payload[1], data->opcode, data->token,
data->payload_size, data->src_port, data->dest_port, sid, dir);
diff --git a/sound/soc/msm/qdsp6v2/q6voice.c b/sound/soc/msm/qdsp6v2/q6voice.c
index f84b456..1f6dbf1 100644
--- a/sound/soc/msm/qdsp6v2/q6voice.c
+++ b/sound/soc/msm/qdsp6v2/q6voice.c
@@ -50,6 +50,15 @@
static int voice_send_set_device_cmd(struct voice_data *v);
static int voice_send_disable_vocproc_cmd(struct voice_data *v);
static int voice_send_vol_index_cmd(struct voice_data *v);
+static int voice_send_mvm_map_memory_physical_cmd(struct voice_data *v);
+static int voice_send_mvm_unmap_memory_physical_cmd(struct voice_data *v,
+ unsigned int bufcnt);
+static int voice_send_mvm_cal_network_cmd(struct voice_data *v);
+static int voice_send_mvm_media_type_cmd(struct voice_data *v);
+static int voice_send_cvs_data_exchange_mode_cmd(struct voice_data *v);
+static int voice_send_cvs_packet_exchange_config_cmd(struct voice_data *v);
+static int voice_set_packet_exchange_mode_and_config(uint16_t session_id,
+ uint32_t mode);
static int voice_cvs_stop_playback(struct voice_data *v);
static int voice_cvs_start_playback(struct voice_data *v);
static int voice_cvs_start_record(struct voice_data *v, uint32_t rec_mode);
@@ -594,7 +603,6 @@
detach_stream.detach_stream.handle = cvs_handle;
v->mvm_state = CMD_STATUS_FAIL;
-
ret = apr_send_pkt(apr_mvm, (uint32_t *) &detach_stream);
if (ret < 0) {
pr_err("%s: Error %d sending DETACH_STREAM\n",
@@ -608,6 +616,7 @@
pr_err("%s: wait event timeout\n", __func__);
goto fail;
}
+
/* Destroy CVS. */
pr_debug("%s: CVS destroy session\n", __func__);
@@ -622,7 +631,6 @@
cvs_destroy.opcode = APRV2_IBASIC_CMD_DESTROY_SESSION;
v->cvs_state = CMD_STATUS_FAIL;
-
ret = apr_send_pkt(apr_cvs, (uint32_t *) &cvs_destroy);
if (ret < 0) {
pr_err("%s: Error %d sending CVS DESTROY\n",
@@ -640,6 +648,13 @@
cvs_handle = 0;
voice_set_cvs_handle(v, cvs_handle);
+ ret = voice_send_mvm_unmap_memory_physical_cmd(v,
+ NUM_OF_BUFFERS);
+ if (ret < 0) {
+ pr_err("%s CMD Memory_unmap_regions failed %d\n",
+ __func__, ret);
+ }
+
/* Destroy MVM. */
pr_debug("MVM destroy session\n");
@@ -667,7 +682,6 @@
msecs_to_jiffies(TIMEOUT_MS));
if (!ret) {
pr_err("%s: wait event timeout\n", __func__);
-
goto fail;
}
mvm_handle = 0;
@@ -788,6 +802,58 @@
return 0;
}
+static int voice_send_mvm_media_type_cmd(struct voice_data *v)
+{
+ struct vss_imvm_cmd_set_cal_media_type_t mvm_set_cal_media_type;
+ int ret = 0;
+ void *apr_mvm;
+ u16 mvm_handle;
+
+ if (v == NULL) {
+ pr_err("%s: v is NULL\n", __func__);
+ return -EINVAL;
+ }
+ apr_mvm = common.apr_q6_mvm;
+
+ if (!apr_mvm) {
+ pr_err("%s: apr_mvm is NULL.\n", __func__);
+ return -EINVAL;
+ }
+ mvm_handle = voice_get_mvm_handle(v);
+
+ mvm_set_cal_media_type.hdr.hdr_field =
+ APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
+ APR_HDR_LEN(APR_HDR_SIZE),
+ APR_PKT_VER);
+ mvm_set_cal_media_type.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(mvm_set_cal_media_type) -
+ APR_HDR_SIZE);
+ mvm_set_cal_media_type.hdr.src_port = v->session_id;
+ mvm_set_cal_media_type.hdr.dest_port = mvm_handle;
+ mvm_set_cal_media_type.hdr.token = 0;
+ mvm_set_cal_media_type.hdr.opcode = VSS_IMVM_CMD_SET_CAL_MEDIA_TYPE;
+ mvm_set_cal_media_type.media_id = common.mvs_info.media_type;
+ pr_debug("%s: setting media_id as %x\n",
+ __func__ , mvm_set_cal_media_type.media_id);
+
+ v->mvm_state = CMD_STATUS_FAIL;
+ ret = apr_send_pkt(apr_mvm, (uint32_t *) &mvm_set_cal_media_type);
+ if (ret < 0) {
+ pr_err("%s: Error %d sending media type\n", __func__, ret);
+ goto fail;
+ }
+
+ ret = wait_event_timeout(v->mvm_wait,
+ (v->mvm_state == CMD_STATUS_SUCCESS),
+ msecs_to_jiffies(TIMEOUT_MS));
+ if (!ret) {
+ pr_err("%s: wait_event timeout %d\n", __func__, ret);
+ goto fail;
+ }
+ return 0;
+fail:
+ return -EINVAL;
+}
static int voice_config_cvs_vocoder(struct voice_data *v)
{
int ret = 0;
@@ -813,7 +879,8 @@
APR_HDR_LEN(APR_HDR_SIZE),
APR_PKT_VER);
cvs_set_media_cmd.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
- sizeof(cvs_set_media_cmd) - APR_HDR_SIZE);
+ sizeof(cvs_set_media_cmd) -
+ APR_HDR_SIZE);
cvs_set_media_cmd.hdr.src_port = v->session_id;
cvs_set_media_cmd.hdr.dest_port = cvs_handle;
cvs_set_media_cmd.hdr.token = 0;
@@ -826,7 +893,7 @@
ret = apr_send_pkt(apr_cvs, (uint32_t *) &cvs_set_media_cmd);
if (ret < 0) {
pr_err("%s: Error %d sending SET_MEDIA_TYPE\n",
- __func__, ret);
+ __func__, ret);
goto fail;
}
@@ -1196,6 +1263,102 @@
return -EINVAL;
}
+static int voice_send_mvm_map_memory_physical_cmd(struct voice_data *v)
+{
+ struct vss_imemory_cmd_map_physical_t mvm_map_phys_cmd;
+ uint32_t *memtable;
+ int ret = 0;
+ void *apr_mvm;
+ u16 mvm_handle;
+
+ if (v == NULL) {
+ pr_err("%s: v is NULL\n", __func__);
+ return -EINVAL;
+ }
+
+ apr_mvm = common.apr_q6_mvm;
+
+ if (!apr_mvm) {
+ pr_err("%s: apr_mvm is NULL.\n", __func__);
+ return -EINVAL;
+ }
+
+ if (!v->shmem_info.memtbl.data) {
+ pr_err("%s: shmem_info.memtbl.data is NULL.\n", __func__);
+ return -EINVAL;
+ }
+
+ memtable = (uint32_t *)v->shmem_info.memtbl.data;
+
+ /*
+ * Store next table descriptor's address(64 bit) as NULL as there
+ * is only one memory block
+ */
+ memtable[0] = (uint32_t)NULL;
+ memtable[1] = (uint32_t)NULL;
+
+ /* Store next table descriptor's size */
+ memtable[2] = 0;
+
+ /* Store shared mem add */
+ memtable[3] = v->shmem_info.sh_buf.buf[0].phys;
+ memtable[4] = 0;
+
+ /* Store shared memory size */
+ memtable[5] = v->shmem_info.sh_buf.buf[0].size * NUM_OF_BUFFERS;
+
+ mvm_handle = voice_get_mvm_handle(v);
+
+ mvm_map_phys_cmd.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
+ APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
+ mvm_map_phys_cmd.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(mvm_map_phys_cmd) - APR_HDR_SIZE);
+ mvm_map_phys_cmd.hdr.src_port = v->session_id;
+ mvm_map_phys_cmd.hdr.dest_port = mvm_handle;
+ mvm_map_phys_cmd.hdr.token = 0;
+ mvm_map_phys_cmd.hdr.opcode = VSS_IMEMORY_CMD_MAP_PHYSICAL;
+
+ mvm_map_phys_cmd.table_descriptor.mem_address =
+ v->shmem_info.memtbl.phys;
+ mvm_map_phys_cmd.table_descriptor.mem_size =
+ sizeof(struct vss_imemory_block_t) +
+ sizeof(struct vss_imemory_table_descriptor_t);
+ mvm_map_phys_cmd.is_cached = true;
+ mvm_map_phys_cmd.cache_line_size = 128;
+ mvm_map_phys_cmd.access_mask = 3;
+ mvm_map_phys_cmd.page_align = 4096;
+ mvm_map_phys_cmd.min_data_width = 8;
+ mvm_map_phys_cmd.max_data_width = 64;
+
+ pr_debug("%s: ntd->add: %lld, ntd->size: %d, table->add: 0x%x\n",
+ __func__,
+ *((uint64_t *)v->shmem_info.memtbl.data),
+ *(((uint32_t *)(v->shmem_info.memtbl.data)) + 2),
+ *(((uint32_t *)(v->shmem_info.memtbl.data)) + 3));
+ pr_debug("%s: table->size: %d, pkt_size: %d, mvm_handle: 0x%x\n",
+ __func__,
+ *(((uint32_t *)(v->shmem_info.memtbl.data)) + 5),
+ mvm_map_phys_cmd.hdr.pkt_size, mvm_handle);
+
+ v->mvm_state = CMD_STATUS_FAIL;
+ ret = apr_send_pkt(apr_mvm, (uint32_t *) &mvm_map_phys_cmd);
+ if (ret < 0) {
+ pr_err("Fail: sending mvm map phy cmd %d\n", ret);
+ goto fail;
+ }
+
+ ret = wait_event_timeout(v->mvm_wait,
+ (v->mvm_state == CMD_STATUS_SUCCESS),
+ msecs_to_jiffies(TIMEOUT_MS));
+ if (!ret) {
+ pr_err("%s: wait_event timeout %d\n", __func__, ret);
+ goto fail;
+ }
+
+ return 0;
+fail:
+ return -EINVAL;
+}
static int voice_setup_vocproc(struct voice_data *v)
{
@@ -1225,7 +1388,7 @@
cvp_session_cmd.hdr.dest_port = 0;
cvp_session_cmd.hdr.token = 0;
cvp_session_cmd.hdr.opcode =
- VSS_IVOCPROC_CMD_CREATE_FULL_CONTROL_SESSION;
+ VSS_IVOCPROC_CMD_CREATE_FULL_CONTROL_SESSION_V2;
/* Use default topology if invalid value in ACDB */
cvp_session_cmd.cvp_session.tx_topology_id =
@@ -1241,16 +1404,24 @@
VSS_IVOCPROC_TOPOLOGY_ID_RX_DEFAULT;
cvp_session_cmd.cvp_session.direction = 2; /*tx and rx*/
- cvp_session_cmd.cvp_session.network_id = VSS_NETWORK_ID_DEFAULT;
cvp_session_cmd.cvp_session.tx_port_id = v->dev_tx.port_id;
cvp_session_cmd.cvp_session.rx_port_id = v->dev_rx.port_id;
+ cvp_session_cmd.cvp_session.profile_id =
+ VSS_ICOMMON_CAL_NETWORK_ID_NONE;
+ cvp_session_cmd.cvp_session.vocproc_mode =
+ VSS_IVOCPROC_VOCPROC_MODE_EC_INT_MIXING;
+ cvp_session_cmd.cvp_session.ec_ref_port_id =
+ VSS_IVOCPROC_PORT_ID_NONE;
- pr_debug("topology=%d net_id=%d, dir=%d tx_port_id=%d, rx_port_id=%d\n",
+ pr_debug("tx_topology: %d tx_port_id=%d, rx_port_id=%d, mode: 0x%x\n",
cvp_session_cmd.cvp_session.tx_topology_id,
- cvp_session_cmd.cvp_session.network_id,
- cvp_session_cmd.cvp_session.direction,
cvp_session_cmd.cvp_session.tx_port_id,
- cvp_session_cmd.cvp_session.rx_port_id);
+ cvp_session_cmd.cvp_session.rx_port_id,
+ cvp_session_cmd.cvp_session.vocproc_mode);
+ pr_debug("rx_topology: %d, profile_id: 0x%x, pkt_size: %d\n",
+ cvp_session_cmd.cvp_session.rx_topology_id,
+ cvp_session_cmd.cvp_session.profile_id,
+ cvp_session_cmd.hdr.pkt_size);
v->cvp_state = CMD_STATUS_FAIL;
ret = apr_send_pkt(apr_cvp, (uint32_t *) &cvp_session_cmd);
@@ -1266,7 +1437,6 @@
goto fail;
}
-
/* enable vocproc */
ret = voice_send_enable_vocproc_cmd(v);
if (ret < 0)
@@ -1280,9 +1450,19 @@
/* send tty mode if tty device is used */
voice_send_tty_mode_cmd(v);
+ if (is_voip_session(v->session_id)) {
+ ret = voice_send_mvm_cal_network_cmd(v);
+ if (ret < 0)
+ pr_err("%s: voice_send_mvm_cal_network_cmd: %d\n",
+ __func__, ret);
- if (is_voip_session(v->session_id))
+ ret = voice_send_mvm_media_type_cmd(v);
+ if (ret < 0)
+ pr_err("%s: voice_send_mvm_media_type_cmd: %d\n",
+ __func__, ret);
+
voice_send_netid_timing_cmd(v);
+ }
/* Start in-call music delivery if this feature is enabled */
if (v->music_info.play_enable)
@@ -1350,6 +1530,55 @@
return -EINVAL;
}
+static int voice_send_mvm_cal_network_cmd(struct voice_data *v)
+{
+ struct vss_imvm_cmd_set_cal_network_t mvm_set_cal_network;
+ int ret = 0;
+ void *apr_mvm;
+ u16 mvm_handle;
+
+ if (v == NULL) {
+ pr_err("%s: v is NULL\n", __func__);
+ return -EINVAL;
+ }
+ apr_mvm = common.apr_q6_mvm;
+
+ if (!apr_mvm) {
+ pr_err("%s: apr_mvm is NULL.\n", __func__);
+ return -EINVAL;
+ }
+ mvm_handle = voice_get_mvm_handle(v);
+
+ mvm_set_cal_network.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
+ APR_HDR_LEN(APR_HDR_SIZE),
+ APR_PKT_VER);
+ mvm_set_cal_network.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(mvm_set_cal_network) - APR_HDR_SIZE);
+ mvm_set_cal_network.hdr.src_port = v->session_id;
+ mvm_set_cal_network.hdr.dest_port = mvm_handle;
+ mvm_set_cal_network.hdr.token = 0;
+ mvm_set_cal_network.hdr.opcode = VSS_IMVM_CMD_SET_CAL_NETWORK;
+ mvm_set_cal_network.network_id = VSS_ICOMMON_CAL_NETWORK_ID_NONE;
+
+ v->mvm_state = CMD_STATUS_FAIL;
+ ret = apr_send_pkt(apr_mvm, (uint32_t *) &mvm_set_cal_network);
+ if (ret < 0) {
+ pr_err("%s: Error %d sending SET_NETWORK\n", __func__, ret);
+ goto fail;
+ }
+
+ ret = wait_event_timeout(v->mvm_wait,
+ (v->mvm_state == CMD_STATUS_SUCCESS),
+ msecs_to_jiffies(TIMEOUT_MS));
+ if (!ret) {
+ pr_err("%s: wait_event timeout %d\n", __func__, ret);
+ goto fail;
+ }
+ return 0;
+fail:
+ return -EINVAL;
+}
+
static int voice_send_netid_timing_cmd(struct voice_data *v)
{
int ret = 0;
@@ -1590,10 +1819,177 @@
cvp_handle = 0;
voice_set_cvp_handle(v, cvp_handle);
+ return 0;
+fail:
+ return -EINVAL;
+}
+static int voice_send_mvm_unmap_memory_physical_cmd(struct voice_data *v,
+ unsigned int bufcnt)
+{
+ struct vss_imemory_cmd_unmap_t mem_unmap;
+ int ret = 0;
+ void *apr_mvm;
+ u16 mvm_handle;
+
+ if (v == NULL) {
+ pr_err("%s: v is NULL\n", __func__);
+ return -EINVAL;
+ }
+ apr_mvm = common.apr_q6_mvm;
+
+ if (!apr_mvm) {
+ pr_err("%s: apr_mvm is NULL.\n", __func__);
+ return -EINVAL;
+ }
+ mvm_handle = voice_get_mvm_handle(v);
+
+ mem_unmap.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
+ APR_HDR_LEN(APR_HDR_SIZE),
+ APR_PKT_VER);
+ mem_unmap.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(mem_unmap) - APR_HDR_SIZE);
+ mem_unmap.hdr.src_port = v->session_id;
+ mem_unmap.hdr.dest_port = mvm_handle;
+ mem_unmap.hdr.token = 0;
+ mem_unmap.hdr.opcode = VSS_IMEMORY_CMD_UNMAP;
+ mem_unmap.mem_handle = v->shmem_info.mem_handle;
+
+ pr_debug("%s: mem_handle: ox%x\n", __func__, mem_unmap.mem_handle);
+
+ v->mvm_state = CMD_STATUS_FAIL;
+ ret = apr_send_pkt(apr_mvm, (uint32_t *) &mem_unmap);
+ if (ret < 0) {
+ pr_err("mem_unmap op[0x%x]ret[%d]\n",
+ mem_unmap.hdr.opcode, ret);
+ goto fail;
+ }
+
+ ret = wait_event_timeout(v->mvm_wait,
+ (v->mvm_state == CMD_STATUS_SUCCESS),
+ msecs_to_jiffies(TIMEOUT_MS));
+ if (!ret) {
+ pr_err("%s: wait_event timeout %d\n", __func__, ret);
+ goto fail;
+ }
return 0;
fail:
+ return ret;
+}
+
+static int voice_send_cvs_packet_exchange_config_cmd(struct voice_data *v)
+{
+ struct vss_istream_cmd_set_oob_packet_exchange_config_t
+ packet_exchange_config_pkt;
+ int ret = 0;
+ uint64_t *dec_buf;
+ uint64_t *enc_buf;
+ void *apr_cvs;
+ u16 cvs_handle;
+ dec_buf = (uint64_t *)v->shmem_info.sh_buf.buf[0].phys;
+ enc_buf = (uint64_t *)v->shmem_info.sh_buf.buf[1].phys;
+
+ if (v == NULL) {
+ pr_err("%s: v is NULL\n", __func__);
+ return -EINVAL;
+ }
+ apr_cvs = common.apr_q6_cvs;
+
+ if (!apr_cvs) {
+ pr_err("%s: apr_cvs is NULL.\n", __func__);
+ return -EINVAL;
+ }
+ cvs_handle = voice_get_cvs_handle(v);
+
+ packet_exchange_config_pkt.hdr.hdr_field = APR_HDR_FIELD(
+ APR_MSG_TYPE_SEQ_CMD,
+ APR_HDR_LEN(APR_HDR_SIZE),
+ APR_PKT_VER);
+ packet_exchange_config_pkt.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(packet_exchange_config_pkt) -
+ APR_HDR_SIZE);
+ packet_exchange_config_pkt.hdr.src_port = v->session_id;
+ packet_exchange_config_pkt.hdr.dest_port = cvs_handle;
+ packet_exchange_config_pkt.hdr.token = 0;
+ packet_exchange_config_pkt.hdr.opcode =
+ VSS_ISTREAM_CMD_SET_OOB_PACKET_EXCHANGE_CONFIG;
+ packet_exchange_config_pkt.mem_handle = v->shmem_info.mem_handle;
+ packet_exchange_config_pkt.dec_buf_addr = (uint32_t)dec_buf;
+ packet_exchange_config_pkt.dec_buf_size = 4096;
+ packet_exchange_config_pkt.enc_buf_addr = (uint32_t)enc_buf;
+ packet_exchange_config_pkt.enc_buf_size = 4096;
+
+ pr_debug("%s: dec buf: add %p, size %d, enc buf: add %p, size %d\n",
+ __func__,
+ dec_buf,
+ packet_exchange_config_pkt.dec_buf_size,
+ enc_buf,
+ packet_exchange_config_pkt.enc_buf_size);
+
+ v->cvs_state = CMD_STATUS_FAIL;
+ ret = apr_send_pkt(apr_cvs, (uint32_t *) &packet_exchange_config_pkt);
+ if (ret < 0) {
+ pr_err("Failed to send packet exchange config cmd %d\n", ret);
+ goto fail;
+ }
+
+ ret = wait_event_timeout(v->cvs_wait,
+ (v->cvs_state == CMD_STATUS_SUCCESS),
+ msecs_to_jiffies(TIMEOUT_MS));
+ if (!ret)
+ pr_err("%s: wait_event timeout %d\n", __func__, ret);
+
+ return 0;
+fail:
+ return -EINVAL;
+}
+
+static int voice_send_cvs_data_exchange_mode_cmd(struct voice_data *v)
+{
+ struct vss_istream_cmd_set_packet_exchange_mode_t data_exchange_pkt;
+ int ret = 0;
+ void *apr_cvs;
+ u16 cvs_handle;
+
+ if (v == NULL) {
+ pr_err("%s: v is NULL\n", __func__);
+ return -EINVAL;
+ }
+ apr_cvs = common.apr_q6_cvs;
+
+ if (!apr_cvs) {
+ pr_err("%s: apr_cvs is NULL.\n", __func__);
+ return -EINVAL;
+ }
+ cvs_handle = voice_get_cvs_handle(v);
+
+ data_exchange_pkt.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
+ APR_HDR_LEN(APR_HDR_SIZE),
+ APR_PKT_VER);
+ data_exchange_pkt.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(data_exchange_pkt) - APR_HDR_SIZE);
+ data_exchange_pkt.hdr.src_port = v->session_id;
+ data_exchange_pkt.hdr.dest_port = cvs_handle;
+ data_exchange_pkt.hdr.token = 0;
+ data_exchange_pkt.hdr.opcode = VSS_ISTREAM_CMD_SET_PACKET_EXCHANGE_MODE;
+ data_exchange_pkt.mode = VSS_ISTREAM_PACKET_EXCHANGE_MODE_OUT_OF_BAND;
+
+ v->cvs_state = CMD_STATUS_FAIL;
+ ret = apr_send_pkt(apr_cvs, (uint32_t *) &data_exchange_pkt);
+ if (ret < 0) {
+ pr_err("Failed to send data exchange mode %d\n", ret);
+ goto fail;
+ }
+
+ ret = wait_event_timeout(v->cvs_wait,
+ (v->cvs_state == CMD_STATUS_SUCCESS),
+ msecs_to_jiffies(TIMEOUT_MS));
+ if (!ret)
+ pr_err("%s: wait_event timeout %d\n", __func__, ret);
+
+ return 0;
+fail:
return -EINVAL;
}
@@ -1878,7 +2274,6 @@
return 0;
fail:
-
return ret;
}
@@ -2202,16 +2597,54 @@
pr_err("%s: set device failed\n", __func__);
goto fail;
}
- /* send tty mode if tty device is used */
- voice_send_tty_mode_cmd(v);
- v->voc_state = VOC_RUN;
+ ret = voice_send_enable_vocproc_cmd(v);
+ if (ret < 0) {
+ pr_err("%s: enable vocproc failed %d\n", __func__, ret);
+ goto fail;
+ }
+
+ /* Send tty mode if tty device is used */
+ voice_send_tty_mode_cmd(v);
+
+ v->voc_state = VOC_RUN;
}
fail:
mutex_unlock(&v->lock);
+ return ret;
+}
+
+static int voice_set_packet_exchange_mode_and_config(uint16_t session_id,
+ uint32_t mode)
+{
+ struct voice_data *v = voice_get_session(session_id);
+ int ret = 0;
+
+ if (v == NULL) {
+ pr_err("%s: invalid session_id 0x%x\n", __func__, session_id);
+ return -EINVAL;
+ }
+
+ if (v->voc_state != VOC_RUN)
+ ret = voice_send_cvs_data_exchange_mode_cmd(v);
+
+ if (ret) {
+ pr_err("%s: Error voice_send_data_exchange_mode_cmd %d\n",
+ __func__, ret);
+ goto fail;
+ }
+
+ ret = voice_send_cvs_packet_exchange_config_cmd(v);
+ if (ret) {
+ pr_err("%s: Error: voice_send_packet_exchange_config_cmd %d\n",
+ __func__, ret);
+ goto fail;
+ }
return ret;
+fail:
+ return -EINVAL;
}
int voc_set_tx_mute(uint16_t session_id, uint32_t dir, uint32_t mute)
@@ -2552,6 +2985,22 @@
pr_err("create mvm and cvs failed\n");
goto fail;
}
+ if (is_voip_session(session_id)) {
+ ret = voice_send_mvm_map_memory_physical_cmd(v);
+ if (ret) {
+ pr_err("%s: mvm_map_memory_phy failed %d\n",
+ __func__, ret);
+ goto fail;
+ }
+ ret = voice_set_packet_exchange_mode_and_config(
+ session_id,
+ VSS_ISTREAM_PACKET_EXCHANGE_MODE_OUT_OF_BAND);
+ if (ret) {
+ pr_err("%s: Err: exchange_mode_and_config %d\n",
+ __func__, ret);
+ goto fail;
+ }
+ }
ret = voice_send_dual_control_cmd(v);
if (ret < 0) {
pr_err("Err Dual command failed\n");
@@ -2570,7 +3019,8 @@
v->voc_state = VOC_RUN;
}
-fail: mutex_unlock(&v->lock);
+fail:
+ mutex_unlock(&v->lock);
return ret;
}
@@ -2638,6 +3088,7 @@
if (data->payload_size) {
ptr = data->payload;
+ pr_info("%x %x\n", ptr[0], ptr[1]);
/* ping mvm service ACK */
switch (ptr[0]) {
case VSS_IMVM_CMD_CREATE_PASSIVE_CONTROL_SESSION:
@@ -2666,6 +3117,9 @@
case VSS_ICOMMON_CMD_SET_VOICE_TIMING:
case VSS_IWIDEVOICE_CMD_SET_WIDEVOICE:
case VSS_IMVM_CMD_SET_POLICY_DUAL_CONTROL:
+ case VSS_IMVM_CMD_SET_CAL_NETWORK:
+ case VSS_IMVM_CMD_SET_CAL_MEDIA_TYPE:
+ case VSS_IMEMORY_CMD_UNMAP:
pr_debug("%s: cmd = 0x%x\n", __func__, ptr[0]);
v->mvm_state = CMD_STATUS_SUCCESS;
wake_up(&v->mvm_wait);
@@ -2676,8 +3130,19 @@
break;
}
}
+ } else if (data->opcode == VSS_IMEMORY_RSP_MAP) {
+ pr_debug("%s, Revd VSS_IMEMORY_RSP_MAP response\n", __func__);
+ if (data->payload_size) {
+ ptr = data->payload;
+ if (ptr[0]) {
+ v->shmem_info.mem_handle = ptr[0];
+ pr_debug("%s: shared mem_handle: 0x[%x]\n",
+ __func__, v->shmem_info.mem_handle);
+ v->mvm_state = CMD_STATUS_SUCCESS;
+ wake_up(&v->mvm_wait);
+ }
+ }
}
-
return 0;
}
@@ -2725,6 +3190,7 @@
if (data->payload_size) {
ptr = data->payload;
+ pr_info("%x %x\n", ptr[0], ptr[1]);
/*response from CVS */
switch (ptr[0]) {
case VSS_ISTREAM_CMD_CREATE_PASSIVE_CONTROL_SESSION:
@@ -2754,6 +3220,8 @@
case VSS_ISTREAM_CMD_STOP_PLAYBACK:
case VSS_ISTREAM_CMD_START_RECORD:
case VSS_ISTREAM_CMD_STOP_RECORD:
+ case VSS_ISTREAM_CMD_SET_PACKET_EXCHANGE_MODE:
+ case VSS_ISTREAM_CMD_SET_OOB_PACKET_EXCHANGE_CONFIG:
pr_debug("%s: cmd = 0x%x\n", __func__, ptr[0]);
v->cvs_state = CMD_STATUS_SUCCESS;
wake_up(&v->cvs_wait);
@@ -2765,63 +3233,117 @@
break;
}
}
- } else if (data->opcode == VSS_ISTREAM_EVT_SEND_ENC_BUFFER) {
- uint32_t *voc_pkt = data->payload;
- uint32_t pkt_len = data->payload_size;
-
- if (voc_pkt != NULL && c->mvs_info.ul_cb != NULL) {
- pr_debug("%s: Media type is 0x%x\n",
- __func__, voc_pkt[0]);
-
- /* Remove media ID from payload. */
- voc_pkt++;
- pkt_len = pkt_len - 4;
-
- c->mvs_info.ul_cb((uint8_t *)voc_pkt,
- pkt_len,
- c->mvs_info.private_data);
- } else
- pr_err("%s: voc_pkt is 0x%x ul_cb is 0x%x\n",
- __func__, (unsigned int)voc_pkt,
- (unsigned int) c->mvs_info.ul_cb);
- } else if (data->opcode == VSS_ISTREAM_EVT_REQUEST_DEC_BUFFER) {
- struct cvs_send_dec_buf_cmd send_dec_buf;
+ } else if (data->opcode ==
+ VSS_ISTREAM_EVT_OOB_NOTIFY_ENC_BUFFER_READY) {
int ret = 0;
- uint32_t pkt_len = 0;
+ u16 cvs_handle;
+ uint32_t *cvs_voc_pkt;
+ struct cvs_enc_buffer_consumed_cmd send_enc_buf_consumed_cmd;
+ void *apr_cvs;
- if (c->mvs_info.dl_cb != NULL) {
- send_dec_buf.dec_buf.media_id = c->mvs_info.media_type;
+ pr_debug("Encoder buffer is ready\n");
- c->mvs_info.dl_cb(
- (uint8_t *)&send_dec_buf.dec_buf.packet_data,
- &pkt_len,
- c->mvs_info.private_data);
+ apr_cvs = common.apr_q6_cvs;
+ if (!apr_cvs) {
+ pr_err("%s: apr_cvs is NULL\n", __func__);
+ return -EINVAL;
+ }
+ cvs_handle = voice_get_cvs_handle(v);
- send_dec_buf.hdr.hdr_field =
- APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
- APR_HDR_LEN(APR_HDR_SIZE),
- APR_PKT_VER);
- send_dec_buf.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
- sizeof(send_dec_buf.dec_buf.media_id) + pkt_len);
- send_dec_buf.hdr.src_port = v->session_id;
- send_dec_buf.hdr.dest_port = voice_get_cvs_handle(v);
- send_dec_buf.hdr.token = 0;
- send_dec_buf.hdr.opcode =
- VSS_ISTREAM_EVT_SEND_DEC_BUFFER;
+ send_enc_buf_consumed_cmd.hdr.hdr_field =
+ APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
+ APR_HDR_LEN(APR_HDR_SIZE),
+ APR_PKT_VER);
+ send_enc_buf_consumed_cmd.hdr.pkt_size =
+ APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(send_enc_buf_consumed_cmd) - APR_HDR_SIZE);
- ret = apr_send_pkt(c->apr_q6_cvs,
- (uint32_t *) &send_dec_buf);
+ send_enc_buf_consumed_cmd.hdr.src_port = v->session_id;
+ send_enc_buf_consumed_cmd.hdr.dest_port = cvs_handle;
+ send_enc_buf_consumed_cmd.hdr.token = 0;
+ send_enc_buf_consumed_cmd.hdr.opcode =
+ VSS_ISTREAM_EVT_OOB_NOTIFY_ENC_BUFFER_CONSUMED;
+
+ cvs_voc_pkt = v->shmem_info.sh_buf.buf[1].data;
+ if (cvs_voc_pkt != NULL && common.mvs_info.ul_cb != NULL) {
+ common.mvs_info.ul_cb((uint8_t *)&cvs_voc_pkt[3],
+ cvs_voc_pkt[2],
+ common.mvs_info.private_data);
+ } else
+ pr_err("%s: cvs_voc_pkt or ul_cb is NULL\n", __func__);
+
+ ret = apr_send_pkt(apr_cvs,
+ (uint32_t *) &send_enc_buf_consumed_cmd);
+ if (ret < 0) {
+ pr_err("%s: Err send ENC_BUF_CONSUMED_NOTIFY %d\n",
+ __func__, ret);
+ goto fail;
+ }
+ } else if (data->opcode == VSS_ISTREAM_EVT_SEND_ENC_BUFFER) {
+ pr_debug("Recd VSS_ISTREAM_EVT_SEND_ENC_BUFFER\n");
+ } else if (data->opcode ==
+ VSS_ISTREAM_EVT_OOB_NOTIFY_DEC_BUFFER_REQUEST) {
+ int ret = 0;
+ u16 cvs_handle;
+ uint32_t *cvs_voc_pkt;
+ struct cvs_dec_buffer_ready_cmd send_dec_buf;
+ void *apr_cvs;
+ apr_cvs = common.apr_q6_cvs;
+
+ if (!apr_cvs) {
+ pr_err("%s: apr_cvs is NULL\n", __func__);
+ return -EINVAL;
+ }
+ cvs_handle = voice_get_cvs_handle(v);
+
+ send_dec_buf.hdr.hdr_field =
+ APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
+ APR_HDR_LEN(APR_HDR_SIZE),
+ APR_PKT_VER);
+
+ send_dec_buf.hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE,
+ sizeof(send_dec_buf) - APR_HDR_SIZE);
+
+ send_dec_buf.hdr.src_port = v->session_id;
+ send_dec_buf.hdr.dest_port = cvs_handle;
+ send_dec_buf.hdr.token = 0;
+ send_dec_buf.hdr.opcode =
+ VSS_ISTREAM_EVT_OOB_NOTIFY_DEC_BUFFER_READY;
+
+ cvs_voc_pkt = (uint32_t *)(v->shmem_info.sh_buf.buf[0].data);
+ if (cvs_voc_pkt != NULL && common.mvs_info.dl_cb != NULL) {
+ /* Set timestamp to 0 and advance the pointer */
+ cvs_voc_pkt[0] = 0;
+ /* Set media_type and advance the pointer */
+ cvs_voc_pkt[1] = common.mvs_info.media_type;
+ common.mvs_info.dl_cb(
+ (uint8_t *)&cvs_voc_pkt[2],
+ common.mvs_info.private_data);
+ ret = apr_send_pkt(apr_cvs, (uint32_t *) &send_dec_buf);
if (ret < 0) {
- pr_err("%s: Error %d sending DEC_BUF\n",
- __func__, ret);
+ pr_err("%s: Err send DEC_BUF_READY_NOTIFI %d\n",
+ __func__, ret);
goto fail;
}
- } else
- pr_debug("%s: dl_cb is NULL\n", __func__);
+ } else {
+ pr_debug("%s: voc_pkt or dl_cb is NULL\n", __func__);
+ goto fail;
+ }
+ } else if (data->opcode == VSS_ISTREAM_EVT_REQUEST_DEC_BUFFER) {
+ pr_debug("Recd VSS_ISTREAM_EVT_REQUEST_DEC_BUFFER\n");
} else if (data->opcode == VSS_ISTREAM_EVT_SEND_DEC_BUFFER) {
pr_debug("Send dec buf resp\n");
+ } else if (data->opcode == APR_RSP_ACCEPTED) {
+ ptr = data->payload;
+ if (ptr[0])
+ pr_debug("%s: APR_RSP_ACCEPTED for 0x%x:\n",
+ __func__, ptr[0]);
+ } else if (data->opcode == VSS_ISTREAM_EVT_NOT_READY) {
+ pr_debug("Recd VSS_ISTREAM_EVT_NOT_READY\n");
+ } else if (data->opcode == VSS_ISTREAM_EVT_READY) {
+ pr_debug("Recd VSS_ISTREAM_EVT_READY\n");
} else
- pr_debug("Unknown opcode 0x%x\n", data->opcode);
+ pr_err("Unknown opcode 0x%x\n", data->opcode);
fail:
return 0;
@@ -2869,13 +3391,15 @@
if (data->payload_size) {
ptr = data->payload;
+ pr_info("%x %x\n", ptr[0], ptr[1]);
switch (ptr[0]) {
- case VSS_IVOCPROC_CMD_CREATE_FULL_CONTROL_SESSION:
+ case VSS_IVOCPROC_CMD_CREATE_FULL_CONTROL_SESSION_V2:
/*response from CVP */
pr_debug("%s: cmd = 0x%x\n", __func__, ptr[0]);
if (!ptr[1]) {
voice_set_cvp_handle(v, data->src_port);
- pr_debug("cvphdl=%d\n", data->src_port);
+ pr_debug("status: %d, cvphdl=%d\n",
+ ptr[1], data->src_port);
} else
pr_err("got NACK from CVP create session response\n");
v->cvp_state = CMD_STATUS_SUCCESS;
@@ -2908,6 +3432,137 @@
return 0;
}
+static int voice_alloc_oob_shared_mem(void)
+{
+ int cnt = 0;
+ int rc = 0;
+ int len;
+ void *mem_addr;
+ dma_addr_t phys;
+ int bufsz = BUFFER_BLOCK_SIZE;
+ int bufcnt = NUM_OF_BUFFERS;
+ struct voice_data *v = voice_get_session(
+ common.voice[VOC_PATH_FULL].session_id);
+
+ v->shmem_info.sh_buf.client = msm_ion_client_create(UINT_MAX,
+ "voip_client");
+ if (IS_ERR_OR_NULL((void *)v->shmem_info.sh_buf.client)) {
+ pr_err("%s: ION create client failed\n", __func__);
+ goto err;
+ }
+
+ v->shmem_info.sh_buf.handle = ion_alloc(v->shmem_info.sh_buf.client,
+ bufsz * bufcnt, SZ_4K,
+ (0x1 << ION_AUDIO_HEAP_ID), 0);
+ if (IS_ERR_OR_NULL((void *)v->shmem_info.sh_buf.handle)) {
+ pr_err("%s: ION memory allocation failed\n",
+ __func__);
+ goto err_ion_client;
+ }
+
+ rc = ion_phys(v->shmem_info.sh_buf.client, v->shmem_info.sh_buf.handle,
+ (ion_phys_addr_t *)&phys, (size_t *)&len);
+ if (rc) {
+ pr_err("%s: ION Get Physical failed, rc = %d\n",
+ __func__, rc);
+ goto err_ion_handle;
+ }
+
+ mem_addr = ion_map_kernel(v->shmem_info.sh_buf.client,
+ v->shmem_info.sh_buf.handle);
+ if (IS_ERR_OR_NULL(mem_addr)) {
+ pr_err("%s: ION memory mapping failed\n", __func__);
+ goto err_ion_handle;
+ }
+
+ while (cnt < bufcnt) {
+ v->shmem_info.sh_buf.buf[cnt].data = mem_addr + (cnt * bufsz);
+ v->shmem_info.sh_buf.buf[cnt].phys = phys + (cnt * bufsz);
+ v->shmem_info.sh_buf.buf[cnt].size = bufsz;
+ cnt++;
+ }
+
+ pr_debug("%s buf[0].data:[%p], buf[0].phys:[%p], &buf[0].phys:[%p],\n",
+ __func__,
+ (void *)v->shmem_info.sh_buf.buf[0].data,
+ (void *)v->shmem_info.sh_buf.buf[0].phys,
+ (void *)&v->shmem_info.sh_buf.buf[0].phys);
+ pr_debug("%s: buf[1].data:[%p], buf[1].phys[%p], &buf[1].phys[%p]\n",
+ __func__,
+ (void *)v->shmem_info.sh_buf.buf[1].data,
+ (void *)v->shmem_info.sh_buf.buf[1].phys,
+ (void *)&v->shmem_info.sh_buf.buf[1].phys);
+
+ memset((void *)v->shmem_info.sh_buf.buf[0].data, 0, (bufsz * bufcnt));
+
+ return 0;
+
+err_ion_handle:
+ ion_free(v->shmem_info.sh_buf.client, v->shmem_info.sh_buf.handle);
+err_ion_client:
+ ion_client_destroy(v->shmem_info.sh_buf.client);
+err:
+ return -EINVAL;
+}
+
+static int voice_alloc_oob_mem_table(void)
+{
+ int rc = 0;
+ int len;
+ struct voice_data *v = voice_get_session(
+ common.voice[VOC_PATH_FULL].session_id);
+
+ v->shmem_info.memtbl.client = msm_ion_client_create(UINT_MAX,
+ "voip_client");
+ if (IS_ERR_OR_NULL((void *)v->shmem_info.memtbl.client)) {
+ pr_err("%s: ION create client for memtbl failed\n", __func__);
+ goto err;
+ }
+
+ v->shmem_info.memtbl.handle = ion_alloc(v->shmem_info.memtbl.client,
+ sizeof(struct vss_imemory_table_t), SZ_4K,
+ (0x1 << ION_AUDIO_HEAP_ID), 0);
+ if (IS_ERR_OR_NULL((void *) v->shmem_info.memtbl.handle)) {
+ pr_err("%s: ION memory allocation for memtbl failed\n",
+ __func__);
+ goto err_ion_client;
+ }
+
+ rc = ion_phys(v->shmem_info.memtbl.client, v->shmem_info.memtbl.handle,
+ (ion_phys_addr_t *)&v->shmem_info.memtbl.phys, (size_t *)&len);
+ if (rc) {
+ pr_err("%s: ION Get Physical for memtbl failed, rc = %d\n",
+ __func__, rc);
+ goto err_ion_handle;
+ }
+
+ v->shmem_info.memtbl.data = ion_map_kernel(v->shmem_info.memtbl.client,
+ v->shmem_info.memtbl.handle);
+ if (IS_ERR_OR_NULL((void *)v->shmem_info.memtbl.data)) {
+ pr_err("%s: ION memory mapping for memtbl failed\n",
+ __func__);
+ goto err_ion_handle;
+ }
+
+ memset(v->shmem_info.memtbl.data, 0,
+ sizeof(struct vss_imemory_table_t));
+
+ v->shmem_info.memtbl.size = sizeof(struct vss_imemory_table_t);
+
+ pr_debug("%s data[%p]phys[%p][%p]\n", __func__,
+ (void *)v->shmem_info.memtbl.data,
+ (void *)v->shmem_info.memtbl.phys,
+ (void *)&v->shmem_info.memtbl.phys);
+
+ return 0;
+
+err_ion_handle:
+ ion_free(v->shmem_info.memtbl.client, v->shmem_info.memtbl.handle);
+err_ion_client:
+ ion_client_destroy(v->shmem_info.memtbl.client);
+err:
+ return -EINVAL;
+}
static int __init voice_init(void)
{
@@ -2946,6 +3601,17 @@
mutex_init(&common.voice[i].lock);
}
+ /* Allocate shared memory for OOB Voip */
+ rc = voice_alloc_oob_shared_mem();
+ if (rc < 0)
+ pr_err("failed to alloc shared memory for OOB %d\n", rc);
+ else {
+ /* Allocate mem map table for OOB */
+ rc = voice_alloc_oob_mem_table();
+ if (rc < 0)
+ pr_err("failed to alloc mem map talbe %d\n", rc);
+ }
+
return rc;
}
diff --git a/sound/soc/msm/qdsp6v2/q6voice.h b/sound/soc/msm/qdsp6v2/q6voice.h
index 8bafe04..df0cbec 100644
--- a/sound/soc/msm/qdsp6v2/q6voice.h
+++ b/sound/soc/msm/qdsp6v2/q6voice.h
@@ -17,6 +17,13 @@
#define MAX_VOC_PKT_SIZE 642
#define SESSION_NAME_LEN 20
+#define NUM_OF_MEMORY_BLOCKS 1
+#define NUM_OF_BUFFERS 2
+/*
+ * BUFFER BLOCK SIZE based on
+ * the supported page size
+ */
+#define BUFFER_BLOCK_SIZE 4096
#define VOC_REC_UPLINK 0x00
#define VOC_REC_DOWNLINK 0x01
@@ -60,6 +67,26 @@
VOC_RELEASE,
};
+struct mem_buffer {
+ dma_addr_t phys;
+ void *data;
+ uint32_t size; /* size of buffer */
+};
+
+struct share_mem_buf {
+ struct ion_handle *handle;
+ struct ion_client *client;
+ struct mem_buffer buf[NUM_OF_BUFFERS];
+};
+
+struct mem_map_table {
+ dma_addr_t phys;
+ void *data;
+ uint32_t size; /* size of buffer */
+ struct ion_handle *handle;
+ struct ion_client *client;
+};
+
/* Common */
#define VSS_ICOMMON_CMD_SET_UI_PROPERTY 0x00011103
/* Set a UI property */
@@ -119,8 +146,6 @@
#define VSS_IMVM_CMD_CREATE_FULL_CONTROL_SESSION 0x000110FE
/* Create a new full control MVM session. */
-#define VSS_IVOCPROC_CMD_CREATE_FULL_CONTROL_SESSION_V2 0x000112BF
-
#define APRV2_IBASIC_CMD_DESTROY_SESSION 0x0001003C
/**< No payload. Wait for APRV2_IBASIC_RSP_RESULT response. */
@@ -165,6 +190,12 @@
#define VSS_IWIDEVOICE_CMD_SET_WIDEVOICE 0x00011243
/* Enable/disable WideVoice */
+#define VSS_IMEMORY_CMD_MAP_PHYSICAL 0x00011334
+#define VSS_IMEMORY_RSP_MAP 0x00011336
+#define VSS_IMEMORY_CMD_UNMAP 0x00011337
+#define VSS_IMVM_CMD_SET_CAL_NETWORK 0x0001137A
+#define VSS_IMVM_CMD_SET_CAL_MEDIA_TYPE 0x0001137B
+
enum msm_audio_voc_rate {
VOC_0_RATE, /* Blank frame */
VOC_8_RATE, /* 1/8 rate */
@@ -311,6 +342,92 @@
struct vss_iwidevoice_cmd_set_widevoice_t vss_set_wv;
} __packed;
+struct vss_imemory_table_descriptor_t {
+ uint64_t mem_address;
+ /*
+ * Base physical address of the table. The address must be aligned
+ * to LCM( cache_line_size, page_align, max_data_width ), where the
+ * attributes are specified in #VSS_IMEMORY_CMD_MAP_PHYSICAL, and
+ * LCM = Least Common Multiple. The table at the address must have
+ * the format specified by #vss_imemory_table_t.
+ */
+ uint32_t mem_size;
+ /* Size in bytes of the table. */
+} __packed;
+
+struct vss_imemory_block_t {
+ uint64_t mem_address;
+ /*
+ * Base address of the memory block. The address is virtual for virtual
+ * memory and physical for physical memory. The address must be aligned
+ * to LCM( cache_line_size, page_align, max_data_width ), where the
+ * attributes are specified in VSS_IMEMORY_CMD_MAP_VIRTUAL or
+ * VSS_IMEMORY_CMD_MAP_PHYSICAL, and LCM = Least Common Multiple.
+ */
+ uint32_t mem_size;
+ /*
+ * Size in bytes of the memory block. The size must be multiple of
+ * page_align, where page_align is specified in
+ * VSS_IMEMORY_CMD_MAP_VIRTUAL or #VSS_IMEMORY_CMD_MAP_PHYSICAL.
+ */
+} __packed;
+
+struct vss_imemory_table_t {
+ struct vss_imemory_table_descriptor_t next_table_descriptor;
+ /*
+ * Specifies the next table. If there is no next table,
+ * set the size of the table to 0 and the table address is ignored.
+ */
+ struct vss_imemory_block_t blocks[NUM_OF_MEMORY_BLOCKS];
+ /* Specifies one ore more memory blocks. */
+} __packed;
+
+struct vss_imemory_cmd_map_physical_t {
+ struct apr_hdr hdr;
+ struct vss_imemory_table_descriptor_t table_descriptor;
+ bool is_cached;
+ /*
+ * Indicates cached or uncached memory. Supported values:
+ * TRUE - Cached.
+ */
+ uint16_t cache_line_size;
+ /* Cache line size in bytes. Supported values: 128 */
+ uint32_t access_mask;
+ /*
+ * CVD's access permission to the memory while it is mapped.
+ * Supported values:
+ * bit 0 - If set, the memory is readable.
+ * bit 1 - If set, the memory is writable.
+ */
+ uint32_t page_align;
+ /* Page frame alignment in bytes. Supported values: 4096 */
+ uint8_t min_data_width;
+ /*
+ * Minimum native data type width in bits that can be accessed.
+ * Supported values: 8
+ */
+ uint8_t max_data_width;
+ /*
+ * Maximum native data type width in bits that can be accessed.
+ * Supported values: 64
+ */
+} __packed;
+
+struct vss_imvm_cmd_set_cal_network_t {
+ struct apr_hdr hdr;
+ uint32_t network_id;
+} __packed;
+
+struct vss_imvm_cmd_set_cal_media_type_t {
+ struct apr_hdr hdr;
+ uint32_t media_id;
+} __packed;
+
+struct vss_imemory_cmd_unmap_t {
+ struct apr_hdr hdr;
+ uint32_t mem_handle;
+} __packed;
+
/* TO CVS commands */
#define VSS_ISTREAM_CMD_CREATE_PASSIVE_CONTROL_SESSION 0x00011140
/**< Wait for APRV2_IBASIC_RSP_RESULT response. */
@@ -337,6 +454,8 @@
* The client should respond with a VSS_ISTREAM_EVT_SEND_DEC_BUFFER event.
*/
+#define VSS_ISTREAM_EVT_OOB_NOTIFY_DEC_BUFFER_REQUEST 0x0001136E
+
#define VSS_ISTREAM_EVT_SEND_DEC_BUFFER 0x00011016
/* Event sent by the client to the stream in response to a
* VSS_ISTREAM_EVT_REQUEST_DEC_BUFFER event, providing a decoder packet.
@@ -376,6 +495,29 @@
#define VSS_TAP_POINT_STREAM_END 0x00010F79
/* Indicates that specified path should be tapped at the end of the stream. */
+#define VSS_ISTREAM_EVT_NOT_READY 0x000110FD
+
+#define VSS_ISTREAM_EVT_READY 0x000110FC
+
+#define VSS_ISTREAM_EVT_OOB_NOTIFY_DEC_BUFFER_READY 0x0001136F
+/*notify dsp that decoder buffer is ready*/
+
+#define VSS_ISTREAM_EVT_OOB_NOTIFY_ENC_BUFFER_READY 0x0001136C
+/*dsp notifying client that encoder buffer is ready*/
+
+#define VSS_ISTREAM_EVT_OOB_NOTIFY_ENC_BUFFER_CONSUMED 0x0001136D
+/*notify dsp that encoder buffer is consumed*/
+
+#define VSS_ISTREAM_CMD_SET_OOB_PACKET_EXCHANGE_CONFIG 0x0001136B
+
+#define VSS_ISTREAM_PACKET_EXCHANGE_MODE_INBAND 0
+/* In-band packet exchange mode. */
+
+#define VSS_ISTREAM_PACKET_EXCHANGE_MODE_OUT_OF_BAND 1
+/* Out-of-band packet exchange mode. */
+
+#define VSS_ISTREAM_CMD_SET_PACKET_EXCHANGE_MODE 0x0001136A
+
struct vss_istream_cmd_start_record_t {
uint32_t rx_tap_point;
/* Tap point to use on the Rx path. Supported values are:
@@ -614,6 +756,28 @@
struct vss_istream_cmd_start_record_t rec_mode;
} __packed;
+struct cvs_dec_buffer_ready_cmd {
+ struct apr_hdr hdr;
+} __packed;
+
+struct cvs_enc_buffer_consumed_cmd {
+ struct apr_hdr hdr;
+} __packed;
+
+struct vss_istream_cmd_set_oob_packet_exchange_config_t {
+ struct apr_hdr hdr;
+ uint32_t mem_handle;
+ uint64_t enc_buf_addr;
+ uint32_t enc_buf_size;
+ uint64_t dec_buf_addr;
+ uint32_t dec_buf_size;
+} __packed;
+
+struct vss_istream_cmd_set_packet_exchange_mode_t {
+ struct apr_hdr hdr;
+ uint32_t mode;
+} __packed;
+
/* TO CVP commands */
#define VSS_IVOCPROC_CMD_CREATE_FULL_CONTROL_SESSION 0x000100C3
@@ -646,6 +810,17 @@
#define VSS_IVOCPROC_TOPOLOGY_ID_RX_DEFAULT 0x00010F77
/* Newtwork IDs */
+#define VSS_ICOMMON_CAL_NETWORK_ID_NONE 0x0001135E
+
+/* Select internal mixing mode. */
+#define VSS_IVOCPROC_VOCPROC_MODE_EC_INT_MIXING 0x00010F7C
+
+/* Select external mixing mode. */
+#define VSS_IVOCPROC_VOCPROC_MODE_EC_EXT_MIXING 0x00010F7D
+
+/* Default AFE port ID. Applicable to Tx and Rx. */
+#define VSS_IVOCPROC_PORT_ID_NONE 0xFFFF
+
#define VSS_NETWORK_ID_DEFAULT 0x00010037
#define VSS_NETWORK_ID_VOIP_NB 0x00011240
#define VSS_NETWORK_ID_VOIP_WB 0x00011241
@@ -678,73 +853,92 @@
#define VOICE_CMD_GET_PARAM 0x00011007
#define VOICE_EVT_GET_PARAM_ACK 0x00011008
-struct vss_ivocproc_cmd_create_full_control_session_t {
+#define VSS_IVOCPROC_CMD_CREATE_FULL_CONTROL_SESSION_V2 0x000112BF
+
+struct vss_ivocproc_cmd_create_full_control_session_v2_t {
uint16_t direction;
/*
- * stream direction.
- * 0 : TX only
- * 1 : RX only
- * 2 : TX and RX
+ * Vocproc direction. The supported values:
+ * VSS_IVOCPROC_DIRECTION_RX
+ * VSS_IVOCPROC_DIRECTION_TX
+ * VSS_IVOCPROC_DIRECTION_RX_TX
*/
- uint32_t tx_port_id;
+ uint16_t tx_port_id;
/*
- * TX device port ID which vocproc will connect to. If not supplying a
- * port ID set to VSS_IVOCPROC_PORT_ID_NONE.
+ * Tx device port ID to which the vocproc connects. If a port ID is
+ * not being supplied, set this to #VSS_IVOCPROC_PORT_ID_NONE.
*/
uint32_t tx_topology_id;
/*
- * Tx leg topology ID. If not supplying a topology ID set to
- * VSS_IVOCPROC_TOPOLOGY_ID_NONE.
+ * Tx path topology ID. If a topology ID is not being supplied, set
+ * this to #VSS_IVOCPROC_TOPOLOGY_ID_NONE.
*/
- uint32_t rx_port_id;
+ uint16_t rx_port_id;
/*
- * RX device port ID which vocproc will connect to. If not supplying a
- * port ID set to VSS_IVOCPROC_PORT_ID_NONE.
+ * Rx device port ID to which the vocproc connects. If a port ID is
+ * not being supplied, set this to #VSS_IVOCPROC_PORT_ID_NONE.
*/
uint32_t rx_topology_id;
/*
- * Rx leg topology ID. If not supplying a topology ID set to
- * VSS_IVOCPROC_TOPOLOGY_ID_NONE.
+ * Rx path topology ID. If a topology ID is not being supplied, set
+ * this to #VSS_IVOCPROC_TOPOLOGY_ID_NONE.
*/
- int32_t network_id;
+ uint32_t profile_id;
+ /* Voice calibration profile ID. */
+ uint32_t vocproc_mode;
/*
- * Network ID. (Refer to VSS_NETWORK_ID_XXX). If not supplying a network
- * ID set to VSS_NETWORK_ID_DEFAULT.
+ * Vocproc mode. The supported values:
+ * VSS_IVOCPROC_VOCPROC_MODE_EC_INT_MIXING
+ * VSS_IVOCPROC_VOCPROC_MODE_EC_EXT_MIXING
+ */
+ uint16_t ec_ref_port_id;
+ /*
+ * Port ID to which the vocproc connects for receiving echo
+ * cancellation reference signal. If a port ID is not being supplied,
+ * set this to #VSS_IVOCPROC_PORT_ID_NONE. This parameter value is
+ * ignored when the vocproc_mode parameter is set to
+ * VSS_IVOCPROC_VOCPROC_MODE_EC_INT_MIXING.
+ */
+ char name[SESSION_NAME_LEN];
+ /*
+ * Session name string used to identify a session that can be shared
+ * with passive controllers (optional). The string size, including the
+ * NULL termination character, is limited to 31 characters.
*/
} __packed;
struct vss_ivocproc_cmd_set_volume_index_t {
uint16_t vol_index;
- /**<
- * Volume index utilized by the vocproc to index into the volume table
- * provided in VSS_IVOCPROC_CMD_CACHE_VOLUME_CALIBRATION_TABLE and set
- * volume on the VDSP.
- */
+ /*
+ * Volume index utilized by the vocproc to index into the volume table
+ * provided in VSS_IVOCPROC_CMD_CACHE_VOLUME_CALIBRATION_TABLE and set
+ * volume on the VDSP.
+ */
} __packed;
struct vss_ivocproc_cmd_set_device_t {
uint32_t tx_port_id;
- /**<
- * TX device port ID which vocproc will connect to.
- * VSS_IVOCPROC_PORT_ID_NONE means vocproc will not connect to any port.
- */
+ /*
+ * TX device port ID which vocproc will connect to.
+ * VSS_IVOCPROC_PORT_ID_NONE means vocproc will not connect to any port.
+ */
uint32_t tx_topology_id;
- /**<
- * TX leg topology ID.
- * VSS_IVOCPROC_TOPOLOGY_ID_NONE means vocproc does not contain any
- * pre/post-processing blocks and is pass-through.
- */
+ /*
+ * TX leg topology ID.
+ * VSS_IVOCPROC_TOPOLOGY_ID_NONE means vocproc does not contain any
+ * pre/post-processing blocks and is pass-through.
+ */
int32_t rx_port_id;
- /**<
- * RX device port ID which vocproc will connect to.
- * VSS_IVOCPROC_PORT_ID_NONE means vocproc will not connect to any port.
- */
+ /*
+ * RX device port ID which vocproc will connect to.
+ * VSS_IVOCPROC_PORT_ID_NONE means vocproc will not connect to any port.
+ */
uint32_t rx_topology_id;
- /**<
- * RX leg topology ID.
- * VSS_IVOCPROC_TOPOLOGY_ID_NONE means vocproc does not contain any
- * pre/post-processing blocks and is pass-through.
- */
+ /*
+ * RX leg topology ID.
+ * VSS_IVOCPROC_TOPOLOGY_ID_NONE means vocproc does not contain any
+ * pre/post-processing blocks and is pass-through.
+ */
} __packed;
struct vss_ivocproc_cmd_register_calibration_data_t {
@@ -784,7 +978,7 @@
struct cvp_create_full_ctl_session_cmd {
struct apr_hdr hdr;
- struct vss_ivocproc_cmd_create_full_control_session_t cvp_session;
+ struct vss_ivocproc_cmd_create_full_control_session_v2_t cvp_session;
} __packed;
struct cvp_command {
@@ -835,7 +1029,6 @@
/* CB for down-link packets. */
typedef void (*dl_cb_fn)(uint8_t *voc_pkt,
- uint32_t *pkt_len,
void *private_data);
@@ -862,9 +1055,18 @@
int force;
};
+struct share_memory_info {
+ u32 mem_handle;
+ struct share_mem_buf sh_buf;
+ struct mem_map_table memtbl;
+};
+
struct voice_data {
int voc_state;/*INIT, CHANGE, RELEASE, RUN */
+ /* Shared mem to store decoder and encoder packets */
+ struct share_memory_info shmem_info;
+
wait_queue_head_t mvm_wait;
wait_queue_head_t cvs_wait;
wait_queue_head_t cvp_wait;
@@ -959,7 +1161,8 @@
};
/* called by alsa driver */
-int voc_set_pp_enable(uint16_t session_id, uint32_t module_id, uint32_t enable);
+int voc_set_pp_enable(uint16_t session_id, uint32_t module_id,
+ uint32_t enable);
int voc_get_pp_enable(uint16_t session_id, uint32_t module_id);
int voc_set_widevoice_enable(uint16_t session_id, uint32_t wv_enable);
uint32_t voc_get_widevoice_enable(uint16_t session_id);
diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
index 2d2b333..4c6a5a4 100644
--- a/tools/perf/util/parse-events.c
+++ b/tools/perf/util/parse-events.c
@@ -308,7 +308,7 @@
{
static char buf[32];
- if (type == PERF_TYPE_RAW) {
+ if (!pmu_name && type == PERF_TYPE_RAW) {
sprintf(buf, "raw 0x%" PRIx64, config);
return buf;
}
@@ -684,6 +684,7 @@
{
struct perf_event_attr attr;
struct perf_pmu *pmu;
+ char *ev_name;
pmu = perf_pmu__find(name);
if (!pmu)
@@ -700,7 +701,9 @@
if (perf_pmu__config(pmu, &attr, head_config))
return -EINVAL;
- return add_event(list, idx, &attr, pmu->name);
+ ev_name = (char *) __event_name(attr.type, attr.config, pmu->name);
+
+ return add_event(list, idx, &attr, ev_name);
}
void parse_events_update_lists(struct list_head *list_event,