Merge "msm: mpq8064: Correct the PCIE interrupt mapping" into msm-3.4
diff --git a/arch/arm/mach-msm/include/mach/irqs-8064.h b/arch/arm/mach-msm/include/mach/irqs-8064.h
index a5f78f5..973034b 100644
--- a/arch/arm/mach-msm/include/mach/irqs-8064.h
+++ b/arch/arm/mach-msm/include/mach/irqs-8064.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -287,13 +287,14 @@
#define PCIE20_INTC (GIC_SPI_START + 241)
#define PCIE20_INTD (GIC_SPI_START + 242)
#define PCIE20_INT_PLS_HP (GIC_SPI_START + 243)
-#define PCIE20_INT_PLS_PME (GIC_SPI_START + 244)
-#define PCIE20_INT_LINK_UP (GIC_SPI_START + 245)
-#define PCIE20_INT_LINK_DOWN (GIC_SPI_START + 246)
-#define PCIE20_INT_HP_LEGACY (GIC_SPI_START + 247)
-#define PCIE20_AER_LEGACY (GIC_SPI_START + 248)
-#define PCIE20_INT_PME_LEGACY (GIC_SPI_START + 249)
-#define PCIE20_INT_BRIDGE_FLUSH_N (GIC_SPI_START + 250)
+#define PCIE20_INT_PLS_ERR (GIC_SPI_START + 244)
+#define PCIE20_INT_PLS_PME (GIC_SPI_START + 245)
+#define PCIE20_INT_LINK_UP (GIC_SPI_START + 246)
+#define PCIE20_INT_LINK_DOWN (GIC_SPI_START + 247)
+#define PCIE20_INT_HP_LEGACY (GIC_SPI_START + 248)
+#define PCIE20_INT_AER_LEGACY (GIC_SPI_START + 249)
+#define PCIE20_INT_PME_LEGACY (GIC_SPI_START + 250)
+#define PCIE20_INT_BRIDGE_FLUSH_N (GIC_SPI_START + 251)
/* Backwards compatible IRQ macros. */
#define INT_ADM_AARM ADM_0_SCSS_0_IRQ