ARM: S5PC100: 2nd Change to using s3c_gpio_cfgall_range()
This patch changes the code setting range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgpin_range().
NOTE: This is for missed things from the previous patch.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c
index c1c5aed..57b1979 100644
--- a/arch/arm/mach-s5pc100/dev-spi.c
+++ b/arch/arm/mach-s5pc100/dev-spi.c
@@ -38,25 +38,20 @@
{
switch (pdev->id) {
case 0:
- s3c_gpio_cfgpin_range(S5PC100_GPB(0), 3, S3C_GPIO_SFN(2));
- s3c_gpio_setpull(S5PC100_GPB(0), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5PC100_GPB(1), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5PC100_GPB(2), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgall_range(S5PC100_GPB(0), 3,
+ S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
break;
case 1:
- s3c_gpio_cfgpin_range(S5PC100_GPB(4), 3, S3C_GPIO_SFN(2));
- s3c_gpio_setpull(S5PC100_GPB(4), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5PC100_GPB(5), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5PC100_GPB(6), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgall_range(S5PC100_GPB(4), 3,
+ S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
break;
case 2:
s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));
- s3c_gpio_cfgpin_range(S5PC100_GPB(2), 2, S3C_GPIO_SFN(3));
s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5PC100_GPG3(2), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5PC100_GPG3(3), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgall_range(S5PC100_GPB(2), 2,
+ S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
break;
default: