| commit | e283d78083271c9faf784daad6367dfb903d0f06 | [log] [tgz] |
|---|---|---|
| author | Andy Walls <awalls@radix.net> | Sun Sep 27 00:00:48 2009 -0300 |
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | Sat Dec 05 18:40:18 2009 -0200 |
| tree | 23c371b1b9aa4fcc2e609fe10785f497d63d2e34 | |
| parent | 9eef550a9a98c1e3d15aaf490812949fdeb01c7c [diff] |
V4L/DVB (13090): cx25840: Init PLLs properly for CX2388[578] A/V cores The SYS and AUX PLLs need to be initialized to different values based on the chip: CX23885, CX23887, CX23888, as each uses a different crystal frequency: 28.6363 MHz, 25.0 MHz, 50.0 MHz. Signed-off-by: Andy Walls <awalls@radix.net> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>