Merge "mmc: msm_sdcc: enable power save mode for sd clock after voltage switch" into msm-3.0
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index ce13d27..0bb8ac7 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc/host/msm_sdcc.c
@@ -2490,7 +2490,7 @@
usleep_range(5000, 5500);
spin_lock_irqsave(&host->lock, flags);
- /* Start SD CLK output. */
+ /* Disable PWRSAVE would make sure that SD CLK is always running */
writel_relaxed((readl_relaxed(host->base + MMCICLOCK)
& ~MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
msmsdcc_delay(host);
@@ -2514,6 +2514,9 @@
}
out_unlock:
+ /* Enable PWRSAVE */
+ writel_relaxed((readl_relaxed(host->base + MMCICLOCK) |
+ MCI_CLK_PWRSAVE), host->base + MMCICLOCK);
spin_unlock_irqrestore(&host->lock, flags);
out:
return rc;