commit | f19baaeaadf9d77bcc6c122500c70b27c5bbc7a4 | [log] [tgz] |
---|---|---|
author | Brice Goglin <brice@myri.com> | Tue Apr 10 21:21:39 2007 +0200 |
committer | Jeff Garzik <jeff@garzik.org> | Wed Apr 11 11:54:44 2007 -0400 |
tree | 24c927e32a7d9c33098ac84aa9718917835d9e35 | |
parent | ae8509b1876e6e1074edc9846296e80983e30502 [diff] |
myri10ge: more Intel chipsets providing aligned PCIe completions Add the Intel 5000 southbridge (aka Intel 6310/6311/6321ESB) PCIe ports and the Intel E30x0 chipsets to the whitelist of aligned PCIe completion. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>