tree dc5e677d978435159dd62e1faf0824fb01e44aa0
parent 17e21854bd59862f4ee47d1c7e828549f782711b
author Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> 1271305053 +0900
committer Jesse Barnes <jbarnes@virtuousgeek.org> 1273604494 -0700

PCI: aerdrv: redefine PCI_ERR_ROOT_*_SRC

The Error Source Identification Register (Offset 34h) is 4 byte
which contains a couple of 2 byte field, "[15:0] ERR_COR Source
Identification" and "[31:16] ERR_FATAL/NONFATAL Source Identification."

This patch defines PCI_ERR_ROOT_ERR_SRC to make dword access sensible.

Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>