Merge "msm: kgsl: Remove unused ib1_wq from struct adreno_device" into msm-3.0
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b2dbee3..2e7f3a3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -24,7 +24,7 @@
select HAVE_PERF_EVENTS
select PERF_USE_VMALLOC
select HAVE_REGS_AND_STACK_ACCESS_API
- select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
+ #select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
select HAVE_C_RECORDMCOUNT
select HAVE_GENERIC_HARDIRQS
select HAVE_SPARSE_IRQ
@@ -1774,6 +1774,7 @@
bool "Flattened Device Tree support"
select OF
select OF_EARLY_FLATTREE
+ select IRQ_DOMAIN
help
Include support for flattened device tree machine descriptions.
diff --git a/arch/arm/boot/dts/msmcopper.dts b/arch/arm/boot/dts/msmcopper.dts
new file mode 100644
index 0000000..4e3d66d
--- /dev/null
+++ b/arch/arm/boot/dts/msmcopper.dts
@@ -0,0 +1,17 @@
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "Qualcomm MSM Copper";
+ compatible = "qcom,msmcopper-sim", "qcom,msmcopper";
+ interrupt-parent = <&intc>;
+
+ intc: interrupt-controller@F9000000 {
+ compatible = "qcom,msm-qgic2";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0xF9000000 0x1000>,
+ <0xF9002000 0x1000>;
+ };
+};
diff --git a/arch/arm/boot/dts/skeleton.dtsi b/arch/arm/boot/dts/skeleton.dtsi
new file mode 100644
index 0000000..b41d241
--- /dev/null
+++ b/arch/arm/boot/dts/skeleton.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Skeleton device tree; the bare minimum needed to boot; just include and
+ * add a compatible value. The bootloader will typically populate the memory
+ * node.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ chosen { };
+ aliases { };
+ memory { device_type = "memory"; reg = <0 0>; };
+};
diff --git a/arch/arm/configs/fsm9xxx-perf_defconfig b/arch/arm/configs/fsm9xxx-perf_defconfig
index 50145f9..60d8a32 100644
--- a/arch/arm/configs/fsm9xxx-perf_defconfig
+++ b/arch/arm/configs/fsm9xxx-perf_defconfig
@@ -7,6 +7,7 @@
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
# CONFIG_PERF_EVENTS is not set
diff --git a/arch/arm/configs/fsm9xxx_defconfig b/arch/arm/configs/fsm9xxx_defconfig
index 4019a4f..6913409 100644
--- a/arch/arm/configs/fsm9xxx_defconfig
+++ b/arch/arm/configs/fsm9xxx_defconfig
@@ -7,6 +7,7 @@
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
diff --git a/arch/arm/configs/msm-copper_defconfig b/arch/arm/configs/msm-copper_defconfig
new file mode 100644
index 0000000..9fb4615
--- /dev/null
+++ b/arch/arm/configs/msm-copper_defconfig
@@ -0,0 +1,147 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SYSVIPC=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEBUG=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_SCHED=y
+# CONFIG_FAIR_GROUP_SCHED is not set
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_ASHMEM=y
+CONFIG_EMBEDDED=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=m
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_ARCH_MSM=y
+CONFIG_ARCH_MSMCOPPER=y
+CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y
+# CONFIG_MSM_STACKED_MEMORY is not set
+CONFIG_CPU_HAS_L2_PMU=y
+# CONFIG_MSM_JTAG_V7 is not set
+# CONFIG_MSM_FIQ_SUPPORT is not set
+# CONFIG_MSM_PROC_COMM is not set
+# CONFIG_MSM_DALRPC is not set
+# CONFIG_MSM_HW3D is not set
+CONFIG_MSM_DIRECT_SCLK_ACCESS=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_SMP=y
+# CONFIG_SMP_ON_UP is not set
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+CONFIG_HIGHMEM=y
+CONFIG_VMALLOC_RESERVE=0x19000000
+CONFIG_USE_OF=y
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_SUSPEND is not set
+CONFIG_NET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IPV6=y
+CONFIG_IPV6_PRIVACY=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_IPV6_MIP6=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_MISC_DEVICES=y
+CONFIG_SCSI=y
+CONFIG_SCSI_TGT=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_CHR_DEV_SCH=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_NETDEVICES=y
+# CONFIG_MSM_RMNET is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=m
+CONFIG_INPUT_JOYSTICK=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_SERIAL_MSM_HSL=y
+CONFIG_SERIAL_MSM_HSL_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_DCC_TTY=y
+CONFIG_DEBUG_GPIO=y
+CONFIG_GPIO_SYSFS=y
+# CONFIG_HWMON is not set
+# CONFIG_MFD_SUPPORT is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+# CONFIG_LEDS_MSM_PMIC is not set
+CONFIG_SWITCH=y
+CONFIG_STAGING=y
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_LOGGER=y
+CONFIG_ANDROID_RAM_CONSOLE=y
+CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION=y
+CONFIG_ANDROID_TIMED_GPIO=y
+CONFIG_ANDROID_LOW_MEMORY_KILLER=y
+CONFIG_MSM_SSBI=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT4_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_TIMER_STATS=y
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_DYNAMIC_DEBUG=y
+CONFIG_DEBUG_USER=y
+CONFIG_KEYS=y
+CONFIG_CRYPTO_AUTHENC=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_DES=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRC_CCITT=y
+CONFIG_LIBCRC32C=y
diff --git a/arch/arm/configs/msm7627-perf_defconfig b/arch/arm/configs/msm7627-perf_defconfig
index 1cc4b97..78eeadd 100644
--- a/arch/arm/configs/msm7627-perf_defconfig
+++ b/arch/arm/configs/msm7627-perf_defconfig
@@ -11,6 +11,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
diff --git a/arch/arm/configs/msm7627_defconfig b/arch/arm/configs/msm7627_defconfig
index 6f0cb31..7da4daf 100644
--- a/arch/arm/configs/msm7627_defconfig
+++ b/arch/arm/configs/msm7627_defconfig
@@ -11,6 +11,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
diff --git a/arch/arm/configs/msm7627a-perf_defconfig b/arch/arm/configs/msm7627a-perf_defconfig
index 8be0165..06d04f7 100644
--- a/arch/arm/configs/msm7627a-perf_defconfig
+++ b/arch/arm/configs/msm7627a-perf_defconfig
@@ -12,6 +12,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
@@ -157,6 +158,7 @@
CONFIG_BT_MSM_SLEEP=y
CONFIG_MSM_BT_POWER=y
CONFIG_RFKILL=y
+CONFIG_RFKILL_PM=y
CONFIG_MTD=y
CONFIG_MTD_TESTS=m
CONFIG_MTD_CMDLINE_PARTS=y
@@ -182,6 +184,8 @@
CONFIG_SMSC911X=y
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
@@ -231,7 +235,7 @@
CONFIG_FB_MSM_TRIPLE_BUFFER=y
CONFIG_FB_MSM_MDP30=y
CONFIG_FB_MSM_MDP303=y
-CONFIG_FB_MSM_MIPI_RENESAS_CMD_FWVGA_PT_PANEL=y
+CONFIG_FB_MSM_MIPI_PANEL_DETECT=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_SOUND=y
diff --git a/arch/arm/configs/msm7627a_defconfig b/arch/arm/configs/msm7627a_defconfig
index ed4fd41..909a0bf 100644
--- a/arch/arm/configs/msm7627a_defconfig
+++ b/arch/arm/configs/msm7627a_defconfig
@@ -12,6 +12,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
@@ -155,6 +156,7 @@
CONFIG_BT_MSM_SLEEP=y
CONFIG_MSM_BT_POWER=y
CONFIG_RFKILL=y
+CONFIG_RFKILL_PM=y
CONFIG_MTD=y
CONFIG_MTD_TESTS=m
CONFIG_MTD_CMDLINE_PARTS=y
@@ -180,6 +182,8 @@
CONFIG_SMSC911X=y
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
@@ -229,7 +233,7 @@
CONFIG_FB_MSM_TRIPLE_BUFFER=y
CONFIG_FB_MSM_MDP30=y
CONFIG_FB_MSM_MDP303=y
-CONFIG_FB_MSM_MIPI_RENESAS_CMD_FWVGA_PT_PANEL=y
+CONFIG_FB_MSM_MIPI_PANEL_DETECT=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_SOUND=y
diff --git a/arch/arm/configs/msm7630-perf_defconfig b/arch/arm/configs/msm7630-perf_defconfig
index cc86af8..5b52404 100644
--- a/arch/arm/configs/msm7630-perf_defconfig
+++ b/arch/arm/configs/msm7630-perf_defconfig
@@ -11,6 +11,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
diff --git a/arch/arm/configs/msm7630_defconfig b/arch/arm/configs/msm7630_defconfig
index 9645211..9ad0b5a 100644
--- a/arch/arm/configs/msm7630_defconfig
+++ b/arch/arm/configs/msm7630_defconfig
@@ -11,6 +11,7 @@
CONFIG_CGROUP_SCHED=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_BLK_DEV_INITRD=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
diff --git a/arch/arm/configs/msm8660-perf_defconfig b/arch/arm/configs/msm8660-perf_defconfig
index 3315171..0f41c0a 100644
--- a/arch/arm/configs/msm8660-perf_defconfig
+++ b/arch/arm/configs/msm8660-perf_defconfig
@@ -18,6 +18,7 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
@@ -213,6 +214,7 @@
CONFIG_MSM_BT_POWER=y
# CONFIG_WIRELESS_EXT_SYSFS is not set
CONFIG_RFKILL=y
+CONFIG_RFKILL_PM=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_MISC_DEVICES=y
@@ -247,6 +249,8 @@
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
CONFIG_PPP=y
CONFIG_PPP_ASYNC=y
CONFIG_PPP_DEFLATE=y
diff --git a/arch/arm/configs/msm8660_defconfig b/arch/arm/configs/msm8660_defconfig
index 698855a..e900062 100644
--- a/arch/arm/configs/msm8660_defconfig
+++ b/arch/arm/configs/msm8660_defconfig
@@ -18,6 +18,7 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_ASHMEM=y
CONFIG_EMBEDDED=y
@@ -204,6 +205,7 @@
CONFIG_MSM_BT_POWER=y
# CONFIG_WIRELESS_EXT_SYSFS is not set
CONFIG_RFKILL=y
+CONFIG_RFKILL_PM=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_MISC_DEVICES=y
@@ -240,6 +242,8 @@
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
CONFIG_LIBRA_SDIOIF=m
+CONFIG_CFG80211=y
+CONFIG_CFG80211_WEXT=n
CONFIG_PPP=y
CONFIG_PPP_ASYNC=y
CONFIG_PPP_DEFLATE=y
diff --git a/arch/arm/configs/msm8960_defconfig b/arch/arm/configs/msm8960_defconfig
index bf15477..73d0756 100755
--- a/arch/arm/configs/msm8960_defconfig
+++ b/arch/arm/configs/msm8960_defconfig
@@ -19,6 +19,7 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_KALLSYMS_ALL=y
CONFIG_ASHMEM=y
diff --git a/arch/arm/configs/msm9615_defconfig b/arch/arm/configs/msm9615_defconfig
index 72908f9..f8ccbb3 100644
--- a/arch/arm/configs/msm9615_defconfig
+++ b/arch/arm/configs/msm9615_defconfig
@@ -20,6 +20,7 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_KALLSYMS_ALL=y
CONFIG_EMBEDDED=y
@@ -87,6 +88,7 @@
CONFIG_DIAG_CHAR=y
CONFIG_HVC_DCC=y
CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_MSM=y
CONFIG_DCC_TTY=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
@@ -157,6 +159,10 @@
# CONFIG_MMC_MSM_SDC4_SUPPORT is not set
# CONFIG_MMC_MSM_SDC5_SUPPORT is not set
CONFIG_MMC_MSM_SPS_SUPPORT=y
+CONFIG_RTC_CLASS=y
+# CONFIG_RTC_INTF_ALARM is not set
+# CONFIG_RTC_DRV_MSM is not set
+CONFIG_RTC_DRV_PM8XXX=y
CONFIG_MSM_SSBI=y
CONFIG_SPS=y
CONFIG_SPS_SUPPORT_BAMDMA=y
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 946f4d7..ae744a8 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -70,4 +70,11 @@
#define MACHINE_END \
};
+#define DT_MACHINE_START(_name, _namestr) \
+static const struct machine_desc __mach_desc_##_name \
+ __used \
+ __attribute__((__section__(".arch.info.init"))) = { \
+ .nr = ~0, \
+ .name = _namestr,
+
#endif
diff --git a/arch/arm/include/asm/prom.h b/arch/arm/include/asm/prom.h
index 11b8708..6f65ca8 100644
--- a/arch/arm/include/asm/prom.h
+++ b/arch/arm/include/asm/prom.h
@@ -16,11 +16,6 @@
#include <asm/setup.h>
#include <asm/irq.h>
-static inline void irq_dispose_mapping(unsigned int virq)
-{
- return;
-}
-
extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
extern void arm_dt_memblock_reserve(void);
diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c
index 0cdd7b4..1a33e9d 100644
--- a/arch/arm/kernel/devtree.c
+++ b/arch/arm/kernel/devtree.c
@@ -132,17 +132,3 @@
return mdesc_best;
}
-
-/**
- * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq#
- *
- * Currently the mapping mechanism is trivial; simple flat hwirq numbers are
- * mapped 1:1 onto Linux irq numbers. Cascaded irq controllers are not
- * supported.
- */
-unsigned int irq_create_of_mapping(struct device_node *controller,
- const u32 *intspec, unsigned int intsize)
-{
- return intspec[0];
-}
-EXPORT_SYMBOL_GPL(irq_create_of_mapping);
diff --git a/arch/arm/kernel/perf_event_msm_krait_l2.c b/arch/arm/kernel/perf_event_msm_krait_l2.c
index e1c3fb5..0512e64 100644
--- a/arch/arm/kernel/perf_event_msm_krait_l2.c
+++ b/arch/arm/kernel/perf_event_msm_krait_l2.c
@@ -10,7 +10,7 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#ifdef CONFIG_CPU_HAS_L2_PMU
+#ifdef CONFIG_ARCH_MSM_KRAIT
#include <linux/irq.h>
diff --git a/arch/arm/kernel/perf_event_msm_l2.c b/arch/arm/kernel/perf_event_msm_l2.c
index db8481f..3cb251b 100644
--- a/arch/arm/kernel/perf_event_msm_l2.c
+++ b/arch/arm/kernel/perf_event_msm_l2.c
@@ -10,7 +10,7 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#ifdef CONFIG_CPU_HAS_L2_PMU
+#ifdef CONFIG_ARCH_MSM8x60
#include <linux/irq.h>
diff --git a/arch/arm/mach-msm/bam_dmux.c b/arch/arm/mach-msm/bam_dmux.c
index 5ed4456..304a687 100644
--- a/arch/arm/mach-msm/bam_dmux.c
+++ b/arch/arm/mach-msm/bam_dmux.c
@@ -24,6 +24,7 @@
#include <linux/sched.h>
#include <linux/skbuff.h>
#include <linux/debugfs.h>
+#include <linux/clk.h>
#include <mach/sps.h>
#include <mach/bam_dmux.h>
@@ -119,6 +120,7 @@
#define BUFFER_SIZE 2048
#define NUM_BUFFERS 32
static struct sps_bam_props a2_props;
+static u32 a2_device_handle;
static struct sps_pipe *bam_tx_pipe;
static struct sps_pipe *bam_rx_pipe;
static struct sps_connect tx_connection;
@@ -155,6 +157,26 @@
static struct workqueue_struct *bam_mux_rx_workqueue;
static struct workqueue_struct *bam_mux_tx_workqueue;
+/* A2 power collaspe */
+#define UL_TIMEOUT_DELAY 1000 /* in ms */
+static void toggle_apps_ack(void);
+static void reconnect_to_bam(void);
+static void disconnect_to_bam(void);
+static void ul_wakeup(void);
+static void ul_timeout(struct work_struct *work);
+static void vote_dfab(void);
+static void unvote_dfab(void);
+
+static int bam_is_connected;
+static DEFINE_MUTEX(wakeup_lock);
+static struct completion ul_wakeup_ack_completion;
+static struct completion bam_connection_completion;
+static struct delayed_work ul_timeout_work;
+static int ul_packet_written;
+static struct clk *dfab_clk;
+static DEFINE_RWLOCK(ul_wakeup_lock);
+/* End A2 power collaspe */
+
#define bam_ch_is_open(x) \
(bam_ch[(x)].status == (BAM_CH_LOCAL_OPEN | BAM_CH_REMOTE_OPEN))
@@ -316,6 +338,7 @@
pkt, SPS_IOVEC_FLAG_INT | SPS_IOVEC_FLAG_EOT);
mutex_unlock(&bam_mux_lock);
+ ul_packet_written = 1;
return rc;
}
@@ -365,6 +388,10 @@
}
spin_unlock_irqrestore(&bam_ch[id].lock, flags);
+ read_lock(&ul_wakeup_lock);
+ if (!bam_is_connected)
+ ul_wakeup();
+
/* if skb do not have any tailroom for padding,
copy the skb into a new expanded skb */
if ((skb->len & 0x3) && (skb_tailroom(skb) < (4 - (skb->len & 0x3)))) {
@@ -421,6 +448,8 @@
INIT_WORK(&pkt->work, bam_mux_write_done);
rc = sps_transfer_one(bam_tx_pipe, dma_address, skb->len,
pkt, SPS_IOVEC_FLAG_INT | SPS_IOVEC_FLAG_EOT);
+ ul_packet_written = 1;
+ read_unlock(&ul_wakeup_lock);
return rc;
}
@@ -464,6 +493,10 @@
bam_ch[id].status |= BAM_CH_LOCAL_OPEN;
spin_unlock_irqrestore(&bam_ch[id].lock, flags);
+ read_lock(&ul_wakeup_lock);
+ if (!bam_is_connected)
+ ul_wakeup();
+
hdr->magic_num = BAM_MUX_HDR_MAGIC_NO;
hdr->cmd = BAM_MUX_HDR_CMD_OPEN;
hdr->reserved = 0;
@@ -472,6 +505,7 @@
hdr->pad_len = 0;
rc = bam_mux_write_cmd((void *)hdr, sizeof(struct bam_mux_hdr));
+ read_unlock(&ul_wakeup_lock);
open_done:
DBG("%s: opened ch %d\n", __func__, id);
@@ -491,6 +525,10 @@
return -ENODEV;
spin_lock_irqsave(&bam_ch[id].lock, flags);
+ read_lock(&ul_wakeup_lock);
+ if (!bam_is_connected)
+ ul_wakeup();
+
bam_ch[id].notify = NULL;
bam_ch[id].priv = NULL;
bam_ch[id].status &= ~BAM_CH_LOCAL_OPEN;
@@ -509,6 +547,7 @@
hdr->pad_len = 0;
rc = bam_mux_write_cmd((void *)hdr, sizeof(struct bam_mux_hdr));
+ read_unlock(&ul_wakeup_lock);
DBG("%s: closed ch %d\n", __func__, id);
return rc;
@@ -708,6 +747,101 @@
#endif
+static void ul_timeout(struct work_struct *work)
+{
+ write_lock(&ul_wakeup_lock);
+ if (ul_packet_written) {
+ ul_packet_written = 0;
+ schedule_delayed_work(&ul_timeout_work,
+ msecs_to_jiffies(UL_TIMEOUT_DELAY));
+ } else {
+ smsm_change_state(SMSM_APPS_STATE, SMSM_A2_POWER_CONTROL, 0);
+ bam_is_connected = 0;
+ }
+ write_unlock(&ul_wakeup_lock);
+}
+static void ul_wakeup(void)
+{
+ mutex_lock(&wakeup_lock);
+ if (bam_is_connected) { /* bam got connected before lock grabbed */
+ mutex_unlock(&wakeup_lock);
+ return;
+ }
+ INIT_COMPLETION(ul_wakeup_ack_completion);
+ smsm_change_state(SMSM_APPS_STATE, 0, SMSM_A2_POWER_CONTROL);
+ wait_for_completion_interruptible_timeout(&ul_wakeup_ack_completion,
+ HZ);
+ wait_for_completion_interruptible_timeout(&bam_connection_completion,
+ HZ);
+
+ bam_is_connected = 1;
+ schedule_delayed_work(&ul_timeout_work,
+ msecs_to_jiffies(UL_TIMEOUT_DELAY));
+ mutex_unlock(&wakeup_lock);
+}
+
+static void reconnect_to_bam(void)
+{
+ int i;
+
+ vote_dfab();
+ i = sps_device_reset(a2_device_handle);
+ if (i)
+ pr_err("%s: device reset failed rc = %d\n", __func__, i);
+ i = sps_connect(bam_tx_pipe, &tx_connection);
+ if (i)
+ pr_err("%s: tx connection failed rc = %d\n", __func__, i);
+ i = sps_connect(bam_rx_pipe, &rx_connection);
+ if (i)
+ pr_err("%s: rx connection failed rc = %d\n", __func__, i);
+ i = sps_register_event(bam_tx_pipe, &tx_register_event);
+ if (i)
+ pr_err("%s: tx event reg failed rc = %d\n", __func__, i);
+ i = sps_register_event(bam_rx_pipe, &rx_register_event);
+ if (i)
+ pr_err("%s: rx event reg failed rc = %d\n", __func__, i);
+ for (i = 0; i < NUM_BUFFERS; ++i)
+ queue_rx();
+ toggle_apps_ack();
+ complete_all(&bam_connection_completion);
+}
+
+static void disconnect_to_bam(void)
+{
+ struct list_head *node;
+ struct rx_pkt_info *info;
+
+ INIT_COMPLETION(bam_connection_completion);
+ sps_disconnect(bam_tx_pipe);
+ sps_disconnect(bam_rx_pipe);
+ unvote_dfab();
+ __memzero(rx_desc_mem_buf.base, rx_desc_mem_buf.size);
+ __memzero(tx_desc_mem_buf.base, tx_desc_mem_buf.size);
+ while (!list_empty(&bam_rx_pool)) {
+ node = bam_rx_pool.next;
+ list_del(node);
+ info = container_of(node, struct rx_pkt_info, list_node);
+ dma_unmap_single(NULL, info->dma_address, BUFFER_SIZE,
+ DMA_FROM_DEVICE);
+ dev_kfree_skb_any(info->skb);
+ kfree(info);
+ }
+}
+
+static void vote_dfab(void)
+{
+ int rc;
+
+ rc = clk_enable(dfab_clk);
+ if (rc)
+ pr_err("bam_dmux vote for dfab failed rc = %d\n", rc);
+}
+
+static void unvote_dfab(void)
+{
+ clk_disable(dfab_clk);
+}
+
static void bam_init(void)
{
u32 h;
@@ -716,6 +850,7 @@
void *a2_virt_addr;
int i;
+ vote_dfab();
/* init BAM */
a2_virt_addr = ioremap_nocache(A2_PHYS_BASE, A2_PHYS_SIZE);
if (!a2_virt_addr) {
@@ -735,6 +870,7 @@
pr_err("%s: register bam error %d\n", __func__, ret);
goto register_bam_failed;
}
+ a2_device_handle = h;
bam_tx_pipe = sps_alloc_endpoint();
if (bam_tx_pipe == NULL) {
@@ -836,6 +972,8 @@
bam_mux_initialized = 1;
for (i = 0; i < NUM_BUFFERS; ++i)
queue_rx();
+ toggle_apps_ack();
+ complete_all(&bam_connection_completion);
return;
rx_event_reg_failed:
@@ -860,11 +998,22 @@
return;
}
+static void toggle_apps_ack(void)
+{
+ static unsigned int clear_bit; /* 0 = set the bit, else clear bit */
+ smsm_change_state(SMSM_APPS_STATE,
+ clear_bit & SMSM_A2_POWER_CONTROL_ACK,
+ ~clear_bit & SMSM_A2_POWER_CONTROL_ACK);
+ clear_bit = ~clear_bit;
+}
+
static void bam_dmux_smsm_cb(void *priv, uint32_t old_state, uint32_t new_state)
{
DBG("%s: smsm activity\n", __func__);
- if (bam_mux_initialized)
- pr_err("%s: bam_dmux already initialized\n", __func__);
+ if (bam_mux_initialized && new_state & SMSM_A2_POWER_CONTROL)
+ reconnect_to_bam();
+ else if (bam_mux_initialized && !(new_state & SMSM_A2_POWER_CONTROL))
+ disconnect_to_bam();
else if (new_state & SMSM_A2_POWER_CONTROL)
bam_init();
else
@@ -872,6 +1021,12 @@
}
+static void bam_dmux_smsm_ack_cb(void *priv, uint32_t old_state,
+ uint32_t new_state)
+{
+ complete_all(&ul_wakeup_ack_completion);
+}
+
static int bam_dmux_probe(struct platform_device *pdev)
{
int rc;
@@ -880,6 +1035,16 @@
if (bam_mux_initialized)
return 0;
+ dfab_clk = clk_get(&pdev->dev, "dfab_clk");
+ if (IS_ERR(dfab_clk)) {
+ pr_err("%s: did not get dfab clock\n", __func__);
+ return -EFAULT;
+ }
+
+ rc = clk_set_rate(dfab_clk, 64000000);
+ if (rc)
+ pr_err("%s: unable to set dfab clock rate\n", __func__);
+
bam_mux_rx_workqueue = create_singlethread_workqueue("bam_dmux_rx");
if (!bam_mux_rx_workqueue)
return -ENOMEM;
@@ -904,6 +1069,10 @@
}
}
+ init_completion(&ul_wakeup_ack_completion);
+ init_completion(&bam_connection_completion);
+ INIT_DELAYED_WORK(&ul_timeout_work, ul_timeout);
+
rc = smsm_state_cb_register(SMSM_MODEM_STATE, SMSM_A2_POWER_CONTROL,
bam_dmux_smsm_cb, NULL);
@@ -914,6 +1083,22 @@
return -ENOMEM;
}
+ rc = smsm_state_cb_register(SMSM_MODEM_STATE, SMSM_A2_POWER_CONTROL_ACK,
+ bam_dmux_smsm_ack_cb, NULL);
+
+ if (rc) {
+ destroy_workqueue(bam_mux_rx_workqueue);
+ destroy_workqueue(bam_mux_tx_workqueue);
+ smsm_state_cb_deregister(SMSM_MODEM_STATE,
+ SMSM_A2_POWER_CONTROL,
+ bam_dmux_smsm_cb, NULL);
+ pr_err("%s: smsm ack cb register failed, rc: %d\n", __func__,
+ rc);
+ for (rc = 0; rc < BAM_DMUX_NUM_CHANNELS; ++rc)
+ platform_device_put(bam_ch[rc].pdev);
+ return -ENOMEM;
+ }
+
return 0;
}
diff --git a/arch/arm/mach-msm/board-9615.c b/arch/arm/mach-msm/board-9615.c
index 4eb3d77..40cbee0 100644
--- a/arch/arm/mach-msm/board-9615.c
+++ b/arch/arm/mach-msm/board-9615.c
@@ -14,7 +14,6 @@
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/msm_ssbi.h>
-#include <linux/platform_data/qcom_crypto_device.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/mmc.h>
@@ -30,6 +29,7 @@
#include "board-9615.h"
#include "cpuidle.h"
#include "pm.h"
+#include "acpuclock.h"
static struct pm8xxx_irq_platform_data pm8xxx_irq_pdata __devinitdata = {
.irq_base = PM8018_IRQ_BASE,
@@ -195,117 +195,6 @@
},
};
-#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
- defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
- defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
- defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
-
-#define QCE_SIZE 0x10000
-#define QCE_0_BASE 0x18500000
-
-#define QCE_HW_KEY_SUPPORT 0
-#define QCE_SHA_HMAC_SUPPORT 1
-#define QCE_SHARE_CE_RESOURCE 1
-#define QCE_CE_SHARED 0
-
-static struct resource qcrypto_resources[] = {
- [0] = {
- .start = QCE_0_BASE,
- .end = QCE_0_BASE + QCE_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "crypto_channels",
- .start = DMOV_CE_IN_CHAN,
- .end = DMOV_CE_OUT_CHAN,
- .flags = IORESOURCE_DMA,
- },
- [2] = {
- .name = "crypto_crci_in",
- .start = DMOV_CE_IN_CRCI,
- .end = DMOV_CE_IN_CRCI,
- .flags = IORESOURCE_DMA,
- },
- [3] = {
- .name = "crypto_crci_out",
- .start = DMOV_CE_OUT_CRCI,
- .end = DMOV_CE_OUT_CRCI,
- .flags = IORESOURCE_DMA,
- },
-};
-
-static struct resource qcedev_resources[] = {
- [0] = {
- .start = QCE_0_BASE,
- .end = QCE_0_BASE + QCE_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "crypto_channels",
- .start = DMOV_CE_IN_CHAN,
- .end = DMOV_CE_OUT_CHAN,
- .flags = IORESOURCE_DMA,
- },
- [2] = {
- .name = "crypto_crci_in",
- .start = DMOV_CE_IN_CRCI,
- .end = DMOV_CE_IN_CRCI,
- .flags = IORESOURCE_DMA,
- },
- [3] = {
- .name = "crypto_crci_out",
- .start = DMOV_CE_OUT_CRCI,
- .end = DMOV_CE_OUT_CRCI,
- .flags = IORESOURCE_DMA,
- },
-};
-
-#endif
-
-#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
- defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
-
-static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
- .ce_shared = QCE_CE_SHARED,
- .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
- .hw_key_support = QCE_HW_KEY_SUPPORT,
- .sha_hmac = QCE_SHA_HMAC_SUPPORT,
-};
-
-static struct platform_device qcrypto_device = {
- .name = "qcrypto",
- .id = 0,
- .num_resources = ARRAY_SIZE(qcrypto_resources),
- .resource = qcrypto_resources,
- .dev = {
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &qcrypto_ce_hw_suppport,
- },
-};
-#endif
-
-#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
- defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
-
-static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
- .ce_shared = QCE_CE_SHARED,
- .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
- .hw_key_support = QCE_HW_KEY_SUPPORT,
- .sha_hmac = QCE_SHA_HMAC_SUPPORT,
-};
-
-static struct platform_device qcedev_device = {
- .name = "qce",
- .id = 0,
- .num_resources = ARRAY_SIZE(qcedev_resources),
- .resource = qcedev_resources,
- .dev = {
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &qcedev_ce_hw_suppport,
- },
-};
-#endif
-
#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
|| defined(CONFIG_MMC_MSM_SDC2_SUPPORT))
@@ -643,12 +532,12 @@
#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
- &qcrypto_device,
+ &msm9615_qcrypto_device,
#endif
#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
- &qcedev_device,
+ &msm9615_qcedev_device,
#endif
};
@@ -675,6 +564,9 @@
msm_device_gadget_peripheral.dev.parent = &msm_device_otg.dev;
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
+ msm_clock_init(&msm9615_clock_init_data);
+ acpuclk_init(&acpuclk_9615_soc_data);
+
msm9615_init_mmc();
msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
diff --git a/arch/arm/mach-msm/board-msm7x27a.c b/arch/arm/mach-msm/board-msm7x27a.c
index 92879bc..44939e7 100644
--- a/arch/arm/mach-msm/board-msm7x27a.c
+++ b/arch/arm/mach-msm/board-msm7x27a.c
@@ -1841,10 +1841,16 @@
static int msm_fb_detect_panel(const char *name)
{
- if (!strncmp(name, MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
- strnlen(MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
- PANEL_NAME_MAX_LEN)))
- return 0;
+ int ret = -ENODEV;
+
+ if (machine_is_msm7x27a_surf() || machine_is_msm7625a_surf()) {
+ if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21) ||
+ !strncmp(name, "mipi_cmd_renesas_fwvga", 22))
+ ret = 0;
+ } else if (machine_is_msm7x27a_ffa()) {
+ if (!strncmp(name, "mipi_cmd_renesas_fwvga", 22))
+ ret = 0;
+ }
#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
!defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
@@ -1857,7 +1863,7 @@
return 0;
}
#endif
- return -ENODEV;
+ return ret;
}
static struct msm_fb_platform_data msm_fb_pdata = {
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 2615cd4..10d1cd5 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -3328,46 +3328,46 @@
/* configuration data */
static const u8 mxt_config_data[] = {
/* T6 Object */
- 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
/* T38 Object */
- 11, 0, 0, 6, 9, 11, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0,
+ 11, 1, 0, 20, 10, 11, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0,
/* T7 Object */
- 10, 10, 50,
+ 100, 16, 50,
/* T8 Object */
- 8, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 8, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/* T9 Object */
- 131, 0, 0, 26, 42, 0, 32, 60, 2, 5,
- 0, 5, 5, 34, 10, 10, 10, 10, 85, 5,
- 255, 2, 8, 9, 9, 9, 0, 0, 5, 20,
- 0, 5, 45, 46,
+ 131, 0, 0, 26, 42, 0, 32, 60, 2, 5,
+ 0, 5, 5, 34, 10, 10, 10, 10, 255, 2,
+ 85, 5, 18, 18, 18, 18, 0, 0, 5, 20,
+ 0, 5, 45, 46,
/* T15 Object */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0,
/* T22 Object */
- 0, 0, 0, 0, 0, 0, 0, 0, 30, 0,
- 0, 0, 255, 255, 255, 255, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 30, 0,
+ 0, 0, 255, 255, 255, 255, 0,
/* T24 Object */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0,
/* T25 Object */
- 3, 0, 188, 52, 52, 33, 0, 0, 0, 0,
- 0, 0, 0, 0,
+ 3, 0, 188, 52, 52, 33, 0, 0, 0, 0,
+ 0, 0, 0, 0,
/* T27 Object */
- 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0,
/* T28 Object */
- 0, 0, 0, 8, 8, 8,
+ 0, 0, 0, 8, 8, 60,
/* T40 Object */
- 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
/* T41 Object */
- 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
/* T43 Object */
- 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
};
#define MXT_TS_GPIO_IRQ 11
@@ -3435,15 +3435,10 @@
static struct mxt_platform_data mxt_platform_data = {
.config = mxt_config_data,
.config_length = ARRAY_SIZE(mxt_config_data),
- .x_line = 26,
- .y_line = 42,
- .x_size = 767,
- .y_size = 1365,
- .blen = 32,
- .threshold = 40,
- .voltage = 3300000, /* 3.3V */
- .orient = MXT_ROTATED_90,
+ .x_size = 1365,
+ .y_size = 767,
.irqflags = IRQF_TRIGGER_FALLING,
+ .i2c_pull_up = true,
};
static struct i2c_board_info mxt_device_info[] __initdata = {
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index dab800f..6141e1f 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -2548,19 +2548,15 @@
*/
if (machine_is_msm8x60_fluid()) {
/* fluid has different firmware, gpios */
- peripheral_dsps.name = DSPS_PIL_FLUID_NAME;
pdata->pil_name = DSPS_PIL_FLUID_NAME;
pdata->gpios = dsps_fluid_gpios;
pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
} else {
- peripheral_dsps.name = DSPS_PIL_GENERIC_NAME;
pdata->pil_name = DSPS_PIL_GENERIC_NAME;
pdata->gpios = dsps_surf_gpios;
pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
}
- msm_pil_add_device(&peripheral_dsps);
-
platform_device_register(&msm_dsps_device);
}
#endif /* CONFIG_MSM_DSPS */
diff --git a/arch/arm/mach-msm/board-qrd7627a.c b/arch/arm/mach-msm/board-qrd7627a.c
index b07ac00..ff392eb 100644
--- a/arch/arm/mach-msm/board-qrd7627a.c
+++ b/arch/arm/mach-msm/board-qrd7627a.c
@@ -1455,6 +1455,57 @@
early_param("fb_size", fb_size_setup);
+static struct resource msm_fb_resources[] = {
+ {
+ .flags = IORESOURCE_DMA,
+ }
+};
+
+static int msm_fb_detect_panel(const char *name)
+{
+ int ret;
+
+ if (!strncmp(name, "mipi_video_truly_wvga", 21))
+ ret = 0;
+ else
+ ret = -ENODEV;
+
+ return ret;
+}
+
+static int mipi_truly_set_bl(int on)
+{
+ gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, !!on);
+
+ return 1;
+}
+
+static struct msm_fb_platform_data msm_fb_pdata = {
+ .detect_client = msm_fb_detect_panel,
+};
+
+static struct platform_device msm_fb_device = {
+ .name = "msm_fb",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(msm_fb_resources),
+ .resource = msm_fb_resources,
+ .dev = {
+ .platform_data = &msm_fb_pdata,
+ }
+};
+
+static struct msm_panel_common_pdata mipi_truly_pdata = {
+ .pmic_backlight = mipi_truly_set_bl,
+};
+
+static struct platform_device mipi_dsi_truly_panel_device = {
+ .name = "mipi_truly",
+ .id = 0,
+ .dev = {
+ .platform_data = &mipi_truly_pdata,
+ }
+};
+
static void __init msm7627a_init_mmc(void)
{
vreg_emmc = vreg_get(NULL, "emmc");
@@ -1701,6 +1752,7 @@
&android_usb_device,
&android_pmem_device,
&android_pmem_adsp_device,
+ &msm_fb_device,
&android_pmem_audio_device,
&msm_device_snd,
&msm_device_adspdec,
@@ -1709,6 +1761,7 @@
#ifdef CONFIG_BT
&msm_bt_power_device,
#endif
+ &mipi_dsi_truly_panel_device,
&msm_wlan_ar6000_pm_device,
&asoc_msm_pcm,
&asoc_msm_dai0,
@@ -1733,7 +1786,15 @@
static void __init msm_msm7627a_allocate_memory_regions(void)
{
- pr_info("Dummy allocation for fb\n");
+ void *addr;
+ unsigned long size;
+
+ size = fb_size ? : MSM_FB_SIZE;
+ addr = alloc_bootmem_align(size, 0x1000);
+ msm_fb_resources[0].start = __pa(addr);
+ msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
+ pr_info("allocating %lu bytes at %p (%lx physical) for fb\n", size,
+ addr, __pa(addr));
}
static struct memtype_reserve msm7627a_reserve_table[] __initdata = {
@@ -1747,6 +1808,159 @@
},
};
+static struct msm_panel_common_pdata mdp_pdata = {
+ .gpio = 97,
+ .mdp_rev = MDP_REV_303,
+};
+
+#define GPIO_LCDC_BRDG_PD 128
+#define GPIO_LCDC_BRDG_RESET_N 129
+#define GPIO_LCD_DSI_SEL 125
+
+static unsigned mipi_dsi_gpio[] = {
+ GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT,
+ GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
+ GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT,
+ GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* LCDC_BRDG_PD */
+};
+
+static unsigned lcd_dsi_sel_gpio[] = {
+ GPIO_CFG(GPIO_LCD_DSI_SEL, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
+ GPIO_CFG_2MA),
+};
+
+enum {
+ DSI_SINGLE_LANE = 1,
+ DSI_TWO_LANES,
+};
+
+static int msm_fb_get_lane_config(void)
+{
+ pr_info("DSI_TWO_LANES\n");
+ return DSI_TWO_LANES;
+}
+
+static int mipi_truly_sel_mode(int video_mode)
+{
+ int rc = 0;
+
+ rc = gpio_request(GPIO_LCD_DSI_SEL, "lcd_dsi_sel");
+ if (rc < 0)
+ goto gpio_error;
+
+ rc = gpio_tlmm_config(lcd_dsi_sel_gpio[0], GPIO_CFG_ENABLE);
+ if (rc)
+ goto gpio_error;
+
+ rc = gpio_direction_output(GPIO_LCD_DSI_SEL, 1);
+ if (!rc) {
+ gpio_set_value_cansleep(GPIO_LCD_DSI_SEL, video_mode);
+ return rc;
+ } else {
+ goto gpio_error;
+ }
+
+gpio_error:
+ pr_err("mipi_truly_sel_mode failed\n");
+ gpio_free(GPIO_LCD_DSI_SEL);
+ return rc;
+}
+
+static int msm_fb_dsi_client_qrd1_reset(void)
+{
+ int rc = 0;
+
+ rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
+ if (rc < 0) {
+ pr_err("failed to request lcd brdg reset_n\n");
+ return rc;
+ }
+
+ rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
+ if (rc < 0) {
+ pr_err("Failed to enable LCDC Bridge reset enable\n");
+ return rc;
+ }
+
+ rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
+ if (rc < 0) {
+ pr_err("Failed GPIO bridge pd\n");
+ gpio_free(GPIO_LCDC_BRDG_RESET_N);
+ return rc;
+ }
+
+ mipi_truly_sel_mode(1);
+
+ return rc;
+}
+
+static int msm_fb_dsi_client_reset(void)
+{
+ int rc = 0;
+
+ rc = msm_fb_dsi_client_qrd1_reset();
+ return rc;
+}
+
+static int dsi_gpio_initialized;
+
+static int mipi_dsi_panel_qrd1_power(int on)
+{
+ int rc = 0;
+
+ if (!dsi_gpio_initialized) {
+ rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
+ if (rc < 0)
+ return rc;
+
+ rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
+ if (rc < 0) {
+ pr_err("failed to enable backlight\n");
+ gpio_free(GPIO_BACKLIGHT_EN);
+ return rc;
+ }
+ dsi_gpio_initialized = 1;
+ }
+
+ gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, !!on);
+
+ if (!on) {
+ gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 1);
+ msleep(20);
+ gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 0);
+ msleep(20);
+ gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 1);
+
+ }
+
+ return rc;
+}
+
+static int mipi_dsi_panel_power(int on)
+{
+ int rc = 0;
+
+ rc = mipi_dsi_panel_qrd1_power(on);
+ return rc;
+}
+
+#define MDP_303_VSYNC_GPIO 97
+
+#ifdef CONFIG_FB_MSM_MDP303
+static struct mipi_dsi_platform_data mipi_dsi_pdata = {
+ .vsync_gpio = MDP_303_VSYNC_GPIO,
+ .dsi_power_save = mipi_dsi_panel_power,
+ .dsi_client_reset = msm_fb_dsi_client_reset,
+ .get_lane_config = msm_fb_get_lane_config,
+};
+#endif
+
+static void __init msm_fb_add_devices(void)
+{
+ msm_fb_register_device("mdp", &mdp_pdata);
+ msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
+}
+
static void __init size_pmem_devices(void)
{
#ifdef CONFIG_ANDROID_PMEM
@@ -1839,6 +2053,7 @@
#endif
msm_pm_set_platform_data(msm7627a_pm_data,
ARRAY_SIZE(msm7627a_pm_data));
+ msm_fb_add_devices();
#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 734b1fe..ee122ec 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -5159,6 +5159,7 @@
CLK_LOOKUP("afab_a_clk", afab_a_clk.c, NULL),
CLK_LOOKUP("cfpb_clk", cfpb_clk.c, NULL),
CLK_LOOKUP("cfpb_a_clk", cfpb_a_clk.c, NULL),
+ CLK_LOOKUP("cfpb_a_clk", cfpb_a_clk.c, "clock-8960"),
CLK_LOOKUP("dfab_clk", dfab_clk.c, NULL),
CLK_LOOKUP("dfab_a_clk", dfab_a_clk.c, NULL),
CLK_LOOKUP("ebi1_clk", ebi1_clk.c, NULL),
@@ -5821,6 +5822,7 @@
{
int rc;
struct clk *mmfpb_a_clk = clk_get_sys("clock-8960", "mmfpb_a_clk");
+ struct clk *cfpb_a_clk = clk_get_sys("clock-8960", "cfpb_a_clk");
/* Vote for MMFPB to be at least 76.8MHz when an Apps CPU is active. */
if (WARN(IS_ERR(mmfpb_a_clk), "mmfpb_a_clk not found (%ld)\n",
@@ -5833,6 +5835,16 @@
if (WARN(rc, "mmfpb_a_clk not enabled (%d)\n", rc))
return rc;
+ /* Vote for CFPB to be at least 64MHz when an Apps CPU is active. */
+ if (WARN(IS_ERR(cfpb_a_clk), "cfpb_a_clk not found (%ld)\n",
+ PTR_ERR(cfpb_a_clk)))
+ return PTR_ERR(cfpb_a_clk);
+ rc = clk_set_min_rate(cfpb_a_clk, 64000000);
+ if (WARN(rc, "cfpb_a_clk rate was not set (%d)\n", rc))
+ return rc;
+ rc = clk_enable(cfpb_a_clk);
+ if (WARN(rc, "cfpb_a_clk not enabled (%d)\n", rc))
+ return rc;
return local_unvote_sys_vdd(HIGH);
}
diff --git a/arch/arm/mach-msm/clock-9615.c b/arch/arm/mach-msm/clock-9615.c
index 84121ef..63d3f72 100644
--- a/arch/arm/mach-msm/clock-9615.c
+++ b/arch/arm/mach-msm/clock-9615.c
@@ -27,6 +27,7 @@
#include <mach/clk.h>
#include <mach/msm_xo.h>
#include <mach/rpm-9615.h>
+#include <mach/rpm-regulator.h>
#include "clock-local.h"
#include "clock-voter.h"
@@ -290,17 +291,14 @@
/* Update the sys_vdd voltage given a level. */
static int msm9615_update_sys_vdd(enum sys_vdd_level level)
{
- /* TODO: Implement when rpm-regulator is ready.
static const int vdd_uv[] = {
- [NONE...LOW] = 945000,
- [NOMINAL] = 1050000,
+ [NONE...LOW] = 1150000,
+ [NOMINAL] = 1150000,
[HIGH] = 1150000,
};
- return rpm_vreg_set_voltage(RPM_VREG_ID_PM8921_S3, RPM_VREG_VOTER3,
+ return rpm_vreg_set_voltage(RPM_VREG_ID_PM8018_S1, RPM_VREG_VOTER3,
vdd_uv[level], vdd_uv[HIGH], 1);
- */
- return 0;
}
static int soc_clk_reset(struct clk *clk, enum clk_reset_action action)
diff --git a/arch/arm/mach-msm/devices-8064.c b/arch/arm/mach-msm/devices-8064.c
index 99e8d23..3606c41 100644
--- a/arch/arm/mach-msm/devices-8064.c
+++ b/arch/arm/mach-msm/devices-8064.c
@@ -21,6 +21,7 @@
#include <mach/msm_iomap.h>
#include <mach/usbdiag.h>
#include <mach/msm_sps.h>
+#include <mach/dma.h>
#include "clock.h"
#include "devices.h"
@@ -53,13 +54,21 @@
#define MSM_HSUSB_PHYS 0x12500000
#define MSM_HSUSB_SIZE SZ_4K
-
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_0_IRQ,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18300000,
+ .end = 0x18300000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 0,
+ .sd_size = 0x800,
};
struct platform_device apq8064_device_dmov = {
@@ -67,6 +76,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
static struct resource resources_uart_gsbi1[] = {
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index b531dec..e81e2e8 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -803,9 +803,18 @@
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_1_IRQ,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18320000,
+ .end = 0x18320000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 1,
+ .sd_size = 0x800,
};
struct platform_device msm8960_device_dmov = {
@@ -813,6 +822,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
static struct platform_device *msm_sdcc_devices[] __initdata = {
diff --git a/arch/arm/mach-msm/devices-9615.c b/arch/arm/mach-msm/devices-9615.c
index 2e586c7..74e7871 100644
--- a/arch/arm/mach-msm/devices-9615.c
+++ b/arch/arm/mach-msm/devices-9615.c
@@ -16,6 +16,7 @@
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/msm_tsens.h>
+#include <linux/platform_data/qcom_crypto_device.h>
#include <linux/dma-mapping.h>
#include <asm/hardware/gic.h>
#include <asm/mach/flash.h>
@@ -29,7 +30,6 @@
#include <mach/msm_sps.h>
#include <mach/dma.h>
#include "devices.h"
-#include "acpuclock.h"
#include "mpm.h"
#include "spm.h"
#include "pm.h"
@@ -59,9 +59,18 @@
static struct resource msm_dmov_resource[] = {
{
.start = ADM_0_SCSS_1_IRQ,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18320000,
+ .end = 0x18320000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 1,
+ .sd_size = 0x800,
};
struct platform_device msm9615_device_dmov = {
@@ -69,6 +78,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
static struct resource resources_otg[] = {
@@ -322,6 +334,117 @@
};
#endif
+#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
+ defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
+ defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
+ defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
+
+#define QCE_SIZE 0x10000
+#define QCE_0_BASE 0x18500000
+
+#define QCE_HW_KEY_SUPPORT 0
+#define QCE_SHA_HMAC_SUPPORT 1
+#define QCE_SHARE_CE_RESOURCE 1
+#define QCE_CE_SHARED 0
+
+static struct resource qcrypto_resources[] = {
+ [0] = {
+ .start = QCE_0_BASE,
+ .end = QCE_0_BASE + QCE_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "crypto_channels",
+ .start = DMOV_CE_IN_CHAN,
+ .end = DMOV_CE_OUT_CHAN,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .name = "crypto_crci_in",
+ .start = DMOV_CE_IN_CRCI,
+ .end = DMOV_CE_IN_CRCI,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .name = "crypto_crci_out",
+ .start = DMOV_CE_OUT_CRCI,
+ .end = DMOV_CE_OUT_CRCI,
+ .flags = IORESOURCE_DMA,
+ },
+};
+
+static struct resource qcedev_resources[] = {
+ [0] = {
+ .start = QCE_0_BASE,
+ .end = QCE_0_BASE + QCE_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "crypto_channels",
+ .start = DMOV_CE_IN_CHAN,
+ .end = DMOV_CE_OUT_CHAN,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .name = "crypto_crci_in",
+ .start = DMOV_CE_IN_CRCI,
+ .end = DMOV_CE_IN_CRCI,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .name = "crypto_crci_out",
+ .start = DMOV_CE_OUT_CRCI,
+ .end = DMOV_CE_OUT_CRCI,
+ .flags = IORESOURCE_DMA,
+ },
+};
+
+#endif
+
+#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
+ defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
+
+static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
+ .ce_shared = QCE_CE_SHARED,
+ .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
+ .hw_key_support = QCE_HW_KEY_SUPPORT,
+ .sha_hmac = QCE_SHA_HMAC_SUPPORT,
+};
+
+struct platform_device msm9615_qcrypto_device = {
+ .name = "qcrypto",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(qcrypto_resources),
+ .resource = qcrypto_resources,
+ .dev = {
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &qcrypto_ce_hw_suppport,
+ },
+};
+#endif
+
+#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
+ defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
+
+static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
+ .ce_shared = QCE_CE_SHARED,
+ .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
+ .hw_key_support = QCE_HW_KEY_SUPPORT,
+ .sha_hmac = QCE_SHA_HMAC_SUPPORT,
+};
+
+struct platform_device msm9615_qcedev_device = {
+ .name = "qce",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(qcedev_resources),
+ .resource = qcedev_resources,
+ .dev = {
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &qcedev_ce_hw_suppport,
+ },
+};
+#endif
+
#define MSM_SDC1_BASE 0x12180000
#define MSM_SDC1_DML_BASE (MSM_SDC1_BASE + 0x800)
#define MSM_SDC1_BAM_BASE (MSM_SDC1_BASE + 0x2000)
@@ -667,8 +790,6 @@
void __init msm9615_device_init(void)
{
msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
- msm_clock_init(&msm9615_clock_init_data);
- acpuclk_init(&acpuclk_9615_soc_data);
BUG_ON(msm_rpm_init(&msm_rpm_data));
BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
ARRAY_SIZE(msm_rpmrs_levels)));
diff --git a/arch/arm/mach-msm/devices-fsm9xxx.c b/arch/arm/mach-msm/devices-fsm9xxx.c
index 426be10..d46e4d6 100644
--- a/arch/arm/mach-msm/devices-fsm9xxx.c
+++ b/arch/arm/mach-msm/devices-fsm9xxx.c
@@ -232,12 +232,21 @@
* ADM
*/
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t) MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x94610000,
+ .end = 0x94610000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -245,6 +254,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
/*
diff --git a/arch/arm/mach-msm/devices-msm7x01a.c b/arch/arm/mach-msm/devices-msm7x01a.c
index 9ed6fd1..1b9eb86 100644
--- a/arch/arm/mach-msm/devices-msm7x01a.c
+++ b/arch/arm/mach-msm/devices-msm7x01a.c
@@ -384,12 +384,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -397,6 +406,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm7x25.c b/arch/arm/mach-msm/devices-msm7x25.c
index ca3caa2..c166c8d 100644
--- a/arch/arm/mach-msm/devices-msm7x25.c
+++ b/arch/arm/mach-msm/devices-msm7x25.c
@@ -407,12 +407,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -420,6 +429,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm7x27.c b/arch/arm/mach-msm/devices-msm7x27.c
index 3772884..1bb9a21 100644
--- a/arch/arm/mach-msm/devices-msm7x27.c
+++ b/arch/arm/mach-msm/devices-msm7x27.c
@@ -372,12 +372,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -385,6 +394,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm7x27a.c b/arch/arm/mach-msm/devices-msm7x27a.c
index 488db75..7008bd5 100644
--- a/arch/arm/mach-msm/devices-msm7x27a.c
+++ b/arch/arm/mach-msm/devices-msm7x27a.c
@@ -188,17 +188,29 @@
static struct resource msm_dmov_resource[] = {
{
- .start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
- .flags = IORESOURCE_IRQ,
+ .start = INT_ADM_AARM,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
},
};
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
+};
+
struct platform_device msm_device_dmov = {
- .name = "msm_dmov",
- .id = -1,
- .resource = msm_dmov_resource,
- .num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .name = "msm_dmov",
+ .id = -1,
+ .resource = msm_dmov_resource,
+ .num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
struct platform_device msm_device_smd = {
diff --git a/arch/arm/mach-msm/devices-msm7x30.c b/arch/arm/mach-msm/devices-msm7x30.c
index d7832a3..d7fc93e 100644
--- a/arch/arm/mach-msm/devices-msm7x30.c
+++ b/arch/arm/mach-msm/devices-msm7x30.c
@@ -585,12 +585,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xAC400000,
+ .end = 0xAC400000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 2,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -598,6 +607,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0400000
diff --git a/arch/arm/mach-msm/devices-msm8x60.c b/arch/arm/mach-msm/devices-msm8x60.c
index 445f1d4..9f3e03d 100644
--- a/arch/arm/mach-msm/devices-msm8x60.c
+++ b/arch/arm/mach-msm/devices-msm8x60.c
@@ -1833,20 +1833,38 @@
.id = -1,
};
-struct resource msm_dmov_resource_adm0[] = {
+static struct resource msm_dmov_resource_adm0[] = {
{
.start = INT_ADM0_AARM,
- .end = (resource_size_t)MSM_DMOV_ADM0_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18320000,
+ .end = 0x18320000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
};
-struct resource msm_dmov_resource_adm1[] = {
+static struct resource msm_dmov_resource_adm1[] = {
{
.start = INT_ADM1_AARM,
- .end = (resource_size_t)MSM_DMOV_ADM1_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0x18420000,
+ .end = 0x18420000 + SZ_1M - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata_adm0 = {
+ .sd = 1,
+ .sd_size = 0x800,
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata_adm1 = {
+ .sd = 1,
+ .sd_size = 0x800,
};
struct platform_device msm_device_dmov_adm0 = {
@@ -1854,6 +1872,9 @@
.id = 0,
.resource = msm_dmov_resource_adm0,
.num_resources = ARRAY_SIZE(msm_dmov_resource_adm0),
+ .dev = {
+ .platform_data = &msm_dmov_pdata_adm0,
+ },
};
struct platform_device msm_device_dmov_adm1 = {
@@ -1861,6 +1882,9 @@
.id = 1,
.resource = msm_dmov_resource_adm1,
.num_resources = ARRAY_SIZE(msm_dmov_resource_adm1),
+ .dev = {
+ .platform_data = &msm_dmov_pdata_adm1,
+ },
};
/* MSM Video core device */
diff --git a/arch/arm/mach-msm/devices-qsd8x50.c b/arch/arm/mach-msm/devices-qsd8x50.c
index 5ae5b8b..2367719 100644
--- a/arch/arm/mach-msm/devices-qsd8x50.c
+++ b/arch/arm/mach-msm/devices-qsd8x50.c
@@ -438,12 +438,21 @@
.id = -1,
};
-struct resource msm_dmov_resource[] = {
+static struct resource msm_dmov_resource[] = {
{
.start = INT_ADM_AARM,
- .end = (resource_size_t)MSM_DMOV_BASE,
.flags = IORESOURCE_IRQ,
},
+ {
+ .start = 0xA9700000,
+ .end = 0xA9700000 + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct msm_dmov_pdata msm_dmov_pdata = {
+ .sd = 3,
+ .sd_size = 0x400,
};
struct platform_device msm_device_dmov = {
@@ -451,6 +460,9 @@
.id = -1,
.resource = msm_dmov_resource,
.num_resources = ARRAY_SIZE(msm_dmov_resource),
+ .dev = {
+ .platform_data = &msm_dmov_pdata,
+ },
};
#define MSM_SDC1_BASE 0xA0300000
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index 1ebc2a7..1748838 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -187,10 +187,19 @@
struct platform_device *msm_add_gsbi9_uart(void);
extern struct platform_device msm_device_touchscreen;
-extern struct pil_device peripheral_dsps;
extern struct platform_device led_pdev;
extern struct platform_device ion_dev;
extern struct platform_device msm_rpm_device;
extern struct platform_device msm_device_rng;
+
+#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
+ defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
+extern struct platform_device msm9615_qcrypto_device;
+#endif
+
+#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
+ defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
+extern struct platform_device msm9615_qcedev_device;
+#endif
#endif
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c
index ddf7732..ad1aecd 100644
--- a/arch/arm/mach-msm/dma.c
+++ b/arch/arm/mach-msm/dma.c
@@ -57,6 +57,8 @@
struct msm_dmov_crci_conf *crci_conf;
struct msm_dmov_chan_conf *chan_conf;
int channel_active;
+ int sd;
+ size_t sd_size;
struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT];
struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT];
spinlock_t lock;
@@ -185,7 +187,8 @@
#endif
#define MSM_DMOV_ID_COUNT (MSM_DMOV_CHANNEL_COUNT * ARRAY_SIZE(dmov_conf))
-#define DMOV_REG(name, adm) ((name) + (dmov_conf[adm].base))
+#define DMOV_REG(name, adm) ((name) + (dmov_conf[adm].base) +\
+ (dmov_conf[adm].sd * dmov_conf[adm].sd_size))
#define DMOV_ID_TO_ADM(id) ((id) / MSM_DMOV_CHANNEL_COUNT)
#define DMOV_ID_TO_CHAN(id) ((id) % MSM_DMOV_CHANNEL_COUNT)
#define DMOV_CHAN_ADM_TO_ID(ch, adm) ((ch) + (adm) * MSM_DMOV_CHANNEL_COUNT)
@@ -620,33 +623,46 @@
int adm = (pdev->id >= 0) ? pdev->id : 0;
int i;
int ret;
- struct resource *res =
+ struct msm_dmov_pdata *pdata = pdev->dev.platform_data;
+ struct resource *irqres =
platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ struct resource *mres =
+ platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (res) {
- dmov_conf[adm].irq = res->start;
- dmov_conf[adm].base = (void *)res->end;
+ if (pdata) {
+ dmov_conf[adm].sd = pdata->sd;
+ dmov_conf[adm].sd_size = pdata->sd_size;
}
- if (!dmov_conf[adm].base || !dmov_conf[adm].irq)
+ if (!dmov_conf[adm].sd_size)
return -ENXIO;
+ if (!irqres || !irqres->start)
+ return -ENXIO;
+ dmov_conf[adm].irq = irqres->start;
+
+ if (!mres || !mres->start)
+ return -ENXIO;
+ dmov_conf[adm].base = ioremap_nocache(mres->start, resource_size(mres));
+ if (!dmov_conf[adm].base)
+ return -ENOMEM;
+
ret = request_irq(dmov_conf[adm].irq, msm_datamover_irq_handler,
0, "msmdatamover", NULL);
if (ret) {
PRINT_ERROR("Requesting ADM%d irq %d failed\n", adm,
dmov_conf[adm].irq);
- return ret;
+ goto out_map;
}
disable_irq(dmov_conf[adm].irq);
ret = msm_dmov_init_clocks(pdev);
if (ret) {
PRINT_ERROR("Requesting ADM%d clocks failed\n", adm);
- return -ENOENT;
+ goto out_irq;
}
ret = msm_dmov_clk_toggle(adm, 1);
if (ret) {
PRINT_ERROR("Enabling ADM%d clocks failed\n", adm);
- return -ENOENT;
+ goto out_irq;
}
config_datamover(adm);
@@ -661,6 +677,11 @@
wmb();
msm_dmov_clk_toggle(adm, 0);
return ret;
+out_irq:
+ free_irq(dmov_conf[adm].irq, NULL);
+out_map:
+ iounmap(dmov_conf[adm].base);
+ return ret;
}
static struct platform_driver msm_dmov_driver = {
diff --git a/arch/arm/mach-msm/include/mach/board.h b/arch/arm/mach-msm/include/mach/board.h
index 349b2d0..bc41915 100644
--- a/arch/arm/mach-msm/include/mach/board.h
+++ b/arch/arm/mach-msm/include/mach/board.h
@@ -415,6 +415,7 @@
void __init msm_map_qsd8x50_io(void);
void __init msm_map_msm8x60_io(void);
void __init msm_map_msm8960_io(void);
+void __init msm_map_msm8930_io(void);
void __init msm_map_apq8064_io(void);
void __init msm_map_msm7x30_io(void);
void __init msm_map_fsm9xxx_io(void);
diff --git a/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h b/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h
index 300ee87..e284267 100644
--- a/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h
+++ b/arch/arm/mach-msm/include/mach/dma-fsm9xxx.h
@@ -13,12 +13,6 @@
#ifndef __ASM_ARCH_MSM_DMA_FSM9XXX_H
#define __ASM_ARCH_MSM_DMA_FSM9XXX_H
-#define DMOV_SD_SIZE 0x1400
-#define DMOV_SD_MASTER 0
-#define DMOV_SD_AARM 3
-#define DMOV_SD_MASTER_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_MASTER)
-#define DMOV_SD_AARM_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_AARM)
-
/* DMA channels allocated to Scorpion */
#define DMOV_GP_CHAN 4
#define DMOV_CE1_IN_CHAN 5
diff --git a/arch/arm/mach-msm/include/mach/dma.h b/arch/arm/mach-msm/include/mach/dma.h
index 9c331a4..1474fcb 100644
--- a/arch/arm/mach-msm/include/mach/dma.h
+++ b/arch/arm/mach-msm/include/mach/dma.h
@@ -38,6 +38,11 @@
void *user; /* Pointer for caller's reference */
};
+struct msm_dmov_pdata {
+ int sd;
+ size_t sd_size;
+};
+
void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd);
void msm_dmov_enqueue_cmd_ext(unsigned id, struct msm_dmov_cmd *cmd);
void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful);
@@ -46,64 +51,37 @@
#define DMOV_CRCIS_PER_CONF 10
-#define DMOV_ADDR(off, ch, sd) ((DMOV_SD_SIZE*(sd)) + (off) + ((ch) << 2))
-#define DMOV_SD0(off, ch) DMOV_ADDR(off, ch, 0)
-#define DMOV_SD1(off, ch) DMOV_ADDR(off, ch, 1)
-#define DMOV_SD2(off, ch) DMOV_ADDR(off, ch, 2)
-#define DMOV_SD3(off, ch) DMOV_ADDR(off, ch, 3)
+#define DMOV_ADDR(off, ch) ((off) + ((ch) << 2))
-#if defined(CONFIG_ARCH_MSM7X30)
-#define DMOV_SD_SIZE 0x400
-#define DMOV_SD_AARM 2
-#elif defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_MSM9615)
-#define DMOV_SD_SIZE 0x800
-#define DMOV_SD_AARM 1
-#elif defined(CONFIG_ARCH_APQ8064)
-#define DMOV_SD_SIZE 0x800
-#define DMOV_SD_AARM 0
-#elif defined(CONFIG_MSM_ADM3)
-#define DMOV_SD_SIZE 0x800
-#define DMOV_SD_MASTER 1
-#define DMOV_SD_AARM 1
-#define DMOV_SD_MASTER_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_MASTER)
-#elif defined(CONFIG_ARCH_FSM9XXX)
-/* defined in dma-fsm9xxx.h */
-#else
-#define DMOV_SD_SIZE 0x400
-#define DMOV_SD_AARM 3
-#endif
-
-#define DMOV_SD_AARM_ADDR(off, ch) DMOV_ADDR(off, ch, DMOV_SD_AARM)
-
-#define DMOV_CMD_PTR(ch) DMOV_SD_AARM_ADDR(0x000, ch)
+#define DMOV_CMD_PTR(ch) DMOV_ADDR(0x000, ch)
#define DMOV_CMD_LIST (0 << 29) /* does not work */
#define DMOV_CMD_PTR_LIST (1 << 29) /* works */
#define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */
#define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */
#define DMOV_CMD_ADDR(addr) ((addr) >> 3)
-#define DMOV_RSLT(ch) DMOV_SD_AARM_ADDR(0x040, ch)
+#define DMOV_RSLT(ch) DMOV_ADDR(0x040, ch)
#define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */
#define DMOV_RSLT_ERROR (1 << 3)
#define DMOV_RSLT_FLUSH (1 << 2)
#define DMOV_RSLT_DONE (1 << 1) /* top pointer done */
#define DMOV_RSLT_USER (1 << 0) /* command with FR force result */
-#define DMOV_FLUSH0(ch) DMOV_SD_AARM_ADDR(0x080, ch)
-#define DMOV_FLUSH1(ch) DMOV_SD_AARM_ADDR(0x0C0, ch)
-#define DMOV_FLUSH2(ch) DMOV_SD_AARM_ADDR(0x100, ch)
-#define DMOV_FLUSH3(ch) DMOV_SD_AARM_ADDR(0x140, ch)
-#define DMOV_FLUSH4(ch) DMOV_SD_AARM_ADDR(0x180, ch)
-#define DMOV_FLUSH5(ch) DMOV_SD_AARM_ADDR(0x1C0, ch)
+#define DMOV_FLUSH0(ch) DMOV_ADDR(0x080, ch)
+#define DMOV_FLUSH1(ch) DMOV_ADDR(0x0C0, ch)
+#define DMOV_FLUSH2(ch) DMOV_ADDR(0x100, ch)
+#define DMOV_FLUSH3(ch) DMOV_ADDR(0x140, ch)
+#define DMOV_FLUSH4(ch) DMOV_ADDR(0x180, ch)
+#define DMOV_FLUSH5(ch) DMOV_ADDR(0x1C0, ch)
#define DMOV_FLUSH_TYPE (1 << 31)
-#define DMOV_STATUS(ch) DMOV_SD_AARM_ADDR(0x200, ch)
+#define DMOV_STATUS(ch) DMOV_ADDR(0x200, ch)
#define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29))
#define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3)
#define DMOV_STATUS_RSLT_VALID (1 << 1)
#define DMOV_STATUS_CMD_PTR_RDY (1 << 0)
-#define DMOV_CONF(ch) DMOV_SD_MASTER_ADDR(0x240, ch)
+#define DMOV_CONF(ch) DMOV_ADDR(0x240, ch)
#define DMOV_CONF_SD(sd) (((sd & 4) << 11) | ((sd & 3) << 4))
#define DMOV_CONF_IRQ_EN (1 << 6)
#define DMOV_CONF_FORCE_RSLT_EN (1 << 7)
@@ -111,28 +89,28 @@
#define DMOV_CONF_MPU_DISABLE (1 << 11)
#define DMOV_CONF_PRIORITY(n) (n << 0)
-#define DMOV_DBG_ERR(ci) DMOV_SD_MASTER_ADDR(0x280, ci)
+#define DMOV_DBG_ERR(ci) DMOV_ADDR(0x280, ci)
-#define DMOV_RSLT_CONF(ch) DMOV_SD_AARM_ADDR(0x300, ch)
+#define DMOV_RSLT_CONF(ch) DMOV_ADDR(0x300, ch)
#define DMOV_RSLT_CONF_FORCE_TOP_PTR_RSLT (1 << 2)
#define DMOV_RSLT_CONF_FORCE_FLUSH_RSLT (1 << 1)
#define DMOV_RSLT_CONF_IRQ_EN (1 << 0)
-#define DMOV_ISR DMOV_SD_AARM_ADDR(0x380, 0)
+#define DMOV_ISR DMOV_ADDR(0x380, 0)
-#define DMOV_CI_CONF(ci) DMOV_SD_MASTER_ADDR(0x390, ci)
+#define DMOV_CI_CONF(ci) DMOV_ADDR(0x390, ci)
#define DMOV_CI_CONF_RANGE_END(n) ((n) << 24)
#define DMOV_CI_CONF_RANGE_START(n) ((n) << 16)
#define DMOV_CI_CONF_MAX_BURST(n) ((n) << 0)
-#define DMOV_CI_DBG_ERR(ci) DMOV_SD_MASTER_ADDR(0x3B0, ci)
+#define DMOV_CI_DBG_ERR(ci) DMOV_ADDR(0x3B0, ci)
-#define DMOV_CRCI_CONF0 DMOV_SD_MASTER_ADDR(0x3D0, 0)
-#define DMOV_CRCI_CONF1 DMOV_SD_MASTER_ADDR(0x3D4, 0)
+#define DMOV_CRCI_CONF0 DMOV_ADDR(0x3D0, 0)
+#define DMOV_CRCI_CONF1 DMOV_ADDR(0x3D4, 0)
#define DMOV_CRCI_CONF0_SD(crci, sd) (sd << (crci*3))
#define DMOV_CRCI_CONF1_SD(crci, sd) (sd << ((crci-DMOV_CRCIS_PER_CONF)*3))
-#define DMOV_CRCI_CTL(crci) DMOV_SD_AARM_ADDR(0x400, crci)
+#define DMOV_CRCI_CTL(crci) DMOV_ADDR(0x400, crci)
#define DMOV_CRCI_CTL_BLK_SZ(n) ((n) << 0)
#define DMOV_CRCI_CTL_RST (1 << 17)
#define DMOV_CRCI_MUX (1 << 18)
diff --git a/arch/arm/mach-msm/include/mach/irqs-8930.h b/arch/arm/mach-msm/include/mach/irqs-8930.h
new file mode 100644
index 0000000..ed927bd
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/irqs-8930.h
@@ -0,0 +1,292 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ASM_ARCH_MSM_IRQS_8930_H
+#define __ASM_ARCH_MSM_IRQS_8930_H
+
+/* MSM ACPU Interrupt Numbers */
+
+/* 0-15: STI/SGI (software triggered/generated interrupts)
+ 16-31: PPI (private peripheral interrupts)
+ 32+: SPI (shared peripheral interrupts) */
+
+#define GIC_PPI_START 16
+#define GIC_SPI_START 32
+
+#define INT_VGIC (GIC_PPI_START + 0)
+#define INT_DEBUG_TIMER_EXP (GIC_PPI_START + 1)
+#define INT_GP_TIMER_EXP (GIC_PPI_START + 2)
+#define INT_GP_TIMER2_EXP (GIC_PPI_START + 3)
+#define WDT0_ACCSCSSNBARK_INT (GIC_PPI_START + 4)
+#define WDT1_ACCSCSSNBARK_INT (GIC_PPI_START + 5)
+#define AVS_SVICINT (GIC_PPI_START + 6)
+#define AVS_SVICINTSWDONE (GIC_PPI_START + 7)
+#define CPU_DBGCPUXCOMMRXFULL (GIC_PPI_START + 8)
+#define CPU_DBGCPUXCOMMTXEMPTY (GIC_PPI_START + 9)
+#define INT_ARMQC_PERFMON (GIC_PPI_START + 10)
+#define SC_AVSCPUXDOWN (GIC_PPI_START + 11)
+#define SC_AVSCPUXUP (GIC_PPI_START + 12)
+#define SC_SICCPUXACGIRPTREQ (GIC_PPI_START + 13)
+#define SC_SICCPUXEXTFAULTIRPTREQ (GIC_PPI_START + 14)
+/* PPI 15 is unused */
+
+#define APCC_QGICACGIRPTREQ (GIC_SPI_START + 0)
+#define APCC_QGICL2PERFMONIRPTREQ (GIC_SPI_START + 1)
+#define SC_SICL2PERFMONIRPTREQ APCC_QGICL2PERFMONIRPTREQ
+#define APCC_QGICL2IRPTREQ (GIC_SPI_START + 2)
+#define APCC_QGICMPUIRPTREQ (GIC_SPI_START + 3)
+#define TLMM_MSM_DIR_CONN_IRQ_0 (GIC_SPI_START + 4)
+#define TLMM_MSM_DIR_CONN_IRQ_1 (GIC_SPI_START + 5)
+#define TLMM_MSM_DIR_CONN_IRQ_2 (GIC_SPI_START + 6)
+#define TLMM_MSM_DIR_CONN_IRQ_3 (GIC_SPI_START + 7)
+#define TLMM_MSM_DIR_CONN_IRQ_4 (GIC_SPI_START + 8)
+#define TLMM_MSM_DIR_CONN_IRQ_5 (GIC_SPI_START + 9)
+#define TLMM_MSM_DIR_CONN_IRQ_6 (GIC_SPI_START + 10)
+#define TLMM_MSM_DIR_CONN_IRQ_7 (GIC_SPI_START + 11)
+#define TLMM_MSM_DIR_CONN_IRQ_8 (GIC_SPI_START + 12)
+#define TLMM_MSM_DIR_CONN_IRQ_9 (GIC_SPI_START + 13)
+#define PM8921_SEC_IRQ_103 (GIC_SPI_START + 14)
+#define PM8018_SEC_IRQ_106 (GIC_SPI_START + 15)
+#define TLMM_MSM_SUMMARY_IRQ (GIC_SPI_START + 16)
+#define SPDM_RT_1_IRQ (GIC_SPI_START + 17)
+#define SPDM_DIAG_IRQ (GIC_SPI_START + 18)
+#define RPM_APCC_CPU0_GP_HIGH_IRQ (GIC_SPI_START + 19)
+#define RPM_APCC_CPU0_GP_MEDIUM_IRQ (GIC_SPI_START + 20)
+#define RPM_APCC_CPU0_GP_LOW_IRQ (GIC_SPI_START + 21)
+#define RPM_APCC_CPU0_WAKE_UP_IRQ (GIC_SPI_START + 22)
+#define RPM_APCC_CPU1_GP_HIGH_IRQ (GIC_SPI_START + 23)
+#define RPM_APCC_CPU1_GP_MEDIUM_IRQ (GIC_SPI_START + 24)
+#define RPM_APCC_CPU1_GP_LOW_IRQ (GIC_SPI_START + 25)
+#define RPM_APCC_CPU1_WAKE_UP_IRQ (GIC_SPI_START + 26)
+#define SSBI2_2_SC_CPU0_SECURE_IRQ (GIC_SPI_START + 27)
+#define SSBI2_2_SC_CPU0_NON_SECURE_IRQ (GIC_SPI_START + 28)
+#define SSBI2_1_SC_CPU0_SECURE_IRQ (GIC_SPI_START + 29)
+#define SSBI2_1_SC_CPU0_NON_SECURE_IRQ (GIC_SPI_START + 30)
+#define MSMC_SC_SEC_CE_IRQ (GIC_SPI_START + 31)
+#define MSMC_SC_PRI_CE_IRQ (GIC_SPI_START + 32)
+#define SLIMBUS0_CORE_EE1_IRQ (GIC_SPI_START + 33)
+#define SLIMBUS0_BAM_EE1_IRQ (GIC_SPI_START + 34)
+#define Q6FW_WDOG_EXPIRED_IRQ (GIC_SPI_START + 35)
+#define Q6SW_WDOG_EXPIRED_IRQ (GIC_SPI_START + 36)
+#define MSS_TO_APPS_IRQ_0 (GIC_SPI_START + 37)
+#define MSS_TO_APPS_IRQ_1 (GIC_SPI_START + 38)
+#define MSS_TO_APPS_IRQ_2 (GIC_SPI_START + 39)
+#define MSS_TO_APPS_IRQ_3 (GIC_SPI_START + 40)
+#define MSS_TO_APPS_IRQ_4 (GIC_SPI_START + 41)
+#define MSS_TO_APPS_IRQ_5 (GIC_SPI_START + 42)
+#define MSS_TO_APPS_IRQ_6 (GIC_SPI_START + 43)
+#define MSS_TO_APPS_IRQ_7 (GIC_SPI_START + 44)
+#define MSS_TO_APPS_IRQ_8 (GIC_SPI_START + 45)
+#define MSS_TO_APPS_IRQ_9 (GIC_SPI_START + 46)
+#define VPE_IRQ (GIC_SPI_START + 47)
+#define VFE_IRQ (GIC_SPI_START + 48)
+#define VCODEC_IRQ (GIC_SPI_START + 49)
+/* SPI IRQ 50 is unused */
+#define SMMU_VPE_CB_SC_SECURE_IRQ (GIC_SPI_START + 51)
+#define SMMU_VPE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 52)
+#define SMMU_VFE_CB_SC_SECURE_IRQ (GIC_SPI_START + 53)
+#define SMMU_VFE_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 54)
+#define SMMU_VCODEC_B_CB_SC_SECURE_IRQ (GIC_SPI_START + 55)
+#define SMMU_VCODEC_B_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 56)
+#define SMMU_VCODEC_A_CB_SC_SECURE_IRQ (GIC_SPI_START + 57)
+#define SMMU_VCODEC_A_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 58)
+#define SMMU_ROT_CB_SC_SECURE_IRQ (GIC_SPI_START + 59)
+#define SMMU_ROT_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 60)
+#define SMMU_MDP1_CB_SC_SECURE_IRQ (GIC_SPI_START + 61)
+#define SMMU_MDP1_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 62)
+#define SMMU_MDP0_CB_SC_SECURE_IRQ (GIC_SPI_START + 63)
+#define SMMU_MDP0_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 64)
+/* SPI IRQ 65 is unused */
+/* SPI IRQ 66 is unused */
+#define SMMU_IJPEG_CB_SC_SECURE_IRQ (GIC_SPI_START + 67)
+#define SMMU_IJPEG_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 68)
+#define SMMU_GFX3D_CB_SC_SECURE_IRQ (GIC_SPI_START + 69)
+#define SMMU_GFX3D_CB_SC_NON_SECURE_IRQ (GIC_SPI_START + 70)
+/* SPI IRQ 71 is unused */
+/* SPI IRQ 72 is unused */
+#define ROT_IRQ (GIC_SPI_START + 73)
+#define MMSS_FABRIC_IRQ (GIC_SPI_START + 74)
+#define MDP_IRQ (GIC_SPI_START + 75)
+/* SPI IRQ 76 is unused */
+#define JPEG_IRQ (GIC_SPI_START + 77)
+#define MMSS_IMEM_IRQ (GIC_SPI_START + 78)
+#define HDMI_IRQ (GIC_SPI_START + 79)
+#define GFX3D_IRQ (GIC_SPI_START + 80)
+/* SPI IRQ 81 is unused */
+#define DSI1_IRQ (GIC_SPI_START + 82)
+#define CSI_1_IRQ (GIC_SPI_START + 83)
+#define CSI_0_IRQ (GIC_SPI_START + 84)
+#define LPASS_SCSS_AUDIO_IF_OUT0_IRQ (GIC_SPI_START + 85)
+#define LPASS_SCSS_MIDI_IRQ (GIC_SPI_START + 86)
+#define LPASS_Q6SS_WDOG_EXPIRED (GIC_SPI_START + 87)
+#define LPASS_SCSS_GP_LOW_IRQ (GIC_SPI_START + 88)
+#define LPASS_SCSS_GP_MEDIUM_IRQ (GIC_SPI_START + 89)
+#define LPASS_SCSS_GP_HIGH_IRQ (GIC_SPI_START + 90)
+#define TOP_IMEM_IRQ (GIC_SPI_START + 91)
+#define FABRIC_SYS_IRQ (GIC_SPI_START + 92)
+#define FABRIC_APPS_IRQ (GIC_SPI_START + 93)
+#define USB1_HS_BAM_IRQ (GIC_SPI_START + 94)
+#define SDC4_BAM_IRQ (GIC_SPI_START + 95)
+#define SDC3_BAM_IRQ (GIC_SPI_START + 96)
+#define SDC2_BAM_IRQ (GIC_SPI_START + 97)
+#define SDC1_BAM_IRQ (GIC_SPI_START + 98)
+#define FABRIC_SPS_IRQ (GIC_SPI_START + 99)
+#define USB1_HS_IRQ (GIC_SPI_START + 100)
+#define SDC4_IRQ_0 (GIC_SPI_START + 101)
+#define SDC3_IRQ_0 (GIC_SPI_START + 102)
+#define SDC2_IRQ_0 (GIC_SPI_START + 103)
+#define SDC1_IRQ_0 (GIC_SPI_START + 104)
+#define SPS_BAM_DMA_IRQ (GIC_SPI_START + 105)
+#define SPS_SEC_VIOL_IRQ (GIC_SPI_START + 106)
+#define SPS_MTI_0 (GIC_SPI_START + 107)
+#define SPS_MTI_1 (GIC_SPI_START + 108)
+#define SPS_MTI_2 (GIC_SPI_START + 109)
+#define SPS_MTI_3 (GIC_SPI_START + 110)
+#define GPS_PPS_OUT (GIC_SPI_START + 111)
+#define SPS_MTI_5 (GIC_SPI_START + 112)
+#define SPS_MTI_6 (GIC_SPI_START + 113)
+#define SPS_MTI_7 (GIC_SPI_START + 114)
+#define SPS_MTI_8 (GIC_SPI_START + 115)
+#define TLMM_MSM_DIR_CONN_IRQ_11 (GIC_SPI_START + 116)
+#define TLMM_MSM_DIR_CONN_IRQ_10 (GIC_SPI_START + 117)
+#define BAM_DMA1 (GIC_SPI_START + 118)
+#define BAM_DMA2 (GIC_SPI_START + 119)
+#define SDC1_IRQ (GIC_SPI_START + 120)
+#define SDC2_IRQ (GIC_SPI_START + 121)
+#define SDC3_IRQ (GIC_SPI_START + 122)
+#define SPS_MTI_16 (GIC_SPI_START + 123)
+#define SPS_MTI_17 (GIC_SPI_START + 124)
+#define SPS_MTI_18 (GIC_SPI_START + 125)
+#define SPS_MTI_19 (GIC_SPI_START + 126)
+#define SPS_MTI_20 (GIC_SPI_START + 127)
+#define SPS_MTI_21 (GIC_SPI_START + 128)
+#define SPS_MTI_22 (GIC_SPI_START + 129)
+#define SPS_MTI_23 (GIC_SPI_START + 130)
+#define SPS_MTI_24 (GIC_SPI_START + 131)
+#define SPS_MTI_25 (GIC_SPI_START + 132)
+#define SPS_MTI_26 (GIC_SPI_START + 133)
+#define SPS_MTI_27 (GIC_SPI_START + 134)
+#define SPS_MTI_28 (GIC_SPI_START + 135)
+#define SPS_MTI_29 (GIC_SPI_START + 136)
+#define SPS_MTI_30 (GIC_SPI_START + 137)
+#define SPS_MTI_31 (GIC_SPI_START + 138)
+#define CSIPHY_4LN_IRQ (GIC_SPI_START + 139)
+#define MSM8930_CSIPHY_2LN_IRQ (GIC_SPI_START + 140)
+#define USB2_IRQ (GIC_SPI_START + 141)
+#define USB1_IRQ (GIC_SPI_START + 142)
+#define TSSC_SSBI_IRQ (GIC_SPI_START + 143)
+#define TSSC_SAMPLE_IRQ (GIC_SPI_START + 144)
+#define TSSC_PENUP_IRQ (GIC_SPI_START + 145)
+#define MSM8930_GSBI1_UARTDM_IRQ (GIC_SPI_START + 146)
+#define MSM8930_GSBI1_QUP_IRQ (GIC_SPI_START + 147)
+#define MSM8930_GSBI2_UARTDM_IRQ (GIC_SPI_START + 148)
+#define MSM8930_GSBI2_QUP_IRQ (GIC_SPI_START + 149)
+#define GSBI3_UARTDM_IRQ (GIC_SPI_START + 150)
+#define GSBI3_QUP_IRQ (GIC_SPI_START + 151)
+#define GSBI4_UARTDM_IRQ (GIC_SPI_START + 152)
+#define GSBI4_QUP_IRQ (GIC_SPI_START + 153)
+#define GSBI5_UARTDM_IRQ (GIC_SPI_START + 154)
+#define GSBI5_QUP_IRQ (GIC_SPI_START + 155)
+#define GSBI6_UARTDM_IRQ (GIC_SPI_START + 156)
+#define GSBI6_QUP_IRQ (GIC_SPI_START + 157)
+#define GSBI7_UARTDM_IRQ (GIC_SPI_START + 158)
+#define GSBI7_QUP_IRQ (GIC_SPI_START + 159)
+#define GSBI8_UARTDM_IRQ (GIC_SPI_START + 160)
+#define GSBI8_QUP_IRQ (GIC_SPI_START + 161)
+#define TSIF_TSPP_IRQ (GIC_SPI_START + 162)
+#define TSIF_BAM_IRQ (GIC_SPI_START + 163)
+#define TSIF2_IRQ (GIC_SPI_START + 164)
+#define TSIF1_IRQ (GIC_SPI_START + 165)
+/* SPI IRQ 166 is unused */
+#define ISPIF_IRQ (GIC_SPI_START + 167)
+#define MSMC_SC_SEC_TMR_IRQ (GIC_SPI_START + 168)
+#define MSMC_SC_SEC_WDOG_BARK_IRQ (GIC_SPI_START + 169)
+#define ADM_0_SCSS_0_IRQ (GIC_SPI_START + 170)
+#define ADM_0_SCSS_1_IRQ (GIC_SPI_START + 171)
+#define ADM_0_SCSS_2_IRQ (GIC_SPI_START + 172)
+#define ADM_0_SCSS_3_IRQ (GIC_SPI_START + 173)
+#define CC_SCSS_WDT1CPU1BITEEXPIRED (GIC_SPI_START + 174)
+#define CC_SCSS_WDT1CPU0BITEEXPIRED (GIC_SPI_START + 175)
+#define CC_SCSS_WDT0CPU1BITEEXPIRED (GIC_SPI_START + 176)
+#define CC_SCSS_WDT0CPU0BITEEXPIRED (GIC_SPI_START + 177)
+#define TSENS_UPPER_LOWER_INT (GIC_SPI_START + 178)
+#define SSBI2_2_SC_CPU1_SECURE_INT (GIC_SPI_START + 179)
+#define SSBI2_2_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 180)
+#define SSBI2_1_SC_CPU1_SECURE_INT (GIC_SPI_START + 181)
+#define SSBI2_1_SC_CPU1_NON_SECURE_INT (GIC_SPI_START + 182)
+#define XPU_SUMMARY_IRQ (GIC_SPI_START + 183)
+#define BUS_EXCEPTION_SUMMARY_IRQ (GIC_SPI_START + 184)
+#define HSDDRX_EBI1CH0_IRQ (GIC_SPI_START + 185)
+/* SPI IRQ 186 is unused */
+#define SDC5_BAM_IRQ (GIC_SPI_START + 187)
+#define SDC5_IRQ_0 (GIC_SPI_START + 188)
+#define GSBI9_UARTDM_IRQ (GIC_SPI_START + 189)
+#define GSBI9_QUP_IRQ (GIC_SPI_START + 190)
+#define GSBI10_UARTDM_IRQ (GIC_SPI_START + 191)
+#define GSBI10_QUP_IRQ (GIC_SPI_START + 192)
+#define GSBI11_UARTDM_IRQ (GIC_SPI_START + 193)
+#define GSBI11_QUP_IRQ (GIC_SPI_START + 194)
+#define GSBI12_UARTDM_IRQ (GIC_SPI_START + 195)
+#define GSBI12_QUP_IRQ (GIC_SPI_START + 196)
+#define RIVA_APSS_LTECOEX_IRQ (GIC_SPI_START + 197)
+#define RIVA_APSS_SPARE_IRQ (GIC_SPI_START + 198)
+#define RIVA_APSS_WDOG_BITE_RESET_RDY_IRQ (GIC_SPI_START + 199)
+#define RIVA_APSS_RESET_DONE_IRQ (GIC_SPI_START + 200)
+#define RIVA_APSS_ASIC_IRQ (GIC_SPI_START + 201)
+#define RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ (GIC_SPI_START + 202)
+#define RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ (GIC_SPI_START + 203)
+#define RIVA_APPS_WLAN_SMSM_IRQ (GIC_SPI_START + 204)
+#define RIVA_APPS_LOG_CTRL_IRQ (GIC_SPI_START + 205)
+#define RIVA_APPS_FM_CTRL_IRQ (GIC_SPI_START + 206)
+#define RIVA_APPS_HCI_IRQ (GIC_SPI_START + 207)
+#define RIVA_APPS_WLAN_CTRL_IRQ (GIC_SPI_START + 208)
+#define A2_BAM_IRQ (GIC_SPI_START + 209)
+/* SPI IRQ 210 is unused */
+/* SPI IRQ 211 is unused */
+/* SPI IRQ 212 is unused */
+#define PPSS_WDOG_TIMER_IRQ (GIC_SPI_START + 213)
+#define SPS_SLIMBUS_CORE_EE0_IRQ (GIC_SPI_START + 214)
+#define SPS_SLIMBUS_BAM_EE0_IRQ (GIC_SPI_START + 215)
+#define QDSS_ETB_IRQ (GIC_SPI_START + 216)
+#define QDSS_CTI2KPSS_CPU1_IRQ (GIC_SPI_START + 217)
+#define QDSS_CTI2KPSS_CPU0_IRQ (GIC_SPI_START + 218)
+#define TLMM_MSM_DIR_CONN_IRQ_16 (GIC_SPI_START + 219)
+#define TLMM_MSM_DIR_CONN_IRQ_17 (GIC_SPI_START + 220)
+#define TLMM_MSM_DIR_CONN_IRQ_18 (GIC_SPI_START + 221)
+#define TLMM_MSM_DIR_CONN_IRQ_19 (GIC_SPI_START + 222)
+#define TLMM_MSM_DIR_CONN_IRQ_20 (GIC_SPI_START + 223)
+#define TLMM_MSM_DIR_CONN_IRQ_21 (GIC_SPI_START + 224)
+#define PM8921_SEC_IRQ_104 (GIC_SPI_START + 225)
+#define PM8018_SEC_IRQ_107 (GIC_SPI_START + 226)
+#define USB_HSIC_IRQ (GIC_SPI_START + 229)
+#define CE2_BAM_XPU_IRQ (GIC_SPI_START + 230)
+#define CE1_BAM_XPU_IRQ (GIC_SPI_START + 231)
+#define GFX3D_VBIF_IRPT (GIC_SPI_START + 232)
+#define RBIF_IRQ_0 (GIC_SPI_START + 233)
+#define RBIF_IRQ_1 (GIC_SPI_START + 234)
+#define RBIF_IRQ_2 (GIC_SPI_START + 235)
+
+/* Backwards compatible IRQ macros. */
+#define INT_ADM_AARM ADM_0_SCSS_0_IRQ
+
+/* smd/smsm interrupts */
+#define INT_A9_M2A_0 (GIC_SPI_START + 37) /*MSS_TO_APPS_IRQ_0*/
+#define INT_A9_M2A_5 (GIC_SPI_START + 38) /*MSS_TO_APPS_IRQ_1*/
+#define INT_ADSP_A11 LPASS_SCSS_GP_HIGH_IRQ
+#define INT_ADSP_A11_SMSM LPASS_SCSS_GP_MEDIUM_IRQ
+#define INT_DSPS_A11 SPS_MTI_31
+#define INT_DSPS_A11_SMSM SPS_MTI_30
+#define INT_WCNSS_A11 RIVA_APSS_SPARE_IRQ
+#define INT_WCNSS_A11_SMSM RIVA_APPS_WLAN_SMSM_IRQ
+
+#endif
+
diff --git a/arch/arm/mach-msm/include/mach/irqs.h b/arch/arm/mach-msm/include/mach/irqs.h
index f38eddb..b086bff 100644
--- a/arch/arm/mach-msm/include/mach/irqs.h
+++ b/arch/arm/mach-msm/include/mach/irqs.h
@@ -19,12 +19,17 @@
#define MSM_IRQ_BIT(irq) (1 << ((irq) & 31))
-#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064)
+#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) || \
+ defined(CONFIG_ARCH_MSM8930)
#ifdef CONFIG_ARCH_MSM8960
#include "irqs-8960.h"
#endif
+#ifdef CONFIG_ARCH_MSM8930
+#include "irqs-8930.h"
+#endif
+
#ifdef CONFIG_ARCH_APQ8064
#include "irqs-8064.h"
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm-krait-l2-accessors.h b/arch/arm/mach-msm/include/mach/msm-krait-l2-accessors.h
index 507d717..f835e82 100644
--- a/arch/arm/mach-msm/include/mach/msm-krait-l2-accessors.h
+++ b/arch/arm/mach-msm/include/mach/msm-krait-l2-accessors.h
@@ -13,24 +13,8 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-#ifdef CONFIG_ARCH_MSM_KRAIT
extern void set_l2_indirect_reg(u32 reg_addr, u32 val);
extern u32 get_l2_indirect_reg(u32 reg_addr);
extern u32 set_get_l2_indirect_reg(u32 reg_addr, u32 val);
-#else
-void set_l2_indirect_reg(u32 reg_addr, u32 val)
-{
-}
-
-u32 set_get_l2_indirect_reg(u32 reg_addr, u32 val)
-{
- return 0;
-}
-
-u32 get_l2_indirect_reg(u32 reg_addr)
-{
- return 0;
-}
-#endif
#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
index 571391b..d1aef0a 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
@@ -58,10 +58,6 @@
#define MSM_GPT_BASE MSM_TMR_BASE
#define MSM_DGT_BASE (MSM_TMR_BASE + 0x10)
-#define MSM_DMOV_BASE IOMEM(0xF8002000)
-#define MSM_DMOV_PHYS 0xA9700000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xF8003000)
#define MSM_GPIO1_PHYS 0xA9200000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
index fce9e35..e49e870 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
@@ -47,10 +47,6 @@
#define MSM_TMR_BASE MSM_CSR_BASE
#define MSM_TMR_SIZE SZ_4K
-#define MSM_DMOV_BASE IOMEM(0xFA002000)
-#define MSM_DMOV_PHYS 0xAC400000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xFA003000)
#define MSM_GPIO1_PHYS 0xAC001000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h b/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
index 1fb9d0e..da0c54c 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-7xxx.h
@@ -47,10 +47,6 @@
#define MSM_TMR_BASE MSM_CSR_BASE
#define MSM_TMR_SIZE SZ_4K
-#define MSM_DMOV_BASE IOMEM(0xFA002000)
-#define MSM_DMOV_PHYS 0xA9700000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xFA003000)
#define MSM_GPIO1_PHYS 0xA9200000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8064.h b/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
index 665ccd0..7f5bd75 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8064.h
@@ -44,9 +44,6 @@
#define APQ8064_QGIC_CPU_PHYS 0x02002000
#define APQ8064_QGIC_CPU_SIZE SZ_4K
-#define APQ8064_DMOV_PHYS 0x18300000
-#define APQ8064_DMOV_SIZE SZ_1M
-
#define APQ8064_TLMM_PHYS 0x00800000
#define APQ8064_TLMM_SIZE SZ_16K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8930.h b/arch/arm/mach-msm/include/mach/msm_iomap-8930.h
new file mode 100644
index 0000000..8e50824
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8930.h
@@ -0,0 +1,116 @@
+/*
+ * Copyright (C) 2007 Google, Inc.
+ * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
+ * Author: Brian Swetland <swetland@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ *
+ * The MSM peripherals are spread all over across 768MB of physical
+ * space, which makes just having a simple IO_ADDRESS macro to slide
+ * them into the right virtual location rough. Instead, we will
+ * provide a master phys->virt mapping for peripherals here.
+ *
+ */
+
+#ifndef __ASM_ARCH_MSM_IOMAP_8930_H
+#define __ASM_ARCH_MSM_IOMAP_8930_H
+
+/* Physical base address and size of peripherals.
+ * Ordered by the virtual base addresses they will be mapped at.
+ *
+ * If you add or remove entries here, you'll want to edit the
+ * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
+ * changes.
+ *
+ */
+
+#define MSM8930_TMR_PHYS 0x0200A000
+#define MSM8930_TMR_SIZE SZ_4K
+
+#define MSM8930_TMR0_PHYS 0x0208A000
+#define MSM8930_TMR0_SIZE SZ_4K
+
+#define MSM8930_RPM_PHYS 0x00108000
+#define MSM8930_RPM_SIZE SZ_4K
+
+#define MSM8930_RPM_MPM_PHYS 0x00200000
+#define MSM8930_RPM_MPM_SIZE SZ_4K
+
+#define MSM8930_TCSR_PHYS 0x1A400000
+#define MSM8930_TCSR_SIZE SZ_4K
+
+#define MSM8930_APCS_GCC_PHYS 0x02011000
+#define MSM8930_APCS_GCC_SIZE SZ_4K
+
+#define MSM8930_SAW_L2_PHYS 0x02012000
+#define MSM8930_SAW_L2_SIZE SZ_4K
+
+#define MSM8930_SAW0_PHYS 0x02089000
+#define MSM8930_SAW0_SIZE SZ_4K
+
+#define MSM8930_SAW1_PHYS 0x02099000
+#define MSM8930_SAW1_SIZE SZ_4K
+
+#define MSM8930_IMEM_PHYS 0x2A03F000
+#define MSM8930_IMEM_SIZE SZ_4K
+
+#define MSM8930_ACC0_PHYS 0x02088000
+#define MSM8930_ACC0_SIZE SZ_4K
+
+#define MSM8930_ACC1_PHYS 0x02098000
+#define MSM8930_ACC1_SIZE SZ_4K
+
+#define MSM8930_QGIC_DIST_PHYS 0x02000000
+#define MSM8930_QGIC_DIST_SIZE SZ_4K
+
+#define MSM8930_QGIC_CPU_PHYS 0x02002000
+#define MSM8930_QGIC_CPU_SIZE SZ_4K
+
+#define MSM8930_CLK_CTL_PHYS 0x00900000
+#define MSM8930_CLK_CTL_SIZE SZ_16K
+
+#define MSM8930_MMSS_CLK_CTL_PHYS 0x04000000
+#define MSM8930_MMSS_CLK_CTL_SIZE SZ_4K
+
+#define MSM8930_LPASS_CLK_CTL_PHYS 0x28000000
+#define MSM8930_LPASS_CLK_CTL_SIZE SZ_4K
+
+#define MSM8930_HFPLL_PHYS 0x00903000
+#define MSM8930_HFPLL_SIZE SZ_4K
+
+#define MSM8930_TLMM_PHYS 0x00800000
+#define MSM8930_TLMM_SIZE SZ_16K
+
+#define MSM8930_DMOV_PHYS 0x18320000
+#define MSM8930_DMOV_SIZE SZ_1M
+
+#define MSM8930_SIC_NON_SECURE_PHYS 0x12100000
+#define MSM8930_SIC_NON_SECURE_SIZE SZ_64K
+
+#define MSM_GPT_BASE (MSM_TMR_BASE + 0x4)
+#define MSM_DGT_BASE (MSM_TMR_BASE + 0x24)
+
+#define MSM8930_HDMI_PHYS 0x04A00000
+#define MSM8930_HDMI_SIZE SZ_4K
+
+#ifdef CONFIG_MSM_DEBUG_UART
+#define MSM_DEBUG_UART_BASE IOMEM(0xFA740000)
+#define MSM_DEBUG_UART_SIZE SZ_4K
+
+#ifdef CONFIG_MSM_DEBUG_UART1
+#define MSM_DEBUG_UART_PHYS 0x16440000
+#endif
+#endif
+
+#define MSM8930_QFPROM_PHYS 0x00700000
+#define MSM8930_QFPROM_SIZE SZ_4K
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index 56cbd2f..24505ae 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -89,9 +89,6 @@
#define MSM8960_TLMM_PHYS 0x00800000
#define MSM8960_TLMM_SIZE SZ_16K
-#define MSM8960_DMOV_PHYS 0x18320000
-#define MSM8960_DMOV_SIZE SZ_1M
-
#define MSM8960_SIC_NON_SECURE_PHYS 0x12100000
#define MSM8960_SIC_NON_SECURE_SIZE SZ_64K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
index cab4027..a073d6a 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
@@ -47,10 +47,6 @@
#define MSM_TMR_BASE MSM_CSR_BASE
#define MSM_TMR_SIZE SZ_4K
-#define MSM_DMOV_BASE IOMEM(0xFA002000)
-#define MSM_DMOV_PHYS 0xA9700000
-#define MSM_DMOV_SIZE SZ_4K
-
#define MSM_GPIO1_BASE IOMEM(0xFA003000)
#define MSM_GPIO1_PHYS 0xA9000000
#define MSM_GPIO1_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 4b91733..c1cf221 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -106,14 +106,6 @@
#define MSM_SAW1_PHYS 0x02052000
#define MSM_SAW1_SIZE SZ_4K
-#define MSM_DMOV_ADM0_BASE IOMEM(0xFA400000)
-#define MSM_DMOV_ADM0_PHYS 0x18320000
-#define MSM_DMOV_ADM0_SIZE SZ_1M
-
-#define MSM_DMOV_ADM1_BASE IOMEM(0xFA500000)
-#define MSM_DMOV_ADM1_PHYS 0x18420000
-#define MSM_DMOV_ADM1_SIZE SZ_1M
-
#define MSM_SIC_NON_SECURE_BASE IOMEM(0xFA600000)
#define MSM_SIC_NON_SECURE_PHYS 0x12100000
#define MSM_SIC_NON_SECURE_SIZE SZ_64K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-9615.h b/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
index e842f8e..dda5f50 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
@@ -41,9 +41,6 @@
#define MSM9615_QGIC_CPU_PHYS 0x02002000
#define MSM9615_QGIC_CPU_SIZE SZ_4K
-#define MSM9615_DMOV_PHYS 0x18320000
-#define MSM9615_DMOV_SIZE SZ_1M
-
#define MSM9615_TLMM_PHYS 0x00800000
#define MSM9615_TLMM_SIZE SZ_1M
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h b/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h
index 5261bcc..57bfd58 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-fsm9xxx.h
@@ -64,24 +64,6 @@
#define MSM_GRFC_PHYS 0x94038000
#define MSM_GRFC_SIZE SZ_4K
-#define MSM_DMOV_SD0_BASE IOMEM(0xFA00A000)
-#define MSM_DMOV_SD0_PHYS 0x94310000
-#define MSM_DMOV_SD0_SIZE SZ_4K
-
-#define MSM_DMOV_SD1_BASE IOMEM(0xFA00B000)
-#define MSM_DMOV_SD1_PHYS 0x94410000
-#define MSM_DMOV_SD1_SIZE SZ_4K
-
-#define MSM_DMOV_SD2_BASE IOMEM(0xFA00C000)
-#define MSM_DMOV_SD2_PHYS 0x94510000
-#define MSM_DMOV_SD2_SIZE SZ_4K
-
-#define MSM_DMOV_SD3_BASE IOMEM(0xFA00D000)
-#define MSM_DMOV_SD3_PHYS 0x94610000
-#define MSM_DMOV_SD3_SIZE SZ_4K
-
-#define MSM_DMOV_BASE MSM_DMOV_SD0_BASE
-
#define MSM_QFP_FUSE_BASE IOMEM(0xFA010000)
#define MSM_QFP_FUSE_PHYS 0x80000000
#define MSM_QFP_FUSE_SIZE SZ_32K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index df19606..426dbad 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -43,8 +43,8 @@
#define IOMEM(x) ((void __force __iomem *)(x))
#endif
-#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) \
- || defined(CONFIG_ARCH_MSM9615)
+#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) || \
+ defined(CONFIG_ARCH_MSM8930) || defined(CONFIG_ARCH_MSM9615)
/* Unified iomap */
#define MSM_TMR_BASE IOMEM(0xFA000000) /* 4K */
@@ -67,7 +67,6 @@
#define MSM_HFPLL_BASE IOMEM(0xFA016000) /* 4K */
#define MSM_TLMM_BASE IOMEM(0xFA017000) /* 16K */
#define MSM_SHARED_RAM_BASE IOMEM(0xFA300000) /* 2M */
-#define MSM_DMOV_BASE IOMEM(0xFA500000) /* 1M */
#define MSM_SIC_NON_SECURE_BASE IOMEM(0xFA600000) /* 64K */
#define MSM_HDMI_BASE IOMEM(0xFA800000) /* 4K */
#define MSM_RPM_BASE IOMEM(0xFA801000) /* 4K */
@@ -83,6 +82,7 @@
#endif
#include "msm_iomap-8960.h"
+#include "msm_iomap-8930.h"
#include "msm_iomap-8064.h"
#include "msm_iomap-9615.h"
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 3bb10fb..72acab8 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -61,7 +61,6 @@
MSM_DEVICE(VIC),
MSM_DEVICE(CSR),
MSM_DEVICE(TMR),
- MSM_DEVICE(DMOV),
MSM_DEVICE(GPIO1),
MSM_DEVICE(GPIO2),
MSM_DEVICE(CLK_CTL),
@@ -106,7 +105,6 @@
MSM_DEVICE(VIC),
MSM_DEVICE(CSR),
MSM_DEVICE(TMR),
- MSM_DEVICE(DMOV),
MSM_DEVICE(GPIO1),
MSM_DEVICE(GPIO2),
MSM_DEVICE(CLK_CTL),
@@ -145,8 +143,6 @@
MSM_DEVICE(SAW1),
MSM_DEVICE(GCC),
MSM_DEVICE(TLMM),
- MSM_DEVICE(DMOV_ADM0),
- MSM_DEVICE(DMOV_ADM1),
MSM_DEVICE(SCPLL),
MSM_DEVICE(RPM),
MSM_DEVICE(CLK_CTL),
@@ -186,7 +182,6 @@
MSM_CHIP_DEVICE(MMSS_CLK_CTL, MSM8960),
MSM_CHIP_DEVICE(LPASS_CLK_CTL, MSM8960),
MSM_CHIP_DEVICE(RPM, MSM8960),
- MSM_CHIP_DEVICE(DMOV, MSM8960),
MSM_CHIP_DEVICE(TLMM, MSM8960),
MSM_CHIP_DEVICE(HFPLL, MSM8960),
MSM_CHIP_DEVICE(SAW0, MSM8960),
@@ -213,13 +208,51 @@
}
#endif /* CONFIG_ARCH_MSM8960 */
+#ifdef CONFIG_ARCH_MSM8930
+static struct map_desc msm8930_io_desc[] __initdata = {
+ MSM_CHIP_DEVICE(QGIC_DIST, MSM8930),
+ MSM_CHIP_DEVICE(QGIC_CPU, MSM8930),
+ MSM_CHIP_DEVICE(ACC0, MSM8930),
+ MSM_CHIP_DEVICE(ACC1, MSM8930),
+ MSM_CHIP_DEVICE(TMR, MSM8930),
+ MSM_CHIP_DEVICE(TMR0, MSM8930),
+ MSM_CHIP_DEVICE(RPM_MPM, MSM8930),
+ MSM_CHIP_DEVICE(CLK_CTL, MSM8930),
+ MSM_CHIP_DEVICE(MMSS_CLK_CTL, MSM8930),
+ MSM_CHIP_DEVICE(LPASS_CLK_CTL, MSM8930),
+ MSM_CHIP_DEVICE(RPM, MSM8930),
+ MSM_CHIP_DEVICE(TLMM, MSM8930),
+ MSM_CHIP_DEVICE(HFPLL, MSM8930),
+ MSM_CHIP_DEVICE(SAW0, MSM8930),
+ MSM_CHIP_DEVICE(SAW1, MSM8930),
+ MSM_CHIP_DEVICE(SAW_L2, MSM8930),
+ MSM_CHIP_DEVICE(SIC_NON_SECURE, MSM8930),
+ MSM_CHIP_DEVICE(APCS_GCC, MSM8930),
+ MSM_CHIP_DEVICE(IMEM, MSM8930),
+ MSM_CHIP_DEVICE(HDMI, MSM8930),
+ {
+ .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
+ .length = MSM_SHARED_RAM_SIZE,
+ .type = MT_DEVICE,
+ },
+#ifdef CONFIG_MSM_DEBUG_UART
+ MSM_DEVICE(DEBUG_UART),
+#endif
+ MSM_CHIP_DEVICE(QFPROM, MSM8930),
+};
+
+void __init msm_map_msm8930_io(void)
+{
+ msm_map_io(msm8930_io_desc, ARRAY_SIZE(msm8930_io_desc));
+}
+#endif /* CONFIG_ARCH_MSM8930 */
+
#ifdef CONFIG_ARCH_APQ8064
static struct map_desc apq8064_io_desc[] __initdata = {
MSM_CHIP_DEVICE(QGIC_DIST, APQ8064),
MSM_CHIP_DEVICE(QGIC_CPU, APQ8064),
MSM_CHIP_DEVICE(TMR, APQ8064),
MSM_CHIP_DEVICE(TMR0, APQ8064),
- MSM_CHIP_DEVICE(DMOV, APQ8064),
MSM_CHIP_DEVICE(TLMM, APQ8064),
MSM_CHIP_DEVICE(ACC0, APQ8064),
MSM_CHIP_DEVICE(ACC1, APQ8064),
@@ -249,7 +282,6 @@
MSM_DEVICE(VIC),
MSM_DEVICE(CSR),
MSM_DEVICE(TMR),
- MSM_DEVICE(DMOV),
MSM_DEVICE(GPIO1),
MSM_DEVICE(GPIO2),
MSM_DEVICE(CLK_CTL),
@@ -288,10 +320,6 @@
MSM_DEVICE(SAW),
MSM_DEVICE(GCC),
MSM_DEVICE(GRFC),
- MSM_DEVICE(DMOV_SD0),
- MSM_DEVICE(DMOV_SD1),
- MSM_DEVICE(DMOV_SD2),
- MSM_DEVICE(DMOV_SD3),
MSM_DEVICE(QFP_FUSE),
MSM_DEVICE(HH),
#ifdef CONFIG_MSM_DEBUG_UART
@@ -316,7 +344,6 @@
MSM_CHIP_DEVICE(QGIC_CPU, MSM9615),
MSM_CHIP_DEVICE(ACC0, MSM9615),
MSM_CHIP_DEVICE(TMR, MSM9615),
- MSM_CHIP_DEVICE(DMOV, MSM9615),
MSM_CHIP_DEVICE(TLMM, MSM9615),
MSM_CHIP_DEVICE(SAW0, MSM9615),
MSM_CHIP_DEVICE(APCS_GCC, MSM9615),
diff --git a/arch/arm/mach-msm/msm-krait-l2-accessors.c b/arch/arm/mach-msm/msm-krait-l2-accessors.c
index 61b5228..b03e2d2 100644
--- a/arch/arm/mach-msm/msm-krait-l2-accessors.c
+++ b/arch/arm/mach-msm/msm-krait-l2-accessors.c
@@ -12,6 +12,7 @@
*/
#include <linux/spinlock.h>
+#include <linux/module.h>
#include <asm/mach-types.h>
DEFINE_RAW_SPINLOCK(l2_access_lock);
@@ -40,6 +41,7 @@
return ret_val;
}
+EXPORT_SYMBOL(set_get_l2_indirect_reg);
void set_l2_indirect_reg(u32 reg_addr, u32 val)
{
@@ -58,6 +60,7 @@
isb();
raw_spin_unlock_irqrestore(&l2_access_lock, flags);
}
+EXPORT_SYMBOL(set_l2_indirect_reg);
u32 get_l2_indirect_reg(u32 reg_addr)
{
@@ -77,3 +80,4 @@
return val;
}
+EXPORT_SYMBOL(get_l2_indirect_reg);
diff --git a/arch/arm/mach-msm/msm_rq_stats.c b/arch/arm/mach-msm/msm_rq_stats.c
index 81c8ad5..a39703a 100644
--- a/arch/arm/mach-msm/msm_rq_stats.c
+++ b/arch/arm/mach-msm/msm_rq_stats.c
@@ -13,7 +13,6 @@
/*
* Qualcomm MSM Runqueue Stats Interface for Userspace
*/
-
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
@@ -26,60 +25,11 @@
#include <linux/workqueue.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
+#include <linux/rq_stats.h>
-struct rq_data {
- unsigned int rq_avg;
- unsigned int rq_poll_ms;
- unsigned int def_timer_ms;
- unsigned int def_interval;
- int64_t last_time;
- int64_t total_time;
- int64_t def_start_time;
- struct delayed_work rq_work;
- struct attribute_group *attr_group;
- struct kobject *kobj;
- struct delayed_work def_timer_work;
-};
-
-static struct rq_data rq_info;
-static DEFINE_SPINLOCK(rq_lock);
-static struct workqueue_struct *rq_wq;
-
-static void rq_work_fn(struct work_struct *work)
-{
- int64_t time_diff = 0;
- int64_t rq_avg = 0;
- unsigned long flags = 0;
-
- spin_lock_irqsave(&rq_lock, flags);
-
- if (!rq_info.last_time)
- rq_info.last_time = ktime_to_ns(ktime_get());
- if (!rq_info.rq_avg)
- rq_info.total_time = 0;
-
- rq_avg = nr_running() * 10;
- time_diff = ktime_to_ns(ktime_get()) - rq_info.last_time;
- do_div(time_diff, (1000 * 1000));
-
- if (time_diff && rq_info.total_time) {
- rq_avg = (rq_avg * time_diff) +
- (rq_info.rq_avg * rq_info.total_time);
- do_div(rq_avg, rq_info.total_time + time_diff);
- }
-
- rq_info.rq_avg = (unsigned int)rq_avg;
-
- /* Set the next poll */
- if (rq_info.rq_poll_ms)
- queue_delayed_work(rq_wq, &rq_info.rq_work,
- msecs_to_jiffies(rq_info.rq_poll_ms));
-
- rq_info.total_time += time_diff;
- rq_info.last_time = ktime_to_ns(ktime_get());
-
- spin_unlock_irqrestore(&rq_lock, flags);
-}
+#define MAX_LONG_SIZE 16
+#define DEFAULT_RQ_POLL_JIFFIES 1
+#define DEFAULT_DEF_TIMER_JIFFIES 5
static void def_work_fn(struct work_struct *work)
{
@@ -109,22 +59,24 @@
}
static ssize_t show_run_queue_poll_ms(struct kobject *kobj,
- struct kobj_attribute *attr, char *buf)
+ struct kobj_attribute *attr, char *buf)
{
int ret = 0;
unsigned long flags = 0;
spin_lock_irqsave(&rq_lock, flags);
- ret = sprintf(buf, "%u\n", rq_info.rq_poll_ms);
+ ret = snprintf(buf, MAX_LONG_SIZE, "%u\n",
+ jiffies_to_msecs(rq_info.rq_poll_jiffies));
spin_unlock_irqrestore(&rq_lock, flags);
return ret;
}
static ssize_t store_run_queue_poll_ms(struct kobject *kobj,
- struct kobj_attribute *attr, const char *buf, size_t count)
+ struct kobj_attribute *attr,
+ const char *buf, size_t count)
{
- int val = 0;
+ unsigned int val = 0;
unsigned long flags = 0;
static DEFINE_MUTEX(lock_poll_ms);
@@ -132,15 +84,9 @@
spin_lock_irqsave(&rq_lock, flags);
sscanf(buf, "%u", &val);
- rq_info.rq_poll_ms = val;
+ rq_info.rq_poll_jiffies = msecs_to_jiffies(val);
spin_unlock_irqrestore(&rq_lock, flags);
- if (val <= 0)
- cancel_delayed_work(&rq_info.rq_work);
- else
- queue_delayed_work(rq_wq, &rq_info.rq_work,
- msecs_to_jiffies(val));
-
mutex_unlock(&lock_poll_ms);
return count;
@@ -149,7 +95,8 @@
static ssize_t show_def_timer_ms(struct kobject *kobj,
struct kobj_attribute *attr, char *buf)
{
- return sprintf(buf, "%u\n", rq_info.def_interval);
+ return snprintf(buf, MAX_LONG_SIZE, "%lu\n",
+ rq_info.def_timer_jiffies);
}
static ssize_t store_def_timer_ms(struct kobject *kobj,
@@ -158,16 +105,9 @@
unsigned int val = 0;
sscanf(buf, "%u", &val);
- rq_info.def_timer_ms = val;
+ rq_info.def_timer_jiffies = msecs_to_jiffies(val);
- if (val <= 0)
- cancel_delayed_work(&rq_info.def_timer_work);
- else {
- rq_info.def_start_time = ktime_to_ns(ktime_get());
- queue_delayed_work(rq_wq, &rq_info.def_timer_work,
- msecs_to_jiffies(val));
- }
-
+ rq_info.def_start_time = ktime_to_ns(ktime_get());
return count;
}
@@ -210,7 +150,6 @@
goto rel;
rq_info.rq_avg = 0;
- rq_info.rq_poll_ms = 0;
attribs[0] = MSM_RQ_STATS_RW_ATTRIB(def_timer_ms);
attribs[1] = MSM_RQ_STATS_RO_ATTRIB(run_queue_avg);
@@ -257,8 +196,13 @@
{
rq_wq = create_singlethread_workqueue("rq_stats");
BUG_ON(!rq_wq);
- INIT_DELAYED_WORK_DEFERRABLE(&rq_info.rq_work, rq_work_fn);
- INIT_DELAYED_WORK_DEFERRABLE(&rq_info.def_timer_work, def_work_fn);
+ INIT_WORK(&rq_info.def_timer_work, def_work_fn);
+ spin_lock_init(&rq_lock);
+ rq_info.rq_poll_jiffies = DEFAULT_RQ_POLL_JIFFIES;
+ rq_info.def_timer_jiffies = DEFAULT_DEF_TIMER_JIFFIES;
+ rq_info.rq_poll_last_jiffy = 0;
+ rq_info.def_timer_last_jiffy = 0;
+ rq_info.init = 1;
return init_rq_attribs();
}
late_initcall(msm_rq_stats_init);
diff --git a/arch/arm/mach-msm/peripheral-loader.c b/arch/arm/mach-msm/peripheral-loader.c
index dc3b26f..672f332 100644
--- a/arch/arm/mach-msm/peripheral-loader.c
+++ b/arch/arm/mach-msm/peripheral-loader.c
@@ -12,13 +12,14 @@
#include <linux/module.h>
#include <linux/string.h>
-#include <linux/platform_device.h>
+#include <linux/device.h>
#include <linux/firmware.h>
#include <linux/io.h>
#include <linux/debugfs.h>
#include <linux/elf.h>
#include <linux/mutex.h>
#include <linux/memblock.h>
+#include <linux/slab.h>
#include <mach/socinfo.h>
@@ -27,6 +28,13 @@
#include "peripheral-loader.h"
+struct pil_device {
+ struct pil_desc *desc;
+ int count;
+ struct mutex lock;
+ struct list_head list;
+};
+
static DEFINE_MUTEX(pil_list_lock);
static LIST_HEAD(pil_list);
@@ -35,7 +43,7 @@
struct pil_device *dev;
list_for_each_entry(dev, &pil_list, list)
- if (!strcmp(dev->name, str))
+ if (!strcmp(dev->desc->name, str))
return dev;
return NULL;
}
@@ -65,24 +73,24 @@
const u8 *data;
if (memblock_is_region_memory(phdr->p_paddr, phdr->p_memsz)) {
- dev_err(&pil->pdev.dev, "Kernel memory would be overwritten");
+ dev_err(pil->desc->dev, "Kernel memory would be overwritten");
return -EPERM;
}
if (phdr->p_filesz) {
- snprintf(fw_name, ARRAY_SIZE(fw_name), "%s.b%02d", pil->name,
- num);
- ret = request_firmware(&fw, fw_name, &pil->pdev.dev);
+ snprintf(fw_name, ARRAY_SIZE(fw_name), "%s.b%02d",
+ pil->desc->name, num);
+ ret = request_firmware(&fw, fw_name, pil->desc->dev);
if (ret) {
- dev_err(&pil->pdev.dev, "Failed to locate blob %s\n",
+ dev_err(pil->desc->dev, "Failed to locate blob %s\n",
fw_name);
return ret;
}
if (fw->size != phdr->p_filesz) {
- dev_err(&pil->pdev.dev,
- "Blob size %u doesn't match %u\n",
- fw->size, phdr->p_filesz);
+ dev_err(pil->desc->dev,
+ "Blob size %u doesn't match %u\n", fw->size,
+ phdr->p_filesz);
ret = -EPERM;
goto release_fw;
}
@@ -99,7 +107,7 @@
size = min_t(size_t, IOMAP_SIZE, count);
buf = ioremap(paddr, size);
if (!buf) {
- dev_err(&pil->pdev.dev, "Failed to map memory\n");
+ dev_err(pil->desc->dev, "Failed to map memory\n");
ret = -ENOMEM;
goto release_fw;
}
@@ -120,7 +128,7 @@
size = min_t(size_t, IOMAP_SIZE, count);
buf = ioremap(paddr, size);
if (!buf) {
- dev_err(&pil->pdev.dev, "Failed to map memory\n");
+ dev_err(pil->desc->dev, "Failed to map memory\n");
ret = -ENOMEM;
goto release_fw;
}
@@ -131,9 +139,10 @@
paddr += size;
}
- ret = pil->ops->verify_blob(pil, phdr->p_paddr, phdr->p_memsz);
+ ret = pil->desc->ops->verify_blob(pil->desc, phdr->p_paddr,
+ phdr->p_memsz);
if (ret)
- dev_err(&pil->pdev.dev, "Blob %u failed verification\n", num);
+ dev_err(pil->desc->dev, "Blob %u failed verification\n", num);
release_fw:
release_firmware(fw);
@@ -155,41 +164,41 @@
const struct elf32_phdr *phdr;
const struct firmware *fw;
- snprintf(fw_name, sizeof(fw_name), "%s.mdt", pil->name);
- ret = request_firmware(&fw, fw_name, &pil->pdev.dev);
+ snprintf(fw_name, sizeof(fw_name), "%s.mdt", pil->desc->name);
+ ret = request_firmware(&fw, fw_name, pil->desc->dev);
if (ret) {
- dev_err(&pil->pdev.dev, "Failed to locate %s\n", fw_name);
+ dev_err(pil->desc->dev, "Failed to locate %s\n", fw_name);
goto out;
}
if (fw->size < sizeof(*ehdr)) {
- dev_err(&pil->pdev.dev, "Not big enough to be an elf header\n");
+ dev_err(pil->desc->dev, "Not big enough to be an elf header\n");
ret = -EIO;
goto release_fw;
}
ehdr = (struct elf32_hdr *)fw->data;
if (memcmp(ehdr->e_ident, ELFMAG, SELFMAG)) {
- dev_err(&pil->pdev.dev, "Not an elf header\n");
+ dev_err(pil->desc->dev, "Not an elf header\n");
ret = -EIO;
goto release_fw;
}
if (ehdr->e_phnum == 0) {
- dev_err(&pil->pdev.dev, "No loadable segments\n");
+ dev_err(pil->desc->dev, "No loadable segments\n");
ret = -EIO;
goto release_fw;
}
if (sizeof(struct elf32_phdr) * ehdr->e_phnum +
sizeof(struct elf32_hdr) > fw->size) {
- dev_err(&pil->pdev.dev, "Program headers not within mdt\n");
+ dev_err(pil->desc->dev, "Program headers not within mdt\n");
ret = -EIO;
goto release_fw;
}
- ret = pil->ops->init_image(pil, fw->data, fw->size);
+ ret = pil->desc->ops->init_image(pil->desc, fw->data, fw->size);
if (ret) {
- dev_err(&pil->pdev.dev, "Invalid firmware metadata\n");
+ dev_err(pil->desc->dev, "Invalid firmware metadata\n");
goto release_fw;
}
@@ -200,15 +209,15 @@
ret = load_segment(phdr, i, pil);
if (ret) {
- dev_err(&pil->pdev.dev, "Failed to load segment %d\n",
+ dev_err(pil->desc->dev, "Failed to load segment %d\n",
i);
goto release_fw;
}
}
- ret = pil->ops->auth_and_reset(pil);
+ ret = pil->desc->ops->auth_and_reset(pil->desc);
if (ret) {
- dev_err(&pil->pdev.dev, "Failed to bring out of reset\n");
+ dev_err(pil->desc->dev, "Failed to bring out of reset\n");
goto release_fw;
}
@@ -242,9 +251,9 @@
if (!pil)
return ERR_PTR(-ENODEV);
- pil_d = find_peripheral(pil->depends_on);
+ pil_d = find_peripheral(pil->desc->depends_on);
if (pil_d) {
- void *p = pil_get(pil_d->name);
+ void *p = pil_get(pil_d->desc->name);
if (IS_ERR(p))
return p;
}
@@ -290,11 +299,11 @@
if (pil->count)
pil->count--;
if (pil->count == 0)
- pil->ops->shutdown(pil);
+ pil->desc->ops->shutdown(pil->desc);
unlock:
mutex_unlock(&pil->lock);
- pil_d = find_peripheral(pil->depends_on);
+ pil_d = find_peripheral(pil->desc->depends_on);
if (pil_d)
pil_put(pil_d);
}
@@ -310,7 +319,7 @@
mutex_lock(&pil->lock);
if (!WARN(!pil->count, "%s: Reference count mismatch\n", __func__))
- pil->ops->shutdown(pil);
+ pil->desc->ops->shutdown(pil->desc);
mutex_unlock(&pil->lock);
}
EXPORT_SYMBOL(pil_force_shutdown);
@@ -366,7 +375,7 @@
return -EFAULT;
if (!strncmp(buf, "get", 3)) {
- if (IS_ERR(pil_get(pil->name)))
+ if (IS_ERR(pil_get(pil->desc->name)))
return -EIO;
} else if (!strncmp(buf, "put", 3))
pil_put(pil);
@@ -401,8 +410,8 @@
if (!pil_base_dir)
return -ENOMEM;
- if (!debugfs_create_file(pil->name, S_IRUGO | S_IWUSR, pil_base_dir,
- pil, &msm_pil_debugfs_fops))
+ if (!debugfs_create_file(pil->desc->name, S_IRUGO | S_IWUSR,
+ pil_base_dir, pil, &msm_pil_debugfs_fops))
return -ENOMEM;
return 0;
}
@@ -416,29 +425,30 @@
mutex_lock(&pil_list_lock);
list_for_each_entry(pil, &pil_list, list)
- pil->ops->shutdown(pil);
+ pil->desc->ops->shutdown(pil->desc);
mutex_unlock(&pil_list_lock);
return 0;
}
late_initcall(msm_pil_shutdown_at_boot);
-int msm_pil_add_device(struct pil_device *pil)
+int msm_pil_register(struct pil_desc *desc)
{
- int ret;
- ret = platform_device_register(&pil->pdev);
- if (ret)
- return ret;
+ struct pil_device *pil = kzalloc(sizeof(*pil), GFP_KERNEL);
+ if (!pil)
+ return -ENOMEM;
mutex_init(&pil->lock);
+ INIT_LIST_HEAD(&pil->list);
+ pil->desc = desc;
mutex_lock(&pil_list_lock);
list_add(&pil->list, &pil_list);
mutex_unlock(&pil_list_lock);
- msm_pil_debugfs_add(pil);
- return 0;
+ return msm_pil_debugfs_add(pil);
}
+EXPORT_SYMBOL(msm_pil_register);
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Load peripheral images and bring peripherals out of reset");
diff --git a/arch/arm/mach-msm/peripheral-loader.h b/arch/arm/mach-msm/peripheral-loader.h
index 097d9d7..3d4b4b2 100644
--- a/arch/arm/mach-msm/peripheral-loader.h
+++ b/arch/arm/mach-msm/peripheral-loader.h
@@ -12,28 +12,23 @@
#ifndef __MSM_PERIPHERAL_LOADER_H
#define __MSM_PERIPHERAL_LOADER_H
-#include <linux/list.h>
-#include <linux/mutex.h>
-#include <linux/platform_device.h>
+struct device;
-struct pil_device {
+struct pil_desc {
const char *name;
const char *depends_on;
- int count;
- struct mutex lock;
- struct platform_device pdev;
- struct list_head list;
- struct pil_reset_ops *ops;
+ struct device *dev;
+ const struct pil_reset_ops *ops;
};
struct pil_reset_ops {
- int (*init_image)(struct pil_device *pil, const u8 *metadata,
+ int (*init_image)(struct pil_desc *pil, const u8 *metadata,
size_t size);
- int (*verify_blob)(struct pil_device *pil, u32 phy_addr, size_t size);
- int (*auth_and_reset)(struct pil_device *pil);
- int (*shutdown)(struct pil_device *pil);
+ int (*verify_blob)(struct pil_desc *pil, u32 phy_addr, size_t size);
+ int (*auth_and_reset)(struct pil_desc *pil);
+ int (*shutdown)(struct pil_desc *pil);
};
-extern int msm_pil_add_device(struct pil_device *pil);
+extern int msm_pil_register(struct pil_desc *desc);
#endif
diff --git a/arch/arm/mach-msm/peripheral-reset-8960.c b/arch/arm/mach-msm/peripheral-reset-8960.c
index 2c47ee0..b964417 100644
--- a/arch/arm/mach-msm/peripheral-reset-8960.c
+++ b/arch/arm/mach-msm/peripheral-reset-8960.c
@@ -18,6 +18,7 @@
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/regulator/consumer.h>
+#include <linux/platform_device.h>
#include <asm/mach-types.h>
@@ -167,25 +168,25 @@
static void __iomem *msm_riva_base;
static unsigned long riva_start;
-static int init_image_lpass_q6_trusted(struct pil_device *pil,
+static int init_image_lpass_q6_trusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
return pas_init_image(PAS_Q6, metadata, size);
}
-static int init_image_modem_fw_q6_trusted(struct pil_device *pil,
+static int init_image_modem_fw_q6_trusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
return pas_init_image(PAS_MODEM_FW, metadata, size);
}
-static int init_image_modem_sw_q6_trusted(struct pil_device *pil,
+static int init_image_modem_sw_q6_trusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
return pas_init_image(PAS_MODEM_SW, metadata, size);
}
-static int init_image_lpass_q6_untrusted(struct pil_device *pil,
+static int init_image_lpass_q6_untrusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -193,7 +194,7 @@
return 0;
}
-static int init_image_modem_fw_q6_untrusted(struct pil_device *pil,
+static int init_image_modem_fw_q6_untrusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -201,7 +202,7 @@
return 0;
}
-static int init_image_modem_sw_q6_untrusted(struct pil_device *pil,
+static int init_image_modem_sw_q6_untrusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -209,7 +210,7 @@
return 0;
}
-static int verify_blob(struct pil_device *pil, u32 phy_addr, size_t size)
+static int verify_blob(struct pil_desc *pil, u32 phy_addr, size_t size)
{
return 0;
}
@@ -245,17 +246,17 @@
return pas_auth_and_reset(id);
}
-static int reset_lpass_q6_trusted(struct pil_device *pil)
+static int reset_lpass_q6_trusted(struct pil_desc *pil)
{
return reset_q6_trusted(PAS_Q6, &q6_lpass);
}
-static int reset_modem_fw_q6_trusted(struct pil_device *pil)
+static int reset_modem_fw_q6_trusted(struct pil_desc *pil)
{
return reset_q6_trusted(PAS_MODEM_FW, &q6_modem_fw);
}
-static int reset_modem_sw_q6_trusted(struct pil_device *pil)
+static int reset_modem_sw_q6_trusted(struct pil_desc *pil)
{
return reset_q6_trusted(PAS_MODEM_SW, &q6_modem_sw);
}
@@ -364,17 +365,17 @@
return 0;
}
-static int reset_lpass_q6_untrusted(struct pil_device *pil)
+static int reset_lpass_q6_untrusted(struct pil_desc *pil)
{
return reset_q6_untrusted(&q6_lpass);
}
-static int reset_modem_fw_q6_untrusted(struct pil_device *pil)
+static int reset_modem_fw_q6_untrusted(struct pil_desc *pil)
{
return reset_q6_untrusted(&q6_modem_fw);
}
-static int reset_modem_sw_q6_untrusted(struct pil_device *pil)
+static int reset_modem_sw_q6_untrusted(struct pil_desc *pil)
{
return reset_q6_untrusted(&q6_modem_sw);
}
@@ -395,17 +396,17 @@
return ret;
}
-static int shutdown_lpass_q6_trusted(struct pil_device *pil)
+static int shutdown_lpass_q6_trusted(struct pil_desc *pil)
{
return shutdown_q6_trusted(PAS_Q6, &q6_lpass);
}
-static int shutdown_modem_fw_q6_trusted(struct pil_device *pil)
+static int shutdown_modem_fw_q6_trusted(struct pil_desc *pil)
{
return shutdown_q6_trusted(PAS_MODEM_FW, &q6_modem_fw);
}
-static int shutdown_modem_sw_q6_trusted(struct pil_device *pil)
+static int shutdown_modem_sw_q6_trusted(struct pil_desc *pil)
{
return shutdown_q6_trusted(PAS_MODEM_SW, &q6_modem_sw);
}
@@ -438,22 +439,22 @@
return 0;
}
-static int shutdown_lpass_q6_untrusted(struct pil_device *pil)
+static int shutdown_lpass_q6_untrusted(struct pil_desc *pil)
{
return shutdown_q6_untrusted(&q6_lpass);
}
-static int shutdown_modem_fw_q6_untrusted(struct pil_device *pil)
+static int shutdown_modem_fw_q6_untrusted(struct pil_desc *pil)
{
return shutdown_q6_untrusted(&q6_modem_fw);
}
-static int shutdown_modem_sw_q6_untrusted(struct pil_device *pil)
+static int shutdown_modem_sw_q6_untrusted(struct pil_desc *pil)
{
return shutdown_q6_untrusted(&q6_modem_sw);
}
-static int init_image_riva_untrusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_riva_untrusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -461,7 +462,7 @@
return 0;
}
-static int reset_riva_untrusted(struct pil_device *pil)
+static int reset_riva_untrusted(struct pil_desc *pil)
{
u32 reg;
bool xo;
@@ -552,7 +553,7 @@
return 0;
}
-static int shutdown_riva_untrusted(struct pil_device *pil)
+static int shutdown_riva_untrusted(struct pil_desc *pil)
{
u32 reg;
/* Put riva into reset */
@@ -562,23 +563,23 @@
return 0;
}
-static int init_image_riva_trusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_riva_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_RIVA, metadata, size);
}
-static int reset_riva_trusted(struct pil_device *pil)
+static int reset_riva_trusted(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_RIVA);
}
-static int shutdown_riva_trusted(struct pil_device *pil)
+static int shutdown_riva_trusted(struct pil_desc *pil)
{
return pas_shutdown(PAS_RIVA);
}
-static int init_image_dsps_untrusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_dsps_untrusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
/* Bring memory and bus interface out of reset */
@@ -587,7 +588,7 @@
return 0;
}
-static int reset_dsps_untrusted(struct pil_device *pil)
+static int reset_dsps_untrusted(struct pil_desc *pil)
{
writel_relaxed(0x10, PPSS_PROC_CLK_CTL);
/* Bring DSPS out of reset */
@@ -595,41 +596,41 @@
return 0;
}
-static int shutdown_dsps_untrusted(struct pil_device *pil)
+static int shutdown_dsps_untrusted(struct pil_desc *pil)
{
writel_relaxed(0x2, PPSS_RESET);
writel_relaxed(0x0, PPSS_PROC_CLK_CTL);
return 0;
}
-static int init_image_dsps_trusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_dsps_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_DSPS, metadata, size);
}
-static int reset_dsps_trusted(struct pil_device *pil)
+static int reset_dsps_trusted(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_DSPS);
}
-static int shutdown_dsps_trusted(struct pil_device *pil)
+static int shutdown_dsps_trusted(struct pil_desc *pil)
{
return pas_shutdown(PAS_DSPS);
}
-static int init_image_tzapps(struct pil_device *pil, const u8 *metadata,
+static int init_image_tzapps(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_TZAPPS, metadata, size);
}
-static int reset_tzapps(struct pil_device *pil)
+static int reset_tzapps(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_TZAPPS);
}
-static int shutdown_tzapps(struct pil_device *pil)
+static int shutdown_tzapps(struct pil_desc *pil)
{
return pas_shutdown(PAS_TZAPPS);
}
@@ -676,59 +677,65 @@
.shutdown = shutdown_tzapps,
};
-static struct pil_device pil_lpass_q6 = {
+static struct platform_device pil_lpass_q6 = {
+ .name = "pil_lpass_q6",
+};
+
+static struct pil_desc pil_lpass_q6_desc = {
.name = "q6",
- .pdev = {
- .name = "pil_lpass_q6",
- .id = -1,
- },
+ .dev = &pil_lpass_q6.dev,
.ops = &pil_lpass_q6_ops,
};
-static struct pil_device pil_modem_fw_q6 = {
+static struct platform_device pil_modem_fw_q6 = {
+ .name = "pil_modem_fw_q6",
+};
+
+static struct pil_desc pil_modem_fw_q6_desc = {
.name = "modem_fw",
.depends_on = "q6",
- .pdev = {
- .name = "pil_modem_fw_q6",
- .id = -1,
- },
+ .dev = &pil_modem_fw_q6.dev,
.ops = &pil_modem_fw_q6_ops,
};
-static struct pil_device pil_modem_sw_q6 = {
+static struct platform_device pil_modem_sw_q6 = {
+ .name = "pil_modem_sw_q6",
+};
+
+static struct pil_desc pil_modem_sw_q6_desc = {
.name = "modem",
.depends_on = "modem_fw",
- .pdev = {
- .name = "pil_modem_sw_q6",
- .id = -1,
- },
+ .dev = &pil_modem_sw_q6.dev,
.ops = &pil_modem_sw_q6_ops,
};
-static struct pil_device pil_riva = {
+static struct platform_device pil_riva = {
+ .name = "pil_riva",
+};
+
+static struct pil_desc pil_riva_desc = {
.name = "wcnss",
- .pdev = {
- .name = "pil_riva",
- .id = -1,
- },
+ .dev = &pil_riva.dev,
.ops = &pil_riva_ops,
};
-static struct pil_device pil_dsps = {
+static struct platform_device pil_dsps = {
+ .name = "pil_dsps",
+};
+
+static struct pil_desc pil_dsps_desc = {
.name = "dsps",
- .pdev = {
- .name = "pil_dsps",
- .id = -1,
- },
+ .dev = &pil_dsps.dev,
.ops = &pil_dsps_ops,
};
-static struct pil_device pil_tzapps = {
+static struct platform_device pil_tzapps = {
+ .name = "pil_tzapps",
+};
+
+static struct pil_desc pil_tzapps_desc = {
.name = "tzapps",
- .pdev = {
- .name = "pil_tzapps",
- .id = -1,
- },
+ .dev = &pil_tzapps.dev,
.ops = &pil_tzapps_ops,
};
@@ -807,7 +814,8 @@
err = q6_reset_init(&q6_lpass);
if (err)
return err;
- msm_pil_add_device(&pil_lpass_q6);
+ BUG_ON(platform_device_register(&pil_lpass_q6));
+ BUG_ON(msm_pil_register(&pil_lpass_q6_desc));
mss_enable_reg = ioremap(MSM_MSS_ENABLE_PHYS, 4);
if (!mss_enable_reg)
@@ -818,20 +826,29 @@
iounmap(mss_enable_reg);
return err;
}
- msm_pil_add_device(&pil_modem_fw_q6);
+ BUG_ON(platform_device_register(&pil_modem_fw_q6));
+ if (err) {
+ iounmap(mss_enable_reg);
+ return err;
+ }
+ BUG_ON(msm_pil_register(&pil_modem_fw_q6_desc));
err = q6_reset_init(&q6_modem_sw);
if (err)
return err;
- msm_pil_add_device(&pil_modem_sw_q6);
+ BUG_ON(platform_device_register(&pil_modem_sw_q6));
+ BUG_ON(msm_pil_register(&pil_modem_sw_q6_desc));
- msm_pil_add_device(&pil_dsps);
- msm_pil_add_device(&pil_tzapps);
+ BUG_ON(platform_device_register(&pil_dsps));
+ BUG_ON(msm_pil_register(&pil_dsps_desc));
+ BUG_ON(platform_device_register(&pil_tzapps));
+ BUG_ON(msm_pil_register(&pil_tzapps_desc));
msm_riva_base = ioremap(MSM_RIVA_PHYS, SZ_256);
if (!msm_riva_base)
return -ENOMEM;
- msm_pil_add_device(&pil_riva);
+ BUG_ON(platform_device_register(&pil_riva));
+ BUG_ON(msm_pil_register(&pil_riva_desc));
return 0;
}
diff --git a/arch/arm/mach-msm/peripheral-reset.c b/arch/arm/mach-msm/peripheral-reset.c
index 5456e14..f3f5388 100644
--- a/arch/arm/mach-msm/peripheral-reset.c
+++ b/arch/arm/mach-msm/peripheral-reset.c
@@ -20,6 +20,9 @@
#include <linux/clk.h>
#include <linux/timer.h>
#include <linux/jiffies.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
#include <mach/scm.h>
#include <mach/msm_iomap.h>
@@ -68,13 +71,13 @@
static void __iomem *msm_mms_regs_base;
static void __iomem *msm_lpass_qdsp6ss_base;
-static int init_image_modem_trusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_modem_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_MODEM, metadata, size);
}
-static int init_image_modem_untrusted(struct pil_device *pil,
+static int init_image_modem_untrusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -82,13 +85,13 @@
return 0;
}
-static int init_image_q6_trusted(struct pil_device *pil,
+static int init_image_q6_trusted(struct pil_desc *pil,
const u8 *metadata, size_t size)
{
return pas_init_image(PAS_Q6, metadata, size);
}
-static int init_image_q6_untrusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_q6_untrusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -96,13 +99,13 @@
return 0;
}
-static int init_image_dsps_trusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_dsps_trusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_DSPS, metadata, size);
}
-static int init_image_dsps_untrusted(struct pil_device *pil, const u8 *metadata,
+static int init_image_dsps_untrusted(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata;
@@ -113,7 +116,7 @@
return 0;
}
-static int verify_blob(struct pil_device *pil, u32 phy_addr, size_t size)
+static int verify_blob(struct pil_desc *pil, u32 phy_addr, size_t size)
{
return 0;
}
@@ -142,7 +145,7 @@
remove_modem_proxy_votes(0);
}
-static int reset_modem_untrusted(struct pil_device *pil)
+static int reset_modem_untrusted(struct pil_desc *pil)
{
u32 reg;
@@ -221,7 +224,7 @@
return 0;
}
-static int reset_modem_trusted(struct pil_device *pil)
+static int reset_modem_trusted(struct pil_desc *pil)
{
int ret;
@@ -234,7 +237,7 @@
return ret;
}
-static int shutdown_modem_untrusted(struct pil_device *pil)
+static int shutdown_modem_untrusted(struct pil_desc *pil)
{
u32 reg;
@@ -275,7 +278,7 @@
return 0;
}
-static int shutdown_modem_trusted(struct pil_device *pil)
+static int shutdown_modem_trusted(struct pil_desc *pil)
{
int ret;
@@ -343,7 +346,7 @@
remove_q6_proxy_votes(0);
}
-static int reset_q6_untrusted(struct pil_device *pil)
+static int reset_q6_untrusted(struct pil_desc *pil)
{
u32 reg;
@@ -389,14 +392,14 @@
return 0;
}
-static int reset_q6_trusted(struct pil_device *pil)
+static int reset_q6_trusted(struct pil_desc *pil)
{
make_q6_proxy_votes();
return pas_auth_and_reset(PAS_Q6);
}
-static int shutdown_q6_untrusted(struct pil_device *pil)
+static int shutdown_q6_untrusted(struct pil_desc *pil)
{
u32 reg;
@@ -423,7 +426,7 @@
return 0;
}
-static int shutdown_q6_trusted(struct pil_device *pil)
+static int shutdown_q6_trusted(struct pil_desc *pil)
{
int ret;
@@ -436,7 +439,7 @@
return 0;
}
-static int reset_dsps_untrusted(struct pil_device *pil)
+static int reset_dsps_untrusted(struct pil_desc *pil)
{
__raw_writel(0x10, PPSS_PROC_CLK_CTL);
while (__raw_readl(CLK_HALT_DFAB_STATE) & BIT(18))
@@ -447,35 +450,35 @@
return 0;
}
-static int reset_dsps_trusted(struct pil_device *pil)
+static int reset_dsps_trusted(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_DSPS);
}
-static int shutdown_dsps_trusted(struct pil_device *pil)
+static int shutdown_dsps_trusted(struct pil_desc *pil)
{
return pas_shutdown(PAS_DSPS);
}
-static int shutdown_dsps_untrusted(struct pil_device *pil)
+static int shutdown_dsps_untrusted(struct pil_desc *pil)
{
__raw_writel(0x2, PPSS_RESET);
__raw_writel(0x0, PPSS_PROC_CLK_CTL);
return 0;
}
-static int init_image_playready(struct pil_device *pil, const u8 *metadata,
+static int init_image_playready(struct pil_desc *pil, const u8 *metadata,
size_t size)
{
return pas_init_image(PAS_PLAYREADY, metadata, size);
}
-static int reset_playready(struct pil_device *pil)
+static int reset_playready(struct pil_desc *pil)
{
return pas_auth_and_reset(PAS_PLAYREADY);
}
-static int shutdown_playready(struct pil_device *pil)
+static int shutdown_playready(struct pil_desc *pil)
{
return pas_shutdown(PAS_PLAYREADY);
}
@@ -508,47 +511,49 @@
.shutdown = shutdown_playready,
};
-static struct pil_device peripherals[] = {
- {
- .name = "modem",
- .depends_on = "q6",
- .pdev = {
- .name = "pil_modem",
- .id = -1,
- },
- .ops = &pil_modem_ops,
- },
- {
- .name = "q6",
- .pdev = {
- .name = "pil_q6",
- .id = -1,
- },
- .ops = &pil_q6_ops,
- },
- {
- .name = "tzapps",
- .pdev = {
- .name = "pil_playready",
- .id = -1,
- },
- .ops = &pil_playready_ops,
- },
+static struct platform_device pil_modem = {
+ .name = "pil_modem",
};
-struct pil_device peripheral_dsps = {
+static struct pil_desc pil_modem_desc = {
+ .name = "modem",
+ .depends_on = "q6",
+ .dev = &pil_modem.dev,
+ .ops = &pil_modem_ops,
+};
+
+static struct platform_device pil_q6 = {
+ .name = "pil_q6",
+};
+
+static struct pil_desc pil_q6_desc = {
+ .name = "q6",
+ .dev = &pil_q6.dev,
+ .ops = &pil_q6_ops,
+};
+
+static struct platform_device pil_playready = {
+ .name = "pil_playready",
+};
+
+static struct pil_desc pil_playready_desc = {
+ .name = "tzapps",
+ .dev = &pil_playready.dev,
+ .ops = &pil_playready_ops,
+};
+
+static struct platform_device pil_dsps = {
+ .name = "pil_dsps",
+};
+
+static struct pil_desc pil_dsps_desc = {
.name = "dsps",
- .pdev = {
- .name = "pil_dsps",
- .id = -1,
- },
+ .dev = &pil_dsps.dev,
.ops = &pil_dsps_ops,
};
static int __init msm_peripheral_reset_init(void)
{
- unsigned i;
-
msm_mms_regs_base = ioremap(MSM_MMS_REGS_BASE, SZ_256);
if (!msm_mms_regs_base)
goto err;
@@ -583,8 +588,17 @@
pil_dsps_ops.shutdown = shutdown_dsps_trusted;
}
- for (i = 0; i < ARRAY_SIZE(peripherals); i++)
- msm_pil_add_device(&peripherals[i]);
+ BUG_ON(platform_device_register(&pil_q6));
+ BUG_ON(msm_pil_register(&pil_q6_desc));
+ BUG_ON(platform_device_register(&pil_modem));
+ BUG_ON(msm_pil_register(&pil_modem_desc));
+ BUG_ON(platform_device_register(&pil_playready));
+ BUG_ON(msm_pil_register(&pil_playready_desc));
+
+ if (machine_is_msm8x60_fluid())
+ pil_dsps_desc.name = "dsps_fluid";
+ BUG_ON(platform_device_register(&pil_dsps));
+ BUG_ON(msm_pil_register(&pil_dsps_desc));
return 0;
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_acdb.c b/arch/arm/mach-msm/qdsp5v2/audio_acdb.c
index 36ace7f..ec275b4 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_acdb.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_acdb.c
@@ -31,6 +31,7 @@
#include <mach/msm_subsystem_map.h>
#include <mach/qdsp5v2/audio_dev_ctl.h>
#include <mach/qdsp5v2/audpp.h>
+#include <mach/socinfo.h>
#include <mach/qdsp5v2/audpreproc.h>
#include <mach/qdsp5v2/qdsp5audppcmdi.h>
#include <mach/qdsp5v2/qdsp5audpreproccmdi.h>
@@ -130,6 +131,7 @@
unsigned long get_blk_paddr;
u8 *get_blk_kvaddr;
struct msm_mapped_buffer *map_v_get_blk;
+ char *build_id;
};
static struct acdb_data acdb_data;
@@ -1109,23 +1111,26 @@
rtc_acdb.set_iid = 0;
rtc_acdb.valid_abid = false;
rtc_acdb.tx_rx_ctl = 0;
- snprintf(name, sizeof name, "get_set_abid");
- get_set_abid_dentry = debugfs_create_file(name,
+ if (acdb_data.build_id[17] == '1') {
+ snprintf(name, sizeof name, "get_set_abid");
+ get_set_abid_dentry = debugfs_create_file(name,
S_IFREG | S_IRUGO | S_IWUGO,
NULL, NULL, &rtc_acdb_debug_fops);
- if (IS_ERR(get_set_abid_dentry)) {
- MM_ERR("SET GET ABID debugfs_create_file failed\n");
- return false;
- }
+ if (IS_ERR(get_set_abid_dentry)) {
+ MM_ERR("SET GET ABID debugfs_create_file failed\n");
+ return false;
+ }
- snprintf(name1, sizeof name1, "get_set_abid_data");
- get_set_abid_data_dentry = debugfs_create_file(name1,
- S_IFREG | S_IRUGO | S_IWUGO,
- NULL, NULL,
- &rtc_acdb_data_debug_fops);
- if (IS_ERR(get_set_abid_data_dentry)) {
- MM_ERR("SET GET ABID DATA debugfs_create_file failed\n");
- return false;
+ snprintf(name1, sizeof name1, "get_set_abid_data");
+ get_set_abid_data_dentry = debugfs_create_file(name1,
+ S_IFREG | S_IRUGO | S_IWUGO,
+ NULL, NULL,
+ &rtc_acdb_data_debug_fops);
+ if (IS_ERR(get_set_abid_data_dentry)) {
+ MM_ERR("SET GET ABID DATA"
+ " debugfs_create_file failed\n");
+ return false;
+ }
}
rtc_read->phys = allocate_contiguous_ebi_nomap(PMEM_RTC_ACDB_QUERY_MEM,
@@ -2332,18 +2337,20 @@
MM_DBG("AUDPREPROC is calibrated"
" with calib_gain_tx\n");
}
- acdb_rmc = get_rmc_blk();
- if (acdb_rmc != NULL) {
- result = afe_config_rmc_block(acdb_rmc);
- if (result) {
- MM_ERR("ACDB=> Failed to send rmc"
- " data to afe\n");
- result = -EINVAL;
- goto done;
+ if (acdb_data.build_id[17] != '0') {
+ acdb_rmc = get_rmc_blk();
+ if (acdb_rmc != NULL) {
+ result = afe_config_rmc_block(acdb_rmc);
+ if (result) {
+ MM_ERR("ACDB=> Failed to send rmc"
+ " data to afe\n");
+ result = -EINVAL;
+ goto done;
+ } else
+ MM_DBG("AFE is calibrated with rmc params\n");
} else
- MM_DBG("AFE is calibrated with rmc params\n");
- } else
- MM_DBG("RMC block was not found\n");
+ MM_DBG("RMC block was not found\n");
+ }
if (!acdb_data.fleuce_feature_status[acdb_data.preproc_stream_id]) {
result = acdb_fill_audpreproc_fluence();
if (!(IS_ERR_VALUE(result))) {
@@ -3050,9 +3057,11 @@
MM_INFO("audpreproc is routed to pseudo device\n");
return result;
}
- if (session_info[stream_id].sampling_freq)
- acdb_data.device_info->sample_rate =
+ if (acdb_data.build_id[17] == '1') {
+ if (session_info[stream_id].sampling_freq)
+ acdb_data.device_info->sample_rate =
session_info[stream_id].sampling_freq;
+ }
if (!(acdb_data.acdb_state & CAL_DATA_READY)) {
result = check_tx_acdb_values_cached();
if (result) {
@@ -3110,17 +3119,19 @@
callback at this scenario we should not access
device information
*/
- if (acdb_data.device_info &&
- session_info[stream_id].sampling_freq) {
- acdb_data.device_info->sample_rate =
+ if (acdb_data.build_id[17] != '0') {
+ if (acdb_data.device_info &&
+ session_info[stream_id].sampling_freq) {
+ acdb_data.device_info->sample_rate =
session_info[stream_id].sampling_freq;
- result = check_tx_acdb_values_cached();
- if (!result) {
- MM_INFO("acdb values for the stream is" \
- " querried from modem");
- acdb_data.acdb_state |= CAL_DATA_READY;
- } else {
- acdb_data.acdb_state &= ~CAL_DATA_READY;
+ result = check_tx_acdb_values_cached();
+ if (!result) {
+ MM_INFO("acdb values for the stream is" \
+ " querried from modem");
+ acdb_data.acdb_state |= CAL_DATA_READY;
+ } else {
+ acdb_data.acdb_state &= ~CAL_DATA_READY;
+ }
}
}
if (acdb_data.preproc_stream_id == 0)
@@ -3195,6 +3206,7 @@
if (result)
goto err4;
+
return result;
err4:
@@ -3276,10 +3288,12 @@
result = acdb_initialize_data();
if (result)
goto done;
-
- result = initialize_modem_acdb();
- if (result < 0)
- MM_ERR("failed to initialize modem ACDB\n");
+ MM_ERR("acdb_data.build_id[17] = %c\n", acdb_data.build_id[17]);
+ if (acdb_data.build_id[17] != '0') {
+ result = initialize_modem_acdb();
+ if (result < 0)
+ MM_ERR("failed to initialize modem ACDB\n");
+ }
while (!kthread_should_stop()) {
MM_DBG("Waiting for call back events\n");
@@ -3375,6 +3389,10 @@
result = -ENODEV;
goto err;
}
+
+ acdb_data.build_id = socinfo_get_build_id();
+ MM_INFO("build id used is = %s\n", acdb_data.build_id);
+
#ifdef CONFIG_DEBUG_FS
/*This is RTC specific INIT used only with debugfs*/
if (!rtc_acdb_init())
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_lpa.c b/arch/arm/mach-msm/qdsp5v2/audio_lpa.c
index 9baf521..c38fefc 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_lpa.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_lpa.c
@@ -603,16 +603,14 @@
temp = audio->bytecount_head;
used_buf = list_first_entry(&audio->out_queue,
struct audlpa_buffer_node, list);
- if ((audio->bytecount_head + used_buf->buf.data_len) <
- audio->bytecount_consumed) {
- audio->bytecount_head += used_buf->buf.data_len;
- temp = audio->bytecount_head;
- list_del(&used_buf->list);
- evt_payload.aio_buf = used_buf->buf;
- audlpa_post_event(audio, AUDIO_EVENT_WRITE_DONE,
- evt_payload);
- kfree(used_buf);
- }
+
+ audio->bytecount_head += used_buf->buf.data_len;
+ temp = audio->bytecount_head;
+ list_del(&used_buf->list);
+ evt_payload.aio_buf = used_buf->buf;
+ audlpa_post_event(audio, AUDIO_EVENT_WRITE_DONE,
+ evt_payload);
+ kfree(used_buf);
audio->drv_status &= ~ADRV_STATUS_OBUF_GIVEN;
}
}
diff --git a/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c b/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
index 7f68c03..43f3d26 100644
--- a/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
+++ b/arch/arm/mach-msm/qdsp5v2/audio_pcm_in.c
@@ -638,30 +638,52 @@
rc = -EFAULT;
break;
}
- if (cfg.channel_count == 1) {
- cfg.channel_count = AUDREC_CMD_MODE_MONO;
- if ((cfg.buffer_size == MONO_DATA_SIZE_256) ||
- (cfg.buffer_size == MONO_DATA_SIZE_512) ||
- (cfg.buffer_size == MONO_DATA_SIZE_1024)) {
- audio->buffer_size = cfg.buffer_size;
+ MM_ERR("build_id[17] = %c\n", audio->build_id[17]);
+ if (audio->build_id[17] == '1') {
+ audio->enc_type = ENC_TYPE_EXT_WAV | audio->mode;
+ if (cfg.channel_count == 1) {
+ cfg.channel_count = AUDREC_CMD_MODE_MONO;
+ if ((cfg.buffer_size == MONO_DATA_SIZE_256) ||
+ (cfg.buffer_size ==
+ MONO_DATA_SIZE_512) ||
+ (cfg.buffer_size ==
+ MONO_DATA_SIZE_1024)) {
+ audio->buffer_size = cfg.buffer_size;
+ } else {
+ rc = -EINVAL;
+ break;
+ }
+ } else if (cfg.channel_count == 2) {
+ cfg.channel_count = AUDREC_CMD_MODE_STEREO;
+ if ((cfg.buffer_size ==
+ STEREO_DATA_SIZE_256) ||
+ (cfg.buffer_size ==
+ STEREO_DATA_SIZE_512) ||
+ (cfg.buffer_size ==
+ STEREO_DATA_SIZE_1024)) {
+ audio->buffer_size = cfg.buffer_size;
+ } else {
+ rc = -EINVAL;
+ break;
+ }
} else {
rc = -EINVAL;
break;
}
- } else if (cfg.channel_count == 2) {
- cfg.channel_count = AUDREC_CMD_MODE_STEREO;
- if ((cfg.buffer_size == STEREO_DATA_SIZE_256) ||
- (cfg.buffer_size == STEREO_DATA_SIZE_512) ||
- (cfg.buffer_size == STEREO_DATA_SIZE_1024)) {
- audio->buffer_size = cfg.buffer_size;
- } else {
- rc = -EINVAL;
- break;
+ } else if (audio->build_id[17] == '0') {
+ audio->enc_type = ENC_TYPE_WAV | audio->mode;
+ if (cfg.channel_count == 1) {
+ cfg.channel_count = AUDREC_CMD_MODE_MONO;
+ audio->buffer_size = MONO_DATA_SIZE_1024;
+ } else if (cfg.channel_count == 2) {
+ cfg.channel_count = AUDREC_CMD_MODE_STEREO;
+ audio->buffer_size = STEREO_DATA_SIZE_1024;
}
} else {
- rc = -EINVAL;
- break;
+ MM_ERR("wrong build_id = %s\n", audio->build_id);
+ return -ENODEV;
}
+ MM_ERR("buffer size configured is = %d\n", audio->buffer_size);
audio->samp_rate = cfg.sample_rate;
audio->channel_mode = cfg.channel_count;
break;
diff --git a/arch/arm/mach-msm/qdsp6v2/audio_multi_aac.c b/arch/arm/mach-msm/qdsp6v2/audio_multi_aac.c
index 122634f..169e348 100644
--- a/arch/arm/mach-msm/qdsp6v2/audio_multi_aac.c
+++ b/arch/arm/mach-msm/qdsp6v2/audio_multi_aac.c
@@ -18,6 +18,8 @@
#include <linux/msm_audio_aac.h>
#include "audio_utils_aio.h"
+#define AUDIO_AAC_DUAL_MONO_INVALID -1
+
/* Default number of pre-allocated event packets */
#define PCM_BUFSZ_MIN_AACM ((8*1024) + sizeof(struct dec_meta_out))
@@ -146,10 +148,52 @@
break;
}
case AUDIO_SET_AAC_CONFIG: {
+ struct msm_audio_aac_config *aac_config;
if (copy_from_user(audio->codec_cfg, (void *)arg,
sizeof(struct msm_audio_aac_config))) {
rc = -EFAULT;
- break;
+ } else {
+ uint16_t sce_left = 1, sce_right = 2;
+ aac_config = audio->codec_cfg;
+ if ((aac_config->dual_mono_mode <
+ AUDIO_AAC_DUAL_MONO_PL_PR) ||
+ (aac_config->dual_mono_mode >
+ AUDIO_AAC_DUAL_MONO_PL_SR)) {
+ pr_err("%s:AUDIO_SET_AAC_CONFIG: Invalid"
+ "dual_mono mode =%d\n", __func__,
+ aac_config->dual_mono_mode);
+ } else {
+ /* convert the data from user into sce_left
+ * and sce_right based on the definitions
+ */
+ pr_debug("%s: AUDIO_SET_AAC_CONFIG: modify"
+ "dual_mono mode =%d\n", __func__,
+ aac_config->dual_mono_mode);
+ switch (aac_config->dual_mono_mode) {
+ case AUDIO_AAC_DUAL_MONO_PL_PR:
+ sce_left = 1;
+ sce_right = 1;
+ break;
+ case AUDIO_AAC_DUAL_MONO_SL_SR:
+ sce_left = 2;
+ sce_right = 2;
+ break;
+ case AUDIO_AAC_DUAL_MONO_SL_PR:
+ sce_left = 2;
+ sce_right = 1;
+ break;
+ case AUDIO_AAC_DUAL_MONO_PL_SR:
+ default:
+ sce_left = 1;
+ sce_right = 2;
+ break;
+ }
+ rc = q6asm_cfg_dual_mono_aac(audio->ac,
+ sce_left, sce_right);
+ if (rc < 0)
+ pr_err("%s: asm cmd dualmono failed"
+ " rc=%d\n", __func__, rc);
+ } break;
}
break;
}
@@ -165,6 +209,7 @@
{
struct q6audio_aio *audio = NULL;
int rc = 0;
+ struct msm_audio_aac_config *aac_config = NULL;
#ifdef CONFIG_DEBUG_FS
/* 4 bytes represents decoder number, 1 byte for terminate string */
@@ -186,7 +231,10 @@
return -ENOMEM;
}
+ aac_config = audio->codec_cfg;
+
audio->pcm_cfg.buffer_size = PCM_BUFSZ_MIN_AACM;
+ aac_config->dual_mono_mode = AUDIO_AAC_DUAL_MONO_INVALID;
audio->ac = q6asm_audio_client_alloc((app_cb) q6_audio_aac_cb,
(void *)audio);
diff --git a/arch/arm/mach-msm/sysmon.h b/arch/arm/mach-msm/sysmon.h
index 5fb75bc..429a155 100644
--- a/arch/arm/mach-msm/sysmon.h
+++ b/arch/arm/mach-msm/sysmon.h
@@ -17,6 +17,9 @@
#include <mach/subsystem_notif.h>
+/**
+ * enum subsys_id - Destination subsystems for events.
+ */
enum subsys_id {
SYSMON_SS_MODEM,
SYSMON_SS_LPASS,
@@ -26,6 +29,20 @@
SYSMON_NUM_SS
};
+
+/**
+ * sysmon_send_event() - Notify a subsystem of another's state change.
+ * @dest_ss: ID of subsystem the notification should be sent to.
+ * @event_ss: String name of the subsystem that generated the notification.
+ * @notif: ID of the notification type (ex. SUBSYS_BEFORE_SHUTDOWN)
+ *
+ * Returns 0 for success, -EINVAL for invalid destination or notification IDs,
+ * -ENODEV if the SMD channel is not open, -ETIMEDOUT if the destination
+ * subsystem does not respond, and -ENOSYS if the destination subsystem
+ * responds, but with something other than an acknowledgement.
+ *
+ * If CONFIG_MSM_SYSMON_COMM is not defined, always return success (0).
+ */
#ifdef CONFIG_MSM_SYSMON_COMM
int sysmon_send_event(enum subsys_id dest_ss, const char *event_ss,
enum subsys_notif_type notif);
diff --git a/drivers/char/msm_rotator.c b/drivers/char/msm_rotator.c
index 555e4fa..bb31b6a 100644
--- a/drivers/char/msm_rotator.c
+++ b/drivers/char/msm_rotator.c
@@ -61,10 +61,6 @@
#define MSM_ROTATOR_MAX_H 0x1fff
#define MSM_ROTATOR_MAX_W 0x1fff
-#define IS_NONPLANAR 0x0
-#define IS_PLANAR 0x1
-#define IS_PLANAR_16ALIGNED 0x2
-
/* from lsb to msb */
#define GET_PACK_PATTERN(a, x, y, z, bit) \
(((a)<<((bit)*3))|((x)<<((bit)*2))|((y)<<(bit))|(z))
@@ -94,6 +90,15 @@
unsigned int row_tile_h; /* tiles per row's height */
};
+struct msm_rotator_mem_planes {
+ unsigned int num_planes;
+ unsigned int plane_size[4];
+ unsigned int total_size;
+};
+
+#define checkoffset(offset, size, max_size) \
+ ((size) > (max_size) || (offset) > ((max_size) - (size)))
+
struct msm_rotator_dev {
void __iomem *io_base;
int irq;
@@ -120,8 +125,6 @@
wait_queue_head_t wq;
};
-#define chroma_addr(start, w, h, bpp) ((start) + ((h) * (w) * (bpp)))
-
#define COMPONENT_5BITS 1
#define COMPONENT_6BITS 2
#define COMPONENT_8BITS 3
@@ -246,6 +249,19 @@
return IRQ_HANDLED;
}
+static unsigned int tile_size(unsigned int src_width,
+ unsigned int src_height,
+ const struct tile_parm *tp)
+{
+ unsigned int tile_w, tile_h;
+ unsigned int row_num_w, row_num_h;
+ tile_w = tp->width * tp->row_tile_w;
+ tile_h = tp->height * tp->row_tile_h;
+ row_num_w = (src_width + tile_w - 1) / tile_w;
+ row_num_h = (src_height + tile_h - 1) / tile_h;
+ return ((row_num_w * row_num_h * tile_w * tile_h) + 8191) & ~8191;
+}
+
static int get_bpp(int format)
{
switch (format) {
@@ -285,6 +301,81 @@
}
+static int msm_rotator_get_plane_sizes(uint32_t format, uint32_t w, uint32_t h,
+ struct msm_rotator_mem_planes *p)
+{
+ /*
+ * each row of samsung tile consists of two tiles in height
+ * and two tiles in width which means width should align to
+ * 64 x 2 bytes and height should align to 32 x 2 bytes.
+ * video decoder generate two tiles in width and one tile
+ * in height which ends up height align to 32 X 1 bytes.
+ */
+ const struct tile_parm tile = {64, 32, 2, 1};
+ int i;
+
+ if (p == NULL)
+ return -EINVAL;
+
+ if ((w > MSM_ROTATOR_MAX_W) || (h > MSM_ROTATOR_MAX_H))
+ return -ERANGE;
+
+ memset(p, 0, sizeof(*p));
+
+ switch (format) {
+ case MDP_XRGB_8888:
+ case MDP_ARGB_8888:
+ case MDP_RGBA_8888:
+ case MDP_BGRA_8888:
+ case MDP_RGBX_8888:
+ case MDP_RGB_888:
+ case MDP_RGB_565:
+ case MDP_BGR_565:
+ case MDP_YCRYCB_H2V1:
+ p->num_planes = 1;
+ p->plane_size[0] = w * h * get_bpp(format);
+ break;
+ case MDP_Y_CRCB_H2V1:
+ case MDP_Y_CBCR_H2V1:
+ p->num_planes = 2;
+ p->plane_size[0] = w * h;
+ p->plane_size[1] = w * h;
+ break;
+ case MDP_Y_CBCR_H2V2:
+ case MDP_Y_CRCB_H2V2:
+ p->num_planes = 2;
+ p->plane_size[0] = w * h;
+ p->plane_size[1] = w * h / 2;
+ break;
+ case MDP_Y_CRCB_H2V2_TILE:
+ case MDP_Y_CBCR_H2V2_TILE:
+ p->num_planes = 2;
+ p->plane_size[0] = tile_size(w, h, &tile);
+ p->plane_size[1] = tile_size(w, h/2, &tile);
+ break;
+ case MDP_Y_CB_CR_H2V2:
+ case MDP_Y_CR_CB_H2V2:
+ p->num_planes = 3;
+ p->plane_size[0] = w * h;
+ p->plane_size[1] = (w / 2) * (h / 2);
+ p->plane_size[2] = (w / 2) * (h / 2);
+ break;
+ case MDP_Y_CR_CB_GH2V2:
+ p->num_planes = 3;
+ p->plane_size[0] = ALIGN(w, 16) * h;
+ p->plane_size[1] = ALIGN(w / 2, 16) * (h / 2);
+ p->plane_size[2] = ALIGN(w / 2, 16) * (h / 2);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ for (i = 0; i < p->num_planes; i++)
+ p->total_size += p->plane_size[i];
+
+ return 0;
+}
+
static int msm_rotator_ycxcx_h2v1(struct msm_rotator_img_info *info,
unsigned int in_paddr,
unsigned int out_paddr,
@@ -294,7 +385,6 @@
unsigned int out_chroma_paddr)
{
int bpp;
- unsigned int in_chr_addr, out_chr_addr;
if (info->src.format != info->dst.format)
return -EINVAL;
@@ -303,28 +393,12 @@
if (bpp < 0)
return -ENOTTY;
- if (!in_chroma_paddr) {
- in_chr_addr = chroma_addr(in_paddr, info->src.width,
- info->src.height,
- bpp);
- } else
- in_chr_addr = in_chroma_paddr;
-
- if (!out_chroma_paddr) {
- out_chr_addr = chroma_addr(out_paddr, info->dst.width,
- info->dst.height,
- bpp);
- } else
- out_chr_addr = out_chroma_paddr;
-
iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
-
- iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
- iowrite32(in_chr_addr, MSM_ROTATOR_SRCP1_ADDR);
+ iowrite32(in_chroma_paddr, MSM_ROTATOR_SRCP1_ADDR);
iowrite32(out_paddr +
((info->dst_y * info->dst.width) + info->dst_x),
MSM_ROTATOR_OUTP0_ADDR);
- iowrite32(out_chr_addr +
+ iowrite32(out_chroma_paddr +
((info->dst_y * info->dst.width) + info->dst_x),
MSM_ROTATOR_OUTP1_ADDR);
@@ -380,60 +454,45 @@
int new_session,
unsigned int in_chroma_paddr,
unsigned int out_chroma_paddr,
- int planar_mode)
+ unsigned int in_chroma2_paddr)
{
- int bpp;
- unsigned int in_chr_addr, out_chr_addr;
+ uint32_t dst_format;
+ int is_tile = 0;
- bpp = get_bpp(info->src.format);
- if (bpp < 0)
- return -ENOTTY;
-
- if (!in_chroma_paddr) {
- if (planar_mode & IS_PLANAR_16ALIGNED)
- in_chr_addr = chroma_addr(in_paddr,
- ALIGN(info->src.width, 16),
- info->src.height,
- bpp);
- else
- in_chr_addr = chroma_addr(in_paddr, info->src.width,
- info->src.height,
- bpp);
- } else
- in_chr_addr = in_chroma_paddr;
-
- if (!out_chroma_paddr) {
- out_chr_addr = chroma_addr(out_paddr, info->dst.width,
- info->dst.height,
- bpp);
- } else
- out_chr_addr = out_chroma_paddr;
+ switch (info->src.format) {
+ case MDP_Y_CRCB_H2V2_TILE:
+ is_tile = 1;
+ case MDP_Y_CR_CB_H2V2:
+ case MDP_Y_CR_CB_GH2V2:
+ case MDP_Y_CRCB_H2V2:
+ dst_format = MDP_Y_CRCB_H2V2;
+ break;
+ case MDP_Y_CBCR_H2V2_TILE:
+ is_tile = 1;
+ case MDP_Y_CB_CR_H2V2:
+ case MDP_Y_CBCR_H2V2:
+ dst_format = MDP_Y_CBCR_H2V2;
+ break;
+ default:
+ return -EINVAL;
+ }
+ if (info->dst.format != dst_format)
+ return -EINVAL;
iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
- iowrite32(in_chr_addr,
- MSM_ROTATOR_SRCP1_ADDR);
+ iowrite32(in_chroma_paddr, MSM_ROTATOR_SRCP1_ADDR);
+ iowrite32(in_chroma2_paddr, MSM_ROTATOR_SRCP2_ADDR);
+
iowrite32(out_paddr +
((info->dst_y * info->dst.width) + info->dst_x),
MSM_ROTATOR_OUTP0_ADDR);
- iowrite32(out_chr_addr +
+ iowrite32(out_chroma_paddr +
((info->dst_y * info->dst.width)/2 + info->dst_x),
MSM_ROTATOR_OUTP1_ADDR);
- if (planar_mode & IS_PLANAR) {
- if (planar_mode & IS_PLANAR_16ALIGNED)
- iowrite32(in_chr_addr +
- ALIGN((info->src.width / 2), 16) *
- (info->src.height / 2),
- MSM_ROTATOR_SRCP2_ADDR);
- else
- iowrite32(in_chr_addr +
- (info->src.width / 2) * (info->src.height / 2),
- MSM_ROTATOR_SRCP2_ADDR);
- }
-
if (new_session) {
- if (planar_mode & IS_PLANAR) {
- if (planar_mode & IS_PLANAR_16ALIGNED) {
+ if (in_chroma2_paddr) {
+ if (info->src.format == MDP_Y_CR_CB_GH2V2) {
iowrite32(ALIGN(info->src.width, 16) |
ALIGN((info->src.width / 2), 16) << 16,
MSM_ROTATOR_SRC_YSTRIDE1);
@@ -455,8 +514,7 @@
info->dst.width << 16,
MSM_ROTATOR_OUT_YSTRIDE1);
- if ((info->src.format == MDP_Y_CBCR_H2V2) ||
- (info->src.format == MDP_Y_CB_CR_H2V2)) {
+ if (dst_format == MDP_Y_CBCR_H2V2) {
iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
MSM_ROTATOR_SRC_UNPACK_PATTERN1);
iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
@@ -471,118 +529,14 @@
(ROTATIONS_TO_BITMASK(info->rotations) << 9) |
1 << 8, /* ROT_EN */
MSM_ROTATOR_SUB_BLOCK_CFG);
- iowrite32(0 << 29 | /* frame format 0 = linear */
+
+ iowrite32((is_tile ? 2 : 0) << 29 | /* frame format */
(use_imem ? 0 : 1) << 22 | /* tile size */
- ((planar_mode & IS_PLANAR) ?
- 1 : 2) << 19 | /* fetch planes */
+ (in_chroma2_paddr ? 1 : 2) << 19 | /* fetch planes */
0 << 18 | /* unpack align */
1 << 17 | /* unpack tight */
1 << 13 | /* unpack count 0=1 component */
- (bpp-1) << 9 | /* src Bpp 0=1 byte ... */
- 0 << 8 | /* has alpha */
- 0 << 6 | /* alpha bits 3=8bits */
- 3 << 4 | /* R/Cr bits 1=5 2=6 3=8 */
- 3 << 2 | /* B/Cb bits 1=5 2=6 3=8 */
- 3 << 0, /* G/Y bits 1=5 2=6 3=8 */
- MSM_ROTATOR_SRC_FORMAT);
- }
- return 0;
-}
-
-static unsigned int tile_size(unsigned int src_width,
- unsigned int src_height,
- const struct tile_parm *tp)
-{
- unsigned int tile_w, tile_h;
- unsigned int row_num_w, row_num_h;
- tile_w = tp->width * tp->row_tile_w;
- tile_h = tp->height * tp->row_tile_h;
- row_num_w = (src_width + tile_w - 1) / tile_w;
- row_num_h = (src_height + tile_h - 1) / tile_h;
- return ((row_num_w * row_num_h * tile_w * tile_h) + 8191) & ~8191;
-}
-
-static int msm_rotator_ycxcx_h2v2_tile(struct msm_rotator_img_info *info,
- unsigned int in_paddr,
- unsigned int out_paddr,
- unsigned int use_imem,
- int new_session,
- unsigned in_chroma_paddr,
- unsigned out_chroma_paddr)
-{
- int bpp;
- unsigned int offset = 0;
- unsigned int in_chr_addr, out_chr_addr;
- /*
- * each row of samsung tile consists of two tiles in height
- * and two tiles in width which means width should align to
- * 64 x 2 bytes and height should align to 32 x 2 bytes.
- * video decoder generate two tiles in width and one tile
- * in height which ends up height align to 32 X 1 bytes.
- */
- const struct tile_parm tile = {64, 32, 2, 1};
- if ((info->src.format == MDP_Y_CRCB_H2V2_TILE &&
- info->dst.format != MDP_Y_CRCB_H2V2) ||
- (info->src.format == MDP_Y_CBCR_H2V2_TILE &&
- info->dst.format != MDP_Y_CBCR_H2V2))
- return -EINVAL;
-
- bpp = get_bpp(info->src.format);
- if (bpp < 0)
- return -ENOTTY;
-
- offset = tile_size(info->src.width, info->src.height, &tile);
- if (!in_chroma_paddr)
- in_chr_addr = in_paddr + offset;
- else
- in_chr_addr = in_chroma_paddr;
-
- if (!out_chroma_paddr) {
- out_chr_addr = chroma_addr(out_paddr, info->dst.width,
- info->dst.height,
- bpp);
- } else
- out_chr_addr = out_chroma_paddr;
-
- iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
- iowrite32(in_paddr + offset, MSM_ROTATOR_SRCP1_ADDR);
- iowrite32(out_paddr +
- ((info->dst_y * info->dst.width) + info->dst_x),
- MSM_ROTATOR_OUTP0_ADDR);
- iowrite32(out_chr_addr +
- ((info->dst_y * info->dst.width)/2 + info->dst_x),
- MSM_ROTATOR_OUTP1_ADDR);
-
- if (new_session) {
- iowrite32(info->src.width |
- info->src.width << 16,
- MSM_ROTATOR_SRC_YSTRIDE1);
-
- iowrite32(info->dst.width |
- info->dst.width << 16,
- MSM_ROTATOR_OUT_YSTRIDE1);
- if (info->src.format == MDP_Y_CBCR_H2V2_TILE) {
- iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
- MSM_ROTATOR_SRC_UNPACK_PATTERN1);
- iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
- MSM_ROTATOR_OUT_PACK_PATTERN1);
- } else {
- iowrite32(GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8),
- MSM_ROTATOR_SRC_UNPACK_PATTERN1);
- iowrite32(GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8),
- MSM_ROTATOR_OUT_PACK_PATTERN1);
- }
- iowrite32((3 << 18) | /* chroma sampling 3=4:2:0 */
- (ROTATIONS_TO_BITMASK(info->rotations) << 9) |
- 1 << 8, /* ROT_EN */
- MSM_ROTATOR_SUB_BLOCK_CFG);
- iowrite32(2 << 29 | /* frame format 2 = supertile */
- (use_imem ? 0 : 1) << 22 | /* tile size */
- 2 << 19 | /* fetch planes 2 = pseudo */
- 0 << 18 | /* unpack align */
- 1 << 17 | /* unpack tight */
- 1 << 13 | /* unpack count 0=1 component */
- (bpp-1) << 9 | /* src Bpp 0=1 byte ... */
+ 0 << 9 | /* src Bpp 0=1 byte ... */
0 << 8 | /* has alpha */
0 << 6 | /* alpha bits 3=8bits */
3 << 4 | /* R/Cr bits 1=5 2=6 3=8 */
@@ -796,7 +750,7 @@
unsigned int status;
struct msm_rotator_data_info info;
unsigned int in_paddr, out_paddr;
- unsigned long len;
+ unsigned long src_len, dst_len;
struct file *src_file = 0;
struct file *dst_file = 0;
int use_imem = 0;
@@ -804,29 +758,14 @@
struct file *src_chroma_file = 0;
struct file *dst_chroma_file = 0;
unsigned int in_chroma_paddr = 0, out_chroma_paddr = 0;
+ unsigned int in_chroma2_paddr = 0;
uint32_t format;
+ struct msm_rotator_img_info *img_info;
+ struct msm_rotator_mem_planes src_planes, dst_planes;
if (copy_from_user(&info, (void __user *)arg, sizeof(info)))
return -EFAULT;
- rc = get_img(info.src.memory_id, (unsigned long *)&in_paddr,
- (unsigned long *)&len, &src_file);
- if (rc) {
- printk(KERN_ERR "%s: in get_img() failed id=0x%08x\n",
- DRIVER_NAME, info.src.memory_id);
- return rc;
- }
- in_paddr += info.src.offset;
-
- rc = get_img(info.dst.memory_id, (unsigned long *)&out_paddr,
- (unsigned long *)&len, &dst_file);
- if (rc) {
- printk(KERN_ERR "%s: out get_img() failed id=0x%08x\n",
- DRIVER_NAME, info.dst.memory_id);
- goto do_rotate_fail_dst_img;
- }
- out_paddr += info.dst.offset;
-
mutex_lock(&msm_rotator_dev->rotator_lock);
for (s = 0; s < MAX_SESSIONS; s++)
if ((msm_rotator_dev->img_info[s] != NULL) &&
@@ -851,36 +790,128 @@
goto do_rotate_unlock_mutex;
}
+ img_info = msm_rotator_dev->img_info[s];
+ if (msm_rotator_get_plane_sizes(img_info->src.format,
+ img_info->src.width,
+ img_info->src.height,
+ &src_planes)) {
+ pr_err("%s: invalid src format\n", __func__);
+ rc = -EINVAL;
+ goto do_rotate_unlock_mutex;
+ }
+ if (msm_rotator_get_plane_sizes(img_info->dst.format,
+ img_info->dst.width,
+ img_info->dst.height,
+ &dst_planes)) {
+ pr_err("%s: invalid dst format\n", __func__);
+ rc = -EINVAL;
+ goto do_rotate_unlock_mutex;
+ }
+
+ rc = get_img(info.src.memory_id, (unsigned long *)&in_paddr,
+ (unsigned long *)&src_len, &src_file);
+ if (rc) {
+ pr_err("%s: in get_img() failed id=0x%08x\n",
+ DRIVER_NAME, info.src.memory_id);
+ goto do_rotate_unlock_mutex;
+ }
+
+ rc = get_img(info.dst.memory_id, (unsigned long *)&out_paddr,
+ (unsigned long *)&dst_len, &dst_file);
+ if (rc) {
+ pr_err("%s: out get_img() failed id=0x%08x\n",
+ DRIVER_NAME, info.dst.memory_id);
+ goto do_rotate_unlock_mutex;
+ }
+
format = msm_rotator_dev->img_info[s]->src.format;
if (((info.version_key & VERSION_KEY_MASK) == 0xA5B4C300) &&
- ((info.version_key & ~VERSION_KEY_MASK) > 0) &&
- (format == MDP_Y_CBCR_H2V2 ||
- format == MDP_Y_CRCB_H2V2 ||
- format == MDP_Y_CRCB_H2V2_TILE ||
- format == MDP_Y_CBCR_H2V2_TILE ||
- format == MDP_Y_CBCR_H2V1 ||
- format == MDP_Y_CRCB_H2V1)) {
+ ((info.version_key & ~VERSION_KEY_MASK) > 0) &&
+ (src_planes.num_planes == 2)) {
+ if (checkoffset(info.src.offset,
+ src_planes.plane_size[0],
+ src_len)) {
+ pr_err("%s: invalid src buffer (len=%lu offset=%x)\n",
+ __func__, src_len, info.src.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+ if (checkoffset(info.dst.offset,
+ dst_planes.plane_size[0],
+ dst_len)) {
+ pr_err("%s: invalid dst buffer (len=%lu offset=%x)\n",
+ __func__, dst_len, info.dst.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+
rc = get_img(info.src_chroma.memory_id,
(unsigned long *)&in_chroma_paddr,
- (unsigned long *)&len, &src_chroma_file);
+ (unsigned long *)&src_len, &src_chroma_file);
if (rc) {
- printk(KERN_ERR "%s: in chroma get_img() failed id=0x%08x\n",
+ pr_err("%s: in chroma get_img() failed id=0x%08x\n",
DRIVER_NAME, info.src_chroma.memory_id);
goto do_rotate_unlock_mutex;
}
- in_chroma_paddr += info.src_chroma.offset;
rc = get_img(info.dst_chroma.memory_id,
(unsigned long *)&out_chroma_paddr,
- (unsigned long *)&len, &dst_chroma_file);
+ (unsigned long *)&dst_len, &dst_chroma_file);
if (rc) {
- printk(KERN_ERR "%s: out chroma get_img() failed id=0x%08x\n",
+ pr_err("%s: out chroma get_img() failed id=0x%08x\n",
DRIVER_NAME, info.dst_chroma.memory_id);
- goto do_rotate_fail_dst_chr_img;
+ goto do_rotate_unlock_mutex;
}
+
+ if (checkoffset(info.src_chroma.offset,
+ src_planes.plane_size[1],
+ src_len)) {
+ pr_err("%s: invalid chr src buf len=%lu offset=%x\n",
+ __func__, src_len, info.src_chroma.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+
+ if (checkoffset(info.dst_chroma.offset,
+ src_planes.plane_size[1],
+ dst_len)) {
+ pr_err("%s: invalid chr dst buf len=%lu offset=%x\n",
+ __func__, dst_len, info.dst_chroma.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+
+ in_chroma_paddr += info.src_chroma.offset;
out_chroma_paddr += info.dst_chroma.offset;
+ } else {
+ if (checkoffset(info.src.offset,
+ src_planes.total_size,
+ src_len)) {
+ pr_err("%s: invalid src buffer (len=%lu offset=%x)\n",
+ __func__, src_len, info.src.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
+ if (checkoffset(info.dst.offset,
+ dst_planes.total_size,
+ dst_len)) {
+ pr_err("%s: invalid dst buffer (len=%lu offset=%x)\n",
+ __func__, dst_len, info.dst.offset);
+ rc = -ERANGE;
+ goto do_rotate_unlock_mutex;
+ }
}
+ in_paddr += info.src.offset;
+ out_paddr += info.dst.offset;
+
+ if (!in_chroma_paddr && src_planes.num_planes >= 2)
+ in_chroma_paddr = in_paddr + src_planes.plane_size[0];
+ if (!out_chroma_paddr && dst_planes.num_planes >= 2)
+ out_chroma_paddr = out_paddr + dst_planes.plane_size[0];
+ if (src_planes.num_planes >= 3)
+ in_chroma2_paddr = in_chroma_paddr + src_planes.plane_size[1];
+
cancel_delayed_work(&msm_rotator_dev->rot_clk_work);
if (msm_rotator_dev->rot_clk_state != CLK_EN) {
enable_rot_clks();
@@ -931,43 +962,19 @@
break;
case MDP_Y_CBCR_H2V2:
case MDP_Y_CRCB_H2V2:
- rc = msm_rotator_ycxcx_h2v2(msm_rotator_dev->img_info[s],
- in_paddr, out_paddr, use_imem,
- msm_rotator_dev->last_session_idx
- != s,
- in_chroma_paddr,
- out_chroma_paddr,
- IS_NONPLANAR);
- break;
case MDP_Y_CB_CR_H2V2:
case MDP_Y_CR_CB_H2V2:
- rc = msm_rotator_ycxcx_h2v2(msm_rotator_dev->img_info[s],
- in_paddr, out_paddr, use_imem,
- msm_rotator_dev->last_session_idx
- != s,
- in_chroma_paddr,
- out_chroma_paddr,
- IS_PLANAR);
- break;
case MDP_Y_CR_CB_GH2V2:
- rc = msm_rotator_ycxcx_h2v2(msm_rotator_dev->img_info[s],
- in_paddr, out_paddr, use_imem,
- msm_rotator_dev->last_session_idx
- != s,
- in_chroma_paddr,
- out_chroma_paddr,
- IS_PLANAR | IS_PLANAR_16ALIGNED);
- break;
case MDP_Y_CRCB_H2V2_TILE:
case MDP_Y_CBCR_H2V2_TILE:
- rc = msm_rotator_ycxcx_h2v2_tile(msm_rotator_dev->img_info[s],
- in_paddr, out_paddr, use_imem,
- msm_rotator_dev->last_session_idx
- != s,
- in_chroma_paddr,
- out_chroma_paddr);
- break;
-
+ rc = msm_rotator_ycxcx_h2v2(msm_rotator_dev->img_info[s],
+ in_paddr, out_paddr, use_imem,
+ msm_rotator_dev->last_session_idx
+ != s,
+ in_chroma_paddr,
+ out_chroma_paddr,
+ in_chroma2_paddr);
+ break;
case MDP_Y_CBCR_H2V1:
case MDP_Y_CRCB_H2V1:
rc = msm_rotator_ycxcx_h2v1(msm_rotator_dev->img_info[s],
@@ -1011,18 +1018,16 @@
msm_rotator_imem_free(ROTATOR_REQUEST);
#endif
schedule_delayed_work(&msm_rotator_dev->rot_clk_work, HZ);
+do_rotate_unlock_mutex:
if (dst_chroma_file)
put_pmem_file(dst_chroma_file);
-do_rotate_fail_dst_chr_img:
if (src_chroma_file)
put_pmem_file(src_chroma_file);
-do_rotate_unlock_mutex:
- mutex_unlock(&msm_rotator_dev->rotator_lock);
if (dst_file)
put_pmem_file(dst_file);
-do_rotate_fail_dst_img:
if (src_file)
put_pmem_file(src_file);
+ mutex_unlock(&msm_rotator_dev->rotator_lock);
dev_dbg(msm_rotator_dev->device, "%s() returning rc = %d\n",
__func__, rc);
return rc;
@@ -1034,25 +1039,28 @@
int rc = 0;
int s;
int first_free_index = INVALID_SESSION;
+ unsigned int dst_w, dst_h;
if (copy_from_user(&info, (void __user *)arg, sizeof(info)))
return -EFAULT;
+ if (info.rotations & MDP_ROT_90) {
+ dst_w = info.src_rect.h;
+ dst_h = info.src_rect.w;
+ } else {
+ dst_w = info.src_rect.w;
+ dst_h = info.src_rect.h;
+ }
+
if ((info.rotations > MSM_ROTATOR_MAX_ROT) ||
(info.src.height > MSM_ROTATOR_MAX_H) ||
(info.src.width > MSM_ROTATOR_MAX_W) ||
(info.dst.height > MSM_ROTATOR_MAX_H) ||
(info.dst.width > MSM_ROTATOR_MAX_W) ||
- ((info.src_rect.x + info.src_rect.w) > info.src.width) ||
- ((info.src_rect.y + info.src_rect.h) > info.src.height) ||
- ((info.rotations & MDP_ROT_90) &&
- ((info.dst_x + info.src_rect.h) > info.dst.width)) ||
- ((info.rotations & MDP_ROT_90) &&
- ((info.dst_y + info.src_rect.w) > info.dst.height)) ||
- (!(info.rotations & MDP_ROT_90) &&
- ((info.dst_x + info.src_rect.w) > info.dst.width)) ||
- (!(info.rotations & MDP_ROT_90) &&
- ((info.dst_y + info.src_rect.h) > info.dst.height)))
+ checkoffset(info.src_rect.x, info.src_rect.w, info.src.width) ||
+ checkoffset(info.src_rect.y, info.src_rect.h, info.src.height) ||
+ checkoffset(info.dst_x, dst_w, info.dst.width) ||
+ checkoffset(info.dst_y, dst_h, info.dst.height))
return -EINVAL;
switch (info.src.format) {
diff --git a/drivers/gpu/msm/kgsl.c b/drivers/gpu/msm/kgsl.c
index 165bbbf..7e61a32 100644
--- a/drivers/gpu/msm/kgsl.c
+++ b/drivers/gpu/msm/kgsl.c
@@ -1226,7 +1226,11 @@
entry->memdesc.size = size;
entry->memdesc.physaddr = phys + (offset & PAGE_MASK);
entry->memdesc.hostptr = (void *) (virt + (offset & PAGE_MASK));
- entry->memdesc.ops = &kgsl_contiguous_ops;
+
+ ret = memdesc_sg_phys(&entry->memdesc,
+ phys + (offset & PAGE_MASK), size);
+ if (ret)
+ goto err;
return 0;
err:
@@ -1236,6 +1240,60 @@
return ret;
}
+static int memdesc_sg_virt(struct kgsl_memdesc *memdesc,
+ void *addr, int size)
+{
+ int i;
+ int sglen = PAGE_ALIGN(size) / PAGE_SIZE;
+ unsigned long paddr = (unsigned long) addr;
+
+ memdesc->sg = kmalloc(sglen * sizeof(struct scatterlist),
+ GFP_KERNEL);
+ if (memdesc->sg == NULL)
+ return -ENOMEM;
+
+ memdesc->sglen = sglen;
+ sg_init_table(memdesc->sg, sglen);
+
+ spin_lock(¤t->mm->page_table_lock);
+
+ for (i = 0; i < sglen; i++, paddr += PAGE_SIZE) {
+ struct page *page;
+ pmd_t *ppmd;
+ pte_t *ppte;
+ pgd_t *ppgd = pgd_offset(current->mm, paddr);
+
+ if (pgd_none(*ppgd) || pgd_bad(*ppgd))
+ goto err;
+
+ ppmd = pmd_offset(ppgd, paddr);
+ if (pmd_none(*ppmd) || pmd_bad(*ppmd))
+ goto err;
+
+ ppte = pte_offset_map(ppmd, paddr);
+ if (ppte == NULL)
+ goto err;
+
+ page = pfn_to_page(pte_pfn(*ppte));
+ if (!page)
+ goto err;
+
+ sg_set_page(&memdesc->sg[i], page, PAGE_SIZE, 0);
+ pte_unmap(ppte);
+ }
+
+ spin_unlock(¤t->mm->page_table_lock);
+
+ return 0;
+
+err:
+ spin_unlock(¤t->mm->page_table_lock);
+ kfree(memdesc->sg);
+ memdesc->sg = NULL;
+
+ return -EINVAL;
+}
+
static int kgsl_setup_hostptr(struct kgsl_mem_entry *entry,
struct kgsl_pagetable *pagetable,
void *hostptr, unsigned int offset,
@@ -1285,9 +1343,9 @@
entry->memdesc.pagetable = pagetable;
entry->memdesc.size = size;
entry->memdesc.hostptr = hostptr + (offset & PAGE_MASK);
- entry->memdesc.ops = &kgsl_userptr_ops;
- return 0;
+ return memdesc_sg_virt(&entry->memdesc,
+ hostptr + (offset & PAGE_MASK), size);
}
#ifdef CONFIG_ASHMEM
@@ -1335,11 +1393,13 @@
}
entry->file_ptr = filep;
-
entry->memdesc.pagetable = pagetable;
entry->memdesc.size = ALIGN(size, PAGE_SIZE);
entry->memdesc.hostptr = hostptr;
- entry->memdesc.ops = &kgsl_userptr_ops;
+
+ ret = memdesc_sg_virt(&entry->memdesc, hostptr, size);
+ if (ret)
+ goto err;
return 0;
@@ -1725,7 +1785,7 @@
{
struct kgsl_mem_entry *entry = vma->vm_private_data;
- if (!entry->memdesc.ops->vmfault)
+ if (!entry->memdesc.ops || !entry->memdesc.ops->vmfault)
return VM_FAULT_SIGBUS;
return entry->memdesc.ops->vmfault(&entry->memdesc, vma, vmf);
@@ -1772,7 +1832,9 @@
if (entry == NULL)
return -EINVAL;
- if (!entry->memdesc.ops->vmflags || !entry->memdesc.ops->vmfault)
+ if (!entry->memdesc.ops ||
+ !entry->memdesc.ops->vmflags ||
+ !entry->memdesc.ops->vmfault)
return -EINVAL;
vma->vm_flags |= entry->memdesc.ops->vmflags(&entry->memdesc);
diff --git a/drivers/gpu/msm/kgsl.h b/drivers/gpu/msm/kgsl.h
index 8db2cb4..1480df4 100644
--- a/drivers/gpu/msm/kgsl.h
+++ b/drivers/gpu/msm/kgsl.h
@@ -115,6 +115,8 @@
unsigned int physaddr;
unsigned int size;
unsigned int priv;
+ struct scatterlist *sg;
+ unsigned int sglen;
struct kgsl_memdesc_ops *ops;
};
diff --git a/drivers/gpu/msm/kgsl_drm.c b/drivers/gpu/msm/kgsl_drm.c
index 202783b..cdf9dc4 100644
--- a/drivers/gpu/msm/kgsl_drm.c
+++ b/drivers/gpu/msm/kgsl_drm.c
@@ -293,7 +293,6 @@
}
priv->memdesc.size = obj->size * priv->bufcount;
- priv->memdesc.ops = &kgsl_contiguous_ops;
} else if (TYPE_IS_MEM(priv->type)) {
priv->memdesc.hostptr =
diff --git a/drivers/gpu/msm/kgsl_gpummu.c b/drivers/gpu/msm/kgsl_gpummu.c
index 383b910..fe5677e 100644
--- a/drivers/gpu/msm/kgsl_gpummu.c
+++ b/drivers/gpu/msm/kgsl_gpummu.c
@@ -659,68 +659,45 @@
return 0;
}
+#define SUPERPTE_IS_DIRTY(_p) \
+(((_p) & (GSL_PT_SUPER_PTE - 1)) == 0 && \
+GSL_TLBFLUSH_FILTER_ISDIRTY((_p) / GSL_PT_SUPER_PTE))
+
static int
kgsl_gpummu_map(void *mmu_specific_pt,
struct kgsl_memdesc *memdesc,
unsigned int protflags)
{
- int numpages;
- unsigned int pte, ptefirst, ptelast, physaddr;
- int flushtlb;
- unsigned int offset = 0;
+ unsigned int pte;
struct kgsl_gpummu_pt *gpummu_pt = mmu_specific_pt;
+ struct scatterlist *s;
+ int flushtlb = 0;
+ int i;
- if (!protflags ||
- protflags & ~(GSL_PT_PAGE_RV | GSL_PT_PAGE_WV)) {
- KGSL_CORE_ERR("Invalid protflags for "
- "kgsl_mmu_specific_map: %x", protflags);
- return -EINVAL;
- }
+ pte = kgsl_pt_entry_get(KGSL_PAGETABLE_BASE, memdesc->gpuaddr);
- numpages = (memdesc->size >> PAGE_SHIFT);
-
- ptefirst = kgsl_pt_entry_get(KGSL_PAGETABLE_BASE, memdesc->gpuaddr);
- ptelast = ptefirst + numpages;
-
- pte = ptefirst;
- flushtlb = 0;
-
- /* tlb needs to be flushed when the first and last pte are not at
- * superpte boundaries */
- if ((ptefirst & (GSL_PT_SUPER_PTE - 1)) != 0 ||
- ((ptelast + 1) & (GSL_PT_SUPER_PTE-1)) != 0)
+ /* Flush the TLB if the first PTE isn't at the superpte boundary */
+ if (pte & (GSL_PT_SUPER_PTE - 1))
flushtlb = 1;
- for (pte = ptefirst; pte < ptelast; pte++, offset += PAGE_SIZE) {
-#ifdef VERBOSE_DEBUG
- /* check if PTE exists */
- uint32_t val = kgsl_pt_map_get(gpummu_pt, pte);
- if (val != 0 && val != GSL_PT_PAGE_DIRTY) {
- KGSL_CORE_ERR("pt entry %x is already set with "
- "value %x for pagetable %p\n", pte, val, gpummu_pt);
- return -EINVAL;
- }
-#endif
- if ((pte & (GSL_PT_SUPER_PTE-1)) == 0)
- if (GSL_TLBFLUSH_FILTER_ISDIRTY(pte / GSL_PT_SUPER_PTE))
- flushtlb = 1;
- /* mark pte as in use */
+ for_each_sg(memdesc->sg, s, memdesc->sglen, i) {
+ unsigned int paddr = sg_phys(s);
+ unsigned int j;
- physaddr = memdesc->ops->physaddr(memdesc, offset);
- if (!physaddr) {
- KGSL_CORE_ERR("Failed to convert %x address to "
- "physical", (unsigned int)memdesc->hostptr + offset);
- kgsl_gpummu_unmap(mmu_specific_pt, memdesc);
- return -EFAULT;
+ /* Each sg entry might be multiple pages long */
+ for (j = paddr; j < paddr + s->length; pte++, j += PAGE_SIZE) {
+ if (SUPERPTE_IS_DIRTY(pte))
+ flushtlb = 1;
+ kgsl_pt_map_set(gpummu_pt, pte, j | protflags);
}
- kgsl_pt_map_set(gpummu_pt, pte, physaddr | protflags);
}
- /* Post all writes to the pagetable */
+ /* Flush the TLB if the last PTE isn't at the superpte boundary */
+ if ((pte + 1) & (GSL_PT_SUPER_PTE - 1))
+ flushtlb = 1;
+
wmb();
- /* Invalidate tlb only if current page table used by GPU is the
- * pagetable that we used to allocate */
if (flushtlb) {
/*set all devices as needing flushing*/
gpummu_pt->tlb_flags = UINT_MAX;
diff --git a/drivers/gpu/msm/kgsl_iommu.c b/drivers/gpu/msm/kgsl_iommu.c
index f9b9b4a..f43b96e 100644
--- a/drivers/gpu/msm/kgsl_iommu.c
+++ b/drivers/gpu/msm/kgsl_iommu.c
@@ -257,37 +257,33 @@
struct kgsl_memdesc *memdesc,
unsigned int protflags)
{
- int ret = 0;
- unsigned int physaddr;
+ int ret, i;
+ struct scatterlist *s;
unsigned int iommu_virt_addr;
- unsigned int offset = 0;
int map_order;
- struct iommu_domain *domain = (struct iommu_domain *)
- mmu_specific_pt;
+ struct iommu_domain *domain = mmu_specific_pt;
BUG_ON(NULL == domain);
map_order = get_order(SZ_4K);
- for (iommu_virt_addr = memdesc->gpuaddr;
- iommu_virt_addr < (memdesc->gpuaddr + memdesc->size);
- iommu_virt_addr += SZ_4K, offset += PAGE_SIZE) {
- physaddr = memdesc->ops->physaddr(memdesc, offset);
- if (!physaddr) {
- KGSL_CORE_ERR("Failed to convert %x address to "
- "physical\n", (unsigned int)memdesc->hostptr + offset);
- kgsl_iommu_unmap(mmu_specific_pt, memdesc);
- return -EFAULT;
- }
- ret = iommu_map(domain, iommu_virt_addr, physaddr,
+ iommu_virt_addr = memdesc->gpuaddr;
+
+ for_each_sg(memdesc->sg, s, memdesc->sglen, i) {
+ unsigned int paddr = sg_phys(s), j;
+ for (j = paddr; j < paddr + s->length; j += PAGE_SIZE) {
+ ret = iommu_map(domain, iommu_virt_addr, j,
map_order, MSM_IOMMU_ATTR_NONCACHED);
- if (ret) {
- KGSL_CORE_ERR("iommu_map(%p, %x, %x, %d, %d) "
- "failed with err: %d\n", domain,
- iommu_virt_addr, physaddr, map_order,
- MSM_IOMMU_ATTR_NONCACHED, ret);
- kgsl_iommu_unmap(mmu_specific_pt, memdesc);
- return ret;
+ if (ret) {
+ KGSL_CORE_ERR("iommu_map(%p, %x, %x, %d, %d) "
+ "failed with err: %d\n", domain,
+ iommu_virt_addr, j, map_order,
+ MSM_IOMMU_ATTR_NONCACHED, ret);
+ kgsl_iommu_unmap(mmu_specific_pt, memdesc);
+ return ret;
+ }
+
+ iommu_virt_addr += SZ_4K;
}
}
diff --git a/drivers/gpu/msm/kgsl_mmu.c b/drivers/gpu/msm/kgsl_mmu.c
index 7eec9e5..1879666 100644
--- a/drivers/gpu/msm/kgsl_mmu.c
+++ b/drivers/gpu/msm/kgsl_mmu.c
@@ -525,37 +525,6 @@
*/
}
-unsigned int kgsl_virtaddr_to_physaddr(void *virtaddr)
-{
- unsigned int physaddr = 0;
- pgd_t *pgd_ptr = NULL;
- pmd_t *pmd_ptr = NULL;
- pte_t *pte_ptr = NULL, pte;
-
- pgd_ptr = pgd_offset(current->mm, (unsigned long) virtaddr);
- if (pgd_none(*pgd) || pgd_bad(*pgd)) {
- KGSL_CORE_ERR("Invalid pgd entry\n");
- return 0;
- }
-
- pmd_ptr = pmd_offset(pgd_ptr, (unsigned long) virtaddr);
- if (pmd_none(*pmd_ptr) || pmd_bad(*pmd_ptr)) {
- KGSL_CORE_ERR("Invalid pmd entry\n");
- return 0;
- }
-
- pte_ptr = pte_offset_map(pmd_ptr, (unsigned long) virtaddr);
- if (!pte_ptr) {
- KGSL_CORE_ERR("pt_offset_map failed\n");
- return 0;
- }
- pte = *pte_ptr;
- physaddr = pte_pfn(pte);
- pte_unmap(pte_ptr);
- physaddr <<= PAGE_SHIFT;
- return physaddr;
-}
-
int
kgsl_mmu_map(struct kgsl_pagetable *pagetable,
struct kgsl_memdesc *memdesc,
diff --git a/drivers/gpu/msm/kgsl_sharedmem.c b/drivers/gpu/msm/kgsl_sharedmem.c
index 09070e4..8f75daa 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.c
+++ b/drivers/gpu/msm/kgsl_sharedmem.c
@@ -207,28 +207,21 @@
break;
}
}
-#endif
-static unsigned long kgsl_vmalloc_physaddr(struct kgsl_memdesc *memdesc,
- unsigned int offset)
+static void outer_cache_range_op_sg(struct scatterlist *sg, int sglen, int op)
{
- unsigned int addr;
+ struct scatterlist *s;
+ int i;
- if (offset > memdesc->size)
- return 0;
-
- addr = vmalloc_to_pfn(memdesc->hostptr + offset);
- return addr << PAGE_SHIFT;
+ for_each_sg(sg, s, sglen, i) {
+ unsigned int paddr = sg_phys(s);
+ _outer_cache_range_op(op, paddr, s->length);
+ }
}
-#ifdef CONFIG_OUTER_CACHE
-static void kgsl_vmalloc_outer_cache(struct kgsl_memdesc *memdesc, int op)
+#else
+static void outer_cache_range_op_sg(struct scatterlist *sg, int sglen, int op)
{
- void *vaddr = memdesc->hostptr;
- for (; vaddr < (memdesc->hostptr + memdesc->size); vaddr += PAGE_SIZE) {
- unsigned long paddr = page_to_phys(vmalloc_to_page(vaddr));
- _outer_cache_range_op(op, paddr, PAGE_SIZE);
- }
}
#endif
@@ -306,88 +299,24 @@
memdesc->hostptr, memdesc->physaddr);
}
-static unsigned long kgsl_contiguous_physaddr(struct kgsl_memdesc *memdesc,
- unsigned int offset)
-{
- if (offset > memdesc->size)
- return 0;
-
- return memdesc->physaddr + offset;
-}
-
-#ifdef CONFIG_OUTER_CACHE
-static void kgsl_contiguous_outer_cache(struct kgsl_memdesc *memdesc, int op)
-{
- _outer_cache_range_op(op, memdesc->physaddr, memdesc->size);
-}
-#endif
-
-#ifdef CONFIG_OUTER_CACHE
-static void kgsl_userptr_outer_cache(struct kgsl_memdesc *memdesc, int op)
-{
- void *vaddr = memdesc->hostptr;
- for (; vaddr < (memdesc->hostptr + memdesc->size); vaddr += PAGE_SIZE) {
- unsigned long paddr = kgsl_virtaddr_to_physaddr(vaddr);
- if (paddr)
- _outer_cache_range_op(op, paddr, PAGE_SIZE);
- }
-}
-#endif
-
-static unsigned long kgsl_userptr_physaddr(struct kgsl_memdesc *memdesc,
- unsigned int offset)
-{
- return kgsl_virtaddr_to_physaddr(memdesc->hostptr + offset);
-}
-
/* Global - also used by kgsl_drm.c */
struct kgsl_memdesc_ops kgsl_vmalloc_ops = {
- .physaddr = kgsl_vmalloc_physaddr,
.free = kgsl_vmalloc_free,
.vmflags = kgsl_vmalloc_vmflags,
.vmfault = kgsl_vmalloc_vmfault,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_vmalloc_outer_cache,
-#endif
};
EXPORT_SYMBOL(kgsl_vmalloc_ops);
static struct kgsl_memdesc_ops kgsl_ebimem_ops = {
- .physaddr = kgsl_contiguous_physaddr,
.free = kgsl_ebimem_free,
.vmflags = kgsl_contiguous_vmflags,
.vmfault = kgsl_contiguous_vmfault,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_contiguous_outer_cache,
-#endif
};
static struct kgsl_memdesc_ops kgsl_coherent_ops = {
- .physaddr = kgsl_contiguous_physaddr,
.free = kgsl_coherent_free,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_contiguous_outer_cache,
-#endif
};
-/* Global - also used by kgsl.c and kgsl_drm.c */
-struct kgsl_memdesc_ops kgsl_contiguous_ops = {
- .physaddr = kgsl_contiguous_physaddr,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_contiguous_outer_cache
-#endif
-};
-EXPORT_SYMBOL(kgsl_contiguous_ops);
-
-/* Global - also used by kgsl.c */
-struct kgsl_memdesc_ops kgsl_userptr_ops = {
- .physaddr = kgsl_userptr_physaddr,
-#ifdef CONFIG_OUTER_CACHE
- .outer_cache = kgsl_userptr_outer_cache,
-#endif
-};
-EXPORT_SYMBOL(kgsl_userptr_ops);
-
void kgsl_cache_range_op(struct kgsl_memdesc *memdesc, int op)
{
void *addr = memdesc->hostptr;
@@ -405,8 +334,7 @@
break;
}
- if (memdesc->ops->outer_cache)
- memdesc->ops->outer_cache(memdesc, op);
+ outer_cache_range_op_sg(memdesc->sg, memdesc->sglen, op);
}
EXPORT_SYMBOL(kgsl_cache_range_op);
@@ -415,7 +343,9 @@
struct kgsl_pagetable *pagetable,
void *ptr, size_t size, unsigned int protflags)
{
- int result;
+ int order, ret = 0;
+ int sglen = PAGE_ALIGN(size) / PAGE_SIZE;
+ int i;
memdesc->size = size;
memdesc->pagetable = pagetable;
@@ -423,25 +353,44 @@
memdesc->ops = &kgsl_vmalloc_ops;
memdesc->hostptr = (void *) ptr;
- kgsl_cache_range_op(memdesc, KGSL_CACHE_OP_INV);
-
- result = kgsl_mmu_map(pagetable, memdesc, protflags);
-
- if (result) {
- kgsl_sharedmem_free(memdesc);
- } else {
- int order;
-
- KGSL_STATS_ADD(size, kgsl_driver.stats.vmalloc,
- kgsl_driver.stats.vmalloc_max);
-
- order = get_order(size);
-
- if (order < 16)
- kgsl_driver.stats.histogram[order]++;
+ memdesc->sg = kmalloc(sglen * sizeof(struct scatterlist), GFP_KERNEL);
+ if (memdesc->sg == NULL) {
+ ret = -ENOMEM;
+ goto done;
}
- return result;
+ memdesc->sglen = sglen;
+ sg_init_table(memdesc->sg, sglen);
+
+ for (i = 0; i < memdesc->sglen; i++, ptr += PAGE_SIZE) {
+ struct page *page = vmalloc_to_page(ptr);
+ if (!page) {
+ ret = -EINVAL;
+ goto done;
+ }
+ sg_set_page(&memdesc->sg[i], page, PAGE_SIZE, 0);
+ }
+
+ kgsl_cache_range_op(memdesc, KGSL_CACHE_OP_INV);
+
+ ret = kgsl_mmu_map(pagetable, memdesc, protflags);
+
+ if (ret)
+ goto done;
+
+ KGSL_STATS_ADD(size, kgsl_driver.stats.vmalloc,
+ kgsl_driver.stats.vmalloc_max);
+
+ order = get_order(size);
+
+ if (order < 16)
+ kgsl_driver.stats.histogram[order]++;
+
+done:
+ if (ret)
+ kgsl_sharedmem_free(memdesc);
+
+ return ret;
}
int
@@ -494,24 +443,35 @@
int
kgsl_sharedmem_alloc_coherent(struct kgsl_memdesc *memdesc, size_t size)
{
+ int result = 0;
+
size = ALIGN(size, PAGE_SIZE);
+ memdesc->size = size;
+ memdesc->ops = &kgsl_coherent_ops;
+
memdesc->hostptr = dma_alloc_coherent(NULL, size, &memdesc->physaddr,
GFP_KERNEL);
if (memdesc->hostptr == NULL) {
KGSL_CORE_ERR("dma_alloc_coherent(%d) failed\n", size);
- return -ENOMEM;
+ result = -ENOMEM;
+ goto err;
}
- memdesc->size = size;
- memdesc->ops = &kgsl_coherent_ops;
+ result = memdesc_sg_phys(memdesc, memdesc->physaddr, size);
+ if (result)
+ goto err;
/* Record statistics */
KGSL_STATS_ADD(size, kgsl_driver.stats.coherent,
kgsl_driver.stats.coherent_max);
- return 0;
+err:
+ if (result)
+ kgsl_sharedmem_free(memdesc);
+
+ return result;
}
EXPORT_SYMBOL(kgsl_sharedmem_alloc_coherent);
@@ -523,9 +483,11 @@
if (memdesc->gpuaddr)
kgsl_mmu_unmap(memdesc->pagetable, memdesc);
- if (memdesc->ops->free)
+ if (memdesc->ops && memdesc->ops->free)
memdesc->ops->free(memdesc);
+ kfree(memdesc->sg);
+
memset(memdesc, 0, sizeof(*memdesc));
}
EXPORT_SYMBOL(kgsl_sharedmem_free);
@@ -534,8 +496,11 @@
_kgsl_sharedmem_ebimem(struct kgsl_memdesc *memdesc,
struct kgsl_pagetable *pagetable, size_t size)
{
- int result;
+ int result = 0;
+ memdesc->size = size;
+ memdesc->pagetable = pagetable;
+ memdesc->ops = &kgsl_ebimem_ops;
memdesc->physaddr = allocate_contiguous_ebi_nomap(size, SZ_8K);
if (memdesc->physaddr == 0) {
@@ -544,19 +509,24 @@
return -ENOMEM;
}
- memdesc->size = size;
- memdesc->pagetable = pagetable;
- memdesc->ops = &kgsl_ebimem_ops;
+ result = memdesc_sg_phys(memdesc, memdesc->physaddr, size);
+
+ if (result)
+ goto err;
result = kgsl_mmu_map(pagetable, memdesc,
GSL_PT_PAGE_RV | GSL_PT_PAGE_WV);
if (result)
- kgsl_sharedmem_free(memdesc);
+ goto err;
KGSL_STATS_ADD(size, kgsl_driver.stats.coherent,
kgsl_driver.stats.coherent_max);
+err:
+ if (result)
+ kgsl_sharedmem_free(memdesc);
+
return result;
}
diff --git a/drivers/gpu/msm/kgsl_sharedmem.h b/drivers/gpu/msm/kgsl_sharedmem.h
index 9e57e78..a9abcf9 100644
--- a/drivers/gpu/msm/kgsl_sharedmem.h
+++ b/drivers/gpu/msm/kgsl_sharedmem.h
@@ -13,6 +13,7 @@
#ifndef __KGSL_SHAREDMEM_H
#define __KGSL_SHAREDMEM_H
+#include <linux/slab.h>
#include <linux/dma-mapping.h>
struct kgsl_device;
@@ -26,8 +27,6 @@
#define KGSL_MEMFLAGS_CACHED 0x00000001
struct kgsl_memdesc_ops {
- unsigned long (*physaddr)(struct kgsl_memdesc *, unsigned int);
- void (*outer_cache)(struct kgsl_memdesc *, int);
int (*vmflags)(struct kgsl_memdesc *);
int (*vmfault)(struct kgsl_memdesc *, struct vm_area_struct *,
struct vm_fault *);
@@ -35,8 +34,6 @@
};
extern struct kgsl_memdesc_ops kgsl_vmalloc_ops;
-extern struct kgsl_memdesc_ops kgsl_contiguous_ops;
-extern struct kgsl_memdesc_ops kgsl_userptr_ops;
int kgsl_sharedmem_vmalloc(struct kgsl_memdesc *memdesc,
struct kgsl_pagetable *pagetable, size_t size);
@@ -78,6 +75,22 @@
void kgsl_sharedmem_uninit_sysfs(void);
static inline int
+memdesc_sg_phys(struct kgsl_memdesc *memdesc,
+ unsigned int physaddr, unsigned int size)
+{
+ struct page *page = phys_to_page(physaddr);
+
+ memdesc->sg = kmalloc(sizeof(struct scatterlist) * 1, GFP_KERNEL);
+ if (memdesc->sg == NULL)
+ return -ENOMEM;
+
+ memdesc->sglen = 1;
+ sg_init_table(memdesc->sg, 1);
+ sg_set_page(&memdesc->sg[0], page, size, 0);
+ return 0;
+}
+
+static inline int
kgsl_allocate(struct kgsl_memdesc *memdesc,
struct kgsl_pagetable *pagetable, size_t size)
{
diff --git a/drivers/input/keyboard/pmic8xxx-keypad.c b/drivers/input/keyboard/pmic8xxx-keypad.c
index f0629ce..0866332 100644
--- a/drivers/input/keyboard/pmic8xxx-keypad.c
+++ b/drivers/input/keyboard/pmic8xxx-keypad.c
@@ -710,9 +710,9 @@
return 0;
err_pmic_reg_read:
- free_irq(kp->key_stuck_irq, NULL);
+ free_irq(kp->key_stuck_irq, kp);
err_req_stuck_irq:
- free_irq(kp->key_sense_irq, NULL);
+ free_irq(kp->key_sense_irq, kp);
err_gpio_config:
err_get_irq:
input_free_device(kp->input);
@@ -727,8 +727,8 @@
struct pmic8xxx_kp *kp = platform_get_drvdata(pdev);
device_init_wakeup(&pdev->dev, 0);
- free_irq(kp->key_stuck_irq, NULL);
- free_irq(kp->key_sense_irq, NULL);
+ free_irq(kp->key_stuck_irq, kp);
+ free_irq(kp->key_sense_irq, kp);
input_unregister_device(kp->input);
kfree(kp);
diff --git a/drivers/input/touchscreen/atmel_mxt_ts.c b/drivers/input/touchscreen/atmel_mxt_ts.c
index c9a5ba2..4d97331 100644
--- a/drivers/input/touchscreen/atmel_mxt_ts.c
+++ b/drivers/input/touchscreen/atmel_mxt_ts.c
@@ -3,6 +3,7 @@
*
* Copyright (C) 2010 Samsung Electronics Co.Ltd
* Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -180,10 +181,12 @@
#define MXT_VTG_MIN_UV 2700000
#define MXT_VTG_MAX_UV 3300000
#define MXT_ACTIVE_LOAD_UA 15000
+#define MXT_LPM_LOAD_UA 10
#define MXT_I2C_VTG_MIN_UV 1800000
#define MXT_I2C_VTG_MAX_UV 1800000
#define MXT_I2C_LOAD_UA 10000
+#define MXT_I2C_LPM_LOAD_UA 10
/* Define for MXT_GEN_COMMAND */
#define MXT_BOOT_VALUE 0xa5
@@ -196,6 +199,8 @@
#define MXT_FWRESET_TIME 175 /* msec */
+#define MXT_WAKE_TIME 25
+
/* Command to unlock bootloader */
#define MXT_UNLOCK_CMD_MSB 0xaa
#define MXT_UNLOCK_CMD_LSB 0xdc
@@ -229,7 +234,9 @@
#define MXT_MAX_FINGER 10
#define MXT_BUFF_SIZE 100
-#define T7_DATA_SIZE 3
+#define T7_DATA_SIZE 3
+#define MXT_MAX_RW_TRIES 3
+#define MXT_BLOCK_SIZE 256
struct mxt_info {
u8 family_id;
@@ -274,14 +281,14 @@
struct mxt_info info;
struct mxt_finger finger[MXT_MAX_FINGER];
unsigned int irq;
- unsigned int max_x;
- unsigned int max_y;
struct regulator *vcc;
struct regulator *vcc_i2c;
#if defined(CONFIG_HAS_EARLYSUSPEND)
struct early_suspend early_suspend;
#endif
+
u8 t7_data[T7_DATA_SIZE];
+ u16 t7_start_addr;
u8 t9_ctrl;
};
@@ -416,6 +423,7 @@
{
struct i2c_msg xfer[2];
u8 buf[2];
+ int i = 0;
buf[0] = reg & 0xff;
buf[1] = (reg >> 8) & 0xff;
@@ -432,12 +440,14 @@
xfer[1].len = len;
xfer[1].buf = val;
- if (i2c_transfer(client->adapter, xfer, 2) != 2) {
- dev_err(&client->dev, "%s: i2c transfer failed\n", __func__);
- return -EIO;
- }
+ do {
+ if (i2c_transfer(client->adapter, xfer, 2) == 2)
+ return 0;
+ msleep(MXT_WAKE_TIME);
+ } while (++i < MXT_MAX_RW_TRIES);
- return 0;
+ dev_err(&client->dev, "%s: i2c transfer failed\n", __func__);
+ return -EIO;
}
static int mxt_read_reg(struct i2c_client *client, u16 reg, u8 *val)
@@ -445,20 +455,33 @@
return __mxt_read_reg(client, reg, 1, val);
}
+static int __mxt_write_reg(struct i2c_client *client,
+ u16 addr, u16 length, u8 *value)
+{
+ u8 buf[MXT_BLOCK_SIZE + 2];
+ int i, tries = 0;
+
+ if (length > MXT_BLOCK_SIZE)
+ return -EINVAL;
+
+ buf[0] = addr & 0xff;
+ buf[1] = (addr >> 8) & 0xff;
+ for (i = 0; i < length; i++)
+ buf[i + 2] = *value++;
+
+ do {
+ if (i2c_master_send(client, buf, length + 2) == (length + 2))
+ return 0;
+ msleep(MXT_WAKE_TIME);
+ } while (++tries < MXT_MAX_RW_TRIES);
+
+ dev_err(&client->dev, "%s: i2c send failed\n", __func__);
+ return -EIO;
+}
+
static int mxt_write_reg(struct i2c_client *client, u16 reg, u8 val)
{
- u8 buf[3];
-
- buf[0] = reg & 0xff;
- buf[1] = (reg >> 8) & 0xff;
- buf[2] = val;
-
- if (i2c_master_send(client, buf, 3) != 3) {
- dev_err(&client->dev, "%s: i2c send failed\n", __func__);
- return -EIO;
- }
-
- return 0;
+ return __mxt_write_reg(client, reg, 1, &val);
}
static int mxt_read_object_table(struct i2c_client *client,
@@ -591,9 +614,9 @@
x = (message->message[1] << 4) | ((message->message[3] >> 4) & 0xf);
y = (message->message[2] << 4) | ((message->message[3] & 0xf));
- if (data->max_x < 1024)
+ if (data->pdata->x_size < 1024)
x = x >> 2;
- if (data->max_y < 1024)
+ if (data->pdata->y_size < 1024)
y = y >> 2;
area = message->message[4];
@@ -705,54 +728,6 @@
return 0;
}
-static void mxt_handle_pdata(struct mxt_data *data)
-{
- const struct mxt_platform_data *pdata = data->pdata;
- u8 voltage;
-
- /* Set touchscreen lines */
- mxt_write_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_XSIZE,
- pdata->x_line);
- mxt_write_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_YSIZE,
- pdata->y_line);
-
- /* Set touchscreen orient */
- mxt_write_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_ORIENT,
- pdata->orient);
-
- /* Set touchscreen burst length */
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_BLEN, pdata->blen);
-
- /* Set touchscreen threshold */
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_TCHTHR, pdata->threshold);
-
- /* Set touchscreen resolution */
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_XRANGE_LSB, (pdata->x_size - 1) & 0xff);
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_XRANGE_MSB, (pdata->x_size - 1) >> 8);
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_YRANGE_LSB, (pdata->y_size - 1) & 0xff);
- mxt_write_object(data, MXT_TOUCH_MULTI,
- MXT_TOUCH_YRANGE_MSB, (pdata->y_size - 1) >> 8);
-
- /* Set touchscreen voltage */
- if (pdata->voltage) {
- if (pdata->voltage < MXT_VOLTAGE_DEFAULT) {
- voltage = (MXT_VOLTAGE_DEFAULT - pdata->voltage) /
- MXT_VOLTAGE_STEP;
- voltage = 0xff - voltage + 1;
- } else
- voltage = (pdata->voltage - MXT_VOLTAGE_DEFAULT) /
- MXT_VOLTAGE_STEP;
-
- mxt_write_object(data, MXT_SPT_CTECONFIG,
- MXT_CTE_VOLTAGE, voltage);
- }
-}
-
static int mxt_get_info(struct mxt_data *data)
{
struct i2c_client *client = data->client;
@@ -840,10 +815,11 @@
{
struct i2c_client *client = data->client;
struct mxt_info *info = &data->info;
- int error, i;
+ int error;
int timeout_counter = 0;
u8 val;
u8 command_register;
+ struct mxt_object *t7_object;
error = mxt_get_info(data);
if (error)
@@ -868,14 +844,19 @@
return error;
/* Store T7 and T9 locally, used in suspend/resume operations */
- for (i = 0; i < T7_DATA_SIZE; i++) {
- error = mxt_read_object(data, MXT_GEN_POWER, i,
- &data->t7_data[i]);
- if (error < 0) {
- dev_err(&client->dev,
- "failed to save current power state\n");
- return error;
- }
+ t7_object = mxt_get_object(data, MXT_GEN_POWER);
+ if (!t7_object) {
+ dev_err(&client->dev, "Failed to get T7 object\n");
+ return -EINVAL;
+ }
+
+ data->t7_start_addr = t7_object->start_address;
+ error = __mxt_read_reg(client, data->t7_start_addr,
+ T7_DATA_SIZE, data->t7_data);
+ if (error < 0) {
+ dev_err(&client->dev,
+ "failed to save current power state\n");
+ return error;
}
error = mxt_read_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_CTRL,
&data->t9_ctrl);
@@ -884,8 +865,6 @@
return error;
}
- mxt_handle_pdata(data);
-
/* Backup to memory */
mxt_write_object(data, MXT_GEN_COMMAND,
MXT_COMMAND_BACKUPNV,
@@ -935,20 +914,6 @@
return 0;
}
-static void mxt_calc_resolution(struct mxt_data *data)
-{
- unsigned int max_x = data->pdata->x_size - 1;
- unsigned int max_y = data->pdata->y_size - 1;
-
- if (data->pdata->orient & MXT_XY_SWITCH) {
- data->max_x = max_y;
- data->max_y = max_x;
- } else {
- data->max_x = max_x;
- data->max_y = max_y;
- }
-}
-
static ssize_t mxt_object_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -1108,17 +1073,17 @@
static int mxt_start(struct mxt_data *data)
{
- int i, error;
+ int error;
+
/* restore the old power state values and reenable touch */
- for (i = 0; i < T7_DATA_SIZE; i++) {
- error = mxt_write_object(data, MXT_GEN_POWER, i,
- data->t7_data[i]);
- if (error < 0) {
- dev_err(&data->client->dev,
- "failed to restore old power state\n");
- return error;
- }
+ error = __mxt_write_reg(data->client, data->t7_start_addr,
+ T7_DATA_SIZE, data->t7_data);
+ if (error < 0) {
+ dev_err(&data->client->dev,
+ "failed to restore old power state\n");
+ return error;
}
+
error = mxt_write_object(data,
MXT_TOUCH_MULTI, MXT_TOUCH_CTRL, data->t9_ctrl);
if (error < 0) {
@@ -1131,22 +1096,21 @@
static int mxt_stop(struct mxt_data *data)
{
- int i, error;
- /* configure deep sleep mode and disable touch */
- for (i = 0; i < T7_DATA_SIZE; i++) {
- error = mxt_write_object(data, MXT_GEN_POWER, i, 0);
- if (error < 0) {
- dev_err(&data->client->dev,
- "failed to configure deep sleep mode\n");
- return error;
- }
+ int error;
+ u8 t7_data[T7_DATA_SIZE] = {0};
+
+ /* disable touch and configure deep sleep mode */
+ error = mxt_write_object(data, MXT_TOUCH_MULTI, MXT_TOUCH_CTRL, 0);
+ if (error < 0) {
+ dev_err(&data->client->dev, "failed to disable touch\n");
+ return error;
}
- error = mxt_write_object(data,
- MXT_TOUCH_MULTI, MXT_TOUCH_CTRL, 0);
+ error = __mxt_write_reg(data->client, data->t7_start_addr,
+ T7_DATA_SIZE, t7_data);
if (error < 0) {
dev_err(&data->client->dev,
- "failed to disable touch\n");
+ "failed to configure deep sleep mode\n");
return error;
}
@@ -1308,6 +1272,68 @@
}
#ifdef CONFIG_PM
+static int mxt_regulator_lpm(struct mxt_data *data, bool on)
+{
+
+ int rc;
+
+ if (on == false)
+ goto regulator_hpm;
+
+ rc = regulator_set_optimum_mode(data->vcc, MXT_LPM_LOAD_UA);
+ if (rc < 0) {
+ dev_err(&data->client->dev,
+ "Regulator set_opt failed rc=%d\n", rc);
+ goto fail_regulator_lpm;
+ }
+
+ if (data->pdata->i2c_pull_up) {
+ rc = regulator_set_optimum_mode(data->vcc_i2c,
+ MXT_I2C_LPM_LOAD_UA);
+ if (rc < 0) {
+ dev_err(&data->client->dev,
+ "Regulator set_opt failed rc=%d\n", rc);
+ goto fail_regulator_lpm;
+ }
+ }
+
+ return 0;
+
+regulator_hpm:
+
+ rc = regulator_set_optimum_mode(data->vcc, MXT_ACTIVE_LOAD_UA);
+ if (rc < 0) {
+ dev_err(&data->client->dev,
+ "Regulator set_opt failed rc=%d\n", rc);
+ goto fail_regulator_hpm;
+ }
+
+ if (data->pdata->i2c_pull_up) {
+ rc = regulator_set_optimum_mode(data->vcc_i2c, MXT_I2C_LOAD_UA);
+ if (rc < 0) {
+ dev_err(&data->client->dev,
+ "Regulator set_opt failed rc=%d\n", rc);
+ goto fail_regulator_hpm;
+ }
+ }
+
+ return 0;
+
+fail_regulator_lpm:
+ regulator_set_optimum_mode(data->vcc, MXT_ACTIVE_LOAD_UA);
+ if (data->pdata->i2c_pull_up)
+ regulator_set_optimum_mode(data->vcc_i2c, MXT_I2C_LOAD_UA);
+
+ return rc;
+
+fail_regulator_hpm:
+ regulator_set_optimum_mode(data->vcc, MXT_LPM_LOAD_UA);
+ if (data->pdata->i2c_pull_up)
+ regulator_set_optimum_mode(data->vcc_i2c, MXT_I2C_LPM_LOAD_UA);
+
+ return rc;
+}
+
static int mxt_suspend(struct device *dev)
{
struct i2c_client *client = to_i2c_client(dev);
@@ -1320,7 +1346,7 @@
if (input_dev->users) {
error = mxt_stop(data);
if (error < 0) {
- dev_err(&client->dev, "mxt_stop failed in suspend\n");
+ dev_err(dev, "mxt_stop failed in suspend\n");
mutex_unlock(&input_dev->mutex);
return error;
}
@@ -1329,6 +1355,13 @@
mutex_unlock(&input_dev->mutex);
+ /* put regulators in low power mode */
+ error = mxt_regulator_lpm(data, true);
+ if (error < 0) {
+ dev_err(dev, "failed to enter low power mode\n");
+ return error;
+ }
+
return 0;
}
@@ -1338,18 +1371,20 @@
struct mxt_data *data = i2c_get_clientdata(client);
struct input_dev *input_dev = data->input_dev;
int error;
- /* Soft reset */
- mxt_write_object(data, MXT_GEN_COMMAND,
- MXT_COMMAND_RESET, 1);
- mxt_reset_delay(data);
+ /* put regulators in high power mode */
+ error = mxt_regulator_lpm(data, false);
+ if (error < 0) {
+ dev_err(dev, "failed to enter high power mode\n");
+ return error;
+ }
mutex_lock(&input_dev->mutex);
if (input_dev->users) {
error = mxt_start(data);
if (error < 0) {
- dev_err(&client->dev, "mxt_start failed in resume\n");
+ dev_err(dev, "mxt_start failed in resume\n");
mutex_unlock(&input_dev->mutex);
return error;
}
@@ -1414,25 +1449,23 @@
data->pdata = pdata;
data->irq = client->irq;
- mxt_calc_resolution(data);
-
__set_bit(EV_ABS, input_dev->evbit);
__set_bit(EV_KEY, input_dev->evbit);
__set_bit(BTN_TOUCH, input_dev->keybit);
/* For single touch */
input_set_abs_params(input_dev, ABS_X,
- 0, data->max_x, 0, 0);
+ 0, data->pdata->x_size, 0, 0);
input_set_abs_params(input_dev, ABS_Y,
- 0, data->max_y, 0, 0);
+ 0, data->pdata->y_size, 0, 0);
/* For multi touch */
input_set_abs_params(input_dev, ABS_MT_TOUCH_MAJOR,
0, MXT_MAX_AREA, 0, 0);
input_set_abs_params(input_dev, ABS_MT_POSITION_X,
- 0, data->max_x, 0, 0);
+ 0, data->pdata->x_size, 0, 0);
input_set_abs_params(input_dev, ABS_MT_POSITION_Y,
- 0, data->max_y, 0, 0);
+ 0, data->pdata->y_size, 0, 0);
input_set_drvdata(input_dev, data);
i2c_set_clientdata(client, data);
diff --git a/drivers/media/radio/radio-iris.c b/drivers/media/radio/radio-iris.c
index 2a192db..179f465 100644
--- a/drivers/media/radio/radio-iris.c
+++ b/drivers/media/radio/radio-iris.c
@@ -392,7 +392,16 @@
.minimum = 0,
.maximum = 2,
},
-
+ {
+ .id = V4L2_CID_PRIVATE_IRIS_READ_DEFAULT,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "Read default",
+ },
+ {
+ .id = V4L2_CID_PRIVATE_IRIS_WRITE_DEFAULT,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "Write default",
+ },
};
static void iris_q_event(struct iris_device *radio,
@@ -860,7 +869,7 @@
struct hci_fm_def_data_rd_req *def_data_rd =
(struct hci_fm_def_data_rd_req *) param;
- opcode = hci_opcode_pack(HCI_OGF_FM_RECV_CTRL_CMD_REQ,
+ opcode = hci_opcode_pack(HCI_OGF_FM_COMMON_CTRL_CMD_REQ,
HCI_OCF_FM_DEFAULT_DATA_READ);
return radio_hci_send_cmd(hdev, opcode, sizeof((*def_data_rd)),
def_data_rd);
@@ -873,7 +882,7 @@
struct hci_fm_def_data_wr_req *def_data_wr =
(struct hci_fm_def_data_wr_req *) param;
- opcode = hci_opcode_pack(HCI_OGF_FM_RECV_CTRL_CMD_REQ,
+ opcode = hci_opcode_pack(HCI_OGF_FM_COMMON_CTRL_CMD_REQ,
HCI_OCF_FM_DEFAULT_DATA_WRITE);
return radio_hci_send_cmd(hdev, opcode, sizeof((*def_data_wr)),
def_data_wr);
@@ -1212,7 +1221,6 @@
{
int ret = 0;
struct hci_fm_def_data_rd_req *def_data_rd = arg;
-
ret = radio_hci_request(hdev, hci_def_data_read_req, (unsigned
long)def_data_rd, RADIO_HCI_TIMEOUT);
@@ -1224,7 +1232,6 @@
{
int ret = 0;
struct hci_fm_def_data_wr_req *def_data_wr = arg;
-
ret = radio_hci_request(hdev, hci_def_data_write_req, (unsigned
long)def_data_wr, RADIO_HCI_TIMEOUT);
@@ -1596,6 +1603,32 @@
}
+
+static void hci_cc_riva_read_default_rsp(struct radio_hci_dev *hdev,
+ struct sk_buff *skb)
+{
+ struct iris_device *radio = video_get_drvdata(video_get_dev());
+ __u8 status = *((__u8 *) skb->data);
+ __u8 len;
+ char *data;
+
+ if (status)
+ return;
+ len = skb->data[1];
+ data = kmalloc(len+2, GFP_ATOMIC);
+ if (!data) {
+ FMDERR("Memory allocation failed");
+ return;
+ }
+
+ data[0] = status;
+ data[1] = len;
+ memcpy(&data[2], &skb->data[DEFAULT_DATA_OFFSET], len);
+ iris_q_evt_data(radio, data, len+2, IRIS_BUF_RD_DEFAULT);
+ radio_hci_req_complete(hdev, status);
+ kfree(data);
+}
+
static void hci_cc_ssbi_peek_rsp(struct radio_hci_dev *hdev,
struct sk_buff *skb)
{
@@ -1674,6 +1707,8 @@
case hci_trans_ctrl_cmd_op_pack(HCI_OCF_FM_RDS_RT_REQ):
case hci_trans_ctrl_cmd_op_pack(HCI_OCF_FM_RDS_PS_REQ):
case hci_common_cmd_op_pack(HCI_OCF_FM_DEFAULT_DATA_WRITE):
+ hci_cc_rsp(hdev, skb);
+ break;
case hci_common_cmd_op_pack(HCI_OCF_FM_RESET):
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_SSBI_POKE_REG):
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_POKE_DATA):
@@ -1705,6 +1740,9 @@
break;
case hci_common_cmd_op_pack(HCI_OCF_FM_DEFAULT_DATA_READ):
+ hci_cc_riva_read_default_rsp(hdev, skb);
+ break;
+
case hci_diagnostic_cmd_op_pack(HCI_OCF_FM_PEEK_DATA):
hci_cc_riva_peek_rsp(hdev, skb);
break;
@@ -2281,6 +2319,30 @@
return retval;
}
+static int iris_vidioc_g_ext_ctrls(struct file *file, void *priv,
+ struct v4l2_ext_controls *ctrl)
+{
+ int retval = 0;
+ char *data = NULL;
+ struct iris_device *radio = video_get_drvdata(video_devdata(file));
+ struct hci_fm_def_data_rd_req default_data_rd;
+
+ switch ((ctrl->controls[0]).id) {
+ case V4L2_CID_PRIVATE_IRIS_READ_DEFAULT:
+ data = (ctrl->controls[0]).string;
+ memset(&default_data_rd, 0, sizeof(default_data_rd));
+ if (copy_from_user(&default_data_rd.mode, data,
+ sizeof(default_data_rd)))
+ return -EFAULT;
+ retval = hci_def_data_read(&default_data_rd, radio->fm_hdev);
+ break;
+ default:
+ retval = -EINVAL;
+ }
+
+ return retval;
+}
+
static int iris_vidioc_s_ext_ctrls(struct file *file, void *priv,
struct v4l2_ext_controls *ctrl)
{
@@ -2288,6 +2350,7 @@
int bytes_to_copy;
struct hci_fm_tx_ps tx_ps;
struct hci_fm_tx_rt tx_rt;
+ struct hci_fm_def_data_wr_req default_data;
struct iris_device *radio = video_get_drvdata(video_devdata(file));
char *data = NULL;
@@ -2333,6 +2396,13 @@
retval = radio_hci_request(radio->fm_hdev, hci_trans_rt_req,
(unsigned long)&tx_rt, RADIO_HCI_TIMEOUT);
break;
+ case V4L2_CID_PRIVATE_IRIS_WRITE_DEFAULT:
+ data = (ctrl->controls[0]).string;
+ memset(&default_data, 0, sizeof(default_data));
+ if (copy_from_user(&default_data, data, sizeof(default_data)))
+ return -EFAULT;
+ retval = hci_def_data_write(&default_data, radio->fm_hdev);
+ break;
default:
FMDBG("Shouldn't reach here\n");
retval = -1;
@@ -2850,6 +2920,7 @@
.vidioc_dqbuf = iris_vidioc_dqbuf,
.vidioc_g_fmt_type_private = iris_vidioc_g_fmt_type_private,
.vidioc_s_ext_ctrls = iris_vidioc_s_ext_ctrls,
+ .vidioc_g_ext_ctrls = iris_vidioc_g_ext_ctrls,
};
static const struct v4l2_file_operations iris_fops = {
diff --git a/drivers/media/radio/radio-tavarua.c b/drivers/media/radio/radio-tavarua.c
index 36bad1b..49bc46c 100644
--- a/drivers/media/radio/radio-tavarua.c
+++ b/drivers/media/radio/radio-tavarua.c
@@ -2786,20 +2786,14 @@
FMDBG("turning on ..\n");
retval = tavarua_start(radio, ctrl->value);
if (retval >= 0) {
- FMDBG("Setting audio path ...\n");
- retval = tavarua_set_audio_path(
- TAVARUA_AUDIO_OUT_DIGITAL_ON,
- TAVARUA_AUDIO_OUT_ANALOG_OFF);
- if (retval < 0) {
- FMDERR("Error in tavarua_set_audio_path"
- " %d\n", retval);
- }
- /* Enabling 'SoftMute' and 'SignalBlending' features */
- value = (radio->registers[IOCTRL] |
+ /* Enabling 'SoftMute' & 'SignalBlending' */
+ value = (radio->registers[IOCTRL] |
IOC_SFT_MUTE | IOC_SIG_BLND);
- retval = tavarua_write_register(radio, IOCTRL, value);
- if (retval < 0)
- FMDBG("SMute and SBlending not enabled\n");
+ retval = tavarua_write_register(radio,
+ IOCTRL, value);
+ if (retval < 0)
+ FMDBG("SMute and SBlending"
+ "not enabled\n");
}
}
/* check if off */
@@ -2822,6 +2816,28 @@
}
}
break;
+ case V4L2_CID_PRIVATE_TAVARUA_SET_AUDIO_PATH:
+ FMDBG("Setting audio path ...\n");
+ if (ctrl->value == FM_DIGITAL_PATH) {
+ FMDBG("Digital audio path enabled ...\n");
+ retval = tavarua_set_audio_path(
+ TAVARUA_AUDIO_OUT_DIGITAL_ON,
+ TAVARUA_AUDIO_OUT_ANALOG_OFF);
+ if (retval < 0) {
+ FMDERR("Error in tavarua_set_audio_path"
+ " %d\n", retval);
+ }
+ } else if (ctrl->value == FM_ANALOG_PATH) {
+ FMDBG("Analog audio path enabled ...\n");
+ retval = tavarua_set_audio_path(
+ TAVARUA_AUDIO_OUT_ANALOG_ON,
+ TAVARUA_AUDIO_OUT_DIGITAL_OFF);
+ if (retval < 0) {
+ FMDERR("Error in tavarua_set_audio_path"
+ " %d\n", retval);
+ }
+ }
+ break;
case V4L2_CID_PRIVATE_TAVARUA_REGION:
retval = tavarua_set_region(radio, ctrl->value);
break;
diff --git a/drivers/media/video/msm/msm.c b/drivers/media/video/msm/msm.c
index 727b751..74534af 100644
--- a/drivers/media/video/msm/msm.c
+++ b/drivers/media/video/msm/msm.c
@@ -1398,10 +1398,8 @@
}
mutex_lock(&pcam->vid_lock);
for (i = 0; i < MSM_DEV_INST_MAX; i++) {
- if (pcam->dev_inst[i] == NULL) {
- mutex_unlock(&pcam->vid_lock);
+ if (pcam->dev_inst[i] == NULL)
break;
- }
}
/* if no instance is available, return error */
if (i == MSM_DEV_INST_MAX) {
diff --git a/drivers/media/video/msm/msm_io_8960.c b/drivers/media/video/msm/msm_io_8960.c
index 45871bc..0e4429e 100644
--- a/drivers/media/video/msm/msm_io_8960.c
+++ b/drivers/media/video/msm/msm_io_8960.c
@@ -27,6 +27,7 @@
#define DBG_CSID 0
#define DBG_CSIPHY 0
+#define BUFF_SIZE_128 128
/* MIPI CSI PHY registers */
#define MIPI_CSIPHY_LNn_CFG1_ADDR 0x0
@@ -194,7 +195,7 @@
void msm_io_dump(void __iomem *addr, int size)
{
- char line_str[128], *p_str;
+ char line_str[BUFF_SIZE_128], *p_str;
int i;
u32 *p = (u32 *) addr;
u32 data;
@@ -203,11 +204,11 @@
p_str = line_str;
for (i = 0; i < size/4; i++) {
if (i % 4 == 0) {
- sprintf(p_str, "%08x: ", (u32) p);
+ snprintf(p_str, 12, "%08x: ", (u32) p);
p_str += 10;
}
data = readl_relaxed(p++);
- sprintf(p_str, "%08x ", data);
+ snprintf(p_str, 12, "%08x ", data);
p_str += 9;
if ((i + 1) % 4 == 0) {
CDBG("%s\n", line_str);
diff --git a/drivers/media/video/msm/msm_isp.c b/drivers/media/video/msm/msm_isp.c
index 9204269..6983d70 100644
--- a/drivers/media/video/msm/msm_isp.c
+++ b/drivers/media/video/msm/msm_isp.c
@@ -157,7 +157,7 @@
if (notification == NOTIFY_VFE_BUF_EVT)
return msm_isp_notify_VFE_BUF_EVT(sd, arg);
- isp_event = kzalloc(sizeof(struct msm_isp_event_ctrl), GFP_KERNEL);
+ isp_event = kzalloc(sizeof(struct msm_isp_event_ctrl), GFP_ATOMIC);
if (!isp_event) {
pr_err("%s Insufficient memory. return", __func__);
return -ENOMEM;
diff --git a/drivers/media/video/msm/msm_mctl_pp.c b/drivers/media/video/msm/msm_mctl_pp.c
index 7040c29..4f82d32 100644
--- a/drivers/media/video/msm/msm_mctl_pp.c
+++ b/drivers/media/video/msm/msm_mctl_pp.c
@@ -43,7 +43,7 @@
struct v4l2_event v4l2_evt;
struct msm_isp_event_ctrl *isp_event;
isp_event = kzalloc(sizeof(struct msm_isp_event_ctrl),
- GFP_KERNEL);
+ GFP_ATOMIC);
if (!isp_event) {
pr_err("%s Insufficient memory. return", __func__);
return -ENOMEM;
@@ -581,7 +581,7 @@
struct msm_mctl_pp_event_info *pp_event_info;
struct msm_isp_event_ctrl *isp_event;
isp_event = kzalloc(sizeof(struct msm_isp_event_ctrl),
- GFP_KERNEL);
+ GFP_ATOMIC);
if (!isp_event) {
pr_err("%s Insufficient memory.", __func__);
return -ENOMEM;
diff --git a/drivers/mfd/pm8018-core.c b/drivers/mfd/pm8018-core.c
index 1567c5b..528f232 100644
--- a/drivers/mfd/pm8018-core.c
+++ b/drivers/mfd/pm8018-core.c
@@ -21,6 +21,7 @@
#include <linux/mfd/core.h>
#include <linux/mfd/pm8xxx/pm8018.h>
#include <linux/mfd/pm8xxx/core.h>
+#include <linux/leds-pm8xxx.h>
/* PMIC PM8018 SSBI Addresses */
@@ -215,6 +216,16 @@
.pdata_size = sizeof("pm8018-dbg"),
};
+static struct mfd_cell pwm_cell __devinitdata = {
+ .name = PM8XXX_PWM_DEV_NAME,
+ .id = -1,
+};
+
+static struct mfd_cell leds_cell __devinitdata = {
+ .name = PM8XXX_LEDS_DEV_NAME,
+ .id = -1,
+};
+
static int __devinit
pm8018_add_subdevices(const struct pm8018_platform_data *pdata,
struct pm8018 *pmic)
@@ -303,6 +314,15 @@
irq_base);
if (ret) {
pr_err("Failed to add adc subdevice ret=%d\n", ret);
+ }
+ }
+
+ if (pdata->leds_pdata) {
+ leds_cell.platform_data = pdata->leds_pdata;
+ leds_cell.pdata_size = sizeof(struct pm8xxx_led_platform_data);
+ ret = mfd_add_devices(pmic->dev, 0, &leds_cell, 1, NULL, 0);
+ if (ret) {
+ pr_err("Failed to add leds subdevice ret=%d\n", ret);
goto bail;
}
}
@@ -313,6 +333,12 @@
goto bail;
}
+ ret = mfd_add_devices(pmic->dev, 0, &pwm_cell, 1, NULL, 0);
+ if (ret) {
+ pr_err("Failed to add pwm subdevice ret=%d\n", ret);
+ goto bail;
+ }
+
/* Add one device for each regulator used by the board. */
if (pdata->num_regulators > 0 && pdata->regulator_pdatas) {
mfd_regulators = kzalloc(sizeof(struct mfd_cell)
diff --git a/drivers/misc/eeprom/eeprom_93cx6.c b/drivers/misc/eeprom/eeprom_93cx6.c
index 7b33de9..6ffe9e7 100644
--- a/drivers/misc/eeprom/eeprom_93cx6.c
+++ b/drivers/misc/eeprom/eeprom_93cx6.c
@@ -63,6 +63,7 @@
eeprom->reg_data_out = 0;
eeprom->reg_data_clock = 0;
eeprom->reg_chip_select = 1;
+ eeprom->drive_data = 1;
eeprom->register_write(eeprom);
/*
@@ -101,6 +102,7 @@
*/
eeprom->reg_data_in = 0;
eeprom->reg_data_out = 0;
+ eeprom->drive_data = 1;
/*
* Start writing all bits.
@@ -140,6 +142,7 @@
*/
eeprom->reg_data_in = 0;
eeprom->reg_data_out = 0;
+ eeprom->drive_data = 0;
/*
* Start reading all bits.
@@ -231,3 +234,89 @@
}
EXPORT_SYMBOL_GPL(eeprom_93cx6_multiread);
+
+/**
+ * eeprom_93cx6_wren - set the write enable state
+ * @eeprom: Pointer to eeprom structure
+ * @enable: true to enable writes, otherwise disable writes
+ *
+ * Set the EEPROM write enable state to either allow or deny
+ * writes depending on the @enable value.
+ */
+void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom, bool enable)
+{
+ u16 command;
+
+ /* start the command */
+ eeprom_93cx6_startup(eeprom);
+
+ /* create command to enable/disable */
+
+ command = enable ? PCI_EEPROM_EWEN_OPCODE : PCI_EEPROM_EWDS_OPCODE;
+ command <<= (eeprom->width - 2);
+
+ eeprom_93cx6_write_bits(eeprom, command,
+ PCI_EEPROM_WIDTH_OPCODE + eeprom->width);
+
+ eeprom_93cx6_cleanup(eeprom);
+}
+EXPORT_SYMBOL_GPL(eeprom_93cx6_wren);
+
+/**
+ * eeprom_93cx6_write - write data to the EEPROM
+ * @eeprom: Pointer to eeprom structure
+ * @addr: Address to write data to.
+ * @data: The data to write to address @addr.
+ *
+ * Write the @data to the specified @addr in the EEPROM and
+ * waiting for the device to finish writing.
+ *
+ * Note, since we do not expect large number of write operations
+ * we delay in between parts of the operation to avoid using excessive
+ * amounts of CPU time busy waiting.
+ */
+void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom, u8 addr, u16 data)
+{
+ int timeout = 100;
+ u16 command;
+
+ /* start the command */
+ eeprom_93cx6_startup(eeprom);
+
+ command = PCI_EEPROM_WRITE_OPCODE << eeprom->width;
+ command |= addr;
+
+ /* send write command */
+ eeprom_93cx6_write_bits(eeprom, command,
+ PCI_EEPROM_WIDTH_OPCODE + eeprom->width);
+
+ /* send data */
+ eeprom_93cx6_write_bits(eeprom, data, 16);
+
+ /* get ready to check for busy */
+ eeprom->drive_data = 0;
+ eeprom->reg_chip_select = 1;
+ eeprom->register_write(eeprom);
+
+ /* wait at-least 250ns to get DO to be the busy signal */
+ usleep_range(1000, 2000);
+
+ /* wait for DO to go high to signify finish */
+
+ while (true) {
+ eeprom->register_read(eeprom);
+
+ if (eeprom->reg_data_out)
+ break;
+
+ usleep_range(1000, 2000);
+
+ if (--timeout <= 0) {
+ printk(KERN_ERR "%s: timeout\n", __func__);
+ break;
+ }
+ }
+
+ eeprom_93cx6_cleanup(eeprom);
+}
+EXPORT_SYMBOL_GPL(eeprom_93cx6_write);
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index f6c44c6..8aab269 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1795,6 +1795,8 @@
depends on SPI
select MII
select CRC32
+ select MISC_DEVICES
+ select EEPROM_93CX6
help
SPI driver for Micrel KS8851 SPI attached network chip.
diff --git a/drivers/net/ks8851.c b/drivers/net/ks8851.c
index e338aed..0bf972a 100644
--- a/drivers/net/ks8851.c
+++ b/drivers/net/ks8851.c
@@ -22,6 +22,8 @@
#include <linux/crc32.h>
#include <linux/mii.h>
#include <linux/regulator/consumer.h>
+#include <linux/eeprom_93cx6.h>
+
#include <linux/spi/spi.h>
#include <linux/ks8851.h>
#include <linux/gpio.h>
@@ -83,6 +85,7 @@
* @rc_ccr: Cached copy of KS_CCR.
* @rc_rxqcr: Cached copy of KS_RXQCR.
* @eeprom_size: Companion eeprom size in Bytes, 0 if no eeprom
+ * @eeprom: 93CX6 EEPROM state for accessing on-board EEPROM.
*
* The @lock ensures that the chip is protected when certain operations are
* in progress. When the read or write packet transfer is in progress, most
@@ -131,6 +134,8 @@
struct spi_transfer spi_xfer2[2];
struct regulator *vdd_io;
struct regulator *vdd_phy;
+
+ struct eeprom_93cx6 eeprom;
};
static int msg_enable;
@@ -346,6 +351,26 @@
}
/**
+ * ks8851_set_powermode - set power mode of the device
+ * @ks: The device state
+ * @pwrmode: The power mode value to write to KS_PMECR.
+ *
+ * Change the power mode of the chip.
+ */
+static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode)
+{
+ unsigned pmecr;
+
+ netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode);
+
+ pmecr = ks8851_rdreg16(ks, KS_PMECR);
+ pmecr &= ~PMECR_PM_MASK;
+ pmecr |= pwrmode;
+
+ ks8851_wrreg16(ks, KS_PMECR, pmecr);
+}
+
+/**
* ks8851_write_mac_addr - write mac address to device registers
* @dev: The network device
*
@@ -361,8 +386,15 @@
mutex_lock(&ks->lock);
+ /*
+ * Wake up chip in case it was powered off when stopped; otherwise,
+ * the first write to the MAC address does not take effect.
+ */
+ ks8851_set_powermode(ks, PMECR_PM_NORMAL);
for (i = 0; i < ETH_ALEN; i++)
ks8851_wrreg8(ks, KS_MAR(i), dev->dev_addr[i]);
+ if (!netif_running(dev))
+ ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN);
mutex_unlock(&ks->lock);
@@ -370,17 +402,14 @@
}
/**
- * ks8851_init_mac - initialise the mac address
- * @ks: The device structure
+ * ks8851_read_mac_addr - read mac address from device registers
+ * @dev: The network device
*
- * Get or create the initial mac address for the device and then set that
- * into the station address register. The device will try to read a MAC address
- * from the EEPROM and program it into the MARs. We use random_ether_addr()
- * if the EEPROM is not present or if the address in the MARs appears invalid.
- */
-static void ks8851_init_mac(struct ks8851_net *ks)
+ * Update our copy of the KS8851 MAC address from the registers of @dev.
+*/
+static void ks8851_read_mac_addr(struct net_device *dev)
{
- struct net_device *dev = ks->netdev;
+ struct ks8851_net *ks = netdev_priv(dev);
int i;
mutex_lock(&ks->lock);
@@ -389,11 +418,33 @@
dev->dev_addr[i] = ks8851_rdreg8(ks, KS_MAR(i));
mutex_unlock(&ks->lock);
+}
- if (!(ks->rc_ccr & CCR_EEPROM) || !is_valid_ether_addr(dev->dev_addr)) {
- random_ether_addr(dev->dev_addr);
- ks8851_write_mac_addr(dev);
+/**
+ * ks8851_init_mac - initialise the mac address
+ * @ks: The device structure
+ *
+ * Get or create the initial mac address for the device and then set that
+ * into the station address register. If there is an EEPROM present, then
+ * we try that. If no valid mac address is found we use random_ether_addr()
+ * to create a new one.
+ */
+static void ks8851_init_mac(struct ks8851_net *ks)
+{
+ struct net_device *dev = ks->netdev;
+
+ /* first, try reading what we've got already */
+ if (ks->rc_ccr & CCR_EEPROM) {
+ ks8851_read_mac_addr(dev);
+ if (is_valid_ether_addr(dev->dev_addr))
+ return;
+
+ netdev_err(ks->netdev, "invalid mac address read %pM\n",
+ dev->dev_addr);
}
+
+ random_ether_addr(dev->dev_addr);
+ ks8851_write_mac_addr(dev);
}
/**
@@ -749,26 +800,6 @@
}
/**
- * ks8851_set_powermode - set power mode of the device
- * @ks: The device state
- * @pwrmode: The power mode value to write to KS_PMECR.
- *
- * Change the power mode of the chip.
- */
-static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode)
-{
- unsigned pmecr;
-
- netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode);
-
- pmecr = ks8851_rdreg16(ks, KS_PMECR);
- pmecr &= ~PMECR_PM_MASK;
- pmecr |= pwrmode;
-
- ks8851_wrreg16(ks, KS_PMECR, pmecr);
-}
-
-/**
* ks8851_net_open - open network device
* @dev: The network device being opened.
*
@@ -1048,234 +1079,6 @@
.ndo_validate_addr = eth_validate_addr,
};
-/* Companion eeprom access */
-
-enum { /* EEPROM programming states */
- EEPROM_CONTROL,
- EEPROM_ADDRESS,
- EEPROM_DATA,
- EEPROM_COMPLETE
-};
-
-/**
- * ks8851_eeprom_read - read a 16bits word in ks8851 companion EEPROM
- * @dev: The network device the PHY is on.
- * @addr: EEPROM address to read
- *
- * eeprom_size: used to define the data coding length. Can be changed
- * through debug-fs.
- *
- * Programs a read on the EEPROM using ks8851 EEPROM SW access feature.
- * Warning: The READ feature is not supported on ks8851 revision 0.
- *
- * Rough programming model:
- * - on period start: set clock high and read value on bus
- * - on period / 2: set clock low and program value on bus
- * - start on period / 2
- */
-unsigned int ks8851_eeprom_read(struct net_device *dev, unsigned int addr)
-{
- struct ks8851_net *ks = netdev_priv(dev);
- int eepcr;
- int ctrl = EEPROM_OP_READ;
- int state = EEPROM_CONTROL;
- int bit_count = EEPROM_OP_LEN - 1;
- unsigned int data = 0;
- int dummy;
- unsigned int addr_len;
-
- addr_len = (ks->eeprom_size == 128) ? 6 : 8;
-
- /* start transaction: chip select high, authorize write */
- mutex_lock(&ks->lock);
- eepcr = EEPCR_EESA | EEPCR_EESRWA;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- eepcr |= EEPCR_EECS;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- while (state != EEPROM_COMPLETE) {
- /* falling clock period starts... */
- /* set EED_IO pin for control and address */
- eepcr &= ~EEPCR_EEDO;
- switch (state) {
- case EEPROM_CONTROL:
- eepcr |= ((ctrl >> bit_count) & 1) << 2;
- if (bit_count-- <= 0) {
- bit_count = addr_len - 1;
- state = EEPROM_ADDRESS;
- }
- break;
- case EEPROM_ADDRESS:
- eepcr |= ((addr >> bit_count) & 1) << 2;
- bit_count--;
- break;
- case EEPROM_DATA:
- /* Change to receive mode */
- eepcr &= ~EEPCR_EESRWA;
- break;
- }
-
- /* lower clock */
- eepcr &= ~EEPCR_EESCK;
-
- mutex_lock(&ks->lock);
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- /* waitread period / 2 */
- udelay(EEPROM_SK_PERIOD / 2);
-
- /* rising clock period starts... */
-
- /* raise clock */
- mutex_lock(&ks->lock);
- eepcr |= EEPCR_EESCK;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- /* Manage read */
- switch (state) {
- case EEPROM_ADDRESS:
- if (bit_count < 0) {
- bit_count = EEPROM_DATA_LEN - 1;
- state = EEPROM_DATA;
- }
- break;
- case EEPROM_DATA:
- mutex_lock(&ks->lock);
- dummy = ks8851_rdreg16(ks, KS_EEPCR);
- mutex_unlock(&ks->lock);
- data |= ((dummy >> EEPCR_EESB_OFFSET) & 1) << bit_count;
- if (bit_count-- <= 0)
- state = EEPROM_COMPLETE;
- break;
- }
-
- /* wait period / 2 */
- udelay(EEPROM_SK_PERIOD / 2);
- }
-
- /* close transaction */
- mutex_lock(&ks->lock);
- eepcr &= ~EEPCR_EECS;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- eepcr = 0;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- return data;
-}
-
-/**
- * ks8851_eeprom_write - write a 16bits word in ks8851 companion EEPROM
- * @dev: The network device the PHY is on.
- * @op: operand (can be WRITE, EWEN, EWDS)
- * @addr: EEPROM address to write
- * @data: data to write
- *
- * eeprom_size: used to define the data coding length. Can be changed
- * through debug-fs.
- *
- * Programs a write on the EEPROM using ks8851 EEPROM SW access feature.
- *
- * Note that a write enable is required before writing data.
- *
- * Rough programming model:
- * - on period start: set clock high
- * - on period / 2: set clock low and program value on bus
- * - start on period / 2
- */
-void ks8851_eeprom_write(struct net_device *dev, unsigned int op,
- unsigned int addr, unsigned int data)
-{
- struct ks8851_net *ks = netdev_priv(dev);
- int eepcr;
- int state = EEPROM_CONTROL;
- int bit_count = EEPROM_OP_LEN - 1;
- unsigned int addr_len;
-
- addr_len = (ks->eeprom_size == 128) ? 6 : 8;
-
- switch (op) {
- case EEPROM_OP_EWEN:
- addr = 0x30;
- break;
- case EEPROM_OP_EWDS:
- addr = 0;
- break;
- }
-
- /* start transaction: chip select high, authorize write */
- mutex_lock(&ks->lock);
- eepcr = EEPCR_EESA | EEPCR_EESRWA;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- eepcr |= EEPCR_EECS;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- while (state != EEPROM_COMPLETE) {
- /* falling clock period starts... */
- /* set EED_IO pin for control and address */
- eepcr &= ~EEPCR_EEDO;
- switch (state) {
- case EEPROM_CONTROL:
- eepcr |= ((op >> bit_count) & 1) << 2;
- if (bit_count-- <= 0) {
- bit_count = addr_len - 1;
- state = EEPROM_ADDRESS;
- }
- break;
- case EEPROM_ADDRESS:
- eepcr |= ((addr >> bit_count) & 1) << 2;
- if (bit_count-- <= 0) {
- if (op == EEPROM_OP_WRITE) {
- bit_count = EEPROM_DATA_LEN - 1;
- state = EEPROM_DATA;
- } else {
- state = EEPROM_COMPLETE;
- }
- }
- break;
- case EEPROM_DATA:
- eepcr |= ((data >> bit_count) & 1) << 2;
- if (bit_count-- <= 0)
- state = EEPROM_COMPLETE;
- break;
- }
-
- /* lower clock */
- eepcr &= ~EEPCR_EESCK;
-
- mutex_lock(&ks->lock);
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- /* wait period / 2 */
- udelay(EEPROM_SK_PERIOD / 2);
-
- /* rising clock period starts... */
-
- /* raise clock */
- eepcr |= EEPCR_EESCK;
- mutex_lock(&ks->lock);
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
- /* wait period / 2 */
- udelay(EEPROM_SK_PERIOD / 2);
- }
-
- /* close transaction */
- mutex_lock(&ks->lock);
- eepcr &= ~EEPCR_EECS;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- eepcr = 0;
- ks8851_wrreg16(ks, KS_EEPCR, eepcr);
- mutex_unlock(&ks->lock);
-
-}
-
/* ethtool support */
static void ks8851_get_drvinfo(struct net_device *dev,
@@ -1322,115 +1125,141 @@
return mii_nway_restart(&ks->mii);
}
-static int ks8851_get_eeprom_len(struct net_device *dev)
+/* EEPROM support */
+
+static void ks8851_eeprom_regread(struct eeprom_93cx6 *ee)
+{
+ struct ks8851_net *ks = ee->data;
+ unsigned val;
+
+ val = ks8851_rdreg16(ks, KS_EEPCR);
+
+ ee->reg_data_out = (val & EEPCR_EESB) ? 1 : 0;
+ ee->reg_data_clock = (val & EEPCR_EESCK) ? 1 : 0;
+ ee->reg_chip_select = (val & EEPCR_EECS) ? 1 : 0;
+}
+
+static void ks8851_eeprom_regwrite(struct eeprom_93cx6 *ee)
+{
+ struct ks8851_net *ks = ee->data;
+ unsigned val = EEPCR_EESA; /* default - eeprom access on */
+
+ if (ee->drive_data)
+ val |= EEPCR_EESRWA;
+ if (ee->reg_data_in)
+ val |= EEPCR_EEDO;
+ if (ee->reg_data_clock)
+ val |= EEPCR_EESCK;
+ if (ee->reg_chip_select)
+ val |= EEPCR_EECS;
+
+ ks8851_wrreg16(ks, KS_EEPCR, val);
+}
+
+/**
+ * ks8851_eeprom_claim - claim device EEPROM and activate the interface
+ * @ks: The network deice state.
+ *
+ * Check for the presence of an EEPROM, and then activate software access
+ * to the device.
+ */
+static int ks8851_eeprom_claim(struct ks8851_net *ks)
+{
+ if (!(ks->rc_ccr & CCR_EEPROM))
+ return -ENOENT;
+
+ mutex_lock(&ks->lock);
+
+ /* start with clock low, cs high */
+ ks8851_wrreg16(ks, KS_EEPCR, EEPCR_EESA | EEPCR_EECS);
+ return 0;
+}
+
+/**
+ * ks8851_eeprom_release - release the EEPROM interface
+ * @ks: The device state
+ *
+ * Release the software access to the device EEPROM
+ */
+static void ks8851_eeprom_release(struct ks8851_net *ks)
+{
+ unsigned val = ks8851_rdreg16(ks, KS_EEPCR);
+
+ ks8851_wrreg16(ks, KS_EEPCR, val & ~EEPCR_EESA);
+ mutex_unlock(&ks->lock);
+}
+
+#define KS_EEPROM_MAGIC (0x00008851)
+
+static int ks8851_set_eeprom(struct net_device *dev,
+ struct ethtool_eeprom *ee, u8 *data)
{
struct ks8851_net *ks = netdev_priv(dev);
- return ks->eeprom_size;
+ int offset = ee->offset;
+ int len = ee->len;
+ u16 tmp;
+
+ /* currently only support byte writing */
+ if (len != 1)
+ return -EINVAL;
+
+ if (ee->magic != KS_EEPROM_MAGIC)
+ return -EINVAL;
+
+ if (ks8851_eeprom_claim(ks))
+ return -ENOENT;
+
+ eeprom_93cx6_wren(&ks->eeprom, true);
+
+ /* ethtool currently only supports writing bytes, which means
+ * we have to read/modify/write our 16bit EEPROMs */
+
+ eeprom_93cx6_read(&ks->eeprom, offset/2, &tmp);
+
+ if (offset & 1) {
+ tmp &= 0xff;
+ tmp |= *data << 8;
+ } else {
+ tmp &= 0xff00;
+ tmp |= *data;
+ }
+
+ eeprom_93cx6_write(&ks->eeprom, offset/2, tmp);
+ eeprom_93cx6_wren(&ks->eeprom, false);
+
+ ks8851_eeprom_release(ks);
+
+ return 0;
}
static int ks8851_get_eeprom(struct net_device *dev,
- struct ethtool_eeprom *eeprom, u8 *bytes)
+ struct ethtool_eeprom *ee, u8 *data)
{
struct ks8851_net *ks = netdev_priv(dev);
- u16 *eeprom_buff;
- int first_word;
- int last_word;
- int ret_val = 0;
- u16 i;
+ int offset = ee->offset;
+ int len = ee->len;
- if (eeprom->len == 0)
+ /* must be 2 byte aligned */
+ if (len & 1 || offset & 1)
return -EINVAL;
- if (eeprom->len > ks->eeprom_size)
- return -EINVAL;
+ if (ks8851_eeprom_claim(ks))
+ return -ENOENT;
- eeprom->magic = ks8851_rdreg16(ks, KS_CIDER);
+ ee->magic = KS_EEPROM_MAGIC;
- first_word = eeprom->offset >> 1;
- last_word = (eeprom->offset + eeprom->len - 1) >> 1;
+ eeprom_93cx6_multiread(&ks->eeprom, offset/2, (__le16 *)data, len/2);
+ ks8851_eeprom_release(ks);
- eeprom_buff = kmalloc(sizeof(u16) *
- (last_word - first_word + 1), GFP_KERNEL);
- if (!eeprom_buff)
- return -ENOMEM;
-
- for (i = 0; i < last_word - first_word + 1; i++)
- eeprom_buff[i] = ks8851_eeprom_read(dev, first_word + 1);
-
- /* Device's eeprom is little-endian, word addressable */
- for (i = 0; i < last_word - first_word + 1; i++)
- le16_to_cpus(&eeprom_buff[i]);
-
- memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
- kfree(eeprom_buff);
-
- return ret_val;
+ return 0;
}
-static int ks8851_set_eeprom(struct net_device *dev,
- struct ethtool_eeprom *eeprom, u8 *bytes)
+static int ks8851_get_eeprom_len(struct net_device *dev)
{
struct ks8851_net *ks = netdev_priv(dev);
- u16 *eeprom_buff;
- void *ptr;
- int max_len;
- int first_word;
- int last_word;
- int ret_val = 0;
- u16 i;
- if (eeprom->len == 0)
- return -EOPNOTSUPP;
-
- if (eeprom->len > ks->eeprom_size)
- return -EINVAL;
-
- if (eeprom->magic != ks8851_rdreg16(ks, KS_CIDER))
- return -EFAULT;
-
- first_word = eeprom->offset >> 1;
- last_word = (eeprom->offset + eeprom->len - 1) >> 1;
- max_len = (last_word - first_word + 1) * 2;
- eeprom_buff = kmalloc(max_len, GFP_KERNEL);
- if (!eeprom_buff)
- return -ENOMEM;
-
- ptr = (void *)eeprom_buff;
-
- if (eeprom->offset & 1) {
- /* need read/modify/write of first changed EEPROM word */
- /* only the second byte of the word is being modified */
- eeprom_buff[0] = ks8851_eeprom_read(dev, first_word);
- ptr++;
- }
- if ((eeprom->offset + eeprom->len) & 1)
- /* need read/modify/write of last changed EEPROM word */
- /* only the first byte of the word is being modified */
- eeprom_buff[last_word - first_word] =
- ks8851_eeprom_read(dev, last_word);
-
-
- /* Device's eeprom is little-endian, word addressable */
- le16_to_cpus(&eeprom_buff[0]);
- le16_to_cpus(&eeprom_buff[last_word - first_word]);
-
- memcpy(ptr, bytes, eeprom->len);
-
- for (i = 0; i < last_word - first_word + 1; i++)
- eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
-
- ks8851_eeprom_write(dev, EEPROM_OP_EWEN, 0, 0);
-
- for (i = 0; i < last_word - first_word + 1; i++) {
- ks8851_eeprom_write(dev, EEPROM_OP_WRITE, first_word + i,
- eeprom_buff[i]);
- mdelay(EEPROM_WRITE_TIME);
- }
-
- ks8851_eeprom_write(dev, EEPROM_OP_EWDS, 0, 0);
-
- kfree(eeprom_buff);
- return ret_val;
+ /* currently, we assume it is an 93C46 attached, so return 128 */
+ return ks->rc_ccr & CCR_EEPROM ? 128 : 0;
}
static const struct ethtool_ops ks8851_ethtool_ops = {
@@ -1650,6 +1479,13 @@
spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2);
spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2);
+ /* setup EEPROM state */
+
+ ks->eeprom.data = ks;
+ ks->eeprom.width = PCI_EEPROM_WIDTH_93C46;
+ ks->eeprom.register_read = ks8851_eeprom_regread;
+ ks->eeprom.register_write = ks8851_eeprom_regwrite;
+
/* setup mii state */
ks->mii.dev = ndev;
ks->mii.phy_id = 1,
@@ -1711,9 +1547,10 @@
goto err_netdev;
}
- netdev_info(ndev, "revision %d, MAC %pM, IRQ %d\n",
+ netdev_info(ndev, "revision %d, MAC %pM, IRQ %d, %s EEPROM\n",
CIDER_REV_GET(ks8851_rdreg16(ks, KS_CIDER)),
- ndev->dev_addr, ndev->irq);
+ ndev->dev_addr, ndev->irq,
+ ks->rc_ccr & CCR_EEPROM ? "has" : "no");
return 0;
diff --git a/drivers/net/ks8851.h b/drivers/net/ks8851.h
index 537fb06e..b2703a1 100644
--- a/drivers/net/ks8851.h
+++ b/drivers/net/ks8851.h
@@ -16,7 +16,7 @@
#define CCR_32PIN (1 << 0)
/* MAC address registers */
-#define KS_MAR(_m) 0x15 - (_m)
+#define KS_MAR(_m) (0x15 - (_m))
#define KS_MARL 0x10
#define KS_MARM 0x12
#define KS_MARH 0x14
diff --git a/drivers/usb/gadget/android.c b/drivers/usb/gadget/android.c
index a86e049..8d58833 100644
--- a/drivers/usb/gadget/android.c
+++ b/drivers/usb/gadget/android.c
@@ -320,7 +320,7 @@
struct device *device, struct device_attribute *attr,
const char *buff, size_t size)
{
- strncpy(diag_clients, buff, sizeof(diag_clients));
+ strlcpy(diag_clients, buff, sizeof(diag_clients));
return size;
}
@@ -348,7 +348,7 @@
int once = 0, err = -1;
int (*notify)(uint32_t, const char *) = NULL;
- strncpy(buf, diag_clients, sizeof(buf));
+ strlcpy(buf, diag_clients, sizeof(buf));
b = strim(buf);
while (b) {
@@ -381,7 +381,7 @@
struct device *device, struct device_attribute *attr,
const char *buff, size_t size)
{
- strncpy(serial_transports, buff, sizeof(serial_transports));
+ strlcpy(serial_transports, buff, sizeof(serial_transports));
return size;
}
@@ -407,7 +407,7 @@
goto bind_config;
serial_initialized = 1;
- strncpy(buf, serial_transports, sizeof(buf));
+ strlcpy(buf, serial_transports, sizeof(buf));
b = strim(buf);
while (b) {
@@ -673,7 +673,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct rndis_function_config *config = f->config;
- return sprintf(buf, "%s\n", config->manufacturer);
+ return snprintf(buf, PAGE_SIZE, "%s\n", config->manufacturer);
}
static ssize_t rndis_manufacturer_store(struct device *dev,
@@ -684,7 +684,7 @@
if (size >= sizeof(config->manufacturer))
return -EINVAL;
- if (sscanf(buf, "%s", config->manufacturer) == 1)
+ if (sscanf(buf, "%255s", config->manufacturer) == 1)
return size;
return -1;
}
@@ -697,7 +697,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct rndis_function_config *config = f->config;
- return sprintf(buf, "%d\n", config->wceis);
+ return snprintf(buf, PAGE_SIZE, "%d\n", config->wceis);
}
static ssize_t rndis_wceis_store(struct device *dev,
@@ -722,7 +722,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct rndis_function_config *rndis = f->config;
- return sprintf(buf, "%02x:%02x:%02x:%02x:%02x:%02x\n",
+ return snprintf(buf, PAGE_SIZE, "%02x:%02x:%02x:%02x:%02x:%02x\n",
rndis->ethaddr[0], rndis->ethaddr[1], rndis->ethaddr[2],
rndis->ethaddr[3], rndis->ethaddr[4], rndis->ethaddr[5]);
}
@@ -749,7 +749,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct rndis_function_config *config = f->config;
- return sprintf(buf, "%04x\n", config->vendorID);
+ return snprintf(buf, PAGE_SIZE, "%04x\n", config->vendorID);
}
static ssize_t rndis_vendorID_store(struct device *dev,
@@ -844,7 +844,7 @@
{
struct android_usb_function *f = dev_get_drvdata(dev);
struct mass_storage_function_config *config = f->config;
- return sprintf(buf, "%s\n", config->common->inquiry_string);
+ return snprintf(buf, PAGE_SIZE, "%s\n", config->common->inquiry_string);
}
static ssize_t mass_storage_inquiry_store(struct device *dev,
@@ -854,7 +854,7 @@
struct mass_storage_function_config *config = f->config;
if (size >= sizeof(config->common->inquiry_string))
return -EINVAL;
- if (sscanf(buf, "%s", config->common->inquiry_string) != 1)
+ if (sscanf(buf, "%28s", config->common->inquiry_string) != 1)
return -EINVAL;
return size;
}
@@ -935,7 +935,7 @@
struct android_usb_function *f;
struct device_attribute **attrs;
struct device_attribute *attr;
- int err;
+ int err = 0;
int index = 0;
for (; (f = *functions++); index++) {
@@ -1048,7 +1048,7 @@
char *buff = buf;
list_for_each_entry(f, &dev->enabled_functions, enabled_list)
- buff += sprintf(buff, "%s,", f->name);
+ buff += snprintf(buff, PAGE_SIZE, "%s,", f->name);
if (buff != buf)
*(buff-1) = '\n';
return buff - buf;
@@ -1065,7 +1065,7 @@
INIT_LIST_HEAD(&dev->enabled_functions);
- strncpy(buf, buff, sizeof(buf));
+ strlcpy(buf, buff, sizeof(buf));
b = strim(buf);
while (b) {
@@ -1084,7 +1084,7 @@
char *buf)
{
struct android_dev *dev = dev_get_drvdata(pdev);
- return sprintf(buf, "%d\n", dev->enabled);
+ return snprintf(buf, PAGE_SIZE, "%d\n", dev->enabled);
}
static ssize_t enable_store(struct device *pdev, struct device_attribute *attr,
@@ -1138,7 +1138,7 @@
state = "CONNECTED";
spin_unlock_irqrestore(&cdev->lock, flags);
out:
- return sprintf(buf, "%s\n", state);
+ return snprintf(buf, PAGE_SIZE, "%s\n", state);
}
#define DESCRIPTOR_ATTR(field, format_string) \
@@ -1146,7 +1146,8 @@
field ## _show(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
- return sprintf(buf, format_string, device_desc.field); \
+ return snprintf(buf, PAGE_SIZE, \
+ format_string, device_desc.field); \
} \
static ssize_t \
field ## _store(struct device *dev, struct device_attribute *attr, \
@@ -1166,14 +1167,14 @@
field ## _show(struct device *dev, struct device_attribute *attr, \
char *buf) \
{ \
- return sprintf(buf, "%s", buffer); \
+ return snprintf(buf, PAGE_SIZE, "%s", buffer); \
} \
static ssize_t \
field ## _store(struct device *dev, struct device_attribute *attr, \
const char *buf, size_t size) \
{ \
if (size >= sizeof(buffer)) return -EINVAL; \
- if (sscanf(buf, "%s", buffer) == 1) { \
+ if (sscanf(buf, "%255s", buffer) == 1) { \
return size; \
} \
return -1; \
@@ -1261,9 +1262,10 @@
device_desc.iProduct = id;
/* Default strings - should be updated by userspace */
- strncpy(manufacturer_string, "Android", sizeof(manufacturer_string) - 1);
- strncpy(product_string, "Android", sizeof(product_string) - 1);
- strncpy(serial_string, "0123456789ABCDEF", sizeof(serial_string) - 1);
+ strlcpy(manufacturer_string, "Android",
+ sizeof(manufacturer_string) - 1);
+ strlcpy(product_string, "Android", sizeof(product_string) - 1);
+ strlcpy(serial_string, "0123456789ABCDEF", sizeof(serial_string) - 1);
id = usb_string_id(cdev);
if (id < 0)
diff --git a/drivers/usb/gadget/f_rmnet.c b/drivers/usb/gadget/f_rmnet.c
index ebbd1d8..69f158a 100644
--- a/drivers/usb/gadget/f_rmnet.c
+++ b/drivers/usb/gadget/f_rmnet.c
@@ -701,6 +701,9 @@
f->descriptors = usb_copy_descriptors(rmnet_fs_function);
+ if (!f->descriptors)
+ goto fail;
+
dev->fs.in = usb_find_endpoint(rmnet_fs_function,
f->descriptors,
&rmnet_fs_in_desc);
@@ -722,6 +725,9 @@
/* copy descriptors, and track endpoint copies */
f->hs_descriptors = usb_copy_descriptors(rmnet_hs_function);
+ if (!f->hs_descriptors)
+ goto fail;
+
dev->hs.in = usb_find_endpoint(rmnet_hs_function,
f->hs_descriptors, &rmnet_hs_in_desc);
dev->hs.out = usb_find_endpoint(rmnet_hs_function,
@@ -737,6 +743,9 @@
return 0;
+fail:
+ if (f->descriptors)
+ usb_free_descriptors(f->descriptors);
ep_notify_alloc_fail:
dev->notify->driver_data = NULL;
dev->notify = NULL;
diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c
index c522b0f..936b5d4 100644
--- a/drivers/video/msm/mdp.c
+++ b/drivers/video/msm/mdp.c
@@ -1632,6 +1632,9 @@
static void mdp_early_suspend(struct early_suspend *h)
{
mdp_suspend_sub();
+#ifdef CONFIG_FB_MSM_DTV
+ mdp4_dtv_set_black_screen();
+#endif
if (footswitch && mdp_rev > MDP_REV_42)
regulator_disable(footswitch);
}
diff --git a/drivers/video/msm/mdp4.h b/drivers/video/msm/mdp4.h
index fd2f13e..ef3092b 100644
--- a/drivers/video/msm/mdp4.h
+++ b/drivers/video/msm/mdp4.h
@@ -389,6 +389,16 @@
/* empty */
}
#endif
+
+#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
+void mdp4_dtv_set_black_screen(void);
+#else
+static inline void mdp4_dtv_set_black_screen(void)
+{
+ /* empty */
+}
+#endif
+
void mdp4_dtv_overlay(struct msm_fb_data_type *mfd);
int mdp4_dtv_on(struct platform_device *pdev);
int mdp4_dtv_off(struct platform_device *pdev);
diff --git a/drivers/video/msm/mdp4_overlay_dtv.c b/drivers/video/msm/mdp4_overlay_dtv.c
index 82bce01..a8ace6b 100644
--- a/drivers/video/msm/mdp4_overlay_dtv.c
+++ b/drivers/video/msm/mdp4_overlay_dtv.c
@@ -378,6 +378,36 @@
complete(&dtv_pipe->comp);
}
+#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
+void mdp4_dtv_set_black_screen(void)
+{
+ char *rgb_base;
+ /*Black color*/
+ uint32 color = 0x00000000;
+ uint32 temp_src_format;
+
+ if (!dtv_pipe) {
+ pr_err("dtv_pipe is not configured yet\n");
+ return;
+ }
+ rgb_base = MDP_BASE + MDP4_RGB_BASE;
+ rgb_base += (MDP4_RGB_OFF * dtv_pipe->pipe_num);
+
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
+ /*
+ * RGB Constant Color
+ */
+ MDP_OUTP(rgb_base + 0x1008, color);
+ /*
+ * MDP_RGB_SRC_FORMAT
+ */
+ temp_src_format = inpdw(rgb_base + 0x0050);
+ MDP_OUTP(rgb_base + 0x0050, temp_src_format | BIT(22));
+ mdp4_overlay_reg_flush(dtv_pipe, 1);
+ mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
+}
+#endif
+
void mdp4_dtv_overlay(struct msm_fb_data_type *mfd)
{
struct fb_info *fbi = mfd->fbi;
diff --git a/drivers/video/msm/mipi_tc358764_dsi2lvds.c b/drivers/video/msm/mipi_tc358764_dsi2lvds.c
index b1cdf78..2594c1d 100644
--- a/drivers/video/msm/mipi_tc358764_dsi2lvds.c
+++ b/drivers/video/msm/mipi_tc358764_dsi2lvds.c
@@ -186,7 +186,7 @@
#define DEBUG01 0x05A4 /* LVDS Data */
/* PWM */
-#define PWM_FREQ_HZ 210
+#define PWM_FREQ_HZ (66*1000) /* 66 KHZ */
#define PWM_LEVEL 15
#define PWM_PERIOD_USEC (USEC_PER_SEC / PWM_FREQ_HZ)
#define PWM_DUTY_LEVEL (PWM_PERIOD_USEC / PWM_LEVEL)
diff --git a/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker.c b/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker.c
index 54d48b8..7ac32b7 100644
--- a/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker.c
+++ b/drivers/video/msm/vidc/720p/resource_tracker/vcd_res_tracker.c
@@ -407,7 +407,7 @@
{
VCDRES_MSG_MED("\n res_trk_power_up():: "
"Calling AXI add requirement\n");
- ebi1_clk = clk_get(NULL, "mem_clk");
+ ebi1_clk = clk_get(resource_context.device, "mem_clk");
if (IS_ERR(ebi1_clk)) {
VCDRES_MSG_ERROR("Request AXI bus QOS fails.");
return false;
diff --git a/include/linux/eeprom_93cx6.h b/include/linux/eeprom_93cx6.h
index c4627cb..e50f98b 100644
--- a/include/linux/eeprom_93cx6.h
+++ b/include/linux/eeprom_93cx6.h
@@ -33,6 +33,7 @@
#define PCI_EEPROM_WIDTH_93C86 8
#define PCI_EEPROM_WIDTH_OPCODE 3
#define PCI_EEPROM_WRITE_OPCODE 0x05
+#define PCI_EEPROM_ERASE_OPCODE 0x07
#define PCI_EEPROM_READ_OPCODE 0x06
#define PCI_EEPROM_EWDS_OPCODE 0x10
#define PCI_EEPROM_EWEN_OPCODE 0x13
@@ -46,6 +47,7 @@
* @register_write(struct eeprom_93cx6 *eeprom): handler to
* write to the eeprom register by using all reg_* fields.
* @width: eeprom width, should be one of the PCI_EEPROM_WIDTH_* defines
+ * @drive_data: Set if we're driving the data line.
* @reg_data_in: register field to indicate data input
* @reg_data_out: register field to indicate data output
* @reg_data_clock: register field to set the data clock
@@ -62,6 +64,7 @@
int width;
+ char drive_data;
char reg_data_in;
char reg_data_out;
char reg_data_clock;
@@ -72,3 +75,8 @@
const u8 word, u16 *data);
extern void eeprom_93cx6_multiread(struct eeprom_93cx6 *eeprom,
const u8 word, __le16 *data, const u16 words);
+
+extern void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom, bool enable);
+
+extern void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom,
+ u8 addr, u16 data);
diff --git a/include/linux/i2c/atmel_mxt_ts.h b/include/linux/i2c/atmel_mxt_ts.h
index 6a1c918..c425343 100644
--- a/include/linux/i2c/atmel_mxt_ts.h
+++ b/include/linux/i2c/atmel_mxt_ts.h
@@ -3,6 +3,7 @@
*
* Copyright (C) 2010 Samsung Electronics Co.Ltd
* Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -30,18 +31,12 @@
const u8 *config;
size_t config_length;
- unsigned int x_line;
- unsigned int y_line;
unsigned int x_size;
unsigned int y_size;
- unsigned int blen;
- unsigned int threshold;
- unsigned int voltage;
- unsigned char orient;
unsigned long irqflags;
bool i2c_pull_up;
- u8(*read_chg) (void);
+ u8(*read_chg) (void);
int (*init_hw) (bool);
int (*power_on) (bool);
};
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 243d8e9..d03bc09 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -113,14 +113,18 @@
};
struct msi_desc;
+struct irq_domain;
/**
* struct irq_data - per irq and irq chip data passed down to chip functions
* @irq: interrupt number
+ * @hwirq: hardware interrupt number, local to the interrupt domain
* @node: node index useful for balancing
* @state_use_accessors: status information for irq chip functions.
* Use accessor functions to deal with it
* @chip: low level interrupt hardware access
+ * @domain: Interrupt translation domain; responsible for mapping
+ * between hwirq number and linux irq number.
* @handler_data: per-IRQ data for the irq_chip methods
* @chip_data: platform-specific per-chip private data for the chip
* methods, to allow shared chip implementations
@@ -133,9 +137,11 @@
*/
struct irq_data {
unsigned int irq;
+ unsigned long hwirq;
unsigned int node;
unsigned int state_use_accessors;
struct irq_chip *chip;
+ struct irq_domain *domain;
void *handler_data;
void *chip_data;
struct msi_desc *msi_desc;
diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
new file mode 100644
index 0000000..e807ad6
--- /dev/null
+++ b/include/linux/irqdomain.h
@@ -0,0 +1,91 @@
+/*
+ * irq_domain - IRQ translation domains
+ *
+ * Translation infrastructure between hw and linux irq numbers. This is
+ * helpful for interrupt controllers to implement mapping between hardware
+ * irq numbers and the Linux irq number space.
+ *
+ * irq_domains also have a hook for translating device tree interrupt
+ * representation into a hardware irq number that can be mapped back to a
+ * Linux irq number without any extra platform support code.
+ *
+ * irq_domain is expected to be embedded in an interrupt controller's private
+ * data structure.
+ */
+#ifndef _LINUX_IRQDOMAIN_H
+#define _LINUX_IRQDOMAIN_H
+
+#include <linux/irq.h>
+#include <linux/mod_devicetable.h>
+
+#ifdef CONFIG_IRQ_DOMAIN
+struct device_node;
+struct irq_domain;
+
+/**
+ * struct irq_domain_ops - Methods for irq_domain objects
+ * @to_irq: (optional) given a local hardware irq number, return the linux
+ * irq number. If to_irq is not implemented, then the irq_domain
+ * will use this translation: irq = (domain->irq_base + hwirq)
+ * @dt_translate: Given a device tree node and interrupt specifier, decode
+ * the hardware irq number and linux irq type value.
+ */
+struct irq_domain_ops {
+ unsigned int (*to_irq)(struct irq_domain *d, unsigned long hwirq);
+
+#ifdef CONFIG_OF
+ int (*dt_translate)(struct irq_domain *d, struct device_node *node,
+ const u32 *intspec, unsigned int intsize,
+ unsigned long *out_hwirq, unsigned int *out_type);
+#endif /* CONFIG_OF */
+};
+
+/**
+ * struct irq_domain - Hardware interrupt number translation object
+ * @list: Element in global irq_domain list.
+ * @irq_base: Start of irq_desc range assigned to the irq_domain. The creator
+ * of the irq_domain is responsible for allocating the array of
+ * irq_desc structures.
+ * @nr_irq: Number of irqs managed by the irq domain
+ * @ops: pointer to irq_domain methods
+ * @priv: private data pointer for use by owner. Not touched by irq_domain
+ * core code.
+ * @of_node: (optional) Pointer to device tree nodes associated with the
+ * irq_domain. Used when decoding device tree interrupt specifiers.
+ */
+struct irq_domain {
+ struct list_head list;
+ unsigned int irq_base;
+ unsigned int nr_irq;
+ const struct irq_domain_ops *ops;
+ void *priv;
+ struct device_node *of_node;
+};
+
+/**
+ * irq_domain_to_irq() - Translate from a hardware irq to a linux irq number
+ *
+ * Returns the linux irq number associated with a hardware irq. By default,
+ * the mapping is irq == domain->irq_base + hwirq, but this mapping can
+ * be overridden if the irq_domain implements a .to_irq() hook.
+ */
+static inline unsigned int irq_domain_to_irq(struct irq_domain *d,
+ unsigned long hwirq)
+{
+ return d->ops->to_irq ? d->ops->to_irq(d, hwirq) : d->irq_base + hwirq;
+}
+
+extern void irq_domain_add(struct irq_domain *domain);
+extern void irq_domain_del(struct irq_domain *domain);
+#endif /* CONFIG_IRQ_DOMAIN */
+
+#if defined(CONFIG_IRQ_DOMAIN) && defined(CONFIG_OF_IRQ)
+extern void irq_domain_add_simple(struct device_node *controller, int irq_base);
+extern void irq_domain_generate_simple(const struct of_device_id *match,
+ u64 phys_base, unsigned int irq_start);
+#else /* CONFIG_IRQ_DOMAIN && CONFIG_OF_IRQ */
+static inline void irq_domain_generate_simple(const struct of_device_id *match,
+ u64 phys_base, unsigned int irq_start) { }
+#endif /* CONFIG_IRQ_DOMAIN && CONFIG_OF_IRQ */
+
+#endif /* _LINUX_IRQDOMAIN_H */
diff --git a/include/linux/mfd/pm8xxx/pm8018.h b/include/linux/mfd/pm8xxx/pm8018.h
index 69e781c..1093409 100644
--- a/include/linux/mfd/pm8xxx/pm8018.h
+++ b/include/linux/mfd/pm8xxx/pm8018.h
@@ -27,6 +27,8 @@
#include <linux/mfd/pm8xxx/misc.h>
#include <linux/regulator/pm8018-regulator.h>
#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
+#include <linux/mfd/pm8xxx/pwm.h>
+#include <linux/leds-pm8xxx.h>
#define PM8018_CORE_DEV_NAME "pm8018-core"
@@ -65,6 +67,7 @@
struct pm8018_regulator_platform_data *regulator_pdatas;
struct pm8xxx_adc_platform_data *adc_pdata;
int num_regulators;
+ struct pm8xxx_led_platform_data *leds_pdata;
};
#endif
diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h
index e6955f5..cd2e61c 100644
--- a/include/linux/of_irq.h
+++ b/include/linux/of_irq.h
@@ -63,6 +63,9 @@
extern unsigned int irq_create_of_mapping(struct device_node *controller,
const u32 *intspec,
unsigned int intsize);
+#ifdef CONFIG_IRQ_DOMAIN
+extern void irq_dispose_mapping(unsigned int irq);
+#endif
extern int of_irq_to_resource(struct device_node *dev, int index,
struct resource *r);
extern int of_irq_count(struct device_node *dev);
@@ -70,6 +73,7 @@
struct resource *res, int nr_irqs);
extern struct device_node *of_irq_find_parent(struct device_node *child);
+
#endif /* CONFIG_OF_IRQ */
#endif /* CONFIG_OF */
#endif /* __OF_IRQ_H */
diff --git a/include/linux/rq_stats.h b/include/linux/rq_stats.h
new file mode 100644
index 0000000..e04063f
--- /dev/null
+++ b/include/linux/rq_stats.h
@@ -0,0 +1,31 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+struct rq_data {
+ unsigned int rq_avg;
+ unsigned long rq_poll_jiffies;
+ unsigned long def_timer_jiffies;
+ unsigned long rq_poll_last_jiffy;
+ unsigned long rq_poll_total_jiffies;
+ unsigned long def_timer_last_jiffy;
+ unsigned int def_interval;
+ int64_t def_start_time;
+ struct attribute_group *attr_group;
+ struct kobject *kobj;
+ struct work_struct def_timer_work;
+ int init;
+};
+
+extern spinlock_t rq_lock;
+extern struct rq_data rq_info;
+extern struct workqueue_struct *rq_wq;
diff --git a/include/media/radio-iris.h b/include/media/radio-iris.h
index 37ec48a..359668b 100644
--- a/include/media/radio-iris.h
+++ b/include/media/radio-iris.h
@@ -41,6 +41,9 @@
#define RADIO_HCI_EVENT_PKT 0x14
/*HCI reponce packets*/
#define MAX_RIVA_PEEK_RSP_SIZE 251
+/* default data access */
+#define DEFAULT_DATA_OFFSET 2
+#define DEFAULT_DATA_SIZE 249
/* HCI timeouts */
#define RADIO_HCI_TIMEOUT (10000) /* 10 seconds */
@@ -292,11 +295,14 @@
struct hci_fm_def_data_rd_req {
__u8 mode;
__u8 length;
+ __u8 param_len;
+ __u8 param;
} __packed;
struct hci_fm_def_data_wr_req {
- struct hci_fm_def_data_rd_req data_rd;
- __u8 data[256];
+ __u8 mode;
+ __u8 length;
+ __u8 data[DEFAULT_DATA_SIZE];
} __packed;
struct hci_fm_riva_data {
@@ -447,7 +453,7 @@
struct hci_fm_data_rd_rsp {
__u8 status;
__u8 ret_data_len;
- __u8 data[256];
+ __u8 data[DEFAULT_DATA_SIZE];
} __packed;
struct hci_fm_feature_list_rsp {
@@ -540,6 +546,9 @@
V4L2_CID_PRIVATE_IRIS_TX_TONE,
V4L2_CID_PRIVATE_IRIS_RDS_GRP_COUNTERS,
V4L2_CID_PRIVATE_IRIS_SET_NOTCH_FILTER,/*0x8000028*/
+ V4L2_CID_PRIVATE_IRIS_READ_DEFAULT = 0x00980928,/*using private CIDs
+ under userclass*/
+ V4L2_CID_PRIVATE_IRIS_WRITE_DEFAULT,
};
@@ -606,6 +615,7 @@
IRIS_BUF_PEEK,
IRIS_BUF_SSBI_PEEK,
IRIS_BUF_RDS_CNTRS,
+ IRIS_BUF_RD_DEFAULT,
IRIS_BUF_MAX
};
@@ -702,6 +712,7 @@
#define RIVA_PEEK_PARAM 0x6
#define RIVA_PEEK_LEN_OFSET 0x6
#define SSBI_PEEK_LEN 0x01
+
int hci_def_data_read(struct hci_fm_def_data_rd_req *arg,
struct radio_hci_dev *hdev);
int hci_def_data_write(struct hci_fm_def_data_wr_req *arg,
diff --git a/include/media/tavarua.h b/include/media/tavarua.h
index ad9eafb..aafa5d0 100644
--- a/include/media/tavarua.h
+++ b/include/media/tavarua.h
@@ -145,7 +145,9 @@
* Here We have IOCTl's that are specifici to IRIS
* (V4L2_CID_PRIVATE_BASE+0x1D--V4L2_CID_PRIVATE_BASE+0x27)
*/
- V4L2_CID_PRIVATE_TAVARUA_SET_NOTCH_FILTER = V4L2_CID_PRIVATE_BASE + 0x28
+ V4L2_CID_PRIVATE_TAVARUA_SET_NOTCH_FILTER =
+ V4L2_CID_PRIVATE_BASE + 0x28,
+ V4L2_CID_PRIVATE_TAVARUA_SET_AUDIO_PATH
};
enum tavarua_buf_t {
@@ -305,6 +307,10 @@
RDS_AF_JUMP,
};
+enum audio_path {
+ FM_DIGITAL_PATH,
+ FM_ANALOG_PATH
+};
#define SRCH_MODE 0x07
#define SRCH_DIR 0x08 /* 0-up 1-down */
#define SCAN_DWELL 0x70
diff --git a/kernel/irq/Kconfig b/kernel/irq/Kconfig
index d1d051b3..5a38bf4 100644
--- a/kernel/irq/Kconfig
+++ b/kernel/irq/Kconfig
@@ -52,6 +52,10 @@
config GENERIC_IRQ_CHIP
bool
+# Generic irq_domain hw <--> linux irq number translation
+config IRQ_DOMAIN
+ bool
+
# Support forced irq threading
config IRQ_FORCED_THREADING
bool
diff --git a/kernel/irq/Makefile b/kernel/irq/Makefile
index 7329005..fff1738 100644
--- a/kernel/irq/Makefile
+++ b/kernel/irq/Makefile
@@ -2,6 +2,7 @@
obj-y := irqdesc.o handle.o manage.o spurious.o resend.o chip.o dummychip.o devres.o
obj-$(CONFIG_GENERIC_IRQ_CHIP) += generic-chip.o
obj-$(CONFIG_GENERIC_IRQ_PROBE) += autoprobe.o
+obj-$(CONFIG_IRQ_DOMAIN) += irqdomain.o
obj-$(CONFIG_PROC_FS) += proc.o
obj-$(CONFIG_GENERIC_PENDING_IRQ) += migration.o
obj-$(CONFIG_PM_SLEEP) += pm.o
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index dc154f2..45e149c 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -396,7 +396,8 @@
* then mask it and get out of here:
*/
if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
- desc->istate |= IRQS_PENDING;
+ if (!irq_settings_is_level(desc))
+ desc->istate |= IRQS_PENDING;
mask_irq(desc);
goto out;
}
diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
new file mode 100644
index 0000000..d5828da
--- /dev/null
+++ b/kernel/irq/irqdomain.c
@@ -0,0 +1,180 @@
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+
+static LIST_HEAD(irq_domain_list);
+static DEFINE_MUTEX(irq_domain_mutex);
+
+/**
+ * irq_domain_add() - Register an irq_domain
+ * @domain: ptr to initialized irq_domain structure
+ *
+ * Registers an irq_domain structure. The irq_domain must at a minimum be
+ * initialized with an ops structure pointer, and either a ->to_irq hook or
+ * a valid irq_base value. Everything else is optional.
+ */
+void irq_domain_add(struct irq_domain *domain)
+{
+ struct irq_data *d;
+ int hwirq;
+
+ /*
+ * This assumes that the irq_domain owner has already allocated
+ * the irq_descs. This block will be removed when support for dynamic
+ * allocation of irq_descs is added to irq_domain.
+ */
+ for (hwirq = 0; hwirq < domain->nr_irq; hwirq++) {
+ d = irq_get_irq_data(irq_domain_to_irq(domain, hwirq));
+ if (d || d->domain) {
+ /* things are broken; just report, don't clean up */
+ WARN(1, "error: irq_desc already assigned to a domain");
+ return;
+ }
+ d->domain = domain;
+ d->hwirq = hwirq;
+ }
+
+ mutex_lock(&irq_domain_mutex);
+ list_add(&domain->list, &irq_domain_list);
+ mutex_unlock(&irq_domain_mutex);
+}
+
+/**
+ * irq_domain_del() - Unregister an irq_domain
+ * @domain: ptr to registered irq_domain.
+ */
+void irq_domain_del(struct irq_domain *domain)
+{
+ struct irq_data *d;
+ int hwirq;
+
+ mutex_lock(&irq_domain_mutex);
+ list_del(&domain->list);
+ mutex_unlock(&irq_domain_mutex);
+
+ /* Clear the irq_domain assignments */
+ for (hwirq = 0; hwirq < domain->nr_irq; hwirq++) {
+ d = irq_get_irq_data(irq_domain_to_irq(domain, hwirq));
+ d->domain = NULL;
+ }
+}
+
+#if defined(CONFIG_OF_IRQ)
+/**
+ * irq_create_of_mapping() - Map a linux irq number from a DT interrupt spec
+ *
+ * Used by the device tree interrupt mapping code to translate a device tree
+ * interrupt specifier to a valid linux irq number. Returns either a valid
+ * linux IRQ number or 0.
+ *
+ * When the caller no longer need the irq number returned by this function it
+ * should arrange to call irq_dispose_mapping().
+ */
+unsigned int irq_create_of_mapping(struct device_node *controller,
+ const u32 *intspec, unsigned int intsize)
+{
+ struct irq_domain *domain;
+ unsigned long hwirq;
+ unsigned int irq, type;
+ int rc = -EINVAL;
+
+ /* Find a domain which can translate the irq spec */
+ mutex_lock(&irq_domain_mutex);
+ list_for_each_entry(domain, &irq_domain_list, list) {
+ if (!domain->ops->dt_translate)
+ continue;
+ rc = domain->ops->dt_translate(domain, controller,
+ intspec, intsize, &hwirq, &type);
+ if (rc == 0)
+ break;
+ }
+ mutex_unlock(&irq_domain_mutex);
+
+ if (rc != 0)
+ return 0;
+
+ irq = irq_domain_to_irq(domain, hwirq);
+ if (type != IRQ_TYPE_NONE)
+ irq_set_irq_type(irq, type);
+ pr_debug("%s: mapped hwirq=%i to irq=%i, flags=%x\n",
+ controller->full_name, (int)hwirq, irq, type);
+ return irq;
+}
+EXPORT_SYMBOL_GPL(irq_create_of_mapping);
+
+/**
+ * irq_dispose_mapping() - Discard a mapping created by irq_create_of_mapping()
+ * @irq: linux irq number to be discarded
+ *
+ * Calling this function indicates the caller no longer needs a reference to
+ * the linux irq number returned by a prior call to irq_create_of_mapping().
+ */
+void irq_dispose_mapping(unsigned int irq)
+{
+ /*
+ * nothing yet; will be filled when support for dynamic allocation of
+ * irq_descs is added to irq_domain
+ */
+}
+EXPORT_SYMBOL_GPL(irq_dispose_mapping);
+
+int irq_domain_simple_dt_translate(struct irq_domain *d,
+ struct device_node *controller,
+ const u32 *intspec, unsigned int intsize,
+ unsigned long *out_hwirq, unsigned int *out_type)
+{
+ if (d->of_node != controller)
+ return -EINVAL;
+ if (intsize < 1)
+ return -EINVAL;
+
+ *out_hwirq = intspec[0];
+ *out_type = IRQ_TYPE_NONE;
+ if (intsize > 1)
+ *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
+ return 0;
+}
+
+struct irq_domain_ops irq_domain_simple_ops = {
+ .dt_translate = irq_domain_simple_dt_translate,
+};
+EXPORT_SYMBOL_GPL(irq_domain_simple_ops);
+
+/**
+ * irq_domain_create_simple() - Set up a 'simple' translation range
+ */
+void irq_domain_add_simple(struct device_node *controller, int irq_base)
+{
+ struct irq_domain *domain;
+
+ domain = kzalloc(sizeof(*domain), GFP_KERNEL);
+ if (!domain) {
+ WARN_ON(1);
+ return;
+ }
+
+ domain->irq_base = irq_base;
+ domain->of_node = of_node_get(controller);
+ domain->ops = &irq_domain_simple_ops;
+ irq_domain_add(domain);
+}
+EXPORT_SYMBOL_GPL(irq_domain_add_simple);
+
+void irq_domain_generate_simple(const struct of_device_id *match,
+ u64 phys_base, unsigned int irq_start)
+{
+ struct device_node *node;
+ pr_info("looking for phys_base=%llx, irq_start=%i\n",
+ (unsigned long long) phys_base, (int) irq_start);
+ node = of_find_matching_node_by_address(NULL, match, phys_base);
+ if (node)
+ irq_domain_add_simple(node, irq_start);
+ else
+ pr_info("no node found\n");
+}
+EXPORT_SYMBOL_GPL(irq_domain_generate_simple);
+#endif /* CONFIG_OF_IRQ */
diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c
index d5097c4..2480d18 100644
--- a/kernel/time/tick-sched.c
+++ b/kernel/time/tick-sched.c
@@ -20,11 +20,17 @@
#include <linux/profile.h>
#include <linux/sched.h>
#include <linux/module.h>
+#include <linux/rq_stats.h>
#include <asm/irq_regs.h>
#include "tick-internal.h"
+
+struct rq_data rq_info;
+struct workqueue_struct *rq_wq;
+spinlock_t rq_lock;
+
/*
* Per cpu nohz control structure
*/
@@ -711,6 +717,50 @@
* High resolution timer specific code
*/
#ifdef CONFIG_HIGH_RES_TIMERS
+static void update_rq_stats(void)
+{
+ unsigned long jiffy_gap = 0;
+ unsigned int rq_avg = 0;
+ unsigned long flags = 0;
+
+ jiffy_gap = jiffies - rq_info.rq_poll_last_jiffy;
+
+ if (jiffy_gap >= rq_info.rq_poll_jiffies) {
+
+ spin_lock_irqsave(&rq_lock, flags);
+
+ if (!rq_info.rq_avg)
+ rq_info.rq_poll_total_jiffies = 0;
+
+ rq_avg = nr_running() * 10;
+
+ if (rq_info.rq_poll_total_jiffies) {
+ rq_avg = (rq_avg * jiffy_gap) +
+ (rq_info.rq_avg *
+ rq_info.rq_poll_total_jiffies);
+ do_div(rq_avg,
+ rq_info.rq_poll_total_jiffies + jiffy_gap);
+ }
+
+ rq_info.rq_avg = rq_avg;
+ rq_info.rq_poll_total_jiffies += jiffy_gap;
+ rq_info.rq_poll_last_jiffy = jiffies;
+
+ spin_unlock_irqrestore(&rq_lock, flags);
+ }
+}
+
+static void wakeup_user(void)
+{
+ unsigned long jiffy_gap;
+
+ jiffy_gap = jiffies - rq_info.def_timer_last_jiffy;
+
+ if (jiffy_gap >= rq_info.def_timer_jiffies) {
+ rq_info.def_timer_last_jiffy = jiffies;
+ queue_work(rq_wq, &rq_info.def_timer_work);
+ }
+}
/*
* We rearm the timer until we get disabled by the idle code.
* Called with interrupts disabled and timer->base->cpu_base->lock held.
@@ -758,6 +808,20 @@
}
update_process_times(user_mode(regs));
profile_tick(CPU_PROFILING);
+
+
+ if ((rq_info.init == 1) && (cpu == 0)) {
+
+ /*
+ * update run queue statistics
+ */
+ update_rq_stats();
+
+ /*
+ * wakeup user if needed
+ */
+ wakeup_user();
+ }
}
hrtimer_forward(timer, now, tick_period);
diff --git a/sound/soc/codecs/wcd9310.c b/sound/soc/codecs/wcd9310.c
index 0000869..649f219 100644
--- a/sound/soc/codecs/wcd9310.c
+++ b/sound/soc/codecs/wcd9310.c
@@ -191,6 +191,62 @@
SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
};
+/*cut of frequency for high pass filter*/
+static const char *cf_text[] = {
+ "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
+};
+
+static const struct soc_enum cf_dec1_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec2_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec3_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec4_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec5_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec6_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec7_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec8_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec9_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_dec10_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
+
+static const struct soc_enum cf_rxmix1_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix2_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix3_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix4_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix5_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
+;
+static const struct soc_enum cf_rxmix6_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
+
+static const struct soc_enum cf_rxmix7_enum =
+ SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
+
static const struct snd_kcontrol_new tabla_snd_controls[] = {
SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
@@ -273,6 +329,43 @@
SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
tabla_put_anc_slot),
+ SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
+ SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
+ SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
+ SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
+ SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
+ SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
+ SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
+ SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
+ SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
+ SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
+
+ SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
+ SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
+
+ SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
+ SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
+
+ SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
+ SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
+ SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
+ SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
+ SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
+ SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
+ SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
};
static const char *rx_mix1_text[] = {
diff --git a/sound/soc/msm/msm-pcm-lpa.c b/sound/soc/msm/msm-pcm-lpa.c
index 2719d22..8a44a56 100644
--- a/sound/soc/msm/msm-pcm-lpa.c
+++ b/sound/soc/msm/msm-pcm-lpa.c
@@ -78,7 +78,7 @@
struct snd_pcm_substream *substream = prtd->substream;
struct snd_pcm_runtime *runtime = substream->runtime;
struct audio_aio_write_param param;
- struct audio_buffer *buf = prtd->audio_client->port[IN].buf;
+ struct audio_buffer *buf = NULL;
unsigned long flag = 0;
int i = 0;
@@ -102,6 +102,7 @@
pr_debug("%s:writing %d bytes of buffer to dsp 2\n",
__func__, prtd->pcm_count);
+ buf = prtd->audio_client->port[IN].buf;
param.paddr = (unsigned long)buf[0].phys
+ (prtd->out_head * prtd->pcm_count);
param.len = prtd->pcm_count;
@@ -135,6 +136,7 @@
pr_debug("%s:writing %d bytes"
" of buffer to dsp\n",
__func__, prtd->pcm_count);
+ buf = prtd->audio_client->port[IN].buf;
param.paddr = (unsigned long)buf[prtd->out_head].phys;
param.len = prtd->pcm_count;
param.msw_ts = 0;
@@ -341,6 +343,7 @@
dir = IN;
lpa_audio.prtd = NULL;
+ q6asm_cmd(prtd->audio_client, CMD_CLOSE);
q6asm_audio_client_buf_free_contiguous(dir,
prtd->audio_client);
@@ -348,7 +351,6 @@
msm_pcm_routing_dereg_phy_stream(soc_prtd->dai_link->be_id,
SNDRV_PCM_STREAM_PLAYBACK);
pr_debug("%s\n", __func__);
- q6asm_cmd(prtd->audio_client, CMD_CLOSE);
q6asm_audio_client_free(prtd->audio_client);
kfree(prtd);
diff --git a/sound/soc/msm/msm8960.c b/sound/soc/msm/msm8960.c
index bbb0789..5e81e0f 100644
--- a/sound/soc/msm/msm8960.c
+++ b/sound/soc/msm/msm8960.c
@@ -229,10 +229,17 @@
struct snd_soc_dapm_context *dapm = &codec->dapm;
pr_debug("%s: msm8960_spk_control = %d", __func__, msm8960_spk_control);
- if (msm8960_spk_control == MSM8960_SPK_ON)
- snd_soc_dapm_enable_pin(dapm, "Ext Spk");
- else
- snd_soc_dapm_disable_pin(dapm, "Ext Spk");
+ if (msm8960_spk_control == MSM8960_SPK_ON) {
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Neg");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Neg");
+ } else {
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Bottom Pos");
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Bottom Neg");
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Top Pos");
+ snd_soc_dapm_disable_pin(dapm, "Ext Spk Top Neg");
+ }
snd_soc_dapm_sync(dapm);
}
@@ -581,7 +588,10 @@
snd_soc_dapm_add_routes(dapm, common_audio_map,
ARRAY_SIZE(common_audio_map));
- snd_soc_dapm_enable_pin(dapm, "Ext Spk");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Neg");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Pos");
+ snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Neg");
snd_soc_dapm_sync(dapm);