usb: msm72k_udc: Delete prime timer after active status bit clear
Delete prime timer once active status bit is cleared instead
of deleting prime timer before checking active status bit clear
in the interrupt handler. This avoids the case where repriming
endpoint is not happening if there is actual prime failure.
For Ex: There are two requests queued to HW and interrupt got
triggered after first request processed. In handle_endpoint,
dequeue first req and check for active status bit of second req.
If cleared, dequeue it and queue next bunch of requests and start
timer. Then interrupt comes for second req completion and in the
handler, deletes timer which prevents repriming the endpoint in case
there is prime failure after second bunch of reqs queued to HW.
CRs-fixed: 322196
CRs-fixed: 317926
Change-Id: Ib6aa000e576dbd84bc4e075fce3b58bf1a538a2b
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
1 file changed