tree b31a0bb763c731e380d23abc290f09d620745810
parent a861beb1401d65e3f095fee074c13645ab06490e
author Sergei Shtylyov <sshtylyov@ru.mvista.com> 1215538042 +0200
committer Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> 1215538042 +0200

palm_bk3710: fix IDECLK period calculation

The driver uses completely bogus rounding formula for calculating period from
the IDECLK frequency which gives one-off period values (e.g. 11 ns with 100 MHz
IDECLK) which in turn can lead to overclocked IDE transfer timings.  Actually,
rounding is just wrong in this case, so use a mere division for a safe result.

While at it, also:

- give 'ide_palm_clk' variable a more suitable name;

- get rid of the useless 'ideclkp' variable;

- drop the LISP stype 'p' postfix from the 'clkp' variable's name. :-)

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: mcherkashin@ru.mvista.com
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>