David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 1 | /* |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 2 | * rtc-twl.c -- TWL Real Time Clock interface |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2007 MontaVista Software, Inc |
| 5 | * Author: Alexandre Rusev <source@mvista.com> |
| 6 | * |
| 7 | * Based on original TI driver twl4030-rtc.c |
| 8 | * Copyright (C) 2006 Texas Instruments, Inc. |
| 9 | * |
| 10 | * Based on rtc-omap.c |
| 11 | * Copyright (C) 2003 MontaVista Software, Inc. |
| 12 | * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com> |
| 13 | * Copyright (C) 2006 David Brownell |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or |
| 16 | * modify it under the terms of the GNU General Public License |
| 17 | * as published by the Free Software Foundation; either version |
| 18 | * 2 of the License, or (at your option) any later version. |
| 19 | */ |
| 20 | |
| 21 | #include <linux/kernel.h> |
Anton Vorontsov | 2fac667 | 2009-01-06 14:42:11 -0800 | [diff] [blame] | 22 | #include <linux/errno.h> |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 23 | #include <linux/init.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/types.h> |
| 26 | #include <linux/rtc.h> |
| 27 | #include <linux/bcd.h> |
| 28 | #include <linux/platform_device.h> |
| 29 | #include <linux/interrupt.h> |
| 30 | |
Santosh Shilimkar | b07682b | 2009-12-13 20:05:51 +0100 | [diff] [blame] | 31 | #include <linux/i2c/twl.h> |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 32 | |
| 33 | |
| 34 | /* |
| 35 | * RTC block register offsets (use TWL_MODULE_RTC) |
| 36 | */ |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 37 | enum { |
| 38 | REG_SECONDS_REG = 0, |
| 39 | REG_MINUTES_REG, |
| 40 | REG_HOURS_REG, |
| 41 | REG_DAYS_REG, |
| 42 | REG_MONTHS_REG, |
| 43 | REG_YEARS_REG, |
| 44 | REG_WEEKS_REG, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 45 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 46 | REG_ALARM_SECONDS_REG, |
| 47 | REG_ALARM_MINUTES_REG, |
| 48 | REG_ALARM_HOURS_REG, |
| 49 | REG_ALARM_DAYS_REG, |
| 50 | REG_ALARM_MONTHS_REG, |
| 51 | REG_ALARM_YEARS_REG, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 52 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 53 | REG_RTC_CTRL_REG, |
| 54 | REG_RTC_STATUS_REG, |
| 55 | REG_RTC_INTERRUPTS_REG, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 56 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 57 | REG_RTC_COMP_LSB_REG, |
| 58 | REG_RTC_COMP_MSB_REG, |
| 59 | }; |
Tobias Klauser | 2e84067 | 2010-03-05 13:44:23 -0800 | [diff] [blame] | 60 | static const u8 twl4030_rtc_reg_map[] = { |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 61 | [REG_SECONDS_REG] = 0x00, |
| 62 | [REG_MINUTES_REG] = 0x01, |
| 63 | [REG_HOURS_REG] = 0x02, |
| 64 | [REG_DAYS_REG] = 0x03, |
| 65 | [REG_MONTHS_REG] = 0x04, |
| 66 | [REG_YEARS_REG] = 0x05, |
| 67 | [REG_WEEKS_REG] = 0x06, |
| 68 | |
| 69 | [REG_ALARM_SECONDS_REG] = 0x07, |
| 70 | [REG_ALARM_MINUTES_REG] = 0x08, |
| 71 | [REG_ALARM_HOURS_REG] = 0x09, |
| 72 | [REG_ALARM_DAYS_REG] = 0x0A, |
| 73 | [REG_ALARM_MONTHS_REG] = 0x0B, |
| 74 | [REG_ALARM_YEARS_REG] = 0x0C, |
| 75 | |
| 76 | [REG_RTC_CTRL_REG] = 0x0D, |
| 77 | [REG_RTC_STATUS_REG] = 0x0E, |
| 78 | [REG_RTC_INTERRUPTS_REG] = 0x0F, |
| 79 | |
| 80 | [REG_RTC_COMP_LSB_REG] = 0x10, |
| 81 | [REG_RTC_COMP_MSB_REG] = 0x11, |
| 82 | }; |
Tobias Klauser | 2e84067 | 2010-03-05 13:44:23 -0800 | [diff] [blame] | 83 | static const u8 twl6030_rtc_reg_map[] = { |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 84 | [REG_SECONDS_REG] = 0x00, |
| 85 | [REG_MINUTES_REG] = 0x01, |
| 86 | [REG_HOURS_REG] = 0x02, |
| 87 | [REG_DAYS_REG] = 0x03, |
| 88 | [REG_MONTHS_REG] = 0x04, |
| 89 | [REG_YEARS_REG] = 0x05, |
| 90 | [REG_WEEKS_REG] = 0x06, |
| 91 | |
| 92 | [REG_ALARM_SECONDS_REG] = 0x08, |
| 93 | [REG_ALARM_MINUTES_REG] = 0x09, |
| 94 | [REG_ALARM_HOURS_REG] = 0x0A, |
| 95 | [REG_ALARM_DAYS_REG] = 0x0B, |
| 96 | [REG_ALARM_MONTHS_REG] = 0x0C, |
| 97 | [REG_ALARM_YEARS_REG] = 0x0D, |
| 98 | |
| 99 | [REG_RTC_CTRL_REG] = 0x10, |
| 100 | [REG_RTC_STATUS_REG] = 0x11, |
| 101 | [REG_RTC_INTERRUPTS_REG] = 0x12, |
| 102 | |
| 103 | [REG_RTC_COMP_LSB_REG] = 0x13, |
| 104 | [REG_RTC_COMP_MSB_REG] = 0x14, |
| 105 | }; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 106 | |
| 107 | /* RTC_CTRL_REG bitfields */ |
| 108 | #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01 |
| 109 | #define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02 |
| 110 | #define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04 |
| 111 | #define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08 |
| 112 | #define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10 |
| 113 | #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20 |
| 114 | #define BIT_RTC_CTRL_REG_GET_TIME_M 0x40 |
| 115 | |
| 116 | /* RTC_STATUS_REG bitfields */ |
| 117 | #define BIT_RTC_STATUS_REG_RUN_M 0x02 |
| 118 | #define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04 |
| 119 | #define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08 |
| 120 | #define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10 |
| 121 | #define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20 |
| 122 | #define BIT_RTC_STATUS_REG_ALARM_M 0x40 |
| 123 | #define BIT_RTC_STATUS_REG_POWER_UP_M 0x80 |
| 124 | |
| 125 | /* RTC_INTERRUPTS_REG bitfields */ |
| 126 | #define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03 |
| 127 | #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04 |
| 128 | #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08 |
| 129 | |
| 130 | |
| 131 | /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */ |
| 132 | #define ALL_TIME_REGS 6 |
| 133 | |
| 134 | /*----------------------------------------------------------------------*/ |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 135 | static u8 *rtc_reg_map; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 136 | |
| 137 | /* |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 138 | * Supports 1 byte read from TWL RTC register. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 139 | */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 140 | static int twl_rtc_read_u8(u8 *data, u8 reg) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 141 | { |
| 142 | int ret; |
| 143 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 144 | ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg])); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 145 | if (ret < 0) |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 146 | pr_err("twl_rtc: Could not read TWL" |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 147 | "register %X - error %d\n", reg, ret); |
| 148 | return ret; |
| 149 | } |
| 150 | |
| 151 | /* |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 152 | * Supports 1 byte write to TWL RTC registers. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 153 | */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 154 | static int twl_rtc_write_u8(u8 data, u8 reg) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 155 | { |
| 156 | int ret; |
| 157 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 158 | ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg])); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 159 | if (ret < 0) |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 160 | pr_err("twl_rtc: Could not write TWL" |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 161 | "register %X - error %d\n", reg, ret); |
| 162 | return ret; |
| 163 | } |
| 164 | |
| 165 | /* |
| 166 | * Cache the value for timer/alarm interrupts register; this is |
| 167 | * only changed by callers holding rtc ops lock (or resume). |
| 168 | */ |
| 169 | static unsigned char rtc_irq_bits; |
| 170 | |
| 171 | /* |
Alessandro Zummo | a748384 | 2009-01-15 13:50:52 -0800 | [diff] [blame] | 172 | * Enable 1/second update and/or alarm interrupts. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 173 | */ |
| 174 | static int set_rtc_irq_bit(unsigned char bit) |
| 175 | { |
| 176 | unsigned char val; |
| 177 | int ret; |
| 178 | |
| 179 | val = rtc_irq_bits | bit; |
Alessandro Zummo | a748384 | 2009-01-15 13:50:52 -0800 | [diff] [blame] | 180 | val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M; |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 181 | ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 182 | if (ret == 0) |
| 183 | rtc_irq_bits = val; |
| 184 | |
| 185 | return ret; |
| 186 | } |
| 187 | |
| 188 | /* |
Alessandro Zummo | a748384 | 2009-01-15 13:50:52 -0800 | [diff] [blame] | 189 | * Disable update and/or alarm interrupts. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 190 | */ |
| 191 | static int mask_rtc_irq_bit(unsigned char bit) |
| 192 | { |
| 193 | unsigned char val; |
| 194 | int ret; |
| 195 | |
| 196 | val = rtc_irq_bits & ~bit; |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 197 | ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 198 | if (ret == 0) |
| 199 | rtc_irq_bits = val; |
| 200 | |
| 201 | return ret; |
| 202 | } |
| 203 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 204 | static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 205 | { |
| 206 | int ret; |
| 207 | |
| 208 | if (enabled) |
| 209 | ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); |
| 210 | else |
| 211 | ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); |
| 212 | |
| 213 | return ret; |
| 214 | } |
| 215 | |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 216 | /* |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 217 | * Gets current TWL RTC time and date parameters. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 218 | * |
| 219 | * The RTC's time/alarm representation is not what gmtime(3) requires |
| 220 | * Linux to use: |
| 221 | * |
| 222 | * - Months are 1..12 vs Linux 0-11 |
| 223 | * - Years are 0..99 vs Linux 1900..N (we assume 21st century) |
| 224 | */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 225 | static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 226 | { |
| 227 | unsigned char rtc_data[ALL_TIME_REGS + 1]; |
| 228 | int ret; |
| 229 | u8 save_control; |
| 230 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 231 | ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 232 | if (ret < 0) |
| 233 | return ret; |
| 234 | |
| 235 | save_control |= BIT_RTC_CTRL_REG_GET_TIME_M; |
| 236 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 237 | ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 238 | if (ret < 0) |
| 239 | return ret; |
| 240 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 241 | ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data, |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 242 | (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 243 | |
| 244 | if (ret < 0) { |
| 245 | dev_err(dev, "rtc_read_time error %d\n", ret); |
| 246 | return ret; |
| 247 | } |
| 248 | |
| 249 | tm->tm_sec = bcd2bin(rtc_data[0]); |
| 250 | tm->tm_min = bcd2bin(rtc_data[1]); |
| 251 | tm->tm_hour = bcd2bin(rtc_data[2]); |
| 252 | tm->tm_mday = bcd2bin(rtc_data[3]); |
| 253 | tm->tm_mon = bcd2bin(rtc_data[4]) - 1; |
| 254 | tm->tm_year = bcd2bin(rtc_data[5]) + 100; |
| 255 | |
| 256 | return ret; |
| 257 | } |
| 258 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 259 | static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 260 | { |
| 261 | unsigned char save_control; |
| 262 | unsigned char rtc_data[ALL_TIME_REGS + 1]; |
| 263 | int ret; |
| 264 | |
| 265 | rtc_data[1] = bin2bcd(tm->tm_sec); |
| 266 | rtc_data[2] = bin2bcd(tm->tm_min); |
| 267 | rtc_data[3] = bin2bcd(tm->tm_hour); |
| 268 | rtc_data[4] = bin2bcd(tm->tm_mday); |
| 269 | rtc_data[5] = bin2bcd(tm->tm_mon + 1); |
| 270 | rtc_data[6] = bin2bcd(tm->tm_year - 100); |
| 271 | |
| 272 | /* Stop RTC while updating the TC registers */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 273 | ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 274 | if (ret < 0) |
| 275 | goto out; |
| 276 | |
| 277 | save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M; |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 278 | twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 279 | if (ret < 0) |
| 280 | goto out; |
| 281 | |
| 282 | /* update all the time registers in one shot */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 283 | ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data, |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 284 | (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 285 | if (ret < 0) { |
| 286 | dev_err(dev, "rtc_set_time error %d\n", ret); |
| 287 | goto out; |
| 288 | } |
| 289 | |
| 290 | /* Start back RTC */ |
| 291 | save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M; |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 292 | ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 293 | |
| 294 | out: |
| 295 | return ret; |
| 296 | } |
| 297 | |
| 298 | /* |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 299 | * Gets current TWL RTC alarm time. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 300 | */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 301 | static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 302 | { |
| 303 | unsigned char rtc_data[ALL_TIME_REGS + 1]; |
| 304 | int ret; |
| 305 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 306 | ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data, |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 307 | (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 308 | if (ret < 0) { |
| 309 | dev_err(dev, "rtc_read_alarm error %d\n", ret); |
| 310 | return ret; |
| 311 | } |
| 312 | |
| 313 | /* some of these fields may be wildcard/"match all" */ |
| 314 | alm->time.tm_sec = bcd2bin(rtc_data[0]); |
| 315 | alm->time.tm_min = bcd2bin(rtc_data[1]); |
| 316 | alm->time.tm_hour = bcd2bin(rtc_data[2]); |
| 317 | alm->time.tm_mday = bcd2bin(rtc_data[3]); |
| 318 | alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1; |
| 319 | alm->time.tm_year = bcd2bin(rtc_data[5]) + 100; |
| 320 | |
| 321 | /* report cached alarm enable state */ |
| 322 | if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M) |
| 323 | alm->enabled = 1; |
| 324 | |
| 325 | return ret; |
| 326 | } |
| 327 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 328 | static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 329 | { |
| 330 | unsigned char alarm_data[ALL_TIME_REGS + 1]; |
| 331 | int ret; |
| 332 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 333 | ret = twl_rtc_alarm_irq_enable(dev, 0); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 334 | if (ret) |
| 335 | goto out; |
| 336 | |
| 337 | alarm_data[1] = bin2bcd(alm->time.tm_sec); |
| 338 | alarm_data[2] = bin2bcd(alm->time.tm_min); |
| 339 | alarm_data[3] = bin2bcd(alm->time.tm_hour); |
| 340 | alarm_data[4] = bin2bcd(alm->time.tm_mday); |
| 341 | alarm_data[5] = bin2bcd(alm->time.tm_mon + 1); |
| 342 | alarm_data[6] = bin2bcd(alm->time.tm_year - 100); |
| 343 | |
| 344 | /* update all the alarm registers in one shot */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 345 | ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data, |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 346 | (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 347 | if (ret) { |
| 348 | dev_err(dev, "rtc_set_alarm error %d\n", ret); |
| 349 | goto out; |
| 350 | } |
| 351 | |
| 352 | if (alm->enabled) |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 353 | ret = twl_rtc_alarm_irq_enable(dev, 1); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 354 | out: |
| 355 | return ret; |
| 356 | } |
| 357 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 358 | static irqreturn_t twl_rtc_interrupt(int irq, void *rtc) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 359 | { |
| 360 | unsigned long events = 0; |
| 361 | int ret = IRQ_NONE; |
| 362 | int res; |
| 363 | u8 rd_reg; |
| 364 | |
| 365 | #ifdef CONFIG_LOCKDEP |
| 366 | /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which |
| 367 | * we don't want and can't tolerate. Although it might be |
| 368 | * friendlier not to borrow this thread context... |
| 369 | */ |
| 370 | local_irq_enable(); |
| 371 | #endif |
| 372 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 373 | res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 374 | if (res) |
| 375 | goto out; |
| 376 | /* |
| 377 | * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG. |
| 378 | * only one (ALARM or RTC) interrupt source may be enabled |
| 379 | * at time, we also could check our results |
| 380 | * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM] |
| 381 | */ |
| 382 | if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M) |
| 383 | events |= RTC_IRQF | RTC_AF; |
| 384 | else |
| 385 | events |= RTC_IRQF | RTC_UF; |
| 386 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 387 | res = twl_rtc_write_u8(rd_reg | BIT_RTC_STATUS_REG_ALARM_M, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 388 | REG_RTC_STATUS_REG); |
| 389 | if (res) |
| 390 | goto out; |
| 391 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 392 | if (twl_class_is_4030()) { |
| 393 | /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1 |
| 394 | * needs 2 reads to clear the interrupt. One read is done in |
| 395 | * do_twl_pwrirq(). Doing the second read, to clear |
| 396 | * the bit. |
| 397 | * |
| 398 | * FIXME the reason PWR_ISR1 needs an extra read is that |
| 399 | * RTC_IF retriggered until we cleared REG_ALARM_M above. |
| 400 | * But re-reading like this is a bad hack; by doing so we |
| 401 | * risk wrongly clearing status for some other IRQ (losing |
| 402 | * the interrupt). Be smarter about handling RTC_UF ... |
| 403 | */ |
| 404 | res = twl_i2c_read_u8(TWL4030_MODULE_INT, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 405 | &rd_reg, TWL4030_INT_PWR_ISR1); |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 406 | if (res) |
| 407 | goto out; |
| 408 | } |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 409 | |
| 410 | /* Notify RTC core on event */ |
| 411 | rtc_update_irq(rtc, 1, events); |
| 412 | |
| 413 | ret = IRQ_HANDLED; |
| 414 | out: |
| 415 | return ret; |
| 416 | } |
| 417 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 418 | static struct rtc_class_ops twl_rtc_ops = { |
| 419 | .read_time = twl_rtc_read_time, |
| 420 | .set_time = twl_rtc_set_time, |
| 421 | .read_alarm = twl_rtc_read_alarm, |
| 422 | .set_alarm = twl_rtc_set_alarm, |
| 423 | .alarm_irq_enable = twl_rtc_alarm_irq_enable, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 424 | }; |
| 425 | |
| 426 | /*----------------------------------------------------------------------*/ |
| 427 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 428 | static int __devinit twl_rtc_probe(struct platform_device *pdev) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 429 | { |
| 430 | struct rtc_device *rtc; |
| 431 | int ret = 0; |
| 432 | int irq = platform_get_irq(pdev, 0); |
| 433 | u8 rd_reg; |
| 434 | |
Anton Vorontsov | 2fac667 | 2009-01-06 14:42:11 -0800 | [diff] [blame] | 435 | if (irq <= 0) |
| 436 | return -EINVAL; |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 437 | |
| 438 | rtc = rtc_device_register(pdev->name, |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 439 | &pdev->dev, &twl_rtc_ops, THIS_MODULE); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 440 | if (IS_ERR(rtc)) { |
Alessandro Zummo | a748384 | 2009-01-15 13:50:52 -0800 | [diff] [blame] | 441 | ret = PTR_ERR(rtc); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 442 | dev_err(&pdev->dev, "can't register RTC device, err %ld\n", |
| 443 | PTR_ERR(rtc)); |
| 444 | goto out0; |
| 445 | |
| 446 | } |
| 447 | |
| 448 | platform_set_drvdata(pdev, rtc); |
| 449 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 450 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 451 | if (ret < 0) |
| 452 | goto out1; |
| 453 | |
| 454 | if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M) |
| 455 | dev_warn(&pdev->dev, "Power up reset detected.\n"); |
| 456 | |
| 457 | if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M) |
| 458 | dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n"); |
| 459 | |
| 460 | /* Clear RTC Power up reset and pending alarm interrupts */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 461 | ret = twl_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 462 | if (ret < 0) |
| 463 | goto out1; |
| 464 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 465 | ret = request_irq(irq, twl_rtc_interrupt, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 466 | IRQF_TRIGGER_RISING, |
Kay Sievers | 744bcb1 | 2009-03-24 16:38:22 -0700 | [diff] [blame] | 467 | dev_name(&rtc->dev), rtc); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 468 | if (ret < 0) { |
| 469 | dev_err(&pdev->dev, "IRQ is not free.\n"); |
| 470 | goto out1; |
| 471 | } |
| 472 | |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 473 | if (twl_class_is_6030()) { |
| 474 | twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, |
| 475 | REG_INT_MSK_LINE_A); |
| 476 | twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, |
| 477 | REG_INT_MSK_STS_A); |
| 478 | } |
| 479 | |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 480 | /* Check RTC module status, Enable if it is off */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 481 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 482 | if (ret < 0) |
| 483 | goto out2; |
| 484 | |
| 485 | if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) { |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 486 | dev_info(&pdev->dev, "Enabling TWL-RTC.\n"); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 487 | rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M; |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 488 | ret = twl_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 489 | if (ret < 0) |
| 490 | goto out2; |
| 491 | } |
| 492 | |
| 493 | /* init cached IRQ enable bits */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 494 | ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 495 | if (ret < 0) |
| 496 | goto out2; |
| 497 | |
| 498 | return ret; |
| 499 | |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 500 | out2: |
| 501 | free_irq(irq, rtc); |
| 502 | out1: |
| 503 | rtc_device_unregister(rtc); |
| 504 | out0: |
| 505 | return ret; |
| 506 | } |
| 507 | |
| 508 | /* |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 509 | * Disable all TWL RTC module interrupts. |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 510 | * Sets status flag to free. |
| 511 | */ |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 512 | static int __devexit twl_rtc_remove(struct platform_device *pdev) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 513 | { |
| 514 | /* leave rtc running, but disable irqs */ |
| 515 | struct rtc_device *rtc = platform_get_drvdata(pdev); |
| 516 | int irq = platform_get_irq(pdev, 0); |
| 517 | |
| 518 | mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); |
| 519 | mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 520 | if (twl_class_is_6030()) { |
| 521 | twl6030_interrupt_mask(TWL6030_RTC_INT_MASK, |
| 522 | REG_INT_MSK_LINE_A); |
| 523 | twl6030_interrupt_mask(TWL6030_RTC_INT_MASK, |
| 524 | REG_INT_MSK_STS_A); |
| 525 | } |
| 526 | |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 527 | |
| 528 | free_irq(irq, rtc); |
| 529 | |
| 530 | rtc_device_unregister(rtc); |
| 531 | platform_set_drvdata(pdev, NULL); |
| 532 | return 0; |
| 533 | } |
| 534 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 535 | static void twl_rtc_shutdown(struct platform_device *pdev) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 536 | { |
Matti Halme | cafa1d8 | 2009-01-15 13:50:56 -0800 | [diff] [blame] | 537 | /* mask timer interrupts, but leave alarm interrupts on to enable |
| 538 | power-on when alarm is triggered */ |
| 539 | mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 540 | } |
| 541 | |
| 542 | #ifdef CONFIG_PM |
| 543 | |
| 544 | static unsigned char irqstat; |
| 545 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 546 | static int twl_rtc_suspend(struct platform_device *pdev, pm_message_t state) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 547 | { |
| 548 | irqstat = rtc_irq_bits; |
| 549 | |
Kim Kyuwon | f993004 | 2009-05-12 13:19:38 -0700 | [diff] [blame] | 550 | mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 551 | return 0; |
| 552 | } |
| 553 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 554 | static int twl_rtc_resume(struct platform_device *pdev) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 555 | { |
| 556 | set_rtc_irq_bit(irqstat); |
| 557 | return 0; |
| 558 | } |
| 559 | |
| 560 | #else |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 561 | #define twl_rtc_suspend NULL |
| 562 | #define twl_rtc_resume NULL |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 563 | #endif |
| 564 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 565 | MODULE_ALIAS("platform:twl_rtc"); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 566 | |
| 567 | static struct platform_driver twl4030rtc_driver = { |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 568 | .probe = twl_rtc_probe, |
| 569 | .remove = __devexit_p(twl_rtc_remove), |
| 570 | .shutdown = twl_rtc_shutdown, |
| 571 | .suspend = twl_rtc_suspend, |
| 572 | .resume = twl_rtc_resume, |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 573 | .driver = { |
| 574 | .owner = THIS_MODULE, |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 575 | .name = "twl_rtc", |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 576 | }, |
| 577 | }; |
| 578 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 579 | static int __init twl_rtc_init(void) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 580 | { |
Balaji T K | a6b49ff | 2009-12-13 22:16:31 +0100 | [diff] [blame] | 581 | if (twl_class_is_4030()) |
| 582 | rtc_reg_map = (u8 *) twl4030_rtc_reg_map; |
| 583 | else |
| 584 | rtc_reg_map = (u8 *) twl6030_rtc_reg_map; |
| 585 | |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 586 | return platform_driver_register(&twl4030rtc_driver); |
| 587 | } |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 588 | module_init(twl_rtc_init); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 589 | |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 590 | static void __exit twl_rtc_exit(void) |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 591 | { |
| 592 | platform_driver_unregister(&twl4030rtc_driver); |
| 593 | } |
Balaji T K | ef3b7d0 | 2009-12-13 21:30:48 +0100 | [diff] [blame] | 594 | module_exit(twl_rtc_exit); |
David Brownell | f96411a | 2008-10-20 23:50:05 +0200 | [diff] [blame] | 595 | |
| 596 | MODULE_AUTHOR("Texas Instruments, MontaVista Software"); |
| 597 | MODULE_LICENSE("GPL"); |