blob: f6d9d1353dd54144aebb8541d85c572f073fac25 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* 8139cp.c: A Linux PCI Ethernet driver for the RealTek 8139C+ chips. */
2/*
3 Copyright 2001-2004 Jeff Garzik <jgarzik@pobox.com>
4
5 Copyright (C) 2001, 2002 David S. Miller (davem@redhat.com) [tg3.c]
6 Copyright (C) 2000, 2001 David S. Miller (davem@redhat.com) [sungem.c]
7 Copyright 2001 Manfred Spraul [natsemi.c]
8 Copyright 1999-2001 by Donald Becker. [natsemi.c]
9 Written 1997-2001 by Donald Becker. [8139too.c]
10 Copyright 1998-2001 by Jes Sorensen, <jes@trained-monkey.org>. [acenic.c]
11
12 This software may be used and distributed according to the terms of
13 the GNU General Public License (GPL), incorporated herein by reference.
14 Drivers based on or derived from this code fall under the GPL and must
15 retain the authorship, copyright and license notice. This file is not
16 a complete program and may only be used when the entire operating
17 system is licensed under the GPL.
18
19 See the file COPYING in this distribution for more information.
20
21 Contributors:
Jeff Garzikf3b197a2006-05-26 21:39:03 -040022
Linus Torvalds1da177e2005-04-16 15:20:36 -070023 Wake-on-LAN support - Felipe Damasio <felipewd@terra.com.br>
24 PCI suspend/resume - Felipe Damasio <felipewd@terra.com.br>
25 LinkChg interrupt - Felipe Damasio <felipewd@terra.com.br>
Jeff Garzikf3b197a2006-05-26 21:39:03 -040026
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 TODO:
28 * Test Tx checksumming thoroughly
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30 Low priority TODO:
31 * Complete reset on PciErr
32 * Consider Rx interrupt mitigation using TimerIntr
33 * Investigate using skb->priority with h/w VLAN priority
34 * Investigate using High Priority Tx Queue with skb->priority
35 * Adjust Rx FIFO threshold and Max Rx DMA burst on Rx FIFO error
36 * Adjust Tx FIFO threshold and Max Tx DMA burst on Tx FIFO error
37 * Implement Tx software interrupt mitigation via
38 Tx descriptor bit
39 * The real minimum of CP_MIN_MTU is 4 bytes. However,
40 for this to be supported, one must(?) turn on packet padding.
41 * Support external MII transceivers (patch available)
42
43 NOTES:
44 * TX checksumming is considered experimental. It is off by
45 default, use ethtool to turn it on.
46
47 */
48
49#define DRV_NAME "8139cp"
Andy Gospodarekd5b20692006-09-11 17:39:18 -040050#define DRV_VERSION "1.3"
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#define DRV_RELDATE "Mar 22, 2004"
52
53
Linus Torvalds1da177e2005-04-16 15:20:36 -070054#include <linux/module.h>
Stephen Hemmingere21ba282005-05-12 19:33:26 -040055#include <linux/moduleparam.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070056#include <linux/kernel.h>
57#include <linux/compiler.h>
58#include <linux/netdevice.h>
59#include <linux/etherdevice.h>
60#include <linux/init.h>
61#include <linux/pci.h>
Tobias Klauser8662d062005-05-12 22:19:39 -040062#include <linux/dma-mapping.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070063#include <linux/delay.h>
64#include <linux/ethtool.h>
65#include <linux/mii.h>
66#include <linux/if_vlan.h>
67#include <linux/crc32.h>
68#include <linux/in.h>
69#include <linux/ip.h>
70#include <linux/tcp.h>
71#include <linux/udp.h>
72#include <linux/cache.h>
73#include <asm/io.h>
74#include <asm/irq.h>
75#include <asm/uaccess.h>
76
77/* VLAN tagging feature enable/disable */
78#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
79#define CP_VLAN_TAG_USED 1
80#define CP_VLAN_TX_TAG(tx_desc,vlan_tag_value) \
Al Virocf983012007-08-22 21:18:56 -040081 do { (tx_desc)->opts2 = cpu_to_le32(vlan_tag_value); } while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070082#else
83#define CP_VLAN_TAG_USED 0
84#define CP_VLAN_TX_TAG(tx_desc,vlan_tag_value) \
85 do { (tx_desc)->opts2 = 0; } while (0)
86#endif
87
88/* These identify the driver base version and may not be removed. */
89static char version[] =
90KERN_INFO DRV_NAME ": 10/100 PCI Ethernet driver v" DRV_VERSION " (" DRV_RELDATE ")\n";
91
92MODULE_AUTHOR("Jeff Garzik <jgarzik@pobox.com>");
93MODULE_DESCRIPTION("RealTek RTL-8139C+ series 10/100 PCI Ethernet driver");
a78d8922005-05-12 19:35:42 -040094MODULE_VERSION(DRV_VERSION);
Linus Torvalds1da177e2005-04-16 15:20:36 -070095MODULE_LICENSE("GPL");
96
97static int debug = -1;
Stephen Hemmingere21ba282005-05-12 19:33:26 -040098module_param(debug, int, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -070099MODULE_PARM_DESC (debug, "8139cp: bitmapped message enable number");
100
101/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
102 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
103static int multicast_filter_limit = 32;
Stephen Hemmingere21ba282005-05-12 19:33:26 -0400104module_param(multicast_filter_limit, int, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105MODULE_PARM_DESC (multicast_filter_limit, "8139cp: maximum number of filtered multicast addresses");
106
107#define PFX DRV_NAME ": "
108
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109#define CP_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
110 NETIF_MSG_PROBE | \
111 NETIF_MSG_LINK)
112#define CP_NUM_STATS 14 /* struct cp_dma_stats, plus one */
113#define CP_STATS_SIZE 64 /* size in bytes of DMA stats block */
114#define CP_REGS_SIZE (0xff + 1)
115#define CP_REGS_VER 1 /* version 1 */
116#define CP_RX_RING_SIZE 64
117#define CP_TX_RING_SIZE 64
118#define CP_RING_BYTES \
119 ((sizeof(struct cp_desc) * CP_RX_RING_SIZE) + \
120 (sizeof(struct cp_desc) * CP_TX_RING_SIZE) + \
121 CP_STATS_SIZE)
122#define NEXT_TX(N) (((N) + 1) & (CP_TX_RING_SIZE - 1))
123#define NEXT_RX(N) (((N) + 1) & (CP_RX_RING_SIZE - 1))
124#define TX_BUFFS_AVAIL(CP) \
125 (((CP)->tx_tail <= (CP)->tx_head) ? \
126 (CP)->tx_tail + (CP_TX_RING_SIZE - 1) - (CP)->tx_head : \
127 (CP)->tx_tail - (CP)->tx_head - 1)
128
129#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130#define CP_INTERNAL_PHY 32
131
132/* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */
133#define RX_FIFO_THRESH 5 /* Rx buffer level before first PCI xfer. */
134#define RX_DMA_BURST 4 /* Maximum PCI burst, '4' is 256 */
135#define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
136#define TX_EARLY_THRESH 256 /* Early Tx threshold, in bytes */
137
138/* Time in jiffies before concluding the transmitter is hung. */
139#define TX_TIMEOUT (6*HZ)
140
141/* hardware minimum and maximum for a single frame's data payload */
142#define CP_MIN_MTU 60 /* TODO: allow lower, but pad */
143#define CP_MAX_MTU 4096
144
145enum {
146 /* NIC register offsets */
147 MAC0 = 0x00, /* Ethernet hardware address. */
148 MAR0 = 0x08, /* Multicast filter. */
149 StatsAddr = 0x10, /* 64-bit start addr of 64-byte DMA stats blk */
150 TxRingAddr = 0x20, /* 64-bit start addr of Tx ring */
151 HiTxRingAddr = 0x28, /* 64-bit start addr of high priority Tx ring */
152 Cmd = 0x37, /* Command register */
153 IntrMask = 0x3C, /* Interrupt mask */
154 IntrStatus = 0x3E, /* Interrupt status */
155 TxConfig = 0x40, /* Tx configuration */
156 ChipVersion = 0x43, /* 8-bit chip version, inside TxConfig */
157 RxConfig = 0x44, /* Rx configuration */
158 RxMissed = 0x4C, /* 24 bits valid, write clears */
159 Cfg9346 = 0x50, /* EEPROM select/control; Cfg reg [un]lock */
160 Config1 = 0x52, /* Config1 */
161 Config3 = 0x59, /* Config3 */
162 Config4 = 0x5A, /* Config4 */
163 MultiIntr = 0x5C, /* Multiple interrupt select */
164 BasicModeCtrl = 0x62, /* MII BMCR */
165 BasicModeStatus = 0x64, /* MII BMSR */
166 NWayAdvert = 0x66, /* MII ADVERTISE */
167 NWayLPAR = 0x68, /* MII LPA */
168 NWayExpansion = 0x6A, /* MII Expansion */
169 Config5 = 0xD8, /* Config5 */
170 TxPoll = 0xD9, /* Tell chip to check Tx descriptors for work */
171 RxMaxSize = 0xDA, /* Max size of an Rx packet (8169 only) */
172 CpCmd = 0xE0, /* C+ Command register (C+ mode only) */
173 IntrMitigate = 0xE2, /* rx/tx interrupt mitigation control */
174 RxRingAddr = 0xE4, /* 64-bit start addr of Rx ring */
175 TxThresh = 0xEC, /* Early Tx threshold */
176 OldRxBufAddr = 0x30, /* DMA address of Rx ring buffer (C mode) */
177 OldTSD0 = 0x10, /* DMA address of first Tx desc (C mode) */
178
179 /* Tx and Rx status descriptors */
180 DescOwn = (1 << 31), /* Descriptor is owned by NIC */
181 RingEnd = (1 << 30), /* End of descriptor ring */
182 FirstFrag = (1 << 29), /* First segment of a packet */
183 LastFrag = (1 << 28), /* Final segment of a packet */
Jeff Garzikfcec3452005-05-12 19:28:49 -0400184 LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */
185 MSSShift = 16, /* MSS value position */
186 MSSMask = 0xfff, /* MSS value: 11 bits */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187 TxError = (1 << 23), /* Tx error summary */
188 RxError = (1 << 20), /* Rx error summary */
189 IPCS = (1 << 18), /* Calculate IP checksum */
190 UDPCS = (1 << 17), /* Calculate UDP/IP checksum */
191 TCPCS = (1 << 16), /* Calculate TCP/IP checksum */
192 TxVlanTag = (1 << 17), /* Add VLAN tag */
193 RxVlanTagged = (1 << 16), /* Rx VLAN tag available */
194 IPFail = (1 << 15), /* IP checksum failed */
195 UDPFail = (1 << 14), /* UDP/IP checksum failed */
196 TCPFail = (1 << 13), /* TCP/IP checksum failed */
197 NormalTxPoll = (1 << 6), /* One or more normal Tx packets to send */
198 PID1 = (1 << 17), /* 2 protocol id bits: 0==non-IP, */
199 PID0 = (1 << 16), /* 1==UDP/IP, 2==TCP/IP, 3==IP */
200 RxProtoTCP = 1,
201 RxProtoUDP = 2,
202 RxProtoIP = 3,
203 TxFIFOUnder = (1 << 25), /* Tx FIFO underrun */
204 TxOWC = (1 << 22), /* Tx Out-of-window collision */
205 TxLinkFail = (1 << 21), /* Link failed during Tx of packet */
206 TxMaxCol = (1 << 20), /* Tx aborted due to excessive collisions */
207 TxColCntShift = 16, /* Shift, to get 4-bit Tx collision cnt */
208 TxColCntMask = 0x01 | 0x02 | 0x04 | 0x08, /* 4-bit collision count */
209 RxErrFrame = (1 << 27), /* Rx frame alignment error */
210 RxMcast = (1 << 26), /* Rx multicast packet rcv'd */
211 RxErrCRC = (1 << 18), /* Rx CRC error */
212 RxErrRunt = (1 << 19), /* Rx error, packet < 64 bytes */
213 RxErrLong = (1 << 21), /* Rx error, packet > 4096 bytes */
214 RxErrFIFO = (1 << 22), /* Rx error, FIFO overflowed, pkt bad */
215
216 /* StatsAddr register */
217 DumpStats = (1 << 3), /* Begin stats dump */
218
219 /* RxConfig register */
220 RxCfgFIFOShift = 13, /* Shift, to get Rx FIFO thresh value */
221 RxCfgDMAShift = 8, /* Shift, to get Rx Max DMA value */
222 AcceptErr = 0x20, /* Accept packets with CRC errors */
223 AcceptRunt = 0x10, /* Accept runt (<64 bytes) packets */
224 AcceptBroadcast = 0x08, /* Accept broadcast packets */
225 AcceptMulticast = 0x04, /* Accept multicast packets */
226 AcceptMyPhys = 0x02, /* Accept pkts with our MAC as dest */
227 AcceptAllPhys = 0x01, /* Accept all pkts w/ physical dest */
228
229 /* IntrMask / IntrStatus registers */
230 PciErr = (1 << 15), /* System error on the PCI bus */
231 TimerIntr = (1 << 14), /* Asserted when TCTR reaches TimerInt value */
232 LenChg = (1 << 13), /* Cable length change */
233 SWInt = (1 << 8), /* Software-requested interrupt */
234 TxEmpty = (1 << 7), /* No Tx descriptors available */
235 RxFIFOOvr = (1 << 6), /* Rx FIFO Overflow */
236 LinkChg = (1 << 5), /* Packet underrun, or link change */
237 RxEmpty = (1 << 4), /* No Rx descriptors available */
238 TxErr = (1 << 3), /* Tx error */
239 TxOK = (1 << 2), /* Tx packet sent */
240 RxErr = (1 << 1), /* Rx error */
241 RxOK = (1 << 0), /* Rx packet received */
242 IntrResvd = (1 << 10), /* reserved, according to RealTek engineers,
243 but hardware likes to raise it */
244
245 IntrAll = PciErr | TimerIntr | LenChg | SWInt | TxEmpty |
246 RxFIFOOvr | LinkChg | RxEmpty | TxErr | TxOK |
247 RxErr | RxOK | IntrResvd,
248
249 /* C mode command register */
250 CmdReset = (1 << 4), /* Enable to reset; self-clearing */
251 RxOn = (1 << 3), /* Rx mode enable */
252 TxOn = (1 << 2), /* Tx mode enable */
253
254 /* C+ mode command register */
255 RxVlanOn = (1 << 6), /* Rx VLAN de-tagging enable */
256 RxChkSum = (1 << 5), /* Rx checksum offload enable */
257 PCIDAC = (1 << 4), /* PCI Dual Address Cycle (64-bit PCI) */
258 PCIMulRW = (1 << 3), /* Enable PCI read/write multiple */
259 CpRxOn = (1 << 1), /* Rx mode enable */
260 CpTxOn = (1 << 0), /* Tx mode enable */
261
262 /* Cfg9436 EEPROM control register */
263 Cfg9346_Lock = 0x00, /* Lock ConfigX/MII register access */
264 Cfg9346_Unlock = 0xC0, /* Unlock ConfigX/MII register access */
265
266 /* TxConfig register */
267 IFG = (1 << 25) | (1 << 24), /* standard IEEE interframe gap */
268 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
269
270 /* Early Tx Threshold register */
271 TxThreshMask = 0x3f, /* Mask bits 5-0 */
272 TxThreshMax = 2048, /* Max early Tx threshold */
273
274 /* Config1 register */
275 DriverLoaded = (1 << 5), /* Software marker, driver is loaded */
276 LWACT = (1 << 4), /* LWAKE active mode */
277 PMEnable = (1 << 0), /* Enable various PM features of chip */
278
279 /* Config3 register */
280 PARMEnable = (1 << 6), /* Enable auto-loading of PHY parms */
281 MagicPacket = (1 << 5), /* Wake up when receives a Magic Packet */
282 LinkUp = (1 << 4), /* Wake up when the cable connection is re-established */
283
284 /* Config4 register */
285 LWPTN = (1 << 1), /* LWAKE Pattern */
286 LWPME = (1 << 4), /* LANWAKE vs PMEB */
287
288 /* Config5 register */
289 BWF = (1 << 6), /* Accept Broadcast wakeup frame */
290 MWF = (1 << 5), /* Accept Multicast wakeup frame */
291 UWF = (1 << 4), /* Accept Unicast wakeup frame */
292 LANWake = (1 << 1), /* Enable LANWake signal */
293 PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */
294
295 cp_norx_intr_mask = PciErr | LinkChg | TxOK | TxErr | TxEmpty,
296 cp_rx_intr_mask = RxOK | RxErr | RxEmpty | RxFIFOOvr,
297 cp_intr_mask = cp_rx_intr_mask | cp_norx_intr_mask,
298};
299
300static const unsigned int cp_rx_config =
301 (RX_FIFO_THRESH << RxCfgFIFOShift) |
302 (RX_DMA_BURST << RxCfgDMAShift);
303
304struct cp_desc {
Al Viro03233b92007-08-23 02:31:17 +0100305 __le32 opts1;
Al Virocf983012007-08-22 21:18:56 -0400306 __le32 opts2;
Al Viro03233b92007-08-23 02:31:17 +0100307 __le64 addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308};
309
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310struct cp_dma_stats {
Al Viro03233b92007-08-23 02:31:17 +0100311 __le64 tx_ok;
312 __le64 rx_ok;
313 __le64 tx_err;
314 __le32 rx_err;
315 __le16 rx_fifo;
316 __le16 frame_align;
317 __le32 tx_ok_1col;
318 __le32 tx_ok_mcol;
319 __le64 rx_ok_phys;
320 __le64 rx_ok_bcast;
321 __le32 rx_ok_mcast;
322 __le16 tx_abort;
323 __le16 tx_underrun;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324} __attribute__((packed));
325
326struct cp_extra_stats {
327 unsigned long rx_frags;
328};
329
330struct cp_private {
331 void __iomem *regs;
332 struct net_device *dev;
333 spinlock_t lock;
334 u32 msg_enable;
335
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700336 struct napi_struct napi;
337
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338 struct pci_dev *pdev;
339 u32 rx_config;
340 u16 cpcmd;
341
Linus Torvalds1da177e2005-04-16 15:20:36 -0700342 struct cp_extra_stats cp_stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343
Francois Romieud03d3762006-01-29 01:31:36 +0100344 unsigned rx_head ____cacheline_aligned;
345 unsigned rx_tail;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346 struct cp_desc *rx_ring;
Francois Romieu0ba894d42006-08-14 19:55:07 +0200347 struct sk_buff *rx_skb[CP_RX_RING_SIZE];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348
349 unsigned tx_head ____cacheline_aligned;
350 unsigned tx_tail;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700351 struct cp_desc *tx_ring;
Francois Romieu48907e32006-09-10 23:33:44 +0200352 struct sk_buff *tx_skb[CP_TX_RING_SIZE];
Francois Romieud03d3762006-01-29 01:31:36 +0100353
354 unsigned rx_buf_sz;
355 unsigned wol_enabled : 1; /* Is Wake-on-LAN enabled? */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700356
357#if CP_VLAN_TAG_USED
358 struct vlan_group *vlgrp;
359#endif
Francois Romieud03d3762006-01-29 01:31:36 +0100360 dma_addr_t ring_dma;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700361
362 struct mii_if_info mii_if;
363};
364
365#define cpr8(reg) readb(cp->regs + (reg))
366#define cpr16(reg) readw(cp->regs + (reg))
367#define cpr32(reg) readl(cp->regs + (reg))
368#define cpw8(reg,val) writeb((val), cp->regs + (reg))
369#define cpw16(reg,val) writew((val), cp->regs + (reg))
370#define cpw32(reg,val) writel((val), cp->regs + (reg))
371#define cpw8_f(reg,val) do { \
372 writeb((val), cp->regs + (reg)); \
373 readb(cp->regs + (reg)); \
374 } while (0)
375#define cpw16_f(reg,val) do { \
376 writew((val), cp->regs + (reg)); \
377 readw(cp->regs + (reg)); \
378 } while (0)
379#define cpw32_f(reg,val) do { \
380 writel((val), cp->regs + (reg)); \
381 readl(cp->regs + (reg)); \
382 } while (0)
383
384
385static void __cp_set_rx_mode (struct net_device *dev);
386static void cp_tx (struct cp_private *cp);
387static void cp_clean_rings (struct cp_private *cp);
Steffen Klassert7502cd12005-05-12 19:34:31 -0400388#ifdef CONFIG_NET_POLL_CONTROLLER
389static void cp_poll_controller(struct net_device *dev);
390#endif
Philip Craig722fdb32006-06-21 11:33:27 +1000391static int cp_get_eeprom_len(struct net_device *dev);
392static int cp_get_eeprom(struct net_device *dev,
393 struct ethtool_eeprom *eeprom, u8 *data);
394static int cp_set_eeprom(struct net_device *dev,
395 struct ethtool_eeprom *eeprom, u8 *data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396
397static struct pci_device_id cp_pci_tbl[] = {
Francois Romieucccb20d2006-08-16 13:07:18 +0200398 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, PCI_DEVICE_ID_REALTEK_8139), },
399 { PCI_DEVICE(PCI_VENDOR_ID_TTTECH, PCI_DEVICE_ID_TTTECH_MC322), },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400 { },
401};
402MODULE_DEVICE_TABLE(pci, cp_pci_tbl);
403
404static struct {
405 const char str[ETH_GSTRING_LEN];
406} ethtool_stats_keys[] = {
407 { "tx_ok" },
408 { "rx_ok" },
409 { "tx_err" },
410 { "rx_err" },
411 { "rx_fifo" },
412 { "frame_align" },
413 { "tx_ok_1col" },
414 { "tx_ok_mcol" },
415 { "rx_ok_phys" },
416 { "rx_ok_bcast" },
417 { "rx_ok_mcast" },
418 { "tx_abort" },
419 { "tx_underrun" },
420 { "rx_frags" },
421};
422
423
424#if CP_VLAN_TAG_USED
425static void cp_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
426{
427 struct cp_private *cp = netdev_priv(dev);
428 unsigned long flags;
429
430 spin_lock_irqsave(&cp->lock, flags);
431 cp->vlgrp = grp;
Stephen Hemminger7b332242007-06-01 09:43:59 -0700432 if (grp)
433 cp->cpcmd |= RxVlanOn;
434 else
435 cp->cpcmd &= ~RxVlanOn;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700436
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437 cpw16(CpCmd, cp->cpcmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438 spin_unlock_irqrestore(&cp->lock, flags);
439}
440#endif /* CP_VLAN_TAG_USED */
441
442static inline void cp_set_rxbufsize (struct cp_private *cp)
443{
444 unsigned int mtu = cp->dev->mtu;
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400445
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446 if (mtu > ETH_DATA_LEN)
447 /* MTU + ethernet header + FCS + optional VLAN tag */
448 cp->rx_buf_sz = mtu + ETH_HLEN + 8;
449 else
450 cp->rx_buf_sz = PKT_BUF_SZ;
451}
452
453static inline void cp_rx_skb (struct cp_private *cp, struct sk_buff *skb,
454 struct cp_desc *desc)
455{
456 skb->protocol = eth_type_trans (skb, cp->dev);
457
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300458 cp->dev->stats.rx_packets++;
459 cp->dev->stats.rx_bytes += skb->len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700460
461#if CP_VLAN_TAG_USED
Al Virocf983012007-08-22 21:18:56 -0400462 if (cp->vlgrp && (desc->opts2 & cpu_to_le32(RxVlanTagged))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700463 vlan_hwaccel_receive_skb(skb, cp->vlgrp,
Al Virocf983012007-08-22 21:18:56 -0400464 swab16(le32_to_cpu(desc->opts2) & 0xffff));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700465 } else
466#endif
467 netif_receive_skb(skb);
468}
469
470static void cp_rx_err_acct (struct cp_private *cp, unsigned rx_tail,
471 u32 status, u32 len)
472{
473 if (netif_msg_rx_err (cp))
474 printk (KERN_DEBUG
475 "%s: rx err, slot %d status 0x%x len %d\n",
476 cp->dev->name, rx_tail, status, len);
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300477 cp->dev->stats.rx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478 if (status & RxErrFrame)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300479 cp->dev->stats.rx_frame_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700480 if (status & RxErrCRC)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300481 cp->dev->stats.rx_crc_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700482 if ((status & RxErrRunt) || (status & RxErrLong))
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300483 cp->dev->stats.rx_length_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484 if ((status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag))
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300485 cp->dev->stats.rx_length_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700486 if (status & RxErrFIFO)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300487 cp->dev->stats.rx_fifo_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700488}
489
490static inline unsigned int cp_rx_csum_ok (u32 status)
491{
492 unsigned int protocol = (status >> 16) & 0x3;
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400493
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494 if (likely((protocol == RxProtoTCP) && (!(status & TCPFail))))
495 return 1;
496 else if ((protocol == RxProtoUDP) && (!(status & UDPFail)))
497 return 1;
498 else if ((protocol == RxProtoIP) && (!(status & IPFail)))
499 return 1;
500 return 0;
501}
502
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700503static int cp_rx_poll(struct napi_struct *napi, int budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700504{
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700505 struct cp_private *cp = container_of(napi, struct cp_private, napi);
506 struct net_device *dev = cp->dev;
507 unsigned int rx_tail = cp->rx_tail;
508 int rx;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700509
510rx_status_loop:
511 rx = 0;
512 cpw16(IntrStatus, cp_rx_intr_mask);
513
514 while (1) {
515 u32 status, len;
516 dma_addr_t mapping;
517 struct sk_buff *skb, *new_skb;
518 struct cp_desc *desc;
519 unsigned buflen;
520
Francois Romieu0ba894d42006-08-14 19:55:07 +0200521 skb = cp->rx_skb[rx_tail];
Eric Sesterhenn5d9428d2006-04-02 13:52:48 +0200522 BUG_ON(!skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700523
524 desc = &cp->rx_ring[rx_tail];
525 status = le32_to_cpu(desc->opts1);
526 if (status & DescOwn)
527 break;
528
529 len = (status & 0x1fff) - 4;
Francois Romieu3598b572006-01-29 01:31:13 +0100530 mapping = le64_to_cpu(desc->addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531
532 if ((status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag)) {
533 /* we don't support incoming fragmented frames.
534 * instead, we attempt to ensure that the
535 * pre-allocated RX skbs are properly sized such
536 * that RX fragments are never encountered
537 */
538 cp_rx_err_acct(cp, rx_tail, status, len);
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300539 dev->stats.rx_dropped++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700540 cp->cp_stats.rx_frags++;
541 goto rx_next;
542 }
543
544 if (status & (RxError | RxErrFIFO)) {
545 cp_rx_err_acct(cp, rx_tail, status, len);
546 goto rx_next;
547 }
548
549 if (netif_msg_rx_status(cp))
550 printk(KERN_DEBUG "%s: rx slot %d status 0x%x len %d\n",
Francois Romieuc48e9392006-01-29 01:30:48 +0100551 dev->name, rx_tail, status, len);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700552
Kevin Loa52be1c2008-08-27 11:35:15 +0800553 buflen = cp->rx_buf_sz + NET_IP_ALIGN;
554 new_skb = netdev_alloc_skb(dev, buflen);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700555 if (!new_skb) {
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300556 dev->stats.rx_dropped++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700557 goto rx_next;
558 }
559
Kevin Loa52be1c2008-08-27 11:35:15 +0800560 skb_reserve(new_skb, NET_IP_ALIGN);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700561
Jeff Garzik6cc92cd2007-08-08 02:16:04 -0400562 dma_unmap_single(&cp->pdev->dev, mapping,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700563 buflen, PCI_DMA_FROMDEVICE);
564
565 /* Handle checksum offloading for incoming packets. */
566 if (cp_rx_csum_ok(status))
567 skb->ip_summed = CHECKSUM_UNNECESSARY;
568 else
569 skb->ip_summed = CHECKSUM_NONE;
570
571 skb_put(skb, len);
572
Jeff Garzik6cc92cd2007-08-08 02:16:04 -0400573 mapping = dma_map_single(&cp->pdev->dev, new_skb->data, buflen,
Francois Romieu3598b572006-01-29 01:31:13 +0100574 PCI_DMA_FROMDEVICE);
Francois Romieu0ba894d42006-08-14 19:55:07 +0200575 cp->rx_skb[rx_tail] = new_skb;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700576
577 cp_rx_skb(cp, skb, desc);
578 rx++;
579
580rx_next:
581 cp->rx_ring[rx_tail].opts2 = 0;
582 cp->rx_ring[rx_tail].addr = cpu_to_le64(mapping);
583 if (rx_tail == (CP_RX_RING_SIZE - 1))
584 desc->opts1 = cpu_to_le32(DescOwn | RingEnd |
585 cp->rx_buf_sz);
586 else
587 desc->opts1 = cpu_to_le32(DescOwn | cp->rx_buf_sz);
588 rx_tail = NEXT_RX(rx_tail);
589
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700590 if (rx >= budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700591 break;
592 }
593
594 cp->rx_tail = rx_tail;
595
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596 /* if we did not reach work limit, then we're done with
597 * this round of polling
598 */
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700599 if (rx < budget) {
Francois Romieud15e9c42006-12-17 23:03:15 +0100600 unsigned long flags;
601
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602 if (cpr16(IntrStatus) & cp_rx_intr_mask)
603 goto rx_status_loop;
604
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700605 spin_lock_irqsave(&cp->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700606 cpw16_f(IntrMask, cp_intr_mask);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700607 __netif_rx_complete(dev, napi);
608 spin_unlock_irqrestore(&cp->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700609 }
610
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700611 return rx;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700612}
613
David Howells7d12e782006-10-05 14:55:46 +0100614static irqreturn_t cp_interrupt (int irq, void *dev_instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615{
616 struct net_device *dev = dev_instance;
617 struct cp_private *cp;
618 u16 status;
619
620 if (unlikely(dev == NULL))
621 return IRQ_NONE;
622 cp = netdev_priv(dev);
623
624 status = cpr16(IntrStatus);
625 if (!status || (status == 0xFFFF))
626 return IRQ_NONE;
627
628 if (netif_msg_intr(cp))
629 printk(KERN_DEBUG "%s: intr, status %04x cmd %02x cpcmd %04x\n",
630 dev->name, status, cpr8(Cmd), cpr16(CpCmd));
631
632 cpw16(IntrStatus, status & ~cp_rx_intr_mask);
633
634 spin_lock(&cp->lock);
635
636 /* close possible race's with dev_close */
637 if (unlikely(!netif_running(dev))) {
638 cpw16(IntrMask, 0);
639 spin_unlock(&cp->lock);
640 return IRQ_HANDLED;
641 }
642
643 if (status & (RxOK | RxErr | RxEmpty | RxFIFOOvr))
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700644 if (netif_rx_schedule_prep(dev, &cp->napi)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700645 cpw16_f(IntrMask, cp_norx_intr_mask);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700646 __netif_rx_schedule(dev, &cp->napi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700647 }
648
649 if (status & (TxOK | TxErr | TxEmpty | SWInt))
650 cp_tx(cp);
651 if (status & LinkChg)
Richard Knutsson2501f842007-05-19 22:26:40 +0200652 mii_check_media(&cp->mii_if, netif_msg_link(cp), false);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700653
654 spin_unlock(&cp->lock);
655
656 if (status & PciErr) {
657 u16 pci_status;
658
659 pci_read_config_word(cp->pdev, PCI_STATUS, &pci_status);
660 pci_write_config_word(cp->pdev, PCI_STATUS, pci_status);
661 printk(KERN_ERR "%s: PCI bus error, status=%04x, PCI status=%04x\n",
662 dev->name, status, pci_status);
663
664 /* TODO: reset hardware */
665 }
666
667 return IRQ_HANDLED;
668}
669
Steffen Klassert7502cd12005-05-12 19:34:31 -0400670#ifdef CONFIG_NET_POLL_CONTROLLER
671/*
672 * Polling receive - used by netconsole and other diagnostic tools
673 * to allow network i/o with interrupts disabled.
674 */
675static void cp_poll_controller(struct net_device *dev)
676{
677 disable_irq(dev->irq);
David Howells7d12e782006-10-05 14:55:46 +0100678 cp_interrupt(dev->irq, dev);
Steffen Klassert7502cd12005-05-12 19:34:31 -0400679 enable_irq(dev->irq);
680}
681#endif
682
Linus Torvalds1da177e2005-04-16 15:20:36 -0700683static void cp_tx (struct cp_private *cp)
684{
685 unsigned tx_head = cp->tx_head;
686 unsigned tx_tail = cp->tx_tail;
687
688 while (tx_tail != tx_head) {
Francois Romieu3598b572006-01-29 01:31:13 +0100689 struct cp_desc *txd = cp->tx_ring + tx_tail;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700690 struct sk_buff *skb;
691 u32 status;
692
693 rmb();
Francois Romieu3598b572006-01-29 01:31:13 +0100694 status = le32_to_cpu(txd->opts1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700695 if (status & DescOwn)
696 break;
697
Francois Romieu48907e32006-09-10 23:33:44 +0200698 skb = cp->tx_skb[tx_tail];
Eric Sesterhenn5d9428d2006-04-02 13:52:48 +0200699 BUG_ON(!skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700
Jeff Garzik6cc92cd2007-08-08 02:16:04 -0400701 dma_unmap_single(&cp->pdev->dev, le64_to_cpu(txd->addr),
Francois Romieu48907e32006-09-10 23:33:44 +0200702 le32_to_cpu(txd->opts1) & 0xffff,
703 PCI_DMA_TODEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704
705 if (status & LastFrag) {
706 if (status & (TxError | TxFIFOUnder)) {
707 if (netif_msg_tx_err(cp))
708 printk(KERN_DEBUG "%s: tx err, status 0x%x\n",
709 cp->dev->name, status);
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300710 cp->dev->stats.tx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700711 if (status & TxOWC)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300712 cp->dev->stats.tx_window_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700713 if (status & TxMaxCol)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300714 cp->dev->stats.tx_aborted_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700715 if (status & TxLinkFail)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300716 cp->dev->stats.tx_carrier_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700717 if (status & TxFIFOUnder)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300718 cp->dev->stats.tx_fifo_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700719 } else {
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300720 cp->dev->stats.collisions +=
Linus Torvalds1da177e2005-04-16 15:20:36 -0700721 ((status >> TxColCntShift) & TxColCntMask);
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300722 cp->dev->stats.tx_packets++;
723 cp->dev->stats.tx_bytes += skb->len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700724 if (netif_msg_tx_done(cp))
725 printk(KERN_DEBUG "%s: tx done, slot %d\n", cp->dev->name, tx_tail);
726 }
727 dev_kfree_skb_irq(skb);
728 }
729
Francois Romieu48907e32006-09-10 23:33:44 +0200730 cp->tx_skb[tx_tail] = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700731
732 tx_tail = NEXT_TX(tx_tail);
733 }
734
735 cp->tx_tail = tx_tail;
736
737 if (TX_BUFFS_AVAIL(cp) > (MAX_SKB_FRAGS + 1))
738 netif_wake_queue(cp->dev);
739}
740
741static int cp_start_xmit (struct sk_buff *skb, struct net_device *dev)
742{
743 struct cp_private *cp = netdev_priv(dev);
744 unsigned entry;
Jeff Garzikfcec3452005-05-12 19:28:49 -0400745 u32 eor, flags;
Chris Lalancette553af562007-01-16 16:41:44 -0500746 unsigned long intr_flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700747#if CP_VLAN_TAG_USED
748 u32 vlan_tag = 0;
749#endif
Jeff Garzikfcec3452005-05-12 19:28:49 -0400750 int mss = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700751
Chris Lalancette553af562007-01-16 16:41:44 -0500752 spin_lock_irqsave(&cp->lock, intr_flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700753
754 /* This is a hard error, log it. */
755 if (TX_BUFFS_AVAIL(cp) <= (skb_shinfo(skb)->nr_frags + 1)) {
756 netif_stop_queue(dev);
Chris Lalancette553af562007-01-16 16:41:44 -0500757 spin_unlock_irqrestore(&cp->lock, intr_flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700758 printk(KERN_ERR PFX "%s: BUG! Tx Ring full when queue awake!\n",
759 dev->name);
760 return 1;
761 }
762
763#if CP_VLAN_TAG_USED
764 if (cp->vlgrp && vlan_tx_tag_present(skb))
Al Virocf983012007-08-22 21:18:56 -0400765 vlan_tag = TxVlanTag | swab16(vlan_tx_tag_get(skb));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700766#endif
767
768 entry = cp->tx_head;
769 eor = (entry == (CP_TX_RING_SIZE - 1)) ? RingEnd : 0;
Jeff Garzikfcec3452005-05-12 19:28:49 -0400770 if (dev->features & NETIF_F_TSO)
Herbert Xu79671682006-06-22 02:40:14 -0700771 mss = skb_shinfo(skb)->gso_size;
Jeff Garzikfcec3452005-05-12 19:28:49 -0400772
Linus Torvalds1da177e2005-04-16 15:20:36 -0700773 if (skb_shinfo(skb)->nr_frags == 0) {
774 struct cp_desc *txd = &cp->tx_ring[entry];
775 u32 len;
776 dma_addr_t mapping;
777
778 len = skb->len;
Jeff Garzik6cc92cd2007-08-08 02:16:04 -0400779 mapping = dma_map_single(&cp->pdev->dev, skb->data, len, PCI_DMA_TODEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700780 CP_VLAN_TX_TAG(txd, vlan_tag);
781 txd->addr = cpu_to_le64(mapping);
782 wmb();
783
Jeff Garzikfcec3452005-05-12 19:28:49 -0400784 flags = eor | len | DescOwn | FirstFrag | LastFrag;
785
786 if (mss)
787 flags |= LargeSend | ((mss & MSSMask) << MSSShift);
Patrick McHardy84fa7932006-08-29 16:44:56 -0700788 else if (skb->ip_summed == CHECKSUM_PARTIAL) {
Arnaldo Carvalho de Meloeddc9ec2007-04-20 22:47:35 -0700789 const struct iphdr *ip = ip_hdr(skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700790 if (ip->protocol == IPPROTO_TCP)
Jeff Garzikfcec3452005-05-12 19:28:49 -0400791 flags |= IPCS | TCPCS;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700792 else if (ip->protocol == IPPROTO_UDP)
Jeff Garzikfcec3452005-05-12 19:28:49 -0400793 flags |= IPCS | UDPCS;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700794 else
Francois Romieu57344182005-05-12 19:31:31 -0400795 WARN_ON(1); /* we need a WARN() */
Jeff Garzikfcec3452005-05-12 19:28:49 -0400796 }
797
798 txd->opts1 = cpu_to_le32(flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700799 wmb();
800
Francois Romieu48907e32006-09-10 23:33:44 +0200801 cp->tx_skb[entry] = skb;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700802 entry = NEXT_TX(entry);
803 } else {
804 struct cp_desc *txd;
805 u32 first_len, first_eor;
806 dma_addr_t first_mapping;
807 int frag, first_entry = entry;
Arnaldo Carvalho de Meloeddc9ec2007-04-20 22:47:35 -0700808 const struct iphdr *ip = ip_hdr(skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700809
810 /* We must give this initial chunk to the device last.
811 * Otherwise we could race with the device.
812 */
813 first_eor = eor;
814 first_len = skb_headlen(skb);
Jeff Garzik6cc92cd2007-08-08 02:16:04 -0400815 first_mapping = dma_map_single(&cp->pdev->dev, skb->data,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700816 first_len, PCI_DMA_TODEVICE);
Francois Romieu48907e32006-09-10 23:33:44 +0200817 cp->tx_skb[entry] = skb;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700818 entry = NEXT_TX(entry);
819
820 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
821 skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
822 u32 len;
823 u32 ctrl;
824 dma_addr_t mapping;
825
826 len = this_frag->size;
Jeff Garzik6cc92cd2007-08-08 02:16:04 -0400827 mapping = dma_map_single(&cp->pdev->dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700828 ((void *) page_address(this_frag->page) +
829 this_frag->page_offset),
830 len, PCI_DMA_TODEVICE);
831 eor = (entry == (CP_TX_RING_SIZE - 1)) ? RingEnd : 0;
832
Jeff Garzikfcec3452005-05-12 19:28:49 -0400833 ctrl = eor | len | DescOwn;
834
835 if (mss)
836 ctrl |= LargeSend |
837 ((mss & MSSMask) << MSSShift);
Patrick McHardy84fa7932006-08-29 16:44:56 -0700838 else if (skb->ip_summed == CHECKSUM_PARTIAL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700839 if (ip->protocol == IPPROTO_TCP)
Jeff Garzikfcec3452005-05-12 19:28:49 -0400840 ctrl |= IPCS | TCPCS;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700841 else if (ip->protocol == IPPROTO_UDP)
Jeff Garzikfcec3452005-05-12 19:28:49 -0400842 ctrl |= IPCS | UDPCS;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700843 else
844 BUG();
Jeff Garzikfcec3452005-05-12 19:28:49 -0400845 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700846
847 if (frag == skb_shinfo(skb)->nr_frags - 1)
848 ctrl |= LastFrag;
849
850 txd = &cp->tx_ring[entry];
851 CP_VLAN_TX_TAG(txd, vlan_tag);
852 txd->addr = cpu_to_le64(mapping);
853 wmb();
854
855 txd->opts1 = cpu_to_le32(ctrl);
856 wmb();
857
Francois Romieu48907e32006-09-10 23:33:44 +0200858 cp->tx_skb[entry] = skb;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700859 entry = NEXT_TX(entry);
860 }
861
862 txd = &cp->tx_ring[first_entry];
863 CP_VLAN_TX_TAG(txd, vlan_tag);
864 txd->addr = cpu_to_le64(first_mapping);
865 wmb();
866
Patrick McHardy84fa7932006-08-29 16:44:56 -0700867 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868 if (ip->protocol == IPPROTO_TCP)
869 txd->opts1 = cpu_to_le32(first_eor | first_len |
870 FirstFrag | DescOwn |
871 IPCS | TCPCS);
872 else if (ip->protocol == IPPROTO_UDP)
873 txd->opts1 = cpu_to_le32(first_eor | first_len |
874 FirstFrag | DescOwn |
875 IPCS | UDPCS);
876 else
877 BUG();
878 } else
879 txd->opts1 = cpu_to_le32(first_eor | first_len |
880 FirstFrag | DescOwn);
881 wmb();
882 }
883 cp->tx_head = entry;
884 if (netif_msg_tx_queued(cp))
885 printk(KERN_DEBUG "%s: tx queued, slot %d, skblen %d\n",
886 dev->name, entry, skb->len);
887 if (TX_BUFFS_AVAIL(cp) <= (MAX_SKB_FRAGS + 1))
888 netif_stop_queue(dev);
889
Chris Lalancette553af562007-01-16 16:41:44 -0500890 spin_unlock_irqrestore(&cp->lock, intr_flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700891
892 cpw8(TxPoll, NormalTxPoll);
893 dev->trans_start = jiffies;
894
895 return 0;
896}
897
898/* Set or clear the multicast filter for this adaptor.
899 This routine is not state sensitive and need not be SMP locked. */
900
901static void __cp_set_rx_mode (struct net_device *dev)
902{
903 struct cp_private *cp = netdev_priv(dev);
904 u32 mc_filter[2]; /* Multicast hash filter */
905 int i, rx_mode;
906 u32 tmp;
907
908 /* Note: do not reorder, GCC is clever about common statements. */
909 if (dev->flags & IFF_PROMISC) {
910 /* Unconditionally log net taps. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700911 rx_mode =
912 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
913 AcceptAllPhys;
914 mc_filter[1] = mc_filter[0] = 0xffffffff;
915 } else if ((dev->mc_count > multicast_filter_limit)
916 || (dev->flags & IFF_ALLMULTI)) {
917 /* Too many to filter perfectly -- accept all multicasts. */
918 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
919 mc_filter[1] = mc_filter[0] = 0xffffffff;
920 } else {
921 struct dev_mc_list *mclist;
922 rx_mode = AcceptBroadcast | AcceptMyPhys;
923 mc_filter[1] = mc_filter[0] = 0;
924 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
925 i++, mclist = mclist->next) {
926 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
927
928 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
929 rx_mode |= AcceptMulticast;
930 }
931 }
932
933 /* We can safely update without stopping the chip. */
934 tmp = cp_rx_config | rx_mode;
935 if (cp->rx_config != tmp) {
936 cpw32_f (RxConfig, tmp);
937 cp->rx_config = tmp;
938 }
939 cpw32_f (MAR0 + 0, mc_filter[0]);
940 cpw32_f (MAR0 + 4, mc_filter[1]);
941}
942
943static void cp_set_rx_mode (struct net_device *dev)
944{
945 unsigned long flags;
946 struct cp_private *cp = netdev_priv(dev);
947
948 spin_lock_irqsave (&cp->lock, flags);
949 __cp_set_rx_mode(dev);
950 spin_unlock_irqrestore (&cp->lock, flags);
951}
952
953static void __cp_get_stats(struct cp_private *cp)
954{
955 /* only lower 24 bits valid; write any value to clear */
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300956 cp->dev->stats.rx_missed_errors += (cpr32 (RxMissed) & 0xffffff);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700957 cpw32 (RxMissed, 0);
958}
959
960static struct net_device_stats *cp_get_stats(struct net_device *dev)
961{
962 struct cp_private *cp = netdev_priv(dev);
963 unsigned long flags;
964
965 /* The chip only need report frame silently dropped. */
966 spin_lock_irqsave(&cp->lock, flags);
967 if (netif_running(dev) && netif_device_present(dev))
968 __cp_get_stats(cp);
969 spin_unlock_irqrestore(&cp->lock, flags);
970
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300971 return &dev->stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700972}
973
974static void cp_stop_hw (struct cp_private *cp)
975{
976 cpw16(IntrStatus, ~(cpr16(IntrStatus)));
977 cpw16_f(IntrMask, 0);
978 cpw8(Cmd, 0);
979 cpw16_f(CpCmd, 0);
980 cpw16_f(IntrStatus, ~(cpr16(IntrStatus)));
981
982 cp->rx_tail = 0;
983 cp->tx_head = cp->tx_tail = 0;
984}
985
986static void cp_reset_hw (struct cp_private *cp)
987{
988 unsigned work = 1000;
989
990 cpw8(Cmd, CmdReset);
991
992 while (work--) {
993 if (!(cpr8(Cmd) & CmdReset))
994 return;
995
Nishanth Aravamudan3173c892005-09-11 02:09:55 -0700996 schedule_timeout_uninterruptible(10);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700997 }
998
999 printk(KERN_ERR "%s: hardware reset timeout\n", cp->dev->name);
1000}
1001
1002static inline void cp_start_hw (struct cp_private *cp)
1003{
1004 cpw16(CpCmd, cp->cpcmd);
1005 cpw8(Cmd, RxOn | TxOn);
1006}
1007
1008static void cp_init_hw (struct cp_private *cp)
1009{
1010 struct net_device *dev = cp->dev;
1011 dma_addr_t ring_dma;
1012
1013 cp_reset_hw(cp);
1014
1015 cpw8_f (Cfg9346, Cfg9346_Unlock);
1016
1017 /* Restore our idea of the MAC address. */
Al Viro03233b92007-08-23 02:31:17 +01001018 cpw32_f (MAC0 + 0, le32_to_cpu (*(__le32 *) (dev->dev_addr + 0)));
1019 cpw32_f (MAC0 + 4, le32_to_cpu (*(__le32 *) (dev->dev_addr + 4)));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001020
1021 cp_start_hw(cp);
1022 cpw8(TxThresh, 0x06); /* XXX convert magic num to a constant */
1023
1024 __cp_set_rx_mode(dev);
1025 cpw32_f (TxConfig, IFG | (TX_DMA_BURST << TxDMAShift));
1026
1027 cpw8(Config1, cpr8(Config1) | DriverLoaded | PMEnable);
1028 /* Disable Wake-on-LAN. Can be turned on with ETHTOOL_SWOL */
1029 cpw8(Config3, PARMEnable);
1030 cp->wol_enabled = 0;
1031
Jeff Garzikf3b197a2006-05-26 21:39:03 -04001032 cpw8(Config5, cpr8(Config5) & PMEStatus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001033
1034 cpw32_f(HiTxRingAddr, 0);
1035 cpw32_f(HiTxRingAddr + 4, 0);
1036
1037 ring_dma = cp->ring_dma;
1038 cpw32_f(RxRingAddr, ring_dma & 0xffffffff);
1039 cpw32_f(RxRingAddr + 4, (ring_dma >> 16) >> 16);
1040
1041 ring_dma += sizeof(struct cp_desc) * CP_RX_RING_SIZE;
1042 cpw32_f(TxRingAddr, ring_dma & 0xffffffff);
1043 cpw32_f(TxRingAddr + 4, (ring_dma >> 16) >> 16);
1044
1045 cpw16(MultiIntr, 0);
1046
1047 cpw16_f(IntrMask, cp_intr_mask);
1048
1049 cpw8_f(Cfg9346, Cfg9346_Lock);
1050}
1051
Kevin Loa52be1c2008-08-27 11:35:15 +08001052static int cp_refill_rx(struct cp_private *cp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001053{
Kevin Loa52be1c2008-08-27 11:35:15 +08001054 struct net_device *dev = cp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001055 unsigned i;
1056
1057 for (i = 0; i < CP_RX_RING_SIZE; i++) {
1058 struct sk_buff *skb;
Francois Romieu3598b572006-01-29 01:31:13 +01001059 dma_addr_t mapping;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001060
Kevin Loa52be1c2008-08-27 11:35:15 +08001061 skb = netdev_alloc_skb(dev, cp->rx_buf_sz + NET_IP_ALIGN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001062 if (!skb)
1063 goto err_out;
1064
Kevin Loa52be1c2008-08-27 11:35:15 +08001065 skb_reserve(skb, NET_IP_ALIGN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001066
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001067 mapping = dma_map_single(&cp->pdev->dev, skb->data,
1068 cp->rx_buf_sz, PCI_DMA_FROMDEVICE);
Francois Romieu0ba894d42006-08-14 19:55:07 +02001069 cp->rx_skb[i] = skb;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001070
1071 cp->rx_ring[i].opts2 = 0;
Francois Romieu3598b572006-01-29 01:31:13 +01001072 cp->rx_ring[i].addr = cpu_to_le64(mapping);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001073 if (i == (CP_RX_RING_SIZE - 1))
1074 cp->rx_ring[i].opts1 =
1075 cpu_to_le32(DescOwn | RingEnd | cp->rx_buf_sz);
1076 else
1077 cp->rx_ring[i].opts1 =
1078 cpu_to_le32(DescOwn | cp->rx_buf_sz);
1079 }
1080
1081 return 0;
1082
1083err_out:
1084 cp_clean_rings(cp);
1085 return -ENOMEM;
1086}
1087
Francois Romieu576cfa92006-02-27 23:15:06 +01001088static void cp_init_rings_index (struct cp_private *cp)
1089{
1090 cp->rx_tail = 0;
1091 cp->tx_head = cp->tx_tail = 0;
1092}
1093
Linus Torvalds1da177e2005-04-16 15:20:36 -07001094static int cp_init_rings (struct cp_private *cp)
1095{
1096 memset(cp->tx_ring, 0, sizeof(struct cp_desc) * CP_TX_RING_SIZE);
1097 cp->tx_ring[CP_TX_RING_SIZE - 1].opts1 = cpu_to_le32(RingEnd);
1098
Francois Romieu576cfa92006-02-27 23:15:06 +01001099 cp_init_rings_index(cp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001100
1101 return cp_refill_rx (cp);
1102}
1103
1104static int cp_alloc_rings (struct cp_private *cp)
1105{
1106 void *mem;
1107
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001108 mem = dma_alloc_coherent(&cp->pdev->dev, CP_RING_BYTES,
1109 &cp->ring_dma, GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001110 if (!mem)
1111 return -ENOMEM;
1112
1113 cp->rx_ring = mem;
1114 cp->tx_ring = &cp->rx_ring[CP_RX_RING_SIZE];
1115
Linus Torvalds1da177e2005-04-16 15:20:36 -07001116 return cp_init_rings(cp);
1117}
1118
1119static void cp_clean_rings (struct cp_private *cp)
1120{
Francois Romieu3598b572006-01-29 01:31:13 +01001121 struct cp_desc *desc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001122 unsigned i;
1123
Linus Torvalds1da177e2005-04-16 15:20:36 -07001124 for (i = 0; i < CP_RX_RING_SIZE; i++) {
Francois Romieu0ba894d42006-08-14 19:55:07 +02001125 if (cp->rx_skb[i]) {
Francois Romieu3598b572006-01-29 01:31:13 +01001126 desc = cp->rx_ring + i;
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001127 dma_unmap_single(&cp->pdev->dev,le64_to_cpu(desc->addr),
Linus Torvalds1da177e2005-04-16 15:20:36 -07001128 cp->rx_buf_sz, PCI_DMA_FROMDEVICE);
Francois Romieu0ba894d42006-08-14 19:55:07 +02001129 dev_kfree_skb(cp->rx_skb[i]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001130 }
1131 }
1132
1133 for (i = 0; i < CP_TX_RING_SIZE; i++) {
Francois Romieu48907e32006-09-10 23:33:44 +02001134 if (cp->tx_skb[i]) {
1135 struct sk_buff *skb = cp->tx_skb[i];
Francois Romieu57344182005-05-12 19:31:31 -04001136
Francois Romieu3598b572006-01-29 01:31:13 +01001137 desc = cp->tx_ring + i;
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001138 dma_unmap_single(&cp->pdev->dev,le64_to_cpu(desc->addr),
Francois Romieu48907e32006-09-10 23:33:44 +02001139 le32_to_cpu(desc->opts1) & 0xffff,
1140 PCI_DMA_TODEVICE);
Francois Romieu3598b572006-01-29 01:31:13 +01001141 if (le32_to_cpu(desc->opts1) & LastFrag)
Francois Romieu57344182005-05-12 19:31:31 -04001142 dev_kfree_skb(skb);
Paulius Zaleckas237225f2008-05-05 16:05:17 +03001143 cp->dev->stats.tx_dropped++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001144 }
1145 }
1146
Francois Romieu57344182005-05-12 19:31:31 -04001147 memset(cp->rx_ring, 0, sizeof(struct cp_desc) * CP_RX_RING_SIZE);
1148 memset(cp->tx_ring, 0, sizeof(struct cp_desc) * CP_TX_RING_SIZE);
1149
Francois Romieu0ba894d42006-08-14 19:55:07 +02001150 memset(cp->rx_skb, 0, sizeof(struct sk_buff *) * CP_RX_RING_SIZE);
Francois Romieu48907e32006-09-10 23:33:44 +02001151 memset(cp->tx_skb, 0, sizeof(struct sk_buff *) * CP_TX_RING_SIZE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001152}
1153
1154static void cp_free_rings (struct cp_private *cp)
1155{
1156 cp_clean_rings(cp);
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001157 dma_free_coherent(&cp->pdev->dev, CP_RING_BYTES, cp->rx_ring,
1158 cp->ring_dma);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001159 cp->rx_ring = NULL;
1160 cp->tx_ring = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001161}
1162
1163static int cp_open (struct net_device *dev)
1164{
1165 struct cp_private *cp = netdev_priv(dev);
1166 int rc;
1167
1168 if (netif_msg_ifup(cp))
1169 printk(KERN_DEBUG "%s: enabling interface\n", dev->name);
1170
1171 rc = cp_alloc_rings(cp);
1172 if (rc)
1173 return rc;
1174
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001175 napi_enable(&cp->napi);
1176
Linus Torvalds1da177e2005-04-16 15:20:36 -07001177 cp_init_hw(cp);
1178
Thomas Gleixner1fb9df52006-07-01 19:29:39 -07001179 rc = request_irq(dev->irq, cp_interrupt, IRQF_SHARED, dev->name, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001180 if (rc)
1181 goto err_out_hw;
1182
1183 netif_carrier_off(dev);
Richard Knutsson2501f842007-05-19 22:26:40 +02001184 mii_check_media(&cp->mii_if, netif_msg_link(cp), true);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001185 netif_start_queue(dev);
1186
1187 return 0;
1188
1189err_out_hw:
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001190 napi_disable(&cp->napi);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001191 cp_stop_hw(cp);
1192 cp_free_rings(cp);
1193 return rc;
1194}
1195
1196static int cp_close (struct net_device *dev)
1197{
1198 struct cp_private *cp = netdev_priv(dev);
1199 unsigned long flags;
1200
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001201 napi_disable(&cp->napi);
1202
Linus Torvalds1da177e2005-04-16 15:20:36 -07001203 if (netif_msg_ifdown(cp))
1204 printk(KERN_DEBUG "%s: disabling interface\n", dev->name);
1205
1206 spin_lock_irqsave(&cp->lock, flags);
1207
1208 netif_stop_queue(dev);
1209 netif_carrier_off(dev);
1210
1211 cp_stop_hw(cp);
1212
1213 spin_unlock_irqrestore(&cp->lock, flags);
1214
Linus Torvalds1da177e2005-04-16 15:20:36 -07001215 free_irq(dev->irq, dev);
1216
1217 cp_free_rings(cp);
1218 return 0;
1219}
1220
Francois Romieu9030c0d2007-07-13 23:05:35 +02001221static void cp_tx_timeout(struct net_device *dev)
1222{
1223 struct cp_private *cp = netdev_priv(dev);
1224 unsigned long flags;
1225 int rc;
1226
1227 printk(KERN_WARNING "%s: Transmit timeout, status %2x %4x %4x %4x\n",
1228 dev->name, cpr8(Cmd), cpr16(CpCmd),
1229 cpr16(IntrStatus), cpr16(IntrMask));
1230
1231 spin_lock_irqsave(&cp->lock, flags);
1232
1233 cp_stop_hw(cp);
1234 cp_clean_rings(cp);
1235 rc = cp_init_rings(cp);
1236 cp_start_hw(cp);
1237
1238 netif_wake_queue(dev);
1239
1240 spin_unlock_irqrestore(&cp->lock, flags);
1241
1242 return;
1243}
1244
Linus Torvalds1da177e2005-04-16 15:20:36 -07001245#ifdef BROKEN
1246static int cp_change_mtu(struct net_device *dev, int new_mtu)
1247{
1248 struct cp_private *cp = netdev_priv(dev);
1249 int rc;
1250 unsigned long flags;
1251
1252 /* check for invalid MTU, according to hardware limits */
1253 if (new_mtu < CP_MIN_MTU || new_mtu > CP_MAX_MTU)
1254 return -EINVAL;
1255
1256 /* if network interface not up, no need for complexity */
1257 if (!netif_running(dev)) {
1258 dev->mtu = new_mtu;
1259 cp_set_rxbufsize(cp); /* set new rx buf size */
1260 return 0;
1261 }
1262
1263 spin_lock_irqsave(&cp->lock, flags);
1264
1265 cp_stop_hw(cp); /* stop h/w and free rings */
1266 cp_clean_rings(cp);
1267
1268 dev->mtu = new_mtu;
1269 cp_set_rxbufsize(cp); /* set new rx buf size */
1270
1271 rc = cp_init_rings(cp); /* realloc and restart h/w */
1272 cp_start_hw(cp);
1273
1274 spin_unlock_irqrestore(&cp->lock, flags);
1275
1276 return rc;
1277}
1278#endif /* BROKEN */
1279
Arjan van de Venf71e1302006-03-03 21:33:57 -05001280static const char mii_2_8139_map[8] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001281 BasicModeCtrl,
1282 BasicModeStatus,
1283 0,
1284 0,
1285 NWayAdvert,
1286 NWayLPAR,
1287 NWayExpansion,
1288 0
1289};
1290
1291static int mdio_read(struct net_device *dev, int phy_id, int location)
1292{
1293 struct cp_private *cp = netdev_priv(dev);
1294
1295 return location < 8 && mii_2_8139_map[location] ?
1296 readw(cp->regs + mii_2_8139_map[location]) : 0;
1297}
1298
1299
1300static void mdio_write(struct net_device *dev, int phy_id, int location,
1301 int value)
1302{
1303 struct cp_private *cp = netdev_priv(dev);
1304
1305 if (location == 0) {
1306 cpw8(Cfg9346, Cfg9346_Unlock);
1307 cpw16(BasicModeCtrl, value);
1308 cpw8(Cfg9346, Cfg9346_Lock);
1309 } else if (location < 8 && mii_2_8139_map[location])
1310 cpw16(mii_2_8139_map[location], value);
1311}
1312
1313/* Set the ethtool Wake-on-LAN settings */
1314static int netdev_set_wol (struct cp_private *cp,
1315 const struct ethtool_wolinfo *wol)
1316{
1317 u8 options;
1318
1319 options = cpr8 (Config3) & ~(LinkUp | MagicPacket);
1320 /* If WOL is being disabled, no need for complexity */
1321 if (wol->wolopts) {
1322 if (wol->wolopts & WAKE_PHY) options |= LinkUp;
1323 if (wol->wolopts & WAKE_MAGIC) options |= MagicPacket;
1324 }
1325
1326 cpw8 (Cfg9346, Cfg9346_Unlock);
1327 cpw8 (Config3, options);
1328 cpw8 (Cfg9346, Cfg9346_Lock);
1329
1330 options = 0; /* Paranoia setting */
1331 options = cpr8 (Config5) & ~(UWF | MWF | BWF);
1332 /* If WOL is being disabled, no need for complexity */
1333 if (wol->wolopts) {
1334 if (wol->wolopts & WAKE_UCAST) options |= UWF;
1335 if (wol->wolopts & WAKE_BCAST) options |= BWF;
1336 if (wol->wolopts & WAKE_MCAST) options |= MWF;
1337 }
1338
1339 cpw8 (Config5, options);
1340
1341 cp->wol_enabled = (wol->wolopts) ? 1 : 0;
1342
1343 return 0;
1344}
1345
1346/* Get the ethtool Wake-on-LAN settings */
1347static void netdev_get_wol (struct cp_private *cp,
1348 struct ethtool_wolinfo *wol)
1349{
1350 u8 options;
1351
1352 wol->wolopts = 0; /* Start from scratch */
1353 wol->supported = WAKE_PHY | WAKE_BCAST | WAKE_MAGIC |
1354 WAKE_MCAST | WAKE_UCAST;
1355 /* We don't need to go on if WOL is disabled */
1356 if (!cp->wol_enabled) return;
Jeff Garzikf3b197a2006-05-26 21:39:03 -04001357
Linus Torvalds1da177e2005-04-16 15:20:36 -07001358 options = cpr8 (Config3);
1359 if (options & LinkUp) wol->wolopts |= WAKE_PHY;
1360 if (options & MagicPacket) wol->wolopts |= WAKE_MAGIC;
1361
1362 options = 0; /* Paranoia setting */
1363 options = cpr8 (Config5);
1364 if (options & UWF) wol->wolopts |= WAKE_UCAST;
1365 if (options & BWF) wol->wolopts |= WAKE_BCAST;
1366 if (options & MWF) wol->wolopts |= WAKE_MCAST;
1367}
1368
1369static void cp_get_drvinfo (struct net_device *dev, struct ethtool_drvinfo *info)
1370{
1371 struct cp_private *cp = netdev_priv(dev);
1372
1373 strcpy (info->driver, DRV_NAME);
1374 strcpy (info->version, DRV_VERSION);
1375 strcpy (info->bus_info, pci_name(cp->pdev));
1376}
1377
1378static int cp_get_regs_len(struct net_device *dev)
1379{
1380 return CP_REGS_SIZE;
1381}
1382
Jeff Garzikb9f2c042007-10-03 18:07:32 -07001383static int cp_get_sset_count (struct net_device *dev, int sset)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001384{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07001385 switch (sset) {
1386 case ETH_SS_STATS:
1387 return CP_NUM_STATS;
1388 default:
1389 return -EOPNOTSUPP;
1390 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001391}
1392
1393static int cp_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1394{
1395 struct cp_private *cp = netdev_priv(dev);
1396 int rc;
1397 unsigned long flags;
1398
1399 spin_lock_irqsave(&cp->lock, flags);
1400 rc = mii_ethtool_gset(&cp->mii_if, cmd);
1401 spin_unlock_irqrestore(&cp->lock, flags);
1402
1403 return rc;
1404}
1405
1406static int cp_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1407{
1408 struct cp_private *cp = netdev_priv(dev);
1409 int rc;
1410 unsigned long flags;
1411
1412 spin_lock_irqsave(&cp->lock, flags);
1413 rc = mii_ethtool_sset(&cp->mii_if, cmd);
1414 spin_unlock_irqrestore(&cp->lock, flags);
1415
1416 return rc;
1417}
1418
1419static int cp_nway_reset(struct net_device *dev)
1420{
1421 struct cp_private *cp = netdev_priv(dev);
1422 return mii_nway_restart(&cp->mii_if);
1423}
1424
1425static u32 cp_get_msglevel(struct net_device *dev)
1426{
1427 struct cp_private *cp = netdev_priv(dev);
1428 return cp->msg_enable;
1429}
1430
1431static void cp_set_msglevel(struct net_device *dev, u32 value)
1432{
1433 struct cp_private *cp = netdev_priv(dev);
1434 cp->msg_enable = value;
1435}
1436
1437static u32 cp_get_rx_csum(struct net_device *dev)
1438{
1439 struct cp_private *cp = netdev_priv(dev);
1440 return (cpr16(CpCmd) & RxChkSum) ? 1 : 0;
1441}
1442
1443static int cp_set_rx_csum(struct net_device *dev, u32 data)
1444{
1445 struct cp_private *cp = netdev_priv(dev);
1446 u16 cmd = cp->cpcmd, newcmd;
1447
1448 newcmd = cmd;
1449
1450 if (data)
1451 newcmd |= RxChkSum;
1452 else
1453 newcmd &= ~RxChkSum;
1454
1455 if (newcmd != cmd) {
1456 unsigned long flags;
1457
1458 spin_lock_irqsave(&cp->lock, flags);
1459 cp->cpcmd = newcmd;
1460 cpw16_f(CpCmd, newcmd);
1461 spin_unlock_irqrestore(&cp->lock, flags);
1462 }
1463
1464 return 0;
1465}
1466
1467static void cp_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1468 void *p)
1469{
1470 struct cp_private *cp = netdev_priv(dev);
1471 unsigned long flags;
1472
1473 if (regs->len < CP_REGS_SIZE)
1474 return /* -EINVAL */;
1475
1476 regs->version = CP_REGS_VER;
1477
1478 spin_lock_irqsave(&cp->lock, flags);
1479 memcpy_fromio(p, cp->regs, CP_REGS_SIZE);
1480 spin_unlock_irqrestore(&cp->lock, flags);
1481}
1482
1483static void cp_get_wol (struct net_device *dev, struct ethtool_wolinfo *wol)
1484{
1485 struct cp_private *cp = netdev_priv(dev);
1486 unsigned long flags;
1487
1488 spin_lock_irqsave (&cp->lock, flags);
1489 netdev_get_wol (cp, wol);
1490 spin_unlock_irqrestore (&cp->lock, flags);
1491}
1492
1493static int cp_set_wol (struct net_device *dev, struct ethtool_wolinfo *wol)
1494{
1495 struct cp_private *cp = netdev_priv(dev);
1496 unsigned long flags;
1497 int rc;
1498
1499 spin_lock_irqsave (&cp->lock, flags);
1500 rc = netdev_set_wol (cp, wol);
1501 spin_unlock_irqrestore (&cp->lock, flags);
1502
1503 return rc;
1504}
1505
1506static void cp_get_strings (struct net_device *dev, u32 stringset, u8 *buf)
1507{
1508 switch (stringset) {
1509 case ETH_SS_STATS:
1510 memcpy(buf, &ethtool_stats_keys, sizeof(ethtool_stats_keys));
1511 break;
1512 default:
1513 BUG();
1514 break;
1515 }
1516}
1517
1518static void cp_get_ethtool_stats (struct net_device *dev,
1519 struct ethtool_stats *estats, u64 *tmp_stats)
1520{
1521 struct cp_private *cp = netdev_priv(dev);
Stephen Hemminger8b512922005-09-14 09:45:44 -07001522 struct cp_dma_stats *nic_stats;
1523 dma_addr_t dma;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001524 int i;
1525
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001526 nic_stats = dma_alloc_coherent(&cp->pdev->dev, sizeof(*nic_stats),
1527 &dma, GFP_KERNEL);
Stephen Hemminger8b512922005-09-14 09:45:44 -07001528 if (!nic_stats)
1529 return;
Stephen Hemminger97f568d2005-06-26 18:02:44 -04001530
Linus Torvalds1da177e2005-04-16 15:20:36 -07001531 /* begin NIC statistics dump */
Stephen Hemminger8b512922005-09-14 09:45:44 -07001532 cpw32(StatsAddr + 4, (u64)dma >> 32);
1533 cpw32(StatsAddr, ((u64)dma & DMA_32BIT_MASK) | DumpStats);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001534 cpr32(StatsAddr);
1535
Stephen Hemminger97f568d2005-06-26 18:02:44 -04001536 for (i = 0; i < 1000; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001537 if ((cpr32(StatsAddr) & DumpStats) == 0)
1538 break;
Stephen Hemminger97f568d2005-06-26 18:02:44 -04001539 udelay(10);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001540 }
Stephen Hemminger97f568d2005-06-26 18:02:44 -04001541 cpw32(StatsAddr, 0);
1542 cpw32(StatsAddr + 4, 0);
Stephen Hemminger8b512922005-09-14 09:45:44 -07001543 cpr32(StatsAddr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001544
1545 i = 0;
Stephen Hemminger8b512922005-09-14 09:45:44 -07001546 tmp_stats[i++] = le64_to_cpu(nic_stats->tx_ok);
1547 tmp_stats[i++] = le64_to_cpu(nic_stats->rx_ok);
1548 tmp_stats[i++] = le64_to_cpu(nic_stats->tx_err);
1549 tmp_stats[i++] = le32_to_cpu(nic_stats->rx_err);
1550 tmp_stats[i++] = le16_to_cpu(nic_stats->rx_fifo);
1551 tmp_stats[i++] = le16_to_cpu(nic_stats->frame_align);
1552 tmp_stats[i++] = le32_to_cpu(nic_stats->tx_ok_1col);
1553 tmp_stats[i++] = le32_to_cpu(nic_stats->tx_ok_mcol);
1554 tmp_stats[i++] = le64_to_cpu(nic_stats->rx_ok_phys);
1555 tmp_stats[i++] = le64_to_cpu(nic_stats->rx_ok_bcast);
1556 tmp_stats[i++] = le32_to_cpu(nic_stats->rx_ok_mcast);
1557 tmp_stats[i++] = le16_to_cpu(nic_stats->tx_abort);
1558 tmp_stats[i++] = le16_to_cpu(nic_stats->tx_underrun);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001559 tmp_stats[i++] = cp->cp_stats.rx_frags;
Eric Sesterhenn5d9428d2006-04-02 13:52:48 +02001560 BUG_ON(i != CP_NUM_STATS);
Stephen Hemminger8b512922005-09-14 09:45:44 -07001561
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001562 dma_free_coherent(&cp->pdev->dev, sizeof(*nic_stats), nic_stats, dma);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001563}
1564
Jeff Garzik7282d492006-09-13 14:30:00 -04001565static const struct ethtool_ops cp_ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001566 .get_drvinfo = cp_get_drvinfo,
1567 .get_regs_len = cp_get_regs_len,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07001568 .get_sset_count = cp_get_sset_count,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001569 .get_settings = cp_get_settings,
1570 .set_settings = cp_set_settings,
1571 .nway_reset = cp_nway_reset,
1572 .get_link = ethtool_op_get_link,
1573 .get_msglevel = cp_get_msglevel,
1574 .set_msglevel = cp_set_msglevel,
1575 .get_rx_csum = cp_get_rx_csum,
1576 .set_rx_csum = cp_set_rx_csum,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001577 .set_tx_csum = ethtool_op_set_tx_csum, /* local! */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001578 .set_sg = ethtool_op_set_sg,
Jeff Garzikfcec3452005-05-12 19:28:49 -04001579 .set_tso = ethtool_op_set_tso,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001580 .get_regs = cp_get_regs,
1581 .get_wol = cp_get_wol,
1582 .set_wol = cp_set_wol,
1583 .get_strings = cp_get_strings,
1584 .get_ethtool_stats = cp_get_ethtool_stats,
Philip Craig722fdb32006-06-21 11:33:27 +10001585 .get_eeprom_len = cp_get_eeprom_len,
1586 .get_eeprom = cp_get_eeprom,
1587 .set_eeprom = cp_set_eeprom,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001588};
1589
1590static int cp_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1591{
1592 struct cp_private *cp = netdev_priv(dev);
1593 int rc;
1594 unsigned long flags;
1595
1596 if (!netif_running(dev))
1597 return -EINVAL;
1598
1599 spin_lock_irqsave(&cp->lock, flags);
1600 rc = generic_mii_ioctl(&cp->mii_if, if_mii(rq), cmd, NULL);
1601 spin_unlock_irqrestore(&cp->lock, flags);
1602 return rc;
1603}
1604
1605/* Serial EEPROM section. */
1606
1607/* EEPROM_Ctrl bits. */
1608#define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */
1609#define EE_CS 0x08 /* EEPROM chip select. */
1610#define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */
1611#define EE_WRITE_0 0x00
1612#define EE_WRITE_1 0x02
1613#define EE_DATA_READ 0x01 /* EEPROM chip data out. */
1614#define EE_ENB (0x80 | EE_CS)
1615
1616/* Delay between EEPROM clock transitions.
1617 No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
1618 */
1619
1620#define eeprom_delay() readl(ee_addr)
1621
1622/* The EEPROM commands include the alway-set leading bit. */
Philip Craig722fdb32006-06-21 11:33:27 +10001623#define EE_EXTEND_CMD (4)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001624#define EE_WRITE_CMD (5)
1625#define EE_READ_CMD (6)
1626#define EE_ERASE_CMD (7)
1627
Philip Craig722fdb32006-06-21 11:33:27 +10001628#define EE_EWDS_ADDR (0)
1629#define EE_WRAL_ADDR (1)
1630#define EE_ERAL_ADDR (2)
1631#define EE_EWEN_ADDR (3)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001632
Philip Craig722fdb32006-06-21 11:33:27 +10001633#define CP_EEPROM_MAGIC PCI_DEVICE_ID_REALTEK_8139
1634
1635static void eeprom_cmd_start(void __iomem *ee_addr)
1636{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001637 writeb (EE_ENB & ~EE_CS, ee_addr);
1638 writeb (EE_ENB, ee_addr);
1639 eeprom_delay ();
Philip Craig722fdb32006-06-21 11:33:27 +10001640}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001641
Philip Craig722fdb32006-06-21 11:33:27 +10001642static void eeprom_cmd(void __iomem *ee_addr, int cmd, int cmd_len)
1643{
1644 int i;
1645
1646 /* Shift the command bits out. */
1647 for (i = cmd_len - 1; i >= 0; i--) {
1648 int dataval = (cmd & (1 << i)) ? EE_DATA_WRITE : 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001649 writeb (EE_ENB | dataval, ee_addr);
1650 eeprom_delay ();
1651 writeb (EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
1652 eeprom_delay ();
1653 }
1654 writeb (EE_ENB, ee_addr);
1655 eeprom_delay ();
Philip Craig722fdb32006-06-21 11:33:27 +10001656}
1657
1658static void eeprom_cmd_end(void __iomem *ee_addr)
1659{
1660 writeb (~EE_CS, ee_addr);
1661 eeprom_delay ();
1662}
1663
1664static void eeprom_extend_cmd(void __iomem *ee_addr, int extend_cmd,
1665 int addr_len)
1666{
1667 int cmd = (EE_EXTEND_CMD << addr_len) | (extend_cmd << (addr_len - 2));
1668
1669 eeprom_cmd_start(ee_addr);
1670 eeprom_cmd(ee_addr, cmd, 3 + addr_len);
1671 eeprom_cmd_end(ee_addr);
1672}
1673
1674static u16 read_eeprom (void __iomem *ioaddr, int location, int addr_len)
1675{
1676 int i;
1677 u16 retval = 0;
1678 void __iomem *ee_addr = ioaddr + Cfg9346;
1679 int read_cmd = location | (EE_READ_CMD << addr_len);
1680
1681 eeprom_cmd_start(ee_addr);
1682 eeprom_cmd(ee_addr, read_cmd, 3 + addr_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001683
1684 for (i = 16; i > 0; i--) {
1685 writeb (EE_ENB | EE_SHIFT_CLK, ee_addr);
1686 eeprom_delay ();
1687 retval =
1688 (retval << 1) | ((readb (ee_addr) & EE_DATA_READ) ? 1 :
1689 0);
1690 writeb (EE_ENB, ee_addr);
1691 eeprom_delay ();
1692 }
1693
Philip Craig722fdb32006-06-21 11:33:27 +10001694 eeprom_cmd_end(ee_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001695
1696 return retval;
1697}
1698
Philip Craig722fdb32006-06-21 11:33:27 +10001699static void write_eeprom(void __iomem *ioaddr, int location, u16 val,
1700 int addr_len)
1701{
1702 int i;
1703 void __iomem *ee_addr = ioaddr + Cfg9346;
1704 int write_cmd = location | (EE_WRITE_CMD << addr_len);
1705
1706 eeprom_extend_cmd(ee_addr, EE_EWEN_ADDR, addr_len);
1707
1708 eeprom_cmd_start(ee_addr);
1709 eeprom_cmd(ee_addr, write_cmd, 3 + addr_len);
1710 eeprom_cmd(ee_addr, val, 16);
1711 eeprom_cmd_end(ee_addr);
1712
1713 eeprom_cmd_start(ee_addr);
1714 for (i = 0; i < 20000; i++)
1715 if (readb(ee_addr) & EE_DATA_READ)
1716 break;
1717 eeprom_cmd_end(ee_addr);
1718
1719 eeprom_extend_cmd(ee_addr, EE_EWDS_ADDR, addr_len);
1720}
1721
1722static int cp_get_eeprom_len(struct net_device *dev)
1723{
1724 struct cp_private *cp = netdev_priv(dev);
1725 int size;
1726
1727 spin_lock_irq(&cp->lock);
1728 size = read_eeprom(cp->regs, 0, 8) == 0x8129 ? 256 : 128;
1729 spin_unlock_irq(&cp->lock);
1730
1731 return size;
1732}
1733
1734static int cp_get_eeprom(struct net_device *dev,
1735 struct ethtool_eeprom *eeprom, u8 *data)
1736{
1737 struct cp_private *cp = netdev_priv(dev);
1738 unsigned int addr_len;
1739 u16 val;
1740 u32 offset = eeprom->offset >> 1;
1741 u32 len = eeprom->len;
1742 u32 i = 0;
1743
1744 eeprom->magic = CP_EEPROM_MAGIC;
1745
1746 spin_lock_irq(&cp->lock);
1747
1748 addr_len = read_eeprom(cp->regs, 0, 8) == 0x8129 ? 8 : 6;
1749
1750 if (eeprom->offset & 1) {
1751 val = read_eeprom(cp->regs, offset, addr_len);
1752 data[i++] = (u8)(val >> 8);
1753 offset++;
1754 }
1755
1756 while (i < len - 1) {
1757 val = read_eeprom(cp->regs, offset, addr_len);
1758 data[i++] = (u8)val;
1759 data[i++] = (u8)(val >> 8);
1760 offset++;
1761 }
1762
1763 if (i < len) {
1764 val = read_eeprom(cp->regs, offset, addr_len);
1765 data[i] = (u8)val;
1766 }
1767
1768 spin_unlock_irq(&cp->lock);
1769 return 0;
1770}
1771
1772static int cp_set_eeprom(struct net_device *dev,
1773 struct ethtool_eeprom *eeprom, u8 *data)
1774{
1775 struct cp_private *cp = netdev_priv(dev);
1776 unsigned int addr_len;
1777 u16 val;
1778 u32 offset = eeprom->offset >> 1;
1779 u32 len = eeprom->len;
1780 u32 i = 0;
1781
1782 if (eeprom->magic != CP_EEPROM_MAGIC)
1783 return -EINVAL;
1784
1785 spin_lock_irq(&cp->lock);
1786
1787 addr_len = read_eeprom(cp->regs, 0, 8) == 0x8129 ? 8 : 6;
1788
1789 if (eeprom->offset & 1) {
1790 val = read_eeprom(cp->regs, offset, addr_len) & 0xff;
1791 val |= (u16)data[i++] << 8;
1792 write_eeprom(cp->regs, offset, val, addr_len);
1793 offset++;
1794 }
1795
1796 while (i < len - 1) {
1797 val = (u16)data[i++];
1798 val |= (u16)data[i++] << 8;
1799 write_eeprom(cp->regs, offset, val, addr_len);
1800 offset++;
1801 }
1802
1803 if (i < len) {
1804 val = read_eeprom(cp->regs, offset, addr_len) & 0xff00;
1805 val |= (u16)data[i];
1806 write_eeprom(cp->regs, offset, val, addr_len);
1807 }
1808
1809 spin_unlock_irq(&cp->lock);
1810 return 0;
1811}
1812
Linus Torvalds1da177e2005-04-16 15:20:36 -07001813/* Put the board into D3cold state and wait for WakeUp signal */
1814static void cp_set_d3_state (struct cp_private *cp)
1815{
1816 pci_enable_wake (cp->pdev, 0, 1); /* Enable PME# generation */
1817 pci_set_power_state (cp->pdev, PCI_D3hot);
1818}
1819
Stephen Hemminger48dfcde2008-11-19 22:09:07 -08001820static const struct net_device_ops cp_netdev_ops = {
1821 .ndo_open = cp_open,
1822 .ndo_stop = cp_close,
1823 .ndo_validate_addr = eth_validate_addr,
1824 .ndo_set_multicast_list = cp_set_rx_mode,
1825 .ndo_get_stats = cp_get_stats,
1826 .ndo_do_ioctl = cp_ioctl,
Stephen Hemminger00829822008-11-20 20:14:53 -08001827 .ndo_start_xmit = cp_start_xmit,
Stephen Hemminger48dfcde2008-11-19 22:09:07 -08001828 .ndo_tx_timeout = cp_tx_timeout,
1829#if CP_VLAN_TAG_USED
1830 .ndo_vlan_rx_register = cp_vlan_rx_register,
1831#endif
1832#ifdef BROKEN
1833 .ndo_change_mtu = cp_change_mtu,
1834#endif
1835#ifdef CONFIG_NET_POLL_CONTROLLER
1836 .ndo_poll_controller = cp_poll_controller,
1837#endif
1838};
1839
Linus Torvalds1da177e2005-04-16 15:20:36 -07001840static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1841{
1842 struct net_device *dev;
1843 struct cp_private *cp;
1844 int rc;
1845 void __iomem *regs;
Greg Kroah-Hartman2427ddd2006-06-12 17:07:52 -07001846 resource_size_t pciaddr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001847 unsigned int addr_len, i, pci_using_dac;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001848
1849#ifndef MODULE
1850 static int version_printed;
1851 if (version_printed++ == 0)
1852 printk("%s", version);
1853#endif
1854
Linus Torvalds1da177e2005-04-16 15:20:36 -07001855 if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
Auke Kok44c10132007-06-08 15:46:36 -07001856 pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pdev->revision < 0x20) {
Stephen Hemmingerde4549c2008-10-21 18:04:27 -07001857 dev_info(&pdev->dev,
1858 "This (id %04x:%04x rev %02x) is not an 8139C+ compatible chip, use 8139too\n",
Auke Kok44c10132007-06-08 15:46:36 -07001859 pdev->vendor, pdev->device, pdev->revision);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001860 return -ENODEV;
1861 }
1862
1863 dev = alloc_etherdev(sizeof(struct cp_private));
1864 if (!dev)
1865 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001866 SET_NETDEV_DEV(dev, &pdev->dev);
1867
1868 cp = netdev_priv(dev);
1869 cp->pdev = pdev;
1870 cp->dev = dev;
1871 cp->msg_enable = (debug < 0 ? CP_DEF_MSG_ENABLE : debug);
1872 spin_lock_init (&cp->lock);
1873 cp->mii_if.dev = dev;
1874 cp->mii_if.mdio_read = mdio_read;
1875 cp->mii_if.mdio_write = mdio_write;
1876 cp->mii_if.phy_id = CP_INTERNAL_PHY;
1877 cp->mii_if.phy_id_mask = 0x1f;
1878 cp->mii_if.reg_num_mask = 0x1f;
1879 cp_set_rxbufsize(cp);
1880
1881 rc = pci_enable_device(pdev);
1882 if (rc)
1883 goto err_out_free;
1884
1885 rc = pci_set_mwi(pdev);
1886 if (rc)
1887 goto err_out_disable;
1888
1889 rc = pci_request_regions(pdev, DRV_NAME);
1890 if (rc)
1891 goto err_out_mwi;
1892
1893 pciaddr = pci_resource_start(pdev, 1);
1894 if (!pciaddr) {
1895 rc = -EIO;
Jeff Garzik9b91cf92006-06-27 11:39:50 -04001896 dev_err(&pdev->dev, "no MMIO resource\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001897 goto err_out_res;
1898 }
1899 if (pci_resource_len(pdev, 1) < CP_REGS_SIZE) {
1900 rc = -EIO;
Jeff Garzik9b91cf92006-06-27 11:39:50 -04001901 dev_err(&pdev->dev, "MMIO resource (%llx) too small\n",
Jeff Garzik2e8a5382006-06-27 10:47:51 -04001902 (unsigned long long)pci_resource_len(pdev, 1));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001903 goto err_out_res;
1904 }
1905
1906 /* Configure DMA attributes. */
1907 if ((sizeof(dma_addr_t) > 4) &&
Tobias Klauser8662d062005-05-12 22:19:39 -04001908 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK) &&
1909 !pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001910 pci_using_dac = 1;
1911 } else {
1912 pci_using_dac = 0;
1913
Tobias Klauser8662d062005-05-12 22:19:39 -04001914 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001915 if (rc) {
Jeff Garzik9b91cf92006-06-27 11:39:50 -04001916 dev_err(&pdev->dev,
Jeff Garzik2e8a5382006-06-27 10:47:51 -04001917 "No usable DMA configuration, aborting.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001918 goto err_out_res;
1919 }
Tobias Klauser8662d062005-05-12 22:19:39 -04001920 rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001921 if (rc) {
Jeff Garzik9b91cf92006-06-27 11:39:50 -04001922 dev_err(&pdev->dev,
Jeff Garzik2e8a5382006-06-27 10:47:51 -04001923 "No usable consistent DMA configuration, "
1924 "aborting.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001925 goto err_out_res;
1926 }
1927 }
1928
1929 cp->cpcmd = (pci_using_dac ? PCIDAC : 0) |
1930 PCIMulRW | RxChkSum | CpRxOn | CpTxOn;
1931
1932 regs = ioremap(pciaddr, CP_REGS_SIZE);
1933 if (!regs) {
1934 rc = -EIO;
Andrew Morton4626dd42006-07-06 23:58:26 -07001935 dev_err(&pdev->dev, "Cannot map PCI MMIO (%Lx@%Lx)\n",
Jeff Garzik2e8a5382006-06-27 10:47:51 -04001936 (unsigned long long)pci_resource_len(pdev, 1),
1937 (unsigned long long)pciaddr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001938 goto err_out_res;
1939 }
1940 dev->base_addr = (unsigned long) regs;
1941 cp->regs = regs;
1942
1943 cp_stop_hw(cp);
1944
1945 /* read MAC address from EEPROM */
1946 addr_len = read_eeprom (regs, 0, 8) == 0x8129 ? 8 : 6;
1947 for (i = 0; i < 3; i++)
Al Viro03233b92007-08-23 02:31:17 +01001948 ((__le16 *) (dev->dev_addr))[i] =
1949 cpu_to_le16(read_eeprom (regs, i + 7, addr_len));
John W. Linvillebb0ce602005-09-12 10:48:54 -04001950 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001951
Stephen Hemminger48dfcde2008-11-19 22:09:07 -08001952 dev->netdev_ops = &cp_netdev_ops;
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001953 netif_napi_add(dev, &cp->napi, cp_rx_poll, 16);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001954 dev->ethtool_ops = &cp_ethtool_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001955 dev->watchdog_timeo = TX_TIMEOUT;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001956
1957#if CP_VLAN_TAG_USED
1958 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001959#endif
1960
1961 if (pci_using_dac)
1962 dev->features |= NETIF_F_HIGHDMA;
1963
Jeff Garzikfcec3452005-05-12 19:28:49 -04001964#if 0 /* disabled by default until verified */
1965 dev->features |= NETIF_F_TSO;
1966#endif
1967
Linus Torvalds1da177e2005-04-16 15:20:36 -07001968 dev->irq = pdev->irq;
1969
1970 rc = register_netdev(dev);
1971 if (rc)
1972 goto err_out_iomap;
1973
1974 printk (KERN_INFO "%s: RTL-8139C+ at 0x%lx, "
Johannes Berge1749612008-10-27 15:59:26 -07001975 "%pM, IRQ %d\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001976 dev->name,
1977 dev->base_addr,
Johannes Berge1749612008-10-27 15:59:26 -07001978 dev->dev_addr,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001979 dev->irq);
1980
1981 pci_set_drvdata(pdev, dev);
1982
1983 /* enable busmastering and memory-write-invalidate */
1984 pci_set_master(pdev);
1985
Jeff Garzik2e8a5382006-06-27 10:47:51 -04001986 if (cp->wol_enabled)
1987 cp_set_d3_state (cp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001988
1989 return 0;
1990
1991err_out_iomap:
1992 iounmap(regs);
1993err_out_res:
1994 pci_release_regions(pdev);
1995err_out_mwi:
1996 pci_clear_mwi(pdev);
1997err_out_disable:
1998 pci_disable_device(pdev);
1999err_out_free:
2000 free_netdev(dev);
2001 return rc;
2002}
2003
2004static void cp_remove_one (struct pci_dev *pdev)
2005{
2006 struct net_device *dev = pci_get_drvdata(pdev);
2007 struct cp_private *cp = netdev_priv(dev);
2008
Linus Torvalds1da177e2005-04-16 15:20:36 -07002009 unregister_netdev(dev);
2010 iounmap(cp->regs);
Jeff Garzik2e8a5382006-06-27 10:47:51 -04002011 if (cp->wol_enabled)
2012 pci_set_power_state (pdev, PCI_D0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002013 pci_release_regions(pdev);
2014 pci_clear_mwi(pdev);
2015 pci_disable_device(pdev);
2016 pci_set_drvdata(pdev, NULL);
2017 free_netdev(dev);
2018}
2019
2020#ifdef CONFIG_PM
Pavel Machek05adc3b2005-04-16 15:25:25 -07002021static int cp_suspend (struct pci_dev *pdev, pm_message_t state)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002022{
François Romieu7668a492006-08-15 20:10:57 +02002023 struct net_device *dev = pci_get_drvdata(pdev);
2024 struct cp_private *cp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002025 unsigned long flags;
2026
François Romieu7668a492006-08-15 20:10:57 +02002027 if (!netif_running(dev))
2028 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002029
2030 netif_device_detach (dev);
2031 netif_stop_queue (dev);
2032
2033 spin_lock_irqsave (&cp->lock, flags);
2034
2035 /* Disable Rx and Tx */
2036 cpw16 (IntrMask, 0);
2037 cpw8 (Cmd, cpr8 (Cmd) & (~RxOn | ~TxOn));
2038
2039 spin_unlock_irqrestore (&cp->lock, flags);
2040
Francois Romieu576cfa92006-02-27 23:15:06 +01002041 pci_save_state(pdev);
2042 pci_enable_wake(pdev, pci_choose_state(pdev, state), cp->wol_enabled);
2043 pci_set_power_state(pdev, pci_choose_state(pdev, state));
Linus Torvalds1da177e2005-04-16 15:20:36 -07002044
2045 return 0;
2046}
2047
2048static int cp_resume (struct pci_dev *pdev)
2049{
Francois Romieu576cfa92006-02-27 23:15:06 +01002050 struct net_device *dev = pci_get_drvdata (pdev);
2051 struct cp_private *cp = netdev_priv(dev);
Pierre Ossmana4cf0762005-07-04 00:22:53 +02002052 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002053
Francois Romieu576cfa92006-02-27 23:15:06 +01002054 if (!netif_running(dev))
2055 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002056
2057 netif_device_attach (dev);
Francois Romieu576cfa92006-02-27 23:15:06 +01002058
2059 pci_set_power_state(pdev, PCI_D0);
2060 pci_restore_state(pdev);
2061 pci_enable_wake(pdev, PCI_D0, 0);
2062
2063 /* FIXME: sh*t may happen if the Rx ring buffer is depleted */
2064 cp_init_rings_index (cp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002065 cp_init_hw (cp);
2066 netif_start_queue (dev);
Pierre Ossmana4cf0762005-07-04 00:22:53 +02002067
2068 spin_lock_irqsave (&cp->lock, flags);
2069
Richard Knutsson2501f842007-05-19 22:26:40 +02002070 mii_check_media(&cp->mii_if, netif_msg_link(cp), false);
Pierre Ossmana4cf0762005-07-04 00:22:53 +02002071
2072 spin_unlock_irqrestore (&cp->lock, flags);
Jeff Garzikf3b197a2006-05-26 21:39:03 -04002073
Linus Torvalds1da177e2005-04-16 15:20:36 -07002074 return 0;
2075}
2076#endif /* CONFIG_PM */
2077
2078static struct pci_driver cp_driver = {
2079 .name = DRV_NAME,
2080 .id_table = cp_pci_tbl,
2081 .probe = cp_init_one,
2082 .remove = cp_remove_one,
2083#ifdef CONFIG_PM
2084 .resume = cp_resume,
2085 .suspend = cp_suspend,
2086#endif
2087};
2088
2089static int __init cp_init (void)
2090{
2091#ifdef MODULE
2092 printk("%s", version);
2093#endif
Jeff Garzik29917622006-08-19 17:48:59 -04002094 return pci_register_driver(&cp_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002095}
2096
2097static void __exit cp_exit (void)
2098{
2099 pci_unregister_driver (&cp_driver);
2100}
2101
2102module_init(cp_init);
2103module_exit(cp_exit);