blob: 57f7c1a2c1d7537d7c34614e87aefaec060a27c5 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Driver for the Macintosh 68K onboard MACE controller with PSC
3 * driven DMA. The MACE driver code is derived from mace.c. The
4 * Mac68k theory of operation is courtesy of the MacBSD wizards.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Copyright (C) 1996 Paul Mackerras.
12 * Copyright (C) 1998 Alan Cox <alan@redhat.com>
13 *
14 * Modified heavily by Joshua M. Thompson based on Dave Huang's NetBSD driver
Finn Thain8b6aaab2007-05-01 22:33:01 +020015 *
16 * Copyright (C) 2007 Finn Thain
17 *
18 * Converted to DMA API, converted to unified driver model,
19 * sync'd some routines with mace.c and fixed various bugs.
Linus Torvalds1da177e2005-04-16 15:20:36 -070020 */
21
22
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/netdevice.h>
26#include <linux/etherdevice.h>
27#include <linux/delay.h>
28#include <linux/string.h>
29#include <linux/crc32.h>
Akinobu Mitabc63eb92006-12-19 13:09:08 -080030#include <linux/bitrev.h>
Finn Thain8b6aaab2007-05-01 22:33:01 +020031#include <linux/dma-mapping.h>
32#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include <asm/irq.h>
35#include <asm/macintosh.h>
36#include <asm/macints.h>
37#include <asm/mac_psc.h>
38#include <asm/page.h>
39#include "mace.h"
40
Finn Thain8b6aaab2007-05-01 22:33:01 +020041static char mac_mace_string[] = "macmace";
42static struct platform_device *mac_mace_device;
43
44#define N_TX_BUFF_ORDER 0
45#define N_TX_RING (1 << N_TX_BUFF_ORDER)
46#define N_RX_BUFF_ORDER 3
47#define N_RX_RING (1 << N_RX_BUFF_ORDER)
48
Linus Torvalds1da177e2005-04-16 15:20:36 -070049#define TX_TIMEOUT HZ
50
Finn Thain8b6aaab2007-05-01 22:33:01 +020051#define MACE_BUFF_SIZE 0x800
52
53/* Chip rev needs workaround on HW & multicast addr change */
54#define BROKEN_ADDRCHG_REV 0x0941
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
56/* The MACE is simply wired down on a Mac68K box */
57
58#define MACE_BASE (void *)(0x50F1C000)
59#define MACE_PROM (void *)(0x50F08001)
60
61struct mace_data {
62 volatile struct mace *mace;
Finn Thain8b6aaab2007-05-01 22:33:01 +020063 unsigned char *tx_ring;
64 dma_addr_t tx_ring_phys;
65 unsigned char *rx_ring;
66 dma_addr_t rx_ring_phys;
Linus Torvalds1da177e2005-04-16 15:20:36 -070067 int dma_intr;
Linus Torvalds1da177e2005-04-16 15:20:36 -070068 int rx_slot, rx_tail;
69 int tx_slot, tx_sloti, tx_count;
Finn Thain8b6aaab2007-05-01 22:33:01 +020070 int chipid;
71 struct device *device;
Linus Torvalds1da177e2005-04-16 15:20:36 -070072};
73
74struct mace_frame {
Finn Thain8b6aaab2007-05-01 22:33:01 +020075 u8 rcvcnt;
76 u8 pad1;
77 u8 rcvsts;
78 u8 pad2;
79 u8 rntpc;
80 u8 pad3;
81 u8 rcvcc;
82 u8 pad4;
83 u32 pad5;
84 u32 pad6;
Jeff Garzik6aa20a22006-09-13 13:24:59 -040085 u8 data[1];
Linus Torvalds1da177e2005-04-16 15:20:36 -070086 /* And frame continues.. */
87};
88
89#define PRIV_BYTES sizeof(struct mace_data)
90
Linus Torvalds1da177e2005-04-16 15:20:36 -070091static int mace_open(struct net_device *dev);
92static int mace_close(struct net_device *dev);
93static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -070094static void mace_set_multicast(struct net_device *dev);
95static int mace_set_address(struct net_device *dev, void *addr);
Finn Thain8b6aaab2007-05-01 22:33:01 +020096static void mace_reset(struct net_device *dev);
David Howells7d12e782006-10-05 14:55:46 +010097static irqreturn_t mace_interrupt(int irq, void *dev_id);
98static irqreturn_t mace_dma_intr(int irq, void *dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -070099static void mace_tx_timeout(struct net_device *dev);
Finn Thain8b6aaab2007-05-01 22:33:01 +0200100static void __mace_set_address(struct net_device *dev, void *addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101
Linus Torvalds1da177e2005-04-16 15:20:36 -0700102/*
103 * Load a receive DMA channel with a base address and ring length
104 */
105
106static void mace_load_rxdma_base(struct net_device *dev, int set)
107{
Finn Thain8b6aaab2007-05-01 22:33:01 +0200108 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109
110 psc_write_word(PSC_ENETRD_CMD + set, 0x0100);
111 psc_write_long(PSC_ENETRD_ADDR + set, (u32) mp->rx_ring_phys);
112 psc_write_long(PSC_ENETRD_LEN + set, N_RX_RING);
113 psc_write_word(PSC_ENETRD_CMD + set, 0x9800);
114 mp->rx_tail = 0;
115}
116
117/*
118 * Reset the receive DMA subsystem
119 */
120
121static void mace_rxdma_reset(struct net_device *dev)
122{
Finn Thain8b6aaab2007-05-01 22:33:01 +0200123 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700124 volatile struct mace *mace = mp->mace;
125 u8 maccc = mace->maccc;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400126
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127 mace->maccc = maccc & ~ENRCV;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400128
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129 psc_write_word(PSC_ENETRD_CTL, 0x8800);
130 mace_load_rxdma_base(dev, 0x00);
131 psc_write_word(PSC_ENETRD_CTL, 0x0400);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400132
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133 psc_write_word(PSC_ENETRD_CTL, 0x8800);
134 mace_load_rxdma_base(dev, 0x10);
135 psc_write_word(PSC_ENETRD_CTL, 0x0400);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400136
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137 mace->maccc = maccc;
138 mp->rx_slot = 0;
139
140 psc_write_word(PSC_ENETRD_CMD + PSC_SET0, 0x9800);
141 psc_write_word(PSC_ENETRD_CMD + PSC_SET1, 0x9800);
142}
143
144/*
145 * Reset the transmit DMA subsystem
146 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400147
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148static void mace_txdma_reset(struct net_device *dev)
149{
Finn Thain8b6aaab2007-05-01 22:33:01 +0200150 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151 volatile struct mace *mace = mp->mace;
152 u8 maccc;
153
154 psc_write_word(PSC_ENETWR_CTL, 0x8800);
155
156 maccc = mace->maccc;
157 mace->maccc = maccc & ~ENXMT;
158
159 mp->tx_slot = mp->tx_sloti = 0;
160 mp->tx_count = N_TX_RING;
161
162 psc_write_word(PSC_ENETWR_CTL, 0x0400);
163 mace->maccc = maccc;
164}
165
166/*
167 * Disable DMA
168 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400169
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170static void mace_dma_off(struct net_device *dev)
171{
172 psc_write_word(PSC_ENETRD_CTL, 0x8800);
173 psc_write_word(PSC_ENETRD_CTL, 0x1000);
174 psc_write_word(PSC_ENETRD_CMD + PSC_SET0, 0x1100);
175 psc_write_word(PSC_ENETRD_CMD + PSC_SET1, 0x1100);
176
177 psc_write_word(PSC_ENETWR_CTL, 0x8800);
178 psc_write_word(PSC_ENETWR_CTL, 0x1000);
179 psc_write_word(PSC_ENETWR_CMD + PSC_SET0, 0x1100);
180 psc_write_word(PSC_ENETWR_CMD + PSC_SET1, 0x1100);
181}
182
183/*
184 * Not really much of a probe. The hardware table tells us if this
185 * model of Macintrash has a MACE (AV macintoshes)
186 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400187
Finn Thain8b6aaab2007-05-01 22:33:01 +0200188static int __devinit mace_probe(struct platform_device *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189{
190 int j;
191 struct mace_data *mp;
192 unsigned char *addr;
193 struct net_device *dev;
194 unsigned char checksum = 0;
195 static int found = 0;
196 int err;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400197
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198 if (found || macintosh_config->ether_type != MAC_ETHER_MACE)
Finn Thain8b6aaab2007-05-01 22:33:01 +0200199 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700200
201 found = 1; /* prevent 'finding' one on every device probe */
202
203 dev = alloc_etherdev(PRIV_BYTES);
204 if (!dev)
Finn Thain8b6aaab2007-05-01 22:33:01 +0200205 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206
Finn Thain8b6aaab2007-05-01 22:33:01 +0200207 mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208
Finn Thain8b6aaab2007-05-01 22:33:01 +0200209 mp->device = &pdev->dev;
210 SET_NETDEV_DEV(dev, &pdev->dev);
Finn Thain8b6aaab2007-05-01 22:33:01 +0200211
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212 dev->base_addr = (u32)MACE_BASE;
213 mp->mace = (volatile struct mace *) MACE_BASE;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400214
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215 dev->irq = IRQ_MAC_MACE;
216 mp->dma_intr = IRQ_MAC_MACE_DMA;
217
Finn Thain8b6aaab2007-05-01 22:33:01 +0200218 mp->chipid = mp->mace->chipid_hi << 8 | mp->mace->chipid_lo;
219
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220 /*
221 * The PROM contains 8 bytes which total 0xFF when XOR'd
222 * together. Due to the usual peculiar apple brain damage
223 * the bytes are spaced out in a strange boundary and the
224 * bits are reversed.
225 */
226
227 addr = (void *)MACE_PROM;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400228
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229 for (j = 0; j < 6; ++j) {
Akinobu Mitabc63eb92006-12-19 13:09:08 -0800230 u8 v = bitrev8(addr[j<<4]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231 checksum ^= v;
232 dev->dev_addr[j] = v;
233 }
234 for (; j < 8; ++j) {
Akinobu Mitabc63eb92006-12-19 13:09:08 -0800235 checksum ^= bitrev8(addr[j<<4]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400237
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238 if (checksum != 0xFF) {
239 free_netdev(dev);
Finn Thain8b6aaab2007-05-01 22:33:01 +0200240 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241 }
242
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243 dev->open = mace_open;
244 dev->stop = mace_close;
245 dev->hard_start_xmit = mace_xmit_start;
246 dev->tx_timeout = mace_tx_timeout;
247 dev->watchdog_timeo = TX_TIMEOUT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248 dev->set_multicast_list = mace_set_multicast;
249 dev->set_mac_address = mace_set_address;
250
251 printk(KERN_INFO "%s: 68K MACE, hardware address %.2X", dev->name, dev->dev_addr[0]);
252 for (j = 1 ; j < 6 ; j++) printk(":%.2X", dev->dev_addr[j]);
253 printk("\n");
254
255 err = register_netdev(dev);
256 if (!err)
Finn Thain8b6aaab2007-05-01 22:33:01 +0200257 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258
259 free_netdev(dev);
Finn Thain8b6aaab2007-05-01 22:33:01 +0200260 return err;
261}
262
263/*
264 * Reset the chip.
265 */
266
267static void mace_reset(struct net_device *dev)
268{
269 struct mace_data *mp = netdev_priv(dev);
270 volatile struct mace *mb = mp->mace;
271 int i;
272
273 /* soft-reset the chip */
274 i = 200;
275 while (--i) {
276 mb->biucc = SWRST;
277 if (mb->biucc & SWRST) {
278 udelay(10);
279 continue;
280 }
281 break;
282 }
283 if (!i) {
284 printk(KERN_ERR "macmace: cannot reset chip!\n");
285 return;
286 }
287
288 mb->maccc = 0; /* turn off tx, rx */
289 mb->imr = 0xFF; /* disable all intrs for now */
290 i = mb->ir;
291
292 mb->biucc = XMTSP_64;
293 mb->utr = RTRD;
294 mb->fifocc = XMTFW_8 | RCVFW_64 | XMTFWU | RCVFWU;
295
296 mb->xmtfc = AUTO_PAD_XMIT; /* auto-pad short frames */
297 mb->rcvfc = 0;
298
299 /* load up the hardware address */
300 __mace_set_address(dev, dev->dev_addr);
301
302 /* clear the multicast filter */
303 if (mp->chipid == BROKEN_ADDRCHG_REV)
304 mb->iac = LOGADDR;
305 else {
306 mb->iac = ADDRCHG | LOGADDR;
307 while ((mb->iac & ADDRCHG) != 0)
308 ;
309 }
310 for (i = 0; i < 8; ++i)
311 mb->ladrf = 0;
312
313 /* done changing address */
314 if (mp->chipid != BROKEN_ADDRCHG_REV)
315 mb->iac = 0;
316
317 mb->plscc = PORTSEL_AUI;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318}
319
320/*
321 * Load the address on a mace controller.
322 */
323
Finn Thain8b6aaab2007-05-01 22:33:01 +0200324static void __mace_set_address(struct net_device *dev, void *addr)
325{
326 struct mace_data *mp = netdev_priv(dev);
327 volatile struct mace *mb = mp->mace;
328 unsigned char *p = addr;
329 int i;
330
331 /* load up the hardware address */
332 if (mp->chipid == BROKEN_ADDRCHG_REV)
333 mb->iac = PHYADDR;
334 else {
335 mb->iac = ADDRCHG | PHYADDR;
336 while ((mb->iac & ADDRCHG) != 0)
337 ;
338 }
339 for (i = 0; i < 6; ++i)
340 mb->padr = dev->dev_addr[i] = p[i];
341 if (mp->chipid != BROKEN_ADDRCHG_REV)
342 mb->iac = 0;
343}
344
Linus Torvalds1da177e2005-04-16 15:20:36 -0700345static int mace_set_address(struct net_device *dev, void *addr)
346{
Finn Thain8b6aaab2007-05-01 22:33:01 +0200347 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348 volatile struct mace *mb = mp->mace;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349 unsigned long flags;
350 u8 maccc;
351
352 local_irq_save(flags);
353
354 maccc = mb->maccc;
355
Finn Thain8b6aaab2007-05-01 22:33:01 +0200356 __mace_set_address(dev, addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700357
358 mb->maccc = maccc;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200359
Linus Torvalds1da177e2005-04-16 15:20:36 -0700360 local_irq_restore(flags);
361
362 return 0;
363}
364
365/*
366 * Open the Macintosh MACE. Most of this is playing with the DMA
367 * engine. The ethernet chip is quite friendly.
368 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400369
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370static int mace_open(struct net_device *dev)
371{
Finn Thain8b6aaab2007-05-01 22:33:01 +0200372 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700373 volatile struct mace *mb = mp->mace;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700374
Finn Thain8b6aaab2007-05-01 22:33:01 +0200375 /* reset the chip */
376 mace_reset(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700377
378 if (request_irq(dev->irq, mace_interrupt, 0, dev->name, dev)) {
379 printk(KERN_ERR "%s: can't get irq %d\n", dev->name, dev->irq);
380 return -EAGAIN;
381 }
382 if (request_irq(mp->dma_intr, mace_dma_intr, 0, dev->name, dev)) {
383 printk(KERN_ERR "%s: can't get irq %d\n", dev->name, mp->dma_intr);
384 free_irq(dev->irq, dev);
385 return -EAGAIN;
386 }
387
388 /* Allocate the DMA ring buffers */
389
Finn Thain8b6aaab2007-05-01 22:33:01 +0200390 mp->tx_ring = dma_alloc_coherent(mp->device,
391 N_TX_RING * MACE_BUFF_SIZE,
392 &mp->tx_ring_phys, GFP_KERNEL);
393 if (mp->tx_ring == NULL) {
394 printk(KERN_ERR "%s: unable to allocate DMA tx buffers\n", dev->name);
395 goto out1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396 }
397
Finn Thain8b6aaab2007-05-01 22:33:01 +0200398 mp->rx_ring = dma_alloc_coherent(mp->device,
399 N_RX_RING * MACE_BUFF_SIZE,
400 &mp->rx_ring_phys, GFP_KERNEL);
401 if (mp->rx_ring == NULL) {
402 printk(KERN_ERR "%s: unable to allocate DMA rx buffers\n", dev->name);
403 goto out2;
404 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700405
406 mace_dma_off(dev);
407
408 /* Not sure what these do */
409
410 psc_write_word(PSC_ENETWR_CTL, 0x9000);
411 psc_write_word(PSC_ENETRD_CTL, 0x9000);
412 psc_write_word(PSC_ENETWR_CTL, 0x0400);
413 psc_write_word(PSC_ENETRD_CTL, 0x0400);
414
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415 mace_rxdma_reset(dev);
416 mace_txdma_reset(dev);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400417
Finn Thain8b6aaab2007-05-01 22:33:01 +0200418 /* turn it on! */
419 mb->maccc = ENXMT | ENRCV;
420 /* enable all interrupts except receive interrupts */
421 mb->imr = RCVINT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700422 return 0;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200423
424out2:
425 dma_free_coherent(mp->device, N_TX_RING * MACE_BUFF_SIZE,
426 mp->tx_ring, mp->tx_ring_phys);
427out1:
428 free_irq(dev->irq, dev);
429 free_irq(mp->dma_intr, dev);
430 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431}
432
433/*
434 * Shut down the mace and its interrupt channel
435 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400436
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437static int mace_close(struct net_device *dev)
438{
Finn Thain8b6aaab2007-05-01 22:33:01 +0200439 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700440 volatile struct mace *mb = mp->mace;
441
442 mb->maccc = 0; /* disable rx and tx */
443 mb->imr = 0xFF; /* disable all irqs */
444 mace_dma_off(dev); /* disable rx and tx dma */
445
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446 return 0;
447}
448
449/*
450 * Transmit a frame
451 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400452
Linus Torvalds1da177e2005-04-16 15:20:36 -0700453static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev)
454{
Finn Thain8b6aaab2007-05-01 22:33:01 +0200455 struct mace_data *mp = netdev_priv(dev);
456 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457
Finn Thain8b6aaab2007-05-01 22:33:01 +0200458 /* Stop the queue since there's only the one buffer */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700459
Finn Thain8b6aaab2007-05-01 22:33:01 +0200460 local_irq_save(flags);
461 netif_stop_queue(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700462 if (!mp->tx_count) {
Finn Thain8b6aaab2007-05-01 22:33:01 +0200463 printk(KERN_ERR "macmace: tx queue running but no free buffers.\n");
464 local_irq_restore(flags);
465 return NETDEV_TX_BUSY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700466 }
467 mp->tx_count--;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200468 local_irq_restore(flags);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400469
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700470 dev->stats.tx_packets++;
471 dev->stats.tx_bytes += skb->len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700472
473 /* We need to copy into our xmit buffer to take care of alignment and caching issues */
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -0300474 skb_copy_from_linear_data(skb, mp->tx_ring, skb->len);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700475
476 /* load the Tx DMA and fire it off */
477
478 psc_write_long(PSC_ENETWR_ADDR + mp->tx_slot, (u32) mp->tx_ring_phys);
479 psc_write_long(PSC_ENETWR_LEN + mp->tx_slot, skb->len);
480 psc_write_word(PSC_ENETWR_CMD + mp->tx_slot, 0x9800);
481
482 mp->tx_slot ^= 0x10;
483
484 dev_kfree_skb(skb);
485
Finn Thain8b6aaab2007-05-01 22:33:01 +0200486 dev->trans_start = jiffies;
487 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700488}
489
Linus Torvalds1da177e2005-04-16 15:20:36 -0700490static void mace_set_multicast(struct net_device *dev)
491{
Finn Thain8b6aaab2007-05-01 22:33:01 +0200492 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700493 volatile struct mace *mb = mp->mace;
494 int i, j;
495 u32 crc;
496 u8 maccc;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200497 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700498
Finn Thain8b6aaab2007-05-01 22:33:01 +0200499 local_irq_save(flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700500 maccc = mb->maccc;
501 mb->maccc &= ~PROM;
502
503 if (dev->flags & IFF_PROMISC) {
504 mb->maccc |= PROM;
505 } else {
506 unsigned char multicast_filter[8];
507 struct dev_mc_list *dmi = dev->mc_list;
508
509 if (dev->flags & IFF_ALLMULTI) {
510 for (i = 0; i < 8; i++) {
511 multicast_filter[i] = 0xFF;
512 }
513 } else {
514 for (i = 0; i < 8; i++)
515 multicast_filter[i] = 0;
516 for (i = 0; i < dev->mc_count; i++) {
517 crc = ether_crc_le(6, dmi->dmi_addr);
518 j = crc >> 26; /* bit number in multicast_filter */
519 multicast_filter[j >> 3] |= 1 << (j & 7);
520 dmi = dmi->next;
521 }
522 }
523
Finn Thain8b6aaab2007-05-01 22:33:01 +0200524 if (mp->chipid == BROKEN_ADDRCHG_REV)
525 mb->iac = LOGADDR;
526 else {
527 mb->iac = ADDRCHG | LOGADDR;
528 while ((mb->iac & ADDRCHG) != 0)
529 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700530 }
Finn Thain8b6aaab2007-05-01 22:33:01 +0200531 for (i = 0; i < 8; ++i)
532 mb->ladrf = multicast_filter[i];
533 if (mp->chipid != BROKEN_ADDRCHG_REV)
534 mb->iac = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535 }
536
537 mb->maccc = maccc;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200538 local_irq_restore(flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700539}
540
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541static void mace_handle_misc_intrs(struct mace_data *mp, int intr)
542{
543 volatile struct mace *mb = mp->mace;
544 static int mace_babbles, mace_jabbers;
545
Finn Thain8b6aaab2007-05-01 22:33:01 +0200546 if (intr & MPCO)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700547 dev->stats.rx_missed_errors += 256;
548 dev->stats.rx_missed_errors += mb->mpc; /* reading clears it */
Finn Thain8b6aaab2007-05-01 22:33:01 +0200549 if (intr & RNTPCO)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700550 dev->stats.rx_length_errors += 256;
551 dev->stats.rx_length_errors += mb->rntpc; /* reading clears it */
Finn Thain8b6aaab2007-05-01 22:33:01 +0200552 if (intr & CERR)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700553 ++dev->stats.tx_heartbeat_errors;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200554 if (intr & BABBLE)
555 if (mace_babbles++ < 4)
556 printk(KERN_DEBUG "macmace: babbling transmitter\n");
557 if (intr & JABBER)
558 if (mace_jabbers++ < 4)
559 printk(KERN_DEBUG "macmace: jabbering transceiver\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700560}
561
David Howells7d12e782006-10-05 14:55:46 +0100562static irqreturn_t mace_interrupt(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700563{
564 struct net_device *dev = (struct net_device *) dev_id;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200565 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700566 volatile struct mace *mb = mp->mace;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200567 int intr, fs;
Alexey Dobriyan099575b2007-07-06 18:57:13 +0400568 unsigned long flags;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400569
Finn Thain8b6aaab2007-05-01 22:33:01 +0200570 /* don't want the dma interrupt handler to fire */
571 local_irq_save(flags);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400572
Finn Thain8b6aaab2007-05-01 22:33:01 +0200573 intr = mb->ir; /* read interrupt register */
574 mace_handle_misc_intrs(mp, intr);
575
576 if (intr & XMTINT) {
577 fs = mb->xmtfs;
578 if ((fs & XMTSV) == 0) {
579 printk(KERN_ERR "macmace: xmtfs not valid! (fs=%x)\n", fs);
580 mace_reset(dev);
581 /*
582 * XXX mace likes to hang the machine after a xmtfs error.
583 * This is hard to reproduce, reseting *may* help
584 */
585 }
586 /* dma should have finished */
587 if (!mp->tx_count) {
588 printk(KERN_DEBUG "macmace: tx ring ran out? (fs=%x)\n", fs);
589 }
590 /* Update stats */
591 if (fs & (UFLO|LCOL|LCAR|RTRY)) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700592 ++dev->stats.tx_errors;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200593 if (fs & LCAR)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700594 ++dev->stats.tx_carrier_errors;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200595 else if (fs & (UFLO|LCOL|RTRY)) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700596 ++dev->stats.tx_aborted_errors;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200597 if (mb->xmtfs & UFLO) {
598 printk(KERN_ERR "%s: DMA underrun.\n", dev->name);
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700599 dev->stats.tx_fifo_errors++;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200600 mace_txdma_reset(dev);
601 }
602 }
603 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700604 }
Finn Thain8b6aaab2007-05-01 22:33:01 +0200605
606 if (mp->tx_count)
607 netif_wake_queue(dev);
608
609 local_irq_restore(flags);
610
Linus Torvalds1da177e2005-04-16 15:20:36 -0700611 return IRQ_HANDLED;
612}
613
614static void mace_tx_timeout(struct net_device *dev)
615{
Finn Thain8b6aaab2007-05-01 22:33:01 +0200616 struct mace_data *mp = netdev_priv(dev);
617 volatile struct mace *mb = mp->mace;
618 unsigned long flags;
619
620 local_irq_save(flags);
621
622 /* turn off both tx and rx and reset the chip */
623 mb->maccc = 0;
624 printk(KERN_ERR "macmace: transmit timeout - resetting\n");
625 mace_txdma_reset(dev);
626 mace_reset(dev);
627
628 /* restart rx dma */
629 mace_rxdma_reset(dev);
630
631 mp->tx_count = N_TX_RING;
632 netif_wake_queue(dev);
633
634 /* turn it on! */
635 mb->maccc = ENXMT | ENRCV;
636 /* enable all interrupts except receive interrupts */
637 mb->imr = RCVINT;
638
639 local_irq_restore(flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640}
641
642/*
643 * Handle a newly arrived frame
644 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400645
Linus Torvalds1da177e2005-04-16 15:20:36 -0700646static void mace_dma_rx_frame(struct net_device *dev, struct mace_frame *mf)
647{
Finn Thain8b6aaab2007-05-01 22:33:01 +0200648 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700649 struct sk_buff *skb;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200650 unsigned int frame_status = mf->rcvsts;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700651
Finn Thain8b6aaab2007-05-01 22:33:01 +0200652 if (frame_status & (RS_OFLO | RS_CLSN | RS_FRAMERR | RS_FCSERR)) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700653 dev->stats.rx_errors++;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200654 if (frame_status & RS_OFLO) {
655 printk(KERN_DEBUG "%s: fifo overflow.\n", dev->name);
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700656 dev->stats.rx_fifo_errors++;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200657 }
658 if (frame_status & RS_CLSN)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700659 dev->stats.collisions++;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200660 if (frame_status & RS_FRAMERR)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700661 dev->stats.rx_frame_errors++;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200662 if (frame_status & RS_FCSERR)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700663 dev->stats.rx_crc_errors++;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200664 } else {
665 unsigned int frame_length = mf->rcvcnt + ((frame_status & 0x0F) << 8 );
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400666
Finn Thain8b6aaab2007-05-01 22:33:01 +0200667 skb = dev_alloc_skb(frame_length + 2);
668 if (!skb) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700669 dev->stats.rx_dropped++;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200670 return;
671 }
672 skb_reserve(skb, 2);
673 memcpy(skb_put(skb, frame_length), mf->data, frame_length);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400674
Finn Thain8b6aaab2007-05-01 22:33:01 +0200675 skb->protocol = eth_type_trans(skb, dev);
676 netif_rx(skb);
677 dev->last_rx = jiffies;
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700678 dev->stats.rx_packets++;
679 dev->stats.rx_bytes += frame_length;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700680 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700681}
682
683/*
684 * The PSC has passed us a DMA interrupt event.
685 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400686
David Howells7d12e782006-10-05 14:55:46 +0100687static irqreturn_t mace_dma_intr(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700688{
689 struct net_device *dev = (struct net_device *) dev_id;
Finn Thain8b6aaab2007-05-01 22:33:01 +0200690 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700691 int left, head;
692 u16 status;
693 u32 baka;
694
695 /* Not sure what this does */
696
697 while ((baka = psc_read_long(PSC_MYSTERY)) != psc_read_long(PSC_MYSTERY));
698 if (!(baka & 0x60000000)) return IRQ_NONE;
699
700 /*
701 * Process the read queue
702 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400703
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704 status = psc_read_word(PSC_ENETRD_CTL);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400705
Linus Torvalds1da177e2005-04-16 15:20:36 -0700706 if (status & 0x2000) {
707 mace_rxdma_reset(dev);
708 } else if (status & 0x0100) {
709 psc_write_word(PSC_ENETRD_CMD + mp->rx_slot, 0x1100);
710
711 left = psc_read_long(PSC_ENETRD_LEN + mp->rx_slot);
712 head = N_RX_RING - left;
713
714 /* Loop through the ring buffer and process new packages */
715
716 while (mp->rx_tail < head) {
Finn Thain8b6aaab2007-05-01 22:33:01 +0200717 mace_dma_rx_frame(dev, (struct mace_frame*) (mp->rx_ring
718 + (mp->rx_tail * MACE_BUFF_SIZE)));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700719 mp->rx_tail++;
720 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400721
Linus Torvalds1da177e2005-04-16 15:20:36 -0700722 /* If we're out of buffers in this ring then switch to */
723 /* the other set, otherwise just reactivate this one. */
724
725 if (!left) {
726 mace_load_rxdma_base(dev, mp->rx_slot);
727 mp->rx_slot ^= 0x10;
728 } else {
729 psc_write_word(PSC_ENETRD_CMD + mp->rx_slot, 0x9800);
730 }
731 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400732
Linus Torvalds1da177e2005-04-16 15:20:36 -0700733 /*
734 * Process the write queue
735 */
736
737 status = psc_read_word(PSC_ENETWR_CTL);
738
739 if (status & 0x2000) {
740 mace_txdma_reset(dev);
741 } else if (status & 0x0100) {
742 psc_write_word(PSC_ENETWR_CMD + mp->tx_sloti, 0x0100);
743 mp->tx_sloti ^= 0x10;
744 mp->tx_count++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700745 }
746 return IRQ_HANDLED;
747}
748
749MODULE_LICENSE("GPL");
Finn Thain8b6aaab2007-05-01 22:33:01 +0200750MODULE_DESCRIPTION("Macintosh MACE ethernet driver");
751
752static int __devexit mac_mace_device_remove (struct platform_device *pdev)
753{
754 struct net_device *dev = platform_get_drvdata(pdev);
755 struct mace_data *mp = netdev_priv(dev);
756
757 unregister_netdev(dev);
758
759 free_irq(dev->irq, dev);
760 free_irq(IRQ_MAC_MACE_DMA, dev);
761
762 dma_free_coherent(mp->device, N_RX_RING * MACE_BUFF_SIZE,
763 mp->rx_ring, mp->rx_ring_phys);
764 dma_free_coherent(mp->device, N_TX_RING * MACE_BUFF_SIZE,
765 mp->tx_ring, mp->tx_ring_phys);
766
767 free_netdev(dev);
768
769 return 0;
770}
771
772static struct platform_driver mac_mace_driver = {
773 .probe = mace_probe,
774 .remove = __devexit_p(mac_mace_device_remove),
775 .driver = {
776 .name = mac_mace_string,
777 },
778};
779
780static int __init mac_mace_init_module(void)
781{
782 int err;
783
784 if ((err = platform_driver_register(&mac_mace_driver))) {
785 printk(KERN_ERR "Driver registration failed\n");
786 return err;
787 }
788
789 mac_mace_device = platform_device_alloc(mac_mace_string, 0);
790 if (!mac_mace_device)
791 goto out_unregister;
792
793 if (platform_device_add(mac_mace_device)) {
794 platform_device_put(mac_mace_device);
795 mac_mace_device = NULL;
796 }
797
798 return 0;
799
800out_unregister:
801 platform_driver_unregister(&mac_mace_driver);
802
803 return -ENOMEM;
804}
805
806static void __exit mac_mace_cleanup_module(void)
807{
808 platform_driver_unregister(&mac_mace_driver);
809
810 if (mac_mace_device) {
811 platform_device_unregister(mac_mace_device);
812 mac_mace_device = NULL;
813 }
814}
815
816module_init(mac_mace_init_module);
817module_exit(mac_mace_cleanup_module);