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Kukjin Kimbe4ab362011-08-24 17:25:09 +09001/*
Changhwan Youn31451af2011-10-04 17:09:26 +09002 * linux/arch/arm/mach-exynos4/mach-smdk4x12.c
Kukjin Kimbe4ab362011-08-24 17:25:09 +09003 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/gpio.h>
13#include <linux/i2c.h>
14#include <linux/input.h>
15#include <linux/io.h>
16#include <linux/mfd/max8997.h>
17#include <linux/mmc/host.h>
18#include <linux/platform_device.h>
19#include <linux/pwm_backlight.h>
20#include <linux/regulator/machine.h>
21#include <linux/serial_core.h>
22
23#include <asm/mach/arch.h>
Marc Zyngier4e44d2c2011-05-30 11:04:53 +010024#include <asm/hardware/gic.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090025#include <asm/mach-types.h>
26
27#include <plat/backlight.h>
28#include <plat/clock.h>
29#include <plat/cpu.h>
30#include <plat/devs.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090031#include <plat/gpio-cfg.h>
32#include <plat/iic.h>
33#include <plat/keypad.h>
34#include <plat/regs-serial.h>
35#include <plat/sdhci.h>
36
37#include <mach/map.h>
38
Kukjin Kimcc511b82011-12-27 08:18:36 +010039#include "common.h"
40
Kukjin Kimbe4ab362011-08-24 17:25:09 +090041/* Following are default values for UCON, ULCON and UFCON UART registers */
Changhwan Youn31451af2011-10-04 17:09:26 +090042#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
Kukjin Kimbe4ab362011-08-24 17:25:09 +090043 S3C2410_UCON_RXILEVEL | \
44 S3C2410_UCON_TXIRQMODE | \
45 S3C2410_UCON_RXIRQMODE | \
46 S3C2410_UCON_RXFIFO_TOI | \
47 S3C2443_UCON_RXERR_IRQEN)
48
Changhwan Youn31451af2011-10-04 17:09:26 +090049#define SMDK4X12_ULCON_DEFAULT S3C2410_LCON_CS8
Kukjin Kimbe4ab362011-08-24 17:25:09 +090050
Changhwan Youn31451af2011-10-04 17:09:26 +090051#define SMDK4X12_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
Kukjin Kimbe4ab362011-08-24 17:25:09 +090052 S5PV210_UFCON_TXTRIG4 | \
53 S5PV210_UFCON_RXTRIG4)
54
Changhwan Youn31451af2011-10-04 17:09:26 +090055static struct s3c2410_uartcfg smdk4x12_uartcfgs[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +090056 [0] = {
57 .hwport = 0,
58 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090059 .ucon = SMDK4X12_UCON_DEFAULT,
60 .ulcon = SMDK4X12_ULCON_DEFAULT,
61 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090062 },
63 [1] = {
64 .hwport = 1,
65 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090066 .ucon = SMDK4X12_UCON_DEFAULT,
67 .ulcon = SMDK4X12_ULCON_DEFAULT,
68 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090069 },
70 [2] = {
71 .hwport = 2,
72 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090073 .ucon = SMDK4X12_UCON_DEFAULT,
74 .ulcon = SMDK4X12_ULCON_DEFAULT,
75 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090076 },
77 [3] = {
78 .hwport = 3,
79 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090080 .ucon = SMDK4X12_UCON_DEFAULT,
81 .ulcon = SMDK4X12_ULCON_DEFAULT,
82 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090083 },
84};
85
Changhwan Youn31451af2011-10-04 17:09:26 +090086static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +090087 .cd_type = S3C_SDHCI_CD_INTERNAL,
88 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
89#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
90 .max_width = 8,
91 .host_caps = MMC_CAP_8_BIT_DATA,
92#endif
93};
94
Changhwan Youn31451af2011-10-04 17:09:26 +090095static struct s3c_sdhci_platdata smdk4x12_hsmmc3_pdata __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +090096 .cd_type = S3C_SDHCI_CD_INTERNAL,
97 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
98};
99
100static struct regulator_consumer_supply max8997_buck1 =
101 REGULATOR_SUPPLY("vdd_arm", NULL);
102
103static struct regulator_consumer_supply max8997_buck2 =
104 REGULATOR_SUPPLY("vdd_int", NULL);
105
106static struct regulator_consumer_supply max8997_buck3 =
107 REGULATOR_SUPPLY("vdd_g3d", NULL);
108
109static struct regulator_init_data max8997_buck1_data = {
110 .constraints = {
Changhwan Youn31451af2011-10-04 17:09:26 +0900111 .name = "VDD_ARM_SMDK4X12",
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900112 .min_uV = 925000,
113 .max_uV = 1350000,
114 .always_on = 1,
115 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
116 .state_mem = {
117 .disabled = 1,
118 },
119 },
120 .num_consumer_supplies = 1,
121 .consumer_supplies = &max8997_buck1,
122};
123
124static struct regulator_init_data max8997_buck2_data = {
125 .constraints = {
Changhwan Youn31451af2011-10-04 17:09:26 +0900126 .name = "VDD_INT_SMDK4X12",
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900127 .min_uV = 950000,
128 .max_uV = 1150000,
129 .always_on = 1,
130 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
131 .state_mem = {
132 .disabled = 1,
133 },
134 },
135 .num_consumer_supplies = 1,
136 .consumer_supplies = &max8997_buck2,
137};
138
139static struct regulator_init_data max8997_buck3_data = {
140 .constraints = {
Changhwan Youn31451af2011-10-04 17:09:26 +0900141 .name = "VDD_G3D_SMDK4X12",
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900142 .min_uV = 950000,
143 .max_uV = 1150000,
144 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
145 REGULATOR_CHANGE_STATUS,
146 .state_mem = {
147 .disabled = 1,
148 },
149 },
150 .num_consumer_supplies = 1,
151 .consumer_supplies = &max8997_buck3,
152};
153
Changhwan Youn31451af2011-10-04 17:09:26 +0900154static struct max8997_regulator_data smdk4x12_max8997_regulators[] = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900155 { MAX8997_BUCK1, &max8997_buck1_data },
156 { MAX8997_BUCK2, &max8997_buck2_data },
157 { MAX8997_BUCK3, &max8997_buck3_data },
158};
159
Changhwan Youn31451af2011-10-04 17:09:26 +0900160static struct max8997_platform_data smdk4x12_max8997_pdata = {
161 .num_regulators = ARRAY_SIZE(smdk4x12_max8997_regulators),
162 .regulators = smdk4x12_max8997_regulators,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900163
164 .buck1_voltage[0] = 1100000, /* 1.1V */
165 .buck1_voltage[1] = 1100000, /* 1.1V */
166 .buck1_voltage[2] = 1100000, /* 1.1V */
167 .buck1_voltage[3] = 1100000, /* 1.1V */
168 .buck1_voltage[4] = 1100000, /* 1.1V */
169 .buck1_voltage[5] = 1100000, /* 1.1V */
170 .buck1_voltage[6] = 1000000, /* 1.0V */
171 .buck1_voltage[7] = 950000, /* 0.95V */
172
173 .buck2_voltage[0] = 1100000, /* 1.1V */
174 .buck2_voltage[1] = 1000000, /* 1.0V */
175 .buck2_voltage[2] = 950000, /* 0.95V */
176 .buck2_voltage[3] = 900000, /* 0.9V */
177 .buck2_voltage[4] = 1100000, /* 1.1V */
178 .buck2_voltage[5] = 1000000, /* 1.0V */
179 .buck2_voltage[6] = 950000, /* 0.95V */
180 .buck2_voltage[7] = 900000, /* 0.9V */
181
182 .buck5_voltage[0] = 1100000, /* 1.1V */
183 .buck5_voltage[1] = 1100000, /* 1.1V */
184 .buck5_voltage[2] = 1100000, /* 1.1V */
185 .buck5_voltage[3] = 1100000, /* 1.1V */
186 .buck5_voltage[4] = 1100000, /* 1.1V */
187 .buck5_voltage[5] = 1100000, /* 1.1V */
188 .buck5_voltage[6] = 1100000, /* 1.1V */
189 .buck5_voltage[7] = 1100000, /* 1.1V */
190};
191
Changhwan Youn31451af2011-10-04 17:09:26 +0900192static struct i2c_board_info smdk4x12_i2c_devs0[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900193 {
194 I2C_BOARD_INFO("max8997", 0x66),
Changhwan Youn31451af2011-10-04 17:09:26 +0900195 .platform_data = &smdk4x12_max8997_pdata,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900196 }
197};
198
Changhwan Youn31451af2011-10-04 17:09:26 +0900199static struct i2c_board_info smdk4x12_i2c_devs1[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900200 { I2C_BOARD_INFO("wm8994", 0x1a), }
201};
202
Changhwan Youn31451af2011-10-04 17:09:26 +0900203static struct i2c_board_info smdk4x12_i2c_devs3[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900204 /* nothing here yet */
205};
206
Changhwan Youn31451af2011-10-04 17:09:26 +0900207static struct i2c_board_info smdk4x12_i2c_devs7[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900208 /* nothing here yet */
209};
210
Changhwan Youn31451af2011-10-04 17:09:26 +0900211static struct samsung_bl_gpio_info smdk4x12_bl_gpio_info = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900212 .no = EXYNOS4_GPD0(1),
213 .func = S3C_GPIO_SFN(2),
214};
215
Changhwan Youn31451af2011-10-04 17:09:26 +0900216static struct platform_pwm_backlight_data smdk4x12_bl_data = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900217 .pwm_id = 1,
218 .pwm_period_ns = 1000,
219};
220
Changhwan Youn31451af2011-10-04 17:09:26 +0900221static uint32_t smdk4x12_keymap[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900222 /* KEY(row, col, keycode) */
223 KEY(1, 0, KEY_D), KEY(1, 1, KEY_A), KEY(1, 2, KEY_B),
224 KEY(1, 3, KEY_E), KEY(1, 4, KEY_C)
225};
226
Changhwan Youn31451af2011-10-04 17:09:26 +0900227static struct matrix_keymap_data smdk4x12_keymap_data __initdata = {
228 .keymap = smdk4x12_keymap,
229 .keymap_size = ARRAY_SIZE(smdk4x12_keymap),
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900230};
231
Changhwan Youn31451af2011-10-04 17:09:26 +0900232static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = {
233 .keymap_data = &smdk4x12_keymap_data,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900234 .rows = 2,
235 .cols = 5,
236};
237
Changhwan Youn31451af2011-10-04 17:09:26 +0900238static struct platform_device *smdk4x12_devices[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900239 &s3c_device_hsmmc2,
240 &s3c_device_hsmmc3,
241 &s3c_device_i2c0,
242 &s3c_device_i2c1,
243 &s3c_device_i2c3,
244 &s3c_device_i2c7,
245 &s3c_device_rtc,
246 &s3c_device_wdt,
247 &samsung_device_keypad,
248};
249
Changhwan Youn31451af2011-10-04 17:09:26 +0900250static void __init smdk4x12_map_io(void)
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900251{
252 clk_xusbxti.rate = 24000000;
253
Kukjin Kimcc511b82011-12-27 08:18:36 +0100254 exynos_init_io(NULL, 0);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900255 s3c24xx_init_clocks(clk_xusbxti.rate);
Changhwan Youn31451af2011-10-04 17:09:26 +0900256 s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900257}
258
Changhwan Youn31451af2011-10-04 17:09:26 +0900259static void __init smdk4x12_machine_init(void)
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900260{
261 s3c_i2c0_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900262 i2c_register_board_info(0, smdk4x12_i2c_devs0,
263 ARRAY_SIZE(smdk4x12_i2c_devs0));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900264
265 s3c_i2c1_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900266 i2c_register_board_info(1, smdk4x12_i2c_devs1,
267 ARRAY_SIZE(smdk4x12_i2c_devs1));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900268
269 s3c_i2c3_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900270 i2c_register_board_info(3, smdk4x12_i2c_devs3,
271 ARRAY_SIZE(smdk4x12_i2c_devs3));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900272
273 s3c_i2c7_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900274 i2c_register_board_info(7, smdk4x12_i2c_devs7,
275 ARRAY_SIZE(smdk4x12_i2c_devs7));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900276
Changhwan Youn31451af2011-10-04 17:09:26 +0900277 samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900278
Changhwan Youn31451af2011-10-04 17:09:26 +0900279 samsung_keypad_set_platdata(&smdk4x12_keypad_data);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900280
Changhwan Youn31451af2011-10-04 17:09:26 +0900281 s3c_sdhci2_set_platdata(&smdk4x12_hsmmc2_pdata);
282 s3c_sdhci3_set_platdata(&smdk4x12_hsmmc3_pdata);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900283
Changhwan Youn31451af2011-10-04 17:09:26 +0900284 platform_add_devices(smdk4x12_devices, ARRAY_SIZE(smdk4x12_devices));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900285}
286
287MACHINE_START(SMDK4212, "SMDK4212")
288 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
Changhwan Youn31451af2011-10-04 17:09:26 +0900289 .atag_offset = 0x100,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900290 .init_irq = exynos4_init_irq,
Changhwan Youn31451af2011-10-04 17:09:26 +0900291 .map_io = smdk4x12_map_io,
Marc Zyngier4e44d2c2011-05-30 11:04:53 +0100292 .handle_irq = gic_handle_irq,
Changhwan Youn31451af2011-10-04 17:09:26 +0900293 .init_machine = smdk4x12_machine_init,
294 .timer = &exynos4_timer,
Russell King9eb48592012-01-03 11:56:53 +0100295 .restart = exynos4_restart,
Changhwan Youn31451af2011-10-04 17:09:26 +0900296MACHINE_END
297
298MACHINE_START(SMDK4412, "SMDK4412")
299 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
300 /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
301 .atag_offset = 0x100,
302 .init_irq = exynos4_init_irq,
303 .map_io = smdk4x12_map_io,
Marc Zyngier4e44d2c2011-05-30 11:04:53 +0100304 .handle_irq = gic_handle_irq,
Changhwan Youn31451af2011-10-04 17:09:26 +0900305 .init_machine = smdk4x12_machine_init,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900306 .timer = &exynos4_timer,
Russell King9eb48592012-01-03 11:56:53 +0100307 .restart = exynos4_restart,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900308MACHINE_END