| Jeremy Fitzhardinge | 5393744 | 2009-02-02 13:55:42 -0800 | [diff] [blame] | 1 | /* |
| 2 | Asm versions of Xen pv-ops, suitable for either direct use or inlining. |
| 3 | The inline versions are the same as the direct-use versions, with the |
| 4 | pre- and post-amble chopped off. |
| 5 | |
| 6 | This code is encoded for size rather than absolute efficiency, |
| 7 | with a view to being able to inline as much as possible. |
| 8 | |
| 9 | We only bother with direct forms (ie, vcpu in percpu data) of |
| 10 | the operations here; the indirect forms are better handled in |
| 11 | C, since they're generally too large to inline anyway. |
| 12 | */ |
| 13 | |
| 14 | #include <asm/asm-offsets.h> |
| 15 | #include <asm/percpu.h> |
| 16 | #include <asm/processor-flags.h> |
| 17 | |
| 18 | #include "xen-asm.h" |
| 19 | |
| 20 | /* |
| 21 | Enable events. This clears the event mask and tests the pending |
| 22 | event status with one and operation. If there are pending |
| 23 | events, then enter the hypervisor to get them handled. |
| 24 | */ |
| 25 | ENTRY(xen_irq_enable_direct) |
| 26 | /* Unmask events */ |
| 27 | movb $0, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask |
| 28 | |
| 29 | /* Preempt here doesn't matter because that will deal with |
| 30 | any pending interrupts. The pending check may end up being |
| 31 | run on the wrong CPU, but that doesn't hurt. */ |
| 32 | |
| 33 | /* Test for pending */ |
| 34 | testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending |
| 35 | jz 1f |
| 36 | |
| 37 | 2: call check_events |
| 38 | 1: |
| 39 | ENDPATCH(xen_irq_enable_direct) |
| 40 | ret |
| 41 | ENDPROC(xen_irq_enable_direct) |
| 42 | RELOC(xen_irq_enable_direct, 2b+1) |
| 43 | |
| 44 | |
| 45 | /* |
| 46 | Disabling events is simply a matter of making the event mask |
| 47 | non-zero. |
| 48 | */ |
| 49 | ENTRY(xen_irq_disable_direct) |
| 50 | movb $1, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask |
| 51 | ENDPATCH(xen_irq_disable_direct) |
| 52 | ret |
| 53 | ENDPROC(xen_irq_disable_direct) |
| 54 | RELOC(xen_irq_disable_direct, 0) |
| 55 | |
| 56 | /* |
| 57 | (xen_)save_fl is used to get the current interrupt enable status. |
| 58 | Callers expect the status to be in X86_EFLAGS_IF, and other bits |
| 59 | may be set in the return value. We take advantage of this by |
| 60 | making sure that X86_EFLAGS_IF has the right value (and other bits |
| 61 | in that byte are 0), but other bits in the return value are |
| 62 | undefined. We need to toggle the state of the bit, because |
| 63 | Xen and x86 use opposite senses (mask vs enable). |
| 64 | */ |
| 65 | ENTRY(xen_save_fl_direct) |
| 66 | testb $0xff, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask |
| 67 | setz %ah |
| 68 | addb %ah,%ah |
| 69 | ENDPATCH(xen_save_fl_direct) |
| 70 | ret |
| 71 | ENDPROC(xen_save_fl_direct) |
| 72 | RELOC(xen_save_fl_direct, 0) |
| 73 | |
| 74 | |
| 75 | /* |
| 76 | In principle the caller should be passing us a value return |
| 77 | from xen_save_fl_direct, but for robustness sake we test only |
| 78 | the X86_EFLAGS_IF flag rather than the whole byte. After |
| 79 | setting the interrupt mask state, it checks for unmasked |
| 80 | pending events and enters the hypervisor to get them delivered |
| 81 | if so. |
| 82 | */ |
| 83 | ENTRY(xen_restore_fl_direct) |
| 84 | #ifdef CONFIG_X86_64 |
| 85 | testw $X86_EFLAGS_IF, %di |
| 86 | #else |
| 87 | testb $X86_EFLAGS_IF>>8, %ah |
| 88 | #endif |
| 89 | setz PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_mask |
| 90 | /* Preempt here doesn't matter because that will deal with |
| 91 | any pending interrupts. The pending check may end up being |
| 92 | run on the wrong CPU, but that doesn't hurt. */ |
| 93 | |
| 94 | /* check for unmasked and pending */ |
| 95 | cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info) + XEN_vcpu_info_pending |
| 96 | jz 1f |
| 97 | 2: call check_events |
| 98 | 1: |
| 99 | ENDPATCH(xen_restore_fl_direct) |
| 100 | ret |
| 101 | ENDPROC(xen_restore_fl_direct) |
| 102 | RELOC(xen_restore_fl_direct, 2b+1) |
| 103 | |
| 104 | |
| 105 | /* |
| 106 | Force an event check by making a hypercall, |
| 107 | but preserve regs before making the call. |
| 108 | */ |
| 109 | check_events: |
| 110 | #ifdef CONFIG_X86_32 |
| 111 | push %eax |
| 112 | push %ecx |
| 113 | push %edx |
| 114 | call xen_force_evtchn_callback |
| 115 | pop %edx |
| 116 | pop %ecx |
| 117 | pop %eax |
| 118 | #else |
| 119 | push %rax |
| 120 | push %rcx |
| 121 | push %rdx |
| 122 | push %rsi |
| 123 | push %rdi |
| 124 | push %r8 |
| 125 | push %r9 |
| 126 | push %r10 |
| 127 | push %r11 |
| 128 | call xen_force_evtchn_callback |
| 129 | pop %r11 |
| 130 | pop %r10 |
| 131 | pop %r9 |
| 132 | pop %r8 |
| 133 | pop %rdi |
| 134 | pop %rsi |
| 135 | pop %rdx |
| 136 | pop %rcx |
| 137 | pop %rax |
| 138 | #endif |
| 139 | ret |
| 140 | |