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gerrit-public.fairphone.software / fp2-dev / kernel / msm / f0c8ac8083cbd9347b398bfddcca20f1e2786016 / . / arch / powerpc / boot / dts / lite5200b.dts
blob: 5fe8998abb7c83c51bed7f91e764064cd95ab77f [file] [log] [blame]
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]1/*
2 * Lite5200B board Device Tree Source
3 *
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]4 * Copyright 2006-2007 Secret Lab Technologies Ltd.
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]5 * Grant Likely <grant.likely@secretlab.ca>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
Grant Likely121361f2007-01-19 00:00:14 -0700[diff] [blame]13/*
14 * WARNING: Do not depend on this tree layout remaining static just yet.
15 * The MPC5200 device tree conventions are still in flux
16 * Keep an eye on the linuxppc-dev mailing list for more details
17 */
18
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]19/ {
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]20 model = "fsl,lite5200b";
21 // revision = "1.0";
22 compatible = "fsl,lite5200b\0generic-mpc5200";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]23 #address-cells = <1>;
24 #size-cells = <1>;
25
26 cpus {
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 PowerPC,5200@0 {
31 device_type = "cpu";
32 reg = <0>;
33 d-cache-line-size = <20>;
34 i-cache-line-size = <20>;
35 d-cache-size = <4000>; // L1, 16K
36 i-cache-size = <4000>; // L1, 16K
37 timebase-frequency = <0>; // from bootloader
38 bus-frequency = <0>; // from bootloader
39 clock-frequency = <0>; // from bootloader
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]40 };
41 };
42
43 memory {
44 device_type = "memory";
45 reg = <00000000 10000000>; // 256MB
46 };
47
48 soc5200@f0000000 {
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]49 model = "fsl,mpc5200b";
Domen Puncer0d0f4bc2007-05-07 01:38:48 +1000[diff] [blame]50 compatible = "mpc5200";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]51 revision = ""; // from bootloader
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]52 device_type = "soc";
Kumar Galaf0c8ac82007-09-12 11:52:31 -0500[diff] [blame^]53 ranges = <0 f0000000 0000c000>;
54 reg = <f0000000 00000100>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]55 bus-frequency = <0>; // from bootloader
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]56 system-frequency = <0>; // from bootloader
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]57
58 cdm@200 {
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]59 compatible = "mpc5200b-cdm\0mpc5200-cdm";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]60 reg = <200 38>;
61 };
62
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]63 mpc5200_pic: pic@500 {
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]64 // 5200 interrupts are encoded into two levels;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]65 interrupt-controller;
66 #interrupt-cells = <3>;
67 device_type = "interrupt-controller";
Domen Puncerf2fb9eb2007-05-21 08:56:00 +0200[diff] [blame]68 compatible = "mpc5200b-pic\0mpc5200-pic";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]69 reg = <500 80>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]70 };
71
72 gpt@600 { // General Purpose Timer
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]73 compatible = "mpc5200b-gpt\0mpc5200-gpt";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]74 device_type = "gpt";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]75 cell-index = <0>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]76 reg = <600 10>;
77 interrupts = <1 9 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]78 interrupt-parent = <&mpc5200_pic>;
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]79 has-wdt;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]80 };
81
82 gpt@610 { // General Purpose Timer
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]83 compatible = "mpc5200b-gpt\0mpc5200-gpt";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]84 device_type = "gpt";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]85 cell-index = <1>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]86 reg = <610 10>;
87 interrupts = <1 a 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]88 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]89 };
90
91 gpt@620 { // General Purpose Timer
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]92 compatible = "mpc5200b-gpt\0mpc5200-gpt";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]93 device_type = "gpt";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]94 cell-index = <2>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]95 reg = <620 10>;
96 interrupts = <1 b 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]97 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]98 };
99
100 gpt@630 { // General Purpose Timer
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]101 compatible = "mpc5200b-gpt\0mpc5200-gpt";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]102 device_type = "gpt";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]103 cell-index = <3>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]104 reg = <630 10>;
105 interrupts = <1 c 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]106 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]107 };
108
109 gpt@640 { // General Purpose Timer
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]110 compatible = "mpc5200b-gpt\0mpc5200-gpt";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]111 device_type = "gpt";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]112 cell-index = <4>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]113 reg = <640 10>;
114 interrupts = <1 d 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]115 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]116 };
117
118 gpt@650 { // General Purpose Timer
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]119 compatible = "mpc5200b-gpt\0mpc5200-gpt";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]120 device_type = "gpt";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]121 cell-index = <5>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]122 reg = <650 10>;
123 interrupts = <1 e 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]124 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]125 };
126
127 gpt@660 { // General Purpose Timer
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]128 compatible = "mpc5200b-gpt\0mpc5200-gpt";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]129 device_type = "gpt";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]130 cell-index = <6>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]131 reg = <660 10>;
132 interrupts = <1 f 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]133 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]134 };
135
136 gpt@670 { // General Purpose Timer
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]137 compatible = "mpc5200b-gpt\0mpc5200-gpt";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]138 device_type = "gpt";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]139 cell-index = <7>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]140 reg = <670 10>;
141 interrupts = <1 10 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]142 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]143 };
144
145 rtc@800 { // Real time clock
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]146 compatible = "mpc5200b-rtc\0mpc5200-rtc";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]147 device_type = "rtc";
148 reg = <800 100>;
149 interrupts = <1 5 0 1 6 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]150 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]151 };
152
153 mscan@900 {
154 device_type = "mscan";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]155 compatible = "mpc5200b-mscan\0mpc5200-mscan";
156 cell-index = <0>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]157 interrupts = <2 11 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]158 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]159 reg = <900 80>;
160 };
161
162 mscan@980 {
163 device_type = "mscan";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]164 compatible = "mpc5200b-mscan\0mpc5200-mscan";
165 cell-index = <1>;
Domen Puncer0d0f4bc2007-05-07 01:38:48 +1000[diff] [blame]166 interrupts = <2 12 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]167 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]168 reg = <980 80>;
169 };
170
171 gpio@b00 {
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]172 compatible = "mpc5200b-gpio\0mpc5200-gpio";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]173 reg = <b00 40>;
174 interrupts = <1 7 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]175 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]176 };
177
Domen Puncer0d0f4bc2007-05-07 01:38:48 +1000[diff] [blame]178 gpio-wkup@c00 {
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]179 compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]180 reg = <c00 40>;
181 interrupts = <1 8 0 0 3 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]182 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]183 };
184
185 pci@0d00 {
186 #interrupt-cells = <1>;
187 #size-cells = <2>;
188 #address-cells = <3>;
189 device_type = "pci";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]190 compatible = "mpc5200b-pci\0mpc5200-pci";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]191 reg = <d00 100>;
192 interrupt-map-mask = <f800 0 0 7>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]193 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
194 c000 0 0 2 &mpc5200_pic 1 1 3
195 c000 0 0 3 &mpc5200_pic 1 2 3
196 c000 0 0 4 &mpc5200_pic 1 3 3
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]197
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]198 c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
199 c800 0 0 2 &mpc5200_pic 1 2 3
200 c800 0 0 3 &mpc5200_pic 1 3 3
201 c800 0 0 4 &mpc5200_pic 0 0 3>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]202 clock-frequency = <0>; // From boot loader
203 interrupts = <2 8 0 2 9 0 2 a 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]204 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]205 bus-range = <0 0>;
206 ranges = <42000000 0 80000000 80000000 0 20000000
207 02000000 0 a0000000 a0000000 0 10000000
208 01000000 0 00000000 b0000000 0 01000000>;
209 };
210
211 spi@f00 {
212 device_type = "spi";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]213 compatible = "mpc5200b-spi\0mpc5200-spi";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]214 reg = <f00 20>;
215 interrupts = <2 d 0 2 e 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]216 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]217 };
218
219 usb@1000 {
220 device_type = "usb-ohci-be";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]221 compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]222 reg = <1000 ff>;
223 interrupts = <2 6 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]224 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]225 };
226
227 bestcomm@1200 {
228 device_type = "dma-controller";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]229 compatible = "mpc5200b-bestcomm\0mpc5200-bestcomm";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]230 reg = <1200 80>;
231 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
232 3 4 0 3 5 0 3 6 0 3 7 0
233 3 8 0 3 9 0 3 a 0 3 b 0
234 3 c 0 3 d 0 3 e 0 3 f 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]235 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]236 };
237
238 xlb@1f00 {
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]239 compatible = "mpc5200b-xlb\0mpc5200-xlb";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]240 reg = <1f00 100>;
241 };
242
243 serial@2000 { // PSC1
244 device_type = "serial";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]245 compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]246 port-number = <0>; // Logical port assignment
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]247 cell-index = <0>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]248 reg = <2000 100>;
249 interrupts = <2 1 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]250 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]251 };
252
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]253 // PSC2 in ac97 mode example
254 //ac97@2200 { // PSC2
255 // device_type = "sound";
256 // compatible = "mpc5200b-psc-ac97\0mpc5200-psc-ac97";
257 // cell-index = <1>;
258 // reg = <2200 100>;
259 // interrupts = <2 2 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]260 // interrupt-parent = <&mpc5200_pic>;
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]261 //};
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]262
263 // PSC3 in CODEC mode example
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]264 //i2s@2400 { // PSC3
265 // device_type = "sound";
266 // compatible = "mpc5200b-psc-i2s"; //not 5200 compatible
267 // cell-index = <2>;
268 // reg = <2400 100>;
269 // interrupts = <2 3 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]270 // interrupt-parent = <&mpc5200_pic>;
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]271 //};
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]272
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]273 // PSC4 in uart mode example
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]274 //serial@2600 { // PSC4
275 // device_type = "serial";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]276 // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
277 // cell-index = <3>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]278 // reg = <2600 100>;
279 // interrupts = <2 b 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]280 // interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]281 //};
282
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]283 // PSC5 in uart mode example
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]284 //serial@2800 { // PSC5
285 // device_type = "serial";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]286 // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
287 // cell-index = <4>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]288 // reg = <2800 100>;
289 // interrupts = <2 c 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]290 // interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]291 //};
292
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]293 // PSC6 in spi mode example
294 //spi@2c00 { // PSC6
295 // device_type = "spi";
296 // compatible = "mpc5200b-psc-spi\0mpc5200-psc-spi";
297 // cell-index = <5>;
298 // reg = <2c00 100>;
299 // interrupts = <2 4 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]300 // interrupt-parent = <&mpc5200_pic>;
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]301 //};
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]302
303 ethernet@3000 {
304 device_type = "network";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]305 compatible = "mpc5200b-fec\0mpc5200-fec";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]306 reg = <3000 800>;
307 mac-address = [ 02 03 04 05 06 07 ]; // Bad!
308 interrupts = <2 5 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]309 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]310 };
311
312 ata@3a00 {
313 device_type = "ata";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]314 compatible = "mpc5200b-ata\0mpc5200-ata";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]315 reg = <3a00 100>;
316 interrupts = <2 7 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]317 interrupt-parent = <&mpc5200_pic>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]318 };
319
320 i2c@3d00 {
321 device_type = "i2c";
Domen Puncer5cae84c2007-05-07 01:38:49 +1000[diff] [blame]322 compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]323 cell-index = <0>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]324 reg = <3d00 40>;
325 interrupts = <2 f 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]326 interrupt-parent = <&mpc5200_pic>;
Domen Puncer5cae84c2007-05-07 01:38:49 +1000[diff] [blame]327 fsl5200-clocking;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]328 };
329
330 i2c@3d40 {
331 device_type = "i2c";
Domen Puncer5cae84c2007-05-07 01:38:49 +1000[diff] [blame]332 compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]333 cell-index = <1>;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]334 reg = <3d40 40>;
335 interrupts = <2 10 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500[diff] [blame]336 interrupt-parent = <&mpc5200_pic>;
Domen Puncer5cae84c2007-05-07 01:38:49 +1000[diff] [blame]337 fsl5200-clocking;
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]338 };
339 sram@8000 {
340 device_type = "sram";
Grant Likely05cbbc62007-02-12 13:36:54 -0700[diff] [blame]341 compatible = "mpc5200b-sram\0mpc5200-sram\0sram";
Grant Likelyc6d4d652006-11-27 14:16:29 -0700[diff] [blame]342 reg = <8000 4000>;
343 };
344 };
345};