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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001#ifndef _MSM_VIDC_DEC_H_
2#define _MSM_VIDC_DEC_H_
3
4#include <linux/types.h>
5#include <linux/ioctl.h>
6
7/* STATUS CODES */
8/* Base value for status codes */
9#define VDEC_S_BASE 0x40000000
10/* Success */
11#define VDEC_S_SUCCESS (VDEC_S_BASE)
12/* General failure */
13#define VDEC_S_EFAIL (VDEC_S_BASE + 1)
14/* Fatal irrecoverable failure. Need to tear down session. */
15#define VDEC_S_EFATAL (VDEC_S_BASE + 2)
16/* Error detected in the passed parameters */
17#define VDEC_S_EBADPARAM (VDEC_S_BASE + 3)
18/* Command called in invalid state. */
19#define VDEC_S_EINVALSTATE (VDEC_S_BASE + 4)
20 /* Insufficient OS resources - thread, memory etc. */
21#define VDEC_S_ENOSWRES (VDEC_S_BASE + 5)
22 /* Insufficient HW resources - core capacity maxed out. */
23#define VDEC_S_ENOHWRES (VDEC_S_BASE + 6)
24/* Invalid command called */
25#define VDEC_S_EINVALCMD (VDEC_S_BASE + 7)
26/* Command timeout. */
27#define VDEC_S_ETIMEOUT (VDEC_S_BASE + 8)
28/* Pre-requirement is not met for API. */
29#define VDEC_S_ENOPREREQ (VDEC_S_BASE + 9)
30/* Command queue is full. */
31#define VDEC_S_ECMDQFULL (VDEC_S_BASE + 10)
32/* Command is not supported by this driver */
33#define VDEC_S_ENOTSUPP (VDEC_S_BASE + 11)
34/* Command is not implemented by thedriver. */
35#define VDEC_S_ENOTIMPL (VDEC_S_BASE + 12)
36/* Command is not implemented by the driver. */
37#define VDEC_S_BUSY (VDEC_S_BASE + 13)
Gopikrishnaiah Anandan746d9ab2011-07-07 11:55:13 -070038#define VDEC_S_INPUT_BITSTREAM_ERR (VDEC_S_BASE + 14)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070039
40#define VDEC_INTF_VER 1
41#define VDEC_MSG_BASE 0x0000000
42/* Codes to identify asynchronous message responses and events that driver
43 wants to communicate to the app.*/
44#define VDEC_MSG_INVALID (VDEC_MSG_BASE + 0)
45#define VDEC_MSG_RESP_INPUT_BUFFER_DONE (VDEC_MSG_BASE + 1)
46#define VDEC_MSG_RESP_OUTPUT_BUFFER_DONE (VDEC_MSG_BASE + 2)
47#define VDEC_MSG_RESP_INPUT_FLUSHED (VDEC_MSG_BASE + 3)
48#define VDEC_MSG_RESP_OUTPUT_FLUSHED (VDEC_MSG_BASE + 4)
49#define VDEC_MSG_RESP_FLUSH_INPUT_DONE (VDEC_MSG_BASE + 5)
50#define VDEC_MSG_RESP_FLUSH_OUTPUT_DONE (VDEC_MSG_BASE + 6)
51#define VDEC_MSG_RESP_START_DONE (VDEC_MSG_BASE + 7)
52#define VDEC_MSG_RESP_STOP_DONE (VDEC_MSG_BASE + 8)
53#define VDEC_MSG_RESP_PAUSE_DONE (VDEC_MSG_BASE + 9)
54#define VDEC_MSG_RESP_RESUME_DONE (VDEC_MSG_BASE + 10)
55#define VDEC_MSG_RESP_RESOURCE_LOADED (VDEC_MSG_BASE + 11)
56#define VDEC_EVT_RESOURCES_LOST (VDEC_MSG_BASE + 12)
57#define VDEC_MSG_EVT_CONFIG_CHANGED (VDEC_MSG_BASE + 13)
58#define VDEC_MSG_EVT_HW_ERROR (VDEC_MSG_BASE + 14)
59#define VDEC_MSG_EVT_INFO_CONFIG_CHANGED (VDEC_MSG_BASE + 15)
Gopikrishnaiah Anandan248eac22011-07-12 14:24:14 -070060#define VDEC_MSG_EVT_INFO_FIELD_DROPPED (VDEC_MSG_BASE + 16)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070061
62/*Buffer flags bits masks.*/
63#define VDEC_BUFFERFLAG_EOS 0x00000001
64#define VDEC_BUFFERFLAG_DECODEONLY 0x00000004
65#define VDEC_BUFFERFLAG_DATACORRUPT 0x00000008
66#define VDEC_BUFFERFLAG_ENDOFFRAME 0x00000010
67#define VDEC_BUFFERFLAG_SYNCFRAME 0x00000020
68#define VDEC_BUFFERFLAG_EXTRADATA 0x00000040
69#define VDEC_BUFFERFLAG_CODECCONFIG 0x00000080
70
71/*Post processing flags bit masks*/
72#define VDEC_EXTRADATA_NONE 0x001
73#define VDEC_EXTRADATA_QP 0x004
74#define VDEC_EXTRADATA_MB_ERROR_MAP 0x008
75#define VDEC_EXTRADATA_SEI 0x010
76#define VDEC_EXTRADATA_VUI 0x020
77#define VDEC_EXTRADATA_VC1 0x040
78
79#define VDEC_CMDBASE 0x800
80#define VDEC_CMD_SET_INTF_VERSION (VDEC_CMDBASE)
81
82#define VDEC_IOCTL_MAGIC 'v'
83
84struct vdec_ioctl_msg {
85 void __user *in;
86 void __user *out;
87};
88
89/* CMD params: InputParam:enum vdec_codec
90 OutputParam: struct vdec_profile_level*/
91#define VDEC_IOCTL_GET_PROFILE_LEVEL_SUPPORTED \
92 _IOWR(VDEC_IOCTL_MAGIC, 0, struct vdec_ioctl_msg)
93
94/*CMD params:InputParam: NULL
95 OutputParam: uint32_t(bitmask)*/
96#define VDEC_IOCTL_GET_INTERLACE_FORMAT \
97 _IOR(VDEC_IOCTL_MAGIC, 1, struct vdec_ioctl_msg)
98
99/* CMD params: InputParam: enum vdec_codec
100 OutputParam: struct vdec_profile_level*/
101#define VDEC_IOCTL_GET_CURRENT_PROFILE_LEVEL \
102 _IOWR(VDEC_IOCTL_MAGIC, 2, struct vdec_ioctl_msg)
103
104/*CMD params: SET: InputParam: enum vdec_output_fromat OutputParam: NULL
105 GET: InputParam: NULL OutputParam: enum vdec_output_fromat*/
106#define VDEC_IOCTL_SET_OUTPUT_FORMAT \
107 _IOWR(VDEC_IOCTL_MAGIC, 3, struct vdec_ioctl_msg)
108#define VDEC_IOCTL_GET_OUTPUT_FORMAT \
109 _IOWR(VDEC_IOCTL_MAGIC, 4, struct vdec_ioctl_msg)
110
111/*CMD params: SET: InputParam: enum vdec_codec OutputParam: NULL
112 GET: InputParam: NULL OutputParam: enum vdec_codec*/
113#define VDEC_IOCTL_SET_CODEC \
114 _IOW(VDEC_IOCTL_MAGIC, 5, struct vdec_ioctl_msg)
115#define VDEC_IOCTL_GET_CODEC \
116 _IOR(VDEC_IOCTL_MAGIC, 6, struct vdec_ioctl_msg)
117
118/*CMD params: SET: InputParam: struct vdec_picsize outputparam: NULL
119 GET: InputParam: NULL outputparam: struct vdec_picsize*/
120#define VDEC_IOCTL_SET_PICRES \
121 _IOW(VDEC_IOCTL_MAGIC, 7, struct vdec_ioctl_msg)
122#define VDEC_IOCTL_GET_PICRES \
123 _IOR(VDEC_IOCTL_MAGIC, 8, struct vdec_ioctl_msg)
124
125#define VDEC_IOCTL_SET_EXTRADATA \
126 _IOW(VDEC_IOCTL_MAGIC, 9, struct vdec_ioctl_msg)
127#define VDEC_IOCTL_GET_EXTRADATA \
128 _IOR(VDEC_IOCTL_MAGIC, 10, struct vdec_ioctl_msg)
129
130#define VDEC_IOCTL_SET_SEQUENCE_HEADER \
131 _IOW(VDEC_IOCTL_MAGIC, 11, struct vdec_ioctl_msg)
132
133/* CMD params: SET: InputParam - vdec_allocatorproperty, OutputParam - NULL
134 GET: InputParam - NULL, OutputParam - vdec_allocatorproperty*/
135#define VDEC_IOCTL_SET_BUFFER_REQ \
136 _IOW(VDEC_IOCTL_MAGIC, 12, struct vdec_ioctl_msg)
137#define VDEC_IOCTL_GET_BUFFER_REQ \
138 _IOR(VDEC_IOCTL_MAGIC, 13, struct vdec_ioctl_msg)
139/* CMD params: InputParam - vdec_buffer, OutputParam - uint8_t** */
140#define VDEC_IOCTL_ALLOCATE_BUFFER \
141 _IOWR(VDEC_IOCTL_MAGIC, 14, struct vdec_ioctl_msg)
142/* CMD params: InputParam - uint8_t *, OutputParam - NULL.*/
143#define VDEC_IOCTL_FREE_BUFFER \
144 _IOW(VDEC_IOCTL_MAGIC, 15, struct vdec_ioctl_msg)
145
146/*CMD params: CMD: InputParam - struct vdec_setbuffer_cmd, OutputParam - NULL*/
147#define VDEC_IOCTL_SET_BUFFER \
148 _IOW(VDEC_IOCTL_MAGIC, 16, struct vdec_ioctl_msg)
149
150/* CMD params: InputParam - struct vdec_fillbuffer_cmd, OutputParam - NULL*/
151#define VDEC_IOCTL_FILL_OUTPUT_BUFFER \
152 _IOW(VDEC_IOCTL_MAGIC, 17, struct vdec_ioctl_msg)
153
154/*CMD params: InputParam - struct vdec_frameinfo , OutputParam - NULL*/
155#define VDEC_IOCTL_DECODE_FRAME \
156 _IOW(VDEC_IOCTL_MAGIC, 18, struct vdec_ioctl_msg)
157
158#define VDEC_IOCTL_LOAD_RESOURCES _IO(VDEC_IOCTL_MAGIC, 19)
159#define VDEC_IOCTL_CMD_START _IO(VDEC_IOCTL_MAGIC, 20)
160#define VDEC_IOCTL_CMD_STOP _IO(VDEC_IOCTL_MAGIC, 21)
161#define VDEC_IOCTL_CMD_PAUSE _IO(VDEC_IOCTL_MAGIC, 22)
162#define VDEC_IOCTL_CMD_RESUME _IO(VDEC_IOCTL_MAGIC, 23)
163
164/*CMD params: InputParam - enum vdec_bufferflush , OutputParam - NULL */
165#define VDEC_IOCTL_CMD_FLUSH _IOW(VDEC_IOCTL_MAGIC, 24, struct vdec_ioctl_msg)
166
167/* ========================================================
168 * IOCTL for getting asynchronous notification from driver
169 * ========================================================*/
170
171/*IOCTL params: InputParam - NULL, OutputParam - struct vdec_msginfo*/
172#define VDEC_IOCTL_GET_NEXT_MSG \
173 _IOR(VDEC_IOCTL_MAGIC, 25, struct vdec_ioctl_msg)
174
175#define VDEC_IOCTL_STOP_NEXT_MSG _IO(VDEC_IOCTL_MAGIC, 26)
176
177#define VDEC_IOCTL_GET_NUMBER_INSTANCES \
178 _IOR(VDEC_IOCTL_MAGIC, 27, struct vdec_ioctl_msg)
179
180#define VDEC_IOCTL_SET_PICTURE_ORDER \
181 _IOW(VDEC_IOCTL_MAGIC, 28, struct vdec_ioctl_msg)
182
183#define VDEC_IOCTL_SET_FRAME_RATE \
184 _IOW(VDEC_IOCTL_MAGIC, 29, struct vdec_ioctl_msg)
185
186#define VDEC_IOCTL_SET_H264_MV_BUFFER \
187 _IOW(VDEC_IOCTL_MAGIC, 30, struct vdec_ioctl_msg)
188
189#define VDEC_IOCTL_FREE_H264_MV_BUFFER \
190 _IOW(VDEC_IOCTL_MAGIC, 31, struct vdec_ioctl_msg)
191
192#define VDEC_IOCTL_GET_MV_BUFFER_SIZE \
193 _IOR(VDEC_IOCTL_MAGIC, 32, struct vdec_ioctl_msg)
194
195#define VDEC_IOCTL_SET_IDR_ONLY_DECODING \
196 _IO(VDEC_IOCTL_MAGIC, 33)
197
198#define VDEC_IOCTL_SET_CONT_ON_RECONFIG \
199 _IO(VDEC_IOCTL_MAGIC, 34)
200
201enum vdec_picture {
202 PICTURE_TYPE_I,
203 PICTURE_TYPE_P,
204 PICTURE_TYPE_B,
205 PICTURE_TYPE_BI,
206 PICTURE_TYPE_SKIP,
Maheshwar Ajja1d053f82011-07-20 20:45:11 +0530207 PICTURE_TYPE_IDR,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700208 PICTURE_TYPE_UNKNOWN
209};
210
211enum vdec_buffer {
212 VDEC_BUFFER_TYPE_INPUT,
213 VDEC_BUFFER_TYPE_OUTPUT
214};
215
216struct vdec_allocatorproperty {
217 enum vdec_buffer buffer_type;
218 uint32_t mincount;
219 uint32_t maxcount;
220 uint32_t actualcount;
221 size_t buffer_size;
222 uint32_t alignment;
223 uint32_t buf_poolid;
224};
225
226struct vdec_bufferpayload {
227 void __user *bufferaddr;
228 size_t buffer_len;
229 int pmem_fd;
230 size_t offset;
231 size_t mmaped_size;
232};
233
234struct vdec_setbuffer_cmd {
235 enum vdec_buffer buffer_type;
236 struct vdec_bufferpayload buffer;
237};
238
239struct vdec_fillbuffer_cmd {
240 struct vdec_bufferpayload buffer;
241 void *client_data;
242};
243
244enum vdec_bufferflush {
245 VDEC_FLUSH_TYPE_INPUT,
246 VDEC_FLUSH_TYPE_OUTPUT,
247 VDEC_FLUSH_TYPE_ALL
248};
249
250enum vdec_codec {
251 VDEC_CODECTYPE_H264 = 0x1,
252 VDEC_CODECTYPE_H263 = 0x2,
253 VDEC_CODECTYPE_MPEG4 = 0x3,
254 VDEC_CODECTYPE_DIVX_3 = 0x4,
255 VDEC_CODECTYPE_DIVX_4 = 0x5,
256 VDEC_CODECTYPE_DIVX_5 = 0x6,
257 VDEC_CODECTYPE_DIVX_6 = 0x7,
258 VDEC_CODECTYPE_XVID = 0x8,
259 VDEC_CODECTYPE_MPEG1 = 0x9,
260 VDEC_CODECTYPE_MPEG2 = 0xa,
261 VDEC_CODECTYPE_VC1 = 0xb,
262 VDEC_CODECTYPE_VC1_RCV = 0xc
263};
264
265enum vdec_mpeg2_profile {
266 VDEC_MPEG2ProfileSimple = 0x1,
267 VDEC_MPEG2ProfileMain = 0x2,
268 VDEC_MPEG2Profile422 = 0x4,
269 VDEC_MPEG2ProfileSNR = 0x8,
270 VDEC_MPEG2ProfileSpatial = 0x10,
271 VDEC_MPEG2ProfileHigh = 0x20,
272 VDEC_MPEG2ProfileKhronosExtensions = 0x6F000000,
273 VDEC_MPEG2ProfileVendorStartUnused = 0x7F000000,
274 VDEC_MPEG2ProfileMax = 0x7FFFFFFF
275};
276
277enum vdec_mpeg2_level {
278
279 VDEC_MPEG2LevelLL = 0x1,
280 VDEC_MPEG2LevelML = 0x2,
281 VDEC_MPEG2LevelH14 = 0x4,
282 VDEC_MPEG2LevelHL = 0x8,
283 VDEC_MPEG2LevelKhronosExtensions = 0x6F000000,
284 VDEC_MPEG2LevelVendorStartUnused = 0x7F000000,
285 VDEC_MPEG2LevelMax = 0x7FFFFFFF
286};
287
288enum vdec_mpeg4_profile {
289 VDEC_MPEG4ProfileSimple = 0x01,
290 VDEC_MPEG4ProfileSimpleScalable = 0x02,
291 VDEC_MPEG4ProfileCore = 0x04,
292 VDEC_MPEG4ProfileMain = 0x08,
293 VDEC_MPEG4ProfileNbit = 0x10,
294 VDEC_MPEG4ProfileScalableTexture = 0x20,
295 VDEC_MPEG4ProfileSimpleFace = 0x40,
296 VDEC_MPEG4ProfileSimpleFBA = 0x80,
297 VDEC_MPEG4ProfileBasicAnimated = 0x100,
298 VDEC_MPEG4ProfileHybrid = 0x200,
299 VDEC_MPEG4ProfileAdvancedRealTime = 0x400,
300 VDEC_MPEG4ProfileCoreScalable = 0x800,
301 VDEC_MPEG4ProfileAdvancedCoding = 0x1000,
302 VDEC_MPEG4ProfileAdvancedCore = 0x2000,
303 VDEC_MPEG4ProfileAdvancedScalable = 0x4000,
304 VDEC_MPEG4ProfileAdvancedSimple = 0x8000,
305 VDEC_MPEG4ProfileKhronosExtensions = 0x6F000000,
306 VDEC_MPEG4ProfileVendorStartUnused = 0x7F000000,
307 VDEC_MPEG4ProfileMax = 0x7FFFFFFF
308};
309
310enum vdec_mpeg4_level {
311 VDEC_MPEG4Level0 = 0x01,
312 VDEC_MPEG4Level0b = 0x02,
313 VDEC_MPEG4Level1 = 0x04,
314 VDEC_MPEG4Level2 = 0x08,
315 VDEC_MPEG4Level3 = 0x10,
316 VDEC_MPEG4Level4 = 0x20,
317 VDEC_MPEG4Level4a = 0x40,
318 VDEC_MPEG4Level5 = 0x80,
319 VDEC_MPEG4LevelKhronosExtensions = 0x6F000000,
320 VDEC_MPEG4LevelVendorStartUnused = 0x7F000000,
321 VDEC_MPEG4LevelMax = 0x7FFFFFFF
322};
323
324enum vdec_avc_profile {
325 VDEC_AVCProfileBaseline = 0x01,
326 VDEC_AVCProfileMain = 0x02,
327 VDEC_AVCProfileExtended = 0x04,
328 VDEC_AVCProfileHigh = 0x08,
329 VDEC_AVCProfileHigh10 = 0x10,
330 VDEC_AVCProfileHigh422 = 0x20,
331 VDEC_AVCProfileHigh444 = 0x40,
332 VDEC_AVCProfileKhronosExtensions = 0x6F000000,
333 VDEC_AVCProfileVendorStartUnused = 0x7F000000,
334 VDEC_AVCProfileMax = 0x7FFFFFFF
335};
336
337enum vdec_avc_level {
338 VDEC_AVCLevel1 = 0x01,
339 VDEC_AVCLevel1b = 0x02,
340 VDEC_AVCLevel11 = 0x04,
341 VDEC_AVCLevel12 = 0x08,
342 VDEC_AVCLevel13 = 0x10,
343 VDEC_AVCLevel2 = 0x20,
344 VDEC_AVCLevel21 = 0x40,
345 VDEC_AVCLevel22 = 0x80,
346 VDEC_AVCLevel3 = 0x100,
347 VDEC_AVCLevel31 = 0x200,
348 VDEC_AVCLevel32 = 0x400,
349 VDEC_AVCLevel4 = 0x800,
350 VDEC_AVCLevel41 = 0x1000,
351 VDEC_AVCLevel42 = 0x2000,
352 VDEC_AVCLevel5 = 0x4000,
353 VDEC_AVCLevel51 = 0x8000,
354 VDEC_AVCLevelKhronosExtensions = 0x6F000000,
355 VDEC_AVCLevelVendorStartUnused = 0x7F000000,
356 VDEC_AVCLevelMax = 0x7FFFFFFF
357};
358
359enum vdec_divx_profile {
360 VDEC_DIVXProfile_qMobile = 0x01,
361 VDEC_DIVXProfile_Mobile = 0x02,
362 VDEC_DIVXProfile_HD = 0x04,
363 VDEC_DIVXProfile_Handheld = 0x08,
364 VDEC_DIVXProfile_Portable = 0x10,
365 VDEC_DIVXProfile_HomeTheater = 0x20
366};
367
368enum vdec_xvid_profile {
369 VDEC_XVIDProfile_Simple = 0x1,
370 VDEC_XVIDProfile_Advanced_Realtime_Simple = 0x2,
371 VDEC_XVIDProfile_Advanced_Simple = 0x4
372};
373
374enum vdec_xvid_level {
375 VDEC_XVID_LEVEL_S_L0 = 0x1,
376 VDEC_XVID_LEVEL_S_L1 = 0x2,
377 VDEC_XVID_LEVEL_S_L2 = 0x4,
378 VDEC_XVID_LEVEL_S_L3 = 0x8,
379 VDEC_XVID_LEVEL_ARTS_L1 = 0x10,
380 VDEC_XVID_LEVEL_ARTS_L2 = 0x20,
381 VDEC_XVID_LEVEL_ARTS_L3 = 0x40,
382 VDEC_XVID_LEVEL_ARTS_L4 = 0x80,
383 VDEC_XVID_LEVEL_AS_L0 = 0x100,
384 VDEC_XVID_LEVEL_AS_L1 = 0x200,
385 VDEC_XVID_LEVEL_AS_L2 = 0x400,
386 VDEC_XVID_LEVEL_AS_L3 = 0x800,
387 VDEC_XVID_LEVEL_AS_L4 = 0x1000
388};
389
390enum vdec_h263profile {
391 VDEC_H263ProfileBaseline = 0x01,
392 VDEC_H263ProfileH320Coding = 0x02,
393 VDEC_H263ProfileBackwardCompatible = 0x04,
394 VDEC_H263ProfileISWV2 = 0x08,
395 VDEC_H263ProfileISWV3 = 0x10,
396 VDEC_H263ProfileHighCompression = 0x20,
397 VDEC_H263ProfileInternet = 0x40,
398 VDEC_H263ProfileInterlace = 0x80,
399 VDEC_H263ProfileHighLatency = 0x100,
400 VDEC_H263ProfileKhronosExtensions = 0x6F000000,
401 VDEC_H263ProfileVendorStartUnused = 0x7F000000,
402 VDEC_H263ProfileMax = 0x7FFFFFFF
403};
404
405enum vdec_h263level {
406 VDEC_H263Level10 = 0x01,
407 VDEC_H263Level20 = 0x02,
408 VDEC_H263Level30 = 0x04,
409 VDEC_H263Level40 = 0x08,
410 VDEC_H263Level45 = 0x10,
411 VDEC_H263Level50 = 0x20,
412 VDEC_H263Level60 = 0x40,
413 VDEC_H263Level70 = 0x80,
414 VDEC_H263LevelKhronosExtensions = 0x6F000000,
415 VDEC_H263LevelVendorStartUnused = 0x7F000000,
416 VDEC_H263LevelMax = 0x7FFFFFFF
417};
418
419enum vdec_wmv_format {
420 VDEC_WMVFormatUnused = 0x01,
421 VDEC_WMVFormat7 = 0x02,
422 VDEC_WMVFormat8 = 0x04,
423 VDEC_WMVFormat9 = 0x08,
424 VDEC_WMFFormatKhronosExtensions = 0x6F000000,
425 VDEC_WMFFormatVendorStartUnused = 0x7F000000,
426 VDEC_WMVFormatMax = 0x7FFFFFFF
427};
428
429enum vdec_vc1_profile {
430 VDEC_VC1ProfileSimple = 0x1,
431 VDEC_VC1ProfileMain = 0x2,
432 VDEC_VC1ProfileAdvanced = 0x4
433};
434
435enum vdec_vc1_level {
436 VDEC_VC1_LEVEL_S_Low = 0x1,
437 VDEC_VC1_LEVEL_S_Medium = 0x2,
438 VDEC_VC1_LEVEL_M_Low = 0x4,
439 VDEC_VC1_LEVEL_M_Medium = 0x8,
440 VDEC_VC1_LEVEL_M_High = 0x10,
441 VDEC_VC1_LEVEL_A_L0 = 0x20,
442 VDEC_VC1_LEVEL_A_L1 = 0x40,
443 VDEC_VC1_LEVEL_A_L2 = 0x80,
444 VDEC_VC1_LEVEL_A_L3 = 0x100,
445 VDEC_VC1_LEVEL_A_L4 = 0x200
446};
447
448struct vdec_profile_level {
449 uint32_t profiles;
450 uint32_t levels;
451};
452
453enum vdec_interlaced_format {
454 VDEC_InterlaceFrameProgressive = 0x1,
455 VDEC_InterlaceInterleaveFrameTopFieldFirst = 0x2,
456 VDEC_InterlaceInterleaveFrameBottomFieldFirst = 0x4
457};
458
459enum vdec_output_fromat {
460 VDEC_YUV_FORMAT_NV12 = 0x1,
461 VDEC_YUV_FORMAT_TILE_4x2 = 0x2
462};
463
464enum vdec_output_order {
465 VDEC_ORDER_DISPLAY = 0x1,
466 VDEC_ORDER_DECODE = 0x2
467};
468
469struct vdec_picsize {
470 uint32_t frame_width;
471 uint32_t frame_height;
472 uint32_t stride;
473 uint32_t scan_lines;
474};
475
476struct vdec_seqheader {
477 void __user *ptr_seqheader;
478 size_t seq_header_len;
479 int pmem_fd;
480 size_t pmem_offset;
481};
482
483struct vdec_mberror {
484 void __user *ptr_errormap;
485 size_t err_mapsize;
486};
487
488struct vdec_input_frameinfo {
489 void __user *bufferaddr;
490 size_t offset;
491 size_t datalen;
492 uint32_t flags;
493 int64_t timestamp;
494 void *client_data;
495 int pmem_fd;
496 size_t pmem_offset;
497};
498
499struct vdec_framesize {
500 uint32_t left;
501 uint32_t top;
502 uint32_t right;
503 uint32_t bottom;
504};
505
506struct vdec_output_frameinfo {
507 void __user *bufferaddr;
508 size_t offset;
509 size_t len;
510 uint32_t flags;
511 int64_t time_stamp;
512 enum vdec_picture pic_type;
513 void *client_data;
514 void *input_frame_clientdata;
515 struct vdec_framesize framesize;
516 enum vdec_interlaced_format interlaced_format;
517};
518
519union vdec_msgdata {
520 struct vdec_output_frameinfo output_frame;
521 void *input_frame_clientdata;
522};
523
524struct vdec_msginfo {
525 uint32_t status_code;
526 uint32_t msgcode;
527 union vdec_msgdata msgdata;
528 size_t msgdatasize;
529};
530
531struct vdec_framerate {
532 unsigned long fps_denominator;
533 unsigned long fps_numerator;
534};
535
536struct vdec_h264_mv{
537 size_t size;
538 int count;
539 int pmem_fd;
540 int offset;
541};
542
543struct vdec_mv_buff_size{
544 int width;
545 int height;
546 int size;
547 int alignment;
548};
549
550#endif /* end of macro _VDECDECODER_H_ */