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Jon Loeligeref82a302006-06-17 17:52:55 -05001/*
2 * Driver for Vitesse PHYs
3 *
4 * Author: Kriston Carson
5 *
6 * Copyright (c) 2005 Freescale Semiconductor, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
Jon Loeligeref82a302006-06-17 17:52:55 -050015#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/mii.h>
18#include <linux/ethtool.h>
19#include <linux/phy.h>
20
21/* Vitesse Extended Control Register 1 */
22#define MII_VSC8244_EXT_CON1 0x17
23#define MII_VSC8244_EXTCON1_INIT 0x0000
24
25/* Vitesse Interrupt Mask Register */
26#define MII_VSC8244_IMASK 0x19
27#define MII_VSC8244_IMASK_IEN 0x8000
28#define MII_VSC8244_IMASK_SPEED 0x4000
29#define MII_VSC8244_IMASK_LINK 0x2000
30#define MII_VSC8244_IMASK_DUPLEX 0x1000
31#define MII_VSC8244_IMASK_MASK 0xf000
32
33/* Vitesse Interrupt Status Register */
34#define MII_VSC8244_ISTAT 0x1a
35#define MII_VSC8244_ISTAT_STATUS 0x8000
36#define MII_VSC8244_ISTAT_SPEED 0x4000
37#define MII_VSC8244_ISTAT_LINK 0x2000
38#define MII_VSC8244_ISTAT_DUPLEX 0x1000
39
40/* Vitesse Auxiliary Control/Status Register */
41#define MII_VSC8244_AUX_CONSTAT 0x1c
42#define MII_VSC8244_AUXCONSTAT_INIT 0x0004
43#define MII_VSC8244_AUXCONSTAT_DUPLEX 0x0020
44#define MII_VSC8244_AUXCONSTAT_SPEED 0x0018
45#define MII_VSC8244_AUXCONSTAT_GBIT 0x0010
46#define MII_VSC8244_AUXCONSTAT_100 0x0008
47
48MODULE_DESCRIPTION("Vitesse PHY driver");
49MODULE_AUTHOR("Kriston Carson");
50MODULE_LICENSE("GPL");
51
52static int vsc824x_config_init(struct phy_device *phydev)
53{
54 int err;
55
56 err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
57 MII_VSC8244_AUXCONSTAT_INIT);
58 if (err < 0)
59 return err;
60
61 err = phy_write(phydev, MII_VSC8244_EXT_CON1,
62 MII_VSC8244_EXTCON1_INIT);
63 return err;
64}
65
66static int vsc824x_ack_interrupt(struct phy_device *phydev)
67{
Andy Fleming1d5e83a2007-07-10 16:42:04 -050068 int err = 0;
69
70 /*
71 * Don't bother to ACK the interrupts if interrupts
72 * are disabled. The 824x cannot clear the interrupts
73 * if they are disabled.
74 */
75 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
76 err = phy_read(phydev, MII_VSC8244_ISTAT);
Jon Loeligeref82a302006-06-17 17:52:55 -050077
78 return (err < 0) ? err : 0;
79}
80
81static int vsc824x_config_intr(struct phy_device *phydev)
82{
83 int err;
84
85 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
86 err = phy_write(phydev, MII_VSC8244_IMASK,
87 MII_VSC8244_IMASK_MASK);
Andy Fleming1d5e83a2007-07-10 16:42:04 -050088 else {
89 /*
90 * The Vitesse PHY cannot clear the interrupt
91 * once it has disabled them, so we clear them first
92 */
93 err = phy_read(phydev, MII_VSC8244_ISTAT);
94
95 if (err)
96 return err;
97
Jon Loeligeref82a302006-06-17 17:52:55 -050098 err = phy_write(phydev, MII_VSC8244_IMASK, 0);
Andy Fleming1d5e83a2007-07-10 16:42:04 -050099 }
100
Jon Loeligeref82a302006-06-17 17:52:55 -0500101 return err;
102}
103
104/* Vitesse 824x */
105static struct phy_driver vsc8244_driver = {
Kumar Gala5f708dd2007-06-28 13:26:06 -0500106 .phy_id = 0x000fc6c0,
Jon Loeligeref82a302006-06-17 17:52:55 -0500107 .name = "Vitesse VSC8244",
108 .phy_id_mask = 0x000fffc0,
109 .features = PHY_GBIT_FEATURES,
110 .flags = PHY_HAS_INTERRUPT,
111 .config_init = &vsc824x_config_init,
112 .config_aneg = &genphy_config_aneg,
113 .read_status = &genphy_read_status,
114 .ack_interrupt = &vsc824x_ack_interrupt,
115 .config_intr = &vsc824x_config_intr,
116 .driver = { .owner = THIS_MODULE,},
117};
118
119static int __init vsc8244_init(void)
120{
121 return phy_driver_register(&vsc8244_driver);
122}
123
124static void __exit vsc8244_exit(void)
125{
126 phy_driver_unregister(&vsc8244_driver);
127}
128
129module_init(vsc8244_init);
130module_exit(vsc8244_exit);