H. Peter Anvin | 1965aae | 2008-10-22 22:26:29 -0700 | [diff] [blame] | 1 | #ifndef _ASM_X86_PCI_64_H |
| 2 | #define _ASM_X86_PCI_64_H |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | #ifdef __KERNEL__ |
| 5 | |
Muli Ben-Yehuda | 08f1c19 | 2007-07-22 00:23:39 +0300 | [diff] [blame] | 6 | #ifdef CONFIG_CALGARY_IOMMU |
Joe Perches | 3cb47d7 | 2008-03-23 01:03:02 -0700 | [diff] [blame] | 7 | static inline void *pci_iommu(struct pci_bus *bus) |
Muli Ben-Yehuda | 08f1c19 | 2007-07-22 00:23:39 +0300 | [diff] [blame] | 8 | { |
| 9 | struct pci_sysdata *sd = bus->sysdata; |
| 10 | return sd->iommu; |
| 11 | } |
| 12 | |
| 13 | static inline void set_pci_iommu(struct pci_bus *bus, void *val) |
| 14 | { |
| 15 | struct pci_sysdata *sd = bus->sysdata; |
| 16 | sd->iommu = val; |
| 17 | } |
| 18 | #endif /* CONFIG_CALGARY_IOMMU */ |
| 19 | |
Joe Perches | 3cb47d7 | 2008-03-23 01:03:02 -0700 | [diff] [blame] | 20 | extern int (*pci_config_read)(int seg, int bus, int dev, int fn, |
| 21 | int reg, int len, u32 *value); |
| 22 | extern int (*pci_config_write)(int seg, int bus, int dev, int fn, |
| 23 | int reg, int len, u32 value); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | |
Yinghai Lu | 752bea4 | 2008-03-07 15:02:50 -0800 | [diff] [blame] | 25 | extern void dma32_reserve_bootmem(void); |
Jon Mason | 0dc243a | 2006-06-26 13:58:11 +0200 | [diff] [blame] | 26 | extern void pci_iommu_alloc(void); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | /* The PCI address space does equal the physical memory |
| 29 | * address space. The networking and block device layers use |
| 30 | * this boolean for bounce buffer decisions |
| 31 | * |
Muli Ben-Yehuda | 17a941d | 2006-01-11 22:44:42 +0100 | [diff] [blame] | 32 | * On AMD64 it mostly equals, but we set it to zero if a hardware |
| 33 | * IOMMU (gart) of sotware IOMMU (swiotlb) is available. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | */ |
Muli Ben-Yehuda | 17a941d | 2006-01-11 22:44:42 +0100 | [diff] [blame] | 35 | #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) |
| 36 | |
Joerg Roedel | 966396d | 2007-10-24 12:49:48 +0200 | [diff] [blame] | 37 | #if defined(CONFIG_GART_IOMMU) || defined(CONFIG_CALGARY_IOMMU) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ |
| 40 | dma_addr_t ADDR_NAME; |
| 41 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ |
| 42 | __u32 LEN_NAME; |
| 43 | #define pci_unmap_addr(PTR, ADDR_NAME) \ |
| 44 | ((PTR)->ADDR_NAME) |
| 45 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ |
| 46 | (((PTR)->ADDR_NAME) = (VAL)) |
| 47 | #define pci_unmap_len(PTR, LEN_NAME) \ |
| 48 | ((PTR)->LEN_NAME) |
| 49 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ |
| 50 | (((PTR)->LEN_NAME) = (VAL)) |
| 51 | |
| 52 | #else |
| 53 | /* No IOMMU */ |
| 54 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) |
| 56 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) |
| 57 | #define pci_unmap_addr(PTR, ADDR_NAME) (0) |
| 58 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) |
| 59 | #define pci_unmap_len(PTR, LEN_NAME) (0) |
| 60 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) |
| 61 | |
| 62 | #endif |
| 63 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | #endif /* __KERNEL__ */ |
| 65 | |
H. Peter Anvin | 1965aae | 2008-10-22 22:26:29 -0700 | [diff] [blame] | 66 | #endif /* _ASM_X86_PCI_64_H */ |