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Pantelis Antoniou48257c42005-10-28 16:25:58 -04001/*
2 * Platform information definitions for the
3 * universal Freescale Ethernet driver.
4 *
5 * Copyright (c) 2003 Intracom S.A.
6 * by Pantelis Antoniou <panto@intracom.gr>
7 *
8 * 2005 (c) MontaVista Software, Inc.
9 * Vitaly Bordug <vbordug@ru.mvista.com>
10 *
11 * This file is licensed under the terms of the GNU General Public License
12 * version 2. This program is licensed "as is" without any warranty of any
13 * kind, whether express or implied.
14 */
15
16#ifndef FS_ENET_PD_H
17#define FS_ENET_PD_H
18
Pantelis Antoniou48257c42005-10-28 16:25:58 -040019#include <asm/types.h>
20
21#define FS_ENET_NAME "fs_enet"
22
23enum fs_id {
24 fsid_fec1,
25 fsid_fec2,
26 fsid_fcc1,
27 fsid_fcc2,
28 fsid_fcc3,
29 fsid_scc1,
30 fsid_scc2,
31 fsid_scc3,
32 fsid_scc4,
33};
34
35#define FS_MAX_INDEX 9
36
37static inline int fs_get_fec_index(enum fs_id id)
38{
39 if (id >= fsid_fec1 && id <= fsid_fec2)
40 return id - fsid_fec1;
41 return -1;
42}
43
44static inline int fs_get_fcc_index(enum fs_id id)
45{
46 if (id >= fsid_fcc1 && id <= fsid_fcc3)
47 return id - fsid_fcc1;
48 return -1;
49}
50
51static inline int fs_get_scc_index(enum fs_id id)
52{
53 if (id >= fsid_scc1 && id <= fsid_scc4)
54 return id - fsid_scc1;
55 return -1;
56}
57
58enum fs_mii_method {
59 fsmii_fixed,
60 fsmii_fec,
61 fsmii_bitbang,
62};
63
64enum fs_ioport {
65 fsiop_porta,
66 fsiop_portb,
67 fsiop_portc,
68 fsiop_portd,
69 fsiop_porte,
70};
71
Vitaly Bordug2ca2d5e2006-08-14 23:00:31 -070072struct fs_mii_bit {
73 u32 offset;
74 u8 bit;
75 u8 polarity;
76};
77struct fs_mii_bb_platform_info {
78 struct fs_mii_bit mdio_dir;
79 struct fs_mii_bit mdio_dat;
80 struct fs_mii_bit mdc_dat;
81 int mdio_port; /* port & bit for MDIO */
82 int mdio_bit;
83 int mdc_port; /* port & bit for MDC */
84 int mdc_bit;
85 int delay; /* delay in us */
86 int irq[32]; /* irqs per phy's */
Pantelis Antoniou48257c42005-10-28 16:25:58 -040087};
88
89struct fs_platform_info {
90
91 void(*init_ioports)(void);
92 /* device specific information */
93 int fs_no; /* controller index */
94
95 u32 cp_page; /* CPM page */
96 u32 cp_block; /* CPM sblock */
97
98 u32 clk_trx; /* some stuff for pins & mux configuration*/
99 u32 clk_route;
100 u32 clk_mask;
101
102 u32 mem_offset;
103 u32 dpram_offset;
104 u32 fcc_regs_c;
105
106 u32 device_flags;
107
108 int phy_addr; /* the phy address (-1 no phy) */
Vitaly Bordug2ca2d5e2006-08-14 23:00:31 -0700109 const char* bus_id;
Pantelis Antoniou48257c42005-10-28 16:25:58 -0400110 int phy_irq; /* the phy irq (if it exists) */
111
112 const struct fs_mii_bus_info *bus_info;
113
114 int rx_ring, tx_ring; /* number of buffers on rx */
115 __u8 macaddr[6]; /* mac address */
116 int rx_copybreak; /* limit we copy small frames */
117 int use_napi; /* use NAPI */
118 int napi_weight; /* NAPI weight */
119
120 int use_rmii; /* use RMII mode */
Vitaly Bordug2ca2d5e2006-08-14 23:00:31 -0700121 int has_phy; /* if the network is phy container as well...*/
Pantelis Antoniou48257c42005-10-28 16:25:58 -0400122};
Vitaly Bordug2ca2d5e2006-08-14 23:00:31 -0700123struct fs_mii_fec_platform_info {
124 u32 irq[32];
125 u32 mii_speed;
126};
Pantelis Antoniou48257c42005-10-28 16:25:58 -0400127#endif