blob: 4a55bf380957fd5142f0dd0a8dfa9c39af6d73e8 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * probe.c - PCI detection and setup code
3 */
4
5#include <linux/kernel.h>
6#include <linux/delay.h>
7#include <linux/init.h>
8#include <linux/pci.h>
9#include <linux/slab.h>
10#include <linux/module.h>
11#include <linux/cpumask.h>
Shaohua Li7d715a62008-02-25 09:46:41 +080012#include <linux/pci-aspm.h>
Greg KHbc56b9e2005-04-08 14:53:31 +090013#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
15#define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */
16#define CARDBUS_RESERVE_BUSNR 3
17#define PCI_CFG_SPACE_SIZE 256
18#define PCI_CFG_SPACE_EXP_SIZE 4096
19
20/* Ugh. Need to stop exporting this to modules. */
21LIST_HEAD(pci_root_buses);
22EXPORT_SYMBOL(pci_root_buses);
23
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080024
25static int find_anything(struct device *dev, void *data)
26{
27 return 1;
28}
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070030/*
31 * Some device drivers need know if pci is initiated.
32 * Basically, we think pci is not initiated when there
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080033 * is no device to be found on the pci_bus_type.
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070034 */
35int no_pci_devices(void)
36{
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080037 struct device *dev;
38 int no_devices;
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070039
Greg Kroah-Hartman70308922008-02-13 22:30:39 -080040 dev = bus_find_device(&pci_bus_type, NULL, NULL, find_anything);
41 no_devices = (dev == NULL);
42 put_device(dev);
43 return no_devices;
44}
Zhang, Yanmined4aaad2007-07-15 23:39:39 -070045EXPORT_SYMBOL(no_pci_devices);
46
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#ifdef HAVE_PCI_LEGACY
48/**
49 * pci_create_legacy_files - create legacy I/O port and memory files
50 * @b: bus to create files under
51 *
52 * Some platforms allow access to legacy I/O port and ISA memory space on
53 * a per-bus basis. This routine creates the files and ties them into
54 * their associated read, write and mmap files from pci-sysfs.c
55 */
56static void pci_create_legacy_files(struct pci_bus *b)
57{
Eric Sesterhennf5afe802006-02-28 15:34:49 +010058 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
Linus Torvalds1da177e2005-04-16 15:20:36 -070059 GFP_ATOMIC);
60 if (b->legacy_io) {
Linus Torvalds1da177e2005-04-16 15:20:36 -070061 b->legacy_io->attr.name = "legacy_io";
62 b->legacy_io->size = 0xffff;
63 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
Linus Torvalds1da177e2005-04-16 15:20:36 -070064 b->legacy_io->read = pci_read_legacy_io;
65 b->legacy_io->write = pci_write_legacy_io;
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040066 device_create_bin_file(&b->dev, b->legacy_io);
Linus Torvalds1da177e2005-04-16 15:20:36 -070067
68 /* Allocated above after the legacy_io struct */
69 b->legacy_mem = b->legacy_io + 1;
70 b->legacy_mem->attr.name = "legacy_mem";
71 b->legacy_mem->size = 1024*1024;
72 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
Linus Torvalds1da177e2005-04-16 15:20:36 -070073 b->legacy_mem->mmap = pci_mmap_legacy_mem;
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040074 device_create_bin_file(&b->dev, b->legacy_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 }
76}
77
78void pci_remove_legacy_files(struct pci_bus *b)
79{
80 if (b->legacy_io) {
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040081 device_remove_bin_file(&b->dev, b->legacy_io);
82 device_remove_bin_file(&b->dev, b->legacy_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -070083 kfree(b->legacy_io); /* both are allocated here */
84 }
85}
86#else /* !HAVE_PCI_LEGACY */
87static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
88void pci_remove_legacy_files(struct pci_bus *bus) { return; }
89#endif /* HAVE_PCI_LEGACY */
90
91/*
92 * PCI Bus Class Devices
93 */
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040094static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
Mike Travis39106dc2008-04-08 11:43:03 -070095 int type,
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -040096 struct device_attribute *attr,
Alan Cox4327edf2005-09-10 00:25:49 -070097 char *buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -070098{
Linus Torvalds1da177e2005-04-16 15:20:36 -070099 int ret;
Alan Cox4327edf2005-09-10 00:25:49 -0700100 cpumask_t cpumask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400102 cpumask = pcibus_to_cpumask(to_pci_bus(dev));
Mike Travis39106dc2008-04-08 11:43:03 -0700103 ret = type?
104 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask):
105 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
106 buf[ret++] = '\n';
107 buf[ret] = '\0';
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108 return ret;
109}
Mike Travis39106dc2008-04-08 11:43:03 -0700110
111static ssize_t inline pci_bus_show_cpumaskaffinity(struct device *dev,
112 struct device_attribute *attr,
113 char *buf)
114{
115 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
116}
117
118static ssize_t inline pci_bus_show_cpulistaffinity(struct device *dev,
119 struct device_attribute *attr,
120 char *buf)
121{
122 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
123}
124
125DEVICE_ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL);
126DEVICE_ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127
128/*
129 * PCI Bus Class
130 */
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400131static void release_pcibus_dev(struct device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132{
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400133 struct pci_bus *pci_bus = to_pci_bus(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134
135 if (pci_bus->bridge)
136 put_device(pci_bus->bridge);
137 kfree(pci_bus);
138}
139
140static struct class pcibus_class = {
141 .name = "pci_bus",
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400142 .dev_release = &release_pcibus_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143};
144
145static int __init pcibus_class_init(void)
146{
147 return class_register(&pcibus_class);
148}
149postcore_initcall(pcibus_class_init);
150
151/*
152 * Translate the low bits of the PCI base
153 * to the resource type
154 */
155static inline unsigned int pci_calc_resource_flags(unsigned int flags)
156{
157 if (flags & PCI_BASE_ADDRESS_SPACE_IO)
158 return IORESOURCE_IO;
159
160 if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
161 return IORESOURCE_MEM | IORESOURCE_PREFETCH;
162
163 return IORESOURCE_MEM;
164}
165
166/*
167 * Find the extent of a PCI decode..
168 */
Olof Johanssonf797f9c2005-06-13 15:52:27 -0700169static u32 pci_size(u32 base, u32 maxbase, u32 mask)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170{
171 u32 size = mask & maxbase; /* Find the significant bits */
172 if (!size)
173 return 0;
174
175 /* Get the lowest of them to find the decode size, and
176 from that the extent. */
177 size = (size & ~(size-1)) - 1;
178
179 /* base == maxbase can be valid only if the BAR has
180 already been programmed with all 1s. */
181 if (base == maxbase && ((base | size) & mask) != mask)
182 return 0;
183
184 return size;
185}
186
Yinghai Lu07eddf32006-11-29 13:53:10 -0800187static u64 pci_size64(u64 base, u64 maxbase, u64 mask)
188{
189 u64 size = mask & maxbase; /* Find the significant bits */
190 if (!size)
191 return 0;
192
193 /* Get the lowest of them to find the decode size, and
194 from that the extent. */
195 size = (size & ~(size-1)) - 1;
196
197 /* base == maxbase can be valid only if the BAR has
198 already been programmed with all 1s. */
199 if (base == maxbase && ((base | size) & mask) != mask)
200 return 0;
201
202 return size;
203}
204
205static inline int is_64bit_memory(u32 mask)
206{
207 if ((mask & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK)) ==
208 (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64))
209 return 1;
210 return 0;
211}
212
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
214{
215 unsigned int pos, reg, next;
216 u32 l, sz;
217 struct resource *res;
218
219 for(pos=0; pos<howmany; pos = next) {
Yinghai Lu07eddf32006-11-29 13:53:10 -0800220 u64 l64;
221 u64 sz64;
222 u32 raw_sz;
223
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224 next = pos+1;
225 res = &dev->resource[pos];
226 res->name = pci_name(dev);
227 reg = PCI_BASE_ADDRESS_0 + (pos << 2);
228 pci_read_config_dword(dev, reg, &l);
229 pci_write_config_dword(dev, reg, ~0);
230 pci_read_config_dword(dev, reg, &sz);
231 pci_write_config_dword(dev, reg, l);
232 if (!sz || sz == 0xffffffff)
233 continue;
234 if (l == 0xffffffff)
235 l = 0;
Yinghai Lu07eddf32006-11-29 13:53:10 -0800236 raw_sz = sz;
237 if ((l & PCI_BASE_ADDRESS_SPACE) ==
238 PCI_BASE_ADDRESS_SPACE_MEMORY) {
Amos Waterland3c6de922005-09-22 00:48:19 -0700239 sz = pci_size(l, sz, (u32)PCI_BASE_ADDRESS_MEM_MASK);
Yinghai Lu07eddf32006-11-29 13:53:10 -0800240 /*
241 * For 64bit prefetchable memory sz could be 0, if the
242 * real size is bigger than 4G, so we need to check
243 * szhi for that.
244 */
245 if (!is_64bit_memory(l) && !sz)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700246 continue;
247 res->start = l & PCI_BASE_ADDRESS_MEM_MASK;
248 res->flags |= l & ~PCI_BASE_ADDRESS_MEM_MASK;
249 } else {
250 sz = pci_size(l, sz, PCI_BASE_ADDRESS_IO_MASK & 0xffff);
251 if (!sz)
252 continue;
253 res->start = l & PCI_BASE_ADDRESS_IO_MASK;
254 res->flags |= l & ~PCI_BASE_ADDRESS_IO_MASK;
255 }
256 res->end = res->start + (unsigned long) sz;
Ivan Kokshaysky88452562008-03-30 19:50:14 +0400257 res->flags |= pci_calc_resource_flags(l) | IORESOURCE_SIZEALIGN;
Yinghai Lu07eddf32006-11-29 13:53:10 -0800258 if (is_64bit_memory(l)) {
H. Peter Anvin17d6dc82006-04-18 17:19:52 -0700259 u32 szhi, lhi;
Yinghai Lu07eddf32006-11-29 13:53:10 -0800260
H. Peter Anvin17d6dc82006-04-18 17:19:52 -0700261 pci_read_config_dword(dev, reg+4, &lhi);
262 pci_write_config_dword(dev, reg+4, ~0);
263 pci_read_config_dword(dev, reg+4, &szhi);
264 pci_write_config_dword(dev, reg+4, lhi);
Yinghai Lu07eddf32006-11-29 13:53:10 -0800265 sz64 = ((u64)szhi << 32) | raw_sz;
266 l64 = ((u64)lhi << 32) | l;
267 sz64 = pci_size64(l64, sz64, PCI_BASE_ADDRESS_MEM_MASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268 next++;
269#if BITS_PER_LONG == 64
Yinghai Lu07eddf32006-11-29 13:53:10 -0800270 if (!sz64) {
271 res->start = 0;
272 res->end = 0;
273 res->flags = 0;
274 continue;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275 }
Yinghai Lu07eddf32006-11-29 13:53:10 -0800276 res->start = l64 & PCI_BASE_ADDRESS_MEM_MASK;
277 res->end = res->start + sz64;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278#else
Yinghai Lu07eddf32006-11-29 13:53:10 -0800279 if (sz64 > 0x100000000ULL) {
280 printk(KERN_ERR "PCI: Unable to handle 64-bit "
281 "BAR for device %s\n", pci_name(dev));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282 res->start = 0;
283 res->flags = 0;
Bjorn Helgaasea285022006-06-09 11:28:29 -0700284 } else if (lhi) {
H. Peter Anvin17d6dc82006-04-18 17:19:52 -0700285 /* 64-bit wide address, treat as disabled */
Yinghai Lu07eddf32006-11-29 13:53:10 -0800286 pci_write_config_dword(dev, reg,
287 l & ~(u32)PCI_BASE_ADDRESS_MEM_MASK);
H. Peter Anvin17d6dc82006-04-18 17:19:52 -0700288 pci_write_config_dword(dev, reg+4, 0);
289 res->start = 0;
290 res->end = sz;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291 }
292#endif
293 }
294 }
295 if (rom) {
296 dev->rom_base_reg = rom;
297 res = &dev->resource[PCI_ROM_RESOURCE];
298 res->name = pci_name(dev);
299 pci_read_config_dword(dev, rom, &l);
300 pci_write_config_dword(dev, rom, ~PCI_ROM_ADDRESS_ENABLE);
301 pci_read_config_dword(dev, rom, &sz);
302 pci_write_config_dword(dev, rom, l);
303 if (l == 0xffffffff)
304 l = 0;
305 if (sz && sz != 0xffffffff) {
Amos Waterland3c6de922005-09-22 00:48:19 -0700306 sz = pci_size(l, sz, (u32)PCI_ROM_ADDRESS_MASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307 if (sz) {
308 res->flags = (l & IORESOURCE_ROM_ENABLE) |
Gary Hadebb446092007-12-11 17:09:13 -0800309 IORESOURCE_MEM | IORESOURCE_PREFETCH |
Ivan Kokshaysky88452562008-03-30 19:50:14 +0400310 IORESOURCE_READONLY | IORESOURCE_CACHEABLE |
311 IORESOURCE_SIZEALIGN;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312 res->start = l & PCI_ROM_ADDRESS_MASK;
313 res->end = res->start + (unsigned long) sz;
314 }
315 }
316 }
317}
318
Sam Ravnborg0ab2b572008-02-17 10:45:28 +0100319void __devinit pci_read_bridge_bases(struct pci_bus *child)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320{
321 struct pci_dev *dev = child->self;
322 u8 io_base_lo, io_limit_lo;
323 u16 mem_base_lo, mem_limit_lo;
324 unsigned long base, limit;
325 struct resource *res;
326 int i;
327
328 if (!dev) /* It's a host bus, nothing to read */
329 return;
330
331 if (dev->transparent) {
332 printk(KERN_INFO "PCI: Transparent bridge - %s\n", pci_name(dev));
Ivan Kokshaysky90b54922005-06-07 04:07:02 +0400333 for(i = 3; i < PCI_BUS_NUM_RESOURCES; i++)
334 child->resource[i] = child->parent->resource[i - 3];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335 }
336
337 for(i=0; i<3; i++)
338 child->resource[i] = &dev->resource[PCI_BRIDGE_RESOURCES+i];
339
340 res = child->resource[0];
341 pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo);
342 pci_read_config_byte(dev, PCI_IO_LIMIT, &io_limit_lo);
343 base = (io_base_lo & PCI_IO_RANGE_MASK) << 8;
344 limit = (io_limit_lo & PCI_IO_RANGE_MASK) << 8;
345
346 if ((io_base_lo & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32) {
347 u16 io_base_hi, io_limit_hi;
348 pci_read_config_word(dev, PCI_IO_BASE_UPPER16, &io_base_hi);
349 pci_read_config_word(dev, PCI_IO_LIMIT_UPPER16, &io_limit_hi);
350 base |= (io_base_hi << 16);
351 limit |= (io_limit_hi << 16);
352 }
353
354 if (base <= limit) {
355 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
Daniel Yeisley9d265122005-12-05 07:06:43 -0500356 if (!res->start)
357 res->start = base;
358 if (!res->end)
359 res->end = limit + 0xfff;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700360 }
361
362 res = child->resource[1];
363 pci_read_config_word(dev, PCI_MEMORY_BASE, &mem_base_lo);
364 pci_read_config_word(dev, PCI_MEMORY_LIMIT, &mem_limit_lo);
365 base = (mem_base_lo & PCI_MEMORY_RANGE_MASK) << 16;
366 limit = (mem_limit_lo & PCI_MEMORY_RANGE_MASK) << 16;
367 if (base <= limit) {
368 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
369 res->start = base;
370 res->end = limit + 0xfffff;
371 }
372
373 res = child->resource[2];
374 pci_read_config_word(dev, PCI_PREF_MEMORY_BASE, &mem_base_lo);
375 pci_read_config_word(dev, PCI_PREF_MEMORY_LIMIT, &mem_limit_lo);
376 base = (mem_base_lo & PCI_PREF_RANGE_MASK) << 16;
377 limit = (mem_limit_lo & PCI_PREF_RANGE_MASK) << 16;
378
379 if ((mem_base_lo & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64) {
380 u32 mem_base_hi, mem_limit_hi;
381 pci_read_config_dword(dev, PCI_PREF_BASE_UPPER32, &mem_base_hi);
382 pci_read_config_dword(dev, PCI_PREF_LIMIT_UPPER32, &mem_limit_hi);
383
384 /*
385 * Some bridges set the base > limit by default, and some
386 * (broken) BIOSes do not initialize them. If we find
387 * this, just assume they are not being used.
388 */
389 if (mem_base_hi <= mem_limit_hi) {
390#if BITS_PER_LONG == 64
391 base |= ((long) mem_base_hi) << 32;
392 limit |= ((long) mem_limit_hi) << 32;
393#else
394 if (mem_base_hi || mem_limit_hi) {
395 printk(KERN_ERR "PCI: Unable to handle 64-bit address space for bridge %s\n", pci_name(dev));
396 return;
397 }
398#endif
399 }
400 }
401 if (base <= limit) {
402 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM | IORESOURCE_PREFETCH;
403 res->start = base;
404 res->end = limit + 0xfffff;
405 }
406}
407
Sam Ravnborg96bde062007-03-26 21:53:30 -0800408static struct pci_bus * pci_alloc_bus(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700409{
410 struct pci_bus *b;
411
Eric Sesterhennf5afe802006-02-28 15:34:49 +0100412 b = kzalloc(sizeof(*b), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413 if (b) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700414 INIT_LIST_HEAD(&b->node);
415 INIT_LIST_HEAD(&b->children);
416 INIT_LIST_HEAD(&b->devices);
417 }
418 return b;
419}
420
Adrian Bunkcbd4e052008-04-18 13:53:55 -0700421static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent,
422 struct pci_dev *bridge, int busnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700423{
424 struct pci_bus *child;
425 int i;
426
427 /*
428 * Allocate a new bus, and inherit stuff from the parent..
429 */
430 child = pci_alloc_bus();
431 if (!child)
432 return NULL;
433
434 child->self = bridge;
435 child->parent = parent;
436 child->ops = parent->ops;
437 child->sysdata = parent->sysdata;
Michael S. Tsirkin6e325a62006-02-14 18:52:22 +0200438 child->bus_flags = parent->bus_flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439 child->bridge = get_device(&bridge->dev);
440
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -0400441 /* initialize some portions of the bus device, but don't register it
442 * now as the parent is not properly set up yet. This device will get
443 * registered later in pci_bus_add_devices()
444 */
445 child->dev.class = &pcibus_class;
446 sprintf(child->dev.bus_id, "%04x:%02x", pci_domain_nr(child), busnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700447
448 /*
449 * Set up the primary, secondary and subordinate
450 * bus numbers.
451 */
452 child->number = child->secondary = busnr;
453 child->primary = parent->secondary;
454 child->subordinate = 0xff;
455
456 /* Set up default resource pointers and names.. */
457 for (i = 0; i < 4; i++) {
458 child->resource[i] = &bridge->resource[PCI_BRIDGE_RESOURCES+i];
459 child->resource[i]->name = child->name;
460 }
461 bridge->subordinate = child;
462
463 return child;
464}
465
Sam Ravnborg451124a2008-02-02 22:33:43 +0100466struct pci_bus *__ref pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700467{
468 struct pci_bus *child;
469
470 child = pci_alloc_child_bus(parent, dev, busnr);
Rajesh Shahe4ea9bb2005-04-28 00:25:48 -0700471 if (child) {
Zhang Yanmind71374d2006-06-02 12:35:43 +0800472 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700473 list_add_tail(&child->node, &parent->children);
Zhang Yanmind71374d2006-06-02 12:35:43 +0800474 up_write(&pci_bus_sem);
Rajesh Shahe4ea9bb2005-04-28 00:25:48 -0700475 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476 return child;
477}
478
Sam Ravnborg96bde062007-03-26 21:53:30 -0800479static void pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max)
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700480{
481 struct pci_bus *parent = child->parent;
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700482
483 /* Attempts to fix that up are really dangerous unless
484 we're going to re-assign all bus numbers. */
485 if (!pcibios_assign_all_busses())
486 return;
487
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700488 while (parent->parent && parent->subordinate < max) {
489 parent->subordinate = max;
490 pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS, max);
491 parent = parent->parent;
492 }
493}
494
Linus Torvalds1da177e2005-04-16 15:20:36 -0700495/*
496 * If it's a bridge, configure it and scan the bus behind it.
497 * For CardBus bridges, we don't scan behind as the devices will
498 * be handled by the bridge driver itself.
499 *
500 * We need to process bridges in two passes -- first we scan those
501 * already configured by the BIOS and after we are done with all of
502 * them, we proceed to assigning numbers to the remaining buses in
503 * order to avoid overlaps between old and new bus numbers.
504 */
Sam Ravnborg0ab2b572008-02-17 10:45:28 +0100505int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700506{
507 struct pci_bus *child;
508 int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
Dominik Brodowski49887942005-12-08 16:53:12 +0100509 u32 buses, i, j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510 u16 bctl;
511
512 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
513
514 pr_debug("PCI: Scanning behind PCI bridge %s, config %06x, pass %d\n",
515 pci_name(dev), buses & 0xffffff, pass);
516
517 /* Disable MasterAbortMode during probing to avoid reporting
518 of bus errors (in some architectures) */
519 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bctl);
520 pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
521 bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
522
Linus Torvalds1da177e2005-04-16 15:20:36 -0700523 if ((buses & 0xffff00) && !pcibios_assign_all_busses() && !is_cardbus) {
524 unsigned int cmax, busnr;
525 /*
526 * Bus already configured by firmware, process it in the first
527 * pass and just note the configuration.
528 */
529 if (pass)
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000530 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531 busnr = (buses >> 8) & 0xFF;
532
533 /*
534 * If we already got to this bus through a different bridge,
535 * ignore it. This can happen with the i450NX chipset.
536 */
537 if (pci_find_bus(pci_domain_nr(bus), busnr)) {
538 printk(KERN_INFO "PCI: Bus %04x:%02x already known\n",
539 pci_domain_nr(bus), busnr);
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000540 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541 }
542
Rajesh Shah6ef6f0e2005-04-28 00:25:49 -0700543 child = pci_add_new_bus(bus, dev, busnr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700544 if (!child)
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000545 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700546 child->primary = buses & 0xFF;
547 child->subordinate = (buses >> 16) & 0xFF;
Gary Hade11949252007-10-08 16:24:16 -0700548 child->bridge_ctl = bctl;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549
550 cmax = pci_scan_child_bus(child);
551 if (cmax > max)
552 max = cmax;
553 if (child->subordinate > max)
554 max = child->subordinate;
555 } else {
556 /*
557 * We need to assign a number to this bus which we always
558 * do in the second pass.
559 */
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700560 if (!pass) {
561 if (pcibios_assign_all_busses())
562 /* Temporarily disable forwarding of the
563 configuration cycles on all bridges in
564 this bus segment to avoid possible
565 conflicts in the second pass between two
566 bridges programmed with overlapping
567 bus ranges. */
568 pci_write_config_dword(dev, PCI_PRIMARY_BUS,
569 buses & ~0xffffff);
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000570 goto out;
Ivan Kokshaysky12f44f42005-09-22 21:06:31 -0700571 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572
573 /* Clear errors */
574 pci_write_config_word(dev, PCI_STATUS, 0xffff);
575
Rajesh Shahcc574502005-04-28 00:25:47 -0700576 /* Prevent assigning a bus number that already exists.
577 * This can happen when a bridge is hot-plugged */
578 if (pci_find_bus(pci_domain_nr(bus), max+1))
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000579 goto out;
Rajesh Shah6ef6f0e2005-04-28 00:25:49 -0700580 child = pci_add_new_bus(bus, dev, ++max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700581 buses = (buses & 0xff000000)
582 | ((unsigned int)(child->primary) << 0)
583 | ((unsigned int)(child->secondary) << 8)
584 | ((unsigned int)(child->subordinate) << 16);
585
586 /*
587 * yenta.c forces a secondary latency timer of 176.
588 * Copy that behaviour here.
589 */
590 if (is_cardbus) {
591 buses &= ~0xff000000;
592 buses |= CARDBUS_LATENCY_TIMER << 24;
593 }
594
595 /*
596 * We need to blast all three values with a single write.
597 */
598 pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);
599
600 if (!is_cardbus) {
Gary Hade11949252007-10-08 16:24:16 -0700601 child->bridge_ctl = bctl;
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700602 /*
603 * Adjust subordinate busnr in parent buses.
604 * We do this before scanning for children because
605 * some devices may not be detected if the bios
606 * was lazy.
607 */
608 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700609 /* Now we can scan all subordinate buses... */
610 max = pci_scan_child_bus(child);
Kristen Accardie3ac86d2006-01-17 16:57:01 -0800611 /*
612 * now fix it up again since we have found
613 * the real value of max.
614 */
615 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700616 } else {
617 /*
618 * For CardBus bridges, we leave 4 bus numbers
619 * as cards with a PCI-to-PCI bridge can be
620 * inserted later.
621 */
Dominik Brodowski49887942005-12-08 16:53:12 +0100622 for (i=0; i<CARDBUS_RESERVE_BUSNR; i++) {
623 struct pci_bus *parent = bus;
Rajesh Shahcc574502005-04-28 00:25:47 -0700624 if (pci_find_bus(pci_domain_nr(bus),
625 max+i+1))
626 break;
Dominik Brodowski49887942005-12-08 16:53:12 +0100627 while (parent->parent) {
628 if ((!pcibios_assign_all_busses()) &&
629 (parent->subordinate > max) &&
630 (parent->subordinate <= max+i)) {
631 j = 1;
632 }
633 parent = parent->parent;
634 }
635 if (j) {
636 /*
637 * Often, there are two cardbus bridges
638 * -- try to leave one valid bus number
639 * for each one.
640 */
641 i /= 2;
642 break;
643 }
644 }
Rajesh Shahcc574502005-04-28 00:25:47 -0700645 max += i;
Greg Kroah-Hartman26f674a2005-06-02 15:41:48 -0700646 pci_fixup_parent_subordinate_busnr(child, max);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700647 }
648 /*
649 * Set the subordinate bus number to its real value.
650 */
651 child->subordinate = max;
652 pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
653 }
654
Gary Hadecb3576f2008-02-08 14:00:52 -0800655 sprintf(child->name,
656 (is_cardbus ? "PCI CardBus %04x:%02x" : "PCI Bus %04x:%02x"),
657 pci_domain_nr(bus), child->number);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700658
Bernhard Kaindld55bef52007-07-30 20:35:13 +0200659 /* Has only triggered on CardBus, fixup is in yenta_socket */
Dominik Brodowski49887942005-12-08 16:53:12 +0100660 while (bus->parent) {
661 if ((child->subordinate > bus->subordinate) ||
662 (child->number > bus->subordinate) ||
663 (child->number < bus->number) ||
664 (child->subordinate < bus->number)) {
Joe Perchesa6f29a92007-11-19 17:48:29 -0800665 pr_debug("PCI: Bus #%02x (-#%02x) is %s "
Bernhard Kaindld55bef52007-07-30 20:35:13 +0200666 "hidden behind%s bridge #%02x (-#%02x)\n",
667 child->number, child->subordinate,
668 (bus->number > child->subordinate &&
669 bus->subordinate < child->number) ?
Joe Perchesa6f29a92007-11-19 17:48:29 -0800670 "wholly" : "partially",
671 bus->self->transparent ? " transparent" : "",
Bernhard Kaindld55bef52007-07-30 20:35:13 +0200672 bus->number, bus->subordinate);
Dominik Brodowski49887942005-12-08 16:53:12 +0100673 }
674 bus = bus->parent;
675 }
676
Ralf Baechlebbe8f9a2006-02-14 16:23:57 +0000677out:
678 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);
679
Linus Torvalds1da177e2005-04-16 15:20:36 -0700680 return max;
681}
682
683/*
684 * Read interrupt line and base address registers.
685 * The architecture-dependent code can tweak these, of course.
686 */
687static void pci_read_irq(struct pci_dev *dev)
688{
689 unsigned char irq;
690
691 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq);
Kristen Accardiffeff782005-11-02 16:24:32 -0800692 dev->pin = irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700693 if (irq)
694 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
695 dev->irq = irq;
696}
697
Bartlomiej Zolnierkiewicz01abc2a2007-04-23 23:19:36 +0200698#define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
Randy Dunlap76e6a1d2006-12-29 16:47:29 -0800699
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700/**
701 * pci_setup_device - fill in class and map information of a device
702 * @dev: the device structure to fill
703 *
704 * Initialize the device structure with information about the device's
705 * vendor,class,memory and IO-space addresses,IRQ lines etc.
706 * Called at initialisation of the PCI subsystem and by CardBus services.
707 * Returns 0 on success and -1 if unknown type of device (not normal, bridge
708 * or CardBus).
709 */
710static int pci_setup_device(struct pci_dev * dev)
711{
712 u32 class;
713
714 sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(dev->bus),
715 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
716
717 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
Auke Kokb8a3a522007-06-08 15:46:30 -0700718 dev->revision = class & 0xff;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700719 class >>= 8; /* upper 3 bytes */
720 dev->class = class;
721 class >>= 8;
722
723 pr_debug("PCI: Found %s [%04x/%04x] %06x %02x\n", pci_name(dev),
724 dev->vendor, dev->device, class, dev->hdr_type);
725
726 /* "Unknown power state" */
Daniel Ritz3fe9d192005-08-17 15:32:19 -0700727 dev->current_state = PCI_UNKNOWN;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700728
729 /* Early fixups, before probing the BARs */
730 pci_fixup_device(pci_fixup_early, dev);
731 class = dev->class >> 8;
732
733 switch (dev->hdr_type) { /* header type */
734 case PCI_HEADER_TYPE_NORMAL: /* standard header */
735 if (class == PCI_CLASS_BRIDGE_PCI)
736 goto bad;
737 pci_read_irq(dev);
738 pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
739 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
740 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
Alan Cox368c73d2006-10-04 00:41:26 +0100741
742 /*
743 * Do the ugly legacy mode stuff here rather than broken chip
744 * quirk code. Legacy mode ATA controllers have fixed
745 * addresses. These are not always echoed in BAR0-3, and
746 * BAR0-3 in a few cases contain junk!
747 */
748 if (class == PCI_CLASS_STORAGE_IDE) {
749 u8 progif;
750 pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
751 if ((progif & 1) == 0) {
Linus Torvaldsaf1bff42007-12-10 07:40:54 -0800752 dev->resource[0].start = 0x1F0;
753 dev->resource[0].end = 0x1F7;
754 dev->resource[0].flags = LEGACY_IO_RESOURCE;
755 dev->resource[1].start = 0x3F6;
756 dev->resource[1].end = 0x3F6;
757 dev->resource[1].flags = LEGACY_IO_RESOURCE;
Alan Cox368c73d2006-10-04 00:41:26 +0100758 }
759 if ((progif & 4) == 0) {
Linus Torvaldsaf1bff42007-12-10 07:40:54 -0800760 dev->resource[2].start = 0x170;
761 dev->resource[2].end = 0x177;
762 dev->resource[2].flags = LEGACY_IO_RESOURCE;
763 dev->resource[3].start = 0x376;
764 dev->resource[3].end = 0x376;
765 dev->resource[3].flags = LEGACY_IO_RESOURCE;
Alan Cox368c73d2006-10-04 00:41:26 +0100766 }
767 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700768 break;
769
770 case PCI_HEADER_TYPE_BRIDGE: /* bridge header */
771 if (class != PCI_CLASS_BRIDGE_PCI)
772 goto bad;
773 /* The PCI-to-PCI bridge spec requires that subtractive
774 decoding (i.e. transparent) bridge must have programming
775 interface code of 0x01. */
Kristen Accardi3efd2732005-11-02 16:55:49 -0800776 pci_read_irq(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700777 dev->transparent = ((dev->class & 0xff) == 1);
778 pci_read_bases(dev, 2, PCI_ROM_ADDRESS1);
779 break;
780
781 case PCI_HEADER_TYPE_CARDBUS: /* CardBus bridge header */
782 if (class != PCI_CLASS_BRIDGE_CARDBUS)
783 goto bad;
784 pci_read_irq(dev);
785 pci_read_bases(dev, 1, 0);
786 pci_read_config_word(dev, PCI_CB_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
787 pci_read_config_word(dev, PCI_CB_SUBSYSTEM_ID, &dev->subsystem_device);
788 break;
789
790 default: /* unknown header */
791 printk(KERN_ERR "PCI: device %s has unknown header type %02x, ignoring.\n",
792 pci_name(dev), dev->hdr_type);
793 return -1;
794
795 bad:
796 printk(KERN_ERR "PCI: %s: class %x doesn't match header type %02x. Ignoring class.\n",
797 pci_name(dev), class, dev->hdr_type);
798 dev->class = PCI_CLASS_NOT_DEFINED;
799 }
800
801 /* We found a fine healthy device, go go go... */
802 return 0;
803}
804
805/**
806 * pci_release_dev - free a pci device structure when all users of it are finished.
807 * @dev: device that's been disconnected
808 *
809 * Will be called only by the device core when all users of this pci device are
810 * done.
811 */
812static void pci_release_dev(struct device *dev)
813{
814 struct pci_dev *pci_dev;
815
816 pci_dev = to_pci_dev(dev);
Ben Hutchings94e61082008-03-05 16:52:39 +0000817 pci_vpd_release(pci_dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700818 kfree(pci_dev);
819}
820
Keshavamurthy, Anil S994a65e2007-10-21 16:41:46 -0700821static void set_pcie_port_type(struct pci_dev *pdev)
822{
823 int pos;
824 u16 reg16;
825
826 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
827 if (!pos)
828 return;
829 pdev->is_pcie = 1;
830 pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
831 pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
832}
833
Linus Torvalds1da177e2005-04-16 15:20:36 -0700834/**
835 * pci_cfg_space_size - get the configuration space size of the PCI device.
Randy Dunlap8f7020d2005-10-23 11:57:38 -0700836 * @dev: PCI device
Linus Torvalds1da177e2005-04-16 15:20:36 -0700837 *
838 * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
839 * have 4096 bytes. Even if the device is capable, that doesn't mean we can
840 * access it. Maybe we don't have a way to generate extended config space
841 * accesses, or the device is behind a reverse Express bridge. So we try
842 * reading the dword at 0x100 which must either be 0 or a valid extended
843 * capability header.
844 */
Yinghai Lu57741a72008-02-15 01:32:50 -0800845int pci_cfg_space_size_ext(struct pci_dev *dev, unsigned check_exp_pcix)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700846{
847 int pos;
848 u32 status;
849
Yinghai Lu57741a72008-02-15 01:32:50 -0800850 if (!check_exp_pcix)
851 goto skip;
852
Linus Torvalds1da177e2005-04-16 15:20:36 -0700853 pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
854 if (!pos) {
855 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
856 if (!pos)
857 goto fail;
858
859 pci_read_config_dword(dev, pos + PCI_X_STATUS, &status);
860 if (!(status & (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ)))
861 goto fail;
862 }
863
Yinghai Lu57741a72008-02-15 01:32:50 -0800864 skip:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700865 if (pci_read_config_dword(dev, 256, &status) != PCIBIOS_SUCCESSFUL)
866 goto fail;
867 if (status == 0xffffffff)
868 goto fail;
869
870 return PCI_CFG_SPACE_EXP_SIZE;
871
872 fail:
873 return PCI_CFG_SPACE_SIZE;
874}
875
Yinghai Lu57741a72008-02-15 01:32:50 -0800876int pci_cfg_space_size(struct pci_dev *dev)
877{
878 return pci_cfg_space_size_ext(dev, 1);
879}
880
Linus Torvalds1da177e2005-04-16 15:20:36 -0700881static void pci_release_bus_bridge_dev(struct device *dev)
882{
883 kfree(dev);
884}
885
Michael Ellerman65891212007-04-05 17:19:08 +1000886struct pci_dev *alloc_pci_dev(void)
887{
888 struct pci_dev *dev;
889
890 dev = kzalloc(sizeof(struct pci_dev), GFP_KERNEL);
891 if (!dev)
892 return NULL;
893
Michael Ellerman65891212007-04-05 17:19:08 +1000894 INIT_LIST_HEAD(&dev->bus_list);
895
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000896 pci_msi_init_pci_dev(dev);
897
Michael Ellerman65891212007-04-05 17:19:08 +1000898 return dev;
899}
900EXPORT_SYMBOL(alloc_pci_dev);
901
Linus Torvalds1da177e2005-04-16 15:20:36 -0700902/*
903 * Read the config data for a PCI device, sanity-check it
904 * and fill in the dev structure...
905 */
Adrian Bunk7f7b5de2008-04-18 13:53:55 -0700906static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700907{
908 struct pci_dev *dev;
909 u32 l;
910 u8 hdr_type;
911 int delay = 1;
912
913 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l))
914 return NULL;
915
916 /* some broken boards return 0 or ~0 if a slot is empty: */
917 if (l == 0xffffffff || l == 0x00000000 ||
918 l == 0x0000ffff || l == 0xffff0000)
919 return NULL;
920
921 /* Configuration request Retry Status */
922 while (l == 0xffff0001) {
923 msleep(delay);
924 delay *= 2;
925 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l))
926 return NULL;
927 /* Card hasn't responded in 60 seconds? Must be stuck. */
928 if (delay > 60 * 1000) {
929 printk(KERN_WARNING "Device %04x:%02x:%02x.%d not "
930 "responding\n", pci_domain_nr(bus),
931 bus->number, PCI_SLOT(devfn),
932 PCI_FUNC(devfn));
933 return NULL;
934 }
935 }
936
937 if (pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type))
938 return NULL;
939
Michael Ellermanbab41e92007-04-05 17:19:09 +1000940 dev = alloc_pci_dev();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700941 if (!dev)
942 return NULL;
943
Linus Torvalds1da177e2005-04-16 15:20:36 -0700944 dev->bus = bus;
945 dev->sysdata = bus->sysdata;
946 dev->dev.parent = bus->bridge;
947 dev->dev.bus = &pci_bus_type;
948 dev->devfn = devfn;
949 dev->hdr_type = hdr_type & 0x7f;
950 dev->multifunction = !!(hdr_type & 0x80);
951 dev->vendor = l & 0xffff;
952 dev->device = (l >> 16) & 0xffff;
953 dev->cfg_size = pci_cfg_space_size(dev);
Linas Vepstas82081792006-07-10 04:44:46 -0700954 dev->error_state = pci_channel_io_normal;
Keshavamurthy, Anil S994a65e2007-10-21 16:41:46 -0700955 set_pcie_port_type(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700956
957 /* Assume 32-bit PCI; let 64-bit PCI cards (which are far rarer)
958 set this higher, assuming the system even supports it. */
959 dev->dma_mask = 0xffffffff;
960 if (pci_setup_device(dev) < 0) {
961 kfree(dev);
962 return NULL;
963 }
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +1000964
Ben Hutchings94e61082008-03-05 16:52:39 +0000965 pci_vpd_pci22_init(dev);
966
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +1000967 return dev;
968}
969
Sam Ravnborg96bde062007-03-26 21:53:30 -0800970void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +1000971{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700972 device_initialize(&dev->dev);
973 dev->dev.release = pci_release_dev;
974 pci_dev_get(dev);
975
Linus Torvalds1da177e2005-04-16 15:20:36 -0700976 dev->dev.dma_mask = &dev->dma_mask;
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -0800977 dev->dev.dma_parms = &dev->dma_parms;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700978 dev->dev.coherent_dma_mask = 0xffffffffull;
979
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -0800980 pci_set_dma_max_seg_size(dev, 65536);
FUJITA Tomonori59fc67d2008-02-04 22:28:14 -0800981 pci_set_dma_seg_boundary(dev, 0xffffffff);
FUJITA Tomonori4d57cdf2008-02-04 22:27:55 -0800982
Linus Torvalds1da177e2005-04-16 15:20:36 -0700983 /* Fix up broken headers */
984 pci_fixup_device(pci_fixup_header, dev);
985
986 /*
987 * Add the device to our list of discovered devices
988 * and the bus list for fixup functions, etc.
989 */
Zhang Yanmind71374d2006-06-02 12:35:43 +0800990 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700991 list_add_tail(&dev->bus_list, &bus->devices);
Zhang Yanmind71374d2006-06-02 12:35:43 +0800992 up_write(&pci_bus_sem);
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +1000993}
994
Sam Ravnborg451124a2008-02-02 22:33:43 +0100995struct pci_dev *__ref pci_scan_single_device(struct pci_bus *bus, int devfn)
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +1000996{
997 struct pci_dev *dev;
998
999 dev = pci_scan_device(bus, devfn);
1000 if (!dev)
1001 return NULL;
1002
1003 pci_device_add(dev, bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001004
1005 return dev;
1006}
Adrian Bunkb73e9682007-11-21 15:07:11 -08001007EXPORT_SYMBOL(pci_scan_single_device);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001008
1009/**
1010 * pci_scan_slot - scan a PCI slot on a bus for devices.
1011 * @bus: PCI bus to scan
1012 * @devfn: slot number to scan (must have zero function.)
1013 *
1014 * Scan a PCI slot on the specified PCI bus for devices, adding
1015 * discovered devices to the @bus->devices list. New devices
Greg Kroah-Hartman8a1bc902008-02-14 14:56:56 -08001016 * will not have is_added set.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001017 */
Sam Ravnborg96bde062007-03-26 21:53:30 -08001018int pci_scan_slot(struct pci_bus *bus, int devfn)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001019{
1020 int func, nr = 0;
1021 int scan_all_fns;
1022
1023 scan_all_fns = pcibios_scan_all_fns(bus, devfn);
1024
1025 for (func = 0; func < 8; func++, devfn++) {
1026 struct pci_dev *dev;
1027
1028 dev = pci_scan_single_device(bus, devfn);
1029 if (dev) {
1030 nr++;
1031
1032 /*
1033 * If this is a single function device,
1034 * don't scan past the first function.
1035 */
1036 if (!dev->multifunction) {
1037 if (func > 0) {
1038 dev->multifunction = 1;
1039 } else {
1040 break;
1041 }
1042 }
1043 } else {
1044 if (func == 0 && !scan_all_fns)
1045 break;
1046 }
1047 }
Shaohua Li7d715a62008-02-25 09:46:41 +08001048
1049 if (bus->self)
1050 pcie_aspm_init_link_state(bus->self);
1051
Linus Torvalds1da177e2005-04-16 15:20:36 -07001052 return nr;
1053}
1054
Sam Ravnborg0ab2b572008-02-17 10:45:28 +01001055unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001056{
1057 unsigned int devfn, pass, max = bus->secondary;
1058 struct pci_dev *dev;
1059
1060 pr_debug("PCI: Scanning bus %04x:%02x\n", pci_domain_nr(bus), bus->number);
1061
1062 /* Go find them, Rover! */
1063 for (devfn = 0; devfn < 0x100; devfn += 8)
1064 pci_scan_slot(bus, devfn);
1065
1066 /*
1067 * After performing arch-dependent fixup of the bus, look behind
1068 * all PCI-to-PCI bridges on this bus.
1069 */
1070 pr_debug("PCI: Fixups for bus %04x:%02x\n", pci_domain_nr(bus), bus->number);
1071 pcibios_fixup_bus(bus);
1072 for (pass=0; pass < 2; pass++)
1073 list_for_each_entry(dev, &bus->devices, bus_list) {
1074 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
1075 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
1076 max = pci_scan_bridge(bus, dev, max, pass);
1077 }
1078
1079 /*
1080 * We've scanned the bus and so we know all about what's on
1081 * the other side of any bridges that may be on this bus plus
1082 * any devices.
1083 *
1084 * Return how far we've got finding sub-buses.
1085 */
1086 pr_debug("PCI: Bus scan for %04x:%02x returning with max=%02x\n",
1087 pci_domain_nr(bus), bus->number, max);
1088 return max;
1089}
1090
Yinghai Lu30a18d62008-02-19 03:21:20 -08001091void __attribute__((weak)) set_pci_bus_resources_arch_default(struct pci_bus *b)
1092{
1093}
1094
Sam Ravnborg96bde062007-03-26 21:53:30 -08001095struct pci_bus * pci_create_bus(struct device *parent,
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001096 int bus, struct pci_ops *ops, void *sysdata)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001097{
1098 int error;
1099 struct pci_bus *b;
1100 struct device *dev;
1101
1102 b = pci_alloc_bus();
1103 if (!b)
1104 return NULL;
1105
1106 dev = kmalloc(sizeof(*dev), GFP_KERNEL);
1107 if (!dev){
1108 kfree(b);
1109 return NULL;
1110 }
1111
1112 b->sysdata = sysdata;
1113 b->ops = ops;
1114
1115 if (pci_find_bus(pci_domain_nr(b), bus)) {
1116 /* If we already got to this bus through a different bridge, ignore it */
1117 pr_debug("PCI: Bus %04x:%02x already known\n", pci_domain_nr(b), bus);
1118 goto err_out;
1119 }
Zhang Yanmind71374d2006-06-02 12:35:43 +08001120
1121 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001122 list_add_tail(&b->node, &pci_root_buses);
Zhang Yanmind71374d2006-06-02 12:35:43 +08001123 up_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001124
1125 memset(dev, 0, sizeof(*dev));
1126 dev->parent = parent;
1127 dev->release = pci_release_bus_bridge_dev;
1128 sprintf(dev->bus_id, "pci%04x:%02x", pci_domain_nr(b), bus);
1129 error = device_register(dev);
1130 if (error)
1131 goto dev_reg_err;
1132 b->bridge = get_device(dev);
1133
Yinghai Lu0d358f22008-02-19 03:20:41 -08001134 if (!parent)
1135 set_dev_node(b->bridge, pcibus_to_node(b));
1136
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001137 b->dev.class = &pcibus_class;
1138 b->dev.parent = b->bridge;
1139 sprintf(b->dev.bus_id, "%04x:%02x", pci_domain_nr(b), bus);
1140 error = device_register(&b->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001141 if (error)
1142 goto class_dev_reg_err;
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001143 error = device_create_file(&b->dev, &dev_attr_cpuaffinity);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001144 if (error)
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001145 goto dev_create_file_err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001146
1147 /* Create legacy_io and legacy_mem files for this bus */
1148 pci_create_legacy_files(b);
1149
Linus Torvalds1da177e2005-04-16 15:20:36 -07001150 b->number = b->secondary = bus;
1151 b->resource[0] = &ioport_resource;
1152 b->resource[1] = &iomem_resource;
1153
Yinghai Lu30a18d62008-02-19 03:21:20 -08001154 set_pci_bus_resources_arch_default(b);
1155
Linus Torvalds1da177e2005-04-16 15:20:36 -07001156 return b;
1157
Greg Kroah-Hartmanfd7d1ce2007-05-22 22:47:54 -04001158dev_create_file_err:
1159 device_unregister(&b->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001160class_dev_reg_err:
1161 device_unregister(dev);
1162dev_reg_err:
Zhang Yanmind71374d2006-06-02 12:35:43 +08001163 down_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001164 list_del(&b->node);
Zhang Yanmind71374d2006-06-02 12:35:43 +08001165 up_write(&pci_bus_sem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001166err_out:
1167 kfree(dev);
1168 kfree(b);
1169 return NULL;
1170}
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001171
Sam Ravnborg0ab2b572008-02-17 10:45:28 +01001172struct pci_bus * __devinit pci_scan_bus_parented(struct device *parent,
Paul Mackerrascdb9b9f2005-09-06 09:31:03 +10001173 int bus, struct pci_ops *ops, void *sysdata)
1174{
1175 struct pci_bus *b;
1176
1177 b = pci_create_bus(parent, bus, ops, sysdata);
1178 if (b)
1179 b->subordinate = pci_scan_child_bus(b);
1180 return b;
1181}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001182EXPORT_SYMBOL(pci_scan_bus_parented);
1183
1184#ifdef CONFIG_HOTPLUG
1185EXPORT_SYMBOL(pci_add_new_bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001186EXPORT_SYMBOL(pci_scan_slot);
1187EXPORT_SYMBOL(pci_scan_bridge);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001188EXPORT_SYMBOL_GPL(pci_scan_child_bus);
1189#endif
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001190
1191static int __init pci_sort_bf_cmp(const struct pci_dev *a, const struct pci_dev *b)
1192{
1193 if (pci_domain_nr(a->bus) < pci_domain_nr(b->bus)) return -1;
1194 else if (pci_domain_nr(a->bus) > pci_domain_nr(b->bus)) return 1;
1195
1196 if (a->bus->number < b->bus->number) return -1;
1197 else if (a->bus->number > b->bus->number) return 1;
1198
1199 if (a->devfn < b->devfn) return -1;
1200 else if (a->devfn > b->devfn) return 1;
1201
1202 return 0;
1203}
1204
1205/*
1206 * Yes, this forcably breaks the klist abstraction temporarily. It
1207 * just wants to sort the klist, not change reference counts and
1208 * take/drop locks rapidly in the process. It does all this while
1209 * holding the lock for the list, so objects can't otherwise be
1210 * added/removed while we're swizzling.
1211 */
1212static void __init pci_insertion_sort_klist(struct pci_dev *a, struct list_head *list)
1213{
1214 struct list_head *pos;
1215 struct klist_node *n;
1216 struct device *dev;
1217 struct pci_dev *b;
1218
1219 list_for_each(pos, list) {
1220 n = container_of(pos, struct klist_node, n_node);
1221 dev = container_of(n, struct device, knode_bus);
1222 b = to_pci_dev(dev);
1223 if (pci_sort_bf_cmp(a, b) <= 0) {
1224 list_move_tail(&a->dev.knode_bus.n_node, &b->dev.knode_bus.n_node);
1225 return;
1226 }
1227 }
1228 list_move_tail(&a->dev.knode_bus.n_node, list);
1229}
1230
Greg Kroah-Hartman5ff580c2008-02-14 14:56:56 -08001231void __init pci_sort_breadthfirst(void)
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001232{
1233 LIST_HEAD(sorted_devices);
1234 struct list_head *pos, *tmp;
1235 struct klist_node *n;
1236 struct device *dev;
1237 struct pci_dev *pdev;
Greg Kroah-Hartmanb2490722007-11-01 19:41:16 -07001238 struct klist *device_klist;
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001239
Greg Kroah-Hartmanb2490722007-11-01 19:41:16 -07001240 device_klist = bus_get_device_klist(&pci_bus_type);
1241
1242 spin_lock(&device_klist->k_lock);
1243 list_for_each_safe(pos, tmp, &device_klist->k_list) {
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001244 n = container_of(pos, struct klist_node, n_node);
1245 dev = container_of(n, struct device, knode_bus);
1246 pdev = to_pci_dev(dev);
1247 pci_insertion_sort_klist(pdev, &sorted_devices);
1248 }
Greg Kroah-Hartmanb2490722007-11-01 19:41:16 -07001249 list_splice(&sorted_devices, &device_klist->k_list);
1250 spin_unlock(&device_klist->k_lock);
Matt Domsch6b4b78f2006-09-29 15:23:23 -05001251}