blob: bed39ed976133628be7755cc0e63f395628637dc [file] [log] [blame]
Catalin Marinas8ad68bb2005-10-31 14:25:02 +00001/*
2 * linux/arch/arm/mach-realview/realview_eb.c
3 *
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000022#include <linux/init.h>
Russell King1be72282005-10-31 16:57:06 +000023#include <linux/platform_device.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000024#include <linux/sysdev.h>
Russell Kinga62c80e2006-01-07 13:52:45 +000025#include <linux/amba/bus.h>
Russell Kingfced80c2008-09-06 12:10:45 +010026#include <linux/io.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000027
Russell Kinga09e64f2008-08-05 16:14:15 +010028#include <mach/hardware.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000029#include <asm/irq.h>
30#include <asm/leds.h>
31#include <asm/mach-types.h>
32#include <asm/hardware/gic.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000033#include <asm/hardware/icst307.h>
Catalin Marinas7770bdd2007-02-05 14:48:24 +010034#include <asm/hardware/cache-l2x0.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000035
36#include <asm/mach/arch.h>
37#include <asm/mach/map.h>
38#include <asm/mach/mmc.h>
Catalin Marinas8cc4c542008-02-04 17:43:02 +010039#include <asm/mach/time.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000040
Russell Kinga09e64f2008-08-05 16:14:15 +010041#include <mach/board-eb.h>
42#include <mach/irqs.h>
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000043
44#include "core.h"
45#include "clock.h"
46
47static struct map_desc realview_eb_io_desc[] __initdata = {
Russell King1ffedce2005-11-02 14:14:37 +000048 {
49 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
50 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
51 .length = SZ_4K,
52 .type = MT_DEVICE,
53 }, {
Catalin Marinas073b6ff2008-04-18 22:43:09 +010054 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
55 .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000056 .length = SZ_4K,
57 .type = MT_DEVICE,
58 }, {
Catalin Marinas073b6ff2008-04-18 22:43:09 +010059 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
60 .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000061 .length = SZ_4K,
62 .type = MT_DEVICE,
63 }, {
64 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
65 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
66 .length = SZ_4K,
67 .type = MT_DEVICE,
68 }, {
Catalin Marinas80192732008-04-18 22:43:11 +010069 .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
70 .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000071 .length = SZ_4K,
72 .type = MT_DEVICE,
73 }, {
Catalin Marinas80192732008-04-18 22:43:11 +010074 .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
75 .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000076 .length = SZ_4K,
77 .type = MT_DEVICE,
78 },
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000079#ifdef CONFIG_DEBUG_LL
Russell King1ffedce2005-11-02 14:14:37 +000080 {
Catalin Marinas9a386f02008-04-18 22:43:11 +010081 .virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
82 .pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
Russell King1ffedce2005-11-02 14:14:37 +000083 .length = SZ_4K,
84 .type = MT_DEVICE,
85 }
Catalin Marinas8ad68bb2005-10-31 14:25:02 +000086#endif
87};
88
Catalin Marinas7dd19e72008-02-04 17:39:00 +010089static struct map_desc realview_eb11mp_io_desc[] __initdata = {
90 {
91 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
92 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
93 .length = SZ_4K,
94 .type = MT_DEVICE,
95 }, {
96 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
97 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
98 .length = SZ_4K,
99 .type = MT_DEVICE,
100 }, {
101 .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
102 .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
103 .length = SZ_8K,
104 .type = MT_DEVICE,
105 }
106};
107
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000108static void __init realview_eb_map_io(void)
109{
110 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
Jon Callan4c3ea372008-12-01 14:54:56 +0000111 if (core_tile_eb11mp() || core_tile_a9mp())
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100112 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000113}
114
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100115/*
116 * RealView EB AMBA devices
117 */
118
119/*
120 * These devices are connected via the core APB bridge
121 */
122#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
123#define GPIO2_DMA { 0, 0 }
124#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
125#define GPIO3_DMA { 0, 0 }
126
127#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
128#define AACI_DMA { 0x80, 0x81 }
129#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
130#define MMCI0_DMA { 0x84, 0 }
131#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
132#define KMI0_DMA { 0, 0 }
133#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
134#define KMI1_DMA { 0, 0 }
135
136/*
137 * These devices are connected directly to the multi-layer AHB switch
138 */
Catalin Marinas393538e2008-04-18 22:43:11 +0100139#define EB_SMC_IRQ { NO_IRQ, NO_IRQ }
140#define EB_SMC_DMA { 0, 0 }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100141#define MPMC_IRQ { NO_IRQ, NO_IRQ }
142#define MPMC_DMA { 0, 0 }
Catalin Marinas393538e2008-04-18 22:43:11 +0100143#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
144#define EB_CLCD_DMA { 0, 0 }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100145#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
146#define DMAC_DMA { 0, 0 }
147
148/*
149 * These devices are connected via the core APB bridge
150 */
151#define SCTL_IRQ { NO_IRQ, NO_IRQ }
152#define SCTL_DMA { 0, 0 }
Catalin Marinas393538e2008-04-18 22:43:11 +0100153#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
154#define EB_WATCHDOG_DMA { 0, 0 }
155#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
156#define EB_GPIO0_DMA { 0, 0 }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100157#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
158#define GPIO1_DMA { 0, 0 }
Catalin Marinas393538e2008-04-18 22:43:11 +0100159#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
160#define EB_RTC_DMA { 0, 0 }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100161
162/*
163 * These devices are connected via the DMA APB bridge
164 */
165#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
166#define SCI_DMA { 7, 6 }
Catalin Marinas9a386f02008-04-18 22:43:11 +0100167#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
168#define EB_UART0_DMA { 15, 14 }
169#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
170#define EB_UART1_DMA { 13, 12 }
171#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
172#define EB_UART2_DMA { 11, 10 }
173#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
174#define EB_UART3_DMA { 0x86, 0x87 }
Catalin Marinas393538e2008-04-18 22:43:11 +0100175#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
176#define EB_SSP_DMA { 9, 8 }
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100177
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000178/* FPGA Primecells */
179AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
180AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
181AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
182AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
Catalin Marinas9a386f02008-04-18 22:43:11 +0100183AMBA_DEVICE(uart3, "fpga:09", EB_UART3, NULL);
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000184
185/* DevChip Primecells */
Catalin Marinas393538e2008-04-18 22:43:11 +0100186AMBA_DEVICE(smc, "dev:00", EB_SMC, NULL);
187AMBA_DEVICE(clcd, "dev:20", EB_CLCD, &clcd_plat_data);
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000188AMBA_DEVICE(dmac, "dev:30", DMAC, NULL);
189AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
Catalin Marinas393538e2008-04-18 22:43:11 +0100190AMBA_DEVICE(wdog, "dev:e1", EB_WATCHDOG, NULL);
191AMBA_DEVICE(gpio0, "dev:e4", EB_GPIO0, NULL);
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000192AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
193AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
Catalin Marinas393538e2008-04-18 22:43:11 +0100194AMBA_DEVICE(rtc, "dev:e8", EB_RTC, NULL);
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000195AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
Catalin Marinas9a386f02008-04-18 22:43:11 +0100196AMBA_DEVICE(uart0, "dev:f1", EB_UART0, NULL);
197AMBA_DEVICE(uart1, "dev:f2", EB_UART1, NULL);
198AMBA_DEVICE(uart2, "dev:f3", EB_UART2, NULL);
Catalin Marinas393538e2008-04-18 22:43:11 +0100199AMBA_DEVICE(ssp0, "dev:f4", EB_SSP, NULL);
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000200
201static struct amba_device *amba_devs[] __initdata = {
202 &dmac_device,
203 &uart0_device,
204 &uart1_device,
205 &uart2_device,
206 &uart3_device,
207 &smc_device,
208 &clcd_device,
209 &sctl_device,
210 &wdog_device,
211 &gpio0_device,
212 &gpio1_device,
213 &gpio2_device,
214 &rtc_device,
215 &sci0_device,
216 &ssp0_device,
217 &aaci_device,
218 &mmc0_device,
219 &kmi0_device,
220 &kmi1_device,
221};
222
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100223/*
224 * RealView EB platform devices
225 */
Catalin Marinasa44ddfd2008-04-18 22:43:10 +0100226static struct resource realview_eb_flash_resource = {
227 .start = REALVIEW_EB_FLASH_BASE,
228 .end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
229 .flags = IORESOURCE_MEM,
230};
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100231
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100232static struct resource realview_eb_eth_resources[] = {
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100233 [0] = {
Catalin Marinas393538e2008-04-18 22:43:11 +0100234 .start = REALVIEW_EB_ETH_BASE,
235 .end = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100236 .flags = IORESOURCE_MEM,
237 },
238 [1] = {
239 .start = IRQ_EB_ETH,
240 .end = IRQ_EB_ETH,
241 .flags = IORESOURCE_IRQ,
242 },
243};
244
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100245/*
246 * Detect and register the correct Ethernet device. RealView/EB rev D
247 * platforms use the newer SMSC LAN9118 Ethernet chip
248 */
249static int eth_device_register(void)
250{
Catalin Marinas393538e2008-04-18 22:43:11 +0100251 void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
Catalin Marinas0a381332008-12-01 14:54:58 +0000252 const char *name = NULL;
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100253 u32 idrev;
254
255 if (!eth_addr)
256 return -ENOMEM;
257
258 idrev = readl(eth_addr + 0x50);
Catalin Marinas0a381332008-12-01 14:54:58 +0000259 if ((idrev & 0xFFFF0000) != 0x01180000)
260 /* SMSC LAN9118 not present, use LAN91C111 instead */
261 name = "smc91x";
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100262
263 iounmap(eth_addr);
Catalin Marinas0a381332008-12-01 14:54:58 +0000264 return realview_eth_register(name, realview_eb_eth_resources);
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100265}
266
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000267static void __init gic_init_irq(void)
268{
Jon Callan4c3ea372008-12-01 14:54:56 +0000269 if (core_tile_eb11mp() || core_tile_a9mp()) {
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100270 unsigned int pldctrl;
271
272 /* new irq mode */
273 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
274 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
275 pldctrl |= 0x00800000;
276 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
277 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
278
279 /* core tile GIC, primary */
Catalin Marinasc4057f52008-02-04 17:41:01 +0100280 gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE);
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100281 gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
Catalin Marinasc4057f52008-02-04 17:41:01 +0100282 gic_cpu_init(0, gic_cpu_base_addr);
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100283
Catalin Marinas41579f42008-02-04 17:47:04 +0100284#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100285 /* board GIC, secondary */
Catalin Marinas073b6ff2008-04-18 22:43:09 +0100286 gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64);
287 gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE));
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100288 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
Russell King9b1283b2005-11-07 21:01:06 +0000289#endif
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100290 } else {
291 /* board GIC, primary */
Catalin Marinas073b6ff2008-04-18 22:43:09 +0100292 gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE);
293 gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29);
Catalin Marinasc4057f52008-02-04 17:41:01 +0100294 gic_cpu_init(0, gic_cpu_base_addr);
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100295 }
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000296}
297
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100298/*
299 * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
300 */
301static void realview_eb11mp_fixup(void)
302{
303 /* AMBA devices */
304 dmac_device.irq[0] = IRQ_EB11MP_DMA;
305 uart0_device.irq[0] = IRQ_EB11MP_UART0;
306 uart1_device.irq[0] = IRQ_EB11MP_UART1;
307 uart2_device.irq[0] = IRQ_EB11MP_UART2;
308 uart3_device.irq[0] = IRQ_EB11MP_UART3;
309 clcd_device.irq[0] = IRQ_EB11MP_CLCD;
310 wdog_device.irq[0] = IRQ_EB11MP_WDOG;
311 gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
312 gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
313 gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
314 rtc_device.irq[0] = IRQ_EB11MP_RTC;
315 sci0_device.irq[0] = IRQ_EB11MP_SCI;
316 ssp0_device.irq[0] = IRQ_EB11MP_SSP;
317 aaci_device.irq[0] = IRQ_EB11MP_AACI;
318 mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
319 mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
320 kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
321 kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
322
323 /* platform devices */
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100324 realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH;
325 realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH;
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100326}
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100327
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100328static void __init realview_eb_timer_init(void)
329{
330 unsigned int timer_irq;
331
Catalin Marinas80192732008-04-18 22:43:11 +0100332 timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
333 timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
334 timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
335 timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
336
Jon Callan4c3ea372008-12-01 14:54:56 +0000337 if (core_tile_eb11mp() || core_tile_a9mp()) {
Catalin Marinas39e823e2008-02-04 17:45:03 +0100338#ifdef CONFIG_LOCAL_TIMERS
Catalin Marinasebac6542008-12-01 14:54:57 +0000339 twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
Catalin Marinas39e823e2008-02-04 17:45:03 +0100340#endif
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100341 timer_irq = IRQ_EB11MP_TIMER0_1;
Catalin Marinas39e823e2008-02-04 17:45:03 +0100342 } else
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100343 timer_irq = IRQ_EB_TIMER0_1;
344
345 realview_timer_init(timer_irq);
346}
347
348static struct sys_timer realview_eb_timer = {
349 .init = realview_eb_timer_init,
350};
351
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000352static void __init realview_eb_init(void)
353{
354 int i;
355
Jon Callan4c3ea372008-12-01 14:54:56 +0000356 if (core_tile_eb11mp() || core_tile_a9mp()) {
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100357 realview_eb11mp_fixup();
Catalin Marinas0fc2a162008-02-04 17:36:59 +0100358
Catalin Marinasba927952008-04-18 22:43:17 +0100359#ifdef CONFIG_CACHE_L2X0
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100360 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
361 * Bits: .... ...0 0111 1001 0000 .... .... .... */
362 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
Catalin Marinasba927952008-04-18 22:43:17 +0100363#endif
Catalin Marinas7dd19e72008-02-04 17:39:00 +0100364 }
365
Catalin Marinasa44ddfd2008-04-18 22:43:10 +0100366 realview_flash_register(&realview_eb_flash_resource, 1);
Russell King6b65cd72006-12-10 21:21:32 +0100367 platform_device_register(&realview_i2c_device);
Catalin Marinasbe4f3c82008-04-18 22:43:09 +0100368 eth_device_register();
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000369
370 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
371 struct amba_device *d = amba_devs[i];
372 amba_device_register(d, &iomem_resource);
373 }
374
375#ifdef CONFIG_LEDS
376 leds_event = realview_leds_event;
377#endif
378}
379
380MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
381 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
Catalin Marinas9a386f02008-04-18 22:43:11 +0100382 .phys_io = REALVIEW_EB_UART0_BASE,
383 .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc,
Catalin Marinas70bb62f2008-12-01 14:54:55 +0000384 .boot_params = PHYS_OFFSET + 0x00000100,
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000385 .map_io = realview_eb_map_io,
386 .init_irq = gic_init_irq,
Catalin Marinas8cc4c542008-02-04 17:43:02 +0100387 .timer = &realview_eb_timer,
Catalin Marinas8ad68bb2005-10-31 14:25:02 +0000388 .init_machine = realview_eb_init,
389MACHINE_END