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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * AGPGART
3 * Copyright (C) 2004 Silicon Graphics, Inc.
4 * Copyright (C) 2002-2004 Dave Jones
5 * Copyright (C) 1999 Jeff Hartmann
6 * Copyright (C) 1999 Precision Insight, Inc.
7 * Copyright (C) 1999 Xi Graphics, Inc.
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included
17 * in all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
Dave Jones6a92a4e2006-02-28 00:54:25 -050022 * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
23 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
Linus Torvalds1da177e2005-04-16 15:20:36 -070025 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 */
28
29#ifndef _AGP_BACKEND_PRIV_H
30#define _AGP_BACKEND_PRIV_H 1
31
32#include <asm/agp.h> /* for flush_agp_cache() */
33
34#define PFX "agpgart: "
35
36//#define AGP_DEBUG 1
37#ifdef AGP_DEBUG
38#define DBG(x,y...) printk (KERN_DEBUG PFX "%s: " x "\n", __FUNCTION__ , ## y)
39#else
40#define DBG(x,y...) do { } while (0)
41#endif
42
43extern struct agp_bridge_data *agp_bridge;
44
45enum aper_size_type {
46 U8_APER_SIZE,
47 U16_APER_SIZE,
48 U32_APER_SIZE,
49 LVL2_APER_SIZE,
50 FIXED_APER_SIZE
51};
52
53struct gatt_mask {
54 unsigned long mask;
55 u32 type;
Dave Jones6a92a4e2006-02-28 00:54:25 -050056 /* totally device specific, for integrated chipsets that
Linus Torvalds1da177e2005-04-16 15:20:36 -070057 * might have different types of memory masks. For other
58 * devices this will probably be ignored */
59};
60
Dave Airliea2721e92007-10-15 10:19:16 +100061#define AGP_PAGE_DESTROY_UNMAP 1
62#define AGP_PAGE_DESTROY_FREE 2
63
Linus Torvalds1da177e2005-04-16 15:20:36 -070064struct aper_size_info_8 {
65 int size;
66 int num_entries;
67 int page_order;
68 u8 size_value;
69};
70
71struct aper_size_info_16 {
72 int size;
73 int num_entries;
74 int page_order;
75 u16 size_value;
76};
77
78struct aper_size_info_32 {
79 int size;
80 int num_entries;
81 int page_order;
82 u32 size_value;
83};
84
85struct aper_size_info_lvl2 {
86 int size;
87 int num_entries;
88 u32 size_value;
89};
90
91struct aper_size_info_fixed {
92 int size;
93 int num_entries;
94 int page_order;
95};
96
97struct agp_bridge_driver {
98 struct module *owner;
Dave Jonese5524f32007-02-22 18:41:28 -050099 const void *aperture_sizes;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100 int num_aperture_sizes;
101 enum aper_size_type size_type;
102 int cant_use_aperture;
103 int needs_scratch_page;
Dave Jonese5524f32007-02-22 18:41:28 -0500104 const struct gatt_mask *masks;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105 int (*fetch_size)(void);
106 int (*configure)(void);
107 void (*agp_enable)(struct agp_bridge_data *, u32);
108 void (*cleanup)(void);
109 void (*tlb_flush)(struct agp_memory *);
Dave Jones6a92a4e2006-02-28 00:54:25 -0500110 unsigned long (*mask_memory)(struct agp_bridge_data *, unsigned long, int);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111 void (*cache_flush)(void);
112 int (*create_gatt_table)(struct agp_bridge_data *);
113 int (*free_gatt_table)(struct agp_bridge_data *);
114 int (*insert_memory)(struct agp_memory *, off_t, int);
115 int (*remove_memory)(struct agp_memory *, off_t, int);
116 struct agp_memory *(*alloc_by_type) (size_t, int);
117 void (*free_by_type)(struct agp_memory *);
118 void *(*agp_alloc_page)(struct agp_bridge_data *);
Dave Airliea2721e92007-10-15 10:19:16 +1000119 void (*agp_destroy_page)(void *, int flags);
Dave Airliea13af4b2007-10-29 15:14:03 +1000120 int (*agp_type_to_mask_type) (struct agp_bridge_data *, int);
121 void (*chipset_flush)(struct agp_bridge_data *);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700122};
123
124struct agp_bridge_data {
Alexey Dobriyan8eb79252006-08-20 18:48:13 +0400125 const struct agp_version *version;
Dave Jonese5524f32007-02-22 18:41:28 -0500126 const struct agp_bridge_driver *driver;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127 struct vm_operations_struct *vm_ops;
128 void *previous_size;
129 void *current_size;
130 void *dev_private_data;
131 struct pci_dev *dev;
132 u32 __iomem *gatt_table;
133 u32 *gatt_table_real;
134 unsigned long scratch_page;
135 unsigned long scratch_page_real;
136 unsigned long gart_bus_addr;
137 unsigned long gatt_bus_addr;
138 u32 mode;
139 enum chipset_type type;
140 unsigned long *key_list;
141 atomic_t current_memory_agp;
142 atomic_t agp_in_use;
143 int max_memory_agp; /* in number of pages */
144 int aperture_size_idx;
145 int capndx;
146 int flags;
147 char major_version;
148 char minor_version;
149 struct list_head list;
Matthew Garrettb0825482005-07-29 14:03:39 -0700150 u32 apbase_config;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151};
152
153#define KB(x) ((x) * 1024)
154#define MB(x) (KB (KB (x)))
155#define GB(x) (MB (KB (x)))
156
157#define A_SIZE_8(x) ((struct aper_size_info_8 *) x)
158#define A_SIZE_16(x) ((struct aper_size_info_16 *) x)
159#define A_SIZE_32(x) ((struct aper_size_info_32 *) x)
160#define A_SIZE_LVL2(x) ((struct aper_size_info_lvl2 *) x)
161#define A_SIZE_FIX(x) ((struct aper_size_info_fixed *) x)
162#define A_IDX8(bridge) (A_SIZE_8((bridge)->driver->aperture_sizes) + i)
163#define A_IDX16(bridge) (A_SIZE_16((bridge)->driver->aperture_sizes) + i)
164#define A_IDX32(bridge) (A_SIZE_32((bridge)->driver->aperture_sizes) + i)
165#define MAXKEY (4096 * 32)
166
167#define PGE_EMPTY(b, p) (!(p) || (p) == (unsigned long) (b)->scratch_page)
168
169
170/* Intel registers */
171#define INTEL_APSIZE 0xb4
172#define INTEL_ATTBASE 0xb8
173#define INTEL_AGPCTRL 0xb0
174#define INTEL_NBXCFG 0x50
175#define INTEL_ERRSTS 0x91
176
177/* Intel i830 registers */
178#define I830_GMCH_CTRL 0x52
179#define I830_GMCH_ENABLED 0x4
180#define I830_GMCH_MEM_MASK 0x1
181#define I830_GMCH_MEM_64M 0x1
182#define I830_GMCH_MEM_128M 0
Dave Airliee67aa272007-09-18 22:46:35 -0700183#define I830_GMCH_GMS_MASK 0x70
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184#define I830_GMCH_GMS_DISABLED 0x00
185#define I830_GMCH_GMS_LOCAL 0x10
186#define I830_GMCH_GMS_STOLEN_512 0x20
187#define I830_GMCH_GMS_STOLEN_1024 0x30
188#define I830_GMCH_GMS_STOLEN_8192 0x40
189#define I830_RDRAM_CHANNEL_TYPE 0x03010
190#define I830_RDRAM_ND(x) (((x) & 0x20) >> 5)
191#define I830_RDRAM_DDT(x) (((x) & 0x18) >> 3)
192
193/* This one is for I830MP w. an external graphic card */
194#define INTEL_I830_ERRSTS 0x92
195
196/* Intel 855GM/852GM registers */
Dave Airliee67aa272007-09-18 22:46:35 -0700197#define I855_GMCH_GMS_MASK 0xF0
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198#define I855_GMCH_GMS_STOLEN_0M 0x0
199#define I855_GMCH_GMS_STOLEN_1M (0x1 << 4)
200#define I855_GMCH_GMS_STOLEN_4M (0x2 << 4)
201#define I855_GMCH_GMS_STOLEN_8M (0x3 << 4)
202#define I855_GMCH_GMS_STOLEN_16M (0x4 << 4)
203#define I855_GMCH_GMS_STOLEN_32M (0x5 << 4)
204#define I85X_CAPID 0x44
205#define I85X_VARIANT_MASK 0x7
206#define I85X_VARIANT_SHIFT 5
207#define I855_GME 0x0
208#define I855_GM 0x4
209#define I852_GME 0x2
210#define I852_GM 0x5
211
212/* Intel i845 registers */
213#define INTEL_I845_AGPM 0x51
214#define INTEL_I845_ERRSTS 0xc8
215
216/* Intel i860 registers */
217#define INTEL_I860_MCHCFG 0x50
218#define INTEL_I860_ERRSTS 0xc8
219
220/* Intel i810 registers */
221#define I810_GMADDR 0x10
222#define I810_MMADDR 0x14
223#define I810_PTE_BASE 0x10000
224#define I810_PTE_MAIN_UNCACHED 0x00000000
225#define I810_PTE_LOCAL 0x00000002
226#define I810_PTE_VALID 0x00000001
Thomas Hellstroma030ce42007-01-23 10:33:43 +0100227#define I830_PTE_SYSTEM_CACHED 0x00000006
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228#define I810_SMRAM_MISCC 0x70
229#define I810_GFX_MEM_WIN_SIZE 0x00010000
230#define I810_GFX_MEM_WIN_32M 0x00010000
231#define I810_GMS 0x000000c0
232#define I810_GMS_DISABLE 0x00000000
233#define I810_PGETBL_CTL 0x2020
234#define I810_PGETBL_ENABLED 0x00000001
Eric Anholtc41e0de2006-12-19 12:57:24 -0800235#define I965_PGETBL_SIZE_MASK 0x0000000e
236#define I965_PGETBL_SIZE_512KB (0 << 1)
237#define I965_PGETBL_SIZE_256KB (1 << 1)
238#define I965_PGETBL_SIZE_128KB (2 << 1)
Zhenyu Wang4e8b6e22008-01-23 14:54:37 +1000239#define I965_PGETBL_SIZE_1MB (3 << 1)
240#define I965_PGETBL_SIZE_2MB (4 << 1)
241#define I965_PGETBL_SIZE_1_5MB (5 << 1)
Wang Zhenyu874808c62007-06-06 11:16:25 +0800242#define G33_PGETBL_SIZE_MASK (3 << 8)
243#define G33_PGETBL_SIZE_1M (1 << 8)
244#define G33_PGETBL_SIZE_2M (2 << 8)
245
Linus Torvalds1da177e2005-04-16 15:20:36 -0700246#define I810_DRAM_CTL 0x3000
247#define I810_DRAM_ROW_0 0x00000001
248#define I810_DRAM_ROW_0_SDRAM 0x00000001
249
250struct agp_device_ids {
251 unsigned short device_id; /* first, to make table easier to read */
252 enum chipset_type chipset;
253 const char *chipset_name;
254 int (*chipset_setup) (struct pci_dev *pdev); /* used to override generic */
255};
256
257/* Driver registration */
258struct agp_bridge_data *agp_alloc_bridge(void);
259void agp_put_bridge(struct agp_bridge_data *bridge);
260int agp_add_bridge(struct agp_bridge_data *bridge);
261void agp_remove_bridge(struct agp_bridge_data *bridge);
262
263/* Frontend routines. */
264int agp_frontend_initialize(void);
265void agp_frontend_cleanup(void);
266
267/* Generic routines. */
268void agp_generic_enable(struct agp_bridge_data *bridge, u32 mode);
269int agp_generic_create_gatt_table(struct agp_bridge_data *bridge);
270int agp_generic_free_gatt_table(struct agp_bridge_data *bridge);
271struct agp_memory *agp_create_memory(int scratch_pages);
272int agp_generic_insert_memory(struct agp_memory *mem, off_t pg_start, int type);
273int agp_generic_remove_memory(struct agp_memory *mem, off_t pg_start, int type);
274struct agp_memory *agp_generic_alloc_by_type(size_t page_count, int type);
275void agp_generic_free_by_type(struct agp_memory *curr);
276void *agp_generic_alloc_page(struct agp_bridge_data *bridge);
Dave Airliea2721e92007-10-15 10:19:16 +1000277void agp_generic_destroy_page(void *addr, int flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278void agp_free_key(int key);
279int agp_num_entries(void);
280u32 agp_collect_device_status(struct agp_bridge_data *bridge, u32 mode, u32 command);
281void agp_device_command(u32 command, int agp_v3);
282int agp_3_5_enable(struct agp_bridge_data *bridge);
283void global_cache_flush(void);
284void get_agp_version(struct agp_bridge_data *bridge);
285unsigned long agp_generic_mask_memory(struct agp_bridge_data *bridge,
286 unsigned long addr, int type);
Thomas Hellstroma030ce42007-01-23 10:33:43 +0100287int agp_generic_type_to_mask_type(struct agp_bridge_data *bridge,
288 int type);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289struct agp_bridge_data *agp_generic_find_bridge(struct pci_dev *pdev);
290
Thomas Hellstroma030ce42007-01-23 10:33:43 +0100291/* generic functions for user-populated AGP memory types */
292struct agp_memory *agp_generic_alloc_user(size_t page_count, int type);
293void agp_alloc_page_array(size_t size, struct agp_memory *mem);
294void agp_free_page_array(struct agp_memory *mem);
295
296
Linus Torvalds1da177e2005-04-16 15:20:36 -0700297/* generic routines for agp>=3 */
298int agp3_generic_fetch_size(void);
299void agp3_generic_tlbflush(struct agp_memory *mem);
300int agp3_generic_configure(void);
301void agp3_generic_cleanup(void);
302
303/* aperture sizes have been standardised since v3 */
304#define AGP_GENERIC_SIZES_ENTRIES 11
Dave Jonese5524f32007-02-22 18:41:28 -0500305extern const struct aper_size_info_16 agp3_generic_sizes[];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700306
Keir Fraser07eee782005-03-30 13:17:04 -0800307#define virt_to_gart(x) (phys_to_gart(virt_to_phys(x)))
308#define gart_to_virt(x) (phys_to_virt(gart_to_phys(x)))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700309
310extern int agp_off;
311extern int agp_try_unsupported_boot;
312
Zwane Mwaikambo0316fe82007-01-29 21:20:31 -0800313long compat_agp_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
314
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315/* Chipset independant registers (from AGP Spec) */
316#define AGP_APBASE 0x10
317
318#define AGPSTAT 0x4
319#define AGPCMD 0x8
320#define AGPNISTAT 0xc
321#define AGPCTRL 0x10
322#define AGPAPSIZE 0x14
323#define AGPNEPG 0x16
324#define AGPGARTLO 0x18
325#define AGPGARTHI 0x1c
326#define AGPNICMD 0x20
327
328#define AGP_MAJOR_VERSION_SHIFT (20)
329#define AGP_MINOR_VERSION_SHIFT (16)
330
331#define AGPSTAT_RQ_DEPTH (0xff000000)
332#define AGPSTAT_RQ_DEPTH_SHIFT 24
333
334#define AGPSTAT_CAL_MASK (1<<12|1<<11|1<<10)
335#define AGPSTAT_ARQSZ (1<<15|1<<14|1<<13)
336#define AGPSTAT_ARQSZ_SHIFT 13
337
338#define AGPSTAT_SBA (1<<9)
339#define AGPSTAT_AGP_ENABLE (1<<8)
340#define AGPSTAT_FW (1<<4)
341#define AGPSTAT_MODE_3_0 (1<<3)
342
343#define AGPSTAT2_1X (1<<0)
344#define AGPSTAT2_2X (1<<1)
345#define AGPSTAT2_4X (1<<2)
346
347#define AGPSTAT3_RSVD (1<<2)
348#define AGPSTAT3_8X (1<<1)
349#define AGPSTAT3_4X (1)
350
351#define AGPCTRL_APERENB (1<<8)
352#define AGPCTRL_GTLBEN (1<<7)
353
354#define AGP2_RESERVED_MASK 0x00fffcc8
355#define AGP3_RESERVED_MASK 0x00ff00c4
356
357#define AGP_ERRATA_FASTWRITES 1<<0
358#define AGP_ERRATA_SBA 1<<1
359#define AGP_ERRATA_1X 1<<2
360
361#endif /* _AGP_BACKEND_PRIV_H */