Gitiles
Code Review Sign In
gerrit-public.fairphone.software / fp2-dev / kernel / msm / 41334e9d6638bae28028170f80fa6bbec5b038a8 / . / arch / arm / boot / dts / msm8226.dtsi
blob: 6235fb7940ce4b8a6f643b242e79ddb95d778a72 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]14
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]15/ {
16 model = "Qualcomm MSM 8226";
17 compatible = "qcom,msm8226";
18 interrupt-parent = <&intc>;
19
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]20 aliases {
21 spi0 = &spi_0;
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]22 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
23 sdhc2 = &sdhc_2; /* SDC2 SD card slot */
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]24 };
25
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]26 memory {
27 secure_mem: secure_region {
28 linux,contiguous-region;
Shalaj Jain5ce2fde2013-05-10 13:22:33 -0700[diff] [blame]29 reg = <0 0x6D00000>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]30 label = "secure_mem";
31 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]32
33 qsecom_mem: qsecom_region {
34 linux,contiguous-region;
35 reg = <0 0x780000>;
36 label = "qsecom_mem";
37 };
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]38 };
Laura Abbott429e82b2013-03-25 13:03:06 -0700[diff] [blame]39
Stepan Moskovchenko7d8cdcaa2013-04-25 17:10:55 -0700[diff] [blame]40 soc: soc { };
41};
42
43/include/ "msm8226-ion.dtsi"
44/include/ "msm8226-camera.dtsi"
45/include/ "msm-gdsc.dtsi"
46/include/ "msm8226-iommu.dtsi"
47/include/ "msm8226-pm.dtsi"
48/include/ "msm8226-smp2p.dtsi"
49/include/ "msm8226-gpu.dtsi"
50/include/ "msm8226-bus.dtsi"
51/include/ "msm8226-mdss.dtsi"
52/include/ "msm8226-coresight.dtsi"
53/include/ "msm8226-iommu-domains.dtsi"
54
55&soc {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges;
59
60 intc: interrupt-controller@f9000000 {
61 compatible = "qcom,msm-qgic2";
62 interrupt-controller;
63 #interrupt-cells = <3>;
64 reg = <0xF9000000 0x1000>,
65 <0xF9002000 0x1000>;
66 };
67
68 msmgpio: gpio@fd510000 {
69 compatible = "qcom,msm-gpio";
70 interrupt-controller;
71 #interrupt-cells = <2>;
72 reg = <0xfd510000 0x4000>;
73 gpio-controller;
74 #gpio-cells = <2>;
75 ngpio = <117>;
76 interrupts = <0 208 0>;
77 qcom,direct-connect-irqs = <8>;
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]78 };
79
Abhimanyu Kapur58d303a72013-04-30 16:13:41 -0700[diff] [blame]80 qcom,mpm2-sleep-counter@fc4a3000 {
81 compatible = "qcom,mpm2-sleep-counter";
82 reg = <0xfc4a3000 0x1000>;
83 clock-frequency = <32768>;
84 };
85
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]86 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]87 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]88 interrupts = <1 2 0 1 3 0>;
89 clock-frequency = <19200000>;
90 };
91
Stephen Boyd72759f62013-04-10 14:20:27 -0700[diff] [blame]92 timer@f9020000 {
93 #address-cells = <1>;
94 #size-cells = <1>;
95 ranges;
96 compatible = "arm,armv7-timer-mem";
97 reg = <0xf9020000 0x1000>;
98 clock-frequency = <19200000>;
99
100 frame@f9021000 {
101 frame-number = <0>;
102 interrupts = <0 8 0x4>,
103 <0 7 0x4>;
104 reg = <0xf9021000 0x1000>,
105 <0xf9022000 0x1000>;
106 };
107
108 frame@f9023000 {
109 frame-number = <1>;
110 interrupts = <0 9 0x4>;
111 reg = <0xf9023000 0x1000>;
112 status = "disabled";
113 };
114
115 frame@f9024000 {
116 frame-number = <2>;
117 interrupts = <0 10 0x4>;
118 reg = <0xf9024000 0x1000>;
119 status = "disabled";
120 };
121
122 frame@f9025000 {
123 frame-number = <3>;
124 interrupts = <0 11 0x4>;
125 reg = <0xf9025000 0x1000>;
126 status = "disabled";
127 };
128
129 frame@f9026000 {
130 frame-number = <4>;
131 interrupts = <0 12 0x4>;
132 reg = <0xf9026000 0x1000>;
133 status = "disabled";
134 };
135
136 frame@f9027000 {
137 frame-number = <5>;
138 interrupts = <0 13 0x4>;
139 reg = <0xf9027000 0x1000>;
140 status = "disabled";
141 };
142
143 frame@f9028000 {
144 frame-number = <6>;
145 interrupts = <0 14 0x4>;
146 reg = <0xf9028000 0x1000>;
147 status = "disabled";
148 };
149 };
150
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]151 qcom,vidc@fdc00000 {
152 compatible = "qcom,msm-vidc";
153 reg = <0xfdc00000 0xff000>;
154 interrupts = <0 44 0>;
155 qcom,load-freq-tbl = <352800 160000000>,
156 <244800 133330000>,
157 <108000 66700000>;
158 qcom,hfi = "venus";
159 qcom,bus-ports = <1>;
160 qcom,reg-presets = <0xE0024 0x0>,
161 <0x80124 0x3>,
162 <0xE0020 0x5555556>,
163 <0x800B0 0x10101001>,
164 <0x800B4 0x00101010>,
165 <0x800C0 0x1010100f>,
166 <0x800C4 0x00101010>,
167 <0x800D0 0x00000010>,
168 <0x800D4 0x00000010>,
169 <0x800D8 0x00000707>;
170 qcom,enc-ddr-ab-ib = <0 0>,
171 <129000 142000>,
172 <384000 422000>,
173 <866000 953000>;
174 qcom,dec-ddr-ab-ib = <0 0>,
175 <103000 134000>,
176 <268000 348000>,
177 <505000 657000>;
178 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
179 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
180 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
181 <0x1fe 0x2>;
Deva Ramasubramanian74b1dda2013-03-27 13:16:17 -0700[diff] [blame]182 qcom,max-hw-load = <352800>; /* 720p @ 30 + 1080p @ 30 */
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]183 };
184
185 qcom,wfd {
186 compatible = "qcom,msm-wfd";
187 };
188
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]189 serial@f991f000 {
190 compatible = "qcom,msm-lsuart-v14";
191 reg = <0xf991f000 0x1000>;
192 interrupts = <0 109 0>;
193 status = "disabled";
194 };
195
196 serial@f995e000 {
197 compatible = "qcom,msm-lsuart-v14";
198 reg = <0xf995e000 0x1000>;
199 interrupts = <0 114 0>;
200 status = "disabled";
201 };
202
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]203 qcom,msm-imem@fe805000 {
204 compatible = "qcom,msm-imem";
205 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
206 };
207
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]208 qcom,sps@f9984000 {
209 compatible = "qcom,msm_sps";
210 reg = <0xf9984000 0x15000>,
211 <0xf9999000 0xb000>;
212 interrupts = <0 94 0>;
213 };
214
Vamsi Krishna840835b2013-04-01 22:01:05 -0700[diff] [blame]215 qcom,usbbam@f9a44000 {
216 compatible = "qcom,usb-bam-msm";
217 reg = <0xf9a44000 0x11000>;
218 reg-names = "hsusb";
219 interrupts = <0 135 0>;
220 interrupt-names = "hsusb";
221 qcom,usb-bam-num-pipes = <16>;
222 qcom,usb-bam-fifo-baseaddr = <0xfe803000>;
223 qcom,ignore-core-reset-ack;
224 qcom,disable-clk-gating;
225
226 qcom,pipe0 {
227 label = "hsusb-qdss-in-0";
228 qcom,usb-bam-mem-type = <3>;
229 qcom,bam-type = <1>;
230 qcom,dir = <1>;
231 qcom,pipe-num = <0>;
232 qcom,peer-bam = <1>;
233 qcom,src-bam-physical-address = <0xfc37c000>;
234 qcom,src-bam-pipe-index = <0>;
235 qcom,dst-bam-physical-address = <0xf9a44000>;
236 qcom,dst-bam-pipe-index = <2>;
237 qcom,data-fifo-offset = <0x0>;
238 qcom,data-fifo-size = <0x600>;
239 qcom,descriptor-fifo-offset = <0x600>;
240 qcom,descriptor-fifo-size = <0x200>;
241 };
242 };
243
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame^]244 usb_otg: usb@f9a55000 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]245 compatible = "qcom,hsusb-otg";
246 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]247 interrupts = <0 134 0>, <0 140 0>;
248 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]249 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]250 HSUSB_1p8-supply = <&pm8226_l10>;
251 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]252 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]253
Vamsi Krishna1f265912013-04-22 22:50:06 -0700[diff] [blame]254 qcom,hsusb-otg-phy-init-seq =
255 <0x44 0x80 0x68 0x81 0x24 0x82 0x13 0x83 0xffffffff>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]256 qcom,hsusb-otg-phy-type = <2>;
257 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]258 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]259 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]260 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]261
Manu Gautam41334e92013-06-04 17:49:25 +0530[diff] [blame^]262 qcom,msm-bus,name = "usb";
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]263 qcom,msm-bus,num-cases = <2>;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]264 qcom,msm-bus,num-paths = <1>;
265 qcom,msm-bus,vectors-KBps =
266 <87 512 0 0>,
267 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]268 };
269
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]270 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]271 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]272 reg = <0xfe8050c8 0xc8>;
Chiranjeevi Velempati9d797662013-04-22 15:45:38 +0530[diff] [blame]273 qcom,android-usb-cdrom;
Manu Gautam1bdb7802013-05-22 12:48:35 +0530[diff] [blame]274 qcom,android-usb-swfi-latency = <1>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]275 };
276
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]277 wcd9xxx_intc: wcd9xxx-irq {
278 compatible = "qcom,wcd9xxx-irq";
279 interrupt-controller;
280 #interrupt-cells = <1>;
281 interrupt-parent = <&msmgpio>;
282 interrupts = <68 0>;
283 interrupt-names = "cdc-int";
284 };
285
Phani Kumar Uppalapati5f285bf2013-05-05 23:36:57 -0700[diff] [blame]286 slim_msm: slim@fe12f000 {
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]287 cell-index = <1>;
288 compatible = "qcom,slim-ngd";
289 reg = <0xfe12f000 0x35000>,
290 <0xfe104000 0x20000>;
291 reg-names = "slimbus_physical", "slimbus_bam_physical";
292 interrupts = <0 163 0>, <0 164 0>;
293 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]294
295 tapan_codec {
296 compatible = "qcom,tapan-slim-pgd";
297 elemental-addr = [00 01 E0 00 17 02];
298
299 interrupt-parent = <&wcd9xxx_intc>;
300 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
301 17 18 19 20 21 22 23 24 25 26 27 28>;
302 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
303
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]304 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]305 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
306 qcom,cdc-vdd-buck-current = <650000>;
307
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]308 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]309 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
310 qcom,cdc-vdd-h-current = <25000>;
311
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]312 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]313 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
314 qcom,cdc-vdd-px-current = <25000>;
315
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]316 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]317 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
318 qcom,cdc-vdd-a-1p2v-current = <10000>;
319
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]320 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]321 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
322 qcom,cdc-vdd-cx-current = <10000>;
323
Joonwoo Park73239212013-04-10 15:11:06 -0700[diff] [blame]324 qcom,cdc-static-supplies = "cdc-vdd-buck",
325 "cdc-vdd-h",
326 "cdc-vdd-px",
327 "cdc-vdd-a-1p2v",
328 "cdc-vdd-cx";
329
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]330 qcom,cdc-micbias-ldoh-v = <0x3>;
331 qcom,cdc-micbias-cfilt1-mv = <1800>;
Phani Kumar Uppalapatiab0d98a2013-05-21 23:04:15 -0700[diff] [blame]332 qcom,cdc-micbias-cfilt2-mv = <2700>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]333 qcom,cdc-micbias-cfilt3-mv = <1800>;
334
335 qcom,cdc-micbias1-cfilt-sel = <0x0>;
336 qcom,cdc-micbias2-cfilt-sel = <0x1>;
337 qcom,cdc-micbias3-cfilt-sel = <0x2>;
338
339 qcom,cdc-mclk-clk-rate = <9600000>;
340 qcom,cdc-slim-ifd = "tapan-slim-ifd";
341 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
342 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]343 };
344
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]345 qcom,msm-adsp-loader {
346 compatible = "qcom,adsp-loader";
347 qcom,adsp-state = <0>;
348 };
349
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]350 sound {
351 compatible = "qcom,msm8226-audio-tapan";
352 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]353 qcom,tapan-mclk-clk-freq = <9600000>;
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]354 qcom,prim-auxpcm-gpio-clk = <&msmgpio 63 0>;
355 qcom,prim-auxpcm-gpio-sync = <&msmgpio 64 0>;
356 qcom,prim-auxpcm-gpio-din = <&msmgpio 65 0>;
357 qcom,prim-auxpcm-gpio-dout = <&msmgpio 66 0>;
358 qcom,prim-auxpcm-gpio-set = "prim-gpio-prim";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]359 };
360
361 qcom,msm-pcm {
362 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]363 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]364 };
365
366 qcom,msm-pcm-routing {
367 compatible = "qcom,msm-pcm-routing";
368 };
369
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]370 qcom,msm-pcm-low-latency {
371 compatible = "qcom,msm-pcm-dsp";
372 qcom,msm-pcm-dsp-id = <1>;
373 qcom,msm-pcm-low-latency;
374 };
375
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]376 qcom,msm-pcm-lpa {
377 compatible = "qcom,msm-pcm-lpa";
378 };
379
380 qcom,msm-compr-dsp {
381 compatible = "qcom,msm-compr-dsp";
382 };
383
384 qcom,msm-voip-dsp {
385 compatible = "qcom,msm-voip-dsp";
386 };
387
388 qcom,msm-pcm-voice {
389 compatible = "qcom,msm-pcm-voice";
390 };
391
392 qcom,msm-stub-codec {
393 compatible = "qcom,msm-stub-codec";
394 };
395
396 qcom,msm-dai-fe {
397 compatible = "qcom,msm-dai-fe";
398 };
399
400 qcom,msm-pcm-afe {
401 compatible = "qcom,msm-pcm-afe";
402 };
403
404 qcom,msm-dai-q6-hdmi {
405 compatible = "qcom,msm-dai-q6-hdmi";
406 qcom,msm-dai-q6-dev-id = <8>;
407 };
408
409 qcom,msm-dai-q6 {
410 compatible = "qcom,msm-dai-q6";
411 qcom,msm-dai-q6-sb-0-rx {
412 compatible = "qcom,msm-dai-q6-dev";
413 qcom,msm-dai-q6-dev-id = <16384>;
414 };
415
416 qcom,msm-dai-q6-sb-0-tx {
417 compatible = "qcom,msm-dai-q6-dev";
418 qcom,msm-dai-q6-dev-id = <16385>;
419 };
420
421 qcom,msm-dai-q6-sb-1-rx {
422 compatible = "qcom,msm-dai-q6-dev";
423 qcom,msm-dai-q6-dev-id = <16386>;
424 };
425
426 qcom,msm-dai-q6-sb-1-tx {
427 compatible = "qcom,msm-dai-q6-dev";
428 qcom,msm-dai-q6-dev-id = <16387>;
429 };
430
431 qcom,msm-dai-q6-sb-3-rx {
432 compatible = "qcom,msm-dai-q6-dev";
433 qcom,msm-dai-q6-dev-id = <16390>;
434 };
435
436 qcom,msm-dai-q6-sb-3-tx {
437 compatible = "qcom,msm-dai-q6-dev";
438 qcom,msm-dai-q6-dev-id = <16391>;
439 };
440
441 qcom,msm-dai-q6-sb-4-rx {
442 compatible = "qcom,msm-dai-q6-dev";
443 qcom,msm-dai-q6-dev-id = <16392>;
444 };
445
446 qcom,msm-dai-q6-sb-4-tx {
447 compatible = "qcom,msm-dai-q6-dev";
448 qcom,msm-dai-q6-dev-id = <16393>;
449 };
450
451 qcom,msm-dai-q6-bt-sco-rx {
452 compatible = "qcom,msm-dai-q6-dev";
453 qcom,msm-dai-q6-dev-id = <12288>;
454 };
455
456 qcom,msm-dai-q6-bt-sco-tx {
457 compatible = "qcom,msm-dai-q6-dev";
458 qcom,msm-dai-q6-dev-id = <12289>;
459 };
460
461 qcom,msm-dai-q6-int-fm-rx {
462 compatible = "qcom,msm-dai-q6-dev";
463 qcom,msm-dai-q6-dev-id = <12292>;
464 };
465
466 qcom,msm-dai-q6-int-fm-tx {
467 compatible = "qcom,msm-dai-q6-dev";
468 qcom,msm-dai-q6-dev-id = <12293>;
469 };
470
471 qcom,msm-dai-q6-be-afe-pcm-rx {
472 compatible = "qcom,msm-dai-q6-dev";
473 qcom,msm-dai-q6-dev-id = <224>;
474 };
475
476 qcom,msm-dai-q6-be-afe-pcm-tx {
477 compatible = "qcom,msm-dai-q6-dev";
478 qcom,msm-dai-q6-dev-id = <225>;
479 };
480
481 qcom,msm-dai-q6-afe-proxy-rx {
482 compatible = "qcom,msm-dai-q6-dev";
483 qcom,msm-dai-q6-dev-id = <241>;
484 };
485
486 qcom,msm-dai-q6-afe-proxy-tx {
487 compatible = "qcom,msm-dai-q6-dev";
488 qcom,msm-dai-q6-dev-id = <240>;
489 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]490
491 qcom,msm-dai-q6-incall-record-rx {
492 compatible = "qcom,msm-dai-q6-dev";
493 qcom,msm-dai-q6-dev-id = <32771>;
494 };
495
496 qcom,msm-dai-q6-incall-record-tx {
497 compatible = "qcom,msm-dai-q6-dev";
498 qcom,msm-dai-q6-dev-id = <32772>;
499 };
500
501 qcom,msm-dai-q6-incall-music-rx {
502 compatible = "qcom,msm-dai-q6-dev";
503 qcom,msm-dai-q6-dev-id = <32773>;
504 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]505 };
506
507 qcom,msm-pcm-hostless {
508 compatible = "qcom,msm-pcm-hostless";
509 };
510
Banajit Goswamif9921532013-05-10 11:24:52 -0700[diff] [blame]511 qcom,msm-auxpcm {
512 compatible = "qcom,msm-auxpcm-resource";
513 qcom,msm-cpudai-auxpcm-clk = "pcm_clk";
514 qcom,msm-cpudai-auxpcm-mode = <0>, <0>;
515 qcom,msm-cpudai-auxpcm-sync = <1>, <1>;
516 qcom,msm-cpudai-auxpcm-frame = <5>, <4>;
517 qcom,msm-cpudai-auxpcm-quant = <2>, <2>;
518 qcom,msm-cpudai-auxpcm-slot = <1>, <1>;
519 qcom,msm-cpudai-auxpcm-data = <0>, <0>;
520 qcom,msm-cpudai-auxpcm-pcm-clk-rate = <2048000>, <2048000>;
521
522 qcom,msm-prim-auxpcm-rx {
523 qcom,msm-auxpcm-dev-id = <4106>;
524 compatible = "qcom,msm-auxpcm-dev";
525 };
526
527 qcom,msm-prim-auxpcm-tx {
528 qcom,msm-auxpcm-dev-id = <4107>;
529 compatible = "qcom,msm-auxpcm-dev";
530 };
531 };
532
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]533 qcom,wcnss-wlan@fb000000 {
534 compatible = "qcom,wcnss_wlan";
Sameer Thalappil58281ca2013-04-10 18:50:18 -0700[diff] [blame]535 reg = <0xfb000000 0x280000>,
536 <0xf9011008 0x04>;
537 reg-names = "wcnss_mmio", "wcnss_fiq";
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]538 interrupts = <0 145 0 0 146 0>;
539 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
540
541 qcom,pronto-vddmx-supply = <&pm8226_l3>;
542 qcom,pronto-vddcx-supply = <&pm8226_s1>;
543 qcom,pronto-vddpx-supply = <&pm8226_l6>;
544 qcom,iris-vddxo-supply = <&pm8226_l10>;
545 qcom,iris-vddrfa-supply = <&pm8226_l24>;
546 qcom,iris-vddpa-supply = <&pm8226_l16>;
547 qcom,iris-vdddig-supply = <&pm8226_l24>;
548
549 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
Sameer Thalappil820f87b2013-05-21 20:40:54 -0700[diff] [blame]550 qcom,has-pronto-hw;
551 qcom,has-autodetect-xo;
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]552 };
rockiec44833a32013-03-21 02:06:14 +0800[diff] [blame]553
554 qcom,msm-adsp-sensors {
555 compatible = "qcom,msm-adsp-sensors";
556 qcom,src-id = <11>;
557 qcom,dst-id = <604>;
558 qcom,ab = <32505856>;
559 qcom,ib = <32505856>;
560 };
561
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]562 qcom,wdt@f9017000 {
563 compatible = "qcom,msm-watchdog";
564 reg = <0xf9017000 0x1000>;
565 interrupts = <0 3 0>, <0 4 0>;
566 qcom,bark-time = <11000>;
567 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]568 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]569 };
570
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]571 qcom,smem@fa00000 {
572 compatible = "qcom,smem";
Jeff Hugo41e5c2f2013-04-26 11:38:32 -0600[diff] [blame]573 reg = <0xfa00000 0x100000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]574 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]575 <0xfc428000 0x4000>;
576 reg-names = "smem", "irq-reg-base", "aux-mem1";
577
578 qcom,smd-modem {
579 compatible = "qcom,smd";
580 qcom,smd-edge = <0>;
581 qcom,smd-irq-offset = <0x8>;
582 qcom,smd-irq-bitmask = <0x1000>;
583 qcom,pil-string = "modem";
584 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]585 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]586
587 qcom,smsm-modem {
588 compatible = "qcom,smsm";
589 qcom,smsm-edge = <0>;
590 qcom,smsm-irq-offset = <0x8>;
591 qcom,smsm-irq-bitmask = <0x2000>;
592 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]593 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]594
595 qcom,smd-adsp {
596 compatible = "qcom,smd";
597 qcom,smd-edge = <1>;
598 qcom,smd-irq-offset = <0x8>;
599 qcom,smd-irq-bitmask = <0x100>;
600 qcom,pil-string = "adsp";
601 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]602 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]603
604 qcom,smsm-adsp {
605 compatible = "qcom,smsm";
606 qcom,smsm-edge = <1>;
607 qcom,smsm-irq-offset = <0x8>;
608 qcom,smsm-irq-bitmask = <0x200>;
609 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]610 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]611
612 qcom,smd-wcnss {
613 compatible = "qcom,smd";
614 qcom,smd-edge = <6>;
615 qcom,smd-irq-offset = <0x8>;
616 qcom,smd-irq-bitmask = <0x20000>;
617 qcom,pil-string = "wcnss";
618 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]619 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]620
621 qcom,smsm-wcnss {
622 compatible = "qcom,smsm";
623 qcom,smsm-edge = <6>;
624 qcom,smsm-irq-offset = <0x8>;
625 qcom,smsm-irq-bitmask = <0x80000>;
626 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]627 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]628
629 qcom,smd-rpm {
630 compatible = "qcom,smd";
631 qcom,smd-edge = <15>;
632 qcom,smd-irq-offset = <0x8>;
633 qcom,smd-irq-bitmask = <0x1>;
634 interrupts = <0 168 1>;
635 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]636 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]637 };
638
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]639 rpm_bus: qcom,rpm-smd {
640 compatible = "qcom,rpm-smd";
641 rpm-channel-name = "rpm_requests";
642 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]643 };
644
Jennifer Liu86687d52013-05-29 15:51:40 -0700[diff] [blame]645 qcom,bcl {
646 compatible = "qcom,bcl";
647 };
648
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]649 sdcc1: qcom,sdcc@f9824000 {
650 cell-index = <1>; /* SDC1 eMMC slot */
651 compatible = "qcom,msm-sdcc";
652
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]653 reg = <0xf9824000 0x800>,
654 <0xf9824800 0x100>,
655 <0xf9804000 0x7000>;
656 reg-names = "core_mem", "dml_mem", "bam_mem";
657 interrupts = <0 123 0>, <0 137 0>;
658 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]659
660 qcom,bus-width = <8>;
661 status = "disabled";
662 };
663
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]664 sdhc_1: sdhci@f9824900 {
665 compatible = "qcom,sdhci-msm";
666 reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
667 reg-names = "hc_mem", "core_mem";
668
669 interrupts = <0 123 0>, <0 138 0>;
670 interrupt-names = "hc_irq", "pwr_irq";
671
672 qcom,bus-width = <8>;
673 status = "disabled";
674 };
675
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]676 sdcc2: qcom,sdcc@f98a4000 {
677 cell-index = <2>; /* SDC2 SD card slot */
678 compatible = "qcom,msm-sdcc";
679
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]680 reg = <0xf98a4000 0x800>,
681 <0xf98a4800 0x100>,
682 <0xf9884000 0x7000>;
683 reg-names = "core_mem", "dml_mem", "bam_mem";
684 interrupts = <0 125 0>, <0 220 0>;
685 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]686
687 qcom,bus-width = <4>;
688 status = "disabled";
689 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]690
Sahitya Tummala9e001362013-03-28 11:00:55 +0530[diff] [blame]691 sdhc_2: sdhci@f98a4900 {
692 compatible = "qcom,sdhci-msm";
693 reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
694 reg-names = "hc_mem", "core_mem";
695
696 interrupts = <0 125 0>, <0 221 0>;
697 interrupt-names = "hc_irq", "pwr_irq";
698
699 qcom,bus-width = <4>;
700 status = "disabled";
701 };
702
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]703 spmi_bus: qcom,spmi@fc4c0000 {
704 cell-index = <0>;
705 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]706 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]707 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]708 <0Xfc4cb000 0x1000>,
709 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]710 /* 190,ee0_krait_hlos_spmi_periph_irq */
711 /* 187,channel_0_krait_hlos_trans_done_irq */
712 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]713 qcom,pmic-arb-ee = <0>;
714 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]715 };
716
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]717 i2c@f9926000 { /* BLSP-1 QUP-4 */
718 cell-index = <0>;
719 compatible = "qcom,i2c-qup";
720 reg = <0xf9926000 0x1000>;
721 #address-cells = <1>;
722 #size-cells = <0>;
723 reg-names = "qup_phys_addr";
724 interrupts = <0 98 0>;
725 interrupt-names = "qup_err_intr";
726 qcom,i2c-bus-freq = <100000>;
727 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]728
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]729 i2c@f9927000 { /* BLSP1 QUP5 */
730 cell-index = <5>;
731 compatible = "qcom,i2c-qup";
732 #address-cells = <1>;
733 #size-cells = <0>;
734 reg-names = "qup_phys_addr";
735 reg = <0xf9927000 0x1000>;
736 interrupt-names = "qup_err_intr";
737 interrupts = <0 99 0>;
Amy Maloche118e5d62013-05-01 14:53:35 -0700[diff] [blame]738 qcom,i2c-bus-freq = <384000>;
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]739 qcom,i2c-src-freq = <19200000>;
740 };
741
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]742 qcom,acpuclk@f9011050 {
743 compatible = "qcom,acpuclk-a7";
744 reg = <0xf9011050 0x8>;
745 reg-names = "rcg_base";
Patrick Dalyf9451d22013-03-20 14:20:12 -0700[diff] [blame]746 a7_cpu-supply = <&apc_vreg_corner>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]747 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]748
749 qcom,ocmem@fdd00000 {
750 compatible = "qcom,msm-ocmem";
751 reg = <0xfdd00000 0x2000>,
752 <0xfdd02000 0x2000>,
753 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]754 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]755 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
756 interrupts = <0 76 0 0 77 0>;
757 interrupt-names = "ocmem_irq", "dm_irq";
758 qcom,ocmem-num-regions = <0x1>;
759 qcom,ocmem-num-macros = <0x2>;
760 qcom,resource-type = <0x706d636f>;
761 #address-cells = <1>;
762 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]763 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]764
765 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]766 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]767 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]768 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]769 };
770 };
771
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]772 qcom,venus@fdce0000 {
773 compatible = "qcom,pil-venus";
774 reg = <0xfdce0000 0x4000>,
775 <0xfdc80000 0x400>;
776 reg-names = "wrapper_base", "vbif_base";
777 vdd-supply = <&gdsc_venus>;
778
779 qcom,firmware-name = "venus";
780 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]781
782 qcom,pronto@fb21b000 {
783 compatible = "qcom,pil-pronto";
784 reg = <0xfb21b000 0x3000>,
785 <0xfc401700 0x4>,
786 <0xfd485300 0xc>;
787 reg-names = "pmu_base", "clk_base", "halt_base";
788 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]789 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]790
791 qcom,firmware-name = "wcnss";
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]792
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]793 /* GPIO inputs from wcnss */
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]794 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_4_in 0 0>;
Sameer Thalappilb1e03c02013-04-29 14:52:00 -0700[diff] [blame]795 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_4_in 1 0>;
Sameer Thalappil4ba86302013-04-05 17:36:54 -0700[diff] [blame]796 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_4_in 2 0>;
Sameer Thalappil5c2c41b2013-04-02 11:08:21 -0700[diff] [blame]797
798 /* GPIO output to wcnss */
799 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_4_out 0 0>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]800 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]801
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]802 qcom,iris-fm {
803 compatible = "qcom,iris_fm";
804 };
805
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]806 qcom,lpass@fe200000 {
807 compatible = "qcom,pil-q6v5-lpass";
808 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]809 <0xfd485100 0x00010>,
810 <0xfc4016c0 0x00004>;
811 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]812 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]813 interrupts = <0 162 1>;
814
815 qcom,firmware-name = "adsp";
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]816
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]817 /* GPIO inputs from lpass */
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]818 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
Ravishankar Sarawadiab203a82013-04-09 18:46:11 -0700[diff] [blame]819 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
Ravishankar Sarawadi7edc9d72013-04-09 18:15:03 -0700[diff] [blame]820 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
Ravishankar Sarawadi2e8ac7d2013-03-28 15:23:30 -0700[diff] [blame]821
822 /* GPIO output to lpass */
823 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]824 };
825
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]826 qcom,mss@fc880000 {
827 compatible = "qcom,pil-q6v5-mss";
828 reg = <0xfc880000 0x100>,
829 <0xfd485000 0x400>,
830 <0xfc820000 0x020>,
831 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]832 <0xfd485194 0x4>;
833 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame]834 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]835
836 interrupts = <0 24 1>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]837 vdd_cx-supply = <&pm8226_s1_corner>;
838 vdd_mx-supply = <&pm8226_l3>;
839 vdd_pll-supply = <&pm8226_l8>;
840 qcom,vdd_pll = <1800000>;
841
842 qcom,is-loadable;
843 qcom,firmware-name = "mba";
844 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]845
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]846 /* GPIO inputs from mss */
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]847 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
Seemanta Dutta9fb72ed2013-01-25 14:22:15 -0800[diff] [blame]848 qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>;
Seemanta Duttaa0f253e2013-01-16 18:54:40 -0800[diff] [blame]849 qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]850
851 /* GPIO output to mss */
852 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]853 };
854
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]855 qcom,msm-mem-hole {
856 compatible = "qcom,msm-mem-hole";
Neeti Desai3d0a98b2013-04-10 10:41:03 -0700[diff] [blame]857 qcom,memblock-remove = <0x6400000 0x9b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]858 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]859
860 tsens: tsens@fc4a8000 {
861 compatible = "qcom,msm-tsens";
862 reg = <0xfc4a8000 0x2000>,
863 <0xfc4b8000 0x1000>;
864 reg-names = "tsens_physical", "tsens_eeprom_physical";
865 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]866 qcom,sensors = <4>;
867 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]868 qcom,calib-mode = "fuse_map2";
869 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]870
871 qcom,msm-thermal {
872 compatible = "qcom,msm-thermal";
873 qcom,sensor-id = <0>;
874 qcom,poll-ms = <250>;
875 qcom,limit-temp = <60>;
876 qcom,temp-hysteresis = <10>;
877 qcom,freq-step = <2>;
Praveen Chidambarama7435ce2013-05-03 12:52:42 -0600[diff] [blame]878 qcom,freq-control-mask = <0xf>;
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]879 };
880
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]881 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
882 compatible = "qcom,spi-qup-v2";
883 #address-cells = <1>;
884 #size-cells = <0>;
885 reg-names = "spi_physical", "spi_bam_physical";
886 reg = <0xf9923000 0x1000>,
887 <0xf9904000 0xF000>;
888 interrupt-names = "spi_irq", "spi_bam_irq";
889 interrupts = <0 95 0>, <0 238 0>;
890 spi-max-frequency = <19200000>;
891
892 gpios = <&msmgpio 3 0>, /* CLK */
893 <&msmgpio 1 0>, /* MISO */
894 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]895 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]896
897 qcom,infinite-mode = <0>;
898 qcom,use-bam;
899 qcom,ver-reg-exists;
900 qcom,bam-consumer-pipe-index = <12>;
901 qcom,bam-producer-pipe-index = <13>;
902 };
903
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]904 qcom,bam_dmux@fc834000 {
905 compatible = "qcom,bam_dmux";
906 reg = <0xfc834000 0x7000>;
907 interrupts = <0 29 1>;
908 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]909
910 qcom,msm-rtb {
911 compatible = "qcom,msm-rtb";
912 qcom,memory-reservation-type = "EBI1";
913 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
914 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]915
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]916 qcom,msm-rng@f9bff000 {
917 compatible = "qcom,msm-rng";
918 reg = <0xf9bff000 0x200>;
919 qcom,msm-rng-iface-clk;
920 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]921
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]922 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]923 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]924 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]925 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]926
927 jtag_mm0: jtagmm@fc33c000 {
928 compatible = "qcom,jtag-mm";
929 reg = <0xfc33c000 0x1000>,
930 <0xfc330000 0x1000>;
931 reg-names = "etm-base","debug-base";
932 };
933
934 jtag_mm1: jtagmm@fc33d000 {
935 compatible = "qcom,jtag-mm";
936 reg = <0xfc33d000 0x1000>,
937 <0xfc332000 0x1000>;
938 reg-names = "etm-base","debug-base";
939 };
940
941 jtag_mm2: jtagmm@fc33e000 {
942 compatible = "qcom,jtag-mm";
943 reg = <0xfc33e000 0x1000>,
944 <0xfc334000 0x1000>;
945 reg-names = "etm-base","debug-base";
946 };
947
948 jtag_mm3: jtagmm@fc33f000 {
949 compatible = "qcom,jtag-mm";
950 reg = <0xfc33f000 0x1000>,
951 <0xfc336000 0x1000>;
952 reg-names = "etm-base","debug-base";
953 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]954
955 qcom,ipc-spinlock@fd484000 {
956 compatible = "qcom,ipc-spinlock-sfpb";
957 reg = <0xfd484000 0x400>;
958 qcom,num-locks = <8>;
959 };
Hariprasad Dhalinarasimha805ea4d2013-03-14 11:16:12 -0700[diff] [blame]960
961 qcom,qseecom@d980000 {
962 compatible = "qcom,qseecom";
963 reg = <0xd980000 0x256000>;
964 reg-names = "secapp-region";
965 qcom,disk-encrypt-pipe-pair = <2>;
966 qcom,hlos-ce-hw-instance = <0>;
967 qcom,qsee-ce-hw-instance = <0>;
968 qcom,msm-bus,name = "qseecom-noc";
969 qcom,msm-bus,num-cases = <4>;
970 qcom,msm-bus,active-only = <0>;
971 qcom,msm-bus,num-paths = <1>;
972 qcom,msm-bus,vectors-KBps =
973 <55 512 0 0>,
974 <55 512 3936000 393600>,
975 <55 512 3936000 393600>,
976 <55 512 3936000 393600>;
977 };
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]978
979 qcom,qcrypto@fd404000 {
980 compatible = "qcom,qcrypto";
981 reg = <0xfd400000 0x20000>,
982 <0xfd404000 0x8000>;
983 reg-names = "crypto-base","crypto-bam-base";
984 interrupts = <0 207 0>;
985 qcom,bam-pipe-pair = <2>;
986 qcom,ce-hw-instance = <0>;
987 qcom,ce-hw-shared;
988 qcom,msm-bus,name = "qcrypto-noc";
989 qcom,msm-bus,num-cases = <2>;
990 qcom,msm-bus,active-only = <0>;
991 qcom,msm-bus,num-paths = <1>;
992 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]993 <55 512 0 0>,
994 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]995 };
996
997 qcom,qcedev@fd400000 {
998 compatible = "qcom,qcedev";
999 reg = <0xfd400000 0x20000>,
1000 <0xfd404000 0x8000>;
1001 reg-names = "crypto-base","crypto-bam-base";
1002 interrupts = <0 207 0>;
1003 qcom,bam-pipe-pair = <1>;
1004 qcom,ce-hw-instance = <0>;
1005 qcom,ce-hw-shared;
1006 qcom,msm-bus,name = "qcedev-noc";
1007 qcom,msm-bus,num-cases = <2>;
1008 qcom,msm-bus,active-only = <0>;
1009 qcom,msm-bus,num-paths = <1>;
1010 qcom,msm-bus,vectors-KBps =
Hariprasad Dhalinarasimhaa2d749e2013-05-14 13:00:06 -0700[diff] [blame]1011 <55 512 0 0>,
1012 <55 512 3936000 393600>;
Hariprasad Dhalinarasimha75051f22013-03-19 15:08:50 -0700[diff] [blame]1013 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]1014};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]1015
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1016&gdsc_venus {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1017 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1018 status = "ok";
1019};
1020
1021&gdsc_mdss {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1022 qcom,clock-names = "core_clk", "lut_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1023 status = "ok";
1024};
1025
1026&gdsc_jpeg {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1027 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1028 status = "ok";
1029};
1030
1031&gdsc_vfe {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1032 qcom,clock-names = "core_clk", "csi_clk", "cpp_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1033 status = "ok";
1034};
1035
1036&gdsc_oxili_cx {
Matt Wagantallb8cba292013-04-11 15:45:17 -0700[diff] [blame]1037 qcom,clock-names = "core_clk";
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]1038 status = "ok";
1039};
1040
1041&gdsc_usb_hsic {
1042 status = "ok";
1043};
1044
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]1045/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]1046/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]1047/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1048
1049&pm8226_vadc {
1050 chan@0 {
1051 label = "usb_in";
1052 reg = <0>;
1053 qcom,decimation = <0>;
1054 qcom,pre-div-channel-scaling = <4>;
1055 qcom,calibration-type = "absolute";
1056 qcom,scale-function = <0>;
1057 qcom,hw-settle-time = <0>;
1058 qcom,fast-avg-setup = <0>;
1059 };
1060
1061 chan@2 {
1062 label = "vchg_sns";
1063 reg = <2>;
1064 qcom,decimation = <0>;
1065 qcom,pre-div-channel-scaling = <3>;
1066 qcom,calibration-type = "absolute";
1067 qcom,scale-function = <0>;
1068 qcom,hw-settle-time = <0>;
1069 qcom,fast-avg-setup = <0>;
1070 };
1071
1072 chan@5 {
1073 label = "vcoin";
1074 reg = <5>;
1075 qcom,decimation = <0>;
1076 qcom,pre-div-channel-scaling = <1>;
1077 qcom,calibration-type = "absolute";
1078 qcom,scale-function = <0>;
1079 qcom,hw-settle-time = <0>;
1080 qcom,fast-avg-setup = <0>;
1081 };
1082
1083 chan@6 {
1084 label = "vbat_sns";
1085 reg = <6>;
1086 qcom,decimation = <0>;
1087 qcom,pre-div-channel-scaling = <1>;
1088 qcom,calibration-type = "absolute";
1089 qcom,scale-function = <0>;
1090 qcom,hw-settle-time = <0>;
1091 qcom,fast-avg-setup = <0>;
1092 };
1093
1094 chan@7 {
1095 label = "vph_pwr";
1096 reg = <7>;
1097 qcom,decimation = <0>;
1098 qcom,pre-div-channel-scaling = <1>;
1099 qcom,calibration-type = "absolute";
1100 qcom,scale-function = <0>;
1101 qcom,hw-settle-time = <0>;
1102 qcom,fast-avg-setup = <0>;
1103 };
1104
1105 chan@30 {
1106 label = "batt_therm";
1107 reg = <0x30>;
1108 qcom,decimation = <0>;
1109 qcom,pre-div-channel-scaling = <0>;
1110 qcom,calibration-type = "ratiometric";
1111 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1112 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1113 qcom,fast-avg-setup = <0>;
1114 };
1115
1116 chan@31 {
1117 label = "batt_id";
1118 reg = <0x31>;
1119 qcom,decimation = <0>;
1120 qcom,pre-div-channel-scaling = <0>;
1121 qcom,calibration-type = "ratiometric";
1122 qcom,scale-function = <0>;
1123 qcom,hw-settle-time = <2>;
1124 qcom,fast-avg-setup = <0>;
1125 };
1126
1127 chan@b2 {
1128 label = "xo_therm_pu2";
1129 reg = <0xb2>;
1130 qcom,decimation = <0>;
1131 qcom,pre-div-channel-scaling = <0>;
1132 qcom,calibration-type = "ratiometric";
1133 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]1134 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1135 qcom,fast-avg-setup = <0>;
1136 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1137
Siddartha Mohanadoss3cb76152013-04-12 16:17:02 -0700[diff] [blame]1138 chan@39 {
1139 label = "usb_id_nopull";
1140 reg = <0x39>;
1141 qcom,decimation = <0>;
1142 qcom,pre-div-channel-scaling = <0>;
1143 qcom,calibration-type = "ratiometric";
1144 qcom,scale-function = <0>;
1145 qcom,hw-settle-time = <2>;
1146 qcom,fast-avg-setup = <0>;
1147 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1148};
1149
Siddartha Mohanadoss8aea3172013-05-09 11:49:37 -0700[diff] [blame]1150&pm8226_adc_tm {
1151 /* Channel Node */
1152 chan@30 {
1153 label = "batt_therm";
1154 reg = <0x30>;
1155 qcom,decimation = <0>;
1156 qcom,pre-div-channel-scaling = <0>;
1157 qcom,calibration-type = "ratiometric";
1158 qcom,scale-function = <1>;
1159 qcom,hw-settle-time = <2>;
1160 qcom,fast-avg-setup = <3>;
1161 qcom,btm-channel-number = <0x48>;
1162 };
1163
1164 chan@8 {
1165 label = "die_temp";
1166 reg = <8>;
1167 qcom,decimation = <0>;
1168 qcom,pre-div-channel-scaling = <0>;
1169 qcom,calibration-type = "absolute";
1170 qcom,scale-function = <3>;
1171 qcom,hw-settle-time = <0>;
1172 qcom,fast-avg-setup = <3>;
1173 qcom,btm-channel-number = <0x68>;
1174 };
1175
1176 chan@6 {
1177 label = "vbat_sns";
1178 reg = <6>;
1179 qcom,decimation = <0>;
1180 qcom,pre-div-channel-scaling = <1>;
1181 qcom,calibration-type = "absolute";
1182 qcom,scale-function = <0>;
1183 qcom,hw-settle-time = <0>;
1184 qcom,fast-avg-setup = <3>;
1185 qcom,btm-channel-number = <0x70>;
1186 };
1187
1188 chan@14 {
1189 label = "pa_therm0";
1190 reg = <0x14>;
1191 qcom,decimation = <0>;
1192 qcom,pre-div-channel-scaling = <0>;
1193 qcom,calibration-type = "ratiometric";
1194 qcom,scale-function = <2>;
1195 qcom,hw-settle-time = <2>;
1196 qcom,fast-avg-setup = <0>;
1197 qcom,btm-channel-number = <0x78>;
1198 qcom,thermal-node;
1199 };
1200
1201 chan@17 {
1202 label = "pa_therm1";
1203 reg = <0x17>;
1204 qcom,decimation = <0>;
1205 qcom,pre-div-channel-scaling = <0>;
1206 qcom,calibration-type = "ratiometric";
1207 qcom,scale-function = <2>;
1208 qcom,hw-settle-time = <2>;
1209 qcom,fast-avg-setup = <0>;
1210 qcom,btm-channel-number = <0x80>;
1211 qcom,thermal-node;
1212 };
1213};
1214
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1215&pm8226_chg {
1216 status = "ok";
1217
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1218 qcom,chgr@1000 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1219 status = "ok";
1220 };
1221
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1222 qcom,buck@1100 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1223 status = "ok";
1224 };
1225
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1226 qcom,bat-if@1200 {
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]1227 status = "ok";
1228 };
1229
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1230 qcom,usb-chgpth@1300 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1231 status = "ok";
1232 };
1233
David Keitele89d4782013-03-27 11:29:59 -0700[diff] [blame]1234 qcom,boost@1500 {
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]1235 status = "ok";
1236 };
1237
1238 qcom,chg-misc@1600 {
1239 status = "ok";
1240 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]1241};