Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Blackfin On-Chip Real Time Clock Driver |
Mike Frysinger | 2c95cd7 | 2007-07-15 02:33:26 +0800 | [diff] [blame] | 3 | * Supports BF53[123]/BF53[467]/BF54[2489] |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 4 | * |
| 5 | * Copyright 2004-2007 Analog Devices Inc. |
| 6 | * |
| 7 | * Enter bugs at http://blackfin.uclinux.org/ |
| 8 | * |
| 9 | * Licensed under the GPL-2 or later. |
| 10 | */ |
| 11 | |
| 12 | /* The biggest issue we deal with in this driver is that register writes are |
| 13 | * synced to the RTC frequency of 1Hz. So if you write to a register and |
| 14 | * attempt to write again before the first write has completed, the new write |
| 15 | * is simply discarded. This can easily be troublesome if userspace disables |
| 16 | * one event (say periodic) and then right after enables an event (say alarm). |
| 17 | * Since all events are maintained in the same interrupt mask register, if |
| 18 | * we wrote to it to disable the first event and then wrote to it again to |
| 19 | * enable the second event, that second event would not be enabled as the |
| 20 | * write would be discarded and things quickly fall apart. |
| 21 | * |
| 22 | * To keep this delay from significantly degrading performance (we, in theory, |
| 23 | * would have to sleep for up to 1 second everytime we wanted to write a |
| 24 | * register), we only check the write pending status before we start to issue |
| 25 | * a new write. We bank on the idea that it doesnt matter when the sync |
| 26 | * happens so long as we don't attempt another write before it does. The only |
| 27 | * time userspace would take this penalty is when they try and do multiple |
| 28 | * operations right after another ... but in this case, they need to take the |
| 29 | * sync penalty, so we should be OK. |
| 30 | * |
| 31 | * Also note that the RTC_ISTAT register does not suffer this penalty; its |
| 32 | * writes to clear status registers complete immediately. |
| 33 | */ |
| 34 | |
| 35 | #include <linux/module.h> |
| 36 | #include <linux/kernel.h> |
| 37 | #include <linux/bcd.h> |
| 38 | #include <linux/rtc.h> |
| 39 | #include <linux/init.h> |
| 40 | #include <linux/platform_device.h> |
| 41 | #include <linux/seq_file.h> |
| 42 | #include <linux/interrupt.h> |
| 43 | #include <linux/spinlock.h> |
| 44 | #include <linux/delay.h> |
| 45 | |
| 46 | #include <asm/blackfin.h> |
| 47 | |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 48 | #define dev_dbg_stamp(dev) dev_dbg(dev, "%s:%i: here i am\n", __func__, __LINE__) |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 49 | |
| 50 | struct bfin_rtc { |
| 51 | struct rtc_device *rtc_dev; |
| 52 | struct rtc_time rtc_alarm; |
| 53 | spinlock_t lock; |
| 54 | }; |
| 55 | |
| 56 | /* Bit values for the ISTAT / ICTL registers */ |
| 57 | #define RTC_ISTAT_WRITE_COMPLETE 0x8000 |
| 58 | #define RTC_ISTAT_WRITE_PENDING 0x4000 |
| 59 | #define RTC_ISTAT_ALARM_DAY 0x0040 |
| 60 | #define RTC_ISTAT_24HR 0x0020 |
| 61 | #define RTC_ISTAT_HOUR 0x0010 |
| 62 | #define RTC_ISTAT_MIN 0x0008 |
| 63 | #define RTC_ISTAT_SEC 0x0004 |
| 64 | #define RTC_ISTAT_ALARM 0x0002 |
| 65 | #define RTC_ISTAT_STOPWATCH 0x0001 |
| 66 | |
| 67 | /* Shift values for RTC_STAT register */ |
| 68 | #define DAY_BITS_OFF 17 |
| 69 | #define HOUR_BITS_OFF 12 |
| 70 | #define MIN_BITS_OFF 6 |
| 71 | #define SEC_BITS_OFF 0 |
| 72 | |
| 73 | /* Some helper functions to convert between the common RTC notion of time |
Mike Frysinger | 5c23634 | 2008-02-06 01:38:47 -0800 | [diff] [blame] | 74 | * and the internal Blackfin notion that is encoded in 32bits. |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 75 | */ |
| 76 | static inline u32 rtc_time_to_bfin(unsigned long now) |
| 77 | { |
| 78 | u32 sec = (now % 60); |
| 79 | u32 min = (now % (60 * 60)) / 60; |
| 80 | u32 hour = (now % (60 * 60 * 24)) / (60 * 60); |
| 81 | u32 days = (now / (60 * 60 * 24)); |
| 82 | return (sec << SEC_BITS_OFF) + |
| 83 | (min << MIN_BITS_OFF) + |
| 84 | (hour << HOUR_BITS_OFF) + |
| 85 | (days << DAY_BITS_OFF); |
| 86 | } |
| 87 | static inline unsigned long rtc_bfin_to_time(u32 rtc_bfin) |
| 88 | { |
| 89 | return (((rtc_bfin >> SEC_BITS_OFF) & 0x003F)) + |
| 90 | (((rtc_bfin >> MIN_BITS_OFF) & 0x003F) * 60) + |
| 91 | (((rtc_bfin >> HOUR_BITS_OFF) & 0x001F) * 60 * 60) + |
| 92 | (((rtc_bfin >> DAY_BITS_OFF) & 0x7FFF) * 60 * 60 * 24); |
| 93 | } |
| 94 | static inline void rtc_bfin_to_tm(u32 rtc_bfin, struct rtc_time *tm) |
| 95 | { |
| 96 | rtc_time_to_tm(rtc_bfin_to_time(rtc_bfin), tm); |
| 97 | } |
| 98 | |
| 99 | /* Wait for the previous write to a RTC register to complete. |
| 100 | * Unfortunately, we can't sleep here as that introduces a race condition when |
| 101 | * turning on interrupt events. Consider this: |
| 102 | * - process sets alarm |
| 103 | * - process enables alarm |
| 104 | * - process sleeps while waiting for rtc write to sync |
| 105 | * - interrupt fires while process is sleeping |
| 106 | * - interrupt acks the event by writing to ISTAT |
| 107 | * - interrupt sets the WRITE PENDING bit |
| 108 | * - interrupt handler finishes |
| 109 | * - process wakes up, sees WRITE PENDING bit set, goes to sleep |
| 110 | * - interrupt fires while process is sleeping |
| 111 | * If anyone can point out the obvious solution here, i'm listening :). This |
| 112 | * shouldn't be an issue on an SMP or preempt system as this function should |
| 113 | * only be called with the rtc lock held. |
Mike Frysinger | 5c23634 | 2008-02-06 01:38:47 -0800 | [diff] [blame] | 114 | * |
| 115 | * Other options: |
| 116 | * - disable PREN so the sync happens at 32.768kHZ ... but this changes the |
| 117 | * inc rate for all RTC registers from 1HZ to 32.768kHZ ... |
| 118 | * - use the write complete IRQ |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 119 | */ |
| 120 | static void rtc_bfin_sync_pending(void) |
| 121 | { |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 122 | while (!(bfin_read_RTC_ISTAT() & RTC_ISTAT_WRITE_COMPLETE)) { |
| 123 | if (!(bfin_read_RTC_ISTAT() & RTC_ISTAT_WRITE_PENDING)) |
| 124 | break; |
| 125 | } |
| 126 | bfin_write_RTC_ISTAT(RTC_ISTAT_WRITE_COMPLETE); |
| 127 | } |
| 128 | |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 129 | static void rtc_bfin_reset(struct device *dev) |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 130 | { |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 131 | struct bfin_rtc *rtc = dev_get_drvdata(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 132 | /* Initialize the RTC. Enable pre-scaler to scale RTC clock |
| 133 | * to 1Hz and clear interrupt/status registers. */ |
| 134 | spin_lock_irq(&rtc->lock); |
| 135 | rtc_bfin_sync_pending(); |
| 136 | bfin_write_RTC_PREN(0x1); |
| 137 | bfin_write_RTC_ICTL(0); |
| 138 | bfin_write_RTC_SWCNT(0); |
| 139 | bfin_write_RTC_ALARM(0); |
| 140 | bfin_write_RTC_ISTAT(0xFFFF); |
| 141 | spin_unlock_irq(&rtc->lock); |
| 142 | } |
| 143 | |
| 144 | static irqreturn_t bfin_rtc_interrupt(int irq, void *dev_id) |
| 145 | { |
Mike Frysinger | d7827d8 | 2008-02-06 01:38:47 -0800 | [diff] [blame] | 146 | struct device *dev = dev_id; |
| 147 | struct bfin_rtc *rtc = dev_get_drvdata(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 148 | unsigned long events = 0; |
| 149 | u16 rtc_istat; |
| 150 | |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 151 | dev_dbg_stamp(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 152 | |
| 153 | spin_lock_irq(&rtc->lock); |
| 154 | |
| 155 | rtc_istat = bfin_read_RTC_ISTAT(); |
| 156 | |
| 157 | if (rtc_istat & (RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY)) { |
| 158 | bfin_write_RTC_ISTAT(RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY); |
| 159 | events |= RTC_AF | RTC_IRQF; |
| 160 | } |
| 161 | |
| 162 | if (rtc_istat & RTC_ISTAT_STOPWATCH) { |
| 163 | bfin_write_RTC_ISTAT(RTC_ISTAT_STOPWATCH); |
| 164 | events |= RTC_PF | RTC_IRQF; |
| 165 | bfin_write_RTC_SWCNT(rtc->rtc_dev->irq_freq); |
| 166 | } |
| 167 | |
| 168 | if (rtc_istat & RTC_ISTAT_SEC) { |
| 169 | bfin_write_RTC_ISTAT(RTC_ISTAT_SEC); |
| 170 | events |= RTC_UF | RTC_IRQF; |
| 171 | } |
| 172 | |
| 173 | rtc_update_irq(rtc->rtc_dev, 1, events); |
| 174 | |
| 175 | spin_unlock_irq(&rtc->lock); |
| 176 | |
| 177 | return IRQ_HANDLED; |
| 178 | } |
| 179 | |
| 180 | static int bfin_rtc_open(struct device *dev) |
| 181 | { |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 182 | int ret; |
| 183 | |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 184 | dev_dbg_stamp(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 185 | |
| 186 | ret = request_irq(IRQ_RTC, bfin_rtc_interrupt, IRQF_DISABLED, "rtc-bfin", dev); |
| 187 | if (unlikely(ret)) { |
| 188 | dev_err(dev, "request RTC IRQ failed with %d\n", ret); |
| 189 | return ret; |
| 190 | } |
| 191 | |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 192 | rtc_bfin_reset(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 193 | |
| 194 | return ret; |
| 195 | } |
| 196 | |
| 197 | static void bfin_rtc_release(struct device *dev) |
| 198 | { |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 199 | dev_dbg_stamp(dev); |
| 200 | rtc_bfin_reset(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 201 | free_irq(IRQ_RTC, dev); |
| 202 | } |
| 203 | |
| 204 | static int bfin_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) |
| 205 | { |
| 206 | struct bfin_rtc *rtc = dev_get_drvdata(dev); |
| 207 | |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 208 | dev_dbg_stamp(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 209 | |
| 210 | switch (cmd) { |
| 211 | case RTC_PIE_ON: |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 212 | dev_dbg_stamp(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 213 | spin_lock_irq(&rtc->lock); |
| 214 | rtc_bfin_sync_pending(); |
| 215 | bfin_write_RTC_ISTAT(RTC_ISTAT_STOPWATCH); |
| 216 | bfin_write_RTC_SWCNT(rtc->rtc_dev->irq_freq); |
| 217 | bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() | RTC_ISTAT_STOPWATCH); |
| 218 | spin_unlock_irq(&rtc->lock); |
| 219 | return 0; |
| 220 | case RTC_PIE_OFF: |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 221 | dev_dbg_stamp(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 222 | spin_lock_irq(&rtc->lock); |
| 223 | rtc_bfin_sync_pending(); |
| 224 | bfin_write_RTC_SWCNT(0); |
| 225 | bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() & ~RTC_ISTAT_STOPWATCH); |
| 226 | spin_unlock_irq(&rtc->lock); |
| 227 | return 0; |
| 228 | |
| 229 | case RTC_UIE_ON: |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 230 | dev_dbg_stamp(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 231 | spin_lock_irq(&rtc->lock); |
| 232 | rtc_bfin_sync_pending(); |
| 233 | bfin_write_RTC_ISTAT(RTC_ISTAT_SEC); |
| 234 | bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() | RTC_ISTAT_SEC); |
| 235 | spin_unlock_irq(&rtc->lock); |
| 236 | return 0; |
| 237 | case RTC_UIE_OFF: |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 238 | dev_dbg_stamp(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 239 | spin_lock_irq(&rtc->lock); |
| 240 | rtc_bfin_sync_pending(); |
| 241 | bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() & ~RTC_ISTAT_SEC); |
| 242 | spin_unlock_irq(&rtc->lock); |
| 243 | return 0; |
| 244 | |
| 245 | case RTC_AIE_ON: { |
| 246 | unsigned long rtc_alarm; |
| 247 | u16 which_alarm; |
| 248 | int ret = 0; |
| 249 | |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 250 | dev_dbg_stamp(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 251 | |
| 252 | spin_lock_irq(&rtc->lock); |
| 253 | |
| 254 | rtc_bfin_sync_pending(); |
| 255 | if (rtc->rtc_alarm.tm_yday == -1) { |
| 256 | struct rtc_time now; |
| 257 | rtc_bfin_to_tm(bfin_read_RTC_STAT(), &now); |
| 258 | now.tm_sec = rtc->rtc_alarm.tm_sec; |
| 259 | now.tm_min = rtc->rtc_alarm.tm_min; |
| 260 | now.tm_hour = rtc->rtc_alarm.tm_hour; |
| 261 | ret = rtc_tm_to_time(&now, &rtc_alarm); |
| 262 | which_alarm = RTC_ISTAT_ALARM; |
| 263 | } else { |
| 264 | ret = rtc_tm_to_time(&rtc->rtc_alarm, &rtc_alarm); |
| 265 | which_alarm = RTC_ISTAT_ALARM_DAY; |
| 266 | } |
| 267 | if (ret == 0) { |
| 268 | bfin_write_RTC_ISTAT(which_alarm); |
| 269 | bfin_write_RTC_ALARM(rtc_time_to_bfin(rtc_alarm)); |
| 270 | bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() | which_alarm); |
| 271 | } |
| 272 | |
| 273 | spin_unlock_irq(&rtc->lock); |
| 274 | |
| 275 | return ret; |
| 276 | } |
| 277 | case RTC_AIE_OFF: |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 278 | dev_dbg_stamp(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 279 | spin_lock_irq(&rtc->lock); |
| 280 | rtc_bfin_sync_pending(); |
| 281 | bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() & ~(RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY)); |
| 282 | spin_unlock_irq(&rtc->lock); |
| 283 | return 0; |
| 284 | } |
| 285 | |
| 286 | return -ENOIOCTLCMD; |
| 287 | } |
| 288 | |
| 289 | static int bfin_rtc_read_time(struct device *dev, struct rtc_time *tm) |
| 290 | { |
| 291 | struct bfin_rtc *rtc = dev_get_drvdata(dev); |
| 292 | |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 293 | dev_dbg_stamp(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 294 | |
| 295 | spin_lock_irq(&rtc->lock); |
| 296 | rtc_bfin_sync_pending(); |
| 297 | rtc_bfin_to_tm(bfin_read_RTC_STAT(), tm); |
| 298 | spin_unlock_irq(&rtc->lock); |
| 299 | |
| 300 | return 0; |
| 301 | } |
| 302 | |
| 303 | static int bfin_rtc_set_time(struct device *dev, struct rtc_time *tm) |
| 304 | { |
| 305 | struct bfin_rtc *rtc = dev_get_drvdata(dev); |
| 306 | int ret; |
| 307 | unsigned long now; |
| 308 | |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 309 | dev_dbg_stamp(dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 310 | |
| 311 | spin_lock_irq(&rtc->lock); |
| 312 | |
| 313 | ret = rtc_tm_to_time(tm, &now); |
| 314 | if (ret == 0) { |
| 315 | rtc_bfin_sync_pending(); |
| 316 | bfin_write_RTC_STAT(rtc_time_to_bfin(now)); |
| 317 | } |
| 318 | |
| 319 | spin_unlock_irq(&rtc->lock); |
| 320 | |
| 321 | return ret; |
| 322 | } |
| 323 | |
| 324 | static int bfin_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 325 | { |
| 326 | struct bfin_rtc *rtc = dev_get_drvdata(dev); |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 327 | dev_dbg_stamp(dev); |
Mike Frysinger | 48c1a56 | 2008-02-06 01:38:50 -0800 | [diff] [blame^] | 328 | alrm->time = rtc->rtc_alarm; |
Mike Frysinger | 68db304 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 329 | alrm->enabled = !!(bfin_read_RTC_ICTL() & (RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY)); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 330 | return 0; |
| 331 | } |
| 332 | |
| 333 | static int bfin_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 334 | { |
| 335 | struct bfin_rtc *rtc = dev_get_drvdata(dev); |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 336 | dev_dbg_stamp(dev); |
Mike Frysinger | 68db304 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 337 | rtc->rtc_alarm = alrm->time; |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 338 | return 0; |
| 339 | } |
| 340 | |
| 341 | static int bfin_rtc_proc(struct device *dev, struct seq_file *seq) |
| 342 | { |
Mike Frysinger | 6406116 | 2008-02-06 01:38:48 -0800 | [diff] [blame] | 343 | #define yesno(x) ((x) ? "yes" : "no") |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 344 | u16 ictl = bfin_read_RTC_ICTL(); |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 345 | dev_dbg_stamp(dev); |
Mike Frysinger | 6406116 | 2008-02-06 01:38:48 -0800 | [diff] [blame] | 346 | seq_printf(seq, |
| 347 | "alarm_IRQ\t: %s\n" |
| 348 | "wkalarm_IRQ\t: %s\n" |
| 349 | "seconds_IRQ\t: %s\n" |
| 350 | "periodic_IRQ\t: %s\n", |
| 351 | yesno(ictl & RTC_ISTAT_ALARM), |
| 352 | yesno(ictl & RTC_ISTAT_ALARM_DAY), |
| 353 | yesno(ictl & RTC_ISTAT_SEC), |
| 354 | yesno(ictl & RTC_ISTAT_STOPWATCH)); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 355 | return 0; |
Mike Frysinger | 6406116 | 2008-02-06 01:38:48 -0800 | [diff] [blame] | 356 | #undef yesno |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 357 | } |
| 358 | |
Mike Frysinger | 5c23634 | 2008-02-06 01:38:47 -0800 | [diff] [blame] | 359 | /** |
| 360 | * bfin_irq_set_freq - make sure hardware supports requested freq |
| 361 | * @dev: pointer to RTC device structure |
| 362 | * @freq: requested frequency rate |
| 363 | * |
| 364 | * The Blackfin RTC can only generate periodic events at 1 per |
| 365 | * second (1 Hz), so reject any attempt at changing it. |
| 366 | */ |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 367 | static int bfin_irq_set_freq(struct device *dev, int freq) |
| 368 | { |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 369 | dev_dbg_stamp(dev); |
Mike Frysinger | 5c23634 | 2008-02-06 01:38:47 -0800 | [diff] [blame] | 370 | return -ENOTTY; |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 371 | } |
| 372 | |
| 373 | static struct rtc_class_ops bfin_rtc_ops = { |
| 374 | .open = bfin_rtc_open, |
| 375 | .release = bfin_rtc_release, |
| 376 | .ioctl = bfin_rtc_ioctl, |
| 377 | .read_time = bfin_rtc_read_time, |
| 378 | .set_time = bfin_rtc_set_time, |
| 379 | .read_alarm = bfin_rtc_read_alarm, |
| 380 | .set_alarm = bfin_rtc_set_alarm, |
| 381 | .proc = bfin_rtc_proc, |
| 382 | .irq_set_freq = bfin_irq_set_freq, |
| 383 | }; |
| 384 | |
| 385 | static int __devinit bfin_rtc_probe(struct platform_device *pdev) |
| 386 | { |
| 387 | struct bfin_rtc *rtc; |
| 388 | int ret = 0; |
| 389 | |
Mike Frysinger | 5438de4 | 2008-02-06 01:38:49 -0800 | [diff] [blame] | 390 | dev_dbg_stamp(&pdev->dev); |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 391 | |
| 392 | rtc = kzalloc(sizeof(*rtc), GFP_KERNEL); |
| 393 | if (unlikely(!rtc)) |
| 394 | return -ENOMEM; |
| 395 | |
| 396 | spin_lock_init(&rtc->lock); |
| 397 | |
| 398 | rtc->rtc_dev = rtc_device_register(pdev->name, &pdev->dev, &bfin_rtc_ops, THIS_MODULE); |
| 399 | if (unlikely(IS_ERR(rtc))) { |
| 400 | ret = PTR_ERR(rtc->rtc_dev); |
| 401 | goto err; |
| 402 | } |
Mike Frysinger | 5c23634 | 2008-02-06 01:38:47 -0800 | [diff] [blame] | 403 | rtc->rtc_dev->irq_freq = 1; |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 404 | |
| 405 | platform_set_drvdata(pdev, rtc); |
| 406 | |
| 407 | return 0; |
| 408 | |
Mike Frysinger | 5c23634 | 2008-02-06 01:38:47 -0800 | [diff] [blame] | 409 | err: |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 410 | kfree(rtc); |
| 411 | return ret; |
| 412 | } |
| 413 | |
| 414 | static int __devexit bfin_rtc_remove(struct platform_device *pdev) |
| 415 | { |
| 416 | struct bfin_rtc *rtc = platform_get_drvdata(pdev); |
| 417 | |
| 418 | rtc_device_unregister(rtc->rtc_dev); |
| 419 | platform_set_drvdata(pdev, NULL); |
| 420 | kfree(rtc); |
| 421 | |
| 422 | return 0; |
| 423 | } |
| 424 | |
| 425 | static struct platform_driver bfin_rtc_driver = { |
| 426 | .driver = { |
| 427 | .name = "rtc-bfin", |
| 428 | .owner = THIS_MODULE, |
| 429 | }, |
| 430 | .probe = bfin_rtc_probe, |
| 431 | .remove = __devexit_p(bfin_rtc_remove), |
| 432 | }; |
| 433 | |
| 434 | static int __init bfin_rtc_init(void) |
| 435 | { |
Wu, Bryan | 8cc75c9 | 2007-05-06 14:50:32 -0700 | [diff] [blame] | 436 | return platform_driver_register(&bfin_rtc_driver); |
| 437 | } |
| 438 | |
| 439 | static void __exit bfin_rtc_exit(void) |
| 440 | { |
| 441 | platform_driver_unregister(&bfin_rtc_driver); |
| 442 | } |
| 443 | |
| 444 | module_init(bfin_rtc_init); |
| 445 | module_exit(bfin_rtc_exit); |
| 446 | |
| 447 | MODULE_DESCRIPTION("Blackfin On-Chip Real Time Clock Driver"); |
| 448 | MODULE_AUTHOR("Mike Frysinger <vapier@gentoo.org>"); |
| 449 | MODULE_LICENSE("GPL"); |